1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * DaVinci MDIO Module driver
4  *
5  * Copyright (C) 2010 Texas Instruments.
6  *
7  * Shamelessly ripped out of davinci_emac.c, original copyrights follow:
8  *
9  * Copyright (C) 2009 Texas Instruments.
10  *
11  */
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/delay.h>
16 #include <linux/sched.h>
17 #include <linux/slab.h>
18 #include <linux/phy.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
21 #include <linux/io.h>
22 #include <linux/iopoll.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/davinci_emac.h>
25 #include <linux/of.h>
26 #include <linux/of_device.h>
27 #include <linux/of_mdio.h>
28 #include <linux/pinctrl/consumer.h>
29 
30 /*
31  * This timeout definition is a worst-case ultra defensive measure against
32  * unexpected controller lock ups.  Ideally, we should never ever hit this
33  * scenario in practice.
34  */
35 #define MDIO_TIMEOUT		100 /* msecs */
36 
37 #define PHY_REG_MASK		0x1f
38 #define PHY_ID_MASK		0x1f
39 
40 #define DEF_OUT_FREQ		2200000		/* 2.2 MHz */
41 
42 struct davinci_mdio_of_param {
43 	int autosuspend_delay_ms;
44 };
45 
46 struct davinci_mdio_regs {
47 	u32	version;
48 	u32	control;
49 #define CONTROL_IDLE		BIT(31)
50 #define CONTROL_ENABLE		BIT(30)
51 #define CONTROL_MAX_DIV		(0xffff)
52 
53 	u32	alive;
54 	u32	link;
55 	u32	linkintraw;
56 	u32	linkintmasked;
57 	u32	__reserved_0[2];
58 	u32	userintraw;
59 	u32	userintmasked;
60 	u32	userintmaskset;
61 	u32	userintmaskclr;
62 	u32	__reserved_1[20];
63 
64 	struct {
65 		u32	access;
66 #define USERACCESS_GO		BIT(31)
67 #define USERACCESS_WRITE	BIT(30)
68 #define USERACCESS_ACK		BIT(29)
69 #define USERACCESS_READ		(0)
70 #define USERACCESS_DATA		(0xffff)
71 
72 		u32	physel;
73 	}	user[];
74 };
75 
76 static const struct mdio_platform_data default_pdata = {
77 	.bus_freq = DEF_OUT_FREQ,
78 };
79 
80 struct davinci_mdio_data {
81 	struct mdio_platform_data pdata;
82 	struct davinci_mdio_regs __iomem *regs;
83 	struct clk	*clk;
84 	struct device	*dev;
85 	struct mii_bus	*bus;
86 	bool            active_in_suspend;
87 	unsigned long	access_time; /* jiffies */
88 	/* Indicates that driver shouldn't modify phy_mask in case
89 	 * if MDIO bus is registered from DT.
90 	 */
91 	bool		skip_scan;
92 	u32		clk_div;
93 };
94 
95 static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
96 {
97 	u32 mdio_in, div, mdio_out_khz, access_time;
98 
99 	mdio_in = clk_get_rate(data->clk);
100 	div = (mdio_in / data->pdata.bus_freq) - 1;
101 	if (div > CONTROL_MAX_DIV)
102 		div = CONTROL_MAX_DIV;
103 
104 	data->clk_div = div;
105 	/*
106 	 * One mdio transaction consists of:
107 	 *	32 bits of preamble
108 	 *	32 bits of transferred data
109 	 *	24 bits of bus yield (not needed unless shared?)
110 	 */
111 	mdio_out_khz = mdio_in / (1000 * (div + 1));
112 	access_time  = (88 * 1000) / mdio_out_khz;
113 
114 	/*
115 	 * In the worst case, we could be kicking off a user-access immediately
116 	 * after the mdio bus scan state-machine triggered its own read.  If
117 	 * so, our request could get deferred by one access cycle.  We
118 	 * defensively allow for 4 access cycles.
119 	 */
120 	data->access_time = usecs_to_jiffies(access_time * 4);
121 	if (!data->access_time)
122 		data->access_time = 1;
123 }
124 
125 static void davinci_mdio_enable(struct davinci_mdio_data *data)
126 {
127 	/* set enable and clock divider */
128 	writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
129 }
130 
131 static int davinci_mdio_reset(struct mii_bus *bus)
132 {
133 	struct davinci_mdio_data *data = bus->priv;
134 	u32 phy_mask, ver;
135 	int ret;
136 
137 	ret = pm_runtime_resume_and_get(data->dev);
138 	if (ret < 0)
139 		return ret;
140 
141 	/* wait for scan logic to settle */
142 	msleep(PHY_MAX_ADDR * data->access_time);
143 
144 	/* dump hardware version info */
145 	ver = readl(&data->regs->version);
146 	dev_info(data->dev,
147 		 "davinci mdio revision %d.%d, bus freq %ld\n",
148 		 (ver >> 8) & 0xff, ver & 0xff,
149 		 data->pdata.bus_freq);
150 
151 	if (data->skip_scan)
152 		goto done;
153 
154 	/* get phy mask from the alive register */
155 	phy_mask = readl(&data->regs->alive);
156 	if (phy_mask) {
157 		/* restrict mdio bus to live phys only */
158 		dev_info(data->dev, "detected phy mask %x\n", ~phy_mask);
159 		phy_mask = ~phy_mask;
160 	} else {
161 		/* desperately scan all phys */
162 		dev_warn(data->dev, "no live phy, scanning all\n");
163 		phy_mask = 0;
164 	}
165 	data->bus->phy_mask = phy_mask;
166 
167 done:
168 	pm_runtime_mark_last_busy(data->dev);
169 	pm_runtime_put_autosuspend(data->dev);
170 
171 	return 0;
172 }
173 
174 /* wait until hardware is ready for another user access */
175 static inline int wait_for_user_access(struct davinci_mdio_data *data)
176 {
177 	struct davinci_mdio_regs __iomem *regs = data->regs;
178 	unsigned long timeout = jiffies + msecs_to_jiffies(MDIO_TIMEOUT);
179 	u32 reg;
180 
181 	while (time_after(timeout, jiffies)) {
182 		reg = readl(&regs->user[0].access);
183 		if ((reg & USERACCESS_GO) == 0)
184 			return 0;
185 
186 		reg = readl(&regs->control);
187 		if ((reg & CONTROL_IDLE) == 0) {
188 			usleep_range(100, 200);
189 			continue;
190 		}
191 
192 		/*
193 		 * An emac soft_reset may have clobbered the mdio controller's
194 		 * state machine.  We need to reset and retry the current
195 		 * operation
196 		 */
197 		dev_warn(data->dev, "resetting idled controller\n");
198 		davinci_mdio_enable(data);
199 		return -EAGAIN;
200 	}
201 
202 	reg = readl(&regs->user[0].access);
203 	if ((reg & USERACCESS_GO) == 0)
204 		return 0;
205 
206 	dev_err(data->dev, "timed out waiting for user access\n");
207 	return -ETIMEDOUT;
208 }
209 
210 /* wait until hardware state machine is idle */
211 static inline int wait_for_idle(struct davinci_mdio_data *data)
212 {
213 	struct davinci_mdio_regs __iomem *regs = data->regs;
214 	u32 val, ret;
215 
216 	ret = readl_poll_timeout(&regs->control, val, val & CONTROL_IDLE,
217 				 0, MDIO_TIMEOUT * 1000);
218 	if (ret)
219 		dev_err(data->dev, "timed out waiting for idle\n");
220 
221 	return ret;
222 }
223 
224 static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)
225 {
226 	struct davinci_mdio_data *data = bus->priv;
227 	u32 reg;
228 	int ret;
229 
230 	if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
231 		return -EINVAL;
232 
233 	ret = pm_runtime_resume_and_get(data->dev);
234 	if (ret < 0)
235 		return ret;
236 
237 	reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) |
238 	       (phy_id << 16));
239 
240 	while (1) {
241 		ret = wait_for_user_access(data);
242 		if (ret == -EAGAIN)
243 			continue;
244 		if (ret < 0)
245 			break;
246 
247 		writel(reg, &data->regs->user[0].access);
248 
249 		ret = wait_for_user_access(data);
250 		if (ret == -EAGAIN)
251 			continue;
252 		if (ret < 0)
253 			break;
254 
255 		reg = readl(&data->regs->user[0].access);
256 		ret = (reg & USERACCESS_ACK) ? (reg & USERACCESS_DATA) : -EIO;
257 		break;
258 	}
259 
260 	pm_runtime_mark_last_busy(data->dev);
261 	pm_runtime_put_autosuspend(data->dev);
262 	return ret;
263 }
264 
265 static int davinci_mdio_write(struct mii_bus *bus, int phy_id,
266 			      int phy_reg, u16 phy_data)
267 {
268 	struct davinci_mdio_data *data = bus->priv;
269 	u32 reg;
270 	int ret;
271 
272 	if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
273 		return -EINVAL;
274 
275 	ret = pm_runtime_resume_and_get(data->dev);
276 	if (ret < 0)
277 		return ret;
278 
279 	reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) |
280 		   (phy_id << 16) | (phy_data & USERACCESS_DATA));
281 
282 	while (1) {
283 		ret = wait_for_user_access(data);
284 		if (ret == -EAGAIN)
285 			continue;
286 		if (ret < 0)
287 			break;
288 
289 		writel(reg, &data->regs->user[0].access);
290 
291 		ret = wait_for_user_access(data);
292 		if (ret == -EAGAIN)
293 			continue;
294 		break;
295 	}
296 
297 	pm_runtime_mark_last_busy(data->dev);
298 	pm_runtime_put_autosuspend(data->dev);
299 
300 	return ret;
301 }
302 
303 static int davinci_mdio_probe_dt(struct mdio_platform_data *data,
304 			 struct platform_device *pdev)
305 {
306 	struct device_node *node = pdev->dev.of_node;
307 	u32 prop;
308 
309 	if (!node)
310 		return -EINVAL;
311 
312 	if (of_property_read_u32(node, "bus_freq", &prop)) {
313 		dev_err(&pdev->dev, "Missing bus_freq property in the DT.\n");
314 		return -EINVAL;
315 	}
316 	data->bus_freq = prop;
317 
318 	return 0;
319 }
320 
321 #if IS_ENABLED(CONFIG_OF)
322 static const struct davinci_mdio_of_param of_cpsw_mdio_data = {
323 	.autosuspend_delay_ms = 100,
324 };
325 
326 static const struct of_device_id davinci_mdio_of_mtable[] = {
327 	{ .compatible = "ti,davinci_mdio", },
328 	{ .compatible = "ti,cpsw-mdio", .data = &of_cpsw_mdio_data},
329 	{ /* sentinel */ },
330 };
331 MODULE_DEVICE_TABLE(of, davinci_mdio_of_mtable);
332 #endif
333 
334 static int davinci_mdio_probe(struct platform_device *pdev)
335 {
336 	struct mdio_platform_data *pdata = dev_get_platdata(&pdev->dev);
337 	struct device *dev = &pdev->dev;
338 	struct davinci_mdio_data *data;
339 	struct resource *res;
340 	struct phy_device *phy;
341 	int ret, addr;
342 	int autosuspend_delay_ms = -1;
343 
344 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
345 	if (!data)
346 		return -ENOMEM;
347 
348 	data->bus = devm_mdiobus_alloc(dev);
349 	if (!data->bus) {
350 		dev_err(dev, "failed to alloc mii bus\n");
351 		return -ENOMEM;
352 	}
353 
354 	if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
355 		const struct davinci_mdio_of_param *of_mdio_data;
356 
357 		ret = davinci_mdio_probe_dt(&data->pdata, pdev);
358 		if (ret)
359 			return ret;
360 		snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
361 
362 		of_mdio_data = of_device_get_match_data(&pdev->dev);
363 		if (of_mdio_data) {
364 			autosuspend_delay_ms =
365 					of_mdio_data->autosuspend_delay_ms;
366 		}
367 	} else {
368 		data->pdata = pdata ? (*pdata) : default_pdata;
369 		snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s-%x",
370 			 pdev->name, pdev->id);
371 	}
372 
373 	data->bus->name		= dev_name(dev);
374 	data->bus->read		= davinci_mdio_read;
375 	data->bus->write	= davinci_mdio_write;
376 	data->bus->reset	= davinci_mdio_reset;
377 	data->bus->parent	= dev;
378 	data->bus->priv		= data;
379 
380 	data->clk = devm_clk_get(dev, "fck");
381 	if (IS_ERR(data->clk)) {
382 		dev_err(dev, "failed to get device clock\n");
383 		return PTR_ERR(data->clk);
384 	}
385 
386 	dev_set_drvdata(dev, data);
387 	data->dev = dev;
388 
389 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
390 	if (!res)
391 		return -EINVAL;
392 	data->regs = devm_ioremap(dev, res->start, resource_size(res));
393 	if (!data->regs)
394 		return -ENOMEM;
395 
396 	davinci_mdio_init_clk(data);
397 
398 	pm_runtime_set_autosuspend_delay(&pdev->dev, autosuspend_delay_ms);
399 	pm_runtime_use_autosuspend(&pdev->dev);
400 	pm_runtime_enable(&pdev->dev);
401 
402 	/* register the mii bus
403 	 * Create PHYs from DT only in case if PHY child nodes are explicitly
404 	 * defined to support backward compatibility with DTs which assume that
405 	 * Davinci MDIO will always scan the bus for PHYs detection.
406 	 */
407 	if (dev->of_node && of_get_child_count(dev->of_node))
408 		data->skip_scan = true;
409 
410 	ret = of_mdiobus_register(data->bus, dev->of_node);
411 	if (ret)
412 		goto bail_out;
413 
414 	/* scan and dump the bus */
415 	for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
416 		phy = mdiobus_get_phy(data->bus, addr);
417 		if (phy) {
418 			dev_info(dev, "phy[%d]: device %s, driver %s\n",
419 				 phy->mdio.addr, phydev_name(phy),
420 				 phy->drv ? phy->drv->name : "unknown");
421 		}
422 	}
423 
424 	return 0;
425 
426 bail_out:
427 	pm_runtime_dont_use_autosuspend(&pdev->dev);
428 	pm_runtime_disable(&pdev->dev);
429 	return ret;
430 }
431 
432 static int davinci_mdio_remove(struct platform_device *pdev)
433 {
434 	struct davinci_mdio_data *data = platform_get_drvdata(pdev);
435 
436 	if (data->bus)
437 		mdiobus_unregister(data->bus);
438 
439 	pm_runtime_dont_use_autosuspend(&pdev->dev);
440 	pm_runtime_disable(&pdev->dev);
441 
442 	return 0;
443 }
444 
445 #ifdef CONFIG_PM
446 static int davinci_mdio_runtime_suspend(struct device *dev)
447 {
448 	struct davinci_mdio_data *data = dev_get_drvdata(dev);
449 	u32 ctrl;
450 
451 	/* shutdown the scan state machine */
452 	ctrl = readl(&data->regs->control);
453 	ctrl &= ~CONTROL_ENABLE;
454 	writel(ctrl, &data->regs->control);
455 	wait_for_idle(data);
456 
457 	return 0;
458 }
459 
460 static int davinci_mdio_runtime_resume(struct device *dev)
461 {
462 	struct davinci_mdio_data *data = dev_get_drvdata(dev);
463 
464 	davinci_mdio_enable(data);
465 	return 0;
466 }
467 #endif
468 
469 #ifdef CONFIG_PM_SLEEP
470 static int davinci_mdio_suspend(struct device *dev)
471 {
472 	struct davinci_mdio_data *data = dev_get_drvdata(dev);
473 	int ret = 0;
474 
475 	data->active_in_suspend = !pm_runtime_status_suspended(dev);
476 	if (data->active_in_suspend)
477 		ret = pm_runtime_force_suspend(dev);
478 	if (ret < 0)
479 		return ret;
480 
481 	/* Select sleep pin state */
482 	pinctrl_pm_select_sleep_state(dev);
483 
484 	return 0;
485 }
486 
487 static int davinci_mdio_resume(struct device *dev)
488 {
489 	struct davinci_mdio_data *data = dev_get_drvdata(dev);
490 
491 	/* Select default pin state */
492 	pinctrl_pm_select_default_state(dev);
493 
494 	if (data->active_in_suspend)
495 		pm_runtime_force_resume(dev);
496 
497 	return 0;
498 }
499 #endif
500 
501 static const struct dev_pm_ops davinci_mdio_pm_ops = {
502 	SET_RUNTIME_PM_OPS(davinci_mdio_runtime_suspend,
503 			   davinci_mdio_runtime_resume, NULL)
504 	SET_LATE_SYSTEM_SLEEP_PM_OPS(davinci_mdio_suspend, davinci_mdio_resume)
505 };
506 
507 static struct platform_driver davinci_mdio_driver = {
508 	.driver = {
509 		.name	 = "davinci_mdio",
510 		.pm	 = &davinci_mdio_pm_ops,
511 		.of_match_table = of_match_ptr(davinci_mdio_of_mtable),
512 	},
513 	.probe = davinci_mdio_probe,
514 	.remove = davinci_mdio_remove,
515 };
516 
517 static int __init davinci_mdio_init(void)
518 {
519 	return platform_driver_register(&davinci_mdio_driver);
520 }
521 device_initcall(davinci_mdio_init);
522 
523 static void __exit davinci_mdio_exit(void)
524 {
525 	platform_driver_unregister(&davinci_mdio_driver);
526 }
527 module_exit(davinci_mdio_exit);
528 
529 MODULE_LICENSE("GPL");
530 MODULE_DESCRIPTION("DaVinci MDIO driver");
531