1 /* 2 * TI Common Platform Time Sync 3 * 4 * Copyright (C) 2012 Richard Cochran <richardcochran@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 */ 20 #ifndef _TI_CPTS_H_ 21 #define _TI_CPTS_H_ 22 23 #if IS_ENABLED(CONFIG_TI_CPTS) 24 25 #include <linux/clk.h> 26 #include <linux/clkdev.h> 27 #include <linux/clocksource.h> 28 #include <linux/device.h> 29 #include <linux/list.h> 30 #include <linux/of.h> 31 #include <linux/ptp_clock_kernel.h> 32 #include <linux/skbuff.h> 33 #include <linux/timecounter.h> 34 35 struct cpsw_cpts { 36 u32 idver; /* Identification and version */ 37 u32 control; /* Time sync control */ 38 u32 res1; 39 u32 ts_push; /* Time stamp event push */ 40 u32 ts_load_val; /* Time stamp load value */ 41 u32 ts_load_en; /* Time stamp load enable */ 42 u32 res2[2]; 43 u32 intstat_raw; /* Time sync interrupt status raw */ 44 u32 intstat_masked; /* Time sync interrupt status masked */ 45 u32 int_enable; /* Time sync interrupt enable */ 46 u32 res3; 47 u32 event_pop; /* Event interrupt pop */ 48 u32 event_low; /* 32 Bit Event Time Stamp */ 49 u32 event_high; /* Event Type Fields */ 50 }; 51 52 /* Bit definitions for the IDVER register */ 53 #define TX_IDENT_SHIFT (16) /* TX Identification Value */ 54 #define TX_IDENT_MASK (0xffff) 55 #define RTL_VER_SHIFT (11) /* RTL Version Value */ 56 #define RTL_VER_MASK (0x1f) 57 #define MAJOR_VER_SHIFT (8) /* Major Version Value */ 58 #define MAJOR_VER_MASK (0x7) 59 #define MINOR_VER_SHIFT (0) /* Minor Version Value */ 60 #define MINOR_VER_MASK (0xff) 61 62 /* Bit definitions for the CONTROL register */ 63 #define HW4_TS_PUSH_EN (1<<11) /* Hardware push 4 enable */ 64 #define HW3_TS_PUSH_EN (1<<10) /* Hardware push 3 enable */ 65 #define HW2_TS_PUSH_EN (1<<9) /* Hardware push 2 enable */ 66 #define HW1_TS_PUSH_EN (1<<8) /* Hardware push 1 enable */ 67 #define INT_TEST (1<<1) /* Interrupt Test */ 68 #define CPTS_EN (1<<0) /* Time Sync Enable */ 69 70 /* 71 * Definitions for the single bit resisters: 72 * TS_PUSH TS_LOAD_EN INTSTAT_RAW INTSTAT_MASKED INT_ENABLE EVENT_POP 73 */ 74 #define TS_PUSH (1<<0) /* Time stamp event push */ 75 #define TS_LOAD_EN (1<<0) /* Time Stamp Load */ 76 #define TS_PEND_RAW (1<<0) /* int read (before enable) */ 77 #define TS_PEND (1<<0) /* masked interrupt read (after enable) */ 78 #define TS_PEND_EN (1<<0) /* masked interrupt enable */ 79 #define EVENT_POP (1<<0) /* writing discards one event */ 80 81 /* Bit definitions for the EVENT_HIGH register */ 82 #define PORT_NUMBER_SHIFT (24) /* Indicates Ethernet port or HW pin */ 83 #define PORT_NUMBER_MASK (0x1f) 84 #define EVENT_TYPE_SHIFT (20) /* Time sync event type */ 85 #define EVENT_TYPE_MASK (0xf) 86 #define MESSAGE_TYPE_SHIFT (16) /* PTP message type */ 87 #define MESSAGE_TYPE_MASK (0xf) 88 #define SEQUENCE_ID_SHIFT (0) /* PTP message sequence ID */ 89 #define SEQUENCE_ID_MASK (0xffff) 90 91 enum { 92 CPTS_EV_PUSH, /* Time Stamp Push Event */ 93 CPTS_EV_ROLL, /* Time Stamp Rollover Event */ 94 CPTS_EV_HALF, /* Time Stamp Half Rollover Event */ 95 CPTS_EV_HW, /* Hardware Time Stamp Push Event */ 96 CPTS_EV_RX, /* Ethernet Receive Event */ 97 CPTS_EV_TX, /* Ethernet Transmit Event */ 98 }; 99 100 #define CPTS_FIFO_DEPTH 16 101 #define CPTS_MAX_EVENTS 32 102 103 struct cpts_event { 104 struct list_head list; 105 unsigned long tmo; 106 u32 high; 107 u32 low; 108 }; 109 110 struct cpts { 111 struct device *dev; 112 struct cpsw_cpts __iomem *reg; 113 int tx_enable; 114 int rx_enable; 115 struct ptp_clock_info info; 116 struct ptp_clock *clock; 117 spinlock_t lock; /* protects time registers */ 118 u32 cc_mult; /* for the nominal frequency */ 119 struct cyclecounter cc; 120 struct timecounter tc; 121 struct delayed_work overflow_work; 122 int phc_index; 123 struct clk *refclk; 124 struct list_head events; 125 struct list_head pool; 126 struct cpts_event pool_data[CPTS_MAX_EVENTS]; 127 unsigned long ov_check_period; 128 }; 129 130 void cpts_rx_timestamp(struct cpts *cpts, struct sk_buff *skb); 131 void cpts_tx_timestamp(struct cpts *cpts, struct sk_buff *skb); 132 int cpts_register(struct cpts *cpts); 133 void cpts_unregister(struct cpts *cpts); 134 struct cpts *cpts_create(struct device *dev, void __iomem *regs, 135 struct device_node *node); 136 void cpts_release(struct cpts *cpts); 137 138 static inline void cpts_rx_enable(struct cpts *cpts, int enable) 139 { 140 cpts->rx_enable = enable; 141 } 142 143 static inline bool cpts_is_rx_enabled(struct cpts *cpts) 144 { 145 return !!cpts->rx_enable; 146 } 147 148 static inline void cpts_tx_enable(struct cpts *cpts, int enable) 149 { 150 cpts->tx_enable = enable; 151 } 152 153 static inline bool cpts_is_tx_enabled(struct cpts *cpts) 154 { 155 return !!cpts->tx_enable; 156 } 157 158 #else 159 struct cpts; 160 161 static inline void cpts_rx_timestamp(struct cpts *cpts, struct sk_buff *skb) 162 { 163 } 164 static inline void cpts_tx_timestamp(struct cpts *cpts, struct sk_buff *skb) 165 { 166 } 167 168 static inline 169 struct cpts *cpts_create(struct device *dev, void __iomem *regs, 170 struct device_node *node) 171 { 172 return NULL; 173 } 174 175 static inline void cpts_release(struct cpts *cpts) 176 { 177 } 178 179 static inline int 180 cpts_register(struct cpts *cpts) 181 { 182 return 0; 183 } 184 185 static inline void cpts_unregister(struct cpts *cpts) 186 { 187 } 188 189 static inline void cpts_rx_enable(struct cpts *cpts, int enable) 190 { 191 } 192 193 static inline bool cpts_is_rx_enabled(struct cpts *cpts) 194 { 195 return false; 196 } 197 198 static inline void cpts_tx_enable(struct cpts *cpts, int enable) 199 { 200 } 201 202 static inline bool cpts_is_tx_enabled(struct cpts *cpts) 203 { 204 return false; 205 } 206 #endif 207 208 209 #endif 210