1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine APIs 4 * 5 * Copyright (C) 2012 Texas Instruments 6 * 7 */ 8 #ifndef __TI_CPSW_ALE_H__ 9 #define __TI_CPSW_ALE_H__ 10 11 struct cpsw_ale_params { 12 struct device *dev; 13 void __iomem *ale_regs; 14 unsigned long ale_ageout; /* in secs */ 15 unsigned long ale_entries; 16 unsigned long ale_ports; 17 /* NU Switch has specific handling as number of bits in ALE entries 18 * are different than other versions of ALE. Also there are specific 19 * registers for unknown vlan specific fields. So use nu_switch_ale 20 * to identify this hardware. 21 */ 22 bool nu_switch_ale; 23 /* mask bit used in NU Switch ALE is 3 bits instead of 8 bits. So 24 * pass it from caller. 25 */ 26 u32 major_ver_mask; 27 }; 28 29 struct cpsw_ale { 30 struct cpsw_ale_params params; 31 struct timer_list timer; 32 unsigned long ageout; 33 u32 version; 34 /* These bits are different on NetCP NU Switch ALE */ 35 u32 port_mask_bits; 36 u32 port_num_bits; 37 u32 vlan_field_bits; 38 unsigned long *p0_untag_vid_mask; 39 }; 40 41 enum cpsw_ale_control { 42 /* global */ 43 ALE_ENABLE, 44 ALE_CLEAR, 45 ALE_AGEOUT, 46 ALE_P0_UNI_FLOOD, 47 ALE_VLAN_NOLEARN, 48 ALE_NO_PORT_VLAN, 49 ALE_OUI_DENY, 50 ALE_BYPASS, 51 ALE_RATE_LIMIT_TX, 52 ALE_VLAN_AWARE, 53 ALE_AUTH_ENABLE, 54 ALE_RATE_LIMIT, 55 /* port controls */ 56 ALE_PORT_STATE, 57 ALE_PORT_DROP_UNTAGGED, 58 ALE_PORT_DROP_UNKNOWN_VLAN, 59 ALE_PORT_NOLEARN, 60 ALE_PORT_NO_SA_UPDATE, 61 ALE_PORT_UNKNOWN_VLAN_MEMBER, 62 ALE_PORT_UNKNOWN_MCAST_FLOOD, 63 ALE_PORT_UNKNOWN_REG_MCAST_FLOOD, 64 ALE_PORT_UNTAGGED_EGRESS, 65 ALE_PORT_MACONLY, 66 ALE_PORT_MACONLY_CAF, 67 ALE_PORT_BCAST_LIMIT, 68 ALE_PORT_MCAST_LIMIT, 69 ALE_NUM_CONTROLS, 70 }; 71 72 enum cpsw_ale_port_state { 73 ALE_PORT_STATE_DISABLE = 0x00, 74 ALE_PORT_STATE_BLOCK = 0x01, 75 ALE_PORT_STATE_LEARN = 0x02, 76 ALE_PORT_STATE_FORWARD = 0x03, 77 }; 78 79 /* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */ 80 #define ALE_SECURE BIT(0) 81 #define ALE_BLOCKED BIT(1) 82 #define ALE_SUPER BIT(2) 83 #define ALE_VLAN BIT(3) 84 85 #define ALE_PORT_HOST BIT(0) 86 #define ALE_PORT_1 BIT(1) 87 #define ALE_PORT_2 BIT(2) 88 89 #define ALE_MCAST_FWD 0 90 #define ALE_MCAST_BLOCK_LEARN_FWD 1 91 #define ALE_MCAST_FWD_LEARN 2 92 #define ALE_MCAST_FWD_2 3 93 94 #define ALE_ENTRY_BITS 68 95 #define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32) 96 97 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params); 98 99 void cpsw_ale_start(struct cpsw_ale *ale); 100 void cpsw_ale_stop(struct cpsw_ale *ale); 101 102 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid); 103 int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port, 104 int flags, u16 vid); 105 int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port, 106 int flags, u16 vid); 107 int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, 108 int flags, u16 vid, int mcast_state); 109 int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, 110 int flags, u16 vid); 111 int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag, 112 int reg_mcast, int unreg_mcast); 113 int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port); 114 void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti, int port); 115 116 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control); 117 int cpsw_ale_control_set(struct cpsw_ale *ale, int port, 118 int control, int value); 119 void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data); 120 121 static inline int cpsw_ale_get_vlan_p0_untag(struct cpsw_ale *ale, u16 vid) 122 { 123 return test_bit(vid, ale->p0_untag_vid_mask); 124 } 125 126 int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, 127 int untag_mask, int reg_mcast, int unreg_mcast); 128 void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, 129 bool add); 130 131 #endif 132