1df828598SMugunthan V N /* 2df828598SMugunthan V N * Texas Instruments Ethernet Switch Driver 3df828598SMugunthan V N * 4df828598SMugunthan V N * Copyright (C) 2012 Texas Instruments 5df828598SMugunthan V N * 6df828598SMugunthan V N * This program is free software; you can redistribute it and/or 7df828598SMugunthan V N * modify it under the terms of the GNU General Public License as 8df828598SMugunthan V N * published by the Free Software Foundation version 2. 9df828598SMugunthan V N * 10df828598SMugunthan V N * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11df828598SMugunthan V N * kind, whether express or implied; without even the implied warranty 12df828598SMugunthan V N * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13df828598SMugunthan V N * GNU General Public License for more details. 14df828598SMugunthan V N */ 15df828598SMugunthan V N 16df828598SMugunthan V N #include <linux/kernel.h> 17df828598SMugunthan V N #include <linux/io.h> 18df828598SMugunthan V N #include <linux/clk.h> 19df828598SMugunthan V N #include <linux/timer.h> 20df828598SMugunthan V N #include <linux/module.h> 21df828598SMugunthan V N #include <linux/platform_device.h> 22df828598SMugunthan V N #include <linux/irqreturn.h> 23df828598SMugunthan V N #include <linux/interrupt.h> 24df828598SMugunthan V N #include <linux/if_ether.h> 25df828598SMugunthan V N #include <linux/etherdevice.h> 26df828598SMugunthan V N #include <linux/netdevice.h> 272e5b38abSRichard Cochran #include <linux/net_tstamp.h> 28df828598SMugunthan V N #include <linux/phy.h> 29df828598SMugunthan V N #include <linux/workqueue.h> 30df828598SMugunthan V N #include <linux/delay.h> 31f150bd7fSMugunthan V N #include <linux/pm_runtime.h> 321d147ccbSMugunthan V N #include <linux/gpio.h> 332eb32b0aSMugunthan V N #include <linux/of.h> 349e42f715SHeiko Schocher #include <linux/of_mdio.h> 352eb32b0aSMugunthan V N #include <linux/of_net.h> 362eb32b0aSMugunthan V N #include <linux/of_device.h> 373b72c2feSMugunthan V N #include <linux/if_vlan.h> 38df828598SMugunthan V N 39739683b4SMugunthan V N #include <linux/pinctrl/consumer.h> 40df828598SMugunthan V N 41dbe34724SMugunthan V N #include "cpsw.h" 42df828598SMugunthan V N #include "cpsw_ale.h" 432e5b38abSRichard Cochran #include "cpts.h" 44df828598SMugunthan V N #include "davinci_cpdma.h" 45df828598SMugunthan V N 46df828598SMugunthan V N #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 47df828598SMugunthan V N NETIF_MSG_DRV | NETIF_MSG_LINK | \ 48df828598SMugunthan V N NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 49df828598SMugunthan V N NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 50df828598SMugunthan V N NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 51df828598SMugunthan V N NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 52df828598SMugunthan V N NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 53df828598SMugunthan V N NETIF_MSG_RX_STATUS) 54df828598SMugunthan V N 55df828598SMugunthan V N #define cpsw_info(priv, type, format, ...) \ 56df828598SMugunthan V N do { \ 57df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 58df828598SMugunthan V N dev_info(priv->dev, format, ## __VA_ARGS__); \ 59df828598SMugunthan V N } while (0) 60df828598SMugunthan V N 61df828598SMugunthan V N #define cpsw_err(priv, type, format, ...) \ 62df828598SMugunthan V N do { \ 63df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 64df828598SMugunthan V N dev_err(priv->dev, format, ## __VA_ARGS__); \ 65df828598SMugunthan V N } while (0) 66df828598SMugunthan V N 67df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...) \ 68df828598SMugunthan V N do { \ 69df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 70df828598SMugunthan V N dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 71df828598SMugunthan V N } while (0) 72df828598SMugunthan V N 73df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...) \ 74df828598SMugunthan V N do { \ 75df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 76df828598SMugunthan V N dev_notice(priv->dev, format, ## __VA_ARGS__); \ 77df828598SMugunthan V N } while (0) 78df828598SMugunthan V N 795c50a856SMugunthan V N #define ALE_ALL_PORTS 0x7 805c50a856SMugunthan V N 81df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 82df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 83df828598SMugunthan V N #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 84df828598SMugunthan V N 85e90cfac6SRichard Cochran #define CPSW_VERSION_1 0x19010a 86e90cfac6SRichard Cochran #define CPSW_VERSION_2 0x19010c 87c193f365SMugunthan V N #define CPSW_VERSION_3 0x19010f 88926489beSMugunthan V N #define CPSW_VERSION_4 0x190112 89549985eeSRichard Cochran 90549985eeSRichard Cochran #define HOST_PORT_NUM 0 91549985eeSRichard Cochran #define SLIVER_SIZE 0x40 92549985eeSRichard Cochran 93549985eeSRichard Cochran #define CPSW1_HOST_PORT_OFFSET 0x028 94549985eeSRichard Cochran #define CPSW1_SLAVE_OFFSET 0x050 95549985eeSRichard Cochran #define CPSW1_SLAVE_SIZE 0x040 96549985eeSRichard Cochran #define CPSW1_CPDMA_OFFSET 0x100 97549985eeSRichard Cochran #define CPSW1_STATERAM_OFFSET 0x200 98d9718546SMugunthan V N #define CPSW1_HW_STATS 0x400 99549985eeSRichard Cochran #define CPSW1_CPTS_OFFSET 0x500 100549985eeSRichard Cochran #define CPSW1_ALE_OFFSET 0x600 101549985eeSRichard Cochran #define CPSW1_SLIVER_OFFSET 0x700 102549985eeSRichard Cochran 103549985eeSRichard Cochran #define CPSW2_HOST_PORT_OFFSET 0x108 104549985eeSRichard Cochran #define CPSW2_SLAVE_OFFSET 0x200 105549985eeSRichard Cochran #define CPSW2_SLAVE_SIZE 0x100 106549985eeSRichard Cochran #define CPSW2_CPDMA_OFFSET 0x800 107d9718546SMugunthan V N #define CPSW2_HW_STATS 0x900 108549985eeSRichard Cochran #define CPSW2_STATERAM_OFFSET 0xa00 109549985eeSRichard Cochran #define CPSW2_CPTS_OFFSET 0xc00 110549985eeSRichard Cochran #define CPSW2_ALE_OFFSET 0xd00 111549985eeSRichard Cochran #define CPSW2_SLIVER_OFFSET 0xd80 112549985eeSRichard Cochran #define CPSW2_BD_OFFSET 0x2000 113549985eeSRichard Cochran 114df828598SMugunthan V N #define CPDMA_RXTHRESH 0x0c0 115df828598SMugunthan V N #define CPDMA_RXFREE 0x0e0 116df828598SMugunthan V N #define CPDMA_TXHDP 0x00 117df828598SMugunthan V N #define CPDMA_RXHDP 0x20 118df828598SMugunthan V N #define CPDMA_TXCP 0x40 119df828598SMugunthan V N #define CPDMA_RXCP 0x60 120df828598SMugunthan V N 121df828598SMugunthan V N #define CPSW_POLL_WEIGHT 64 122df828598SMugunthan V N #define CPSW_MIN_PACKET_SIZE 60 123df828598SMugunthan V N #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4) 124df828598SMugunthan V N 125df828598SMugunthan V N #define RX_PRIORITY_MAPPING 0x76543210 126df828598SMugunthan V N #define TX_PRIORITY_MAPPING 0x33221100 127e05107e6SIvan Khoronzhuk #define CPDMA_TX_PRIORITY_MAP 0x01234567 128df828598SMugunthan V N 1293b72c2feSMugunthan V N #define CPSW_VLAN_AWARE BIT(1) 1303b72c2feSMugunthan V N #define CPSW_ALE_VLAN_AWARE 1 1313b72c2feSMugunthan V N 13235717d8dSJohn Ogness #define CPSW_FIFO_NORMAL_MODE (0 << 16) 13335717d8dSJohn Ogness #define CPSW_FIFO_DUAL_MAC_MODE (1 << 16) 13435717d8dSJohn Ogness #define CPSW_FIFO_RATE_LIMIT_MODE (2 << 16) 135d9ba8f9eSMugunthan V N 136ff5b8ef2SMugunthan V N #define CPSW_INTPACEEN (0x3f << 16) 137ff5b8ef2SMugunthan V N #define CPSW_INTPRESCALE_MASK (0x7FF << 0) 138ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_CNT 63 139ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_CNT 2 140ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_INTVL (1000 / CPSW_CMINTMIN_CNT) 141ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_INTVL ((1000 / CPSW_CMINTMAX_CNT) + 1) 142ff5b8ef2SMugunthan V N 143606f3993SIvan Khoronzhuk #define cpsw_slave_index(cpsw, priv) \ 144606f3993SIvan Khoronzhuk ((cpsw->data.dual_emac) ? priv->emac_port : \ 145606f3993SIvan Khoronzhuk cpsw->data.active_slave) 146e38b5a3dSIvan Khoronzhuk #define IRQ_NUM 2 147e05107e6SIvan Khoronzhuk #define CPSW_MAX_QUEUES 8 14890225bf0SGrygorii Strashko #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 149d3bb9c58SMugunthan V N 150df828598SMugunthan V N static int debug_level; 151df828598SMugunthan V N module_param(debug_level, int, 0); 152df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 153df828598SMugunthan V N 154df828598SMugunthan V N static int ale_ageout = 10; 155df828598SMugunthan V N module_param(ale_ageout, int, 0); 156df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 157df828598SMugunthan V N 158df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 159df828598SMugunthan V N module_param(rx_packet_max, int, 0); 160df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 161df828598SMugunthan V N 16290225bf0SGrygorii Strashko static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT; 16390225bf0SGrygorii Strashko module_param(descs_pool_size, int, 0444); 16490225bf0SGrygorii Strashko MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool"); 16590225bf0SGrygorii Strashko 166996a5c27SRichard Cochran struct cpsw_wr_regs { 167df828598SMugunthan V N u32 id_ver; 168df828598SMugunthan V N u32 soft_reset; 169df828598SMugunthan V N u32 control; 170df828598SMugunthan V N u32 int_control; 171df828598SMugunthan V N u32 rx_thresh_en; 172df828598SMugunthan V N u32 rx_en; 173df828598SMugunthan V N u32 tx_en; 174df828598SMugunthan V N u32 misc_en; 175ff5b8ef2SMugunthan V N u32 mem_allign1[8]; 176ff5b8ef2SMugunthan V N u32 rx_thresh_stat; 177ff5b8ef2SMugunthan V N u32 rx_stat; 178ff5b8ef2SMugunthan V N u32 tx_stat; 179ff5b8ef2SMugunthan V N u32 misc_stat; 180ff5b8ef2SMugunthan V N u32 mem_allign2[8]; 181ff5b8ef2SMugunthan V N u32 rx_imax; 182ff5b8ef2SMugunthan V N u32 tx_imax; 183ff5b8ef2SMugunthan V N 184df828598SMugunthan V N }; 185df828598SMugunthan V N 186996a5c27SRichard Cochran struct cpsw_ss_regs { 187df828598SMugunthan V N u32 id_ver; 188df828598SMugunthan V N u32 control; 189df828598SMugunthan V N u32 soft_reset; 190df828598SMugunthan V N u32 stat_port_en; 191df828598SMugunthan V N u32 ptype; 192bd357af2SRichard Cochran u32 soft_idle; 193bd357af2SRichard Cochran u32 thru_rate; 194bd357af2SRichard Cochran u32 gap_thresh; 195bd357af2SRichard Cochran u32 tx_start_wds; 196bd357af2SRichard Cochran u32 flow_control; 197bd357af2SRichard Cochran u32 vlan_ltype; 198bd357af2SRichard Cochran u32 ts_ltype; 199bd357af2SRichard Cochran u32 dlr_ltype; 200df828598SMugunthan V N }; 201df828598SMugunthan V N 2029750a3adSRichard Cochran /* CPSW_PORT_V1 */ 2039750a3adSRichard Cochran #define CPSW1_MAX_BLKS 0x00 /* Maximum FIFO Blocks */ 2049750a3adSRichard Cochran #define CPSW1_BLK_CNT 0x04 /* FIFO Block Usage Count (Read Only) */ 2059750a3adSRichard Cochran #define CPSW1_TX_IN_CTL 0x08 /* Transmit FIFO Control */ 2069750a3adSRichard Cochran #define CPSW1_PORT_VLAN 0x0c /* VLAN Register */ 2079750a3adSRichard Cochran #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 2089750a3adSRichard Cochran #define CPSW1_TS_CTL 0x14 /* Time Sync Control */ 2099750a3adSRichard Cochran #define CPSW1_TS_SEQ_LTYPE 0x18 /* Time Sync Sequence ID Offset and Msg Type */ 2109750a3adSRichard Cochran #define CPSW1_TS_VLAN 0x1c /* Time Sync VLAN1 and VLAN2 */ 2119750a3adSRichard Cochran 2129750a3adSRichard Cochran /* CPSW_PORT_V2 */ 2139750a3adSRichard Cochran #define CPSW2_CONTROL 0x00 /* Control Register */ 2149750a3adSRichard Cochran #define CPSW2_MAX_BLKS 0x08 /* Maximum FIFO Blocks */ 2159750a3adSRichard Cochran #define CPSW2_BLK_CNT 0x0c /* FIFO Block Usage Count (Read Only) */ 2169750a3adSRichard Cochran #define CPSW2_TX_IN_CTL 0x10 /* Transmit FIFO Control */ 2179750a3adSRichard Cochran #define CPSW2_PORT_VLAN 0x14 /* VLAN Register */ 2189750a3adSRichard Cochran #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 2199750a3adSRichard Cochran #define CPSW2_TS_SEQ_MTYPE 0x1c /* Time Sync Sequence ID Offset and Msg Type */ 2209750a3adSRichard Cochran 2219750a3adSRichard Cochran /* CPSW_PORT_V1 and V2 */ 2229750a3adSRichard Cochran #define SA_LO 0x20 /* CPGMAC_SL Source Address Low */ 2239750a3adSRichard Cochran #define SA_HI 0x24 /* CPGMAC_SL Source Address High */ 2249750a3adSRichard Cochran #define SEND_PERCENT 0x28 /* Transmit Queue Send Percentages */ 2259750a3adSRichard Cochran 2269750a3adSRichard Cochran /* CPSW_PORT_V2 only */ 2279750a3adSRichard Cochran #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */ 2289750a3adSRichard Cochran #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */ 2299750a3adSRichard Cochran #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */ 2309750a3adSRichard Cochran #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */ 2319750a3adSRichard Cochran #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */ 2329750a3adSRichard Cochran #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */ 2339750a3adSRichard Cochran #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */ 2349750a3adSRichard Cochran #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */ 2359750a3adSRichard Cochran 2369750a3adSRichard Cochran /* Bit definitions for the CPSW2_CONTROL register */ 2379750a3adSRichard Cochran #define PASS_PRI_TAGGED (1<<24) /* Pass Priority Tagged */ 2389750a3adSRichard Cochran #define VLAN_LTYPE2_EN (1<<21) /* VLAN LTYPE 2 enable */ 2399750a3adSRichard Cochran #define VLAN_LTYPE1_EN (1<<20) /* VLAN LTYPE 1 enable */ 2409750a3adSRichard Cochran #define DSCP_PRI_EN (1<<16) /* DSCP Priority Enable */ 2419750a3adSRichard Cochran #define TS_320 (1<<14) /* Time Sync Dest Port 320 enable */ 2429750a3adSRichard Cochran #define TS_319 (1<<13) /* Time Sync Dest Port 319 enable */ 2439750a3adSRichard Cochran #define TS_132 (1<<12) /* Time Sync Dest IP Addr 132 enable */ 2449750a3adSRichard Cochran #define TS_131 (1<<11) /* Time Sync Dest IP Addr 131 enable */ 2459750a3adSRichard Cochran #define TS_130 (1<<10) /* Time Sync Dest IP Addr 130 enable */ 2469750a3adSRichard Cochran #define TS_129 (1<<9) /* Time Sync Dest IP Addr 129 enable */ 24709c55372SGeorge Cherian #define TS_TTL_NONZERO (1<<8) /* Time Sync Time To Live Non-zero enable */ 24809c55372SGeorge Cherian #define TS_ANNEX_F_EN (1<<6) /* Time Sync Annex F enable */ 2499750a3adSRichard Cochran #define TS_ANNEX_D_EN (1<<4) /* Time Sync Annex D enable */ 2509750a3adSRichard Cochran #define TS_LTYPE2_EN (1<<3) /* Time Sync LTYPE 2 enable */ 2519750a3adSRichard Cochran #define TS_LTYPE1_EN (1<<2) /* Time Sync LTYPE 1 enable */ 2529750a3adSRichard Cochran #define TS_TX_EN (1<<1) /* Time Sync Transmit Enable */ 2539750a3adSRichard Cochran #define TS_RX_EN (1<<0) /* Time Sync Receive Enable */ 2549750a3adSRichard Cochran 25509c55372SGeorge Cherian #define CTRL_V2_TS_BITS \ 25609c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 25709c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_D_EN | TS_LTYPE1_EN) 2589750a3adSRichard Cochran 25909c55372SGeorge Cherian #define CTRL_V2_ALL_TS_MASK (CTRL_V2_TS_BITS | TS_TX_EN | TS_RX_EN) 26009c55372SGeorge Cherian #define CTRL_V2_TX_TS_BITS (CTRL_V2_TS_BITS | TS_TX_EN) 26109c55372SGeorge Cherian #define CTRL_V2_RX_TS_BITS (CTRL_V2_TS_BITS | TS_RX_EN) 26209c55372SGeorge Cherian 26309c55372SGeorge Cherian 26409c55372SGeorge Cherian #define CTRL_V3_TS_BITS \ 26509c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 26609c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\ 26709c55372SGeorge Cherian TS_LTYPE1_EN) 26809c55372SGeorge Cherian 26909c55372SGeorge Cherian #define CTRL_V3_ALL_TS_MASK (CTRL_V3_TS_BITS | TS_TX_EN | TS_RX_EN) 27009c55372SGeorge Cherian #define CTRL_V3_TX_TS_BITS (CTRL_V3_TS_BITS | TS_TX_EN) 27109c55372SGeorge Cherian #define CTRL_V3_RX_TS_BITS (CTRL_V3_TS_BITS | TS_RX_EN) 2729750a3adSRichard Cochran 2739750a3adSRichard Cochran /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */ 2749750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_SHIFT (16) /* Time Sync Sequence ID Offset */ 2759750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_MASK (0x3f) 2769750a3adSRichard Cochran #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */ 2779750a3adSRichard Cochran #define TS_MSG_TYPE_EN_MASK (0xffff) 2789750a3adSRichard Cochran 2799750a3adSRichard Cochran /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 2809750a3adSRichard Cochran #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3)) 281df828598SMugunthan V N 2822e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_CTL register */ 2832e5b38abSRichard Cochran #define CPSW_V1_TS_RX_EN BIT(0) 2842e5b38abSRichard Cochran #define CPSW_V1_TS_TX_EN BIT(4) 2852e5b38abSRichard Cochran #define CPSW_V1_MSG_TYPE_OFS 16 2862e5b38abSRichard Cochran 2872e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */ 2882e5b38abSRichard Cochran #define CPSW_V1_SEQ_ID_OFS_SHIFT 16 2892e5b38abSRichard Cochran 290df828598SMugunthan V N struct cpsw_host_regs { 291df828598SMugunthan V N u32 max_blks; 292df828598SMugunthan V N u32 blk_cnt; 293d9ba8f9eSMugunthan V N u32 tx_in_ctl; 294df828598SMugunthan V N u32 port_vlan; 295df828598SMugunthan V N u32 tx_pri_map; 296df828598SMugunthan V N u32 cpdma_tx_pri_map; 297df828598SMugunthan V N u32 cpdma_rx_chan_map; 298df828598SMugunthan V N }; 299df828598SMugunthan V N 300df828598SMugunthan V N struct cpsw_sliver_regs { 301df828598SMugunthan V N u32 id_ver; 302df828598SMugunthan V N u32 mac_control; 303df828598SMugunthan V N u32 mac_status; 304df828598SMugunthan V N u32 soft_reset; 305df828598SMugunthan V N u32 rx_maxlen; 306df828598SMugunthan V N u32 __reserved_0; 307df828598SMugunthan V N u32 rx_pause; 308df828598SMugunthan V N u32 tx_pause; 309df828598SMugunthan V N u32 __reserved_1; 310df828598SMugunthan V N u32 rx_pri_map; 311df828598SMugunthan V N }; 312df828598SMugunthan V N 313d9718546SMugunthan V N struct cpsw_hw_stats { 314d9718546SMugunthan V N u32 rxgoodframes; 315d9718546SMugunthan V N u32 rxbroadcastframes; 316d9718546SMugunthan V N u32 rxmulticastframes; 317d9718546SMugunthan V N u32 rxpauseframes; 318d9718546SMugunthan V N u32 rxcrcerrors; 319d9718546SMugunthan V N u32 rxaligncodeerrors; 320d9718546SMugunthan V N u32 rxoversizedframes; 321d9718546SMugunthan V N u32 rxjabberframes; 322d9718546SMugunthan V N u32 rxundersizedframes; 323d9718546SMugunthan V N u32 rxfragments; 324d9718546SMugunthan V N u32 __pad_0[2]; 325d9718546SMugunthan V N u32 rxoctets; 326d9718546SMugunthan V N u32 txgoodframes; 327d9718546SMugunthan V N u32 txbroadcastframes; 328d9718546SMugunthan V N u32 txmulticastframes; 329d9718546SMugunthan V N u32 txpauseframes; 330d9718546SMugunthan V N u32 txdeferredframes; 331d9718546SMugunthan V N u32 txcollisionframes; 332d9718546SMugunthan V N u32 txsinglecollframes; 333d9718546SMugunthan V N u32 txmultcollframes; 334d9718546SMugunthan V N u32 txexcessivecollisions; 335d9718546SMugunthan V N u32 txlatecollisions; 336d9718546SMugunthan V N u32 txunderrun; 337d9718546SMugunthan V N u32 txcarriersenseerrors; 338d9718546SMugunthan V N u32 txoctets; 339d9718546SMugunthan V N u32 octetframes64; 340d9718546SMugunthan V N u32 octetframes65t127; 341d9718546SMugunthan V N u32 octetframes128t255; 342d9718546SMugunthan V N u32 octetframes256t511; 343d9718546SMugunthan V N u32 octetframes512t1023; 344d9718546SMugunthan V N u32 octetframes1024tup; 345d9718546SMugunthan V N u32 netoctets; 346d9718546SMugunthan V N u32 rxsofoverruns; 347d9718546SMugunthan V N u32 rxmofoverruns; 348d9718546SMugunthan V N u32 rxdmaoverruns; 349d9718546SMugunthan V N }; 350d9718546SMugunthan V N 351df828598SMugunthan V N struct cpsw_slave { 3529750a3adSRichard Cochran void __iomem *regs; 353df828598SMugunthan V N struct cpsw_sliver_regs __iomem *sliver; 354df828598SMugunthan V N int slave_num; 355df828598SMugunthan V N u32 mac_control; 356df828598SMugunthan V N struct cpsw_slave_data *data; 357df828598SMugunthan V N struct phy_device *phy; 358d9ba8f9eSMugunthan V N struct net_device *ndev; 359d9ba8f9eSMugunthan V N u32 port_vlan; 360d9ba8f9eSMugunthan V N u32 open_stat; 361df828598SMugunthan V N }; 362df828598SMugunthan V N 3639750a3adSRichard Cochran static inline u32 slave_read(struct cpsw_slave *slave, u32 offset) 3649750a3adSRichard Cochran { 3659750a3adSRichard Cochran return __raw_readl(slave->regs + offset); 3669750a3adSRichard Cochran } 3679750a3adSRichard Cochran 3689750a3adSRichard Cochran static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset) 3699750a3adSRichard Cochran { 3709750a3adSRichard Cochran __raw_writel(val, slave->regs + offset); 3719750a3adSRichard Cochran } 3729750a3adSRichard Cochran 3738feb0a19SIvan Khoronzhuk struct cpsw_vector { 3748feb0a19SIvan Khoronzhuk struct cpdma_chan *ch; 3758feb0a19SIvan Khoronzhuk int budget; 3768feb0a19SIvan Khoronzhuk }; 3778feb0a19SIvan Khoronzhuk 378649a1688SIvan Khoronzhuk struct cpsw_common { 37956e31bd8SIvan Khoronzhuk struct device *dev; 380606f3993SIvan Khoronzhuk struct cpsw_platform_data data; 381dbc4ec52SIvan Khoronzhuk struct napi_struct napi_rx; 382dbc4ec52SIvan Khoronzhuk struct napi_struct napi_tx; 3835d8d0d4dSIvan Khoronzhuk struct cpsw_ss_regs __iomem *regs; 3845d8d0d4dSIvan Khoronzhuk struct cpsw_wr_regs __iomem *wr_regs; 3855d8d0d4dSIvan Khoronzhuk u8 __iomem *hw_stats; 3865d8d0d4dSIvan Khoronzhuk struct cpsw_host_regs __iomem *host_port_regs; 3872a05a622SIvan Khoronzhuk u32 version; 3882a05a622SIvan Khoronzhuk u32 coal_intvl; 3892a05a622SIvan Khoronzhuk u32 bus_freq_mhz; 3902a05a622SIvan Khoronzhuk int rx_packet_max; 391606f3993SIvan Khoronzhuk struct cpsw_slave *slaves; 3922c836bd9SIvan Khoronzhuk struct cpdma_ctlr *dma; 3938feb0a19SIvan Khoronzhuk struct cpsw_vector txv[CPSW_MAX_QUEUES]; 3948feb0a19SIvan Khoronzhuk struct cpsw_vector rxv[CPSW_MAX_QUEUES]; 3952a05a622SIvan Khoronzhuk struct cpsw_ale *ale; 396e38b5a3dSIvan Khoronzhuk bool quirk_irq; 397e38b5a3dSIvan Khoronzhuk bool rx_irq_disabled; 398e38b5a3dSIvan Khoronzhuk bool tx_irq_disabled; 399e38b5a3dSIvan Khoronzhuk u32 irqs_table[IRQ_NUM]; 4002a05a622SIvan Khoronzhuk struct cpts *cpts; 401e05107e6SIvan Khoronzhuk int rx_ch_num, tx_ch_num; 4020be01b8eSIvan Khoronzhuk int speed; 403649a1688SIvan Khoronzhuk }; 404649a1688SIvan Khoronzhuk 405649a1688SIvan Khoronzhuk struct cpsw_priv { 406df828598SMugunthan V N struct net_device *ndev; 407df828598SMugunthan V N struct device *dev; 408df828598SMugunthan V N u32 msg_enable; 409df828598SMugunthan V N u8 mac_addr[ETH_ALEN]; 4101923d6e4SMugunthan V N bool rx_pause; 4111923d6e4SMugunthan V N bool tx_pause; 412d9ba8f9eSMugunthan V N u32 emac_port; 413649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 414df828598SMugunthan V N }; 415df828598SMugunthan V N 416d9718546SMugunthan V N struct cpsw_stats { 417d9718546SMugunthan V N char stat_string[ETH_GSTRING_LEN]; 418d9718546SMugunthan V N int type; 419d9718546SMugunthan V N int sizeof_stat; 420d9718546SMugunthan V N int stat_offset; 421d9718546SMugunthan V N }; 422d9718546SMugunthan V N 423d9718546SMugunthan V N enum { 424d9718546SMugunthan V N CPSW_STATS, 425d9718546SMugunthan V N CPDMA_RX_STATS, 426d9718546SMugunthan V N CPDMA_TX_STATS, 427d9718546SMugunthan V N }; 428d9718546SMugunthan V N 429d9718546SMugunthan V N #define CPSW_STAT(m) CPSW_STATS, \ 430d9718546SMugunthan V N sizeof(((struct cpsw_hw_stats *)0)->m), \ 431d9718546SMugunthan V N offsetof(struct cpsw_hw_stats, m) 432d9718546SMugunthan V N #define CPDMA_RX_STAT(m) CPDMA_RX_STATS, \ 433d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 434d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 435d9718546SMugunthan V N #define CPDMA_TX_STAT(m) CPDMA_TX_STATS, \ 436d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 437d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 438d9718546SMugunthan V N 439d9718546SMugunthan V N static const struct cpsw_stats cpsw_gstrings_stats[] = { 440d9718546SMugunthan V N { "Good Rx Frames", CPSW_STAT(rxgoodframes) }, 441d9718546SMugunthan V N { "Broadcast Rx Frames", CPSW_STAT(rxbroadcastframes) }, 442d9718546SMugunthan V N { "Multicast Rx Frames", CPSW_STAT(rxmulticastframes) }, 443d9718546SMugunthan V N { "Pause Rx Frames", CPSW_STAT(rxpauseframes) }, 444d9718546SMugunthan V N { "Rx CRC Errors", CPSW_STAT(rxcrcerrors) }, 445d9718546SMugunthan V N { "Rx Align/Code Errors", CPSW_STAT(rxaligncodeerrors) }, 446d9718546SMugunthan V N { "Oversize Rx Frames", CPSW_STAT(rxoversizedframes) }, 447d9718546SMugunthan V N { "Rx Jabbers", CPSW_STAT(rxjabberframes) }, 448d9718546SMugunthan V N { "Undersize (Short) Rx Frames", CPSW_STAT(rxundersizedframes) }, 449d9718546SMugunthan V N { "Rx Fragments", CPSW_STAT(rxfragments) }, 450d9718546SMugunthan V N { "Rx Octets", CPSW_STAT(rxoctets) }, 451d9718546SMugunthan V N { "Good Tx Frames", CPSW_STAT(txgoodframes) }, 452d9718546SMugunthan V N { "Broadcast Tx Frames", CPSW_STAT(txbroadcastframes) }, 453d9718546SMugunthan V N { "Multicast Tx Frames", CPSW_STAT(txmulticastframes) }, 454d9718546SMugunthan V N { "Pause Tx Frames", CPSW_STAT(txpauseframes) }, 455d9718546SMugunthan V N { "Deferred Tx Frames", CPSW_STAT(txdeferredframes) }, 456d9718546SMugunthan V N { "Collisions", CPSW_STAT(txcollisionframes) }, 457d9718546SMugunthan V N { "Single Collision Tx Frames", CPSW_STAT(txsinglecollframes) }, 458d9718546SMugunthan V N { "Multiple Collision Tx Frames", CPSW_STAT(txmultcollframes) }, 459d9718546SMugunthan V N { "Excessive Collisions", CPSW_STAT(txexcessivecollisions) }, 460d9718546SMugunthan V N { "Late Collisions", CPSW_STAT(txlatecollisions) }, 461d9718546SMugunthan V N { "Tx Underrun", CPSW_STAT(txunderrun) }, 462d9718546SMugunthan V N { "Carrier Sense Errors", CPSW_STAT(txcarriersenseerrors) }, 463d9718546SMugunthan V N { "Tx Octets", CPSW_STAT(txoctets) }, 464d9718546SMugunthan V N { "Rx + Tx 64 Octet Frames", CPSW_STAT(octetframes64) }, 465d9718546SMugunthan V N { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) }, 466d9718546SMugunthan V N { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) }, 467d9718546SMugunthan V N { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) }, 468d9718546SMugunthan V N { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) }, 469d9718546SMugunthan V N { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) }, 470d9718546SMugunthan V N { "Net Octets", CPSW_STAT(netoctets) }, 471d9718546SMugunthan V N { "Rx Start of Frame Overruns", CPSW_STAT(rxsofoverruns) }, 472d9718546SMugunthan V N { "Rx Middle of Frame Overruns", CPSW_STAT(rxmofoverruns) }, 473d9718546SMugunthan V N { "Rx DMA Overruns", CPSW_STAT(rxdmaoverruns) }, 474d9718546SMugunthan V N }; 475d9718546SMugunthan V N 476e05107e6SIvan Khoronzhuk static const struct cpsw_stats cpsw_gstrings_ch_stats[] = { 477e05107e6SIvan Khoronzhuk { "head_enqueue", CPDMA_RX_STAT(head_enqueue) }, 478e05107e6SIvan Khoronzhuk { "tail_enqueue", CPDMA_RX_STAT(tail_enqueue) }, 479e05107e6SIvan Khoronzhuk { "pad_enqueue", CPDMA_RX_STAT(pad_enqueue) }, 480e05107e6SIvan Khoronzhuk { "misqueued", CPDMA_RX_STAT(misqueued) }, 481e05107e6SIvan Khoronzhuk { "desc_alloc_fail", CPDMA_RX_STAT(desc_alloc_fail) }, 482e05107e6SIvan Khoronzhuk { "pad_alloc_fail", CPDMA_RX_STAT(pad_alloc_fail) }, 483e05107e6SIvan Khoronzhuk { "runt_receive_buf", CPDMA_RX_STAT(runt_receive_buff) }, 484e05107e6SIvan Khoronzhuk { "runt_transmit_buf", CPDMA_RX_STAT(runt_transmit_buff) }, 485e05107e6SIvan Khoronzhuk { "empty_dequeue", CPDMA_RX_STAT(empty_dequeue) }, 486e05107e6SIvan Khoronzhuk { "busy_dequeue", CPDMA_RX_STAT(busy_dequeue) }, 487e05107e6SIvan Khoronzhuk { "good_dequeue", CPDMA_RX_STAT(good_dequeue) }, 488e05107e6SIvan Khoronzhuk { "requeue", CPDMA_RX_STAT(requeue) }, 489e05107e6SIvan Khoronzhuk { "teardown_dequeue", CPDMA_RX_STAT(teardown_dequeue) }, 490e05107e6SIvan Khoronzhuk }; 491e05107e6SIvan Khoronzhuk 492e05107e6SIvan Khoronzhuk #define CPSW_STATS_COMMON_LEN ARRAY_SIZE(cpsw_gstrings_stats) 493e05107e6SIvan Khoronzhuk #define CPSW_STATS_CH_LEN ARRAY_SIZE(cpsw_gstrings_ch_stats) 494d9718546SMugunthan V N 495649a1688SIvan Khoronzhuk #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw) 496dbc4ec52SIvan Khoronzhuk #define napi_to_cpsw(napi) container_of(napi, struct cpsw_common, napi) 497df828598SMugunthan V N #define for_each_slave(priv, func, arg...) \ 498df828598SMugunthan V N do { \ 4996e6ceaedSSebastian Siewior struct cpsw_slave *slave; \ 500606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = (priv)->cpsw; \ 5016e6ceaedSSebastian Siewior int n; \ 502606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) \ 503606f3993SIvan Khoronzhuk (func)((cpsw)->slaves + priv->emac_port, ##arg);\ 504d9ba8f9eSMugunthan V N else \ 505606f3993SIvan Khoronzhuk for (n = cpsw->data.slaves, \ 506606f3993SIvan Khoronzhuk slave = cpsw->slaves; \ 5076e6ceaedSSebastian Siewior n; n--) \ 5086e6ceaedSSebastian Siewior (func)(slave++, ##arg); \ 509df828598SMugunthan V N } while (0) 510d9ba8f9eSMugunthan V N 5112a05a622SIvan Khoronzhuk #define cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb) \ 512d9ba8f9eSMugunthan V N do { \ 513606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) \ 514d9ba8f9eSMugunthan V N break; \ 515d9ba8f9eSMugunthan V N if (CPDMA_RX_SOURCE_PORT(status) == 1) { \ 516606f3993SIvan Khoronzhuk ndev = cpsw->slaves[0].ndev; \ 517d9ba8f9eSMugunthan V N skb->dev = ndev; \ 518d9ba8f9eSMugunthan V N } else if (CPDMA_RX_SOURCE_PORT(status) == 2) { \ 519606f3993SIvan Khoronzhuk ndev = cpsw->slaves[1].ndev; \ 520d9ba8f9eSMugunthan V N skb->dev = ndev; \ 521d9ba8f9eSMugunthan V N } \ 522d9ba8f9eSMugunthan V N } while (0) 523606f3993SIvan Khoronzhuk #define cpsw_add_mcast(cpsw, priv, addr) \ 524d9ba8f9eSMugunthan V N do { \ 525606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { \ 526606f3993SIvan Khoronzhuk struct cpsw_slave *slave = cpsw->slaves + \ 527d9ba8f9eSMugunthan V N priv->emac_port; \ 5286f1f5836SIvan Khoronzhuk int slave_port = cpsw_get_slave_port( \ 529d9ba8f9eSMugunthan V N slave->slave_num); \ 5302a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 53171a2cbb7SGrygorii Strashko 1 << slave_port | ALE_PORT_HOST, \ 532d9ba8f9eSMugunthan V N ALE_VLAN, slave->port_vlan, 0); \ 533d9ba8f9eSMugunthan V N } else { \ 5342a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 53561f1cef9SGrygorii Strashko ALE_ALL_PORTS, \ 536d9ba8f9eSMugunthan V N 0, 0, 0); \ 537d9ba8f9eSMugunthan V N } \ 538d9ba8f9eSMugunthan V N } while (0) 539d9ba8f9eSMugunthan V N 5406f1f5836SIvan Khoronzhuk static inline int cpsw_get_slave_port(u32 slave_num) 541d9ba8f9eSMugunthan V N { 542d9ba8f9eSMugunthan V N return slave_num + 1; 543d9ba8f9eSMugunthan V N } 544df828598SMugunthan V N 5450cd8f9ccSMugunthan V N static void cpsw_set_promiscious(struct net_device *ndev, bool enable) 5460cd8f9ccSMugunthan V N { 5472a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 5482a05a622SIvan Khoronzhuk struct cpsw_ale *ale = cpsw->ale; 5490cd8f9ccSMugunthan V N int i; 5500cd8f9ccSMugunthan V N 551606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 5520cd8f9ccSMugunthan V N bool flag = false; 5530cd8f9ccSMugunthan V N 5540cd8f9ccSMugunthan V N /* Enabling promiscuous mode for one interface will be 5550cd8f9ccSMugunthan V N * common for both the interface as the interface shares 5560cd8f9ccSMugunthan V N * the same hardware resource. 5570cd8f9ccSMugunthan V N */ 558606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 559606f3993SIvan Khoronzhuk if (cpsw->slaves[i].ndev->flags & IFF_PROMISC) 5600cd8f9ccSMugunthan V N flag = true; 5610cd8f9ccSMugunthan V N 5620cd8f9ccSMugunthan V N if (!enable && flag) { 5630cd8f9ccSMugunthan V N enable = true; 5640cd8f9ccSMugunthan V N dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n"); 5650cd8f9ccSMugunthan V N } 5660cd8f9ccSMugunthan V N 5670cd8f9ccSMugunthan V N if (enable) { 5680cd8f9ccSMugunthan V N /* Enable Bypass */ 5690cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1); 5700cd8f9ccSMugunthan V N 5710cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 5720cd8f9ccSMugunthan V N } else { 5730cd8f9ccSMugunthan V N /* Disable Bypass */ 5740cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0); 5750cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 5760cd8f9ccSMugunthan V N } 5770cd8f9ccSMugunthan V N } else { 5780cd8f9ccSMugunthan V N if (enable) { 5790cd8f9ccSMugunthan V N unsigned long timeout = jiffies + HZ; 5800cd8f9ccSMugunthan V N 5816f979eb3SLennart Sorensen /* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */ 582606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 5830cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 5840cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 1); 5850cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 5860cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 1); 5870cd8f9ccSMugunthan V N } 5880cd8f9ccSMugunthan V N 5890cd8f9ccSMugunthan V N /* Clear All Untouched entries */ 5900cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 5910cd8f9ccSMugunthan V N do { 5920cd8f9ccSMugunthan V N cpu_relax(); 5930cd8f9ccSMugunthan V N if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT)) 5940cd8f9ccSMugunthan V N break; 5950cd8f9ccSMugunthan V N } while (time_after(timeout, jiffies)); 5960cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 5970cd8f9ccSMugunthan V N 5980cd8f9ccSMugunthan V N /* Clear all mcast from ALE */ 59961f1cef9SGrygorii Strashko cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1); 6000cd8f9ccSMugunthan V N 6010cd8f9ccSMugunthan V N /* Flood All Unicast Packets to Host port */ 6020cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1); 6030cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 6040cd8f9ccSMugunthan V N } else { 6056f979eb3SLennart Sorensen /* Don't Flood All Unicast Packets to Host port */ 6060cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0); 6070cd8f9ccSMugunthan V N 6086f979eb3SLennart Sorensen /* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */ 609606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6100cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6110cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 0); 6120cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6130cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 0); 6140cd8f9ccSMugunthan V N } 6150cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6160cd8f9ccSMugunthan V N } 6170cd8f9ccSMugunthan V N } 6180cd8f9ccSMugunthan V N } 6190cd8f9ccSMugunthan V N 6205c50a856SMugunthan V N static void cpsw_ndo_set_rx_mode(struct net_device *ndev) 6215c50a856SMugunthan V N { 6225c50a856SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 623606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 62425906052SMugunthan V N int vid; 62525906052SMugunthan V N 626606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 627606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 62825906052SMugunthan V N else 629606f3993SIvan Khoronzhuk vid = cpsw->data.default_vlan; 6305c50a856SMugunthan V N 6315c50a856SMugunthan V N if (ndev->flags & IFF_PROMISC) { 6325c50a856SMugunthan V N /* Enable promiscuous mode */ 6330cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, true); 6342a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI); 6355c50a856SMugunthan V N return; 6360cd8f9ccSMugunthan V N } else { 6370cd8f9ccSMugunthan V N /* Disable promiscuous mode */ 6380cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, false); 6395c50a856SMugunthan V N } 6405c50a856SMugunthan V N 6411e5c4bc4SLennart Sorensen /* Restore allmulti on vlans if necessary */ 6422a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, priv->ndev->flags & IFF_ALLMULTI); 6431e5c4bc4SLennart Sorensen 6445c50a856SMugunthan V N /* Clear all mcast from ALE */ 6452a05a622SIvan Khoronzhuk cpsw_ale_flush_multicast(cpsw->ale, ALE_ALL_PORTS, vid); 6465c50a856SMugunthan V N 6475c50a856SMugunthan V N if (!netdev_mc_empty(ndev)) { 6485c50a856SMugunthan V N struct netdev_hw_addr *ha; 6495c50a856SMugunthan V N 6505c50a856SMugunthan V N /* program multicast address list into ALE register */ 6515c50a856SMugunthan V N netdev_for_each_mc_addr(ha, ndev) { 652606f3993SIvan Khoronzhuk cpsw_add_mcast(cpsw, priv, (u8 *)ha->addr); 6535c50a856SMugunthan V N } 6545c50a856SMugunthan V N } 6555c50a856SMugunthan V N } 6565c50a856SMugunthan V N 6572c836bd9SIvan Khoronzhuk static void cpsw_intr_enable(struct cpsw_common *cpsw) 658df828598SMugunthan V N { 6595d8d0d4dSIvan Khoronzhuk __raw_writel(0xFF, &cpsw->wr_regs->tx_en); 6605d8d0d4dSIvan Khoronzhuk __raw_writel(0xFF, &cpsw->wr_regs->rx_en); 661df828598SMugunthan V N 6622c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, true); 663df828598SMugunthan V N return; 664df828598SMugunthan V N } 665df828598SMugunthan V N 6662c836bd9SIvan Khoronzhuk static void cpsw_intr_disable(struct cpsw_common *cpsw) 667df828598SMugunthan V N { 6685d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->wr_regs->tx_en); 6695d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->wr_regs->rx_en); 670df828598SMugunthan V N 6712c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, false); 672df828598SMugunthan V N return; 673df828598SMugunthan V N } 674df828598SMugunthan V N 6751a3b5056SOlof Johansson static void cpsw_tx_handler(void *token, int len, int status) 676df828598SMugunthan V N { 677e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 678df828598SMugunthan V N struct sk_buff *skb = token; 679df828598SMugunthan V N struct net_device *ndev = skb->dev; 6802a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 681df828598SMugunthan V N 682fae50823SMugunthan V N /* Check whether the queue is stopped due to stalled tx dma, if the 683fae50823SMugunthan V N * queue is stopped then start the queue as we have free desc for tx 684fae50823SMugunthan V N */ 685e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 686e05107e6SIvan Khoronzhuk if (unlikely(netif_tx_queue_stopped(txq))) 687e05107e6SIvan Khoronzhuk netif_tx_wake_queue(txq); 688e05107e6SIvan Khoronzhuk 6892a05a622SIvan Khoronzhuk cpts_tx_timestamp(cpsw->cpts, skb); 6908dc43ddcSTobias Klauser ndev->stats.tx_packets++; 6918dc43ddcSTobias Klauser ndev->stats.tx_bytes += len; 692df828598SMugunthan V N dev_kfree_skb_any(skb); 693df828598SMugunthan V N } 694df828598SMugunthan V N 6951a3b5056SOlof Johansson static void cpsw_rx_handler(void *token, int len, int status) 696df828598SMugunthan V N { 697e05107e6SIvan Khoronzhuk struct cpdma_chan *ch; 698df828598SMugunthan V N struct sk_buff *skb = token; 699b4727e69SSebastian Siewior struct sk_buff *new_skb; 700df828598SMugunthan V N struct net_device *ndev = skb->dev; 701df828598SMugunthan V N int ret = 0; 7022a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 703df828598SMugunthan V N 7042a05a622SIvan Khoronzhuk cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb); 705d9ba8f9eSMugunthan V N 70616e5c57dSMugunthan V N if (unlikely(status < 0) || unlikely(!netif_running(ndev))) { 707a0e2c822SMugunthan V N bool ndev_status = false; 708606f3993SIvan Khoronzhuk struct cpsw_slave *slave = cpsw->slaves; 709a0e2c822SMugunthan V N int n; 710a0e2c822SMugunthan V N 711606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 712a0e2c822SMugunthan V N /* In dual emac mode check for all interfaces */ 713606f3993SIvan Khoronzhuk for (n = cpsw->data.slaves; n; n--, slave++) 714a0e2c822SMugunthan V N if (netif_running(slave->ndev)) 715a0e2c822SMugunthan V N ndev_status = true; 716a0e2c822SMugunthan V N } 717a0e2c822SMugunthan V N 718a0e2c822SMugunthan V N if (ndev_status && (status >= 0)) { 719a0e2c822SMugunthan V N /* The packet received is for the interface which 720a0e2c822SMugunthan V N * is already down and the other interface is up 721dbedd44eSJoe Perches * and running, instead of freeing which results 722a0e2c822SMugunthan V N * in reducing of the number of rx descriptor in 723a0e2c822SMugunthan V N * DMA engine, requeue skb back to cpdma. 724a0e2c822SMugunthan V N */ 725a0e2c822SMugunthan V N new_skb = skb; 726a0e2c822SMugunthan V N goto requeue; 727a0e2c822SMugunthan V N } 728a0e2c822SMugunthan V N 729b4727e69SSebastian Siewior /* the interface is going down, skbs are purged */ 730df828598SMugunthan V N dev_kfree_skb_any(skb); 731df828598SMugunthan V N return; 732df828598SMugunthan V N } 733b4727e69SSebastian Siewior 7342a05a622SIvan Khoronzhuk new_skb = netdev_alloc_skb_ip_align(ndev, cpsw->rx_packet_max); 735b4727e69SSebastian Siewior if (new_skb) { 736e05107e6SIvan Khoronzhuk skb_copy_queue_mapping(new_skb, skb); 737df828598SMugunthan V N skb_put(skb, len); 7382a05a622SIvan Khoronzhuk cpts_rx_timestamp(cpsw->cpts, skb); 739df828598SMugunthan V N skb->protocol = eth_type_trans(skb, ndev); 740df828598SMugunthan V N netif_receive_skb(skb); 7418dc43ddcSTobias Klauser ndev->stats.rx_bytes += len; 7428dc43ddcSTobias Klauser ndev->stats.rx_packets++; 743254a49d5SGrygorii Strashko kmemleak_not_leak(new_skb); 744b4727e69SSebastian Siewior } else { 7458dc43ddcSTobias Klauser ndev->stats.rx_dropped++; 746b4727e69SSebastian Siewior new_skb = skb; 747df828598SMugunthan V N } 748df828598SMugunthan V N 749a0e2c822SMugunthan V N requeue: 750ce52c744SIvan Khoronzhuk if (netif_dormant(ndev)) { 751ce52c744SIvan Khoronzhuk dev_kfree_skb_any(new_skb); 752ce52c744SIvan Khoronzhuk return; 753ce52c744SIvan Khoronzhuk } 754ce52c744SIvan Khoronzhuk 7558feb0a19SIvan Khoronzhuk ch = cpsw->rxv[skb_get_queue_mapping(new_skb)].ch; 756e05107e6SIvan Khoronzhuk ret = cpdma_chan_submit(ch, new_skb, new_skb->data, 757b4727e69SSebastian Siewior skb_tailroom(new_skb), 0); 758b4727e69SSebastian Siewior if (WARN_ON(ret < 0)) 759b4727e69SSebastian Siewior dev_kfree_skb_any(new_skb); 760df828598SMugunthan V N } 761df828598SMugunthan V N 76232b78d85SIvan Khoronzhuk static void cpsw_split_res(struct net_device *ndev) 76348e0a83eSIvan Khoronzhuk { 76448e0a83eSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 76532b78d85SIvan Khoronzhuk u32 consumed_rate = 0, bigest_rate = 0; 76648e0a83eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 76748e0a83eSIvan Khoronzhuk struct cpsw_vector *txv = cpsw->txv; 76832b78d85SIvan Khoronzhuk int i, ch_weight, rlim_ch_num = 0; 76948e0a83eSIvan Khoronzhuk int budget, bigest_rate_ch = 0; 77048e0a83eSIvan Khoronzhuk u32 ch_rate, max_rate; 77148e0a83eSIvan Khoronzhuk int ch_budget = 0; 77248e0a83eSIvan Khoronzhuk 77348e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 77448e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 77548e0a83eSIvan Khoronzhuk if (!ch_rate) 77648e0a83eSIvan Khoronzhuk continue; 77748e0a83eSIvan Khoronzhuk 77848e0a83eSIvan Khoronzhuk rlim_ch_num++; 77948e0a83eSIvan Khoronzhuk consumed_rate += ch_rate; 78048e0a83eSIvan Khoronzhuk } 78148e0a83eSIvan Khoronzhuk 78248e0a83eSIvan Khoronzhuk if (cpsw->tx_ch_num == rlim_ch_num) { 78348e0a83eSIvan Khoronzhuk max_rate = consumed_rate; 78432b78d85SIvan Khoronzhuk } else if (!rlim_ch_num) { 78532b78d85SIvan Khoronzhuk ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num; 78632b78d85SIvan Khoronzhuk bigest_rate = 0; 78732b78d85SIvan Khoronzhuk max_rate = consumed_rate; 78848e0a83eSIvan Khoronzhuk } else { 7890be01b8eSIvan Khoronzhuk max_rate = cpsw->speed * 1000; 7900be01b8eSIvan Khoronzhuk 7910be01b8eSIvan Khoronzhuk /* if max_rate is less then expected due to reduced link speed, 7920be01b8eSIvan Khoronzhuk * split proportionally according next potential max speed 7930be01b8eSIvan Khoronzhuk */ 7940be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 7950be01b8eSIvan Khoronzhuk max_rate *= 10; 7960be01b8eSIvan Khoronzhuk 7970be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 7980be01b8eSIvan Khoronzhuk max_rate *= 10; 79932b78d85SIvan Khoronzhuk 80048e0a83eSIvan Khoronzhuk ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate; 80148e0a83eSIvan Khoronzhuk ch_budget = (CPSW_POLL_WEIGHT - ch_budget) / 80248e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 80348e0a83eSIvan Khoronzhuk bigest_rate = (max_rate - consumed_rate) / 80448e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 80548e0a83eSIvan Khoronzhuk } 80648e0a83eSIvan Khoronzhuk 80732b78d85SIvan Khoronzhuk /* split tx weight/budget */ 80848e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 80948e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 81048e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 81148e0a83eSIvan Khoronzhuk if (ch_rate) { 81248e0a83eSIvan Khoronzhuk txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate; 81348e0a83eSIvan Khoronzhuk if (!txv[i].budget) 81432b78d85SIvan Khoronzhuk txv[i].budget++; 81548e0a83eSIvan Khoronzhuk if (ch_rate > bigest_rate) { 81648e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 81748e0a83eSIvan Khoronzhuk bigest_rate = ch_rate; 81848e0a83eSIvan Khoronzhuk } 81932b78d85SIvan Khoronzhuk 82032b78d85SIvan Khoronzhuk ch_weight = (ch_rate * 100) / max_rate; 82132b78d85SIvan Khoronzhuk if (!ch_weight) 82232b78d85SIvan Khoronzhuk ch_weight++; 82332b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight); 82448e0a83eSIvan Khoronzhuk } else { 82548e0a83eSIvan Khoronzhuk txv[i].budget = ch_budget; 82648e0a83eSIvan Khoronzhuk if (!bigest_rate_ch) 82748e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 82832b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, 0); 82948e0a83eSIvan Khoronzhuk } 83048e0a83eSIvan Khoronzhuk 83148e0a83eSIvan Khoronzhuk budget -= txv[i].budget; 83248e0a83eSIvan Khoronzhuk } 83348e0a83eSIvan Khoronzhuk 83448e0a83eSIvan Khoronzhuk if (budget) 83548e0a83eSIvan Khoronzhuk txv[bigest_rate_ch].budget += budget; 83648e0a83eSIvan Khoronzhuk 83748e0a83eSIvan Khoronzhuk /* split rx budget */ 83848e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 83948e0a83eSIvan Khoronzhuk ch_budget = budget / cpsw->rx_ch_num; 84048e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->rx_ch_num; i++) { 84148e0a83eSIvan Khoronzhuk cpsw->rxv[i].budget = ch_budget; 84248e0a83eSIvan Khoronzhuk budget -= ch_budget; 84348e0a83eSIvan Khoronzhuk } 84448e0a83eSIvan Khoronzhuk 84548e0a83eSIvan Khoronzhuk if (budget) 84648e0a83eSIvan Khoronzhuk cpsw->rxv[0].budget += budget; 84748e0a83eSIvan Khoronzhuk } 84848e0a83eSIvan Khoronzhuk 849c03abd84SFelipe Balbi static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id) 850df828598SMugunthan V N { 851dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 8527ce67a38SFelipe Balbi 8535d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->tx_en); 8542c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX); 855c03abd84SFelipe Balbi 856e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 857e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[1]); 858e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = true; 8597da11600SMugunthan V N } 8607da11600SMugunthan V N 861dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_tx); 862c03abd84SFelipe Balbi return IRQ_HANDLED; 863c03abd84SFelipe Balbi } 864c03abd84SFelipe Balbi 865c03abd84SFelipe Balbi static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id) 866c03abd84SFelipe Balbi { 867dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 868c03abd84SFelipe Balbi 8692c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX); 8705d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->rx_en); 871fd51cf19SSebastian Siewior 872e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 873e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[0]); 874e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = true; 8757da11600SMugunthan V N } 8767da11600SMugunthan V N 877dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_rx); 878df828598SMugunthan V N return IRQ_HANDLED; 879df828598SMugunthan V N } 880df828598SMugunthan V N 88132a7432cSMugunthan V N static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget) 882df828598SMugunthan V N { 883e05107e6SIvan Khoronzhuk u32 ch_map; 8848feb0a19SIvan Khoronzhuk int num_tx, cur_budget, ch; 885dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_tx); 8868feb0a19SIvan Khoronzhuk struct cpsw_vector *txv; 88732a7432cSMugunthan V N 888e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 889e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_txchs_state(cpsw->dma); 890342934a5SIvan Khoronzhuk for (ch = 0, num_tx = 0; ch_map; ch_map >>= 1, ch++) { 891e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 892e05107e6SIvan Khoronzhuk continue; 893e05107e6SIvan Khoronzhuk 8948feb0a19SIvan Khoronzhuk txv = &cpsw->txv[ch]; 8958feb0a19SIvan Khoronzhuk if (unlikely(txv->budget > budget - num_tx)) 8968feb0a19SIvan Khoronzhuk cur_budget = budget - num_tx; 8978feb0a19SIvan Khoronzhuk else 8988feb0a19SIvan Khoronzhuk cur_budget = txv->budget; 8998feb0a19SIvan Khoronzhuk 9008feb0a19SIvan Khoronzhuk num_tx += cpdma_chan_process(txv->ch, cur_budget); 901342934a5SIvan Khoronzhuk if (num_tx >= budget) 902342934a5SIvan Khoronzhuk break; 903e05107e6SIvan Khoronzhuk } 904e05107e6SIvan Khoronzhuk 90532a7432cSMugunthan V N if (num_tx < budget) { 90632a7432cSMugunthan V N napi_complete(napi_tx); 9075d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->tx_en); 908e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->tx_irq_disabled) { 909e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 910e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 9117da11600SMugunthan V N } 91232a7432cSMugunthan V N } 91332a7432cSMugunthan V N 91432a7432cSMugunthan V N return num_tx; 91532a7432cSMugunthan V N } 91632a7432cSMugunthan V N 91732a7432cSMugunthan V N static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget) 91832a7432cSMugunthan V N { 919e05107e6SIvan Khoronzhuk u32 ch_map; 9208feb0a19SIvan Khoronzhuk int num_rx, cur_budget, ch; 921dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_rx); 9228feb0a19SIvan Khoronzhuk struct cpsw_vector *rxv; 923510a1e72SMugunthan V N 924e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 925e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_rxchs_state(cpsw->dma); 926342934a5SIvan Khoronzhuk for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) { 927e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 928e05107e6SIvan Khoronzhuk continue; 929e05107e6SIvan Khoronzhuk 9308feb0a19SIvan Khoronzhuk rxv = &cpsw->rxv[ch]; 9318feb0a19SIvan Khoronzhuk if (unlikely(rxv->budget > budget - num_rx)) 9328feb0a19SIvan Khoronzhuk cur_budget = budget - num_rx; 9338feb0a19SIvan Khoronzhuk else 9348feb0a19SIvan Khoronzhuk cur_budget = rxv->budget; 9358feb0a19SIvan Khoronzhuk 9368feb0a19SIvan Khoronzhuk num_rx += cpdma_chan_process(rxv->ch, cur_budget); 937342934a5SIvan Khoronzhuk if (num_rx >= budget) 938342934a5SIvan Khoronzhuk break; 939e05107e6SIvan Khoronzhuk } 940e05107e6SIvan Khoronzhuk 941510a1e72SMugunthan V N if (num_rx < budget) { 94232a7432cSMugunthan V N napi_complete(napi_rx); 9435d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->rx_en); 944e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->rx_irq_disabled) { 945e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 946e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 9477da11600SMugunthan V N } 948510a1e72SMugunthan V N } 949df828598SMugunthan V N 950df828598SMugunthan V N return num_rx; 951df828598SMugunthan V N } 952df828598SMugunthan V N 953df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg) 954df828598SMugunthan V N { 955df828598SMugunthan V N unsigned long timeout = jiffies + HZ; 956df828598SMugunthan V N 957df828598SMugunthan V N __raw_writel(1, reg); 958df828598SMugunthan V N do { 959df828598SMugunthan V N cpu_relax(); 960df828598SMugunthan V N } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies)); 961df828598SMugunthan V N 962df828598SMugunthan V N WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module); 963df828598SMugunthan V N } 964df828598SMugunthan V N 965df828598SMugunthan V N #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ 966df828598SMugunthan V N ((mac)[2] << 16) | ((mac)[3] << 24)) 967df828598SMugunthan V N #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) 968df828598SMugunthan V N 969df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave, 970df828598SMugunthan V N struct cpsw_priv *priv) 971df828598SMugunthan V N { 9729750a3adSRichard Cochran slave_write(slave, mac_hi(priv->mac_addr), SA_HI); 9739750a3adSRichard Cochran slave_write(slave, mac_lo(priv->mac_addr), SA_LO); 974df828598SMugunthan V N } 975df828598SMugunthan V N 976df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave, 977df828598SMugunthan V N struct cpsw_priv *priv, bool *link) 978df828598SMugunthan V N { 979df828598SMugunthan V N struct phy_device *phy = slave->phy; 980df828598SMugunthan V N u32 mac_control = 0; 981df828598SMugunthan V N u32 slave_port; 982606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 983df828598SMugunthan V N 984df828598SMugunthan V N if (!phy) 985df828598SMugunthan V N return; 986df828598SMugunthan V N 9876f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 988df828598SMugunthan V N 989df828598SMugunthan V N if (phy->link) { 990606f3993SIvan Khoronzhuk mac_control = cpsw->data.mac_control; 991df828598SMugunthan V N 992df828598SMugunthan V N /* enable forwarding */ 9932a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 994df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 995df828598SMugunthan V N 996df828598SMugunthan V N if (phy->speed == 1000) 997df828598SMugunthan V N mac_control |= BIT(7); /* GIGABITEN */ 998df828598SMugunthan V N if (phy->duplex) 999df828598SMugunthan V N mac_control |= BIT(0); /* FULLDUPLEXEN */ 1000342b7b74SDaniel Mack 1001342b7b74SDaniel Mack /* set speed_in input in case RMII mode is used in 100Mbps */ 1002342b7b74SDaniel Mack if (phy->speed == 100) 1003342b7b74SDaniel Mack mac_control |= BIT(15); 1004a81d8762SMugunthan V N else if (phy->speed == 10) 1005a81d8762SMugunthan V N mac_control |= BIT(18); /* In Band mode */ 1006342b7b74SDaniel Mack 10071923d6e4SMugunthan V N if (priv->rx_pause) 10081923d6e4SMugunthan V N mac_control |= BIT(3); 10091923d6e4SMugunthan V N 10101923d6e4SMugunthan V N if (priv->tx_pause) 10111923d6e4SMugunthan V N mac_control |= BIT(4); 10121923d6e4SMugunthan V N 1013df828598SMugunthan V N *link = true; 1014df828598SMugunthan V N } else { 1015df828598SMugunthan V N mac_control = 0; 1016df828598SMugunthan V N /* disable forwarding */ 10172a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1018df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 1019df828598SMugunthan V N } 1020df828598SMugunthan V N 1021df828598SMugunthan V N if (mac_control != slave->mac_control) { 1022df828598SMugunthan V N phy_print_status(phy); 1023df828598SMugunthan V N __raw_writel(mac_control, &slave->sliver->mac_control); 1024df828598SMugunthan V N } 1025df828598SMugunthan V N 1026df828598SMugunthan V N slave->mac_control = mac_control; 1027df828598SMugunthan V N } 1028df828598SMugunthan V N 10290be01b8eSIvan Khoronzhuk static int cpsw_get_common_speed(struct cpsw_common *cpsw) 10300be01b8eSIvan Khoronzhuk { 10310be01b8eSIvan Khoronzhuk int i, speed; 10320be01b8eSIvan Khoronzhuk 10330be01b8eSIvan Khoronzhuk for (i = 0, speed = 0; i < cpsw->data.slaves; i++) 10340be01b8eSIvan Khoronzhuk if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link) 10350be01b8eSIvan Khoronzhuk speed += cpsw->slaves[i].phy->speed; 10360be01b8eSIvan Khoronzhuk 10370be01b8eSIvan Khoronzhuk return speed; 10380be01b8eSIvan Khoronzhuk } 10390be01b8eSIvan Khoronzhuk 10400be01b8eSIvan Khoronzhuk static int cpsw_need_resplit(struct cpsw_common *cpsw) 10410be01b8eSIvan Khoronzhuk { 10420be01b8eSIvan Khoronzhuk int i, rlim_ch_num; 10430be01b8eSIvan Khoronzhuk int speed, ch_rate; 10440be01b8eSIvan Khoronzhuk 10450be01b8eSIvan Khoronzhuk /* re-split resources only in case speed was changed */ 10460be01b8eSIvan Khoronzhuk speed = cpsw_get_common_speed(cpsw); 10470be01b8eSIvan Khoronzhuk if (speed == cpsw->speed || !speed) 10480be01b8eSIvan Khoronzhuk return 0; 10490be01b8eSIvan Khoronzhuk 10500be01b8eSIvan Khoronzhuk cpsw->speed = speed; 10510be01b8eSIvan Khoronzhuk 10520be01b8eSIvan Khoronzhuk for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) { 10530be01b8eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch); 10540be01b8eSIvan Khoronzhuk if (!ch_rate) 10550be01b8eSIvan Khoronzhuk break; 10560be01b8eSIvan Khoronzhuk 10570be01b8eSIvan Khoronzhuk rlim_ch_num++; 10580be01b8eSIvan Khoronzhuk } 10590be01b8eSIvan Khoronzhuk 10600be01b8eSIvan Khoronzhuk /* cases not dependent on speed */ 10610be01b8eSIvan Khoronzhuk if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num) 10620be01b8eSIvan Khoronzhuk return 0; 10630be01b8eSIvan Khoronzhuk 10640be01b8eSIvan Khoronzhuk return 1; 10650be01b8eSIvan Khoronzhuk } 10660be01b8eSIvan Khoronzhuk 1067df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev) 1068df828598SMugunthan V N { 1069df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 10700be01b8eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1071df828598SMugunthan V N bool link = false; 1072df828598SMugunthan V N 1073df828598SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 1074df828598SMugunthan V N 1075df828598SMugunthan V N if (link) { 10760be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 10770be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 10780be01b8eSIvan Khoronzhuk 1079df828598SMugunthan V N netif_carrier_on(ndev); 1080df828598SMugunthan V N if (netif_running(ndev)) 1081e05107e6SIvan Khoronzhuk netif_tx_wake_all_queues(ndev); 1082df828598SMugunthan V N } else { 1083df828598SMugunthan V N netif_carrier_off(ndev); 1084e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(ndev); 1085df828598SMugunthan V N } 1086df828598SMugunthan V N } 1087df828598SMugunthan V N 1088ff5b8ef2SMugunthan V N static int cpsw_get_coalesce(struct net_device *ndev, 1089ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1090ff5b8ef2SMugunthan V N { 10912a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1092ff5b8ef2SMugunthan V N 10932a05a622SIvan Khoronzhuk coal->rx_coalesce_usecs = cpsw->coal_intvl; 1094ff5b8ef2SMugunthan V N return 0; 1095ff5b8ef2SMugunthan V N } 1096ff5b8ef2SMugunthan V N 1097ff5b8ef2SMugunthan V N static int cpsw_set_coalesce(struct net_device *ndev, 1098ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1099ff5b8ef2SMugunthan V N { 1100ff5b8ef2SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1101ff5b8ef2SMugunthan V N u32 int_ctrl; 1102ff5b8ef2SMugunthan V N u32 num_interrupts = 0; 1103ff5b8ef2SMugunthan V N u32 prescale = 0; 1104ff5b8ef2SMugunthan V N u32 addnl_dvdr = 1; 1105ff5b8ef2SMugunthan V N u32 coal_intvl = 0; 11065d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1107ff5b8ef2SMugunthan V N 1108ff5b8ef2SMugunthan V N coal_intvl = coal->rx_coalesce_usecs; 1109ff5b8ef2SMugunthan V N 11105d8d0d4dSIvan Khoronzhuk int_ctrl = readl(&cpsw->wr_regs->int_control); 11112a05a622SIvan Khoronzhuk prescale = cpsw->bus_freq_mhz * 4; 1112ff5b8ef2SMugunthan V N 1113a84bc2a9SMugunthan V N if (!coal->rx_coalesce_usecs) { 1114a84bc2a9SMugunthan V N int_ctrl &= ~(CPSW_INTPRESCALE_MASK | CPSW_INTPACEEN); 1115a84bc2a9SMugunthan V N goto update_return; 1116a84bc2a9SMugunthan V N } 1117a84bc2a9SMugunthan V N 1118ff5b8ef2SMugunthan V N if (coal_intvl < CPSW_CMINTMIN_INTVL) 1119ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMIN_INTVL; 1120ff5b8ef2SMugunthan V N 1121ff5b8ef2SMugunthan V N if (coal_intvl > CPSW_CMINTMAX_INTVL) { 1122ff5b8ef2SMugunthan V N /* Interrupt pacer works with 4us Pulse, we can 1123ff5b8ef2SMugunthan V N * throttle further by dilating the 4us pulse. 1124ff5b8ef2SMugunthan V N */ 1125ff5b8ef2SMugunthan V N addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale; 1126ff5b8ef2SMugunthan V N 1127ff5b8ef2SMugunthan V N if (addnl_dvdr > 1) { 1128ff5b8ef2SMugunthan V N prescale *= addnl_dvdr; 1129ff5b8ef2SMugunthan V N if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr)) 1130ff5b8ef2SMugunthan V N coal_intvl = (CPSW_CMINTMAX_INTVL 1131ff5b8ef2SMugunthan V N * addnl_dvdr); 1132ff5b8ef2SMugunthan V N } else { 1133ff5b8ef2SMugunthan V N addnl_dvdr = 1; 1134ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMAX_INTVL; 1135ff5b8ef2SMugunthan V N } 1136ff5b8ef2SMugunthan V N } 1137ff5b8ef2SMugunthan V N 1138ff5b8ef2SMugunthan V N num_interrupts = (1000 * addnl_dvdr) / coal_intvl; 11395d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->rx_imax); 11405d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->tx_imax); 1141ff5b8ef2SMugunthan V N 1142ff5b8ef2SMugunthan V N int_ctrl |= CPSW_INTPACEEN; 1143ff5b8ef2SMugunthan V N int_ctrl &= (~CPSW_INTPRESCALE_MASK); 1144ff5b8ef2SMugunthan V N int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK); 1145a84bc2a9SMugunthan V N 1146a84bc2a9SMugunthan V N update_return: 11475d8d0d4dSIvan Khoronzhuk writel(int_ctrl, &cpsw->wr_regs->int_control); 1148ff5b8ef2SMugunthan V N 1149ff5b8ef2SMugunthan V N cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl); 11502a05a622SIvan Khoronzhuk cpsw->coal_intvl = coal_intvl; 1151ff5b8ef2SMugunthan V N 1152ff5b8ef2SMugunthan V N return 0; 1153ff5b8ef2SMugunthan V N } 1154ff5b8ef2SMugunthan V N 1155d9718546SMugunthan V N static int cpsw_get_sset_count(struct net_device *ndev, int sset) 1156d9718546SMugunthan V N { 1157e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1158e05107e6SIvan Khoronzhuk 1159d9718546SMugunthan V N switch (sset) { 1160d9718546SMugunthan V N case ETH_SS_STATS: 1161e05107e6SIvan Khoronzhuk return (CPSW_STATS_COMMON_LEN + 1162e05107e6SIvan Khoronzhuk (cpsw->rx_ch_num + cpsw->tx_ch_num) * 1163e05107e6SIvan Khoronzhuk CPSW_STATS_CH_LEN); 1164d9718546SMugunthan V N default: 1165d9718546SMugunthan V N return -EOPNOTSUPP; 1166d9718546SMugunthan V N } 1167d9718546SMugunthan V N } 1168d9718546SMugunthan V N 1169e05107e6SIvan Khoronzhuk static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) 1170e05107e6SIvan Khoronzhuk { 1171e05107e6SIvan Khoronzhuk int ch_stats_len; 1172e05107e6SIvan Khoronzhuk int line; 1173e05107e6SIvan Khoronzhuk int i; 1174e05107e6SIvan Khoronzhuk 1175e05107e6SIvan Khoronzhuk ch_stats_len = CPSW_STATS_CH_LEN * ch_num; 1176e05107e6SIvan Khoronzhuk for (i = 0; i < ch_stats_len; i++) { 1177e05107e6SIvan Khoronzhuk line = i % CPSW_STATS_CH_LEN; 1178e05107e6SIvan Khoronzhuk snprintf(*p, ETH_GSTRING_LEN, 1179e05107e6SIvan Khoronzhuk "%s DMA chan %d: %s", rx_dir ? "Rx" : "Tx", 1180e05107e6SIvan Khoronzhuk i / CPSW_STATS_CH_LEN, 1181e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[line].stat_string); 1182e05107e6SIvan Khoronzhuk *p += ETH_GSTRING_LEN; 1183e05107e6SIvan Khoronzhuk } 1184e05107e6SIvan Khoronzhuk } 1185e05107e6SIvan Khoronzhuk 1186d9718546SMugunthan V N static void cpsw_get_strings(struct net_device *ndev, u32 stringset, u8 *data) 1187d9718546SMugunthan V N { 1188e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1189d9718546SMugunthan V N u8 *p = data; 1190d9718546SMugunthan V N int i; 1191d9718546SMugunthan V N 1192d9718546SMugunthan V N switch (stringset) { 1193d9718546SMugunthan V N case ETH_SS_STATS: 1194e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_COMMON_LEN; i++) { 1195d9718546SMugunthan V N memcpy(p, cpsw_gstrings_stats[i].stat_string, 1196d9718546SMugunthan V N ETH_GSTRING_LEN); 1197d9718546SMugunthan V N p += ETH_GSTRING_LEN; 1198d9718546SMugunthan V N } 1199e05107e6SIvan Khoronzhuk 1200e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->rx_ch_num, 1); 1201e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->tx_ch_num, 0); 1202d9718546SMugunthan V N break; 1203d9718546SMugunthan V N } 1204d9718546SMugunthan V N } 1205d9718546SMugunthan V N 1206d9718546SMugunthan V N static void cpsw_get_ethtool_stats(struct net_device *ndev, 1207d9718546SMugunthan V N struct ethtool_stats *stats, u64 *data) 1208d9718546SMugunthan V N { 1209d9718546SMugunthan V N u8 *p; 12102c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1211e05107e6SIvan Khoronzhuk struct cpdma_chan_stats ch_stats; 1212e05107e6SIvan Khoronzhuk int i, l, ch; 1213d9718546SMugunthan V N 1214d9718546SMugunthan V N /* Collect Davinci CPDMA stats for Rx and Tx Channel */ 1215e05107e6SIvan Khoronzhuk for (l = 0; l < CPSW_STATS_COMMON_LEN; l++) 1216e05107e6SIvan Khoronzhuk data[l] = readl(cpsw->hw_stats + 1217e05107e6SIvan Khoronzhuk cpsw_gstrings_stats[l].stat_offset); 1218d9718546SMugunthan V N 1219e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 12208feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->rxv[ch].ch, &ch_stats); 1221e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1222e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1223e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1224e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1225e05107e6SIvan Khoronzhuk } 1226e05107e6SIvan Khoronzhuk } 1227d9718546SMugunthan V N 1228e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 12298feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->txv[ch].ch, &ch_stats); 1230e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1231e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1232e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1233e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1234d9718546SMugunthan V N } 1235d9718546SMugunthan V N } 1236d9718546SMugunthan V N } 1237d9718546SMugunthan V N 1238606f3993SIvan Khoronzhuk static int cpsw_common_res_usage_state(struct cpsw_common *cpsw) 1239d9ba8f9eSMugunthan V N { 1240d9ba8f9eSMugunthan V N u32 i; 1241d9ba8f9eSMugunthan V N u32 usage_count = 0; 1242d9ba8f9eSMugunthan V N 1243606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) 1244d9ba8f9eSMugunthan V N return 0; 1245d9ba8f9eSMugunthan V N 1246606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 1247606f3993SIvan Khoronzhuk if (cpsw->slaves[i].open_stat) 1248d9ba8f9eSMugunthan V N usage_count++; 1249d9ba8f9eSMugunthan V N 1250d9ba8f9eSMugunthan V N return usage_count; 1251d9ba8f9eSMugunthan V N } 1252d9ba8f9eSMugunthan V N 125327e9e103SIvan Khoronzhuk static inline int cpsw_tx_packet_submit(struct cpsw_priv *priv, 1254e05107e6SIvan Khoronzhuk struct sk_buff *skb, 1255e05107e6SIvan Khoronzhuk struct cpdma_chan *txch) 1256d9ba8f9eSMugunthan V N { 12572c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 12582c836bd9SIvan Khoronzhuk 1259e05107e6SIvan Khoronzhuk return cpdma_chan_submit(txch, skb, skb->data, skb->len, 1260606f3993SIvan Khoronzhuk priv->emac_port + cpsw->data.dual_emac); 1261d9ba8f9eSMugunthan V N } 1262d9ba8f9eSMugunthan V N 1263d9ba8f9eSMugunthan V N static inline void cpsw_add_dual_emac_def_ale_entries( 1264d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct cpsw_slave *slave, 1265d9ba8f9eSMugunthan V N u32 slave_port) 1266d9ba8f9eSMugunthan V N { 12672a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 126871a2cbb7SGrygorii Strashko u32 port_mask = 1 << slave_port | ALE_PORT_HOST; 1269d9ba8f9eSMugunthan V N 12702a05a622SIvan Khoronzhuk if (cpsw->version == CPSW_VERSION_1) 1271d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN); 1272d9ba8f9eSMugunthan V N else 1273d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN); 12742a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask, 1275d9ba8f9eSMugunthan V N port_mask, port_mask, 0); 12762a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1277d9ba8f9eSMugunthan V N port_mask, ALE_VLAN, slave->port_vlan, 0); 12782a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 12792a05a622SIvan Khoronzhuk HOST_PORT_NUM, ALE_VLAN | 12802a05a622SIvan Khoronzhuk ALE_SECURE, slave->port_vlan); 1281d9ba8f9eSMugunthan V N } 1282d9ba8f9eSMugunthan V N 12831e7a2e21SDaniel Mack static void soft_reset_slave(struct cpsw_slave *slave) 1284df828598SMugunthan V N { 1285df828598SMugunthan V N char name[32]; 12861e7a2e21SDaniel Mack 12871e7a2e21SDaniel Mack snprintf(name, sizeof(name), "slave-%d", slave->slave_num); 12881e7a2e21SDaniel Mack soft_reset(name, &slave->sliver->soft_reset); 12891e7a2e21SDaniel Mack } 12901e7a2e21SDaniel Mack 12911e7a2e21SDaniel Mack static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 12921e7a2e21SDaniel Mack { 1293df828598SMugunthan V N u32 slave_port; 1294649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1295df828598SMugunthan V N 12961e7a2e21SDaniel Mack soft_reset_slave(slave); 1297df828598SMugunthan V N 1298df828598SMugunthan V N /* setup priority mapping */ 1299df828598SMugunthan V N __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 13009750a3adSRichard Cochran 13012a05a622SIvan Khoronzhuk switch (cpsw->version) { 13029750a3adSRichard Cochran case CPSW_VERSION_1: 13039750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP); 13049750a3adSRichard Cochran break; 13059750a3adSRichard Cochran case CPSW_VERSION_2: 1306c193f365SMugunthan V N case CPSW_VERSION_3: 1307926489beSMugunthan V N case CPSW_VERSION_4: 13089750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP); 13099750a3adSRichard Cochran break; 13109750a3adSRichard Cochran } 1311df828598SMugunthan V N 1312df828598SMugunthan V N /* setup max packet size, and mac address */ 13132a05a622SIvan Khoronzhuk __raw_writel(cpsw->rx_packet_max, &slave->sliver->rx_maxlen); 1314df828598SMugunthan V N cpsw_set_slave_mac(slave, priv); 1315df828598SMugunthan V N 1316df828598SMugunthan V N slave->mac_control = 0; /* no link yet */ 1317df828598SMugunthan V N 13186f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1319df828598SMugunthan V N 1320606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1321d9ba8f9eSMugunthan V N cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port); 1322d9ba8f9eSMugunthan V N else 13232a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1324e11b220fSMugunthan V N 1 << slave_port, 0, 0, ALE_MCAST_FWD_2); 1325df828598SMugunthan V N 1326d733f754SDavid Rivshin if (slave->data->phy_node) { 1327552165bcSDavid Rivshin slave->phy = of_phy_connect(priv->ndev, slave->data->phy_node, 13289e42f715SHeiko Schocher &cpsw_adjust_link, 0, slave->data->phy_if); 1329d733f754SDavid Rivshin if (!slave->phy) { 1330d733f754SDavid Rivshin dev_err(priv->dev, "phy \"%s\" not found on slave %d\n", 1331d733f754SDavid Rivshin slave->data->phy_node->full_name, 1332d733f754SDavid Rivshin slave->slave_num); 1333d733f754SDavid Rivshin return; 1334d733f754SDavid Rivshin } 1335d733f754SDavid Rivshin } else { 1336df828598SMugunthan V N slave->phy = phy_connect(priv->ndev, slave->data->phy_id, 1337f9a8f83bSFlorian Fainelli &cpsw_adjust_link, slave->data->phy_if); 1338df828598SMugunthan V N if (IS_ERR(slave->phy)) { 1339d733f754SDavid Rivshin dev_err(priv->dev, 1340d733f754SDavid Rivshin "phy \"%s\" not found on slave %d, err %ld\n", 1341d733f754SDavid Rivshin slave->data->phy_id, slave->slave_num, 1342d733f754SDavid Rivshin PTR_ERR(slave->phy)); 1343df828598SMugunthan V N slave->phy = NULL; 1344d733f754SDavid Rivshin return; 1345d733f754SDavid Rivshin } 1346d733f754SDavid Rivshin } 1347d733f754SDavid Rivshin 13482220943aSAndrew Lunn phy_attached_info(slave->phy); 13492220943aSAndrew Lunn 1350df828598SMugunthan V N phy_start(slave->phy); 1351388367a5SMugunthan V N 1352388367a5SMugunthan V N /* Configure GMII_SEL register */ 135356e31bd8SIvan Khoronzhuk cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num); 1354df828598SMugunthan V N } 1355df828598SMugunthan V N 13563b72c2feSMugunthan V N static inline void cpsw_add_default_vlan(struct cpsw_priv *priv) 13573b72c2feSMugunthan V N { 1358606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1359606f3993SIvan Khoronzhuk const int vlan = cpsw->data.default_vlan; 13603b72c2feSMugunthan V N u32 reg; 13613b72c2feSMugunthan V N int i; 13621e5c4bc4SLennart Sorensen int unreg_mcast_mask; 13633b72c2feSMugunthan V N 13642a05a622SIvan Khoronzhuk reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN : 13653b72c2feSMugunthan V N CPSW2_PORT_VLAN; 13663b72c2feSMugunthan V N 13675d8d0d4dSIvan Khoronzhuk writel(vlan, &cpsw->host_port_regs->port_vlan); 13683b72c2feSMugunthan V N 1369606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 1370606f3993SIvan Khoronzhuk slave_write(cpsw->slaves + i, vlan, reg); 13713b72c2feSMugunthan V N 13721e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 13731e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 13741e5c4bc4SLennart Sorensen else 13751e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 13761e5c4bc4SLennart Sorensen 13772a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS, 137861f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 137961f1cef9SGrygorii Strashko unreg_mcast_mask); 13803b72c2feSMugunthan V N } 13813b72c2feSMugunthan V N 1382df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv) 1383df828598SMugunthan V N { 1384d9ba8f9eSMugunthan V N u32 fifo_mode; 13855d8d0d4dSIvan Khoronzhuk u32 control_reg; 13865d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 13873b72c2feSMugunthan V N 1388df828598SMugunthan V N /* soft reset the controller and initialize ale */ 13895d8d0d4dSIvan Khoronzhuk soft_reset("cpsw", &cpsw->regs->soft_reset); 13902a05a622SIvan Khoronzhuk cpsw_ale_start(cpsw->ale); 1391df828598SMugunthan V N 1392df828598SMugunthan V N /* switch to vlan unaware mode */ 13932a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 13943b72c2feSMugunthan V N CPSW_ALE_VLAN_AWARE); 13955d8d0d4dSIvan Khoronzhuk control_reg = readl(&cpsw->regs->control); 13963b72c2feSMugunthan V N control_reg |= CPSW_VLAN_AWARE; 13975d8d0d4dSIvan Khoronzhuk writel(control_reg, &cpsw->regs->control); 1398606f3993SIvan Khoronzhuk fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE : 1399d9ba8f9eSMugunthan V N CPSW_FIFO_NORMAL_MODE; 14005d8d0d4dSIvan Khoronzhuk writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl); 1401df828598SMugunthan V N 1402df828598SMugunthan V N /* setup host port priority mapping */ 1403df828598SMugunthan V N __raw_writel(CPDMA_TX_PRIORITY_MAP, 14045d8d0d4dSIvan Khoronzhuk &cpsw->host_port_regs->cpdma_tx_pri_map); 14055d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->host_port_regs->cpdma_rx_chan_map); 1406df828598SMugunthan V N 14072a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, 1408df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1409df828598SMugunthan V N 1410606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) { 14112a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1412d9ba8f9eSMugunthan V N 0, 0); 14132a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 141471a2cbb7SGrygorii Strashko ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2); 1415df828598SMugunthan V N } 1416d9ba8f9eSMugunthan V N } 1417df828598SMugunthan V N 14183802dce1SIvan Khoronzhuk static int cpsw_fill_rx_channels(struct cpsw_priv *priv) 14193802dce1SIvan Khoronzhuk { 14203802dce1SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14213802dce1SIvan Khoronzhuk struct sk_buff *skb; 14223802dce1SIvan Khoronzhuk int ch_buf_num; 1423e05107e6SIvan Khoronzhuk int ch, i, ret; 14243802dce1SIvan Khoronzhuk 1425e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 14268feb0a19SIvan Khoronzhuk ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch); 14273802dce1SIvan Khoronzhuk for (i = 0; i < ch_buf_num; i++) { 14283802dce1SIvan Khoronzhuk skb = __netdev_alloc_skb_ip_align(priv->ndev, 14293802dce1SIvan Khoronzhuk cpsw->rx_packet_max, 14303802dce1SIvan Khoronzhuk GFP_KERNEL); 14313802dce1SIvan Khoronzhuk if (!skb) { 14323802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, "cannot allocate skb\n"); 14333802dce1SIvan Khoronzhuk return -ENOMEM; 14343802dce1SIvan Khoronzhuk } 14353802dce1SIvan Khoronzhuk 1436e05107e6SIvan Khoronzhuk skb_set_queue_mapping(skb, ch); 14378feb0a19SIvan Khoronzhuk ret = cpdma_chan_submit(cpsw->rxv[ch].ch, skb, 14388feb0a19SIvan Khoronzhuk skb->data, skb_tailroom(skb), 14398feb0a19SIvan Khoronzhuk 0); 14403802dce1SIvan Khoronzhuk if (ret < 0) { 14413802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, 1442e05107e6SIvan Khoronzhuk "cannot submit skb to channel %d rx, error %d\n", 1443e05107e6SIvan Khoronzhuk ch, ret); 14443802dce1SIvan Khoronzhuk kfree_skb(skb); 14453802dce1SIvan Khoronzhuk return ret; 14463802dce1SIvan Khoronzhuk } 14473802dce1SIvan Khoronzhuk kmemleak_not_leak(skb); 14483802dce1SIvan Khoronzhuk } 14493802dce1SIvan Khoronzhuk 1450e05107e6SIvan Khoronzhuk cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n", 1451e05107e6SIvan Khoronzhuk ch, ch_buf_num); 1452e05107e6SIvan Khoronzhuk } 14533802dce1SIvan Khoronzhuk 1454e05107e6SIvan Khoronzhuk return 0; 14553802dce1SIvan Khoronzhuk } 14563802dce1SIvan Khoronzhuk 14572a05a622SIvan Khoronzhuk static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw) 1458aacebbf8SSebastian Siewior { 14593995d265SSchuyler Patton u32 slave_port; 14603995d265SSchuyler Patton 14616f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 14623995d265SSchuyler Patton 1463aacebbf8SSebastian Siewior if (!slave->phy) 1464aacebbf8SSebastian Siewior return; 1465aacebbf8SSebastian Siewior phy_stop(slave->phy); 1466aacebbf8SSebastian Siewior phy_disconnect(slave->phy); 1467aacebbf8SSebastian Siewior slave->phy = NULL; 14682a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 14693995d265SSchuyler Patton ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 14701f95ba00SGrygorii Strashko soft_reset_slave(slave); 1471aacebbf8SSebastian Siewior } 1472aacebbf8SSebastian Siewior 1473df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev) 1474df828598SMugunthan V N { 1475df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1476649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14773802dce1SIvan Khoronzhuk int ret; 1478df828598SMugunthan V N u32 reg; 1479df828598SMugunthan V N 148056e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1481108a6537SGrygorii Strashko if (ret < 0) { 148256e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1483108a6537SGrygorii Strashko return ret; 1484108a6537SGrygorii Strashko } 14853fa88c51SGrygorii Strashko 1486606f3993SIvan Khoronzhuk if (!cpsw_common_res_usage_state(cpsw)) 14872c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1488df828598SMugunthan V N netif_carrier_off(ndev); 1489df828598SMugunthan V N 1490e05107e6SIvan Khoronzhuk /* Notify the stack of the actual queue counts. */ 1491e05107e6SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num); 1492e05107e6SIvan Khoronzhuk if (ret) { 1493e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 1494e05107e6SIvan Khoronzhuk goto err_cleanup; 1495e05107e6SIvan Khoronzhuk } 1496e05107e6SIvan Khoronzhuk 1497e05107e6SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num); 1498e05107e6SIvan Khoronzhuk if (ret) { 1499e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 1500e05107e6SIvan Khoronzhuk goto err_cleanup; 1501e05107e6SIvan Khoronzhuk } 1502e05107e6SIvan Khoronzhuk 15032a05a622SIvan Khoronzhuk reg = cpsw->version; 1504df828598SMugunthan V N 1505df828598SMugunthan V N dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 1506df828598SMugunthan V N CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 1507df828598SMugunthan V N CPSW_RTL_VERSION(reg)); 1508df828598SMugunthan V N 1509df828598SMugunthan V N /* initialize host and slave ports */ 1510606f3993SIvan Khoronzhuk if (!cpsw_common_res_usage_state(cpsw)) 1511df828598SMugunthan V N cpsw_init_host_port(priv); 1512df828598SMugunthan V N for_each_slave(priv, cpsw_slave_open, priv); 1513df828598SMugunthan V N 15143b72c2feSMugunthan V N /* Add default VLAN */ 1515606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) 15163b72c2feSMugunthan V N cpsw_add_default_vlan(priv); 1517e6afea0bSMugunthan V N else 15182a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan, 151961f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0); 15203b72c2feSMugunthan V N 1521606f3993SIvan Khoronzhuk if (!cpsw_common_res_usage_state(cpsw)) { 1522d9ba8f9eSMugunthan V N /* disable priority elevation */ 15235d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->regs->ptype); 1524df828598SMugunthan V N 1525d9ba8f9eSMugunthan V N /* enable statistics collection only on all ports */ 15265d8d0d4dSIvan Khoronzhuk __raw_writel(0x7, &cpsw->regs->stat_port_en); 1527df828598SMugunthan V N 15281923d6e4SMugunthan V N /* Enable internal fifo flow control */ 15295d8d0d4dSIvan Khoronzhuk writel(0x7, &cpsw->regs->flow_control); 15301923d6e4SMugunthan V N 1531dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_rx); 1532dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_tx); 1533d354eb85SMugunthan V N 1534e38b5a3dSIvan Khoronzhuk if (cpsw->tx_irq_disabled) { 1535e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 1536e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 15377da11600SMugunthan V N } 15387da11600SMugunthan V N 1539e38b5a3dSIvan Khoronzhuk if (cpsw->rx_irq_disabled) { 1540e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 1541e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 15427da11600SMugunthan V N } 15437da11600SMugunthan V N 15443802dce1SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 15453802dce1SIvan Khoronzhuk if (ret < 0) 1546aacebbf8SSebastian Siewior goto err_cleanup; 1547f280e89aSMugunthan V N 15488a2c9a5aSGrygorii Strashko if (cpts_register(cpsw->cpts)) 1549f280e89aSMugunthan V N dev_err(priv->dev, "error registering cpts device\n"); 1550f280e89aSMugunthan V N 1551d9ba8f9eSMugunthan V N } 1552df828598SMugunthan V N 1553ff5b8ef2SMugunthan V N /* Enable Interrupt pacing if configured */ 15542a05a622SIvan Khoronzhuk if (cpsw->coal_intvl != 0) { 1555ff5b8ef2SMugunthan V N struct ethtool_coalesce coal; 1556ff5b8ef2SMugunthan V N 15572a05a622SIvan Khoronzhuk coal.rx_coalesce_usecs = cpsw->coal_intvl; 1558ff5b8ef2SMugunthan V N cpsw_set_coalesce(ndev, &coal); 1559ff5b8ef2SMugunthan V N } 1560ff5b8ef2SMugunthan V N 15612c836bd9SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 15622c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1563f63a975eSMugunthan V N 1564606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1565606f3993SIvan Khoronzhuk cpsw->slaves[priv->emac_port].open_stat = true; 1566e05107e6SIvan Khoronzhuk 1567df828598SMugunthan V N return 0; 1568df828598SMugunthan V N 1569aacebbf8SSebastian Siewior err_cleanup: 15702c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 15712a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 157256e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1573aacebbf8SSebastian Siewior netif_carrier_off(priv->ndev); 1574aacebbf8SSebastian Siewior return ret; 1575df828598SMugunthan V N } 1576df828598SMugunthan V N 1577df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev) 1578df828598SMugunthan V N { 1579df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1580649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1581df828598SMugunthan V N 1582df828598SMugunthan V N cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 1583e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(priv->ndev); 1584df828598SMugunthan V N netif_carrier_off(priv->ndev); 1585d9ba8f9eSMugunthan V N 1586606f3993SIvan Khoronzhuk if (cpsw_common_res_usage_state(cpsw) <= 1) { 1587dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_rx); 1588dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_tx); 15892a05a622SIvan Khoronzhuk cpts_unregister(cpsw->cpts); 15902c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 15912c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 15922a05a622SIvan Khoronzhuk cpsw_ale_stop(cpsw->ale); 1593d9ba8f9eSMugunthan V N } 15942a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 15950be01b8eSIvan Khoronzhuk 15960be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 15970be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 15980be01b8eSIvan Khoronzhuk 159956e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1600606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1601606f3993SIvan Khoronzhuk cpsw->slaves[priv->emac_port].open_stat = false; 1602df828598SMugunthan V N return 0; 1603df828598SMugunthan V N } 1604df828598SMugunthan V N 1605df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 1606df828598SMugunthan V N struct net_device *ndev) 1607df828598SMugunthan V N { 1608df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 16092c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1610e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 1611e05107e6SIvan Khoronzhuk struct cpdma_chan *txch; 1612e05107e6SIvan Khoronzhuk int ret, q_idx; 1613df828598SMugunthan V N 1614860e9538SFlorian Westphal netif_trans_update(ndev); 1615df828598SMugunthan V N 1616df828598SMugunthan V N if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 1617df828598SMugunthan V N cpsw_err(priv, tx_err, "packet pad failed\n"); 16188dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 1619df828598SMugunthan V N return NETDEV_TX_OK; 1620df828598SMugunthan V N } 1621df828598SMugunthan V N 16229232b16dSMugunthan V N if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 1623b63ba58eSGrygorii Strashko cpts_is_tx_enabled(cpsw->cpts)) 16242e5b38abSRichard Cochran skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 16252e5b38abSRichard Cochran 16262e5b38abSRichard Cochran skb_tx_timestamp(skb); 16272e5b38abSRichard Cochran 1628e05107e6SIvan Khoronzhuk q_idx = skb_get_queue_mapping(skb); 1629e05107e6SIvan Khoronzhuk if (q_idx >= cpsw->tx_ch_num) 1630e05107e6SIvan Khoronzhuk q_idx = q_idx % cpsw->tx_ch_num; 1631e05107e6SIvan Khoronzhuk 16328feb0a19SIvan Khoronzhuk txch = cpsw->txv[q_idx].ch; 1633e05107e6SIvan Khoronzhuk ret = cpsw_tx_packet_submit(priv, skb, txch); 1634df828598SMugunthan V N if (unlikely(ret != 0)) { 1635df828598SMugunthan V N cpsw_err(priv, tx_err, "desc submit failed\n"); 1636df828598SMugunthan V N goto fail; 1637df828598SMugunthan V N } 1638df828598SMugunthan V N 1639fae50823SMugunthan V N /* If there is no more tx desc left free then we need to 1640fae50823SMugunthan V N * tell the kernel to stop sending us tx frames. 1641fae50823SMugunthan V N */ 1642e05107e6SIvan Khoronzhuk if (unlikely(!cpdma_check_free_tx_desc(txch))) { 1643e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, q_idx); 1644e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1645e05107e6SIvan Khoronzhuk } 1646fae50823SMugunthan V N 1647df828598SMugunthan V N return NETDEV_TX_OK; 1648df828598SMugunthan V N fail: 16498dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 1650e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 1651e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1652df828598SMugunthan V N return NETDEV_TX_BUSY; 1653df828598SMugunthan V N } 1654df828598SMugunthan V N 1655c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 16562e5b38abSRichard Cochran 16572a05a622SIvan Khoronzhuk static void cpsw_hwtstamp_v1(struct cpsw_common *cpsw) 16582e5b38abSRichard Cochran { 1659606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave]; 16602e5b38abSRichard Cochran u32 ts_en, seq_id; 16612e5b38abSRichard Cochran 1662b63ba58eSGrygorii Strashko if (!cpts_is_tx_enabled(cpsw->cpts) && 1663b63ba58eSGrygorii Strashko !cpts_is_rx_enabled(cpsw->cpts)) { 16642e5b38abSRichard Cochran slave_write(slave, 0, CPSW1_TS_CTL); 16652e5b38abSRichard Cochran return; 16662e5b38abSRichard Cochran } 16672e5b38abSRichard Cochran 16682e5b38abSRichard Cochran seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588; 16692e5b38abSRichard Cochran ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS; 16702e5b38abSRichard Cochran 1671b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 16722e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_TX_EN; 16732e5b38abSRichard Cochran 1674b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 16752e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_RX_EN; 16762e5b38abSRichard Cochran 16772e5b38abSRichard Cochran slave_write(slave, ts_en, CPSW1_TS_CTL); 16782e5b38abSRichard Cochran slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE); 16792e5b38abSRichard Cochran } 16802e5b38abSRichard Cochran 16812e5b38abSRichard Cochran static void cpsw_hwtstamp_v2(struct cpsw_priv *priv) 16822e5b38abSRichard Cochran { 1683d9ba8f9eSMugunthan V N struct cpsw_slave *slave; 16845d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16852e5b38abSRichard Cochran u32 ctrl, mtype; 16862e5b38abSRichard Cochran 1687cb7d78d0SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 1688d9ba8f9eSMugunthan V N 16892e5b38abSRichard Cochran ctrl = slave_read(slave, CPSW2_CONTROL); 16902a05a622SIvan Khoronzhuk switch (cpsw->version) { 169109c55372SGeorge Cherian case CPSW_VERSION_2: 169209c55372SGeorge Cherian ctrl &= ~CTRL_V2_ALL_TS_MASK; 16932e5b38abSRichard Cochran 1694b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 169509c55372SGeorge Cherian ctrl |= CTRL_V2_TX_TS_BITS; 16962e5b38abSRichard Cochran 1697b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 169809c55372SGeorge Cherian ctrl |= CTRL_V2_RX_TS_BITS; 169909c55372SGeorge Cherian break; 170009c55372SGeorge Cherian case CPSW_VERSION_3: 170109c55372SGeorge Cherian default: 170209c55372SGeorge Cherian ctrl &= ~CTRL_V3_ALL_TS_MASK; 170309c55372SGeorge Cherian 1704b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 170509c55372SGeorge Cherian ctrl |= CTRL_V3_TX_TS_BITS; 170609c55372SGeorge Cherian 1707b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 170809c55372SGeorge Cherian ctrl |= CTRL_V3_RX_TS_BITS; 170909c55372SGeorge Cherian break; 171009c55372SGeorge Cherian } 17112e5b38abSRichard Cochran 17122e5b38abSRichard Cochran mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS; 17132e5b38abSRichard Cochran 17142e5b38abSRichard Cochran slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE); 17152e5b38abSRichard Cochran slave_write(slave, ctrl, CPSW2_CONTROL); 17165d8d0d4dSIvan Khoronzhuk __raw_writel(ETH_P_1588, &cpsw->regs->ts_ltype); 17172e5b38abSRichard Cochran } 17182e5b38abSRichard Cochran 1719a5b4145bSBen Hutchings static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 17202e5b38abSRichard Cochran { 17213177bf6fSMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 17222e5b38abSRichard Cochran struct hwtstamp_config cfg; 17232a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 17242a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 17252e5b38abSRichard Cochran 17262a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 17272a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 17282a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 17292ee91e54SBen Hutchings return -EOPNOTSUPP; 17302ee91e54SBen Hutchings 17312e5b38abSRichard Cochran if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 17322e5b38abSRichard Cochran return -EFAULT; 17332e5b38abSRichard Cochran 17342e5b38abSRichard Cochran /* reserved for future extensions */ 17352e5b38abSRichard Cochran if (cfg.flags) 17362e5b38abSRichard Cochran return -EINVAL; 17372e5b38abSRichard Cochran 17382ee91e54SBen Hutchings if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON) 17392e5b38abSRichard Cochran return -ERANGE; 17402e5b38abSRichard Cochran 17412e5b38abSRichard Cochran switch (cfg.rx_filter) { 17422e5b38abSRichard Cochran case HWTSTAMP_FILTER_NONE: 1743b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 0); 17442e5b38abSRichard Cochran break; 17452e5b38abSRichard Cochran case HWTSTAMP_FILTER_ALL: 17462e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 17472e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 17482e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 17492e5b38abSRichard Cochran return -ERANGE; 17502e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 17512e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 17522e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 17532e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 17542e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 17552e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 17562e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_EVENT: 17572e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_SYNC: 17582e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1759b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 1); 17602e5b38abSRichard Cochran cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 17612e5b38abSRichard Cochran break; 17622e5b38abSRichard Cochran default: 17632e5b38abSRichard Cochran return -ERANGE; 17642e5b38abSRichard Cochran } 17652e5b38abSRichard Cochran 1766b63ba58eSGrygorii Strashko cpts_tx_enable(cpts, cfg.tx_type == HWTSTAMP_TX_ON); 17672ee91e54SBen Hutchings 17682a05a622SIvan Khoronzhuk switch (cpsw->version) { 17692e5b38abSRichard Cochran case CPSW_VERSION_1: 17702a05a622SIvan Khoronzhuk cpsw_hwtstamp_v1(cpsw); 17712e5b38abSRichard Cochran break; 17722e5b38abSRichard Cochran case CPSW_VERSION_2: 1773f7d403cbSGeorge Cherian case CPSW_VERSION_3: 17742e5b38abSRichard Cochran cpsw_hwtstamp_v2(priv); 17752e5b38abSRichard Cochran break; 17762e5b38abSRichard Cochran default: 17772ee91e54SBen Hutchings WARN_ON(1); 17782e5b38abSRichard Cochran } 17792e5b38abSRichard Cochran 17802e5b38abSRichard Cochran return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 17812e5b38abSRichard Cochran } 17822e5b38abSRichard Cochran 1783a5b4145bSBen Hutchings static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1784a5b4145bSBen Hutchings { 17852a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(dev); 17862a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 1787a5b4145bSBen Hutchings struct hwtstamp_config cfg; 1788a5b4145bSBen Hutchings 17892a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 17902a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 17912a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 1792a5b4145bSBen Hutchings return -EOPNOTSUPP; 1793a5b4145bSBen Hutchings 1794a5b4145bSBen Hutchings cfg.flags = 0; 1795b63ba58eSGrygorii Strashko cfg.tx_type = cpts_is_tx_enabled(cpts) ? 1796b63ba58eSGrygorii Strashko HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; 1797b63ba58eSGrygorii Strashko cfg.rx_filter = (cpts_is_rx_enabled(cpts) ? 1798a5b4145bSBen Hutchings HWTSTAMP_FILTER_PTP_V2_EVENT : HWTSTAMP_FILTER_NONE); 1799a5b4145bSBen Hutchings 1800a5b4145bSBen Hutchings return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 1801a5b4145bSBen Hutchings } 1802c8395d4eSGrygorii Strashko #else 1803c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1804c8395d4eSGrygorii Strashko { 1805c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1806c8395d4eSGrygorii Strashko } 1807a5b4145bSBen Hutchings 1808c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 1809c8395d4eSGrygorii Strashko { 1810c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1811c8395d4eSGrygorii Strashko } 18122e5b38abSRichard Cochran #endif /*CONFIG_TI_CPTS*/ 18132e5b38abSRichard Cochran 18142e5b38abSRichard Cochran static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 18152e5b38abSRichard Cochran { 181611f2c988SMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 1817606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1818606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 181911f2c988SMugunthan V N 18202e5b38abSRichard Cochran if (!netif_running(dev)) 18212e5b38abSRichard Cochran return -EINVAL; 18222e5b38abSRichard Cochran 182311f2c988SMugunthan V N switch (cmd) { 182411f2c988SMugunthan V N case SIOCSHWTSTAMP: 1825a5b4145bSBen Hutchings return cpsw_hwtstamp_set(dev, req); 1826a5b4145bSBen Hutchings case SIOCGHWTSTAMP: 1827a5b4145bSBen Hutchings return cpsw_hwtstamp_get(dev, req); 18282e5b38abSRichard Cochran } 18292e5b38abSRichard Cochran 1830606f3993SIvan Khoronzhuk if (!cpsw->slaves[slave_no].phy) 1831c1b59947SStefan Sørensen return -EOPNOTSUPP; 1832606f3993SIvan Khoronzhuk return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd); 183311f2c988SMugunthan V N } 183411f2c988SMugunthan V N 1835df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev) 1836df828598SMugunthan V N { 1837df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 18382c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1839e05107e6SIvan Khoronzhuk int ch; 1840df828598SMugunthan V N 1841df828598SMugunthan V N cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 18428dc43ddcSTobias Klauser ndev->stats.tx_errors++; 18432c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1844e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 18458feb0a19SIvan Khoronzhuk cpdma_chan_stop(cpsw->txv[ch].ch); 18468feb0a19SIvan Khoronzhuk cpdma_chan_start(cpsw->txv[ch].ch); 1847e05107e6SIvan Khoronzhuk } 1848e05107e6SIvan Khoronzhuk 18492c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1850df828598SMugunthan V N } 1851df828598SMugunthan V N 1852dcfd8d58SMugunthan V N static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p) 1853dcfd8d58SMugunthan V N { 1854dcfd8d58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1855dcfd8d58SMugunthan V N struct sockaddr *addr = (struct sockaddr *)p; 1856649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1857dcfd8d58SMugunthan V N int flags = 0; 1858dcfd8d58SMugunthan V N u16 vid = 0; 1859a6c5d14fSGrygorii Strashko int ret; 1860dcfd8d58SMugunthan V N 1861dcfd8d58SMugunthan V N if (!is_valid_ether_addr(addr->sa_data)) 1862dcfd8d58SMugunthan V N return -EADDRNOTAVAIL; 1863dcfd8d58SMugunthan V N 186456e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1865a6c5d14fSGrygorii Strashko if (ret < 0) { 186656e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1867a6c5d14fSGrygorii Strashko return ret; 1868a6c5d14fSGrygorii Strashko } 1869a6c5d14fSGrygorii Strashko 1870606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 1871606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 1872dcfd8d58SMugunthan V N flags = ALE_VLAN; 1873dcfd8d58SMugunthan V N } 1874dcfd8d58SMugunthan V N 18752a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1876dcfd8d58SMugunthan V N flags, vid); 18772a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM, 1878dcfd8d58SMugunthan V N flags, vid); 1879dcfd8d58SMugunthan V N 1880dcfd8d58SMugunthan V N memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); 1881dcfd8d58SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 1882dcfd8d58SMugunthan V N for_each_slave(priv, cpsw_set_slave_mac, priv); 1883dcfd8d58SMugunthan V N 188456e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1885a6c5d14fSGrygorii Strashko 1886dcfd8d58SMugunthan V N return 0; 1887dcfd8d58SMugunthan V N } 1888dcfd8d58SMugunthan V N 1889df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 1890df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev) 1891df828598SMugunthan V N { 1892dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1893df828598SMugunthan V N 1894dbc4ec52SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1895dbc4ec52SIvan Khoronzhuk cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw); 1896dbc4ec52SIvan Khoronzhuk cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw); 1897dbc4ec52SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1898df828598SMugunthan V N } 1899df828598SMugunthan V N #endif 1900df828598SMugunthan V N 19013b72c2feSMugunthan V N static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, 19023b72c2feSMugunthan V N unsigned short vid) 19033b72c2feSMugunthan V N { 19043b72c2feSMugunthan V N int ret; 19059f6bd8faSMugunthan V N int unreg_mcast_mask = 0; 19069f6bd8faSMugunthan V N u32 port_mask; 1907606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19089f6bd8faSMugunthan V N 1909606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 19109f6bd8faSMugunthan V N port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST; 19119f6bd8faSMugunthan V N 19129f6bd8faSMugunthan V N if (priv->ndev->flags & IFF_ALLMULTI) 19139f6bd8faSMugunthan V N unreg_mcast_mask = port_mask; 19149f6bd8faSMugunthan V N } else { 19159f6bd8faSMugunthan V N port_mask = ALE_ALL_PORTS; 19161e5c4bc4SLennart Sorensen 19171e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 19181e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 19191e5c4bc4SLennart Sorensen else 19201e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 19219f6bd8faSMugunthan V N } 19223b72c2feSMugunthan V N 19232a05a622SIvan Khoronzhuk ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, 192461f1cef9SGrygorii Strashko unreg_mcast_mask); 19253b72c2feSMugunthan V N if (ret != 0) 19263b72c2feSMugunthan V N return ret; 19273b72c2feSMugunthan V N 19282a05a622SIvan Khoronzhuk ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 192971a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19303b72c2feSMugunthan V N if (ret != 0) 19313b72c2feSMugunthan V N goto clean_vid; 19323b72c2feSMugunthan V N 19332a05a622SIvan Khoronzhuk ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 19349f6bd8faSMugunthan V N port_mask, ALE_VLAN, vid, 0); 19353b72c2feSMugunthan V N if (ret != 0) 19363b72c2feSMugunthan V N goto clean_vlan_ucast; 19373b72c2feSMugunthan V N return 0; 19383b72c2feSMugunthan V N 19393b72c2feSMugunthan V N clean_vlan_ucast: 19402a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 194171a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19423b72c2feSMugunthan V N clean_vid: 19432a05a622SIvan Khoronzhuk cpsw_ale_del_vlan(cpsw->ale, vid, 0); 19443b72c2feSMugunthan V N return ret; 19453b72c2feSMugunthan V N } 19463b72c2feSMugunthan V N 19473b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, 194880d5c368SPatrick McHardy __be16 proto, u16 vid) 19493b72c2feSMugunthan V N { 19503b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1951649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1952a6c5d14fSGrygorii Strashko int ret; 19533b72c2feSMugunthan V N 1954606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 19553b72c2feSMugunthan V N return 0; 19563b72c2feSMugunthan V N 195756e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1958a6c5d14fSGrygorii Strashko if (ret < 0) { 195956e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1960a6c5d14fSGrygorii Strashko return ret; 1961a6c5d14fSGrygorii Strashko } 1962a6c5d14fSGrygorii Strashko 1963606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 196402a54164SMugunthan V N /* In dual EMAC, reserved VLAN id should not be used for 196502a54164SMugunthan V N * creating VLAN interfaces as this can break the dual 196602a54164SMugunthan V N * EMAC port separation 196702a54164SMugunthan V N */ 196802a54164SMugunthan V N int i; 196902a54164SMugunthan V N 1970606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 1971606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 197202a54164SMugunthan V N return -EINVAL; 197302a54164SMugunthan V N } 197402a54164SMugunthan V N } 197502a54164SMugunthan V N 19763b72c2feSMugunthan V N dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid); 1977a6c5d14fSGrygorii Strashko ret = cpsw_add_vlan_ale_entry(priv, vid); 1978a6c5d14fSGrygorii Strashko 197956e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1980a6c5d14fSGrygorii Strashko return ret; 19813b72c2feSMugunthan V N } 19823b72c2feSMugunthan V N 19833b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev, 198480d5c368SPatrick McHardy __be16 proto, u16 vid) 19853b72c2feSMugunthan V N { 19863b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1987649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19883b72c2feSMugunthan V N int ret; 19893b72c2feSMugunthan V N 1990606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 19913b72c2feSMugunthan V N return 0; 19923b72c2feSMugunthan V N 199356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1994a6c5d14fSGrygorii Strashko if (ret < 0) { 199556e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1996a6c5d14fSGrygorii Strashko return ret; 1997a6c5d14fSGrygorii Strashko } 1998a6c5d14fSGrygorii Strashko 1999606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 200002a54164SMugunthan V N int i; 200102a54164SMugunthan V N 2002606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 2003606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 200402a54164SMugunthan V N return -EINVAL; 200502a54164SMugunthan V N } 200602a54164SMugunthan V N } 200702a54164SMugunthan V N 20083b72c2feSMugunthan V N dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid); 20092a05a622SIvan Khoronzhuk ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0); 20103b72c2feSMugunthan V N if (ret != 0) 20113b72c2feSMugunthan V N return ret; 20123b72c2feSMugunthan V N 20132a05a622SIvan Khoronzhuk ret = cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 201461f1cef9SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 20153b72c2feSMugunthan V N if (ret != 0) 20163b72c2feSMugunthan V N return ret; 20173b72c2feSMugunthan V N 20182a05a622SIvan Khoronzhuk ret = cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast, 20193b72c2feSMugunthan V N 0, ALE_VLAN, vid); 202056e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 2021a6c5d14fSGrygorii Strashko return ret; 20223b72c2feSMugunthan V N } 20233b72c2feSMugunthan V N 202483fcad0cSIvan Khoronzhuk static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate) 202583fcad0cSIvan Khoronzhuk { 202683fcad0cSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 202783fcad0cSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 202852986a2fSIvan Khoronzhuk struct cpsw_slave *slave; 202932b78d85SIvan Khoronzhuk u32 min_rate; 203083fcad0cSIvan Khoronzhuk u32 ch_rate; 203152986a2fSIvan Khoronzhuk int i, ret; 203283fcad0cSIvan Khoronzhuk 203383fcad0cSIvan Khoronzhuk ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate; 203483fcad0cSIvan Khoronzhuk if (ch_rate == rate) 203583fcad0cSIvan Khoronzhuk return 0; 203683fcad0cSIvan Khoronzhuk 203732b78d85SIvan Khoronzhuk ch_rate = rate * 1000; 203883fcad0cSIvan Khoronzhuk min_rate = cpdma_chan_get_min_rate(cpsw->dma); 203932b78d85SIvan Khoronzhuk if ((ch_rate < min_rate && ch_rate)) { 204032b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be less than %dMbps", 204183fcad0cSIvan Khoronzhuk min_rate); 204283fcad0cSIvan Khoronzhuk return -EINVAL; 204383fcad0cSIvan Khoronzhuk } 204483fcad0cSIvan Khoronzhuk 20450be01b8eSIvan Khoronzhuk if (rate > cpsw->speed) { 204632b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be more than 2Gbps"); 204732b78d85SIvan Khoronzhuk return -EINVAL; 204832b78d85SIvan Khoronzhuk } 204932b78d85SIvan Khoronzhuk 205083fcad0cSIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 205183fcad0cSIvan Khoronzhuk if (ret < 0) { 205283fcad0cSIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 205383fcad0cSIvan Khoronzhuk return ret; 205483fcad0cSIvan Khoronzhuk } 205583fcad0cSIvan Khoronzhuk 205632b78d85SIvan Khoronzhuk ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate); 205783fcad0cSIvan Khoronzhuk pm_runtime_put(cpsw->dev); 205832b78d85SIvan Khoronzhuk 205932b78d85SIvan Khoronzhuk if (ret) 206032b78d85SIvan Khoronzhuk return ret; 206132b78d85SIvan Khoronzhuk 206252986a2fSIvan Khoronzhuk /* update rates for slaves tx queues */ 206352986a2fSIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 206452986a2fSIvan Khoronzhuk slave = &cpsw->slaves[i]; 206552986a2fSIvan Khoronzhuk if (!slave->ndev) 206652986a2fSIvan Khoronzhuk continue; 206752986a2fSIvan Khoronzhuk 206852986a2fSIvan Khoronzhuk netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate; 206952986a2fSIvan Khoronzhuk } 207052986a2fSIvan Khoronzhuk 207132b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 207283fcad0cSIvan Khoronzhuk return ret; 207383fcad0cSIvan Khoronzhuk } 207483fcad0cSIvan Khoronzhuk 2075df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = { 2076df828598SMugunthan V N .ndo_open = cpsw_ndo_open, 2077df828598SMugunthan V N .ndo_stop = cpsw_ndo_stop, 2078df828598SMugunthan V N .ndo_start_xmit = cpsw_ndo_start_xmit, 2079dcfd8d58SMugunthan V N .ndo_set_mac_address = cpsw_ndo_set_mac_address, 20802e5b38abSRichard Cochran .ndo_do_ioctl = cpsw_ndo_ioctl, 2081df828598SMugunthan V N .ndo_validate_addr = eth_validate_addr, 2082df828598SMugunthan V N .ndo_tx_timeout = cpsw_ndo_tx_timeout, 20835c50a856SMugunthan V N .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, 208483fcad0cSIvan Khoronzhuk .ndo_set_tx_maxrate = cpsw_ndo_set_tx_maxrate, 2085df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 2086df828598SMugunthan V N .ndo_poll_controller = cpsw_ndo_poll_controller, 2087df828598SMugunthan V N #endif 20883b72c2feSMugunthan V N .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, 20893b72c2feSMugunthan V N .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, 2090df828598SMugunthan V N }; 2091df828598SMugunthan V N 209252c4f0ecSMugunthan V N static int cpsw_get_regs_len(struct net_device *ndev) 209352c4f0ecSMugunthan V N { 2094606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 209552c4f0ecSMugunthan V N 2096606f3993SIvan Khoronzhuk return cpsw->data.ale_entries * ALE_ENTRY_WORDS * sizeof(u32); 209752c4f0ecSMugunthan V N } 209852c4f0ecSMugunthan V N 209952c4f0ecSMugunthan V N static void cpsw_get_regs(struct net_device *ndev, 210052c4f0ecSMugunthan V N struct ethtool_regs *regs, void *p) 210152c4f0ecSMugunthan V N { 210252c4f0ecSMugunthan V N u32 *reg = p; 21032a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 210452c4f0ecSMugunthan V N 210552c4f0ecSMugunthan V N /* update CPSW IP version */ 21062a05a622SIvan Khoronzhuk regs->version = cpsw->version; 210752c4f0ecSMugunthan V N 21082a05a622SIvan Khoronzhuk cpsw_ale_dump(cpsw->ale, reg); 210952c4f0ecSMugunthan V N } 211052c4f0ecSMugunthan V N 2111df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev, 2112df828598SMugunthan V N struct ethtool_drvinfo *info) 2113df828598SMugunthan V N { 2114649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 211556e31bd8SIvan Khoronzhuk struct platform_device *pdev = to_platform_device(cpsw->dev); 21167826d43fSJiri Pirko 211752c4f0ecSMugunthan V N strlcpy(info->driver, "cpsw", sizeof(info->driver)); 21187826d43fSJiri Pirko strlcpy(info->version, "1.0", sizeof(info->version)); 211956e31bd8SIvan Khoronzhuk strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info)); 2120df828598SMugunthan V N } 2121df828598SMugunthan V N 2122df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev) 2123df828598SMugunthan V N { 2124df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2125df828598SMugunthan V N return priv->msg_enable; 2126df828598SMugunthan V N } 2127df828598SMugunthan V N 2128df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 2129df828598SMugunthan V N { 2130df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2131df828598SMugunthan V N priv->msg_enable = value; 2132df828598SMugunthan V N } 2133df828598SMugunthan V N 2134c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 21352e5b38abSRichard Cochran static int cpsw_get_ts_info(struct net_device *ndev, 21362e5b38abSRichard Cochran struct ethtool_ts_info *info) 21372e5b38abSRichard Cochran { 21382a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 21392e5b38abSRichard Cochran 21402e5b38abSRichard Cochran info->so_timestamping = 21412e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_HARDWARE | 21422e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21432e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_HARDWARE | 21442e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21452e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE | 21462e5b38abSRichard Cochran SOF_TIMESTAMPING_RAW_HARDWARE; 21472a05a622SIvan Khoronzhuk info->phc_index = cpsw->cpts->phc_index; 21482e5b38abSRichard Cochran info->tx_types = 21492e5b38abSRichard Cochran (1 << HWTSTAMP_TX_OFF) | 21502e5b38abSRichard Cochran (1 << HWTSTAMP_TX_ON); 21512e5b38abSRichard Cochran info->rx_filters = 21522e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_NONE) | 21532e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); 2154c8395d4eSGrygorii Strashko return 0; 2155c8395d4eSGrygorii Strashko } 21562e5b38abSRichard Cochran #else 2157c8395d4eSGrygorii Strashko static int cpsw_get_ts_info(struct net_device *ndev, 2158c8395d4eSGrygorii Strashko struct ethtool_ts_info *info) 2159c8395d4eSGrygorii Strashko { 21602e5b38abSRichard Cochran info->so_timestamping = 21612e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21622e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21632e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE; 21642e5b38abSRichard Cochran info->phc_index = -1; 21652e5b38abSRichard Cochran info->tx_types = 0; 21662e5b38abSRichard Cochran info->rx_filters = 0; 21672e5b38abSRichard Cochran return 0; 21682e5b38abSRichard Cochran } 2169c8395d4eSGrygorii Strashko #endif 21702e5b38abSRichard Cochran 21712479876dSPhilippe Reynes static int cpsw_get_link_ksettings(struct net_device *ndev, 21722479876dSPhilippe Reynes struct ethtool_link_ksettings *ecmd) 2173d3bb9c58SMugunthan V N { 2174d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2175606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2176606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2177d3bb9c58SMugunthan V N 2178606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 21792479876dSPhilippe Reynes return phy_ethtool_ksettings_get(cpsw->slaves[slave_no].phy, 21802479876dSPhilippe Reynes ecmd); 2181d3bb9c58SMugunthan V N else 2182d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2183d3bb9c58SMugunthan V N } 2184d3bb9c58SMugunthan V N 21852479876dSPhilippe Reynes static int cpsw_set_link_ksettings(struct net_device *ndev, 21862479876dSPhilippe Reynes const struct ethtool_link_ksettings *ecmd) 2187d3bb9c58SMugunthan V N { 2188d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2189606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2190606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2191d3bb9c58SMugunthan V N 2192606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 21932479876dSPhilippe Reynes return phy_ethtool_ksettings_set(cpsw->slaves[slave_no].phy, 21942479876dSPhilippe Reynes ecmd); 2195d3bb9c58SMugunthan V N else 2196d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2197d3bb9c58SMugunthan V N } 2198d3bb9c58SMugunthan V N 2199d8a64420SMatus Ujhelyi static void cpsw_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2200d8a64420SMatus Ujhelyi { 2201d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2202606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2203606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2204d8a64420SMatus Ujhelyi 2205d8a64420SMatus Ujhelyi wol->supported = 0; 2206d8a64420SMatus Ujhelyi wol->wolopts = 0; 2207d8a64420SMatus Ujhelyi 2208606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2209606f3993SIvan Khoronzhuk phy_ethtool_get_wol(cpsw->slaves[slave_no].phy, wol); 2210d8a64420SMatus Ujhelyi } 2211d8a64420SMatus Ujhelyi 2212d8a64420SMatus Ujhelyi static int cpsw_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2213d8a64420SMatus Ujhelyi { 2214d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2215606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2216606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2217d8a64420SMatus Ujhelyi 2218606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2219606f3993SIvan Khoronzhuk return phy_ethtool_set_wol(cpsw->slaves[slave_no].phy, wol); 2220d8a64420SMatus Ujhelyi else 2221d8a64420SMatus Ujhelyi return -EOPNOTSUPP; 2222d8a64420SMatus Ujhelyi } 2223d8a64420SMatus Ujhelyi 22241923d6e4SMugunthan V N static void cpsw_get_pauseparam(struct net_device *ndev, 22251923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22261923d6e4SMugunthan V N { 22271923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22281923d6e4SMugunthan V N 22291923d6e4SMugunthan V N pause->autoneg = AUTONEG_DISABLE; 22301923d6e4SMugunthan V N pause->rx_pause = priv->rx_pause ? true : false; 22311923d6e4SMugunthan V N pause->tx_pause = priv->tx_pause ? true : false; 22321923d6e4SMugunthan V N } 22331923d6e4SMugunthan V N 22341923d6e4SMugunthan V N static int cpsw_set_pauseparam(struct net_device *ndev, 22351923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22361923d6e4SMugunthan V N { 22371923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22381923d6e4SMugunthan V N bool link; 22391923d6e4SMugunthan V N 22401923d6e4SMugunthan V N priv->rx_pause = pause->rx_pause ? true : false; 22411923d6e4SMugunthan V N priv->tx_pause = pause->tx_pause ? true : false; 22421923d6e4SMugunthan V N 22431923d6e4SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 22441923d6e4SMugunthan V N return 0; 22451923d6e4SMugunthan V N } 22461923d6e4SMugunthan V N 22477898b1daSGrygorii Strashko static int cpsw_ethtool_op_begin(struct net_device *ndev) 22487898b1daSGrygorii Strashko { 22497898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2250649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 22517898b1daSGrygorii Strashko int ret; 22527898b1daSGrygorii Strashko 225356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 22547898b1daSGrygorii Strashko if (ret < 0) { 22557898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool begin failed %d\n", ret); 225656e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 22577898b1daSGrygorii Strashko } 22587898b1daSGrygorii Strashko 22597898b1daSGrygorii Strashko return ret; 22607898b1daSGrygorii Strashko } 22617898b1daSGrygorii Strashko 22627898b1daSGrygorii Strashko static void cpsw_ethtool_op_complete(struct net_device *ndev) 22637898b1daSGrygorii Strashko { 22647898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 22657898b1daSGrygorii Strashko int ret; 22667898b1daSGrygorii Strashko 226756e31bd8SIvan Khoronzhuk ret = pm_runtime_put(priv->cpsw->dev); 22687898b1daSGrygorii Strashko if (ret < 0) 22697898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool complete failed %d\n", ret); 22707898b1daSGrygorii Strashko } 22717898b1daSGrygorii Strashko 2272ce52c744SIvan Khoronzhuk static void cpsw_get_channels(struct net_device *ndev, 2273ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2274ce52c744SIvan Khoronzhuk { 2275ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2276ce52c744SIvan Khoronzhuk 2277ce52c744SIvan Khoronzhuk ch->max_combined = 0; 2278ce52c744SIvan Khoronzhuk ch->max_rx = CPSW_MAX_QUEUES; 2279ce52c744SIvan Khoronzhuk ch->max_tx = CPSW_MAX_QUEUES; 2280ce52c744SIvan Khoronzhuk ch->max_other = 0; 2281ce52c744SIvan Khoronzhuk ch->other_count = 0; 2282ce52c744SIvan Khoronzhuk ch->rx_count = cpsw->rx_ch_num; 2283ce52c744SIvan Khoronzhuk ch->tx_count = cpsw->tx_ch_num; 2284ce52c744SIvan Khoronzhuk ch->combined_count = 0; 2285ce52c744SIvan Khoronzhuk } 2286ce52c744SIvan Khoronzhuk 2287ce52c744SIvan Khoronzhuk static int cpsw_check_ch_settings(struct cpsw_common *cpsw, 2288ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2289ce52c744SIvan Khoronzhuk { 2290ce52c744SIvan Khoronzhuk if (ch->combined_count) 2291ce52c744SIvan Khoronzhuk return -EINVAL; 2292ce52c744SIvan Khoronzhuk 2293ce52c744SIvan Khoronzhuk /* verify we have at least one channel in each direction */ 2294ce52c744SIvan Khoronzhuk if (!ch->rx_count || !ch->tx_count) 2295ce52c744SIvan Khoronzhuk return -EINVAL; 2296ce52c744SIvan Khoronzhuk 2297ce52c744SIvan Khoronzhuk if (ch->rx_count > cpsw->data.channels || 2298ce52c744SIvan Khoronzhuk ch->tx_count > cpsw->data.channels) 2299ce52c744SIvan Khoronzhuk return -EINVAL; 2300ce52c744SIvan Khoronzhuk 2301ce52c744SIvan Khoronzhuk return 0; 2302ce52c744SIvan Khoronzhuk } 2303ce52c744SIvan Khoronzhuk 2304ce52c744SIvan Khoronzhuk static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx) 2305ce52c744SIvan Khoronzhuk { 2306ce52c744SIvan Khoronzhuk int (*poll)(struct napi_struct *, int); 2307ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2308ce52c744SIvan Khoronzhuk void (*handler)(void *, int, int); 230983fcad0cSIvan Khoronzhuk struct netdev_queue *queue; 23108feb0a19SIvan Khoronzhuk struct cpsw_vector *vec; 2311ce52c744SIvan Khoronzhuk int ret, *ch; 2312ce52c744SIvan Khoronzhuk 2313ce52c744SIvan Khoronzhuk if (rx) { 2314ce52c744SIvan Khoronzhuk ch = &cpsw->rx_ch_num; 23158feb0a19SIvan Khoronzhuk vec = cpsw->rxv; 2316ce52c744SIvan Khoronzhuk handler = cpsw_rx_handler; 2317ce52c744SIvan Khoronzhuk poll = cpsw_rx_poll; 2318ce52c744SIvan Khoronzhuk } else { 2319ce52c744SIvan Khoronzhuk ch = &cpsw->tx_ch_num; 23208feb0a19SIvan Khoronzhuk vec = cpsw->txv; 2321ce52c744SIvan Khoronzhuk handler = cpsw_tx_handler; 2322ce52c744SIvan Khoronzhuk poll = cpsw_tx_poll; 2323ce52c744SIvan Khoronzhuk } 2324ce52c744SIvan Khoronzhuk 2325ce52c744SIvan Khoronzhuk while (*ch < ch_num) { 23268feb0a19SIvan Khoronzhuk vec[*ch].ch = cpdma_chan_create(cpsw->dma, *ch, handler, rx); 232783fcad0cSIvan Khoronzhuk queue = netdev_get_tx_queue(priv->ndev, *ch); 232883fcad0cSIvan Khoronzhuk queue->tx_maxrate = 0; 2329ce52c744SIvan Khoronzhuk 23308feb0a19SIvan Khoronzhuk if (IS_ERR(vec[*ch].ch)) 23318feb0a19SIvan Khoronzhuk return PTR_ERR(vec[*ch].ch); 2332ce52c744SIvan Khoronzhuk 23338feb0a19SIvan Khoronzhuk if (!vec[*ch].ch) 2334ce52c744SIvan Khoronzhuk return -EINVAL; 2335ce52c744SIvan Khoronzhuk 2336ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "created new %d %s channel\n", *ch, 2337ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2338ce52c744SIvan Khoronzhuk (*ch)++; 2339ce52c744SIvan Khoronzhuk } 2340ce52c744SIvan Khoronzhuk 2341ce52c744SIvan Khoronzhuk while (*ch > ch_num) { 2342ce52c744SIvan Khoronzhuk (*ch)--; 2343ce52c744SIvan Khoronzhuk 23448feb0a19SIvan Khoronzhuk ret = cpdma_chan_destroy(vec[*ch].ch); 2345ce52c744SIvan Khoronzhuk if (ret) 2346ce52c744SIvan Khoronzhuk return ret; 2347ce52c744SIvan Khoronzhuk 2348ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "destroyed %d %s channel\n", *ch, 2349ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2350ce52c744SIvan Khoronzhuk } 2351ce52c744SIvan Khoronzhuk 2352ce52c744SIvan Khoronzhuk return 0; 2353ce52c744SIvan Khoronzhuk } 2354ce52c744SIvan Khoronzhuk 2355ce52c744SIvan Khoronzhuk static int cpsw_update_channels(struct cpsw_priv *priv, 2356ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2357ce52c744SIvan Khoronzhuk { 2358ce52c744SIvan Khoronzhuk int ret; 2359ce52c744SIvan Khoronzhuk 2360ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->rx_count, 1); 2361ce52c744SIvan Khoronzhuk if (ret) 2362ce52c744SIvan Khoronzhuk return ret; 2363ce52c744SIvan Khoronzhuk 2364ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->tx_count, 0); 2365ce52c744SIvan Khoronzhuk if (ret) 2366ce52c744SIvan Khoronzhuk return ret; 2367ce52c744SIvan Khoronzhuk 2368ce52c744SIvan Khoronzhuk return 0; 2369ce52c744SIvan Khoronzhuk } 2370ce52c744SIvan Khoronzhuk 2371ce52c744SIvan Khoronzhuk static int cpsw_set_channels(struct net_device *ndev, 2372ce52c744SIvan Khoronzhuk struct ethtool_channels *chs) 2373ce52c744SIvan Khoronzhuk { 2374ce52c744SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2375ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2376ce52c744SIvan Khoronzhuk struct cpsw_slave *slave; 2377ce52c744SIvan Khoronzhuk int i, ret; 2378ce52c744SIvan Khoronzhuk 2379ce52c744SIvan Khoronzhuk ret = cpsw_check_ch_settings(cpsw, chs); 2380ce52c744SIvan Khoronzhuk if (ret < 0) 2381ce52c744SIvan Khoronzhuk return ret; 2382ce52c744SIvan Khoronzhuk 2383ce52c744SIvan Khoronzhuk /* Disable NAPI scheduling */ 2384ce52c744SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2385ce52c744SIvan Khoronzhuk 2386ce52c744SIvan Khoronzhuk /* Stop all transmit queues for every network device. 2387ce52c744SIvan Khoronzhuk * Disable re-using rx descriptors with dormant_on. 2388ce52c744SIvan Khoronzhuk */ 2389ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2390ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2391ce52c744SIvan Khoronzhuk continue; 2392ce52c744SIvan Khoronzhuk 2393ce52c744SIvan Khoronzhuk netif_tx_stop_all_queues(slave->ndev); 2394ce52c744SIvan Khoronzhuk netif_dormant_on(slave->ndev); 2395ce52c744SIvan Khoronzhuk } 2396ce52c744SIvan Khoronzhuk 2397ce52c744SIvan Khoronzhuk /* Handle rest of tx packets and stop cpdma channels */ 2398ce52c744SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 2399ce52c744SIvan Khoronzhuk ret = cpsw_update_channels(priv, chs); 2400ce52c744SIvan Khoronzhuk if (ret) 2401ce52c744SIvan Khoronzhuk goto err; 2402ce52c744SIvan Khoronzhuk 2403ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2404ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2405ce52c744SIvan Khoronzhuk continue; 2406ce52c744SIvan Khoronzhuk 2407ce52c744SIvan Khoronzhuk /* Inform stack about new count of queues */ 2408ce52c744SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(slave->ndev, 2409ce52c744SIvan Khoronzhuk cpsw->tx_ch_num); 2410ce52c744SIvan Khoronzhuk if (ret) { 2411ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 2412ce52c744SIvan Khoronzhuk goto err; 2413ce52c744SIvan Khoronzhuk } 2414ce52c744SIvan Khoronzhuk 2415ce52c744SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(slave->ndev, 2416ce52c744SIvan Khoronzhuk cpsw->rx_ch_num); 2417ce52c744SIvan Khoronzhuk if (ret) { 2418ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 2419ce52c744SIvan Khoronzhuk goto err; 2420ce52c744SIvan Khoronzhuk } 2421ce52c744SIvan Khoronzhuk 2422ce52c744SIvan Khoronzhuk /* Enable rx packets handling */ 2423ce52c744SIvan Khoronzhuk netif_dormant_off(slave->ndev); 2424ce52c744SIvan Khoronzhuk } 2425ce52c744SIvan Khoronzhuk 2426ce52c744SIvan Khoronzhuk if (cpsw_common_res_usage_state(cpsw)) { 2427e19ac157SWei Yongjun ret = cpsw_fill_rx_channels(priv); 2428e19ac157SWei Yongjun if (ret) 2429ce52c744SIvan Khoronzhuk goto err; 2430ce52c744SIvan Khoronzhuk 243132b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 24328feb0a19SIvan Khoronzhuk 2433ce52c744SIvan Khoronzhuk /* After this receive is started */ 2434ce52c744SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 2435ce52c744SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2436ce52c744SIvan Khoronzhuk } 2437ce52c744SIvan Khoronzhuk 2438ce52c744SIvan Khoronzhuk /* Resume transmit for every affected interface */ 2439ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2440ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2441ce52c744SIvan Khoronzhuk continue; 2442ce52c744SIvan Khoronzhuk netif_tx_start_all_queues(slave->ndev); 2443ce52c744SIvan Khoronzhuk } 2444ce52c744SIvan Khoronzhuk return 0; 2445ce52c744SIvan Khoronzhuk err: 2446ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot update channels number, closing device\n"); 2447ce52c744SIvan Khoronzhuk dev_close(ndev); 2448ce52c744SIvan Khoronzhuk return ret; 2449ce52c744SIvan Khoronzhuk } 2450ce52c744SIvan Khoronzhuk 2451a0909949SYegor Yefremov static int cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata) 2452a0909949SYegor Yefremov { 2453a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2454a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2455a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2456a0909949SYegor Yefremov 2457a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2458a0909949SYegor Yefremov return phy_ethtool_get_eee(cpsw->slaves[slave_no].phy, edata); 2459a0909949SYegor Yefremov else 2460a0909949SYegor Yefremov return -EOPNOTSUPP; 2461a0909949SYegor Yefremov } 2462a0909949SYegor Yefremov 2463a0909949SYegor Yefremov static int cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata) 2464a0909949SYegor Yefremov { 2465a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2466a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2467a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2468a0909949SYegor Yefremov 2469a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2470a0909949SYegor Yefremov return phy_ethtool_set_eee(cpsw->slaves[slave_no].phy, edata); 2471a0909949SYegor Yefremov else 2472a0909949SYegor Yefremov return -EOPNOTSUPP; 2473a0909949SYegor Yefremov } 2474a0909949SYegor Yefremov 24756bb10c2bSYegor Yefremov static int cpsw_nway_reset(struct net_device *ndev) 24766bb10c2bSYegor Yefremov { 24776bb10c2bSYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 24786bb10c2bSYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 24796bb10c2bSYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 24806bb10c2bSYegor Yefremov 24816bb10c2bSYegor Yefremov if (cpsw->slaves[slave_no].phy) 24826bb10c2bSYegor Yefremov return genphy_restart_aneg(cpsw->slaves[slave_no].phy); 24836bb10c2bSYegor Yefremov else 24846bb10c2bSYegor Yefremov return -EOPNOTSUPP; 24856bb10c2bSYegor Yefremov } 24866bb10c2bSYegor Yefremov 2487be034fc1SGrygorii Strashko static void cpsw_get_ringparam(struct net_device *ndev, 2488be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2489be034fc1SGrygorii Strashko { 2490be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2491be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2492be034fc1SGrygorii Strashko 2493be034fc1SGrygorii Strashko /* not supported */ 2494be034fc1SGrygorii Strashko ering->tx_max_pending = 0; 2495be034fc1SGrygorii Strashko ering->tx_pending = cpdma_get_num_tx_descs(cpsw->dma); 2496f89d21b9SIvan Khoronzhuk ering->rx_max_pending = descs_pool_size - CPSW_MAX_QUEUES; 2497be034fc1SGrygorii Strashko ering->rx_pending = cpdma_get_num_rx_descs(cpsw->dma); 2498be034fc1SGrygorii Strashko } 2499be034fc1SGrygorii Strashko 2500be034fc1SGrygorii Strashko static int cpsw_set_ringparam(struct net_device *ndev, 2501be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2502be034fc1SGrygorii Strashko { 2503be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2504be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2505be034fc1SGrygorii Strashko struct cpsw_slave *slave; 2506be034fc1SGrygorii Strashko int i, ret; 2507be034fc1SGrygorii Strashko 2508be034fc1SGrygorii Strashko /* ignore ering->tx_pending - only rx_pending adjustment is supported */ 2509be034fc1SGrygorii Strashko 2510be034fc1SGrygorii Strashko if (ering->rx_mini_pending || ering->rx_jumbo_pending || 2511f89d21b9SIvan Khoronzhuk ering->rx_pending < CPSW_MAX_QUEUES || 2512f89d21b9SIvan Khoronzhuk ering->rx_pending > (descs_pool_size - CPSW_MAX_QUEUES)) 2513be034fc1SGrygorii Strashko return -EINVAL; 2514be034fc1SGrygorii Strashko 2515be034fc1SGrygorii Strashko if (ering->rx_pending == cpdma_get_num_rx_descs(cpsw->dma)) 2516be034fc1SGrygorii Strashko return 0; 2517be034fc1SGrygorii Strashko 2518be034fc1SGrygorii Strashko /* Disable NAPI scheduling */ 2519be034fc1SGrygorii Strashko cpsw_intr_disable(cpsw); 2520be034fc1SGrygorii Strashko 2521be034fc1SGrygorii Strashko /* Stop all transmit queues for every network device. 2522be034fc1SGrygorii Strashko * Disable re-using rx descriptors with dormant_on. 2523be034fc1SGrygorii Strashko */ 2524be034fc1SGrygorii Strashko for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2525be034fc1SGrygorii Strashko if (!(slave->ndev && netif_running(slave->ndev))) 2526be034fc1SGrygorii Strashko continue; 2527be034fc1SGrygorii Strashko 2528be034fc1SGrygorii Strashko netif_tx_stop_all_queues(slave->ndev); 2529be034fc1SGrygorii Strashko netif_dormant_on(slave->ndev); 2530be034fc1SGrygorii Strashko } 2531be034fc1SGrygorii Strashko 2532be034fc1SGrygorii Strashko /* Handle rest of tx packets and stop cpdma channels */ 2533be034fc1SGrygorii Strashko cpdma_ctlr_stop(cpsw->dma); 2534be034fc1SGrygorii Strashko 2535be034fc1SGrygorii Strashko cpdma_set_num_rx_descs(cpsw->dma, ering->rx_pending); 2536be034fc1SGrygorii Strashko 2537be034fc1SGrygorii Strashko for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2538be034fc1SGrygorii Strashko if (!(slave->ndev && netif_running(slave->ndev))) 2539be034fc1SGrygorii Strashko continue; 2540be034fc1SGrygorii Strashko 2541be034fc1SGrygorii Strashko /* Enable rx packets handling */ 2542be034fc1SGrygorii Strashko netif_dormant_off(slave->ndev); 2543be034fc1SGrygorii Strashko } 2544be034fc1SGrygorii Strashko 2545be034fc1SGrygorii Strashko if (cpsw_common_res_usage_state(cpsw)) { 2546be034fc1SGrygorii Strashko cpdma_chan_split_pool(cpsw->dma); 2547be034fc1SGrygorii Strashko 2548be034fc1SGrygorii Strashko ret = cpsw_fill_rx_channels(priv); 2549be034fc1SGrygorii Strashko if (ret) 2550be034fc1SGrygorii Strashko goto err; 2551be034fc1SGrygorii Strashko 2552be034fc1SGrygorii Strashko /* After this receive is started */ 2553be034fc1SGrygorii Strashko cpdma_ctlr_start(cpsw->dma); 2554be034fc1SGrygorii Strashko cpsw_intr_enable(cpsw); 2555be034fc1SGrygorii Strashko } 2556be034fc1SGrygorii Strashko 2557be034fc1SGrygorii Strashko /* Resume transmit for every affected interface */ 2558be034fc1SGrygorii Strashko for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2559be034fc1SGrygorii Strashko if (!(slave->ndev && netif_running(slave->ndev))) 2560be034fc1SGrygorii Strashko continue; 2561be034fc1SGrygorii Strashko netif_tx_start_all_queues(slave->ndev); 2562be034fc1SGrygorii Strashko } 2563be034fc1SGrygorii Strashko return 0; 2564be034fc1SGrygorii Strashko err: 2565be034fc1SGrygorii Strashko dev_err(priv->dev, "cannot set ring params, closing device\n"); 2566be034fc1SGrygorii Strashko dev_close(ndev); 2567be034fc1SGrygorii Strashko return ret; 2568be034fc1SGrygorii Strashko } 2569be034fc1SGrygorii Strashko 2570df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = { 2571df828598SMugunthan V N .get_drvinfo = cpsw_get_drvinfo, 2572df828598SMugunthan V N .get_msglevel = cpsw_get_msglevel, 2573df828598SMugunthan V N .set_msglevel = cpsw_set_msglevel, 2574df828598SMugunthan V N .get_link = ethtool_op_get_link, 25752e5b38abSRichard Cochran .get_ts_info = cpsw_get_ts_info, 2576ff5b8ef2SMugunthan V N .get_coalesce = cpsw_get_coalesce, 2577ff5b8ef2SMugunthan V N .set_coalesce = cpsw_set_coalesce, 2578d9718546SMugunthan V N .get_sset_count = cpsw_get_sset_count, 2579d9718546SMugunthan V N .get_strings = cpsw_get_strings, 2580d9718546SMugunthan V N .get_ethtool_stats = cpsw_get_ethtool_stats, 25811923d6e4SMugunthan V N .get_pauseparam = cpsw_get_pauseparam, 25821923d6e4SMugunthan V N .set_pauseparam = cpsw_set_pauseparam, 2583d8a64420SMatus Ujhelyi .get_wol = cpsw_get_wol, 2584d8a64420SMatus Ujhelyi .set_wol = cpsw_set_wol, 258552c4f0ecSMugunthan V N .get_regs_len = cpsw_get_regs_len, 258652c4f0ecSMugunthan V N .get_regs = cpsw_get_regs, 25877898b1daSGrygorii Strashko .begin = cpsw_ethtool_op_begin, 25887898b1daSGrygorii Strashko .complete = cpsw_ethtool_op_complete, 2589ce52c744SIvan Khoronzhuk .get_channels = cpsw_get_channels, 2590ce52c744SIvan Khoronzhuk .set_channels = cpsw_set_channels, 25912479876dSPhilippe Reynes .get_link_ksettings = cpsw_get_link_ksettings, 25922479876dSPhilippe Reynes .set_link_ksettings = cpsw_set_link_ksettings, 2593a0909949SYegor Yefremov .get_eee = cpsw_get_eee, 2594a0909949SYegor Yefremov .set_eee = cpsw_set_eee, 25956bb10c2bSYegor Yefremov .nway_reset = cpsw_nway_reset, 2596be034fc1SGrygorii Strashko .get_ringparam = cpsw_get_ringparam, 2597be034fc1SGrygorii Strashko .set_ringparam = cpsw_set_ringparam, 2598df828598SMugunthan V N }; 2599df828598SMugunthan V N 2600606f3993SIvan Khoronzhuk static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_common *cpsw, 2601549985eeSRichard Cochran u32 slave_reg_ofs, u32 sliver_reg_ofs) 2602df828598SMugunthan V N { 26035d8d0d4dSIvan Khoronzhuk void __iomem *regs = cpsw->regs; 2604df828598SMugunthan V N int slave_num = slave->slave_num; 2605606f3993SIvan Khoronzhuk struct cpsw_slave_data *data = cpsw->data.slave_data + slave_num; 2606df828598SMugunthan V N 2607df828598SMugunthan V N slave->data = data; 2608549985eeSRichard Cochran slave->regs = regs + slave_reg_ofs; 2609549985eeSRichard Cochran slave->sliver = regs + sliver_reg_ofs; 2610d9ba8f9eSMugunthan V N slave->port_vlan = data->dual_emac_res_vlan; 2611df828598SMugunthan V N } 2612df828598SMugunthan V N 2613552165bcSDavid Rivshin static int cpsw_probe_dt(struct cpsw_platform_data *data, 26142eb32b0aSMugunthan V N struct platform_device *pdev) 26152eb32b0aSMugunthan V N { 26162eb32b0aSMugunthan V N struct device_node *node = pdev->dev.of_node; 26172eb32b0aSMugunthan V N struct device_node *slave_node; 26182eb32b0aSMugunthan V N int i = 0, ret; 26192eb32b0aSMugunthan V N u32 prop; 26202eb32b0aSMugunthan V N 26212eb32b0aSMugunthan V N if (!node) 26222eb32b0aSMugunthan V N return -EINVAL; 26232eb32b0aSMugunthan V N 26242eb32b0aSMugunthan V N if (of_property_read_u32(node, "slaves", &prop)) { 262588c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing slaves property in the DT.\n"); 26262eb32b0aSMugunthan V N return -EINVAL; 26272eb32b0aSMugunthan V N } 26282eb32b0aSMugunthan V N data->slaves = prop; 26292eb32b0aSMugunthan V N 2630e86ac13bSMugunthan V N if (of_property_read_u32(node, "active_slave", &prop)) { 263188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing active_slave property in the DT.\n"); 2632aa1a15e2SDaniel Mack return -EINVAL; 263378ca0b28SRichard Cochran } 2634e86ac13bSMugunthan V N data->active_slave = prop; 263578ca0b28SRichard Cochran 2636aa1a15e2SDaniel Mack data->slave_data = devm_kzalloc(&pdev->dev, data->slaves 2637aa1a15e2SDaniel Mack * sizeof(struct cpsw_slave_data), 2638b2adaca9SJoe Perches GFP_KERNEL); 2639b2adaca9SJoe Perches if (!data->slave_data) 2640aa1a15e2SDaniel Mack return -ENOMEM; 26412eb32b0aSMugunthan V N 26422eb32b0aSMugunthan V N if (of_property_read_u32(node, "cpdma_channels", &prop)) { 264388c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n"); 2644aa1a15e2SDaniel Mack return -EINVAL; 26452eb32b0aSMugunthan V N } 26462eb32b0aSMugunthan V N data->channels = prop; 26472eb32b0aSMugunthan V N 26482eb32b0aSMugunthan V N if (of_property_read_u32(node, "ale_entries", &prop)) { 264988c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n"); 2650aa1a15e2SDaniel Mack return -EINVAL; 26512eb32b0aSMugunthan V N } 26522eb32b0aSMugunthan V N data->ale_entries = prop; 26532eb32b0aSMugunthan V N 26542eb32b0aSMugunthan V N if (of_property_read_u32(node, "bd_ram_size", &prop)) { 265588c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n"); 2656aa1a15e2SDaniel Mack return -EINVAL; 26572eb32b0aSMugunthan V N } 26582eb32b0aSMugunthan V N data->bd_ram_size = prop; 26592eb32b0aSMugunthan V N 26602eb32b0aSMugunthan V N if (of_property_read_u32(node, "mac_control", &prop)) { 266188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing mac_control property in the DT.\n"); 2662aa1a15e2SDaniel Mack return -EINVAL; 26632eb32b0aSMugunthan V N } 26642eb32b0aSMugunthan V N data->mac_control = prop; 26652eb32b0aSMugunthan V N 2666281abd96SMarkus Pargmann if (of_property_read_bool(node, "dual_emac")) 2667281abd96SMarkus Pargmann data->dual_emac = 1; 2668d9ba8f9eSMugunthan V N 26691fb19aa7SVaibhav Hiremath /* 26701fb19aa7SVaibhav Hiremath * Populate all the child nodes here... 26711fb19aa7SVaibhav Hiremath */ 26721fb19aa7SVaibhav Hiremath ret = of_platform_populate(node, NULL, NULL, &pdev->dev); 26731fb19aa7SVaibhav Hiremath /* We do not want to force this, as in some cases may not have child */ 26741fb19aa7SVaibhav Hiremath if (ret) 267588c99ff6SGeorge Cherian dev_warn(&pdev->dev, "Doesn't have any child node\n"); 26761fb19aa7SVaibhav Hiremath 26778658aaf2SBen Hutchings for_each_available_child_of_node(node, slave_node) { 2678549985eeSRichard Cochran struct cpsw_slave_data *slave_data = data->slave_data + i; 2679549985eeSRichard Cochran const void *mac_addr = NULL; 2680549985eeSRichard Cochran int lenp; 2681549985eeSRichard Cochran const __be32 *parp; 2682549985eeSRichard Cochran 2683f468b10eSMarkus Pargmann /* This is no slave child node, continue */ 2684f468b10eSMarkus Pargmann if (strcmp(slave_node->name, "slave")) 2685f468b10eSMarkus Pargmann continue; 2686f468b10eSMarkus Pargmann 2687552165bcSDavid Rivshin slave_data->phy_node = of_parse_phandle(slave_node, 2688552165bcSDavid Rivshin "phy-handle", 0); 2689f1eea5c1SDavid Rivshin parp = of_get_property(slave_node, "phy_id", &lenp); 2690ae092b5bSDavid Rivshin if (slave_data->phy_node) { 2691ae092b5bSDavid Rivshin dev_dbg(&pdev->dev, 2692ae092b5bSDavid Rivshin "slave[%d] using phy-handle=\"%s\"\n", 2693ae092b5bSDavid Rivshin i, slave_data->phy_node->full_name); 2694ae092b5bSDavid Rivshin } else if (of_phy_is_fixed_link(slave_node)) { 2695dfc0a6d3SDavid Rivshin /* In the case of a fixed PHY, the DT node associated 2696dfc0a6d3SDavid Rivshin * to the PHY is the Ethernet MAC DT node. 2697dfc0a6d3SDavid Rivshin */ 26981f71e8c9SMarkus Brunner ret = of_phy_register_fixed_link(slave_node); 269923a09873SJohan Hovold if (ret) { 270023a09873SJohan Hovold if (ret != -EPROBE_DEFER) 270123a09873SJohan Hovold dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret); 27021f71e8c9SMarkus Brunner return ret; 270323a09873SJohan Hovold } 270406cd6d6eSDavid Rivshin slave_data->phy_node = of_node_get(slave_node); 2705f1eea5c1SDavid Rivshin } else if (parp) { 2706f1eea5c1SDavid Rivshin u32 phyid; 2707f1eea5c1SDavid Rivshin struct device_node *mdio_node; 2708f1eea5c1SDavid Rivshin struct platform_device *mdio; 2709f1eea5c1SDavid Rivshin 2710f1eea5c1SDavid Rivshin if (lenp != (sizeof(__be32) * 2)) { 2711f1eea5c1SDavid Rivshin dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i); 271247276fccSMugunthan V N goto no_phy_slave; 2713549985eeSRichard Cochran } 2714549985eeSRichard Cochran mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); 2715549985eeSRichard Cochran phyid = be32_to_cpup(parp+1); 2716549985eeSRichard Cochran mdio = of_find_device_by_node(mdio_node); 271760e71ab5SJohan Hovold of_node_put(mdio_node); 27186954cc1fSJohan Hovold if (!mdio) { 271956fdb2e0SMarkus Pargmann dev_err(&pdev->dev, "Missing mdio platform device\n"); 27206954cc1fSJohan Hovold return -EINVAL; 27216954cc1fSJohan Hovold } 2722549985eeSRichard Cochran snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), 2723549985eeSRichard Cochran PHY_ID_FMT, mdio->name, phyid); 272486e1d5adSJohan Hovold put_device(&mdio->dev); 2725f1eea5c1SDavid Rivshin } else { 2726ae092b5bSDavid Rivshin dev_err(&pdev->dev, 2727ae092b5bSDavid Rivshin "No slave[%d] phy_id, phy-handle, or fixed-link property\n", 2728ae092b5bSDavid Rivshin i); 2729f1eea5c1SDavid Rivshin goto no_phy_slave; 2730f1eea5c1SDavid Rivshin } 273147276fccSMugunthan V N slave_data->phy_if = of_get_phy_mode(slave_node); 273247276fccSMugunthan V N if (slave_data->phy_if < 0) { 273347276fccSMugunthan V N dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n", 273447276fccSMugunthan V N i); 273547276fccSMugunthan V N return slave_data->phy_if; 273647276fccSMugunthan V N } 273747276fccSMugunthan V N 273847276fccSMugunthan V N no_phy_slave: 2739549985eeSRichard Cochran mac_addr = of_get_mac_address(slave_node); 27400ba517b1SMarkus Pargmann if (mac_addr) { 2741549985eeSRichard Cochran memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); 27420ba517b1SMarkus Pargmann } else { 2743b6745f6eSMugunthan V N ret = ti_cm_get_macid(&pdev->dev, i, 27440ba517b1SMarkus Pargmann slave_data->mac_addr); 27450ba517b1SMarkus Pargmann if (ret) 27460ba517b1SMarkus Pargmann return ret; 27470ba517b1SMarkus Pargmann } 2748d9ba8f9eSMugunthan V N if (data->dual_emac) { 274991c4166cSMugunthan V N if (of_property_read_u32(slave_node, "dual_emac_res_vlan", 2750d9ba8f9eSMugunthan V N &prop)) { 275188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n"); 2752d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = i+1; 275388c99ff6SGeorge Cherian dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n", 2754d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan, i); 2755d9ba8f9eSMugunthan V N } else { 2756d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = prop; 2757d9ba8f9eSMugunthan V N } 2758d9ba8f9eSMugunthan V N } 2759d9ba8f9eSMugunthan V N 2760549985eeSRichard Cochran i++; 27613a27bfacSMugunthan V N if (i == data->slaves) 27623a27bfacSMugunthan V N break; 2763549985eeSRichard Cochran } 2764549985eeSRichard Cochran 27652eb32b0aSMugunthan V N return 0; 27662eb32b0aSMugunthan V N } 27672eb32b0aSMugunthan V N 2768a4e32b0dSJohan Hovold static void cpsw_remove_dt(struct platform_device *pdev) 2769a4e32b0dSJohan Hovold { 27708cbcc466SJohan Hovold struct net_device *ndev = platform_get_drvdata(pdev); 27718cbcc466SJohan Hovold struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 27728cbcc466SJohan Hovold struct cpsw_platform_data *data = &cpsw->data; 27738cbcc466SJohan Hovold struct device_node *node = pdev->dev.of_node; 27748cbcc466SJohan Hovold struct device_node *slave_node; 27758cbcc466SJohan Hovold int i = 0; 27768cbcc466SJohan Hovold 27778cbcc466SJohan Hovold for_each_available_child_of_node(node, slave_node) { 27788cbcc466SJohan Hovold struct cpsw_slave_data *slave_data = &data->slave_data[i]; 27798cbcc466SJohan Hovold 27808cbcc466SJohan Hovold if (strcmp(slave_node->name, "slave")) 27818cbcc466SJohan Hovold continue; 27828cbcc466SJohan Hovold 27833f65047cSJohan Hovold if (of_phy_is_fixed_link(slave_node)) 27843f65047cSJohan Hovold of_phy_deregister_fixed_link(slave_node); 27858cbcc466SJohan Hovold 27868cbcc466SJohan Hovold of_node_put(slave_data->phy_node); 27878cbcc466SJohan Hovold 27888cbcc466SJohan Hovold i++; 27898cbcc466SJohan Hovold if (i == data->slaves) 27908cbcc466SJohan Hovold break; 27918cbcc466SJohan Hovold } 27928cbcc466SJohan Hovold 2793a4e32b0dSJohan Hovold of_platform_depopulate(&pdev->dev); 2794a4e32b0dSJohan Hovold } 2795a4e32b0dSJohan Hovold 279656e31bd8SIvan Khoronzhuk static int cpsw_probe_dual_emac(struct cpsw_priv *priv) 2797d9ba8f9eSMugunthan V N { 2798606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2799606f3993SIvan Khoronzhuk struct cpsw_platform_data *data = &cpsw->data; 2800d9ba8f9eSMugunthan V N struct net_device *ndev; 2801d9ba8f9eSMugunthan V N struct cpsw_priv *priv_sl2; 2802e38b5a3dSIvan Khoronzhuk int ret = 0; 2803d9ba8f9eSMugunthan V N 2804e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2805d9ba8f9eSMugunthan V N if (!ndev) { 280656e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error allocating net_device\n"); 2807d9ba8f9eSMugunthan V N return -ENOMEM; 2808d9ba8f9eSMugunthan V N } 2809d9ba8f9eSMugunthan V N 2810d9ba8f9eSMugunthan V N priv_sl2 = netdev_priv(ndev); 2811606f3993SIvan Khoronzhuk priv_sl2->cpsw = cpsw; 2812d9ba8f9eSMugunthan V N priv_sl2->ndev = ndev; 2813d9ba8f9eSMugunthan V N priv_sl2->dev = &ndev->dev; 2814d9ba8f9eSMugunthan V N priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 2815d9ba8f9eSMugunthan V N 2816d9ba8f9eSMugunthan V N if (is_valid_ether_addr(data->slave_data[1].mac_addr)) { 2817d9ba8f9eSMugunthan V N memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr, 2818d9ba8f9eSMugunthan V N ETH_ALEN); 281956e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n", 282056e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2821d9ba8f9eSMugunthan V N } else { 2822d9ba8f9eSMugunthan V N random_ether_addr(priv_sl2->mac_addr); 282356e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n", 282456e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2825d9ba8f9eSMugunthan V N } 2826d9ba8f9eSMugunthan V N memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN); 2827d9ba8f9eSMugunthan V N 2828d9ba8f9eSMugunthan V N priv_sl2->emac_port = 1; 2829606f3993SIvan Khoronzhuk cpsw->slaves[1].ndev = ndev; 2830f646968fSPatrick McHardy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 2831d9ba8f9eSMugunthan V N 2832d9ba8f9eSMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 28337ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 2834d9ba8f9eSMugunthan V N 2835d9ba8f9eSMugunthan V N /* register the network device */ 283656e31bd8SIvan Khoronzhuk SET_NETDEV_DEV(ndev, cpsw->dev); 2837d9ba8f9eSMugunthan V N ret = register_netdev(ndev); 2838d9ba8f9eSMugunthan V N if (ret) { 283956e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error registering net device\n"); 2840d9ba8f9eSMugunthan V N free_netdev(ndev); 2841d9ba8f9eSMugunthan V N ret = -ENODEV; 2842d9ba8f9eSMugunthan V N } 2843d9ba8f9eSMugunthan V N 2844d9ba8f9eSMugunthan V N return ret; 2845d9ba8f9eSMugunthan V N } 2846d9ba8f9eSMugunthan V N 28477da11600SMugunthan V N #define CPSW_QUIRK_IRQ BIT(0) 28487da11600SMugunthan V N 28497da11600SMugunthan V N static struct platform_device_id cpsw_devtype[] = { 28507da11600SMugunthan V N { 28517da11600SMugunthan V N /* keep it for existing comaptibles */ 28527da11600SMugunthan V N .name = "cpsw", 28537da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28547da11600SMugunthan V N }, { 28557da11600SMugunthan V N .name = "am335x-cpsw", 28567da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28577da11600SMugunthan V N }, { 28587da11600SMugunthan V N .name = "am4372-cpsw", 28597da11600SMugunthan V N .driver_data = 0, 28607da11600SMugunthan V N }, { 28617da11600SMugunthan V N .name = "dra7-cpsw", 28627da11600SMugunthan V N .driver_data = 0, 28637da11600SMugunthan V N }, { 28647da11600SMugunthan V N /* sentinel */ 28657da11600SMugunthan V N } 28667da11600SMugunthan V N }; 28677da11600SMugunthan V N MODULE_DEVICE_TABLE(platform, cpsw_devtype); 28687da11600SMugunthan V N 28697da11600SMugunthan V N enum ti_cpsw_type { 28707da11600SMugunthan V N CPSW = 0, 28717da11600SMugunthan V N AM335X_CPSW, 28727da11600SMugunthan V N AM4372_CPSW, 28737da11600SMugunthan V N DRA7_CPSW, 28747da11600SMugunthan V N }; 28757da11600SMugunthan V N 28767da11600SMugunthan V N static const struct of_device_id cpsw_of_mtable[] = { 28777da11600SMugunthan V N { .compatible = "ti,cpsw", .data = &cpsw_devtype[CPSW], }, 28787da11600SMugunthan V N { .compatible = "ti,am335x-cpsw", .data = &cpsw_devtype[AM335X_CPSW], }, 28797da11600SMugunthan V N { .compatible = "ti,am4372-cpsw", .data = &cpsw_devtype[AM4372_CPSW], }, 28807da11600SMugunthan V N { .compatible = "ti,dra7-cpsw", .data = &cpsw_devtype[DRA7_CPSW], }, 28817da11600SMugunthan V N { /* sentinel */ }, 28827da11600SMugunthan V N }; 28837da11600SMugunthan V N MODULE_DEVICE_TABLE(of, cpsw_of_mtable); 28847da11600SMugunthan V N 2885663e12e6SBill Pemberton static int cpsw_probe(struct platform_device *pdev) 2886df828598SMugunthan V N { 2887ef4183a1SIvan Khoronzhuk struct clk *clk; 2888d1bd9acfSSebastian Siewior struct cpsw_platform_data *data; 2889df828598SMugunthan V N struct net_device *ndev; 2890df828598SMugunthan V N struct cpsw_priv *priv; 2891df828598SMugunthan V N struct cpdma_params dma_params; 2892df828598SMugunthan V N struct cpsw_ale_params ale_params; 2893aa1a15e2SDaniel Mack void __iomem *ss_regs; 28948a2c9a5aSGrygorii Strashko void __iomem *cpts_regs; 2895aa1a15e2SDaniel Mack struct resource *res, *ss_res; 28967da11600SMugunthan V N const struct of_device_id *of_id; 28971d147ccbSMugunthan V N struct gpio_descs *mode; 2898549985eeSRichard Cochran u32 slave_offset, sliver_offset, slave_size; 2899649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 29005087b915SFelipe Balbi int ret = 0, i; 29015087b915SFelipe Balbi int irq; 2902df828598SMugunthan V N 2903649a1688SIvan Khoronzhuk cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL); 29043420ea88SJohan Hovold if (!cpsw) 29053420ea88SJohan Hovold return -ENOMEM; 29063420ea88SJohan Hovold 290756e31bd8SIvan Khoronzhuk cpsw->dev = &pdev->dev; 2908649a1688SIvan Khoronzhuk 2909e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2910df828598SMugunthan V N if (!ndev) { 291188c99ff6SGeorge Cherian dev_err(&pdev->dev, "error allocating net_device\n"); 2912df828598SMugunthan V N return -ENOMEM; 2913df828598SMugunthan V N } 2914df828598SMugunthan V N 2915df828598SMugunthan V N platform_set_drvdata(pdev, ndev); 2916df828598SMugunthan V N priv = netdev_priv(ndev); 2917649a1688SIvan Khoronzhuk priv->cpsw = cpsw; 2918df828598SMugunthan V N priv->ndev = ndev; 2919df828598SMugunthan V N priv->dev = &ndev->dev; 2920df828598SMugunthan V N priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 29212a05a622SIvan Khoronzhuk cpsw->rx_packet_max = max(rx_packet_max, 128); 2922df828598SMugunthan V N 29231d147ccbSMugunthan V N mode = devm_gpiod_get_array_optional(&pdev->dev, "mode", GPIOD_OUT_LOW); 29241d147ccbSMugunthan V N if (IS_ERR(mode)) { 29251d147ccbSMugunthan V N ret = PTR_ERR(mode); 29261d147ccbSMugunthan V N dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret); 29271d147ccbSMugunthan V N goto clean_ndev_ret; 29281d147ccbSMugunthan V N } 29291d147ccbSMugunthan V N 29301fb19aa7SVaibhav Hiremath /* 29311fb19aa7SVaibhav Hiremath * This may be required here for child devices. 29321fb19aa7SVaibhav Hiremath */ 29331fb19aa7SVaibhav Hiremath pm_runtime_enable(&pdev->dev); 29341fb19aa7SVaibhav Hiremath 2935739683b4SMugunthan V N /* Select default pin state */ 2936739683b4SMugunthan V N pinctrl_pm_select_default_state(&pdev->dev); 2937739683b4SMugunthan V N 2938a4e32b0dSJohan Hovold /* Need to enable clocks with runtime PM api to access module 2939a4e32b0dSJohan Hovold * registers 2940a4e32b0dSJohan Hovold */ 2941a4e32b0dSJohan Hovold ret = pm_runtime_get_sync(&pdev->dev); 2942a4e32b0dSJohan Hovold if (ret < 0) { 2943a4e32b0dSJohan Hovold pm_runtime_put_noidle(&pdev->dev); 2944aa1a15e2SDaniel Mack goto clean_runtime_disable_ret; 29452eb32b0aSMugunthan V N } 2946a4e32b0dSJohan Hovold 294723a09873SJohan Hovold ret = cpsw_probe_dt(&cpsw->data, pdev); 294823a09873SJohan Hovold if (ret) 2949a4e32b0dSJohan Hovold goto clean_dt_ret; 295023a09873SJohan Hovold 2951606f3993SIvan Khoronzhuk data = &cpsw->data; 2952e05107e6SIvan Khoronzhuk cpsw->rx_ch_num = 1; 2953e05107e6SIvan Khoronzhuk cpsw->tx_ch_num = 1; 29542eb32b0aSMugunthan V N 2955df828598SMugunthan V N if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 2956df828598SMugunthan V N memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 295788c99ff6SGeorge Cherian dev_info(&pdev->dev, "Detected MACID = %pM\n", priv->mac_addr); 2958df828598SMugunthan V N } else { 29597efd26d0SJoe Perches eth_random_addr(priv->mac_addr); 296088c99ff6SGeorge Cherian dev_info(&pdev->dev, "Random MACID = %pM\n", priv->mac_addr); 2961df828598SMugunthan V N } 2962df828598SMugunthan V N 2963df828598SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 2964df828598SMugunthan V N 2965606f3993SIvan Khoronzhuk cpsw->slaves = devm_kzalloc(&pdev->dev, 2966aa1a15e2SDaniel Mack sizeof(struct cpsw_slave) * data->slaves, 2967df828598SMugunthan V N GFP_KERNEL); 2968606f3993SIvan Khoronzhuk if (!cpsw->slaves) { 2969aa1a15e2SDaniel Mack ret = -ENOMEM; 2970a4e32b0dSJohan Hovold goto clean_dt_ret; 2971df828598SMugunthan V N } 2972df828598SMugunthan V N for (i = 0; i < data->slaves; i++) 2973606f3993SIvan Khoronzhuk cpsw->slaves[i].slave_num = i; 2974df828598SMugunthan V N 2975606f3993SIvan Khoronzhuk cpsw->slaves[0].ndev = ndev; 2976d9ba8f9eSMugunthan V N priv->emac_port = 0; 2977d9ba8f9eSMugunthan V N 2978ef4183a1SIvan Khoronzhuk clk = devm_clk_get(&pdev->dev, "fck"); 2979ef4183a1SIvan Khoronzhuk if (IS_ERR(clk)) { 2980aa1a15e2SDaniel Mack dev_err(priv->dev, "fck is not found\n"); 2981f150bd7fSMugunthan V N ret = -ENODEV; 2982a4e32b0dSJohan Hovold goto clean_dt_ret; 2983df828598SMugunthan V N } 29842a05a622SIvan Khoronzhuk cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000; 2985df828598SMugunthan V N 2986aa1a15e2SDaniel Mack ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2987aa1a15e2SDaniel Mack ss_regs = devm_ioremap_resource(&pdev->dev, ss_res); 2988aa1a15e2SDaniel Mack if (IS_ERR(ss_regs)) { 2989aa1a15e2SDaniel Mack ret = PTR_ERR(ss_regs); 2990a4e32b0dSJohan Hovold goto clean_dt_ret; 2991df828598SMugunthan V N } 29925d8d0d4dSIvan Khoronzhuk cpsw->regs = ss_regs; 2993df828598SMugunthan V N 29942a05a622SIvan Khoronzhuk cpsw->version = readl(&cpsw->regs->id_ver); 2995f280e89aSMugunthan V N 2996aa1a15e2SDaniel Mack res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 29975d8d0d4dSIvan Khoronzhuk cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res); 29985d8d0d4dSIvan Khoronzhuk if (IS_ERR(cpsw->wr_regs)) { 29995d8d0d4dSIvan Khoronzhuk ret = PTR_ERR(cpsw->wr_regs); 3000a4e32b0dSJohan Hovold goto clean_dt_ret; 3001df828598SMugunthan V N } 3002df828598SMugunthan V N 3003df828598SMugunthan V N memset(&dma_params, 0, sizeof(dma_params)); 3004549985eeSRichard Cochran memset(&ale_params, 0, sizeof(ale_params)); 3005549985eeSRichard Cochran 30062a05a622SIvan Khoronzhuk switch (cpsw->version) { 3007549985eeSRichard Cochran case CPSW_VERSION_1: 30085d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET; 30098a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW1_CPTS_OFFSET; 30105d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW1_HW_STATS; 3011549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET; 3012549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET; 3013549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET; 3014549985eeSRichard Cochran slave_offset = CPSW1_SLAVE_OFFSET; 3015549985eeSRichard Cochran slave_size = CPSW1_SLAVE_SIZE; 3016549985eeSRichard Cochran sliver_offset = CPSW1_SLIVER_OFFSET; 3017549985eeSRichard Cochran dma_params.desc_mem_phys = 0; 3018549985eeSRichard Cochran break; 3019549985eeSRichard Cochran case CPSW_VERSION_2: 3020c193f365SMugunthan V N case CPSW_VERSION_3: 3021926489beSMugunthan V N case CPSW_VERSION_4: 30225d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET; 30238a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW2_CPTS_OFFSET; 30245d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW2_HW_STATS; 3025549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET; 3026549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET; 3027549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET; 3028549985eeSRichard Cochran slave_offset = CPSW2_SLAVE_OFFSET; 3029549985eeSRichard Cochran slave_size = CPSW2_SLAVE_SIZE; 3030549985eeSRichard Cochran sliver_offset = CPSW2_SLIVER_OFFSET; 3031549985eeSRichard Cochran dma_params.desc_mem_phys = 3032aa1a15e2SDaniel Mack (u32 __force) ss_res->start + CPSW2_BD_OFFSET; 3033549985eeSRichard Cochran break; 3034549985eeSRichard Cochran default: 30352a05a622SIvan Khoronzhuk dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version); 3036549985eeSRichard Cochran ret = -ENODEV; 3037a4e32b0dSJohan Hovold goto clean_dt_ret; 3038549985eeSRichard Cochran } 3039606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3040606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[i]; 3041606f3993SIvan Khoronzhuk 3042606f3993SIvan Khoronzhuk cpsw_slave_init(slave, cpsw, slave_offset, sliver_offset); 3043549985eeSRichard Cochran slave_offset += slave_size; 3044549985eeSRichard Cochran sliver_offset += SLIVER_SIZE; 3045549985eeSRichard Cochran } 3046549985eeSRichard Cochran 3047df828598SMugunthan V N dma_params.dev = &pdev->dev; 3048549985eeSRichard Cochran dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH; 3049549985eeSRichard Cochran dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE; 3050549985eeSRichard Cochran dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP; 3051549985eeSRichard Cochran dma_params.txcp = dma_params.txhdp + CPDMA_TXCP; 3052549985eeSRichard Cochran dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP; 3053df828598SMugunthan V N 3054df828598SMugunthan V N dma_params.num_chan = data->channels; 3055df828598SMugunthan V N dma_params.has_soft_reset = true; 3056df828598SMugunthan V N dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 3057df828598SMugunthan V N dma_params.desc_mem_size = data->bd_ram_size; 3058df828598SMugunthan V N dma_params.desc_align = 16; 3059df828598SMugunthan V N dma_params.has_ext_regs = true; 3060549985eeSRichard Cochran dma_params.desc_hw_addr = dma_params.desc_mem_phys; 306183fcad0cSIvan Khoronzhuk dma_params.bus_freq_mhz = cpsw->bus_freq_mhz; 306290225bf0SGrygorii Strashko dma_params.descs_pool_size = descs_pool_size; 3063df828598SMugunthan V N 30642c836bd9SIvan Khoronzhuk cpsw->dma = cpdma_ctlr_create(&dma_params); 30652c836bd9SIvan Khoronzhuk if (!cpsw->dma) { 3066df828598SMugunthan V N dev_err(priv->dev, "error initializing dma\n"); 3067df828598SMugunthan V N ret = -ENOMEM; 3068a4e32b0dSJohan Hovold goto clean_dt_ret; 3069df828598SMugunthan V N } 3070df828598SMugunthan V N 30718feb0a19SIvan Khoronzhuk cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_tx_handler, 0); 30728feb0a19SIvan Khoronzhuk cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1); 30738feb0a19SIvan Khoronzhuk if (WARN_ON(!cpsw->rxv[0].ch || !cpsw->txv[0].ch)) { 3074df828598SMugunthan V N dev_err(priv->dev, "error initializing dma channels\n"); 3075df828598SMugunthan V N ret = -ENOMEM; 3076df828598SMugunthan V N goto clean_dma_ret; 3077df828598SMugunthan V N } 3078df828598SMugunthan V N 3079df828598SMugunthan V N ale_params.dev = &ndev->dev; 3080df828598SMugunthan V N ale_params.ale_ageout = ale_ageout; 3081df828598SMugunthan V N ale_params.ale_entries = data->ale_entries; 3082df828598SMugunthan V N ale_params.ale_ports = data->slaves; 3083df828598SMugunthan V N 30842a05a622SIvan Khoronzhuk cpsw->ale = cpsw_ale_create(&ale_params); 30852a05a622SIvan Khoronzhuk if (!cpsw->ale) { 3086df828598SMugunthan V N dev_err(priv->dev, "error initializing ale engine\n"); 3087df828598SMugunthan V N ret = -ENODEV; 3088df828598SMugunthan V N goto clean_dma_ret; 3089df828598SMugunthan V N } 3090df828598SMugunthan V N 30914a88fb95SGrygorii Strashko cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node); 30928a2c9a5aSGrygorii Strashko if (IS_ERR(cpsw->cpts)) { 30938a2c9a5aSGrygorii Strashko ret = PTR_ERR(cpsw->cpts); 30948a2c9a5aSGrygorii Strashko goto clean_ale_ret; 30958a2c9a5aSGrygorii Strashko } 30968a2c9a5aSGrygorii Strashko 3097c03abd84SFelipe Balbi ndev->irq = platform_get_irq(pdev, 1); 3098df828598SMugunthan V N if (ndev->irq < 0) { 3099df828598SMugunthan V N dev_err(priv->dev, "error getting irq resource\n"); 3100c1e3334fSJulia Lawall ret = ndev->irq; 3101df828598SMugunthan V N goto clean_ale_ret; 3102df828598SMugunthan V N } 3103df828598SMugunthan V N 31047da11600SMugunthan V N of_id = of_match_device(cpsw_of_mtable, &pdev->dev); 31057da11600SMugunthan V N if (of_id) { 31067da11600SMugunthan V N pdev->id_entry = of_id->data; 31077da11600SMugunthan V N if (pdev->id_entry->driver_data) 3108e38b5a3dSIvan Khoronzhuk cpsw->quirk_irq = true; 31097da11600SMugunthan V N } 31107da11600SMugunthan V N 3111c03abd84SFelipe Balbi /* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and 3112c03abd84SFelipe Balbi * MISC IRQs which are always kept disabled with this driver so 3113c03abd84SFelipe Balbi * we will not request them. 3114c03abd84SFelipe Balbi * 3115c03abd84SFelipe Balbi * If anyone wants to implement support for those, make sure to 3116c03abd84SFelipe Balbi * first request and append them to irqs_table array. 3117c03abd84SFelipe Balbi */ 3118c2b32e58SDaniel Mack 3119c03abd84SFelipe Balbi /* RX IRQ */ 31205087b915SFelipe Balbi irq = platform_get_irq(pdev, 1); 3121c1e3334fSJulia Lawall if (irq < 0) { 3122c1e3334fSJulia Lawall ret = irq; 31235087b915SFelipe Balbi goto clean_ale_ret; 3124c1e3334fSJulia Lawall } 31255087b915SFelipe Balbi 3126e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[0] = irq; 3127c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_rx_interrupt, 3128dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31295087b915SFelipe Balbi if (ret < 0) { 31305087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31315087b915SFelipe Balbi goto clean_ale_ret; 3132df828598SMugunthan V N } 3133df828598SMugunthan V N 3134c03abd84SFelipe Balbi /* TX IRQ */ 31355087b915SFelipe Balbi irq = platform_get_irq(pdev, 2); 3136c1e3334fSJulia Lawall if (irq < 0) { 3137c1e3334fSJulia Lawall ret = irq; 31385087b915SFelipe Balbi goto clean_ale_ret; 3139c1e3334fSJulia Lawall } 31405087b915SFelipe Balbi 3141e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[1] = irq; 3142c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_tx_interrupt, 3143dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31445087b915SFelipe Balbi if (ret < 0) { 31455087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31465087b915SFelipe Balbi goto clean_ale_ret; 31475087b915SFelipe Balbi } 3148c2b32e58SDaniel Mack 3149f646968fSPatrick McHardy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3150df828598SMugunthan V N 3151df828598SMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 31527ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 3153dbc4ec52SIvan Khoronzhuk netif_napi_add(ndev, &cpsw->napi_rx, cpsw_rx_poll, CPSW_POLL_WEIGHT); 3154dbc4ec52SIvan Khoronzhuk netif_tx_napi_add(ndev, &cpsw->napi_tx, cpsw_tx_poll, CPSW_POLL_WEIGHT); 31550be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 3156df828598SMugunthan V N 3157df828598SMugunthan V N /* register the network device */ 3158df828598SMugunthan V N SET_NETDEV_DEV(ndev, &pdev->dev); 3159df828598SMugunthan V N ret = register_netdev(ndev); 3160df828598SMugunthan V N if (ret) { 3161df828598SMugunthan V N dev_err(priv->dev, "error registering net device\n"); 3162df828598SMugunthan V N ret = -ENODEV; 3163aa1a15e2SDaniel Mack goto clean_ale_ret; 3164df828598SMugunthan V N } 3165df828598SMugunthan V N 316690225bf0SGrygorii Strashko cpsw_notice(priv, probe, 316790225bf0SGrygorii Strashko "initialized device (regs %pa, irq %d, pool size %d)\n", 316890225bf0SGrygorii Strashko &ss_res->start, ndev->irq, dma_params.descs_pool_size); 3169606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 317056e31bd8SIvan Khoronzhuk ret = cpsw_probe_dual_emac(priv); 3171d9ba8f9eSMugunthan V N if (ret) { 3172d9ba8f9eSMugunthan V N cpsw_err(priv, probe, "error probe slave 2 emac interface\n"); 3173a7fe9d46SJohan Hovold goto clean_unregister_netdev_ret; 3174d9ba8f9eSMugunthan V N } 3175d9ba8f9eSMugunthan V N } 3176d9ba8f9eSMugunthan V N 3177c46ab7e0SJohan Hovold pm_runtime_put(&pdev->dev); 3178c46ab7e0SJohan Hovold 3179df828598SMugunthan V N return 0; 3180df828598SMugunthan V N 3181a7fe9d46SJohan Hovold clean_unregister_netdev_ret: 3182a7fe9d46SJohan Hovold unregister_netdev(ndev); 3183df828598SMugunthan V N clean_ale_ret: 31842a05a622SIvan Khoronzhuk cpsw_ale_destroy(cpsw->ale); 3185df828598SMugunthan V N clean_dma_ret: 31862c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3187a4e32b0dSJohan Hovold clean_dt_ret: 3188a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 3189c46ab7e0SJohan Hovold pm_runtime_put_sync(&pdev->dev); 3190aa1a15e2SDaniel Mack clean_runtime_disable_ret: 3191f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 3192df828598SMugunthan V N clean_ndev_ret: 3193d1bd9acfSSebastian Siewior free_netdev(priv->ndev); 3194df828598SMugunthan V N return ret; 3195df828598SMugunthan V N } 3196df828598SMugunthan V N 3197663e12e6SBill Pemberton static int cpsw_remove(struct platform_device *pdev) 3198df828598SMugunthan V N { 3199df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 32002a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 32018a0b6dc9SGrygorii Strashko int ret; 32028a0b6dc9SGrygorii Strashko 32038a0b6dc9SGrygorii Strashko ret = pm_runtime_get_sync(&pdev->dev); 32048a0b6dc9SGrygorii Strashko if (ret < 0) { 32058a0b6dc9SGrygorii Strashko pm_runtime_put_noidle(&pdev->dev); 32068a0b6dc9SGrygorii Strashko return ret; 32078a0b6dc9SGrygorii Strashko } 3208df828598SMugunthan V N 3209606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3210606f3993SIvan Khoronzhuk unregister_netdev(cpsw->slaves[1].ndev); 3211d1bd9acfSSebastian Siewior unregister_netdev(ndev); 3212df828598SMugunthan V N 32138a2c9a5aSGrygorii Strashko cpts_release(cpsw->cpts); 32142a05a622SIvan Khoronzhuk cpsw_ale_destroy(cpsw->ale); 32152c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3216a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 32178a0b6dc9SGrygorii Strashko pm_runtime_put_sync(&pdev->dev); 32188a0b6dc9SGrygorii Strashko pm_runtime_disable(&pdev->dev); 3219606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3220606f3993SIvan Khoronzhuk free_netdev(cpsw->slaves[1].ndev); 3221df828598SMugunthan V N free_netdev(ndev); 3222df828598SMugunthan V N return 0; 3223df828598SMugunthan V N } 3224df828598SMugunthan V N 32258963a504SGrygorii Strashko #ifdef CONFIG_PM_SLEEP 3226df828598SMugunthan V N static int cpsw_suspend(struct device *dev) 3227df828598SMugunthan V N { 3228df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3229df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3230606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3231df828598SMugunthan V N 3232606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3233618073e3SMugunthan V N int i; 3234618073e3SMugunthan V N 3235606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3236606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3237606f3993SIvan Khoronzhuk cpsw_ndo_stop(cpsw->slaves[i].ndev); 3238618073e3SMugunthan V N } 3239618073e3SMugunthan V N } else { 3240df828598SMugunthan V N if (netif_running(ndev)) 3241df828598SMugunthan V N cpsw_ndo_stop(ndev); 3242618073e3SMugunthan V N } 32431e7a2e21SDaniel Mack 3244739683b4SMugunthan V N /* Select sleep pin state */ 324556e31bd8SIvan Khoronzhuk pinctrl_pm_select_sleep_state(dev); 3246739683b4SMugunthan V N 3247df828598SMugunthan V N return 0; 3248df828598SMugunthan V N } 3249df828598SMugunthan V N 3250df828598SMugunthan V N static int cpsw_resume(struct device *dev) 3251df828598SMugunthan V N { 3252df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3253df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3254606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = netdev_priv(ndev); 3255df828598SMugunthan V N 3256739683b4SMugunthan V N /* Select default pin state */ 325756e31bd8SIvan Khoronzhuk pinctrl_pm_select_default_state(dev); 3258739683b4SMugunthan V N 32594ccfd638SGrygorii Strashko /* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */ 32604ccfd638SGrygorii Strashko rtnl_lock(); 3261606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3262618073e3SMugunthan V N int i; 3263618073e3SMugunthan V N 3264606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3265606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3266606f3993SIvan Khoronzhuk cpsw_ndo_open(cpsw->slaves[i].ndev); 3267618073e3SMugunthan V N } 3268618073e3SMugunthan V N } else { 3269df828598SMugunthan V N if (netif_running(ndev)) 3270df828598SMugunthan V N cpsw_ndo_open(ndev); 3271618073e3SMugunthan V N } 32724ccfd638SGrygorii Strashko rtnl_unlock(); 32734ccfd638SGrygorii Strashko 3274df828598SMugunthan V N return 0; 3275df828598SMugunthan V N } 32768963a504SGrygorii Strashko #endif 3277df828598SMugunthan V N 32788963a504SGrygorii Strashko static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume); 3279df828598SMugunthan V N 3280df828598SMugunthan V N static struct platform_driver cpsw_driver = { 3281df828598SMugunthan V N .driver = { 3282df828598SMugunthan V N .name = "cpsw", 3283df828598SMugunthan V N .pm = &cpsw_pm_ops, 32841e5c76d4SSachin Kamat .of_match_table = cpsw_of_mtable, 3285df828598SMugunthan V N }, 3286df828598SMugunthan V N .probe = cpsw_probe, 3287663e12e6SBill Pemberton .remove = cpsw_remove, 3288df828598SMugunthan V N }; 3289df828598SMugunthan V N 32906fb3b6b5SGrygorii Strashko module_platform_driver(cpsw_driver); 3291df828598SMugunthan V N 3292df828598SMugunthan V N MODULE_LICENSE("GPL"); 3293df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 3294df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 3295df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 3296