1df828598SMugunthan V N /* 2df828598SMugunthan V N * Texas Instruments Ethernet Switch Driver 3df828598SMugunthan V N * 4df828598SMugunthan V N * Copyright (C) 2012 Texas Instruments 5df828598SMugunthan V N * 6df828598SMugunthan V N * This program is free software; you can redistribute it and/or 7df828598SMugunthan V N * modify it under the terms of the GNU General Public License as 8df828598SMugunthan V N * published by the Free Software Foundation version 2. 9df828598SMugunthan V N * 10df828598SMugunthan V N * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11df828598SMugunthan V N * kind, whether express or implied; without even the implied warranty 12df828598SMugunthan V N * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13df828598SMugunthan V N * GNU General Public License for more details. 14df828598SMugunthan V N */ 15df828598SMugunthan V N 16df828598SMugunthan V N #include <linux/kernel.h> 17df828598SMugunthan V N #include <linux/io.h> 18df828598SMugunthan V N #include <linux/clk.h> 19df828598SMugunthan V N #include <linux/timer.h> 20df828598SMugunthan V N #include <linux/module.h> 21df828598SMugunthan V N #include <linux/platform_device.h> 22df828598SMugunthan V N #include <linux/irqreturn.h> 23df828598SMugunthan V N #include <linux/interrupt.h> 24df828598SMugunthan V N #include <linux/if_ether.h> 25df828598SMugunthan V N #include <linux/etherdevice.h> 26df828598SMugunthan V N #include <linux/netdevice.h> 272e5b38abSRichard Cochran #include <linux/net_tstamp.h> 28df828598SMugunthan V N #include <linux/phy.h> 29df828598SMugunthan V N #include <linux/workqueue.h> 30df828598SMugunthan V N #include <linux/delay.h> 31f150bd7fSMugunthan V N #include <linux/pm_runtime.h> 321d147ccbSMugunthan V N #include <linux/gpio.h> 332eb32b0aSMugunthan V N #include <linux/of.h> 349e42f715SHeiko Schocher #include <linux/of_mdio.h> 352eb32b0aSMugunthan V N #include <linux/of_net.h> 362eb32b0aSMugunthan V N #include <linux/of_device.h> 373b72c2feSMugunthan V N #include <linux/if_vlan.h> 38df828598SMugunthan V N 39739683b4SMugunthan V N #include <linux/pinctrl/consumer.h> 40df828598SMugunthan V N 41dbe34724SMugunthan V N #include "cpsw.h" 42df828598SMugunthan V N #include "cpsw_ale.h" 432e5b38abSRichard Cochran #include "cpts.h" 44df828598SMugunthan V N #include "davinci_cpdma.h" 45df828598SMugunthan V N 46df828598SMugunthan V N #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 47df828598SMugunthan V N NETIF_MSG_DRV | NETIF_MSG_LINK | \ 48df828598SMugunthan V N NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 49df828598SMugunthan V N NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 50df828598SMugunthan V N NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 51df828598SMugunthan V N NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 52df828598SMugunthan V N NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 53df828598SMugunthan V N NETIF_MSG_RX_STATUS) 54df828598SMugunthan V N 55df828598SMugunthan V N #define cpsw_info(priv, type, format, ...) \ 56df828598SMugunthan V N do { \ 57df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 58df828598SMugunthan V N dev_info(priv->dev, format, ## __VA_ARGS__); \ 59df828598SMugunthan V N } while (0) 60df828598SMugunthan V N 61df828598SMugunthan V N #define cpsw_err(priv, type, format, ...) \ 62df828598SMugunthan V N do { \ 63df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 64df828598SMugunthan V N dev_err(priv->dev, format, ## __VA_ARGS__); \ 65df828598SMugunthan V N } while (0) 66df828598SMugunthan V N 67df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...) \ 68df828598SMugunthan V N do { \ 69df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 70df828598SMugunthan V N dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 71df828598SMugunthan V N } while (0) 72df828598SMugunthan V N 73df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...) \ 74df828598SMugunthan V N do { \ 75df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 76df828598SMugunthan V N dev_notice(priv->dev, format, ## __VA_ARGS__); \ 77df828598SMugunthan V N } while (0) 78df828598SMugunthan V N 795c50a856SMugunthan V N #define ALE_ALL_PORTS 0x7 805c50a856SMugunthan V N 81df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 82df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 83df828598SMugunthan V N #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 84df828598SMugunthan V N 85e90cfac6SRichard Cochran #define CPSW_VERSION_1 0x19010a 86e90cfac6SRichard Cochran #define CPSW_VERSION_2 0x19010c 87c193f365SMugunthan V N #define CPSW_VERSION_3 0x19010f 88926489beSMugunthan V N #define CPSW_VERSION_4 0x190112 89549985eeSRichard Cochran 90549985eeSRichard Cochran #define HOST_PORT_NUM 0 91549985eeSRichard Cochran #define SLIVER_SIZE 0x40 92549985eeSRichard Cochran 93549985eeSRichard Cochran #define CPSW1_HOST_PORT_OFFSET 0x028 94549985eeSRichard Cochran #define CPSW1_SLAVE_OFFSET 0x050 95549985eeSRichard Cochran #define CPSW1_SLAVE_SIZE 0x040 96549985eeSRichard Cochran #define CPSW1_CPDMA_OFFSET 0x100 97549985eeSRichard Cochran #define CPSW1_STATERAM_OFFSET 0x200 98d9718546SMugunthan V N #define CPSW1_HW_STATS 0x400 99549985eeSRichard Cochran #define CPSW1_CPTS_OFFSET 0x500 100549985eeSRichard Cochran #define CPSW1_ALE_OFFSET 0x600 101549985eeSRichard Cochran #define CPSW1_SLIVER_OFFSET 0x700 102549985eeSRichard Cochran 103549985eeSRichard Cochran #define CPSW2_HOST_PORT_OFFSET 0x108 104549985eeSRichard Cochran #define CPSW2_SLAVE_OFFSET 0x200 105549985eeSRichard Cochran #define CPSW2_SLAVE_SIZE 0x100 106549985eeSRichard Cochran #define CPSW2_CPDMA_OFFSET 0x800 107d9718546SMugunthan V N #define CPSW2_HW_STATS 0x900 108549985eeSRichard Cochran #define CPSW2_STATERAM_OFFSET 0xa00 109549985eeSRichard Cochran #define CPSW2_CPTS_OFFSET 0xc00 110549985eeSRichard Cochran #define CPSW2_ALE_OFFSET 0xd00 111549985eeSRichard Cochran #define CPSW2_SLIVER_OFFSET 0xd80 112549985eeSRichard Cochran #define CPSW2_BD_OFFSET 0x2000 113549985eeSRichard Cochran 114df828598SMugunthan V N #define CPDMA_RXTHRESH 0x0c0 115df828598SMugunthan V N #define CPDMA_RXFREE 0x0e0 116df828598SMugunthan V N #define CPDMA_TXHDP 0x00 117df828598SMugunthan V N #define CPDMA_RXHDP 0x20 118df828598SMugunthan V N #define CPDMA_TXCP 0x40 119df828598SMugunthan V N #define CPDMA_RXCP 0x60 120df828598SMugunthan V N 121df828598SMugunthan V N #define CPSW_POLL_WEIGHT 64 122df828598SMugunthan V N #define CPSW_MIN_PACKET_SIZE 60 123df828598SMugunthan V N #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4) 124df828598SMugunthan V N 125df828598SMugunthan V N #define RX_PRIORITY_MAPPING 0x76543210 126df828598SMugunthan V N #define TX_PRIORITY_MAPPING 0x33221100 127e05107e6SIvan Khoronzhuk #define CPDMA_TX_PRIORITY_MAP 0x01234567 128df828598SMugunthan V N 1293b72c2feSMugunthan V N #define CPSW_VLAN_AWARE BIT(1) 1303b72c2feSMugunthan V N #define CPSW_ALE_VLAN_AWARE 1 1313b72c2feSMugunthan V N 13235717d8dSJohn Ogness #define CPSW_FIFO_NORMAL_MODE (0 << 16) 13335717d8dSJohn Ogness #define CPSW_FIFO_DUAL_MAC_MODE (1 << 16) 13435717d8dSJohn Ogness #define CPSW_FIFO_RATE_LIMIT_MODE (2 << 16) 135d9ba8f9eSMugunthan V N 136ff5b8ef2SMugunthan V N #define CPSW_INTPACEEN (0x3f << 16) 137ff5b8ef2SMugunthan V N #define CPSW_INTPRESCALE_MASK (0x7FF << 0) 138ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_CNT 63 139ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_CNT 2 140ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_INTVL (1000 / CPSW_CMINTMIN_CNT) 141ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_INTVL ((1000 / CPSW_CMINTMAX_CNT) + 1) 142ff5b8ef2SMugunthan V N 143606f3993SIvan Khoronzhuk #define cpsw_slave_index(cpsw, priv) \ 144606f3993SIvan Khoronzhuk ((cpsw->data.dual_emac) ? priv->emac_port : \ 145606f3993SIvan Khoronzhuk cpsw->data.active_slave) 146e38b5a3dSIvan Khoronzhuk #define IRQ_NUM 2 147e05107e6SIvan Khoronzhuk #define CPSW_MAX_QUEUES 8 14890225bf0SGrygorii Strashko #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 149d3bb9c58SMugunthan V N 150df828598SMugunthan V N static int debug_level; 151df828598SMugunthan V N module_param(debug_level, int, 0); 152df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 153df828598SMugunthan V N 154df828598SMugunthan V N static int ale_ageout = 10; 155df828598SMugunthan V N module_param(ale_ageout, int, 0); 156df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 157df828598SMugunthan V N 158df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 159df828598SMugunthan V N module_param(rx_packet_max, int, 0); 160df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 161df828598SMugunthan V N 16290225bf0SGrygorii Strashko static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT; 16390225bf0SGrygorii Strashko module_param(descs_pool_size, int, 0444); 16490225bf0SGrygorii Strashko MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool"); 16590225bf0SGrygorii Strashko 166996a5c27SRichard Cochran struct cpsw_wr_regs { 167df828598SMugunthan V N u32 id_ver; 168df828598SMugunthan V N u32 soft_reset; 169df828598SMugunthan V N u32 control; 170df828598SMugunthan V N u32 int_control; 171df828598SMugunthan V N u32 rx_thresh_en; 172df828598SMugunthan V N u32 rx_en; 173df828598SMugunthan V N u32 tx_en; 174df828598SMugunthan V N u32 misc_en; 175ff5b8ef2SMugunthan V N u32 mem_allign1[8]; 176ff5b8ef2SMugunthan V N u32 rx_thresh_stat; 177ff5b8ef2SMugunthan V N u32 rx_stat; 178ff5b8ef2SMugunthan V N u32 tx_stat; 179ff5b8ef2SMugunthan V N u32 misc_stat; 180ff5b8ef2SMugunthan V N u32 mem_allign2[8]; 181ff5b8ef2SMugunthan V N u32 rx_imax; 182ff5b8ef2SMugunthan V N u32 tx_imax; 183ff5b8ef2SMugunthan V N 184df828598SMugunthan V N }; 185df828598SMugunthan V N 186996a5c27SRichard Cochran struct cpsw_ss_regs { 187df828598SMugunthan V N u32 id_ver; 188df828598SMugunthan V N u32 control; 189df828598SMugunthan V N u32 soft_reset; 190df828598SMugunthan V N u32 stat_port_en; 191df828598SMugunthan V N u32 ptype; 192bd357af2SRichard Cochran u32 soft_idle; 193bd357af2SRichard Cochran u32 thru_rate; 194bd357af2SRichard Cochran u32 gap_thresh; 195bd357af2SRichard Cochran u32 tx_start_wds; 196bd357af2SRichard Cochran u32 flow_control; 197bd357af2SRichard Cochran u32 vlan_ltype; 198bd357af2SRichard Cochran u32 ts_ltype; 199bd357af2SRichard Cochran u32 dlr_ltype; 200df828598SMugunthan V N }; 201df828598SMugunthan V N 2029750a3adSRichard Cochran /* CPSW_PORT_V1 */ 2039750a3adSRichard Cochran #define CPSW1_MAX_BLKS 0x00 /* Maximum FIFO Blocks */ 2049750a3adSRichard Cochran #define CPSW1_BLK_CNT 0x04 /* FIFO Block Usage Count (Read Only) */ 2059750a3adSRichard Cochran #define CPSW1_TX_IN_CTL 0x08 /* Transmit FIFO Control */ 2069750a3adSRichard Cochran #define CPSW1_PORT_VLAN 0x0c /* VLAN Register */ 2079750a3adSRichard Cochran #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 2089750a3adSRichard Cochran #define CPSW1_TS_CTL 0x14 /* Time Sync Control */ 2099750a3adSRichard Cochran #define CPSW1_TS_SEQ_LTYPE 0x18 /* Time Sync Sequence ID Offset and Msg Type */ 2109750a3adSRichard Cochran #define CPSW1_TS_VLAN 0x1c /* Time Sync VLAN1 and VLAN2 */ 2119750a3adSRichard Cochran 2129750a3adSRichard Cochran /* CPSW_PORT_V2 */ 2139750a3adSRichard Cochran #define CPSW2_CONTROL 0x00 /* Control Register */ 2149750a3adSRichard Cochran #define CPSW2_MAX_BLKS 0x08 /* Maximum FIFO Blocks */ 2159750a3adSRichard Cochran #define CPSW2_BLK_CNT 0x0c /* FIFO Block Usage Count (Read Only) */ 2169750a3adSRichard Cochran #define CPSW2_TX_IN_CTL 0x10 /* Transmit FIFO Control */ 2179750a3adSRichard Cochran #define CPSW2_PORT_VLAN 0x14 /* VLAN Register */ 2189750a3adSRichard Cochran #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 2199750a3adSRichard Cochran #define CPSW2_TS_SEQ_MTYPE 0x1c /* Time Sync Sequence ID Offset and Msg Type */ 2209750a3adSRichard Cochran 2219750a3adSRichard Cochran /* CPSW_PORT_V1 and V2 */ 2229750a3adSRichard Cochran #define SA_LO 0x20 /* CPGMAC_SL Source Address Low */ 2239750a3adSRichard Cochran #define SA_HI 0x24 /* CPGMAC_SL Source Address High */ 2249750a3adSRichard Cochran #define SEND_PERCENT 0x28 /* Transmit Queue Send Percentages */ 2259750a3adSRichard Cochran 2269750a3adSRichard Cochran /* CPSW_PORT_V2 only */ 2279750a3adSRichard Cochran #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */ 2289750a3adSRichard Cochran #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */ 2299750a3adSRichard Cochran #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */ 2309750a3adSRichard Cochran #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */ 2319750a3adSRichard Cochran #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */ 2329750a3adSRichard Cochran #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */ 2339750a3adSRichard Cochran #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */ 2349750a3adSRichard Cochran #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */ 2359750a3adSRichard Cochran 2369750a3adSRichard Cochran /* Bit definitions for the CPSW2_CONTROL register */ 2379750a3adSRichard Cochran #define PASS_PRI_TAGGED (1<<24) /* Pass Priority Tagged */ 2389750a3adSRichard Cochran #define VLAN_LTYPE2_EN (1<<21) /* VLAN LTYPE 2 enable */ 2399750a3adSRichard Cochran #define VLAN_LTYPE1_EN (1<<20) /* VLAN LTYPE 1 enable */ 2409750a3adSRichard Cochran #define DSCP_PRI_EN (1<<16) /* DSCP Priority Enable */ 2419750a3adSRichard Cochran #define TS_320 (1<<14) /* Time Sync Dest Port 320 enable */ 2429750a3adSRichard Cochran #define TS_319 (1<<13) /* Time Sync Dest Port 319 enable */ 2439750a3adSRichard Cochran #define TS_132 (1<<12) /* Time Sync Dest IP Addr 132 enable */ 2449750a3adSRichard Cochran #define TS_131 (1<<11) /* Time Sync Dest IP Addr 131 enable */ 2459750a3adSRichard Cochran #define TS_130 (1<<10) /* Time Sync Dest IP Addr 130 enable */ 2469750a3adSRichard Cochran #define TS_129 (1<<9) /* Time Sync Dest IP Addr 129 enable */ 24709c55372SGeorge Cherian #define TS_TTL_NONZERO (1<<8) /* Time Sync Time To Live Non-zero enable */ 24809c55372SGeorge Cherian #define TS_ANNEX_F_EN (1<<6) /* Time Sync Annex F enable */ 2499750a3adSRichard Cochran #define TS_ANNEX_D_EN (1<<4) /* Time Sync Annex D enable */ 2509750a3adSRichard Cochran #define TS_LTYPE2_EN (1<<3) /* Time Sync LTYPE 2 enable */ 2519750a3adSRichard Cochran #define TS_LTYPE1_EN (1<<2) /* Time Sync LTYPE 1 enable */ 2529750a3adSRichard Cochran #define TS_TX_EN (1<<1) /* Time Sync Transmit Enable */ 2539750a3adSRichard Cochran #define TS_RX_EN (1<<0) /* Time Sync Receive Enable */ 2549750a3adSRichard Cochran 25509c55372SGeorge Cherian #define CTRL_V2_TS_BITS \ 25609c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 25709c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_D_EN | TS_LTYPE1_EN) 2589750a3adSRichard Cochran 25909c55372SGeorge Cherian #define CTRL_V2_ALL_TS_MASK (CTRL_V2_TS_BITS | TS_TX_EN | TS_RX_EN) 26009c55372SGeorge Cherian #define CTRL_V2_TX_TS_BITS (CTRL_V2_TS_BITS | TS_TX_EN) 26109c55372SGeorge Cherian #define CTRL_V2_RX_TS_BITS (CTRL_V2_TS_BITS | TS_RX_EN) 26209c55372SGeorge Cherian 26309c55372SGeorge Cherian 26409c55372SGeorge Cherian #define CTRL_V3_TS_BITS \ 26509c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 26609c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\ 26709c55372SGeorge Cherian TS_LTYPE1_EN) 26809c55372SGeorge Cherian 26909c55372SGeorge Cherian #define CTRL_V3_ALL_TS_MASK (CTRL_V3_TS_BITS | TS_TX_EN | TS_RX_EN) 27009c55372SGeorge Cherian #define CTRL_V3_TX_TS_BITS (CTRL_V3_TS_BITS | TS_TX_EN) 27109c55372SGeorge Cherian #define CTRL_V3_RX_TS_BITS (CTRL_V3_TS_BITS | TS_RX_EN) 2729750a3adSRichard Cochran 2739750a3adSRichard Cochran /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */ 2749750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_SHIFT (16) /* Time Sync Sequence ID Offset */ 2759750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_MASK (0x3f) 2769750a3adSRichard Cochran #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */ 2779750a3adSRichard Cochran #define TS_MSG_TYPE_EN_MASK (0xffff) 2789750a3adSRichard Cochran 2799750a3adSRichard Cochran /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 2809750a3adSRichard Cochran #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3)) 281df828598SMugunthan V N 2822e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_CTL register */ 2832e5b38abSRichard Cochran #define CPSW_V1_TS_RX_EN BIT(0) 2842e5b38abSRichard Cochran #define CPSW_V1_TS_TX_EN BIT(4) 2852e5b38abSRichard Cochran #define CPSW_V1_MSG_TYPE_OFS 16 2862e5b38abSRichard Cochran 2872e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */ 2882e5b38abSRichard Cochran #define CPSW_V1_SEQ_ID_OFS_SHIFT 16 2892e5b38abSRichard Cochran 290df828598SMugunthan V N struct cpsw_host_regs { 291df828598SMugunthan V N u32 max_blks; 292df828598SMugunthan V N u32 blk_cnt; 293d9ba8f9eSMugunthan V N u32 tx_in_ctl; 294df828598SMugunthan V N u32 port_vlan; 295df828598SMugunthan V N u32 tx_pri_map; 296df828598SMugunthan V N u32 cpdma_tx_pri_map; 297df828598SMugunthan V N u32 cpdma_rx_chan_map; 298df828598SMugunthan V N }; 299df828598SMugunthan V N 300df828598SMugunthan V N struct cpsw_sliver_regs { 301df828598SMugunthan V N u32 id_ver; 302df828598SMugunthan V N u32 mac_control; 303df828598SMugunthan V N u32 mac_status; 304df828598SMugunthan V N u32 soft_reset; 305df828598SMugunthan V N u32 rx_maxlen; 306df828598SMugunthan V N u32 __reserved_0; 307df828598SMugunthan V N u32 rx_pause; 308df828598SMugunthan V N u32 tx_pause; 309df828598SMugunthan V N u32 __reserved_1; 310df828598SMugunthan V N u32 rx_pri_map; 311df828598SMugunthan V N }; 312df828598SMugunthan V N 313d9718546SMugunthan V N struct cpsw_hw_stats { 314d9718546SMugunthan V N u32 rxgoodframes; 315d9718546SMugunthan V N u32 rxbroadcastframes; 316d9718546SMugunthan V N u32 rxmulticastframes; 317d9718546SMugunthan V N u32 rxpauseframes; 318d9718546SMugunthan V N u32 rxcrcerrors; 319d9718546SMugunthan V N u32 rxaligncodeerrors; 320d9718546SMugunthan V N u32 rxoversizedframes; 321d9718546SMugunthan V N u32 rxjabberframes; 322d9718546SMugunthan V N u32 rxundersizedframes; 323d9718546SMugunthan V N u32 rxfragments; 324d9718546SMugunthan V N u32 __pad_0[2]; 325d9718546SMugunthan V N u32 rxoctets; 326d9718546SMugunthan V N u32 txgoodframes; 327d9718546SMugunthan V N u32 txbroadcastframes; 328d9718546SMugunthan V N u32 txmulticastframes; 329d9718546SMugunthan V N u32 txpauseframes; 330d9718546SMugunthan V N u32 txdeferredframes; 331d9718546SMugunthan V N u32 txcollisionframes; 332d9718546SMugunthan V N u32 txsinglecollframes; 333d9718546SMugunthan V N u32 txmultcollframes; 334d9718546SMugunthan V N u32 txexcessivecollisions; 335d9718546SMugunthan V N u32 txlatecollisions; 336d9718546SMugunthan V N u32 txunderrun; 337d9718546SMugunthan V N u32 txcarriersenseerrors; 338d9718546SMugunthan V N u32 txoctets; 339d9718546SMugunthan V N u32 octetframes64; 340d9718546SMugunthan V N u32 octetframes65t127; 341d9718546SMugunthan V N u32 octetframes128t255; 342d9718546SMugunthan V N u32 octetframes256t511; 343d9718546SMugunthan V N u32 octetframes512t1023; 344d9718546SMugunthan V N u32 octetframes1024tup; 345d9718546SMugunthan V N u32 netoctets; 346d9718546SMugunthan V N u32 rxsofoverruns; 347d9718546SMugunthan V N u32 rxmofoverruns; 348d9718546SMugunthan V N u32 rxdmaoverruns; 349d9718546SMugunthan V N }; 350d9718546SMugunthan V N 351df828598SMugunthan V N struct cpsw_slave { 3529750a3adSRichard Cochran void __iomem *regs; 353df828598SMugunthan V N struct cpsw_sliver_regs __iomem *sliver; 354df828598SMugunthan V N int slave_num; 355df828598SMugunthan V N u32 mac_control; 356df828598SMugunthan V N struct cpsw_slave_data *data; 357df828598SMugunthan V N struct phy_device *phy; 358d9ba8f9eSMugunthan V N struct net_device *ndev; 359d9ba8f9eSMugunthan V N u32 port_vlan; 360df828598SMugunthan V N }; 361df828598SMugunthan V N 3629750a3adSRichard Cochran static inline u32 slave_read(struct cpsw_slave *slave, u32 offset) 3639750a3adSRichard Cochran { 3649750a3adSRichard Cochran return __raw_readl(slave->regs + offset); 3659750a3adSRichard Cochran } 3669750a3adSRichard Cochran 3679750a3adSRichard Cochran static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset) 3689750a3adSRichard Cochran { 3699750a3adSRichard Cochran __raw_writel(val, slave->regs + offset); 3709750a3adSRichard Cochran } 3719750a3adSRichard Cochran 3728feb0a19SIvan Khoronzhuk struct cpsw_vector { 3738feb0a19SIvan Khoronzhuk struct cpdma_chan *ch; 3748feb0a19SIvan Khoronzhuk int budget; 3758feb0a19SIvan Khoronzhuk }; 3768feb0a19SIvan Khoronzhuk 377649a1688SIvan Khoronzhuk struct cpsw_common { 37856e31bd8SIvan Khoronzhuk struct device *dev; 379606f3993SIvan Khoronzhuk struct cpsw_platform_data data; 380dbc4ec52SIvan Khoronzhuk struct napi_struct napi_rx; 381dbc4ec52SIvan Khoronzhuk struct napi_struct napi_tx; 3825d8d0d4dSIvan Khoronzhuk struct cpsw_ss_regs __iomem *regs; 3835d8d0d4dSIvan Khoronzhuk struct cpsw_wr_regs __iomem *wr_regs; 3845d8d0d4dSIvan Khoronzhuk u8 __iomem *hw_stats; 3855d8d0d4dSIvan Khoronzhuk struct cpsw_host_regs __iomem *host_port_regs; 3862a05a622SIvan Khoronzhuk u32 version; 3872a05a622SIvan Khoronzhuk u32 coal_intvl; 3882a05a622SIvan Khoronzhuk u32 bus_freq_mhz; 3892a05a622SIvan Khoronzhuk int rx_packet_max; 390606f3993SIvan Khoronzhuk struct cpsw_slave *slaves; 3912c836bd9SIvan Khoronzhuk struct cpdma_ctlr *dma; 3928feb0a19SIvan Khoronzhuk struct cpsw_vector txv[CPSW_MAX_QUEUES]; 3938feb0a19SIvan Khoronzhuk struct cpsw_vector rxv[CPSW_MAX_QUEUES]; 3942a05a622SIvan Khoronzhuk struct cpsw_ale *ale; 395e38b5a3dSIvan Khoronzhuk bool quirk_irq; 396e38b5a3dSIvan Khoronzhuk bool rx_irq_disabled; 397e38b5a3dSIvan Khoronzhuk bool tx_irq_disabled; 398e38b5a3dSIvan Khoronzhuk u32 irqs_table[IRQ_NUM]; 3992a05a622SIvan Khoronzhuk struct cpts *cpts; 400e05107e6SIvan Khoronzhuk int rx_ch_num, tx_ch_num; 4010be01b8eSIvan Khoronzhuk int speed; 402d5bc1613SIvan Khoronzhuk int usage_count; 403649a1688SIvan Khoronzhuk }; 404649a1688SIvan Khoronzhuk 405649a1688SIvan Khoronzhuk struct cpsw_priv { 406df828598SMugunthan V N struct net_device *ndev; 407df828598SMugunthan V N struct device *dev; 408df828598SMugunthan V N u32 msg_enable; 409df828598SMugunthan V N u8 mac_addr[ETH_ALEN]; 4101923d6e4SMugunthan V N bool rx_pause; 4111923d6e4SMugunthan V N bool tx_pause; 412d9ba8f9eSMugunthan V N u32 emac_port; 413649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 414df828598SMugunthan V N }; 415df828598SMugunthan V N 416d9718546SMugunthan V N struct cpsw_stats { 417d9718546SMugunthan V N char stat_string[ETH_GSTRING_LEN]; 418d9718546SMugunthan V N int type; 419d9718546SMugunthan V N int sizeof_stat; 420d9718546SMugunthan V N int stat_offset; 421d9718546SMugunthan V N }; 422d9718546SMugunthan V N 423d9718546SMugunthan V N enum { 424d9718546SMugunthan V N CPSW_STATS, 425d9718546SMugunthan V N CPDMA_RX_STATS, 426d9718546SMugunthan V N CPDMA_TX_STATS, 427d9718546SMugunthan V N }; 428d9718546SMugunthan V N 429d9718546SMugunthan V N #define CPSW_STAT(m) CPSW_STATS, \ 430d9718546SMugunthan V N sizeof(((struct cpsw_hw_stats *)0)->m), \ 431d9718546SMugunthan V N offsetof(struct cpsw_hw_stats, m) 432d9718546SMugunthan V N #define CPDMA_RX_STAT(m) CPDMA_RX_STATS, \ 433d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 434d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 435d9718546SMugunthan V N #define CPDMA_TX_STAT(m) CPDMA_TX_STATS, \ 436d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 437d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 438d9718546SMugunthan V N 439d9718546SMugunthan V N static const struct cpsw_stats cpsw_gstrings_stats[] = { 440d9718546SMugunthan V N { "Good Rx Frames", CPSW_STAT(rxgoodframes) }, 441d9718546SMugunthan V N { "Broadcast Rx Frames", CPSW_STAT(rxbroadcastframes) }, 442d9718546SMugunthan V N { "Multicast Rx Frames", CPSW_STAT(rxmulticastframes) }, 443d9718546SMugunthan V N { "Pause Rx Frames", CPSW_STAT(rxpauseframes) }, 444d9718546SMugunthan V N { "Rx CRC Errors", CPSW_STAT(rxcrcerrors) }, 445d9718546SMugunthan V N { "Rx Align/Code Errors", CPSW_STAT(rxaligncodeerrors) }, 446d9718546SMugunthan V N { "Oversize Rx Frames", CPSW_STAT(rxoversizedframes) }, 447d9718546SMugunthan V N { "Rx Jabbers", CPSW_STAT(rxjabberframes) }, 448d9718546SMugunthan V N { "Undersize (Short) Rx Frames", CPSW_STAT(rxundersizedframes) }, 449d9718546SMugunthan V N { "Rx Fragments", CPSW_STAT(rxfragments) }, 450d9718546SMugunthan V N { "Rx Octets", CPSW_STAT(rxoctets) }, 451d9718546SMugunthan V N { "Good Tx Frames", CPSW_STAT(txgoodframes) }, 452d9718546SMugunthan V N { "Broadcast Tx Frames", CPSW_STAT(txbroadcastframes) }, 453d9718546SMugunthan V N { "Multicast Tx Frames", CPSW_STAT(txmulticastframes) }, 454d9718546SMugunthan V N { "Pause Tx Frames", CPSW_STAT(txpauseframes) }, 455d9718546SMugunthan V N { "Deferred Tx Frames", CPSW_STAT(txdeferredframes) }, 456d9718546SMugunthan V N { "Collisions", CPSW_STAT(txcollisionframes) }, 457d9718546SMugunthan V N { "Single Collision Tx Frames", CPSW_STAT(txsinglecollframes) }, 458d9718546SMugunthan V N { "Multiple Collision Tx Frames", CPSW_STAT(txmultcollframes) }, 459d9718546SMugunthan V N { "Excessive Collisions", CPSW_STAT(txexcessivecollisions) }, 460d9718546SMugunthan V N { "Late Collisions", CPSW_STAT(txlatecollisions) }, 461d9718546SMugunthan V N { "Tx Underrun", CPSW_STAT(txunderrun) }, 462d9718546SMugunthan V N { "Carrier Sense Errors", CPSW_STAT(txcarriersenseerrors) }, 463d9718546SMugunthan V N { "Tx Octets", CPSW_STAT(txoctets) }, 464d9718546SMugunthan V N { "Rx + Tx 64 Octet Frames", CPSW_STAT(octetframes64) }, 465d9718546SMugunthan V N { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) }, 466d9718546SMugunthan V N { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) }, 467d9718546SMugunthan V N { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) }, 468d9718546SMugunthan V N { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) }, 469d9718546SMugunthan V N { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) }, 470d9718546SMugunthan V N { "Net Octets", CPSW_STAT(netoctets) }, 471d9718546SMugunthan V N { "Rx Start of Frame Overruns", CPSW_STAT(rxsofoverruns) }, 472d9718546SMugunthan V N { "Rx Middle of Frame Overruns", CPSW_STAT(rxmofoverruns) }, 473d9718546SMugunthan V N { "Rx DMA Overruns", CPSW_STAT(rxdmaoverruns) }, 474d9718546SMugunthan V N }; 475d9718546SMugunthan V N 476e05107e6SIvan Khoronzhuk static const struct cpsw_stats cpsw_gstrings_ch_stats[] = { 477e05107e6SIvan Khoronzhuk { "head_enqueue", CPDMA_RX_STAT(head_enqueue) }, 478e05107e6SIvan Khoronzhuk { "tail_enqueue", CPDMA_RX_STAT(tail_enqueue) }, 479e05107e6SIvan Khoronzhuk { "pad_enqueue", CPDMA_RX_STAT(pad_enqueue) }, 480e05107e6SIvan Khoronzhuk { "misqueued", CPDMA_RX_STAT(misqueued) }, 481e05107e6SIvan Khoronzhuk { "desc_alloc_fail", CPDMA_RX_STAT(desc_alloc_fail) }, 482e05107e6SIvan Khoronzhuk { "pad_alloc_fail", CPDMA_RX_STAT(pad_alloc_fail) }, 483e05107e6SIvan Khoronzhuk { "runt_receive_buf", CPDMA_RX_STAT(runt_receive_buff) }, 484e05107e6SIvan Khoronzhuk { "runt_transmit_buf", CPDMA_RX_STAT(runt_transmit_buff) }, 485e05107e6SIvan Khoronzhuk { "empty_dequeue", CPDMA_RX_STAT(empty_dequeue) }, 486e05107e6SIvan Khoronzhuk { "busy_dequeue", CPDMA_RX_STAT(busy_dequeue) }, 487e05107e6SIvan Khoronzhuk { "good_dequeue", CPDMA_RX_STAT(good_dequeue) }, 488e05107e6SIvan Khoronzhuk { "requeue", CPDMA_RX_STAT(requeue) }, 489e05107e6SIvan Khoronzhuk { "teardown_dequeue", CPDMA_RX_STAT(teardown_dequeue) }, 490e05107e6SIvan Khoronzhuk }; 491e05107e6SIvan Khoronzhuk 492e05107e6SIvan Khoronzhuk #define CPSW_STATS_COMMON_LEN ARRAY_SIZE(cpsw_gstrings_stats) 493e05107e6SIvan Khoronzhuk #define CPSW_STATS_CH_LEN ARRAY_SIZE(cpsw_gstrings_ch_stats) 494d9718546SMugunthan V N 495649a1688SIvan Khoronzhuk #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw) 496dbc4ec52SIvan Khoronzhuk #define napi_to_cpsw(napi) container_of(napi, struct cpsw_common, napi) 497df828598SMugunthan V N #define for_each_slave(priv, func, arg...) \ 498df828598SMugunthan V N do { \ 4996e6ceaedSSebastian Siewior struct cpsw_slave *slave; \ 500606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = (priv)->cpsw; \ 5016e6ceaedSSebastian Siewior int n; \ 502606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) \ 503606f3993SIvan Khoronzhuk (func)((cpsw)->slaves + priv->emac_port, ##arg);\ 504d9ba8f9eSMugunthan V N else \ 505606f3993SIvan Khoronzhuk for (n = cpsw->data.slaves, \ 506606f3993SIvan Khoronzhuk slave = cpsw->slaves; \ 5076e6ceaedSSebastian Siewior n; n--) \ 5086e6ceaedSSebastian Siewior (func)(slave++, ##arg); \ 509df828598SMugunthan V N } while (0) 510d9ba8f9eSMugunthan V N 5112a05a622SIvan Khoronzhuk #define cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb) \ 512d9ba8f9eSMugunthan V N do { \ 513606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) \ 514d9ba8f9eSMugunthan V N break; \ 515d9ba8f9eSMugunthan V N if (CPDMA_RX_SOURCE_PORT(status) == 1) { \ 516606f3993SIvan Khoronzhuk ndev = cpsw->slaves[0].ndev; \ 517d9ba8f9eSMugunthan V N skb->dev = ndev; \ 518d9ba8f9eSMugunthan V N } else if (CPDMA_RX_SOURCE_PORT(status) == 2) { \ 519606f3993SIvan Khoronzhuk ndev = cpsw->slaves[1].ndev; \ 520d9ba8f9eSMugunthan V N skb->dev = ndev; \ 521d9ba8f9eSMugunthan V N } \ 522d9ba8f9eSMugunthan V N } while (0) 523606f3993SIvan Khoronzhuk #define cpsw_add_mcast(cpsw, priv, addr) \ 524d9ba8f9eSMugunthan V N do { \ 525606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { \ 526606f3993SIvan Khoronzhuk struct cpsw_slave *slave = cpsw->slaves + \ 527d9ba8f9eSMugunthan V N priv->emac_port; \ 5286f1f5836SIvan Khoronzhuk int slave_port = cpsw_get_slave_port( \ 529d9ba8f9eSMugunthan V N slave->slave_num); \ 5302a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 53171a2cbb7SGrygorii Strashko 1 << slave_port | ALE_PORT_HOST, \ 532d9ba8f9eSMugunthan V N ALE_VLAN, slave->port_vlan, 0); \ 533d9ba8f9eSMugunthan V N } else { \ 5342a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 53561f1cef9SGrygorii Strashko ALE_ALL_PORTS, \ 536d9ba8f9eSMugunthan V N 0, 0, 0); \ 537d9ba8f9eSMugunthan V N } \ 538d9ba8f9eSMugunthan V N } while (0) 539d9ba8f9eSMugunthan V N 5406f1f5836SIvan Khoronzhuk static inline int cpsw_get_slave_port(u32 slave_num) 541d9ba8f9eSMugunthan V N { 542d9ba8f9eSMugunthan V N return slave_num + 1; 543d9ba8f9eSMugunthan V N } 544df828598SMugunthan V N 5450cd8f9ccSMugunthan V N static void cpsw_set_promiscious(struct net_device *ndev, bool enable) 5460cd8f9ccSMugunthan V N { 5472a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 5482a05a622SIvan Khoronzhuk struct cpsw_ale *ale = cpsw->ale; 5490cd8f9ccSMugunthan V N int i; 5500cd8f9ccSMugunthan V N 551606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 5520cd8f9ccSMugunthan V N bool flag = false; 5530cd8f9ccSMugunthan V N 5540cd8f9ccSMugunthan V N /* Enabling promiscuous mode for one interface will be 5550cd8f9ccSMugunthan V N * common for both the interface as the interface shares 5560cd8f9ccSMugunthan V N * the same hardware resource. 5570cd8f9ccSMugunthan V N */ 558606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 559606f3993SIvan Khoronzhuk if (cpsw->slaves[i].ndev->flags & IFF_PROMISC) 5600cd8f9ccSMugunthan V N flag = true; 5610cd8f9ccSMugunthan V N 5620cd8f9ccSMugunthan V N if (!enable && flag) { 5630cd8f9ccSMugunthan V N enable = true; 5640cd8f9ccSMugunthan V N dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n"); 5650cd8f9ccSMugunthan V N } 5660cd8f9ccSMugunthan V N 5670cd8f9ccSMugunthan V N if (enable) { 5680cd8f9ccSMugunthan V N /* Enable Bypass */ 5690cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1); 5700cd8f9ccSMugunthan V N 5710cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 5720cd8f9ccSMugunthan V N } else { 5730cd8f9ccSMugunthan V N /* Disable Bypass */ 5740cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0); 5750cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 5760cd8f9ccSMugunthan V N } 5770cd8f9ccSMugunthan V N } else { 5780cd8f9ccSMugunthan V N if (enable) { 5790cd8f9ccSMugunthan V N unsigned long timeout = jiffies + HZ; 5800cd8f9ccSMugunthan V N 5816f979eb3SLennart Sorensen /* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */ 582606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 5830cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 5840cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 1); 5850cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 5860cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 1); 5870cd8f9ccSMugunthan V N } 5880cd8f9ccSMugunthan V N 5890cd8f9ccSMugunthan V N /* Clear All Untouched entries */ 5900cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 5910cd8f9ccSMugunthan V N do { 5920cd8f9ccSMugunthan V N cpu_relax(); 5930cd8f9ccSMugunthan V N if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT)) 5940cd8f9ccSMugunthan V N break; 5950cd8f9ccSMugunthan V N } while (time_after(timeout, jiffies)); 5960cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 5970cd8f9ccSMugunthan V N 5980cd8f9ccSMugunthan V N /* Clear all mcast from ALE */ 59961f1cef9SGrygorii Strashko cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1); 6000cd8f9ccSMugunthan V N 6010cd8f9ccSMugunthan V N /* Flood All Unicast Packets to Host port */ 6020cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1); 6030cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 6040cd8f9ccSMugunthan V N } else { 6056f979eb3SLennart Sorensen /* Don't Flood All Unicast Packets to Host port */ 6060cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0); 6070cd8f9ccSMugunthan V N 6086f979eb3SLennart Sorensen /* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */ 609606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6100cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6110cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 0); 6120cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6130cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 0); 6140cd8f9ccSMugunthan V N } 6150cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6160cd8f9ccSMugunthan V N } 6170cd8f9ccSMugunthan V N } 6180cd8f9ccSMugunthan V N } 6190cd8f9ccSMugunthan V N 6205c50a856SMugunthan V N static void cpsw_ndo_set_rx_mode(struct net_device *ndev) 6215c50a856SMugunthan V N { 6225c50a856SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 623606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 62425906052SMugunthan V N int vid; 62525906052SMugunthan V N 626606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 627606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 62825906052SMugunthan V N else 629606f3993SIvan Khoronzhuk vid = cpsw->data.default_vlan; 6305c50a856SMugunthan V N 6315c50a856SMugunthan V N if (ndev->flags & IFF_PROMISC) { 6325c50a856SMugunthan V N /* Enable promiscuous mode */ 6330cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, true); 6342a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI); 6355c50a856SMugunthan V N return; 6360cd8f9ccSMugunthan V N } else { 6370cd8f9ccSMugunthan V N /* Disable promiscuous mode */ 6380cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, false); 6395c50a856SMugunthan V N } 6405c50a856SMugunthan V N 6411e5c4bc4SLennart Sorensen /* Restore allmulti on vlans if necessary */ 6422a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, priv->ndev->flags & IFF_ALLMULTI); 6431e5c4bc4SLennart Sorensen 6445c50a856SMugunthan V N /* Clear all mcast from ALE */ 6452a05a622SIvan Khoronzhuk cpsw_ale_flush_multicast(cpsw->ale, ALE_ALL_PORTS, vid); 6465c50a856SMugunthan V N 6475c50a856SMugunthan V N if (!netdev_mc_empty(ndev)) { 6485c50a856SMugunthan V N struct netdev_hw_addr *ha; 6495c50a856SMugunthan V N 6505c50a856SMugunthan V N /* program multicast address list into ALE register */ 6515c50a856SMugunthan V N netdev_for_each_mc_addr(ha, ndev) { 652606f3993SIvan Khoronzhuk cpsw_add_mcast(cpsw, priv, (u8 *)ha->addr); 6535c50a856SMugunthan V N } 6545c50a856SMugunthan V N } 6555c50a856SMugunthan V N } 6565c50a856SMugunthan V N 6572c836bd9SIvan Khoronzhuk static void cpsw_intr_enable(struct cpsw_common *cpsw) 658df828598SMugunthan V N { 6595d8d0d4dSIvan Khoronzhuk __raw_writel(0xFF, &cpsw->wr_regs->tx_en); 6605d8d0d4dSIvan Khoronzhuk __raw_writel(0xFF, &cpsw->wr_regs->rx_en); 661df828598SMugunthan V N 6622c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, true); 663df828598SMugunthan V N return; 664df828598SMugunthan V N } 665df828598SMugunthan V N 6662c836bd9SIvan Khoronzhuk static void cpsw_intr_disable(struct cpsw_common *cpsw) 667df828598SMugunthan V N { 6685d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->wr_regs->tx_en); 6695d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->wr_regs->rx_en); 670df828598SMugunthan V N 6712c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, false); 672df828598SMugunthan V N return; 673df828598SMugunthan V N } 674df828598SMugunthan V N 6751a3b5056SOlof Johansson static void cpsw_tx_handler(void *token, int len, int status) 676df828598SMugunthan V N { 677e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 678df828598SMugunthan V N struct sk_buff *skb = token; 679df828598SMugunthan V N struct net_device *ndev = skb->dev; 6802a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 681df828598SMugunthan V N 682fae50823SMugunthan V N /* Check whether the queue is stopped due to stalled tx dma, if the 683fae50823SMugunthan V N * queue is stopped then start the queue as we have free desc for tx 684fae50823SMugunthan V N */ 685e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 686e05107e6SIvan Khoronzhuk if (unlikely(netif_tx_queue_stopped(txq))) 687e05107e6SIvan Khoronzhuk netif_tx_wake_queue(txq); 688e05107e6SIvan Khoronzhuk 6892a05a622SIvan Khoronzhuk cpts_tx_timestamp(cpsw->cpts, skb); 6908dc43ddcSTobias Klauser ndev->stats.tx_packets++; 6918dc43ddcSTobias Klauser ndev->stats.tx_bytes += len; 692df828598SMugunthan V N dev_kfree_skb_any(skb); 693df828598SMugunthan V N } 694df828598SMugunthan V N 6951a3b5056SOlof Johansson static void cpsw_rx_handler(void *token, int len, int status) 696df828598SMugunthan V N { 697e05107e6SIvan Khoronzhuk struct cpdma_chan *ch; 698df828598SMugunthan V N struct sk_buff *skb = token; 699b4727e69SSebastian Siewior struct sk_buff *new_skb; 700df828598SMugunthan V N struct net_device *ndev = skb->dev; 701df828598SMugunthan V N int ret = 0; 7022a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 703df828598SMugunthan V N 7042a05a622SIvan Khoronzhuk cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb); 705d9ba8f9eSMugunthan V N 70616e5c57dSMugunthan V N if (unlikely(status < 0) || unlikely(!netif_running(ndev))) { 707a0e2c822SMugunthan V N /* In dual emac mode check for all interfaces */ 708d5bc1613SIvan Khoronzhuk if (cpsw->data.dual_emac && cpsw->usage_count && 709fe734d0aSIvan Khoronzhuk (status >= 0)) { 710a0e2c822SMugunthan V N /* The packet received is for the interface which 711a0e2c822SMugunthan V N * is already down and the other interface is up 712dbedd44eSJoe Perches * and running, instead of freeing which results 713a0e2c822SMugunthan V N * in reducing of the number of rx descriptor in 714a0e2c822SMugunthan V N * DMA engine, requeue skb back to cpdma. 715a0e2c822SMugunthan V N */ 716a0e2c822SMugunthan V N new_skb = skb; 717a0e2c822SMugunthan V N goto requeue; 718a0e2c822SMugunthan V N } 719a0e2c822SMugunthan V N 720b4727e69SSebastian Siewior /* the interface is going down, skbs are purged */ 721df828598SMugunthan V N dev_kfree_skb_any(skb); 722df828598SMugunthan V N return; 723df828598SMugunthan V N } 724b4727e69SSebastian Siewior 7252a05a622SIvan Khoronzhuk new_skb = netdev_alloc_skb_ip_align(ndev, cpsw->rx_packet_max); 726b4727e69SSebastian Siewior if (new_skb) { 727e05107e6SIvan Khoronzhuk skb_copy_queue_mapping(new_skb, skb); 728df828598SMugunthan V N skb_put(skb, len); 7292a05a622SIvan Khoronzhuk cpts_rx_timestamp(cpsw->cpts, skb); 730df828598SMugunthan V N skb->protocol = eth_type_trans(skb, ndev); 731df828598SMugunthan V N netif_receive_skb(skb); 7328dc43ddcSTobias Klauser ndev->stats.rx_bytes += len; 7338dc43ddcSTobias Klauser ndev->stats.rx_packets++; 734254a49d5SGrygorii Strashko kmemleak_not_leak(new_skb); 735b4727e69SSebastian Siewior } else { 7368dc43ddcSTobias Klauser ndev->stats.rx_dropped++; 737b4727e69SSebastian Siewior new_skb = skb; 738df828598SMugunthan V N } 739df828598SMugunthan V N 740a0e2c822SMugunthan V N requeue: 741ce52c744SIvan Khoronzhuk if (netif_dormant(ndev)) { 742ce52c744SIvan Khoronzhuk dev_kfree_skb_any(new_skb); 743ce52c744SIvan Khoronzhuk return; 744ce52c744SIvan Khoronzhuk } 745ce52c744SIvan Khoronzhuk 7468feb0a19SIvan Khoronzhuk ch = cpsw->rxv[skb_get_queue_mapping(new_skb)].ch; 747e05107e6SIvan Khoronzhuk ret = cpdma_chan_submit(ch, new_skb, new_skb->data, 748b4727e69SSebastian Siewior skb_tailroom(new_skb), 0); 749b4727e69SSebastian Siewior if (WARN_ON(ret < 0)) 750b4727e69SSebastian Siewior dev_kfree_skb_any(new_skb); 751df828598SMugunthan V N } 752df828598SMugunthan V N 75332b78d85SIvan Khoronzhuk static void cpsw_split_res(struct net_device *ndev) 75448e0a83eSIvan Khoronzhuk { 75548e0a83eSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 75632b78d85SIvan Khoronzhuk u32 consumed_rate = 0, bigest_rate = 0; 75748e0a83eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 75848e0a83eSIvan Khoronzhuk struct cpsw_vector *txv = cpsw->txv; 75932b78d85SIvan Khoronzhuk int i, ch_weight, rlim_ch_num = 0; 76048e0a83eSIvan Khoronzhuk int budget, bigest_rate_ch = 0; 76148e0a83eSIvan Khoronzhuk u32 ch_rate, max_rate; 76248e0a83eSIvan Khoronzhuk int ch_budget = 0; 76348e0a83eSIvan Khoronzhuk 76448e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 76548e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 76648e0a83eSIvan Khoronzhuk if (!ch_rate) 76748e0a83eSIvan Khoronzhuk continue; 76848e0a83eSIvan Khoronzhuk 76948e0a83eSIvan Khoronzhuk rlim_ch_num++; 77048e0a83eSIvan Khoronzhuk consumed_rate += ch_rate; 77148e0a83eSIvan Khoronzhuk } 77248e0a83eSIvan Khoronzhuk 77348e0a83eSIvan Khoronzhuk if (cpsw->tx_ch_num == rlim_ch_num) { 77448e0a83eSIvan Khoronzhuk max_rate = consumed_rate; 77532b78d85SIvan Khoronzhuk } else if (!rlim_ch_num) { 77632b78d85SIvan Khoronzhuk ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num; 77732b78d85SIvan Khoronzhuk bigest_rate = 0; 77832b78d85SIvan Khoronzhuk max_rate = consumed_rate; 77948e0a83eSIvan Khoronzhuk } else { 7800be01b8eSIvan Khoronzhuk max_rate = cpsw->speed * 1000; 7810be01b8eSIvan Khoronzhuk 7820be01b8eSIvan Khoronzhuk /* if max_rate is less then expected due to reduced link speed, 7830be01b8eSIvan Khoronzhuk * split proportionally according next potential max speed 7840be01b8eSIvan Khoronzhuk */ 7850be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 7860be01b8eSIvan Khoronzhuk max_rate *= 10; 7870be01b8eSIvan Khoronzhuk 7880be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 7890be01b8eSIvan Khoronzhuk max_rate *= 10; 79032b78d85SIvan Khoronzhuk 79148e0a83eSIvan Khoronzhuk ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate; 79248e0a83eSIvan Khoronzhuk ch_budget = (CPSW_POLL_WEIGHT - ch_budget) / 79348e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 79448e0a83eSIvan Khoronzhuk bigest_rate = (max_rate - consumed_rate) / 79548e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 79648e0a83eSIvan Khoronzhuk } 79748e0a83eSIvan Khoronzhuk 79832b78d85SIvan Khoronzhuk /* split tx weight/budget */ 79948e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 80048e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 80148e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 80248e0a83eSIvan Khoronzhuk if (ch_rate) { 80348e0a83eSIvan Khoronzhuk txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate; 80448e0a83eSIvan Khoronzhuk if (!txv[i].budget) 80532b78d85SIvan Khoronzhuk txv[i].budget++; 80648e0a83eSIvan Khoronzhuk if (ch_rate > bigest_rate) { 80748e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 80848e0a83eSIvan Khoronzhuk bigest_rate = ch_rate; 80948e0a83eSIvan Khoronzhuk } 81032b78d85SIvan Khoronzhuk 81132b78d85SIvan Khoronzhuk ch_weight = (ch_rate * 100) / max_rate; 81232b78d85SIvan Khoronzhuk if (!ch_weight) 81332b78d85SIvan Khoronzhuk ch_weight++; 81432b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight); 81548e0a83eSIvan Khoronzhuk } else { 81648e0a83eSIvan Khoronzhuk txv[i].budget = ch_budget; 81748e0a83eSIvan Khoronzhuk if (!bigest_rate_ch) 81848e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 81932b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, 0); 82048e0a83eSIvan Khoronzhuk } 82148e0a83eSIvan Khoronzhuk 82248e0a83eSIvan Khoronzhuk budget -= txv[i].budget; 82348e0a83eSIvan Khoronzhuk } 82448e0a83eSIvan Khoronzhuk 82548e0a83eSIvan Khoronzhuk if (budget) 82648e0a83eSIvan Khoronzhuk txv[bigest_rate_ch].budget += budget; 82748e0a83eSIvan Khoronzhuk 82848e0a83eSIvan Khoronzhuk /* split rx budget */ 82948e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 83048e0a83eSIvan Khoronzhuk ch_budget = budget / cpsw->rx_ch_num; 83148e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->rx_ch_num; i++) { 83248e0a83eSIvan Khoronzhuk cpsw->rxv[i].budget = ch_budget; 83348e0a83eSIvan Khoronzhuk budget -= ch_budget; 83448e0a83eSIvan Khoronzhuk } 83548e0a83eSIvan Khoronzhuk 83648e0a83eSIvan Khoronzhuk if (budget) 83748e0a83eSIvan Khoronzhuk cpsw->rxv[0].budget += budget; 83848e0a83eSIvan Khoronzhuk } 83948e0a83eSIvan Khoronzhuk 840c03abd84SFelipe Balbi static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id) 841df828598SMugunthan V N { 842dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 8437ce67a38SFelipe Balbi 8445d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->tx_en); 8452c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX); 846c03abd84SFelipe Balbi 847e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 848e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[1]); 849e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = true; 8507da11600SMugunthan V N } 8517da11600SMugunthan V N 852dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_tx); 853c03abd84SFelipe Balbi return IRQ_HANDLED; 854c03abd84SFelipe Balbi } 855c03abd84SFelipe Balbi 856c03abd84SFelipe Balbi static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id) 857c03abd84SFelipe Balbi { 858dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 859c03abd84SFelipe Balbi 8602c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX); 8615d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->rx_en); 862fd51cf19SSebastian Siewior 863e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 864e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[0]); 865e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = true; 8667da11600SMugunthan V N } 8677da11600SMugunthan V N 868dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_rx); 869df828598SMugunthan V N return IRQ_HANDLED; 870df828598SMugunthan V N } 871df828598SMugunthan V N 87232a7432cSMugunthan V N static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget) 873df828598SMugunthan V N { 874e05107e6SIvan Khoronzhuk u32 ch_map; 8758feb0a19SIvan Khoronzhuk int num_tx, cur_budget, ch; 876dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_tx); 8778feb0a19SIvan Khoronzhuk struct cpsw_vector *txv; 87832a7432cSMugunthan V N 879e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 880e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_txchs_state(cpsw->dma); 881342934a5SIvan Khoronzhuk for (ch = 0, num_tx = 0; ch_map; ch_map >>= 1, ch++) { 882e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 883e05107e6SIvan Khoronzhuk continue; 884e05107e6SIvan Khoronzhuk 8858feb0a19SIvan Khoronzhuk txv = &cpsw->txv[ch]; 8868feb0a19SIvan Khoronzhuk if (unlikely(txv->budget > budget - num_tx)) 8878feb0a19SIvan Khoronzhuk cur_budget = budget - num_tx; 8888feb0a19SIvan Khoronzhuk else 8898feb0a19SIvan Khoronzhuk cur_budget = txv->budget; 8908feb0a19SIvan Khoronzhuk 8918feb0a19SIvan Khoronzhuk num_tx += cpdma_chan_process(txv->ch, cur_budget); 892342934a5SIvan Khoronzhuk if (num_tx >= budget) 893342934a5SIvan Khoronzhuk break; 894e05107e6SIvan Khoronzhuk } 895e05107e6SIvan Khoronzhuk 89632a7432cSMugunthan V N if (num_tx < budget) { 89732a7432cSMugunthan V N napi_complete(napi_tx); 8985d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->tx_en); 899e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->tx_irq_disabled) { 900e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 901e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 9027da11600SMugunthan V N } 90332a7432cSMugunthan V N } 90432a7432cSMugunthan V N 90532a7432cSMugunthan V N return num_tx; 90632a7432cSMugunthan V N } 90732a7432cSMugunthan V N 90832a7432cSMugunthan V N static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget) 90932a7432cSMugunthan V N { 910e05107e6SIvan Khoronzhuk u32 ch_map; 9118feb0a19SIvan Khoronzhuk int num_rx, cur_budget, ch; 912dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_rx); 9138feb0a19SIvan Khoronzhuk struct cpsw_vector *rxv; 914510a1e72SMugunthan V N 915e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 916e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_rxchs_state(cpsw->dma); 917342934a5SIvan Khoronzhuk for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) { 918e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 919e05107e6SIvan Khoronzhuk continue; 920e05107e6SIvan Khoronzhuk 9218feb0a19SIvan Khoronzhuk rxv = &cpsw->rxv[ch]; 9228feb0a19SIvan Khoronzhuk if (unlikely(rxv->budget > budget - num_rx)) 9238feb0a19SIvan Khoronzhuk cur_budget = budget - num_rx; 9248feb0a19SIvan Khoronzhuk else 9258feb0a19SIvan Khoronzhuk cur_budget = rxv->budget; 9268feb0a19SIvan Khoronzhuk 9278feb0a19SIvan Khoronzhuk num_rx += cpdma_chan_process(rxv->ch, cur_budget); 928342934a5SIvan Khoronzhuk if (num_rx >= budget) 929342934a5SIvan Khoronzhuk break; 930e05107e6SIvan Khoronzhuk } 931e05107e6SIvan Khoronzhuk 932510a1e72SMugunthan V N if (num_rx < budget) { 9336ad20165SEric Dumazet napi_complete_done(napi_rx, num_rx); 9345d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->rx_en); 935e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->rx_irq_disabled) { 936e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 937e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 9387da11600SMugunthan V N } 939510a1e72SMugunthan V N } 940df828598SMugunthan V N 941df828598SMugunthan V N return num_rx; 942df828598SMugunthan V N } 943df828598SMugunthan V N 944df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg) 945df828598SMugunthan V N { 946df828598SMugunthan V N unsigned long timeout = jiffies + HZ; 947df828598SMugunthan V N 948df828598SMugunthan V N __raw_writel(1, reg); 949df828598SMugunthan V N do { 950df828598SMugunthan V N cpu_relax(); 951df828598SMugunthan V N } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies)); 952df828598SMugunthan V N 953df828598SMugunthan V N WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module); 954df828598SMugunthan V N } 955df828598SMugunthan V N 956df828598SMugunthan V N #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ 957df828598SMugunthan V N ((mac)[2] << 16) | ((mac)[3] << 24)) 958df828598SMugunthan V N #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) 959df828598SMugunthan V N 960df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave, 961df828598SMugunthan V N struct cpsw_priv *priv) 962df828598SMugunthan V N { 9639750a3adSRichard Cochran slave_write(slave, mac_hi(priv->mac_addr), SA_HI); 9649750a3adSRichard Cochran slave_write(slave, mac_lo(priv->mac_addr), SA_LO); 965df828598SMugunthan V N } 966df828598SMugunthan V N 967df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave, 968df828598SMugunthan V N struct cpsw_priv *priv, bool *link) 969df828598SMugunthan V N { 970df828598SMugunthan V N struct phy_device *phy = slave->phy; 971df828598SMugunthan V N u32 mac_control = 0; 972df828598SMugunthan V N u32 slave_port; 973606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 974df828598SMugunthan V N 975df828598SMugunthan V N if (!phy) 976df828598SMugunthan V N return; 977df828598SMugunthan V N 9786f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 979df828598SMugunthan V N 980df828598SMugunthan V N if (phy->link) { 981606f3993SIvan Khoronzhuk mac_control = cpsw->data.mac_control; 982df828598SMugunthan V N 983df828598SMugunthan V N /* enable forwarding */ 9842a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 985df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 986df828598SMugunthan V N 987df828598SMugunthan V N if (phy->speed == 1000) 988df828598SMugunthan V N mac_control |= BIT(7); /* GIGABITEN */ 989df828598SMugunthan V N if (phy->duplex) 990df828598SMugunthan V N mac_control |= BIT(0); /* FULLDUPLEXEN */ 991342b7b74SDaniel Mack 992342b7b74SDaniel Mack /* set speed_in input in case RMII mode is used in 100Mbps */ 993342b7b74SDaniel Mack if (phy->speed == 100) 994342b7b74SDaniel Mack mac_control |= BIT(15); 995a81d8762SMugunthan V N else if (phy->speed == 10) 996a81d8762SMugunthan V N mac_control |= BIT(18); /* In Band mode */ 997342b7b74SDaniel Mack 9981923d6e4SMugunthan V N if (priv->rx_pause) 9991923d6e4SMugunthan V N mac_control |= BIT(3); 10001923d6e4SMugunthan V N 10011923d6e4SMugunthan V N if (priv->tx_pause) 10021923d6e4SMugunthan V N mac_control |= BIT(4); 10031923d6e4SMugunthan V N 1004df828598SMugunthan V N *link = true; 1005df828598SMugunthan V N } else { 1006df828598SMugunthan V N mac_control = 0; 1007df828598SMugunthan V N /* disable forwarding */ 10082a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1009df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 1010df828598SMugunthan V N } 1011df828598SMugunthan V N 1012df828598SMugunthan V N if (mac_control != slave->mac_control) { 1013df828598SMugunthan V N phy_print_status(phy); 1014df828598SMugunthan V N __raw_writel(mac_control, &slave->sliver->mac_control); 1015df828598SMugunthan V N } 1016df828598SMugunthan V N 1017df828598SMugunthan V N slave->mac_control = mac_control; 1018df828598SMugunthan V N } 1019df828598SMugunthan V N 10200be01b8eSIvan Khoronzhuk static int cpsw_get_common_speed(struct cpsw_common *cpsw) 10210be01b8eSIvan Khoronzhuk { 10220be01b8eSIvan Khoronzhuk int i, speed; 10230be01b8eSIvan Khoronzhuk 10240be01b8eSIvan Khoronzhuk for (i = 0, speed = 0; i < cpsw->data.slaves; i++) 10250be01b8eSIvan Khoronzhuk if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link) 10260be01b8eSIvan Khoronzhuk speed += cpsw->slaves[i].phy->speed; 10270be01b8eSIvan Khoronzhuk 10280be01b8eSIvan Khoronzhuk return speed; 10290be01b8eSIvan Khoronzhuk } 10300be01b8eSIvan Khoronzhuk 10310be01b8eSIvan Khoronzhuk static int cpsw_need_resplit(struct cpsw_common *cpsw) 10320be01b8eSIvan Khoronzhuk { 10330be01b8eSIvan Khoronzhuk int i, rlim_ch_num; 10340be01b8eSIvan Khoronzhuk int speed, ch_rate; 10350be01b8eSIvan Khoronzhuk 10360be01b8eSIvan Khoronzhuk /* re-split resources only in case speed was changed */ 10370be01b8eSIvan Khoronzhuk speed = cpsw_get_common_speed(cpsw); 10380be01b8eSIvan Khoronzhuk if (speed == cpsw->speed || !speed) 10390be01b8eSIvan Khoronzhuk return 0; 10400be01b8eSIvan Khoronzhuk 10410be01b8eSIvan Khoronzhuk cpsw->speed = speed; 10420be01b8eSIvan Khoronzhuk 10430be01b8eSIvan Khoronzhuk for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) { 10440be01b8eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch); 10450be01b8eSIvan Khoronzhuk if (!ch_rate) 10460be01b8eSIvan Khoronzhuk break; 10470be01b8eSIvan Khoronzhuk 10480be01b8eSIvan Khoronzhuk rlim_ch_num++; 10490be01b8eSIvan Khoronzhuk } 10500be01b8eSIvan Khoronzhuk 10510be01b8eSIvan Khoronzhuk /* cases not dependent on speed */ 10520be01b8eSIvan Khoronzhuk if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num) 10530be01b8eSIvan Khoronzhuk return 0; 10540be01b8eSIvan Khoronzhuk 10550be01b8eSIvan Khoronzhuk return 1; 10560be01b8eSIvan Khoronzhuk } 10570be01b8eSIvan Khoronzhuk 1058df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev) 1059df828598SMugunthan V N { 1060df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 10610be01b8eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1062df828598SMugunthan V N bool link = false; 1063df828598SMugunthan V N 1064df828598SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 1065df828598SMugunthan V N 1066df828598SMugunthan V N if (link) { 10670be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 10680be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 10690be01b8eSIvan Khoronzhuk 1070df828598SMugunthan V N netif_carrier_on(ndev); 1071df828598SMugunthan V N if (netif_running(ndev)) 1072e05107e6SIvan Khoronzhuk netif_tx_wake_all_queues(ndev); 1073df828598SMugunthan V N } else { 1074df828598SMugunthan V N netif_carrier_off(ndev); 1075e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(ndev); 1076df828598SMugunthan V N } 1077df828598SMugunthan V N } 1078df828598SMugunthan V N 1079ff5b8ef2SMugunthan V N static int cpsw_get_coalesce(struct net_device *ndev, 1080ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1081ff5b8ef2SMugunthan V N { 10822a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1083ff5b8ef2SMugunthan V N 10842a05a622SIvan Khoronzhuk coal->rx_coalesce_usecs = cpsw->coal_intvl; 1085ff5b8ef2SMugunthan V N return 0; 1086ff5b8ef2SMugunthan V N } 1087ff5b8ef2SMugunthan V N 1088ff5b8ef2SMugunthan V N static int cpsw_set_coalesce(struct net_device *ndev, 1089ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1090ff5b8ef2SMugunthan V N { 1091ff5b8ef2SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1092ff5b8ef2SMugunthan V N u32 int_ctrl; 1093ff5b8ef2SMugunthan V N u32 num_interrupts = 0; 1094ff5b8ef2SMugunthan V N u32 prescale = 0; 1095ff5b8ef2SMugunthan V N u32 addnl_dvdr = 1; 1096ff5b8ef2SMugunthan V N u32 coal_intvl = 0; 10975d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1098ff5b8ef2SMugunthan V N 1099ff5b8ef2SMugunthan V N coal_intvl = coal->rx_coalesce_usecs; 1100ff5b8ef2SMugunthan V N 11015d8d0d4dSIvan Khoronzhuk int_ctrl = readl(&cpsw->wr_regs->int_control); 11022a05a622SIvan Khoronzhuk prescale = cpsw->bus_freq_mhz * 4; 1103ff5b8ef2SMugunthan V N 1104a84bc2a9SMugunthan V N if (!coal->rx_coalesce_usecs) { 1105a84bc2a9SMugunthan V N int_ctrl &= ~(CPSW_INTPRESCALE_MASK | CPSW_INTPACEEN); 1106a84bc2a9SMugunthan V N goto update_return; 1107a84bc2a9SMugunthan V N } 1108a84bc2a9SMugunthan V N 1109ff5b8ef2SMugunthan V N if (coal_intvl < CPSW_CMINTMIN_INTVL) 1110ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMIN_INTVL; 1111ff5b8ef2SMugunthan V N 1112ff5b8ef2SMugunthan V N if (coal_intvl > CPSW_CMINTMAX_INTVL) { 1113ff5b8ef2SMugunthan V N /* Interrupt pacer works with 4us Pulse, we can 1114ff5b8ef2SMugunthan V N * throttle further by dilating the 4us pulse. 1115ff5b8ef2SMugunthan V N */ 1116ff5b8ef2SMugunthan V N addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale; 1117ff5b8ef2SMugunthan V N 1118ff5b8ef2SMugunthan V N if (addnl_dvdr > 1) { 1119ff5b8ef2SMugunthan V N prescale *= addnl_dvdr; 1120ff5b8ef2SMugunthan V N if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr)) 1121ff5b8ef2SMugunthan V N coal_intvl = (CPSW_CMINTMAX_INTVL 1122ff5b8ef2SMugunthan V N * addnl_dvdr); 1123ff5b8ef2SMugunthan V N } else { 1124ff5b8ef2SMugunthan V N addnl_dvdr = 1; 1125ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMAX_INTVL; 1126ff5b8ef2SMugunthan V N } 1127ff5b8ef2SMugunthan V N } 1128ff5b8ef2SMugunthan V N 1129ff5b8ef2SMugunthan V N num_interrupts = (1000 * addnl_dvdr) / coal_intvl; 11305d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->rx_imax); 11315d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->tx_imax); 1132ff5b8ef2SMugunthan V N 1133ff5b8ef2SMugunthan V N int_ctrl |= CPSW_INTPACEEN; 1134ff5b8ef2SMugunthan V N int_ctrl &= (~CPSW_INTPRESCALE_MASK); 1135ff5b8ef2SMugunthan V N int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK); 1136a84bc2a9SMugunthan V N 1137a84bc2a9SMugunthan V N update_return: 11385d8d0d4dSIvan Khoronzhuk writel(int_ctrl, &cpsw->wr_regs->int_control); 1139ff5b8ef2SMugunthan V N 1140ff5b8ef2SMugunthan V N cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl); 11412a05a622SIvan Khoronzhuk cpsw->coal_intvl = coal_intvl; 1142ff5b8ef2SMugunthan V N 1143ff5b8ef2SMugunthan V N return 0; 1144ff5b8ef2SMugunthan V N } 1145ff5b8ef2SMugunthan V N 1146d9718546SMugunthan V N static int cpsw_get_sset_count(struct net_device *ndev, int sset) 1147d9718546SMugunthan V N { 1148e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1149e05107e6SIvan Khoronzhuk 1150d9718546SMugunthan V N switch (sset) { 1151d9718546SMugunthan V N case ETH_SS_STATS: 1152e05107e6SIvan Khoronzhuk return (CPSW_STATS_COMMON_LEN + 1153e05107e6SIvan Khoronzhuk (cpsw->rx_ch_num + cpsw->tx_ch_num) * 1154e05107e6SIvan Khoronzhuk CPSW_STATS_CH_LEN); 1155d9718546SMugunthan V N default: 1156d9718546SMugunthan V N return -EOPNOTSUPP; 1157d9718546SMugunthan V N } 1158d9718546SMugunthan V N } 1159d9718546SMugunthan V N 1160e05107e6SIvan Khoronzhuk static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) 1161e05107e6SIvan Khoronzhuk { 1162e05107e6SIvan Khoronzhuk int ch_stats_len; 1163e05107e6SIvan Khoronzhuk int line; 1164e05107e6SIvan Khoronzhuk int i; 1165e05107e6SIvan Khoronzhuk 1166e05107e6SIvan Khoronzhuk ch_stats_len = CPSW_STATS_CH_LEN * ch_num; 1167e05107e6SIvan Khoronzhuk for (i = 0; i < ch_stats_len; i++) { 1168e05107e6SIvan Khoronzhuk line = i % CPSW_STATS_CH_LEN; 1169e05107e6SIvan Khoronzhuk snprintf(*p, ETH_GSTRING_LEN, 1170e05107e6SIvan Khoronzhuk "%s DMA chan %d: %s", rx_dir ? "Rx" : "Tx", 1171e05107e6SIvan Khoronzhuk i / CPSW_STATS_CH_LEN, 1172e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[line].stat_string); 1173e05107e6SIvan Khoronzhuk *p += ETH_GSTRING_LEN; 1174e05107e6SIvan Khoronzhuk } 1175e05107e6SIvan Khoronzhuk } 1176e05107e6SIvan Khoronzhuk 1177d9718546SMugunthan V N static void cpsw_get_strings(struct net_device *ndev, u32 stringset, u8 *data) 1178d9718546SMugunthan V N { 1179e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1180d9718546SMugunthan V N u8 *p = data; 1181d9718546SMugunthan V N int i; 1182d9718546SMugunthan V N 1183d9718546SMugunthan V N switch (stringset) { 1184d9718546SMugunthan V N case ETH_SS_STATS: 1185e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_COMMON_LEN; i++) { 1186d9718546SMugunthan V N memcpy(p, cpsw_gstrings_stats[i].stat_string, 1187d9718546SMugunthan V N ETH_GSTRING_LEN); 1188d9718546SMugunthan V N p += ETH_GSTRING_LEN; 1189d9718546SMugunthan V N } 1190e05107e6SIvan Khoronzhuk 1191e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->rx_ch_num, 1); 1192e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->tx_ch_num, 0); 1193d9718546SMugunthan V N break; 1194d9718546SMugunthan V N } 1195d9718546SMugunthan V N } 1196d9718546SMugunthan V N 1197d9718546SMugunthan V N static void cpsw_get_ethtool_stats(struct net_device *ndev, 1198d9718546SMugunthan V N struct ethtool_stats *stats, u64 *data) 1199d9718546SMugunthan V N { 1200d9718546SMugunthan V N u8 *p; 12012c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1202e05107e6SIvan Khoronzhuk struct cpdma_chan_stats ch_stats; 1203e05107e6SIvan Khoronzhuk int i, l, ch; 1204d9718546SMugunthan V N 1205d9718546SMugunthan V N /* Collect Davinci CPDMA stats for Rx and Tx Channel */ 1206e05107e6SIvan Khoronzhuk for (l = 0; l < CPSW_STATS_COMMON_LEN; l++) 1207e05107e6SIvan Khoronzhuk data[l] = readl(cpsw->hw_stats + 1208e05107e6SIvan Khoronzhuk cpsw_gstrings_stats[l].stat_offset); 1209d9718546SMugunthan V N 1210e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 12118feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->rxv[ch].ch, &ch_stats); 1212e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1213e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1214e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1215e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1216e05107e6SIvan Khoronzhuk } 1217e05107e6SIvan Khoronzhuk } 1218d9718546SMugunthan V N 1219e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 12208feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->txv[ch].ch, &ch_stats); 1221e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1222e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1223e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1224e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1225d9718546SMugunthan V N } 1226d9718546SMugunthan V N } 1227d9718546SMugunthan V N } 1228d9718546SMugunthan V N 122927e9e103SIvan Khoronzhuk static inline int cpsw_tx_packet_submit(struct cpsw_priv *priv, 1230e05107e6SIvan Khoronzhuk struct sk_buff *skb, 1231e05107e6SIvan Khoronzhuk struct cpdma_chan *txch) 1232d9ba8f9eSMugunthan V N { 12332c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 12342c836bd9SIvan Khoronzhuk 1235e05107e6SIvan Khoronzhuk return cpdma_chan_submit(txch, skb, skb->data, skb->len, 1236606f3993SIvan Khoronzhuk priv->emac_port + cpsw->data.dual_emac); 1237d9ba8f9eSMugunthan V N } 1238d9ba8f9eSMugunthan V N 1239d9ba8f9eSMugunthan V N static inline void cpsw_add_dual_emac_def_ale_entries( 1240d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct cpsw_slave *slave, 1241d9ba8f9eSMugunthan V N u32 slave_port) 1242d9ba8f9eSMugunthan V N { 12432a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 124471a2cbb7SGrygorii Strashko u32 port_mask = 1 << slave_port | ALE_PORT_HOST; 1245d9ba8f9eSMugunthan V N 12462a05a622SIvan Khoronzhuk if (cpsw->version == CPSW_VERSION_1) 1247d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN); 1248d9ba8f9eSMugunthan V N else 1249d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN); 12502a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask, 1251d9ba8f9eSMugunthan V N port_mask, port_mask, 0); 12522a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1253d9ba8f9eSMugunthan V N port_mask, ALE_VLAN, slave->port_vlan, 0); 12542a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 12552a05a622SIvan Khoronzhuk HOST_PORT_NUM, ALE_VLAN | 12562a05a622SIvan Khoronzhuk ALE_SECURE, slave->port_vlan); 1257d9ba8f9eSMugunthan V N } 1258d9ba8f9eSMugunthan V N 12591e7a2e21SDaniel Mack static void soft_reset_slave(struct cpsw_slave *slave) 1260df828598SMugunthan V N { 1261df828598SMugunthan V N char name[32]; 12621e7a2e21SDaniel Mack 12631e7a2e21SDaniel Mack snprintf(name, sizeof(name), "slave-%d", slave->slave_num); 12641e7a2e21SDaniel Mack soft_reset(name, &slave->sliver->soft_reset); 12651e7a2e21SDaniel Mack } 12661e7a2e21SDaniel Mack 12671e7a2e21SDaniel Mack static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 12681e7a2e21SDaniel Mack { 1269df828598SMugunthan V N u32 slave_port; 1270649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1271df828598SMugunthan V N 12721e7a2e21SDaniel Mack soft_reset_slave(slave); 1273df828598SMugunthan V N 1274df828598SMugunthan V N /* setup priority mapping */ 1275df828598SMugunthan V N __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 12769750a3adSRichard Cochran 12772a05a622SIvan Khoronzhuk switch (cpsw->version) { 12789750a3adSRichard Cochran case CPSW_VERSION_1: 12799750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP); 12809750a3adSRichard Cochran break; 12819750a3adSRichard Cochran case CPSW_VERSION_2: 1282c193f365SMugunthan V N case CPSW_VERSION_3: 1283926489beSMugunthan V N case CPSW_VERSION_4: 12849750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP); 12859750a3adSRichard Cochran break; 12869750a3adSRichard Cochran } 1287df828598SMugunthan V N 1288df828598SMugunthan V N /* setup max packet size, and mac address */ 12892a05a622SIvan Khoronzhuk __raw_writel(cpsw->rx_packet_max, &slave->sliver->rx_maxlen); 1290df828598SMugunthan V N cpsw_set_slave_mac(slave, priv); 1291df828598SMugunthan V N 1292df828598SMugunthan V N slave->mac_control = 0; /* no link yet */ 1293df828598SMugunthan V N 12946f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1295df828598SMugunthan V N 1296606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1297d9ba8f9eSMugunthan V N cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port); 1298d9ba8f9eSMugunthan V N else 12992a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1300e11b220fSMugunthan V N 1 << slave_port, 0, 0, ALE_MCAST_FWD_2); 1301df828598SMugunthan V N 1302d733f754SDavid Rivshin if (slave->data->phy_node) { 1303552165bcSDavid Rivshin slave->phy = of_phy_connect(priv->ndev, slave->data->phy_node, 13049e42f715SHeiko Schocher &cpsw_adjust_link, 0, slave->data->phy_if); 1305d733f754SDavid Rivshin if (!slave->phy) { 1306d733f754SDavid Rivshin dev_err(priv->dev, "phy \"%s\" not found on slave %d\n", 1307d733f754SDavid Rivshin slave->data->phy_node->full_name, 1308d733f754SDavid Rivshin slave->slave_num); 1309d733f754SDavid Rivshin return; 1310d733f754SDavid Rivshin } 1311d733f754SDavid Rivshin } else { 1312df828598SMugunthan V N slave->phy = phy_connect(priv->ndev, slave->data->phy_id, 1313f9a8f83bSFlorian Fainelli &cpsw_adjust_link, slave->data->phy_if); 1314df828598SMugunthan V N if (IS_ERR(slave->phy)) { 1315d733f754SDavid Rivshin dev_err(priv->dev, 1316d733f754SDavid Rivshin "phy \"%s\" not found on slave %d, err %ld\n", 1317d733f754SDavid Rivshin slave->data->phy_id, slave->slave_num, 1318d733f754SDavid Rivshin PTR_ERR(slave->phy)); 1319df828598SMugunthan V N slave->phy = NULL; 1320d733f754SDavid Rivshin return; 1321d733f754SDavid Rivshin } 1322d733f754SDavid Rivshin } 1323d733f754SDavid Rivshin 13242220943aSAndrew Lunn phy_attached_info(slave->phy); 13252220943aSAndrew Lunn 1326df828598SMugunthan V N phy_start(slave->phy); 1327388367a5SMugunthan V N 1328388367a5SMugunthan V N /* Configure GMII_SEL register */ 132956e31bd8SIvan Khoronzhuk cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num); 1330df828598SMugunthan V N } 1331df828598SMugunthan V N 13323b72c2feSMugunthan V N static inline void cpsw_add_default_vlan(struct cpsw_priv *priv) 13333b72c2feSMugunthan V N { 1334606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1335606f3993SIvan Khoronzhuk const int vlan = cpsw->data.default_vlan; 13363b72c2feSMugunthan V N u32 reg; 13373b72c2feSMugunthan V N int i; 13381e5c4bc4SLennart Sorensen int unreg_mcast_mask; 13393b72c2feSMugunthan V N 13402a05a622SIvan Khoronzhuk reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN : 13413b72c2feSMugunthan V N CPSW2_PORT_VLAN; 13423b72c2feSMugunthan V N 13435d8d0d4dSIvan Khoronzhuk writel(vlan, &cpsw->host_port_regs->port_vlan); 13443b72c2feSMugunthan V N 1345606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 1346606f3993SIvan Khoronzhuk slave_write(cpsw->slaves + i, vlan, reg); 13473b72c2feSMugunthan V N 13481e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 13491e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 13501e5c4bc4SLennart Sorensen else 13511e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 13521e5c4bc4SLennart Sorensen 13532a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS, 135461f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 135561f1cef9SGrygorii Strashko unreg_mcast_mask); 13563b72c2feSMugunthan V N } 13573b72c2feSMugunthan V N 1358df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv) 1359df828598SMugunthan V N { 1360d9ba8f9eSMugunthan V N u32 fifo_mode; 13615d8d0d4dSIvan Khoronzhuk u32 control_reg; 13625d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 13633b72c2feSMugunthan V N 1364df828598SMugunthan V N /* soft reset the controller and initialize ale */ 13655d8d0d4dSIvan Khoronzhuk soft_reset("cpsw", &cpsw->regs->soft_reset); 13662a05a622SIvan Khoronzhuk cpsw_ale_start(cpsw->ale); 1367df828598SMugunthan V N 1368df828598SMugunthan V N /* switch to vlan unaware mode */ 13692a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 13703b72c2feSMugunthan V N CPSW_ALE_VLAN_AWARE); 13715d8d0d4dSIvan Khoronzhuk control_reg = readl(&cpsw->regs->control); 13723b72c2feSMugunthan V N control_reg |= CPSW_VLAN_AWARE; 13735d8d0d4dSIvan Khoronzhuk writel(control_reg, &cpsw->regs->control); 1374606f3993SIvan Khoronzhuk fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE : 1375d9ba8f9eSMugunthan V N CPSW_FIFO_NORMAL_MODE; 13765d8d0d4dSIvan Khoronzhuk writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl); 1377df828598SMugunthan V N 1378df828598SMugunthan V N /* setup host port priority mapping */ 1379df828598SMugunthan V N __raw_writel(CPDMA_TX_PRIORITY_MAP, 13805d8d0d4dSIvan Khoronzhuk &cpsw->host_port_regs->cpdma_tx_pri_map); 13815d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->host_port_regs->cpdma_rx_chan_map); 1382df828598SMugunthan V N 13832a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, 1384df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1385df828598SMugunthan V N 1386606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) { 13872a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1388d9ba8f9eSMugunthan V N 0, 0); 13892a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 139071a2cbb7SGrygorii Strashko ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2); 1391df828598SMugunthan V N } 1392d9ba8f9eSMugunthan V N } 1393df828598SMugunthan V N 13943802dce1SIvan Khoronzhuk static int cpsw_fill_rx_channels(struct cpsw_priv *priv) 13953802dce1SIvan Khoronzhuk { 13963802dce1SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 13973802dce1SIvan Khoronzhuk struct sk_buff *skb; 13983802dce1SIvan Khoronzhuk int ch_buf_num; 1399e05107e6SIvan Khoronzhuk int ch, i, ret; 14003802dce1SIvan Khoronzhuk 1401e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 14028feb0a19SIvan Khoronzhuk ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch); 14033802dce1SIvan Khoronzhuk for (i = 0; i < ch_buf_num; i++) { 14043802dce1SIvan Khoronzhuk skb = __netdev_alloc_skb_ip_align(priv->ndev, 14053802dce1SIvan Khoronzhuk cpsw->rx_packet_max, 14063802dce1SIvan Khoronzhuk GFP_KERNEL); 14073802dce1SIvan Khoronzhuk if (!skb) { 14083802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, "cannot allocate skb\n"); 14093802dce1SIvan Khoronzhuk return -ENOMEM; 14103802dce1SIvan Khoronzhuk } 14113802dce1SIvan Khoronzhuk 1412e05107e6SIvan Khoronzhuk skb_set_queue_mapping(skb, ch); 14138feb0a19SIvan Khoronzhuk ret = cpdma_chan_submit(cpsw->rxv[ch].ch, skb, 14148feb0a19SIvan Khoronzhuk skb->data, skb_tailroom(skb), 14158feb0a19SIvan Khoronzhuk 0); 14163802dce1SIvan Khoronzhuk if (ret < 0) { 14173802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, 1418e05107e6SIvan Khoronzhuk "cannot submit skb to channel %d rx, error %d\n", 1419e05107e6SIvan Khoronzhuk ch, ret); 14203802dce1SIvan Khoronzhuk kfree_skb(skb); 14213802dce1SIvan Khoronzhuk return ret; 14223802dce1SIvan Khoronzhuk } 14233802dce1SIvan Khoronzhuk kmemleak_not_leak(skb); 14243802dce1SIvan Khoronzhuk } 14253802dce1SIvan Khoronzhuk 1426e05107e6SIvan Khoronzhuk cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n", 1427e05107e6SIvan Khoronzhuk ch, ch_buf_num); 1428e05107e6SIvan Khoronzhuk } 14293802dce1SIvan Khoronzhuk 1430e05107e6SIvan Khoronzhuk return 0; 14313802dce1SIvan Khoronzhuk } 14323802dce1SIvan Khoronzhuk 14332a05a622SIvan Khoronzhuk static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw) 1434aacebbf8SSebastian Siewior { 14353995d265SSchuyler Patton u32 slave_port; 14363995d265SSchuyler Patton 14376f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 14383995d265SSchuyler Patton 1439aacebbf8SSebastian Siewior if (!slave->phy) 1440aacebbf8SSebastian Siewior return; 1441aacebbf8SSebastian Siewior phy_stop(slave->phy); 1442aacebbf8SSebastian Siewior phy_disconnect(slave->phy); 1443aacebbf8SSebastian Siewior slave->phy = NULL; 14442a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 14453995d265SSchuyler Patton ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 14461f95ba00SGrygorii Strashko soft_reset_slave(slave); 1447aacebbf8SSebastian Siewior } 1448aacebbf8SSebastian Siewior 1449df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev) 1450df828598SMugunthan V N { 1451df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1452649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14533802dce1SIvan Khoronzhuk int ret; 1454df828598SMugunthan V N u32 reg; 1455df828598SMugunthan V N 145656e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1457108a6537SGrygorii Strashko if (ret < 0) { 145856e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1459108a6537SGrygorii Strashko return ret; 1460108a6537SGrygorii Strashko } 14613fa88c51SGrygorii Strashko 1462df828598SMugunthan V N netif_carrier_off(ndev); 1463df828598SMugunthan V N 1464e05107e6SIvan Khoronzhuk /* Notify the stack of the actual queue counts. */ 1465e05107e6SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num); 1466e05107e6SIvan Khoronzhuk if (ret) { 1467e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 1468e05107e6SIvan Khoronzhuk goto err_cleanup; 1469e05107e6SIvan Khoronzhuk } 1470e05107e6SIvan Khoronzhuk 1471e05107e6SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num); 1472e05107e6SIvan Khoronzhuk if (ret) { 1473e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 1474e05107e6SIvan Khoronzhuk goto err_cleanup; 1475e05107e6SIvan Khoronzhuk } 1476e05107e6SIvan Khoronzhuk 14772a05a622SIvan Khoronzhuk reg = cpsw->version; 1478df828598SMugunthan V N 1479df828598SMugunthan V N dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 1480df828598SMugunthan V N CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 1481df828598SMugunthan V N CPSW_RTL_VERSION(reg)); 1482df828598SMugunthan V N 1483d5bc1613SIvan Khoronzhuk /* Initialize host and slave ports */ 1484d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) 1485df828598SMugunthan V N cpsw_init_host_port(priv); 1486df828598SMugunthan V N for_each_slave(priv, cpsw_slave_open, priv); 1487df828598SMugunthan V N 14883b72c2feSMugunthan V N /* Add default VLAN */ 1489606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) 14903b72c2feSMugunthan V N cpsw_add_default_vlan(priv); 1491e6afea0bSMugunthan V N else 14922a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan, 149361f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0); 14943b72c2feSMugunthan V N 1495d5bc1613SIvan Khoronzhuk /* initialize shared resources for every ndev */ 1496d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) { 1497d9ba8f9eSMugunthan V N /* disable priority elevation */ 14985d8d0d4dSIvan Khoronzhuk __raw_writel(0, &cpsw->regs->ptype); 1499df828598SMugunthan V N 1500d9ba8f9eSMugunthan V N /* enable statistics collection only on all ports */ 15015d8d0d4dSIvan Khoronzhuk __raw_writel(0x7, &cpsw->regs->stat_port_en); 1502df828598SMugunthan V N 15031923d6e4SMugunthan V N /* Enable internal fifo flow control */ 15045d8d0d4dSIvan Khoronzhuk writel(0x7, &cpsw->regs->flow_control); 15051923d6e4SMugunthan V N 1506dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_rx); 1507dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_tx); 1508d354eb85SMugunthan V N 1509e38b5a3dSIvan Khoronzhuk if (cpsw->tx_irq_disabled) { 1510e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 1511e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 15127da11600SMugunthan V N } 15137da11600SMugunthan V N 1514e38b5a3dSIvan Khoronzhuk if (cpsw->rx_irq_disabled) { 1515e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 1516e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 15177da11600SMugunthan V N } 15187da11600SMugunthan V N 15193802dce1SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 15203802dce1SIvan Khoronzhuk if (ret < 0) 1521aacebbf8SSebastian Siewior goto err_cleanup; 1522f280e89aSMugunthan V N 15238a2c9a5aSGrygorii Strashko if (cpts_register(cpsw->cpts)) 1524f280e89aSMugunthan V N dev_err(priv->dev, "error registering cpts device\n"); 1525f280e89aSMugunthan V N 1526d9ba8f9eSMugunthan V N } 1527df828598SMugunthan V N 1528ff5b8ef2SMugunthan V N /* Enable Interrupt pacing if configured */ 15292a05a622SIvan Khoronzhuk if (cpsw->coal_intvl != 0) { 1530ff5b8ef2SMugunthan V N struct ethtool_coalesce coal; 1531ff5b8ef2SMugunthan V N 15322a05a622SIvan Khoronzhuk coal.rx_coalesce_usecs = cpsw->coal_intvl; 1533ff5b8ef2SMugunthan V N cpsw_set_coalesce(ndev, &coal); 1534ff5b8ef2SMugunthan V N } 1535ff5b8ef2SMugunthan V N 15362c836bd9SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 15372c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1538d5bc1613SIvan Khoronzhuk cpsw->usage_count++; 1539f63a975eSMugunthan V N 1540df828598SMugunthan V N return 0; 1541df828598SMugunthan V N 1542aacebbf8SSebastian Siewior err_cleanup: 15432c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 15442a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 154556e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1546aacebbf8SSebastian Siewior netif_carrier_off(priv->ndev); 1547aacebbf8SSebastian Siewior return ret; 1548df828598SMugunthan V N } 1549df828598SMugunthan V N 1550df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev) 1551df828598SMugunthan V N { 1552df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1553649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1554df828598SMugunthan V N 1555df828598SMugunthan V N cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 1556e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(priv->ndev); 1557df828598SMugunthan V N netif_carrier_off(priv->ndev); 1558d9ba8f9eSMugunthan V N 1559d5bc1613SIvan Khoronzhuk if (cpsw->usage_count <= 1) { 1560dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_rx); 1561dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_tx); 15622a05a622SIvan Khoronzhuk cpts_unregister(cpsw->cpts); 15632c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 15642c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 15652a05a622SIvan Khoronzhuk cpsw_ale_stop(cpsw->ale); 1566d9ba8f9eSMugunthan V N } 15672a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 15680be01b8eSIvan Khoronzhuk 15690be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 15700be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 15710be01b8eSIvan Khoronzhuk 1572d5bc1613SIvan Khoronzhuk cpsw->usage_count--; 157356e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1574df828598SMugunthan V N return 0; 1575df828598SMugunthan V N } 1576df828598SMugunthan V N 1577df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 1578df828598SMugunthan V N struct net_device *ndev) 1579df828598SMugunthan V N { 1580df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 15812c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1582e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 1583e05107e6SIvan Khoronzhuk struct cpdma_chan *txch; 1584e05107e6SIvan Khoronzhuk int ret, q_idx; 1585df828598SMugunthan V N 1586df828598SMugunthan V N if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 1587df828598SMugunthan V N cpsw_err(priv, tx_err, "packet pad failed\n"); 15888dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 15891bf96050SIvan Khoronzhuk return NET_XMIT_DROP; 1590df828598SMugunthan V N } 1591df828598SMugunthan V N 15929232b16dSMugunthan V N if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 1593b63ba58eSGrygorii Strashko cpts_is_tx_enabled(cpsw->cpts)) 15942e5b38abSRichard Cochran skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 15952e5b38abSRichard Cochran 15962e5b38abSRichard Cochran skb_tx_timestamp(skb); 15972e5b38abSRichard Cochran 1598e05107e6SIvan Khoronzhuk q_idx = skb_get_queue_mapping(skb); 1599e05107e6SIvan Khoronzhuk if (q_idx >= cpsw->tx_ch_num) 1600e05107e6SIvan Khoronzhuk q_idx = q_idx % cpsw->tx_ch_num; 1601e05107e6SIvan Khoronzhuk 16028feb0a19SIvan Khoronzhuk txch = cpsw->txv[q_idx].ch; 1603e05107e6SIvan Khoronzhuk ret = cpsw_tx_packet_submit(priv, skb, txch); 1604df828598SMugunthan V N if (unlikely(ret != 0)) { 1605df828598SMugunthan V N cpsw_err(priv, tx_err, "desc submit failed\n"); 1606df828598SMugunthan V N goto fail; 1607df828598SMugunthan V N } 1608df828598SMugunthan V N 1609fae50823SMugunthan V N /* If there is no more tx desc left free then we need to 1610fae50823SMugunthan V N * tell the kernel to stop sending us tx frames. 1611fae50823SMugunthan V N */ 1612e05107e6SIvan Khoronzhuk if (unlikely(!cpdma_check_free_tx_desc(txch))) { 1613e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, q_idx); 1614e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1615e05107e6SIvan Khoronzhuk } 1616fae50823SMugunthan V N 1617df828598SMugunthan V N return NETDEV_TX_OK; 1618df828598SMugunthan V N fail: 16198dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 1620e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 1621e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1622df828598SMugunthan V N return NETDEV_TX_BUSY; 1623df828598SMugunthan V N } 1624df828598SMugunthan V N 1625c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 16262e5b38abSRichard Cochran 16272a05a622SIvan Khoronzhuk static void cpsw_hwtstamp_v1(struct cpsw_common *cpsw) 16282e5b38abSRichard Cochran { 1629606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave]; 16302e5b38abSRichard Cochran u32 ts_en, seq_id; 16312e5b38abSRichard Cochran 1632b63ba58eSGrygorii Strashko if (!cpts_is_tx_enabled(cpsw->cpts) && 1633b63ba58eSGrygorii Strashko !cpts_is_rx_enabled(cpsw->cpts)) { 16342e5b38abSRichard Cochran slave_write(slave, 0, CPSW1_TS_CTL); 16352e5b38abSRichard Cochran return; 16362e5b38abSRichard Cochran } 16372e5b38abSRichard Cochran 16382e5b38abSRichard Cochran seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588; 16392e5b38abSRichard Cochran ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS; 16402e5b38abSRichard Cochran 1641b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 16422e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_TX_EN; 16432e5b38abSRichard Cochran 1644b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 16452e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_RX_EN; 16462e5b38abSRichard Cochran 16472e5b38abSRichard Cochran slave_write(slave, ts_en, CPSW1_TS_CTL); 16482e5b38abSRichard Cochran slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE); 16492e5b38abSRichard Cochran } 16502e5b38abSRichard Cochran 16512e5b38abSRichard Cochran static void cpsw_hwtstamp_v2(struct cpsw_priv *priv) 16522e5b38abSRichard Cochran { 1653d9ba8f9eSMugunthan V N struct cpsw_slave *slave; 16545d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16552e5b38abSRichard Cochran u32 ctrl, mtype; 16562e5b38abSRichard Cochran 1657cb7d78d0SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 1658d9ba8f9eSMugunthan V N 16592e5b38abSRichard Cochran ctrl = slave_read(slave, CPSW2_CONTROL); 16602a05a622SIvan Khoronzhuk switch (cpsw->version) { 166109c55372SGeorge Cherian case CPSW_VERSION_2: 166209c55372SGeorge Cherian ctrl &= ~CTRL_V2_ALL_TS_MASK; 16632e5b38abSRichard Cochran 1664b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 166509c55372SGeorge Cherian ctrl |= CTRL_V2_TX_TS_BITS; 16662e5b38abSRichard Cochran 1667b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 166809c55372SGeorge Cherian ctrl |= CTRL_V2_RX_TS_BITS; 166909c55372SGeorge Cherian break; 167009c55372SGeorge Cherian case CPSW_VERSION_3: 167109c55372SGeorge Cherian default: 167209c55372SGeorge Cherian ctrl &= ~CTRL_V3_ALL_TS_MASK; 167309c55372SGeorge Cherian 1674b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 167509c55372SGeorge Cherian ctrl |= CTRL_V3_TX_TS_BITS; 167609c55372SGeorge Cherian 1677b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 167809c55372SGeorge Cherian ctrl |= CTRL_V3_RX_TS_BITS; 167909c55372SGeorge Cherian break; 168009c55372SGeorge Cherian } 16812e5b38abSRichard Cochran 16822e5b38abSRichard Cochran mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS; 16832e5b38abSRichard Cochran 16842e5b38abSRichard Cochran slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE); 16852e5b38abSRichard Cochran slave_write(slave, ctrl, CPSW2_CONTROL); 16865d8d0d4dSIvan Khoronzhuk __raw_writel(ETH_P_1588, &cpsw->regs->ts_ltype); 16872e5b38abSRichard Cochran } 16882e5b38abSRichard Cochran 1689a5b4145bSBen Hutchings static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 16902e5b38abSRichard Cochran { 16913177bf6fSMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 16922e5b38abSRichard Cochran struct hwtstamp_config cfg; 16932a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16942a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 16952e5b38abSRichard Cochran 16962a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 16972a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 16982a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 16992ee91e54SBen Hutchings return -EOPNOTSUPP; 17002ee91e54SBen Hutchings 17012e5b38abSRichard Cochran if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 17022e5b38abSRichard Cochran return -EFAULT; 17032e5b38abSRichard Cochran 17042e5b38abSRichard Cochran /* reserved for future extensions */ 17052e5b38abSRichard Cochran if (cfg.flags) 17062e5b38abSRichard Cochran return -EINVAL; 17072e5b38abSRichard Cochran 17082ee91e54SBen Hutchings if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON) 17092e5b38abSRichard Cochran return -ERANGE; 17102e5b38abSRichard Cochran 17112e5b38abSRichard Cochran switch (cfg.rx_filter) { 17122e5b38abSRichard Cochran case HWTSTAMP_FILTER_NONE: 1713b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 0); 17142e5b38abSRichard Cochran break; 17152e5b38abSRichard Cochran case HWTSTAMP_FILTER_ALL: 17162e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 17172e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 17182e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 17192e5b38abSRichard Cochran return -ERANGE; 17202e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 17212e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 17222e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 17232e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 17242e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 17252e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 17262e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_EVENT: 17272e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_SYNC: 17282e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1729b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 1); 17302e5b38abSRichard Cochran cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 17312e5b38abSRichard Cochran break; 17322e5b38abSRichard Cochran default: 17332e5b38abSRichard Cochran return -ERANGE; 17342e5b38abSRichard Cochran } 17352e5b38abSRichard Cochran 1736b63ba58eSGrygorii Strashko cpts_tx_enable(cpts, cfg.tx_type == HWTSTAMP_TX_ON); 17372ee91e54SBen Hutchings 17382a05a622SIvan Khoronzhuk switch (cpsw->version) { 17392e5b38abSRichard Cochran case CPSW_VERSION_1: 17402a05a622SIvan Khoronzhuk cpsw_hwtstamp_v1(cpsw); 17412e5b38abSRichard Cochran break; 17422e5b38abSRichard Cochran case CPSW_VERSION_2: 1743f7d403cbSGeorge Cherian case CPSW_VERSION_3: 17442e5b38abSRichard Cochran cpsw_hwtstamp_v2(priv); 17452e5b38abSRichard Cochran break; 17462e5b38abSRichard Cochran default: 17472ee91e54SBen Hutchings WARN_ON(1); 17482e5b38abSRichard Cochran } 17492e5b38abSRichard Cochran 17502e5b38abSRichard Cochran return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 17512e5b38abSRichard Cochran } 17522e5b38abSRichard Cochran 1753a5b4145bSBen Hutchings static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1754a5b4145bSBen Hutchings { 17552a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(dev); 17562a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 1757a5b4145bSBen Hutchings struct hwtstamp_config cfg; 1758a5b4145bSBen Hutchings 17592a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 17602a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 17612a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 1762a5b4145bSBen Hutchings return -EOPNOTSUPP; 1763a5b4145bSBen Hutchings 1764a5b4145bSBen Hutchings cfg.flags = 0; 1765b63ba58eSGrygorii Strashko cfg.tx_type = cpts_is_tx_enabled(cpts) ? 1766b63ba58eSGrygorii Strashko HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; 1767b63ba58eSGrygorii Strashko cfg.rx_filter = (cpts_is_rx_enabled(cpts) ? 1768a5b4145bSBen Hutchings HWTSTAMP_FILTER_PTP_V2_EVENT : HWTSTAMP_FILTER_NONE); 1769a5b4145bSBen Hutchings 1770a5b4145bSBen Hutchings return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 1771a5b4145bSBen Hutchings } 1772c8395d4eSGrygorii Strashko #else 1773c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1774c8395d4eSGrygorii Strashko { 1775c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1776c8395d4eSGrygorii Strashko } 1777a5b4145bSBen Hutchings 1778c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 1779c8395d4eSGrygorii Strashko { 1780c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1781c8395d4eSGrygorii Strashko } 17822e5b38abSRichard Cochran #endif /*CONFIG_TI_CPTS*/ 17832e5b38abSRichard Cochran 17842e5b38abSRichard Cochran static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 17852e5b38abSRichard Cochran { 178611f2c988SMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 1787606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1788606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 178911f2c988SMugunthan V N 17902e5b38abSRichard Cochran if (!netif_running(dev)) 17912e5b38abSRichard Cochran return -EINVAL; 17922e5b38abSRichard Cochran 179311f2c988SMugunthan V N switch (cmd) { 179411f2c988SMugunthan V N case SIOCSHWTSTAMP: 1795a5b4145bSBen Hutchings return cpsw_hwtstamp_set(dev, req); 1796a5b4145bSBen Hutchings case SIOCGHWTSTAMP: 1797a5b4145bSBen Hutchings return cpsw_hwtstamp_get(dev, req); 17982e5b38abSRichard Cochran } 17992e5b38abSRichard Cochran 1800606f3993SIvan Khoronzhuk if (!cpsw->slaves[slave_no].phy) 1801c1b59947SStefan Sørensen return -EOPNOTSUPP; 1802606f3993SIvan Khoronzhuk return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd); 180311f2c988SMugunthan V N } 180411f2c988SMugunthan V N 1805df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev) 1806df828598SMugunthan V N { 1807df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 18082c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1809e05107e6SIvan Khoronzhuk int ch; 1810df828598SMugunthan V N 1811df828598SMugunthan V N cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 18128dc43ddcSTobias Klauser ndev->stats.tx_errors++; 18132c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1814e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 18158feb0a19SIvan Khoronzhuk cpdma_chan_stop(cpsw->txv[ch].ch); 18168feb0a19SIvan Khoronzhuk cpdma_chan_start(cpsw->txv[ch].ch); 1817e05107e6SIvan Khoronzhuk } 1818e05107e6SIvan Khoronzhuk 18192c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1820df828598SMugunthan V N } 1821df828598SMugunthan V N 1822dcfd8d58SMugunthan V N static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p) 1823dcfd8d58SMugunthan V N { 1824dcfd8d58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1825dcfd8d58SMugunthan V N struct sockaddr *addr = (struct sockaddr *)p; 1826649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1827dcfd8d58SMugunthan V N int flags = 0; 1828dcfd8d58SMugunthan V N u16 vid = 0; 1829a6c5d14fSGrygorii Strashko int ret; 1830dcfd8d58SMugunthan V N 1831dcfd8d58SMugunthan V N if (!is_valid_ether_addr(addr->sa_data)) 1832dcfd8d58SMugunthan V N return -EADDRNOTAVAIL; 1833dcfd8d58SMugunthan V N 183456e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1835a6c5d14fSGrygorii Strashko if (ret < 0) { 183656e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1837a6c5d14fSGrygorii Strashko return ret; 1838a6c5d14fSGrygorii Strashko } 1839a6c5d14fSGrygorii Strashko 1840606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 1841606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 1842dcfd8d58SMugunthan V N flags = ALE_VLAN; 1843dcfd8d58SMugunthan V N } 1844dcfd8d58SMugunthan V N 18452a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1846dcfd8d58SMugunthan V N flags, vid); 18472a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM, 1848dcfd8d58SMugunthan V N flags, vid); 1849dcfd8d58SMugunthan V N 1850dcfd8d58SMugunthan V N memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); 1851dcfd8d58SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 1852dcfd8d58SMugunthan V N for_each_slave(priv, cpsw_set_slave_mac, priv); 1853dcfd8d58SMugunthan V N 185456e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1855a6c5d14fSGrygorii Strashko 1856dcfd8d58SMugunthan V N return 0; 1857dcfd8d58SMugunthan V N } 1858dcfd8d58SMugunthan V N 1859df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 1860df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev) 1861df828598SMugunthan V N { 1862dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1863df828598SMugunthan V N 1864dbc4ec52SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1865dbc4ec52SIvan Khoronzhuk cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw); 1866dbc4ec52SIvan Khoronzhuk cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw); 1867dbc4ec52SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1868df828598SMugunthan V N } 1869df828598SMugunthan V N #endif 1870df828598SMugunthan V N 18713b72c2feSMugunthan V N static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, 18723b72c2feSMugunthan V N unsigned short vid) 18733b72c2feSMugunthan V N { 18743b72c2feSMugunthan V N int ret; 18759f6bd8faSMugunthan V N int unreg_mcast_mask = 0; 18769f6bd8faSMugunthan V N u32 port_mask; 1877606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 18789f6bd8faSMugunthan V N 1879606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 18809f6bd8faSMugunthan V N port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST; 18819f6bd8faSMugunthan V N 18829f6bd8faSMugunthan V N if (priv->ndev->flags & IFF_ALLMULTI) 18839f6bd8faSMugunthan V N unreg_mcast_mask = port_mask; 18849f6bd8faSMugunthan V N } else { 18859f6bd8faSMugunthan V N port_mask = ALE_ALL_PORTS; 18861e5c4bc4SLennart Sorensen 18871e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 18881e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 18891e5c4bc4SLennart Sorensen else 18901e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 18919f6bd8faSMugunthan V N } 18923b72c2feSMugunthan V N 18932a05a622SIvan Khoronzhuk ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, 189461f1cef9SGrygorii Strashko unreg_mcast_mask); 18953b72c2feSMugunthan V N if (ret != 0) 18963b72c2feSMugunthan V N return ret; 18973b72c2feSMugunthan V N 18982a05a622SIvan Khoronzhuk ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 189971a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19003b72c2feSMugunthan V N if (ret != 0) 19013b72c2feSMugunthan V N goto clean_vid; 19023b72c2feSMugunthan V N 19032a05a622SIvan Khoronzhuk ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 19049f6bd8faSMugunthan V N port_mask, ALE_VLAN, vid, 0); 19053b72c2feSMugunthan V N if (ret != 0) 19063b72c2feSMugunthan V N goto clean_vlan_ucast; 19073b72c2feSMugunthan V N return 0; 19083b72c2feSMugunthan V N 19093b72c2feSMugunthan V N clean_vlan_ucast: 19102a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 191171a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19123b72c2feSMugunthan V N clean_vid: 19132a05a622SIvan Khoronzhuk cpsw_ale_del_vlan(cpsw->ale, vid, 0); 19143b72c2feSMugunthan V N return ret; 19153b72c2feSMugunthan V N } 19163b72c2feSMugunthan V N 19173b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, 191880d5c368SPatrick McHardy __be16 proto, u16 vid) 19193b72c2feSMugunthan V N { 19203b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1921649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1922a6c5d14fSGrygorii Strashko int ret; 19233b72c2feSMugunthan V N 1924606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 19253b72c2feSMugunthan V N return 0; 19263b72c2feSMugunthan V N 192756e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1928a6c5d14fSGrygorii Strashko if (ret < 0) { 192956e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1930a6c5d14fSGrygorii Strashko return ret; 1931a6c5d14fSGrygorii Strashko } 1932a6c5d14fSGrygorii Strashko 1933606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 193402a54164SMugunthan V N /* In dual EMAC, reserved VLAN id should not be used for 193502a54164SMugunthan V N * creating VLAN interfaces as this can break the dual 193602a54164SMugunthan V N * EMAC port separation 193702a54164SMugunthan V N */ 193802a54164SMugunthan V N int i; 193902a54164SMugunthan V N 1940606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 1941606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 194202a54164SMugunthan V N return -EINVAL; 194302a54164SMugunthan V N } 194402a54164SMugunthan V N } 194502a54164SMugunthan V N 19463b72c2feSMugunthan V N dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid); 1947a6c5d14fSGrygorii Strashko ret = cpsw_add_vlan_ale_entry(priv, vid); 1948a6c5d14fSGrygorii Strashko 194956e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1950a6c5d14fSGrygorii Strashko return ret; 19513b72c2feSMugunthan V N } 19523b72c2feSMugunthan V N 19533b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev, 195480d5c368SPatrick McHardy __be16 proto, u16 vid) 19553b72c2feSMugunthan V N { 19563b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1957649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19583b72c2feSMugunthan V N int ret; 19593b72c2feSMugunthan V N 1960606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 19613b72c2feSMugunthan V N return 0; 19623b72c2feSMugunthan V N 196356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1964a6c5d14fSGrygorii Strashko if (ret < 0) { 196556e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1966a6c5d14fSGrygorii Strashko return ret; 1967a6c5d14fSGrygorii Strashko } 1968a6c5d14fSGrygorii Strashko 1969606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 197002a54164SMugunthan V N int i; 197102a54164SMugunthan V N 1972606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 1973606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 197402a54164SMugunthan V N return -EINVAL; 197502a54164SMugunthan V N } 197602a54164SMugunthan V N } 197702a54164SMugunthan V N 19783b72c2feSMugunthan V N dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid); 19792a05a622SIvan Khoronzhuk ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0); 19803b72c2feSMugunthan V N if (ret != 0) 19813b72c2feSMugunthan V N return ret; 19823b72c2feSMugunthan V N 19832a05a622SIvan Khoronzhuk ret = cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 198461f1cef9SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19853b72c2feSMugunthan V N if (ret != 0) 19863b72c2feSMugunthan V N return ret; 19873b72c2feSMugunthan V N 19882a05a622SIvan Khoronzhuk ret = cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast, 19893b72c2feSMugunthan V N 0, ALE_VLAN, vid); 199056e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1991a6c5d14fSGrygorii Strashko return ret; 19923b72c2feSMugunthan V N } 19933b72c2feSMugunthan V N 199483fcad0cSIvan Khoronzhuk static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate) 199583fcad0cSIvan Khoronzhuk { 199683fcad0cSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 199783fcad0cSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 199852986a2fSIvan Khoronzhuk struct cpsw_slave *slave; 199932b78d85SIvan Khoronzhuk u32 min_rate; 200083fcad0cSIvan Khoronzhuk u32 ch_rate; 200152986a2fSIvan Khoronzhuk int i, ret; 200283fcad0cSIvan Khoronzhuk 200383fcad0cSIvan Khoronzhuk ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate; 200483fcad0cSIvan Khoronzhuk if (ch_rate == rate) 200583fcad0cSIvan Khoronzhuk return 0; 200683fcad0cSIvan Khoronzhuk 200732b78d85SIvan Khoronzhuk ch_rate = rate * 1000; 200883fcad0cSIvan Khoronzhuk min_rate = cpdma_chan_get_min_rate(cpsw->dma); 200932b78d85SIvan Khoronzhuk if ((ch_rate < min_rate && ch_rate)) { 201032b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be less than %dMbps", 201183fcad0cSIvan Khoronzhuk min_rate); 201283fcad0cSIvan Khoronzhuk return -EINVAL; 201383fcad0cSIvan Khoronzhuk } 201483fcad0cSIvan Khoronzhuk 20150be01b8eSIvan Khoronzhuk if (rate > cpsw->speed) { 201632b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be more than 2Gbps"); 201732b78d85SIvan Khoronzhuk return -EINVAL; 201832b78d85SIvan Khoronzhuk } 201932b78d85SIvan Khoronzhuk 202083fcad0cSIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 202183fcad0cSIvan Khoronzhuk if (ret < 0) { 202283fcad0cSIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 202383fcad0cSIvan Khoronzhuk return ret; 202483fcad0cSIvan Khoronzhuk } 202583fcad0cSIvan Khoronzhuk 202632b78d85SIvan Khoronzhuk ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate); 202783fcad0cSIvan Khoronzhuk pm_runtime_put(cpsw->dev); 202832b78d85SIvan Khoronzhuk 202932b78d85SIvan Khoronzhuk if (ret) 203032b78d85SIvan Khoronzhuk return ret; 203132b78d85SIvan Khoronzhuk 203252986a2fSIvan Khoronzhuk /* update rates for slaves tx queues */ 203352986a2fSIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 203452986a2fSIvan Khoronzhuk slave = &cpsw->slaves[i]; 203552986a2fSIvan Khoronzhuk if (!slave->ndev) 203652986a2fSIvan Khoronzhuk continue; 203752986a2fSIvan Khoronzhuk 203852986a2fSIvan Khoronzhuk netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate; 203952986a2fSIvan Khoronzhuk } 204052986a2fSIvan Khoronzhuk 204132b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 204283fcad0cSIvan Khoronzhuk return ret; 204383fcad0cSIvan Khoronzhuk } 204483fcad0cSIvan Khoronzhuk 2045df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = { 2046df828598SMugunthan V N .ndo_open = cpsw_ndo_open, 2047df828598SMugunthan V N .ndo_stop = cpsw_ndo_stop, 2048df828598SMugunthan V N .ndo_start_xmit = cpsw_ndo_start_xmit, 2049dcfd8d58SMugunthan V N .ndo_set_mac_address = cpsw_ndo_set_mac_address, 20502e5b38abSRichard Cochran .ndo_do_ioctl = cpsw_ndo_ioctl, 2051df828598SMugunthan V N .ndo_validate_addr = eth_validate_addr, 2052df828598SMugunthan V N .ndo_tx_timeout = cpsw_ndo_tx_timeout, 20535c50a856SMugunthan V N .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, 205483fcad0cSIvan Khoronzhuk .ndo_set_tx_maxrate = cpsw_ndo_set_tx_maxrate, 2055df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 2056df828598SMugunthan V N .ndo_poll_controller = cpsw_ndo_poll_controller, 2057df828598SMugunthan V N #endif 20583b72c2feSMugunthan V N .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, 20593b72c2feSMugunthan V N .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, 2060df828598SMugunthan V N }; 2061df828598SMugunthan V N 206252c4f0ecSMugunthan V N static int cpsw_get_regs_len(struct net_device *ndev) 206352c4f0ecSMugunthan V N { 2064606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 206552c4f0ecSMugunthan V N 2066606f3993SIvan Khoronzhuk return cpsw->data.ale_entries * ALE_ENTRY_WORDS * sizeof(u32); 206752c4f0ecSMugunthan V N } 206852c4f0ecSMugunthan V N 206952c4f0ecSMugunthan V N static void cpsw_get_regs(struct net_device *ndev, 207052c4f0ecSMugunthan V N struct ethtool_regs *regs, void *p) 207152c4f0ecSMugunthan V N { 207252c4f0ecSMugunthan V N u32 *reg = p; 20732a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 207452c4f0ecSMugunthan V N 207552c4f0ecSMugunthan V N /* update CPSW IP version */ 20762a05a622SIvan Khoronzhuk regs->version = cpsw->version; 207752c4f0ecSMugunthan V N 20782a05a622SIvan Khoronzhuk cpsw_ale_dump(cpsw->ale, reg); 207952c4f0ecSMugunthan V N } 208052c4f0ecSMugunthan V N 2081df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev, 2082df828598SMugunthan V N struct ethtool_drvinfo *info) 2083df828598SMugunthan V N { 2084649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 208556e31bd8SIvan Khoronzhuk struct platform_device *pdev = to_platform_device(cpsw->dev); 20867826d43fSJiri Pirko 208752c4f0ecSMugunthan V N strlcpy(info->driver, "cpsw", sizeof(info->driver)); 20887826d43fSJiri Pirko strlcpy(info->version, "1.0", sizeof(info->version)); 208956e31bd8SIvan Khoronzhuk strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info)); 2090df828598SMugunthan V N } 2091df828598SMugunthan V N 2092df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev) 2093df828598SMugunthan V N { 2094df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2095df828598SMugunthan V N return priv->msg_enable; 2096df828598SMugunthan V N } 2097df828598SMugunthan V N 2098df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 2099df828598SMugunthan V N { 2100df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2101df828598SMugunthan V N priv->msg_enable = value; 2102df828598SMugunthan V N } 2103df828598SMugunthan V N 2104c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 21052e5b38abSRichard Cochran static int cpsw_get_ts_info(struct net_device *ndev, 21062e5b38abSRichard Cochran struct ethtool_ts_info *info) 21072e5b38abSRichard Cochran { 21082a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 21092e5b38abSRichard Cochran 21102e5b38abSRichard Cochran info->so_timestamping = 21112e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_HARDWARE | 21122e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21132e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_HARDWARE | 21142e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21152e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE | 21162e5b38abSRichard Cochran SOF_TIMESTAMPING_RAW_HARDWARE; 21172a05a622SIvan Khoronzhuk info->phc_index = cpsw->cpts->phc_index; 21182e5b38abSRichard Cochran info->tx_types = 21192e5b38abSRichard Cochran (1 << HWTSTAMP_TX_OFF) | 21202e5b38abSRichard Cochran (1 << HWTSTAMP_TX_ON); 21212e5b38abSRichard Cochran info->rx_filters = 21222e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_NONE) | 21232e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); 2124c8395d4eSGrygorii Strashko return 0; 2125c8395d4eSGrygorii Strashko } 21262e5b38abSRichard Cochran #else 2127c8395d4eSGrygorii Strashko static int cpsw_get_ts_info(struct net_device *ndev, 2128c8395d4eSGrygorii Strashko struct ethtool_ts_info *info) 2129c8395d4eSGrygorii Strashko { 21302e5b38abSRichard Cochran info->so_timestamping = 21312e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21322e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21332e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE; 21342e5b38abSRichard Cochran info->phc_index = -1; 21352e5b38abSRichard Cochran info->tx_types = 0; 21362e5b38abSRichard Cochran info->rx_filters = 0; 21372e5b38abSRichard Cochran return 0; 21382e5b38abSRichard Cochran } 2139c8395d4eSGrygorii Strashko #endif 21402e5b38abSRichard Cochran 21412479876dSPhilippe Reynes static int cpsw_get_link_ksettings(struct net_device *ndev, 21422479876dSPhilippe Reynes struct ethtool_link_ksettings *ecmd) 2143d3bb9c58SMugunthan V N { 2144d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2145606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2146606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2147d3bb9c58SMugunthan V N 2148606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 21492479876dSPhilippe Reynes return phy_ethtool_ksettings_get(cpsw->slaves[slave_no].phy, 21502479876dSPhilippe Reynes ecmd); 2151d3bb9c58SMugunthan V N else 2152d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2153d3bb9c58SMugunthan V N } 2154d3bb9c58SMugunthan V N 21552479876dSPhilippe Reynes static int cpsw_set_link_ksettings(struct net_device *ndev, 21562479876dSPhilippe Reynes const struct ethtool_link_ksettings *ecmd) 2157d3bb9c58SMugunthan V N { 2158d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2159606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2160606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2161d3bb9c58SMugunthan V N 2162606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 21632479876dSPhilippe Reynes return phy_ethtool_ksettings_set(cpsw->slaves[slave_no].phy, 21642479876dSPhilippe Reynes ecmd); 2165d3bb9c58SMugunthan V N else 2166d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2167d3bb9c58SMugunthan V N } 2168d3bb9c58SMugunthan V N 2169d8a64420SMatus Ujhelyi static void cpsw_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2170d8a64420SMatus Ujhelyi { 2171d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2172606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2173606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2174d8a64420SMatus Ujhelyi 2175d8a64420SMatus Ujhelyi wol->supported = 0; 2176d8a64420SMatus Ujhelyi wol->wolopts = 0; 2177d8a64420SMatus Ujhelyi 2178606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2179606f3993SIvan Khoronzhuk phy_ethtool_get_wol(cpsw->slaves[slave_no].phy, wol); 2180d8a64420SMatus Ujhelyi } 2181d8a64420SMatus Ujhelyi 2182d8a64420SMatus Ujhelyi static int cpsw_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2183d8a64420SMatus Ujhelyi { 2184d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2185606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2186606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2187d8a64420SMatus Ujhelyi 2188606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2189606f3993SIvan Khoronzhuk return phy_ethtool_set_wol(cpsw->slaves[slave_no].phy, wol); 2190d8a64420SMatus Ujhelyi else 2191d8a64420SMatus Ujhelyi return -EOPNOTSUPP; 2192d8a64420SMatus Ujhelyi } 2193d8a64420SMatus Ujhelyi 21941923d6e4SMugunthan V N static void cpsw_get_pauseparam(struct net_device *ndev, 21951923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 21961923d6e4SMugunthan V N { 21971923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 21981923d6e4SMugunthan V N 21991923d6e4SMugunthan V N pause->autoneg = AUTONEG_DISABLE; 22001923d6e4SMugunthan V N pause->rx_pause = priv->rx_pause ? true : false; 22011923d6e4SMugunthan V N pause->tx_pause = priv->tx_pause ? true : false; 22021923d6e4SMugunthan V N } 22031923d6e4SMugunthan V N 22041923d6e4SMugunthan V N static int cpsw_set_pauseparam(struct net_device *ndev, 22051923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22061923d6e4SMugunthan V N { 22071923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22081923d6e4SMugunthan V N bool link; 22091923d6e4SMugunthan V N 22101923d6e4SMugunthan V N priv->rx_pause = pause->rx_pause ? true : false; 22111923d6e4SMugunthan V N priv->tx_pause = pause->tx_pause ? true : false; 22121923d6e4SMugunthan V N 22131923d6e4SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 22141923d6e4SMugunthan V N return 0; 22151923d6e4SMugunthan V N } 22161923d6e4SMugunthan V N 22177898b1daSGrygorii Strashko static int cpsw_ethtool_op_begin(struct net_device *ndev) 22187898b1daSGrygorii Strashko { 22197898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2220649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 22217898b1daSGrygorii Strashko int ret; 22227898b1daSGrygorii Strashko 222356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 22247898b1daSGrygorii Strashko if (ret < 0) { 22257898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool begin failed %d\n", ret); 222656e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 22277898b1daSGrygorii Strashko } 22287898b1daSGrygorii Strashko 22297898b1daSGrygorii Strashko return ret; 22307898b1daSGrygorii Strashko } 22317898b1daSGrygorii Strashko 22327898b1daSGrygorii Strashko static void cpsw_ethtool_op_complete(struct net_device *ndev) 22337898b1daSGrygorii Strashko { 22347898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 22357898b1daSGrygorii Strashko int ret; 22367898b1daSGrygorii Strashko 223756e31bd8SIvan Khoronzhuk ret = pm_runtime_put(priv->cpsw->dev); 22387898b1daSGrygorii Strashko if (ret < 0) 22397898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool complete failed %d\n", ret); 22407898b1daSGrygorii Strashko } 22417898b1daSGrygorii Strashko 2242ce52c744SIvan Khoronzhuk static void cpsw_get_channels(struct net_device *ndev, 2243ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2244ce52c744SIvan Khoronzhuk { 2245ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2246ce52c744SIvan Khoronzhuk 2247ce52c744SIvan Khoronzhuk ch->max_combined = 0; 2248ce52c744SIvan Khoronzhuk ch->max_rx = CPSW_MAX_QUEUES; 2249ce52c744SIvan Khoronzhuk ch->max_tx = CPSW_MAX_QUEUES; 2250ce52c744SIvan Khoronzhuk ch->max_other = 0; 2251ce52c744SIvan Khoronzhuk ch->other_count = 0; 2252ce52c744SIvan Khoronzhuk ch->rx_count = cpsw->rx_ch_num; 2253ce52c744SIvan Khoronzhuk ch->tx_count = cpsw->tx_ch_num; 2254ce52c744SIvan Khoronzhuk ch->combined_count = 0; 2255ce52c744SIvan Khoronzhuk } 2256ce52c744SIvan Khoronzhuk 2257ce52c744SIvan Khoronzhuk static int cpsw_check_ch_settings(struct cpsw_common *cpsw, 2258ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2259ce52c744SIvan Khoronzhuk { 2260ce52c744SIvan Khoronzhuk if (ch->combined_count) 2261ce52c744SIvan Khoronzhuk return -EINVAL; 2262ce52c744SIvan Khoronzhuk 2263ce52c744SIvan Khoronzhuk /* verify we have at least one channel in each direction */ 2264ce52c744SIvan Khoronzhuk if (!ch->rx_count || !ch->tx_count) 2265ce52c744SIvan Khoronzhuk return -EINVAL; 2266ce52c744SIvan Khoronzhuk 2267ce52c744SIvan Khoronzhuk if (ch->rx_count > cpsw->data.channels || 2268ce52c744SIvan Khoronzhuk ch->tx_count > cpsw->data.channels) 2269ce52c744SIvan Khoronzhuk return -EINVAL; 2270ce52c744SIvan Khoronzhuk 2271ce52c744SIvan Khoronzhuk return 0; 2272ce52c744SIvan Khoronzhuk } 2273ce52c744SIvan Khoronzhuk 2274ce52c744SIvan Khoronzhuk static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx) 2275ce52c744SIvan Khoronzhuk { 2276ce52c744SIvan Khoronzhuk int (*poll)(struct napi_struct *, int); 2277ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2278ce52c744SIvan Khoronzhuk void (*handler)(void *, int, int); 227983fcad0cSIvan Khoronzhuk struct netdev_queue *queue; 22808feb0a19SIvan Khoronzhuk struct cpsw_vector *vec; 2281ce52c744SIvan Khoronzhuk int ret, *ch; 2282ce52c744SIvan Khoronzhuk 2283ce52c744SIvan Khoronzhuk if (rx) { 2284ce52c744SIvan Khoronzhuk ch = &cpsw->rx_ch_num; 22858feb0a19SIvan Khoronzhuk vec = cpsw->rxv; 2286ce52c744SIvan Khoronzhuk handler = cpsw_rx_handler; 2287ce52c744SIvan Khoronzhuk poll = cpsw_rx_poll; 2288ce52c744SIvan Khoronzhuk } else { 2289ce52c744SIvan Khoronzhuk ch = &cpsw->tx_ch_num; 22908feb0a19SIvan Khoronzhuk vec = cpsw->txv; 2291ce52c744SIvan Khoronzhuk handler = cpsw_tx_handler; 2292ce52c744SIvan Khoronzhuk poll = cpsw_tx_poll; 2293ce52c744SIvan Khoronzhuk } 2294ce52c744SIvan Khoronzhuk 2295ce52c744SIvan Khoronzhuk while (*ch < ch_num) { 22968feb0a19SIvan Khoronzhuk vec[*ch].ch = cpdma_chan_create(cpsw->dma, *ch, handler, rx); 229783fcad0cSIvan Khoronzhuk queue = netdev_get_tx_queue(priv->ndev, *ch); 229883fcad0cSIvan Khoronzhuk queue->tx_maxrate = 0; 2299ce52c744SIvan Khoronzhuk 23008feb0a19SIvan Khoronzhuk if (IS_ERR(vec[*ch].ch)) 23018feb0a19SIvan Khoronzhuk return PTR_ERR(vec[*ch].ch); 2302ce52c744SIvan Khoronzhuk 23038feb0a19SIvan Khoronzhuk if (!vec[*ch].ch) 2304ce52c744SIvan Khoronzhuk return -EINVAL; 2305ce52c744SIvan Khoronzhuk 2306ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "created new %d %s channel\n", *ch, 2307ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2308ce52c744SIvan Khoronzhuk (*ch)++; 2309ce52c744SIvan Khoronzhuk } 2310ce52c744SIvan Khoronzhuk 2311ce52c744SIvan Khoronzhuk while (*ch > ch_num) { 2312ce52c744SIvan Khoronzhuk (*ch)--; 2313ce52c744SIvan Khoronzhuk 23148feb0a19SIvan Khoronzhuk ret = cpdma_chan_destroy(vec[*ch].ch); 2315ce52c744SIvan Khoronzhuk if (ret) 2316ce52c744SIvan Khoronzhuk return ret; 2317ce52c744SIvan Khoronzhuk 2318ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "destroyed %d %s channel\n", *ch, 2319ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2320ce52c744SIvan Khoronzhuk } 2321ce52c744SIvan Khoronzhuk 2322ce52c744SIvan Khoronzhuk return 0; 2323ce52c744SIvan Khoronzhuk } 2324ce52c744SIvan Khoronzhuk 2325ce52c744SIvan Khoronzhuk static int cpsw_update_channels(struct cpsw_priv *priv, 2326ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2327ce52c744SIvan Khoronzhuk { 2328ce52c744SIvan Khoronzhuk int ret; 2329ce52c744SIvan Khoronzhuk 2330ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->rx_count, 1); 2331ce52c744SIvan Khoronzhuk if (ret) 2332ce52c744SIvan Khoronzhuk return ret; 2333ce52c744SIvan Khoronzhuk 2334ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->tx_count, 0); 2335ce52c744SIvan Khoronzhuk if (ret) 2336ce52c744SIvan Khoronzhuk return ret; 2337ce52c744SIvan Khoronzhuk 2338ce52c744SIvan Khoronzhuk return 0; 2339ce52c744SIvan Khoronzhuk } 2340ce52c744SIvan Khoronzhuk 2341022d7ad7SIvan Khoronzhuk static void cpsw_suspend_data_pass(struct net_device *ndev) 2342ce52c744SIvan Khoronzhuk { 2343022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2344ce52c744SIvan Khoronzhuk struct cpsw_slave *slave; 2345022d7ad7SIvan Khoronzhuk int i; 2346ce52c744SIvan Khoronzhuk 2347ce52c744SIvan Khoronzhuk /* Disable NAPI scheduling */ 2348ce52c744SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2349ce52c744SIvan Khoronzhuk 2350ce52c744SIvan Khoronzhuk /* Stop all transmit queues for every network device. 2351ce52c744SIvan Khoronzhuk * Disable re-using rx descriptors with dormant_on. 2352ce52c744SIvan Khoronzhuk */ 2353ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2354ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2355ce52c744SIvan Khoronzhuk continue; 2356ce52c744SIvan Khoronzhuk 2357ce52c744SIvan Khoronzhuk netif_tx_stop_all_queues(slave->ndev); 2358ce52c744SIvan Khoronzhuk netif_dormant_on(slave->ndev); 2359ce52c744SIvan Khoronzhuk } 2360ce52c744SIvan Khoronzhuk 2361ce52c744SIvan Khoronzhuk /* Handle rest of tx packets and stop cpdma channels */ 2362ce52c744SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 2363022d7ad7SIvan Khoronzhuk } 2364022d7ad7SIvan Khoronzhuk 2365022d7ad7SIvan Khoronzhuk static int cpsw_resume_data_pass(struct net_device *ndev) 2366022d7ad7SIvan Khoronzhuk { 2367022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2368022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2369022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2370022d7ad7SIvan Khoronzhuk int i, ret; 2371022d7ad7SIvan Khoronzhuk 2372022d7ad7SIvan Khoronzhuk /* Allow rx packets handling */ 2373022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2374022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2375022d7ad7SIvan Khoronzhuk netif_dormant_off(slave->ndev); 2376022d7ad7SIvan Khoronzhuk 2377022d7ad7SIvan Khoronzhuk /* After this receive is started */ 2378d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) { 2379022d7ad7SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 2380022d7ad7SIvan Khoronzhuk if (ret) 2381022d7ad7SIvan Khoronzhuk return ret; 2382022d7ad7SIvan Khoronzhuk 2383022d7ad7SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 2384022d7ad7SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2385022d7ad7SIvan Khoronzhuk } 2386022d7ad7SIvan Khoronzhuk 2387022d7ad7SIvan Khoronzhuk /* Resume transmit for every affected interface */ 2388022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2389022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2390022d7ad7SIvan Khoronzhuk netif_tx_start_all_queues(slave->ndev); 2391022d7ad7SIvan Khoronzhuk 2392022d7ad7SIvan Khoronzhuk return 0; 2393022d7ad7SIvan Khoronzhuk } 2394022d7ad7SIvan Khoronzhuk 2395022d7ad7SIvan Khoronzhuk static int cpsw_set_channels(struct net_device *ndev, 2396022d7ad7SIvan Khoronzhuk struct ethtool_channels *chs) 2397022d7ad7SIvan Khoronzhuk { 2398022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2399022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2400022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2401022d7ad7SIvan Khoronzhuk int i, ret; 2402022d7ad7SIvan Khoronzhuk 2403022d7ad7SIvan Khoronzhuk ret = cpsw_check_ch_settings(cpsw, chs); 2404022d7ad7SIvan Khoronzhuk if (ret < 0) 2405022d7ad7SIvan Khoronzhuk return ret; 2406022d7ad7SIvan Khoronzhuk 2407022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 2408ce52c744SIvan Khoronzhuk ret = cpsw_update_channels(priv, chs); 2409ce52c744SIvan Khoronzhuk if (ret) 2410ce52c744SIvan Khoronzhuk goto err; 2411ce52c744SIvan Khoronzhuk 2412ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2413ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2414ce52c744SIvan Khoronzhuk continue; 2415ce52c744SIvan Khoronzhuk 2416ce52c744SIvan Khoronzhuk /* Inform stack about new count of queues */ 2417ce52c744SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(slave->ndev, 2418ce52c744SIvan Khoronzhuk cpsw->tx_ch_num); 2419ce52c744SIvan Khoronzhuk if (ret) { 2420ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 2421ce52c744SIvan Khoronzhuk goto err; 2422ce52c744SIvan Khoronzhuk } 2423ce52c744SIvan Khoronzhuk 2424ce52c744SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(slave->ndev, 2425ce52c744SIvan Khoronzhuk cpsw->rx_ch_num); 2426ce52c744SIvan Khoronzhuk if (ret) { 2427ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 2428ce52c744SIvan Khoronzhuk goto err; 2429ce52c744SIvan Khoronzhuk } 2430ce52c744SIvan Khoronzhuk } 2431ce52c744SIvan Khoronzhuk 2432d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 243332b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 24348feb0a19SIvan Khoronzhuk 2435022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 2436022d7ad7SIvan Khoronzhuk if (!ret) 2437ce52c744SIvan Khoronzhuk return 0; 2438ce52c744SIvan Khoronzhuk err: 2439ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot update channels number, closing device\n"); 2440ce52c744SIvan Khoronzhuk dev_close(ndev); 2441ce52c744SIvan Khoronzhuk return ret; 2442ce52c744SIvan Khoronzhuk } 2443ce52c744SIvan Khoronzhuk 2444a0909949SYegor Yefremov static int cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata) 2445a0909949SYegor Yefremov { 2446a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2447a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2448a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2449a0909949SYegor Yefremov 2450a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2451a0909949SYegor Yefremov return phy_ethtool_get_eee(cpsw->slaves[slave_no].phy, edata); 2452a0909949SYegor Yefremov else 2453a0909949SYegor Yefremov return -EOPNOTSUPP; 2454a0909949SYegor Yefremov } 2455a0909949SYegor Yefremov 2456a0909949SYegor Yefremov static int cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata) 2457a0909949SYegor Yefremov { 2458a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2459a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2460a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2461a0909949SYegor Yefremov 2462a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2463a0909949SYegor Yefremov return phy_ethtool_set_eee(cpsw->slaves[slave_no].phy, edata); 2464a0909949SYegor Yefremov else 2465a0909949SYegor Yefremov return -EOPNOTSUPP; 2466a0909949SYegor Yefremov } 2467a0909949SYegor Yefremov 24686bb10c2bSYegor Yefremov static int cpsw_nway_reset(struct net_device *ndev) 24696bb10c2bSYegor Yefremov { 24706bb10c2bSYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 24716bb10c2bSYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 24726bb10c2bSYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 24736bb10c2bSYegor Yefremov 24746bb10c2bSYegor Yefremov if (cpsw->slaves[slave_no].phy) 24756bb10c2bSYegor Yefremov return genphy_restart_aneg(cpsw->slaves[slave_no].phy); 24766bb10c2bSYegor Yefremov else 24776bb10c2bSYegor Yefremov return -EOPNOTSUPP; 24786bb10c2bSYegor Yefremov } 24796bb10c2bSYegor Yefremov 2480be034fc1SGrygorii Strashko static void cpsw_get_ringparam(struct net_device *ndev, 2481be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2482be034fc1SGrygorii Strashko { 2483be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2484be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2485be034fc1SGrygorii Strashko 2486be034fc1SGrygorii Strashko /* not supported */ 2487be034fc1SGrygorii Strashko ering->tx_max_pending = 0; 2488be034fc1SGrygorii Strashko ering->tx_pending = cpdma_get_num_tx_descs(cpsw->dma); 2489f89d21b9SIvan Khoronzhuk ering->rx_max_pending = descs_pool_size - CPSW_MAX_QUEUES; 2490be034fc1SGrygorii Strashko ering->rx_pending = cpdma_get_num_rx_descs(cpsw->dma); 2491be034fc1SGrygorii Strashko } 2492be034fc1SGrygorii Strashko 2493be034fc1SGrygorii Strashko static int cpsw_set_ringparam(struct net_device *ndev, 2494be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2495be034fc1SGrygorii Strashko { 2496be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2497be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2498022d7ad7SIvan Khoronzhuk int ret; 2499be034fc1SGrygorii Strashko 2500be034fc1SGrygorii Strashko /* ignore ering->tx_pending - only rx_pending adjustment is supported */ 2501be034fc1SGrygorii Strashko 2502be034fc1SGrygorii Strashko if (ering->rx_mini_pending || ering->rx_jumbo_pending || 2503f89d21b9SIvan Khoronzhuk ering->rx_pending < CPSW_MAX_QUEUES || 2504f89d21b9SIvan Khoronzhuk ering->rx_pending > (descs_pool_size - CPSW_MAX_QUEUES)) 2505be034fc1SGrygorii Strashko return -EINVAL; 2506be034fc1SGrygorii Strashko 2507be034fc1SGrygorii Strashko if (ering->rx_pending == cpdma_get_num_rx_descs(cpsw->dma)) 2508be034fc1SGrygorii Strashko return 0; 2509be034fc1SGrygorii Strashko 2510022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 2511be034fc1SGrygorii Strashko 2512be034fc1SGrygorii Strashko cpdma_set_num_rx_descs(cpsw->dma, ering->rx_pending); 2513be034fc1SGrygorii Strashko 2514d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 2515be034fc1SGrygorii Strashko cpdma_chan_split_pool(cpsw->dma); 2516be034fc1SGrygorii Strashko 2517022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 2518022d7ad7SIvan Khoronzhuk if (!ret) 2519be034fc1SGrygorii Strashko return 0; 2520022d7ad7SIvan Khoronzhuk 2521022d7ad7SIvan Khoronzhuk dev_err(&ndev->dev, "cannot set ring params, closing device\n"); 2522be034fc1SGrygorii Strashko dev_close(ndev); 2523be034fc1SGrygorii Strashko return ret; 2524be034fc1SGrygorii Strashko } 2525be034fc1SGrygorii Strashko 2526df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = { 2527df828598SMugunthan V N .get_drvinfo = cpsw_get_drvinfo, 2528df828598SMugunthan V N .get_msglevel = cpsw_get_msglevel, 2529df828598SMugunthan V N .set_msglevel = cpsw_set_msglevel, 2530df828598SMugunthan V N .get_link = ethtool_op_get_link, 25312e5b38abSRichard Cochran .get_ts_info = cpsw_get_ts_info, 2532ff5b8ef2SMugunthan V N .get_coalesce = cpsw_get_coalesce, 2533ff5b8ef2SMugunthan V N .set_coalesce = cpsw_set_coalesce, 2534d9718546SMugunthan V N .get_sset_count = cpsw_get_sset_count, 2535d9718546SMugunthan V N .get_strings = cpsw_get_strings, 2536d9718546SMugunthan V N .get_ethtool_stats = cpsw_get_ethtool_stats, 25371923d6e4SMugunthan V N .get_pauseparam = cpsw_get_pauseparam, 25381923d6e4SMugunthan V N .set_pauseparam = cpsw_set_pauseparam, 2539d8a64420SMatus Ujhelyi .get_wol = cpsw_get_wol, 2540d8a64420SMatus Ujhelyi .set_wol = cpsw_set_wol, 254152c4f0ecSMugunthan V N .get_regs_len = cpsw_get_regs_len, 254252c4f0ecSMugunthan V N .get_regs = cpsw_get_regs, 25437898b1daSGrygorii Strashko .begin = cpsw_ethtool_op_begin, 25447898b1daSGrygorii Strashko .complete = cpsw_ethtool_op_complete, 2545ce52c744SIvan Khoronzhuk .get_channels = cpsw_get_channels, 2546ce52c744SIvan Khoronzhuk .set_channels = cpsw_set_channels, 25472479876dSPhilippe Reynes .get_link_ksettings = cpsw_get_link_ksettings, 25482479876dSPhilippe Reynes .set_link_ksettings = cpsw_set_link_ksettings, 2549a0909949SYegor Yefremov .get_eee = cpsw_get_eee, 2550a0909949SYegor Yefremov .set_eee = cpsw_set_eee, 25516bb10c2bSYegor Yefremov .nway_reset = cpsw_nway_reset, 2552be034fc1SGrygorii Strashko .get_ringparam = cpsw_get_ringparam, 2553be034fc1SGrygorii Strashko .set_ringparam = cpsw_set_ringparam, 2554df828598SMugunthan V N }; 2555df828598SMugunthan V N 2556606f3993SIvan Khoronzhuk static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_common *cpsw, 2557549985eeSRichard Cochran u32 slave_reg_ofs, u32 sliver_reg_ofs) 2558df828598SMugunthan V N { 25595d8d0d4dSIvan Khoronzhuk void __iomem *regs = cpsw->regs; 2560df828598SMugunthan V N int slave_num = slave->slave_num; 2561606f3993SIvan Khoronzhuk struct cpsw_slave_data *data = cpsw->data.slave_data + slave_num; 2562df828598SMugunthan V N 2563df828598SMugunthan V N slave->data = data; 2564549985eeSRichard Cochran slave->regs = regs + slave_reg_ofs; 2565549985eeSRichard Cochran slave->sliver = regs + sliver_reg_ofs; 2566d9ba8f9eSMugunthan V N slave->port_vlan = data->dual_emac_res_vlan; 2567df828598SMugunthan V N } 2568df828598SMugunthan V N 2569552165bcSDavid Rivshin static int cpsw_probe_dt(struct cpsw_platform_data *data, 25702eb32b0aSMugunthan V N struct platform_device *pdev) 25712eb32b0aSMugunthan V N { 25722eb32b0aSMugunthan V N struct device_node *node = pdev->dev.of_node; 25732eb32b0aSMugunthan V N struct device_node *slave_node; 25742eb32b0aSMugunthan V N int i = 0, ret; 25752eb32b0aSMugunthan V N u32 prop; 25762eb32b0aSMugunthan V N 25772eb32b0aSMugunthan V N if (!node) 25782eb32b0aSMugunthan V N return -EINVAL; 25792eb32b0aSMugunthan V N 25802eb32b0aSMugunthan V N if (of_property_read_u32(node, "slaves", &prop)) { 258188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing slaves property in the DT.\n"); 25822eb32b0aSMugunthan V N return -EINVAL; 25832eb32b0aSMugunthan V N } 25842eb32b0aSMugunthan V N data->slaves = prop; 25852eb32b0aSMugunthan V N 2586e86ac13bSMugunthan V N if (of_property_read_u32(node, "active_slave", &prop)) { 258788c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing active_slave property in the DT.\n"); 2588aa1a15e2SDaniel Mack return -EINVAL; 258978ca0b28SRichard Cochran } 2590e86ac13bSMugunthan V N data->active_slave = prop; 259178ca0b28SRichard Cochran 2592aa1a15e2SDaniel Mack data->slave_data = devm_kzalloc(&pdev->dev, data->slaves 2593aa1a15e2SDaniel Mack * sizeof(struct cpsw_slave_data), 2594b2adaca9SJoe Perches GFP_KERNEL); 2595b2adaca9SJoe Perches if (!data->slave_data) 2596aa1a15e2SDaniel Mack return -ENOMEM; 25972eb32b0aSMugunthan V N 25982eb32b0aSMugunthan V N if (of_property_read_u32(node, "cpdma_channels", &prop)) { 259988c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n"); 2600aa1a15e2SDaniel Mack return -EINVAL; 26012eb32b0aSMugunthan V N } 26022eb32b0aSMugunthan V N data->channels = prop; 26032eb32b0aSMugunthan V N 26042eb32b0aSMugunthan V N if (of_property_read_u32(node, "ale_entries", &prop)) { 260588c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n"); 2606aa1a15e2SDaniel Mack return -EINVAL; 26072eb32b0aSMugunthan V N } 26082eb32b0aSMugunthan V N data->ale_entries = prop; 26092eb32b0aSMugunthan V N 26102eb32b0aSMugunthan V N if (of_property_read_u32(node, "bd_ram_size", &prop)) { 261188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n"); 2612aa1a15e2SDaniel Mack return -EINVAL; 26132eb32b0aSMugunthan V N } 26142eb32b0aSMugunthan V N data->bd_ram_size = prop; 26152eb32b0aSMugunthan V N 26162eb32b0aSMugunthan V N if (of_property_read_u32(node, "mac_control", &prop)) { 261788c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing mac_control property in the DT.\n"); 2618aa1a15e2SDaniel Mack return -EINVAL; 26192eb32b0aSMugunthan V N } 26202eb32b0aSMugunthan V N data->mac_control = prop; 26212eb32b0aSMugunthan V N 2622281abd96SMarkus Pargmann if (of_property_read_bool(node, "dual_emac")) 2623281abd96SMarkus Pargmann data->dual_emac = 1; 2624d9ba8f9eSMugunthan V N 26251fb19aa7SVaibhav Hiremath /* 26261fb19aa7SVaibhav Hiremath * Populate all the child nodes here... 26271fb19aa7SVaibhav Hiremath */ 26281fb19aa7SVaibhav Hiremath ret = of_platform_populate(node, NULL, NULL, &pdev->dev); 26291fb19aa7SVaibhav Hiremath /* We do not want to force this, as in some cases may not have child */ 26301fb19aa7SVaibhav Hiremath if (ret) 263188c99ff6SGeorge Cherian dev_warn(&pdev->dev, "Doesn't have any child node\n"); 26321fb19aa7SVaibhav Hiremath 26338658aaf2SBen Hutchings for_each_available_child_of_node(node, slave_node) { 2634549985eeSRichard Cochran struct cpsw_slave_data *slave_data = data->slave_data + i; 2635549985eeSRichard Cochran const void *mac_addr = NULL; 2636549985eeSRichard Cochran int lenp; 2637549985eeSRichard Cochran const __be32 *parp; 2638549985eeSRichard Cochran 2639f468b10eSMarkus Pargmann /* This is no slave child node, continue */ 2640f468b10eSMarkus Pargmann if (strcmp(slave_node->name, "slave")) 2641f468b10eSMarkus Pargmann continue; 2642f468b10eSMarkus Pargmann 2643552165bcSDavid Rivshin slave_data->phy_node = of_parse_phandle(slave_node, 2644552165bcSDavid Rivshin "phy-handle", 0); 2645f1eea5c1SDavid Rivshin parp = of_get_property(slave_node, "phy_id", &lenp); 2646ae092b5bSDavid Rivshin if (slave_data->phy_node) { 2647ae092b5bSDavid Rivshin dev_dbg(&pdev->dev, 2648ae092b5bSDavid Rivshin "slave[%d] using phy-handle=\"%s\"\n", 2649ae092b5bSDavid Rivshin i, slave_data->phy_node->full_name); 2650ae092b5bSDavid Rivshin } else if (of_phy_is_fixed_link(slave_node)) { 2651dfc0a6d3SDavid Rivshin /* In the case of a fixed PHY, the DT node associated 2652dfc0a6d3SDavid Rivshin * to the PHY is the Ethernet MAC DT node. 2653dfc0a6d3SDavid Rivshin */ 26541f71e8c9SMarkus Brunner ret = of_phy_register_fixed_link(slave_node); 265523a09873SJohan Hovold if (ret) { 265623a09873SJohan Hovold if (ret != -EPROBE_DEFER) 265723a09873SJohan Hovold dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret); 26581f71e8c9SMarkus Brunner return ret; 265923a09873SJohan Hovold } 266006cd6d6eSDavid Rivshin slave_data->phy_node = of_node_get(slave_node); 2661f1eea5c1SDavid Rivshin } else if (parp) { 2662f1eea5c1SDavid Rivshin u32 phyid; 2663f1eea5c1SDavid Rivshin struct device_node *mdio_node; 2664f1eea5c1SDavid Rivshin struct platform_device *mdio; 2665f1eea5c1SDavid Rivshin 2666f1eea5c1SDavid Rivshin if (lenp != (sizeof(__be32) * 2)) { 2667f1eea5c1SDavid Rivshin dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i); 266847276fccSMugunthan V N goto no_phy_slave; 2669549985eeSRichard Cochran } 2670549985eeSRichard Cochran mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); 2671549985eeSRichard Cochran phyid = be32_to_cpup(parp+1); 2672549985eeSRichard Cochran mdio = of_find_device_by_node(mdio_node); 267360e71ab5SJohan Hovold of_node_put(mdio_node); 26746954cc1fSJohan Hovold if (!mdio) { 267556fdb2e0SMarkus Pargmann dev_err(&pdev->dev, "Missing mdio platform device\n"); 26766954cc1fSJohan Hovold return -EINVAL; 26776954cc1fSJohan Hovold } 2678549985eeSRichard Cochran snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), 2679549985eeSRichard Cochran PHY_ID_FMT, mdio->name, phyid); 268086e1d5adSJohan Hovold put_device(&mdio->dev); 2681f1eea5c1SDavid Rivshin } else { 2682ae092b5bSDavid Rivshin dev_err(&pdev->dev, 2683ae092b5bSDavid Rivshin "No slave[%d] phy_id, phy-handle, or fixed-link property\n", 2684ae092b5bSDavid Rivshin i); 2685f1eea5c1SDavid Rivshin goto no_phy_slave; 2686f1eea5c1SDavid Rivshin } 268747276fccSMugunthan V N slave_data->phy_if = of_get_phy_mode(slave_node); 268847276fccSMugunthan V N if (slave_data->phy_if < 0) { 268947276fccSMugunthan V N dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n", 269047276fccSMugunthan V N i); 269147276fccSMugunthan V N return slave_data->phy_if; 269247276fccSMugunthan V N } 269347276fccSMugunthan V N 269447276fccSMugunthan V N no_phy_slave: 2695549985eeSRichard Cochran mac_addr = of_get_mac_address(slave_node); 26960ba517b1SMarkus Pargmann if (mac_addr) { 2697549985eeSRichard Cochran memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); 26980ba517b1SMarkus Pargmann } else { 2699b6745f6eSMugunthan V N ret = ti_cm_get_macid(&pdev->dev, i, 27000ba517b1SMarkus Pargmann slave_data->mac_addr); 27010ba517b1SMarkus Pargmann if (ret) 27020ba517b1SMarkus Pargmann return ret; 27030ba517b1SMarkus Pargmann } 2704d9ba8f9eSMugunthan V N if (data->dual_emac) { 270591c4166cSMugunthan V N if (of_property_read_u32(slave_node, "dual_emac_res_vlan", 2706d9ba8f9eSMugunthan V N &prop)) { 270788c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n"); 2708d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = i+1; 270988c99ff6SGeorge Cherian dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n", 2710d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan, i); 2711d9ba8f9eSMugunthan V N } else { 2712d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = prop; 2713d9ba8f9eSMugunthan V N } 2714d9ba8f9eSMugunthan V N } 2715d9ba8f9eSMugunthan V N 2716549985eeSRichard Cochran i++; 27173a27bfacSMugunthan V N if (i == data->slaves) 27183a27bfacSMugunthan V N break; 2719549985eeSRichard Cochran } 2720549985eeSRichard Cochran 27212eb32b0aSMugunthan V N return 0; 27222eb32b0aSMugunthan V N } 27232eb32b0aSMugunthan V N 2724a4e32b0dSJohan Hovold static void cpsw_remove_dt(struct platform_device *pdev) 2725a4e32b0dSJohan Hovold { 27268cbcc466SJohan Hovold struct net_device *ndev = platform_get_drvdata(pdev); 27278cbcc466SJohan Hovold struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 27288cbcc466SJohan Hovold struct cpsw_platform_data *data = &cpsw->data; 27298cbcc466SJohan Hovold struct device_node *node = pdev->dev.of_node; 27308cbcc466SJohan Hovold struct device_node *slave_node; 27318cbcc466SJohan Hovold int i = 0; 27328cbcc466SJohan Hovold 27338cbcc466SJohan Hovold for_each_available_child_of_node(node, slave_node) { 27348cbcc466SJohan Hovold struct cpsw_slave_data *slave_data = &data->slave_data[i]; 27358cbcc466SJohan Hovold 27368cbcc466SJohan Hovold if (strcmp(slave_node->name, "slave")) 27378cbcc466SJohan Hovold continue; 27388cbcc466SJohan Hovold 27393f65047cSJohan Hovold if (of_phy_is_fixed_link(slave_node)) 27403f65047cSJohan Hovold of_phy_deregister_fixed_link(slave_node); 27418cbcc466SJohan Hovold 27428cbcc466SJohan Hovold of_node_put(slave_data->phy_node); 27438cbcc466SJohan Hovold 27448cbcc466SJohan Hovold i++; 27458cbcc466SJohan Hovold if (i == data->slaves) 27468cbcc466SJohan Hovold break; 27478cbcc466SJohan Hovold } 27488cbcc466SJohan Hovold 2749a4e32b0dSJohan Hovold of_platform_depopulate(&pdev->dev); 2750a4e32b0dSJohan Hovold } 2751a4e32b0dSJohan Hovold 275256e31bd8SIvan Khoronzhuk static int cpsw_probe_dual_emac(struct cpsw_priv *priv) 2753d9ba8f9eSMugunthan V N { 2754606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2755606f3993SIvan Khoronzhuk struct cpsw_platform_data *data = &cpsw->data; 2756d9ba8f9eSMugunthan V N struct net_device *ndev; 2757d9ba8f9eSMugunthan V N struct cpsw_priv *priv_sl2; 2758e38b5a3dSIvan Khoronzhuk int ret = 0; 2759d9ba8f9eSMugunthan V N 2760e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2761d9ba8f9eSMugunthan V N if (!ndev) { 276256e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error allocating net_device\n"); 2763d9ba8f9eSMugunthan V N return -ENOMEM; 2764d9ba8f9eSMugunthan V N } 2765d9ba8f9eSMugunthan V N 2766d9ba8f9eSMugunthan V N priv_sl2 = netdev_priv(ndev); 2767606f3993SIvan Khoronzhuk priv_sl2->cpsw = cpsw; 2768d9ba8f9eSMugunthan V N priv_sl2->ndev = ndev; 2769d9ba8f9eSMugunthan V N priv_sl2->dev = &ndev->dev; 2770d9ba8f9eSMugunthan V N priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 2771d9ba8f9eSMugunthan V N 2772d9ba8f9eSMugunthan V N if (is_valid_ether_addr(data->slave_data[1].mac_addr)) { 2773d9ba8f9eSMugunthan V N memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr, 2774d9ba8f9eSMugunthan V N ETH_ALEN); 277556e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n", 277656e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2777d9ba8f9eSMugunthan V N } else { 2778d9ba8f9eSMugunthan V N random_ether_addr(priv_sl2->mac_addr); 277956e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n", 278056e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2781d9ba8f9eSMugunthan V N } 2782d9ba8f9eSMugunthan V N memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN); 2783d9ba8f9eSMugunthan V N 2784d9ba8f9eSMugunthan V N priv_sl2->emac_port = 1; 2785606f3993SIvan Khoronzhuk cpsw->slaves[1].ndev = ndev; 2786f646968fSPatrick McHardy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 2787d9ba8f9eSMugunthan V N 2788d9ba8f9eSMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 27897ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 2790d9ba8f9eSMugunthan V N 2791d9ba8f9eSMugunthan V N /* register the network device */ 279256e31bd8SIvan Khoronzhuk SET_NETDEV_DEV(ndev, cpsw->dev); 2793d9ba8f9eSMugunthan V N ret = register_netdev(ndev); 2794d9ba8f9eSMugunthan V N if (ret) { 279556e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error registering net device\n"); 2796d9ba8f9eSMugunthan V N free_netdev(ndev); 2797d9ba8f9eSMugunthan V N ret = -ENODEV; 2798d9ba8f9eSMugunthan V N } 2799d9ba8f9eSMugunthan V N 2800d9ba8f9eSMugunthan V N return ret; 2801d9ba8f9eSMugunthan V N } 2802d9ba8f9eSMugunthan V N 28037da11600SMugunthan V N #define CPSW_QUIRK_IRQ BIT(0) 28047da11600SMugunthan V N 28057da11600SMugunthan V N static struct platform_device_id cpsw_devtype[] = { 28067da11600SMugunthan V N { 28077da11600SMugunthan V N /* keep it for existing comaptibles */ 28087da11600SMugunthan V N .name = "cpsw", 28097da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28107da11600SMugunthan V N }, { 28117da11600SMugunthan V N .name = "am335x-cpsw", 28127da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28137da11600SMugunthan V N }, { 28147da11600SMugunthan V N .name = "am4372-cpsw", 28157da11600SMugunthan V N .driver_data = 0, 28167da11600SMugunthan V N }, { 28177da11600SMugunthan V N .name = "dra7-cpsw", 28187da11600SMugunthan V N .driver_data = 0, 28197da11600SMugunthan V N }, { 28207da11600SMugunthan V N /* sentinel */ 28217da11600SMugunthan V N } 28227da11600SMugunthan V N }; 28237da11600SMugunthan V N MODULE_DEVICE_TABLE(platform, cpsw_devtype); 28247da11600SMugunthan V N 28257da11600SMugunthan V N enum ti_cpsw_type { 28267da11600SMugunthan V N CPSW = 0, 28277da11600SMugunthan V N AM335X_CPSW, 28287da11600SMugunthan V N AM4372_CPSW, 28297da11600SMugunthan V N DRA7_CPSW, 28307da11600SMugunthan V N }; 28317da11600SMugunthan V N 28327da11600SMugunthan V N static const struct of_device_id cpsw_of_mtable[] = { 28337da11600SMugunthan V N { .compatible = "ti,cpsw", .data = &cpsw_devtype[CPSW], }, 28347da11600SMugunthan V N { .compatible = "ti,am335x-cpsw", .data = &cpsw_devtype[AM335X_CPSW], }, 28357da11600SMugunthan V N { .compatible = "ti,am4372-cpsw", .data = &cpsw_devtype[AM4372_CPSW], }, 28367da11600SMugunthan V N { .compatible = "ti,dra7-cpsw", .data = &cpsw_devtype[DRA7_CPSW], }, 28377da11600SMugunthan V N { /* sentinel */ }, 28387da11600SMugunthan V N }; 28397da11600SMugunthan V N MODULE_DEVICE_TABLE(of, cpsw_of_mtable); 28407da11600SMugunthan V N 2841663e12e6SBill Pemberton static int cpsw_probe(struct platform_device *pdev) 2842df828598SMugunthan V N { 2843ef4183a1SIvan Khoronzhuk struct clk *clk; 2844d1bd9acfSSebastian Siewior struct cpsw_platform_data *data; 2845df828598SMugunthan V N struct net_device *ndev; 2846df828598SMugunthan V N struct cpsw_priv *priv; 2847df828598SMugunthan V N struct cpdma_params dma_params; 2848df828598SMugunthan V N struct cpsw_ale_params ale_params; 2849aa1a15e2SDaniel Mack void __iomem *ss_regs; 28508a2c9a5aSGrygorii Strashko void __iomem *cpts_regs; 2851aa1a15e2SDaniel Mack struct resource *res, *ss_res; 28527da11600SMugunthan V N const struct of_device_id *of_id; 28531d147ccbSMugunthan V N struct gpio_descs *mode; 2854549985eeSRichard Cochran u32 slave_offset, sliver_offset, slave_size; 2855649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 28565087b915SFelipe Balbi int ret = 0, i; 28575087b915SFelipe Balbi int irq; 2858df828598SMugunthan V N 2859649a1688SIvan Khoronzhuk cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL); 28603420ea88SJohan Hovold if (!cpsw) 28613420ea88SJohan Hovold return -ENOMEM; 28623420ea88SJohan Hovold 286356e31bd8SIvan Khoronzhuk cpsw->dev = &pdev->dev; 2864649a1688SIvan Khoronzhuk 2865e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2866df828598SMugunthan V N if (!ndev) { 286788c99ff6SGeorge Cherian dev_err(&pdev->dev, "error allocating net_device\n"); 2868df828598SMugunthan V N return -ENOMEM; 2869df828598SMugunthan V N } 2870df828598SMugunthan V N 2871df828598SMugunthan V N platform_set_drvdata(pdev, ndev); 2872df828598SMugunthan V N priv = netdev_priv(ndev); 2873649a1688SIvan Khoronzhuk priv->cpsw = cpsw; 2874df828598SMugunthan V N priv->ndev = ndev; 2875df828598SMugunthan V N priv->dev = &ndev->dev; 2876df828598SMugunthan V N priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 28772a05a622SIvan Khoronzhuk cpsw->rx_packet_max = max(rx_packet_max, 128); 2878df828598SMugunthan V N 28791d147ccbSMugunthan V N mode = devm_gpiod_get_array_optional(&pdev->dev, "mode", GPIOD_OUT_LOW); 28801d147ccbSMugunthan V N if (IS_ERR(mode)) { 28811d147ccbSMugunthan V N ret = PTR_ERR(mode); 28821d147ccbSMugunthan V N dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret); 28831d147ccbSMugunthan V N goto clean_ndev_ret; 28841d147ccbSMugunthan V N } 28851d147ccbSMugunthan V N 28861fb19aa7SVaibhav Hiremath /* 28871fb19aa7SVaibhav Hiremath * This may be required here for child devices. 28881fb19aa7SVaibhav Hiremath */ 28891fb19aa7SVaibhav Hiremath pm_runtime_enable(&pdev->dev); 28901fb19aa7SVaibhav Hiremath 2891739683b4SMugunthan V N /* Select default pin state */ 2892739683b4SMugunthan V N pinctrl_pm_select_default_state(&pdev->dev); 2893739683b4SMugunthan V N 2894a4e32b0dSJohan Hovold /* Need to enable clocks with runtime PM api to access module 2895a4e32b0dSJohan Hovold * registers 2896a4e32b0dSJohan Hovold */ 2897a4e32b0dSJohan Hovold ret = pm_runtime_get_sync(&pdev->dev); 2898a4e32b0dSJohan Hovold if (ret < 0) { 2899a4e32b0dSJohan Hovold pm_runtime_put_noidle(&pdev->dev); 2900aa1a15e2SDaniel Mack goto clean_runtime_disable_ret; 29012eb32b0aSMugunthan V N } 2902a4e32b0dSJohan Hovold 290323a09873SJohan Hovold ret = cpsw_probe_dt(&cpsw->data, pdev); 290423a09873SJohan Hovold if (ret) 2905a4e32b0dSJohan Hovold goto clean_dt_ret; 290623a09873SJohan Hovold 2907606f3993SIvan Khoronzhuk data = &cpsw->data; 2908e05107e6SIvan Khoronzhuk cpsw->rx_ch_num = 1; 2909e05107e6SIvan Khoronzhuk cpsw->tx_ch_num = 1; 29102eb32b0aSMugunthan V N 2911df828598SMugunthan V N if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 2912df828598SMugunthan V N memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 291388c99ff6SGeorge Cherian dev_info(&pdev->dev, "Detected MACID = %pM\n", priv->mac_addr); 2914df828598SMugunthan V N } else { 29157efd26d0SJoe Perches eth_random_addr(priv->mac_addr); 291688c99ff6SGeorge Cherian dev_info(&pdev->dev, "Random MACID = %pM\n", priv->mac_addr); 2917df828598SMugunthan V N } 2918df828598SMugunthan V N 2919df828598SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 2920df828598SMugunthan V N 2921606f3993SIvan Khoronzhuk cpsw->slaves = devm_kzalloc(&pdev->dev, 2922aa1a15e2SDaniel Mack sizeof(struct cpsw_slave) * data->slaves, 2923df828598SMugunthan V N GFP_KERNEL); 2924606f3993SIvan Khoronzhuk if (!cpsw->slaves) { 2925aa1a15e2SDaniel Mack ret = -ENOMEM; 2926a4e32b0dSJohan Hovold goto clean_dt_ret; 2927df828598SMugunthan V N } 2928df828598SMugunthan V N for (i = 0; i < data->slaves; i++) 2929606f3993SIvan Khoronzhuk cpsw->slaves[i].slave_num = i; 2930df828598SMugunthan V N 2931606f3993SIvan Khoronzhuk cpsw->slaves[0].ndev = ndev; 2932d9ba8f9eSMugunthan V N priv->emac_port = 0; 2933d9ba8f9eSMugunthan V N 2934ef4183a1SIvan Khoronzhuk clk = devm_clk_get(&pdev->dev, "fck"); 2935ef4183a1SIvan Khoronzhuk if (IS_ERR(clk)) { 2936aa1a15e2SDaniel Mack dev_err(priv->dev, "fck is not found\n"); 2937f150bd7fSMugunthan V N ret = -ENODEV; 2938a4e32b0dSJohan Hovold goto clean_dt_ret; 2939df828598SMugunthan V N } 29402a05a622SIvan Khoronzhuk cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000; 2941df828598SMugunthan V N 2942aa1a15e2SDaniel Mack ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2943aa1a15e2SDaniel Mack ss_regs = devm_ioremap_resource(&pdev->dev, ss_res); 2944aa1a15e2SDaniel Mack if (IS_ERR(ss_regs)) { 2945aa1a15e2SDaniel Mack ret = PTR_ERR(ss_regs); 2946a4e32b0dSJohan Hovold goto clean_dt_ret; 2947df828598SMugunthan V N } 29485d8d0d4dSIvan Khoronzhuk cpsw->regs = ss_regs; 2949df828598SMugunthan V N 29502a05a622SIvan Khoronzhuk cpsw->version = readl(&cpsw->regs->id_ver); 2951f280e89aSMugunthan V N 2952aa1a15e2SDaniel Mack res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 29535d8d0d4dSIvan Khoronzhuk cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res); 29545d8d0d4dSIvan Khoronzhuk if (IS_ERR(cpsw->wr_regs)) { 29555d8d0d4dSIvan Khoronzhuk ret = PTR_ERR(cpsw->wr_regs); 2956a4e32b0dSJohan Hovold goto clean_dt_ret; 2957df828598SMugunthan V N } 2958df828598SMugunthan V N 2959df828598SMugunthan V N memset(&dma_params, 0, sizeof(dma_params)); 2960549985eeSRichard Cochran memset(&ale_params, 0, sizeof(ale_params)); 2961549985eeSRichard Cochran 29622a05a622SIvan Khoronzhuk switch (cpsw->version) { 2963549985eeSRichard Cochran case CPSW_VERSION_1: 29645d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET; 29658a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW1_CPTS_OFFSET; 29665d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW1_HW_STATS; 2967549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET; 2968549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET; 2969549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET; 2970549985eeSRichard Cochran slave_offset = CPSW1_SLAVE_OFFSET; 2971549985eeSRichard Cochran slave_size = CPSW1_SLAVE_SIZE; 2972549985eeSRichard Cochran sliver_offset = CPSW1_SLIVER_OFFSET; 2973549985eeSRichard Cochran dma_params.desc_mem_phys = 0; 2974549985eeSRichard Cochran break; 2975549985eeSRichard Cochran case CPSW_VERSION_2: 2976c193f365SMugunthan V N case CPSW_VERSION_3: 2977926489beSMugunthan V N case CPSW_VERSION_4: 29785d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET; 29798a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW2_CPTS_OFFSET; 29805d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW2_HW_STATS; 2981549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET; 2982549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET; 2983549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET; 2984549985eeSRichard Cochran slave_offset = CPSW2_SLAVE_OFFSET; 2985549985eeSRichard Cochran slave_size = CPSW2_SLAVE_SIZE; 2986549985eeSRichard Cochran sliver_offset = CPSW2_SLIVER_OFFSET; 2987549985eeSRichard Cochran dma_params.desc_mem_phys = 2988aa1a15e2SDaniel Mack (u32 __force) ss_res->start + CPSW2_BD_OFFSET; 2989549985eeSRichard Cochran break; 2990549985eeSRichard Cochran default: 29912a05a622SIvan Khoronzhuk dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version); 2992549985eeSRichard Cochran ret = -ENODEV; 2993a4e32b0dSJohan Hovold goto clean_dt_ret; 2994549985eeSRichard Cochran } 2995606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 2996606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[i]; 2997606f3993SIvan Khoronzhuk 2998606f3993SIvan Khoronzhuk cpsw_slave_init(slave, cpsw, slave_offset, sliver_offset); 2999549985eeSRichard Cochran slave_offset += slave_size; 3000549985eeSRichard Cochran sliver_offset += SLIVER_SIZE; 3001549985eeSRichard Cochran } 3002549985eeSRichard Cochran 3003df828598SMugunthan V N dma_params.dev = &pdev->dev; 3004549985eeSRichard Cochran dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH; 3005549985eeSRichard Cochran dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE; 3006549985eeSRichard Cochran dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP; 3007549985eeSRichard Cochran dma_params.txcp = dma_params.txhdp + CPDMA_TXCP; 3008549985eeSRichard Cochran dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP; 3009df828598SMugunthan V N 3010df828598SMugunthan V N dma_params.num_chan = data->channels; 3011df828598SMugunthan V N dma_params.has_soft_reset = true; 3012df828598SMugunthan V N dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 3013df828598SMugunthan V N dma_params.desc_mem_size = data->bd_ram_size; 3014df828598SMugunthan V N dma_params.desc_align = 16; 3015df828598SMugunthan V N dma_params.has_ext_regs = true; 3016549985eeSRichard Cochran dma_params.desc_hw_addr = dma_params.desc_mem_phys; 301783fcad0cSIvan Khoronzhuk dma_params.bus_freq_mhz = cpsw->bus_freq_mhz; 301890225bf0SGrygorii Strashko dma_params.descs_pool_size = descs_pool_size; 3019df828598SMugunthan V N 30202c836bd9SIvan Khoronzhuk cpsw->dma = cpdma_ctlr_create(&dma_params); 30212c836bd9SIvan Khoronzhuk if (!cpsw->dma) { 3022df828598SMugunthan V N dev_err(priv->dev, "error initializing dma\n"); 3023df828598SMugunthan V N ret = -ENOMEM; 3024a4e32b0dSJohan Hovold goto clean_dt_ret; 3025df828598SMugunthan V N } 3026df828598SMugunthan V N 30278feb0a19SIvan Khoronzhuk cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_tx_handler, 0); 30288feb0a19SIvan Khoronzhuk cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1); 30298feb0a19SIvan Khoronzhuk if (WARN_ON(!cpsw->rxv[0].ch || !cpsw->txv[0].ch)) { 3030df828598SMugunthan V N dev_err(priv->dev, "error initializing dma channels\n"); 3031df828598SMugunthan V N ret = -ENOMEM; 3032df828598SMugunthan V N goto clean_dma_ret; 3033df828598SMugunthan V N } 3034df828598SMugunthan V N 3035df828598SMugunthan V N ale_params.dev = &ndev->dev; 3036df828598SMugunthan V N ale_params.ale_ageout = ale_ageout; 3037df828598SMugunthan V N ale_params.ale_entries = data->ale_entries; 3038df828598SMugunthan V N ale_params.ale_ports = data->slaves; 3039df828598SMugunthan V N 30402a05a622SIvan Khoronzhuk cpsw->ale = cpsw_ale_create(&ale_params); 30412a05a622SIvan Khoronzhuk if (!cpsw->ale) { 3042df828598SMugunthan V N dev_err(priv->dev, "error initializing ale engine\n"); 3043df828598SMugunthan V N ret = -ENODEV; 3044df828598SMugunthan V N goto clean_dma_ret; 3045df828598SMugunthan V N } 3046df828598SMugunthan V N 30474a88fb95SGrygorii Strashko cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node); 30488a2c9a5aSGrygorii Strashko if (IS_ERR(cpsw->cpts)) { 30498a2c9a5aSGrygorii Strashko ret = PTR_ERR(cpsw->cpts); 30508a2c9a5aSGrygorii Strashko goto clean_ale_ret; 30518a2c9a5aSGrygorii Strashko } 30528a2c9a5aSGrygorii Strashko 3053c03abd84SFelipe Balbi ndev->irq = platform_get_irq(pdev, 1); 3054df828598SMugunthan V N if (ndev->irq < 0) { 3055df828598SMugunthan V N dev_err(priv->dev, "error getting irq resource\n"); 3056c1e3334fSJulia Lawall ret = ndev->irq; 3057df828598SMugunthan V N goto clean_ale_ret; 3058df828598SMugunthan V N } 3059df828598SMugunthan V N 30607da11600SMugunthan V N of_id = of_match_device(cpsw_of_mtable, &pdev->dev); 30617da11600SMugunthan V N if (of_id) { 30627da11600SMugunthan V N pdev->id_entry = of_id->data; 30637da11600SMugunthan V N if (pdev->id_entry->driver_data) 3064e38b5a3dSIvan Khoronzhuk cpsw->quirk_irq = true; 30657da11600SMugunthan V N } 30667da11600SMugunthan V N 3067c03abd84SFelipe Balbi /* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and 3068c03abd84SFelipe Balbi * MISC IRQs which are always kept disabled with this driver so 3069c03abd84SFelipe Balbi * we will not request them. 3070c03abd84SFelipe Balbi * 3071c03abd84SFelipe Balbi * If anyone wants to implement support for those, make sure to 3072c03abd84SFelipe Balbi * first request and append them to irqs_table array. 3073c03abd84SFelipe Balbi */ 3074c2b32e58SDaniel Mack 3075c03abd84SFelipe Balbi /* RX IRQ */ 30765087b915SFelipe Balbi irq = platform_get_irq(pdev, 1); 3077c1e3334fSJulia Lawall if (irq < 0) { 3078c1e3334fSJulia Lawall ret = irq; 30795087b915SFelipe Balbi goto clean_ale_ret; 3080c1e3334fSJulia Lawall } 30815087b915SFelipe Balbi 3082e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[0] = irq; 3083c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_rx_interrupt, 3084dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 30855087b915SFelipe Balbi if (ret < 0) { 30865087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 30875087b915SFelipe Balbi goto clean_ale_ret; 3088df828598SMugunthan V N } 3089df828598SMugunthan V N 3090c03abd84SFelipe Balbi /* TX IRQ */ 30915087b915SFelipe Balbi irq = platform_get_irq(pdev, 2); 3092c1e3334fSJulia Lawall if (irq < 0) { 3093c1e3334fSJulia Lawall ret = irq; 30945087b915SFelipe Balbi goto clean_ale_ret; 3095c1e3334fSJulia Lawall } 30965087b915SFelipe Balbi 3097e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[1] = irq; 3098c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_tx_interrupt, 3099dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31005087b915SFelipe Balbi if (ret < 0) { 31015087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31025087b915SFelipe Balbi goto clean_ale_ret; 31035087b915SFelipe Balbi } 3104c2b32e58SDaniel Mack 3105f646968fSPatrick McHardy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3106df828598SMugunthan V N 3107df828598SMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 31087ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 3109dbc4ec52SIvan Khoronzhuk netif_napi_add(ndev, &cpsw->napi_rx, cpsw_rx_poll, CPSW_POLL_WEIGHT); 3110dbc4ec52SIvan Khoronzhuk netif_tx_napi_add(ndev, &cpsw->napi_tx, cpsw_tx_poll, CPSW_POLL_WEIGHT); 31110be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 3112df828598SMugunthan V N 3113df828598SMugunthan V N /* register the network device */ 3114df828598SMugunthan V N SET_NETDEV_DEV(ndev, &pdev->dev); 3115df828598SMugunthan V N ret = register_netdev(ndev); 3116df828598SMugunthan V N if (ret) { 3117df828598SMugunthan V N dev_err(priv->dev, "error registering net device\n"); 3118df828598SMugunthan V N ret = -ENODEV; 3119aa1a15e2SDaniel Mack goto clean_ale_ret; 3120df828598SMugunthan V N } 3121df828598SMugunthan V N 312290225bf0SGrygorii Strashko cpsw_notice(priv, probe, 312390225bf0SGrygorii Strashko "initialized device (regs %pa, irq %d, pool size %d)\n", 312490225bf0SGrygorii Strashko &ss_res->start, ndev->irq, dma_params.descs_pool_size); 3125606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 312656e31bd8SIvan Khoronzhuk ret = cpsw_probe_dual_emac(priv); 3127d9ba8f9eSMugunthan V N if (ret) { 3128d9ba8f9eSMugunthan V N cpsw_err(priv, probe, "error probe slave 2 emac interface\n"); 3129a7fe9d46SJohan Hovold goto clean_unregister_netdev_ret; 3130d9ba8f9eSMugunthan V N } 3131d9ba8f9eSMugunthan V N } 3132d9ba8f9eSMugunthan V N 3133c46ab7e0SJohan Hovold pm_runtime_put(&pdev->dev); 3134c46ab7e0SJohan Hovold 3135df828598SMugunthan V N return 0; 3136df828598SMugunthan V N 3137a7fe9d46SJohan Hovold clean_unregister_netdev_ret: 3138a7fe9d46SJohan Hovold unregister_netdev(ndev); 3139df828598SMugunthan V N clean_ale_ret: 31402a05a622SIvan Khoronzhuk cpsw_ale_destroy(cpsw->ale); 3141df828598SMugunthan V N clean_dma_ret: 31422c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3143a4e32b0dSJohan Hovold clean_dt_ret: 3144a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 3145c46ab7e0SJohan Hovold pm_runtime_put_sync(&pdev->dev); 3146aa1a15e2SDaniel Mack clean_runtime_disable_ret: 3147f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 3148df828598SMugunthan V N clean_ndev_ret: 3149d1bd9acfSSebastian Siewior free_netdev(priv->ndev); 3150df828598SMugunthan V N return ret; 3151df828598SMugunthan V N } 3152df828598SMugunthan V N 3153663e12e6SBill Pemberton static int cpsw_remove(struct platform_device *pdev) 3154df828598SMugunthan V N { 3155df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 31562a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 31578a0b6dc9SGrygorii Strashko int ret; 31588a0b6dc9SGrygorii Strashko 31598a0b6dc9SGrygorii Strashko ret = pm_runtime_get_sync(&pdev->dev); 31608a0b6dc9SGrygorii Strashko if (ret < 0) { 31618a0b6dc9SGrygorii Strashko pm_runtime_put_noidle(&pdev->dev); 31628a0b6dc9SGrygorii Strashko return ret; 31638a0b6dc9SGrygorii Strashko } 3164df828598SMugunthan V N 3165606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3166606f3993SIvan Khoronzhuk unregister_netdev(cpsw->slaves[1].ndev); 3167d1bd9acfSSebastian Siewior unregister_netdev(ndev); 3168df828598SMugunthan V N 31698a2c9a5aSGrygorii Strashko cpts_release(cpsw->cpts); 31702a05a622SIvan Khoronzhuk cpsw_ale_destroy(cpsw->ale); 31712c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3172a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 31738a0b6dc9SGrygorii Strashko pm_runtime_put_sync(&pdev->dev); 31748a0b6dc9SGrygorii Strashko pm_runtime_disable(&pdev->dev); 3175606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3176606f3993SIvan Khoronzhuk free_netdev(cpsw->slaves[1].ndev); 3177df828598SMugunthan V N free_netdev(ndev); 3178df828598SMugunthan V N return 0; 3179df828598SMugunthan V N } 3180df828598SMugunthan V N 31818963a504SGrygorii Strashko #ifdef CONFIG_PM_SLEEP 3182df828598SMugunthan V N static int cpsw_suspend(struct device *dev) 3183df828598SMugunthan V N { 3184df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3185df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3186606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3187df828598SMugunthan V N 3188606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3189618073e3SMugunthan V N int i; 3190618073e3SMugunthan V N 3191606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3192606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3193606f3993SIvan Khoronzhuk cpsw_ndo_stop(cpsw->slaves[i].ndev); 3194618073e3SMugunthan V N } 3195618073e3SMugunthan V N } else { 3196df828598SMugunthan V N if (netif_running(ndev)) 3197df828598SMugunthan V N cpsw_ndo_stop(ndev); 3198618073e3SMugunthan V N } 31991e7a2e21SDaniel Mack 3200739683b4SMugunthan V N /* Select sleep pin state */ 320156e31bd8SIvan Khoronzhuk pinctrl_pm_select_sleep_state(dev); 3202739683b4SMugunthan V N 3203df828598SMugunthan V N return 0; 3204df828598SMugunthan V N } 3205df828598SMugunthan V N 3206df828598SMugunthan V N static int cpsw_resume(struct device *dev) 3207df828598SMugunthan V N { 3208df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3209df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3210606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = netdev_priv(ndev); 3211df828598SMugunthan V N 3212739683b4SMugunthan V N /* Select default pin state */ 321356e31bd8SIvan Khoronzhuk pinctrl_pm_select_default_state(dev); 3214739683b4SMugunthan V N 32154ccfd638SGrygorii Strashko /* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */ 32164ccfd638SGrygorii Strashko rtnl_lock(); 3217606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3218618073e3SMugunthan V N int i; 3219618073e3SMugunthan V N 3220606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3221606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3222606f3993SIvan Khoronzhuk cpsw_ndo_open(cpsw->slaves[i].ndev); 3223618073e3SMugunthan V N } 3224618073e3SMugunthan V N } else { 3225df828598SMugunthan V N if (netif_running(ndev)) 3226df828598SMugunthan V N cpsw_ndo_open(ndev); 3227618073e3SMugunthan V N } 32284ccfd638SGrygorii Strashko rtnl_unlock(); 32294ccfd638SGrygorii Strashko 3230df828598SMugunthan V N return 0; 3231df828598SMugunthan V N } 32328963a504SGrygorii Strashko #endif 3233df828598SMugunthan V N 32348963a504SGrygorii Strashko static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume); 3235df828598SMugunthan V N 3236df828598SMugunthan V N static struct platform_driver cpsw_driver = { 3237df828598SMugunthan V N .driver = { 3238df828598SMugunthan V N .name = "cpsw", 3239df828598SMugunthan V N .pm = &cpsw_pm_ops, 32401e5c76d4SSachin Kamat .of_match_table = cpsw_of_mtable, 3241df828598SMugunthan V N }, 3242df828598SMugunthan V N .probe = cpsw_probe, 3243663e12e6SBill Pemberton .remove = cpsw_remove, 3244df828598SMugunthan V N }; 3245df828598SMugunthan V N 32466fb3b6b5SGrygorii Strashko module_platform_driver(cpsw_driver); 3247df828598SMugunthan V N 3248df828598SMugunthan V N MODULE_LICENSE("GPL"); 3249df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 3250df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 3251df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 3252