1df828598SMugunthan V N /* 2df828598SMugunthan V N * Texas Instruments Ethernet Switch Driver 3df828598SMugunthan V N * 4df828598SMugunthan V N * Copyright (C) 2012 Texas Instruments 5df828598SMugunthan V N * 6df828598SMugunthan V N * This program is free software; you can redistribute it and/or 7df828598SMugunthan V N * modify it under the terms of the GNU General Public License as 8df828598SMugunthan V N * published by the Free Software Foundation version 2. 9df828598SMugunthan V N * 10df828598SMugunthan V N * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11df828598SMugunthan V N * kind, whether express or implied; without even the implied warranty 12df828598SMugunthan V N * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13df828598SMugunthan V N * GNU General Public License for more details. 14df828598SMugunthan V N */ 15df828598SMugunthan V N 16df828598SMugunthan V N #include <linux/kernel.h> 17df828598SMugunthan V N #include <linux/io.h> 18df828598SMugunthan V N #include <linux/clk.h> 19df828598SMugunthan V N #include <linux/timer.h> 20df828598SMugunthan V N #include <linux/module.h> 21df828598SMugunthan V N #include <linux/platform_device.h> 22df828598SMugunthan V N #include <linux/irqreturn.h> 23df828598SMugunthan V N #include <linux/interrupt.h> 24df828598SMugunthan V N #include <linux/if_ether.h> 25df828598SMugunthan V N #include <linux/etherdevice.h> 26df828598SMugunthan V N #include <linux/netdevice.h> 272e5b38abSRichard Cochran #include <linux/net_tstamp.h> 28df828598SMugunthan V N #include <linux/phy.h> 29df828598SMugunthan V N #include <linux/workqueue.h> 30df828598SMugunthan V N #include <linux/delay.h> 31f150bd7fSMugunthan V N #include <linux/pm_runtime.h> 321d147ccbSMugunthan V N #include <linux/gpio.h> 332eb32b0aSMugunthan V N #include <linux/of.h> 349e42f715SHeiko Schocher #include <linux/of_mdio.h> 352eb32b0aSMugunthan V N #include <linux/of_net.h> 362eb32b0aSMugunthan V N #include <linux/of_device.h> 373b72c2feSMugunthan V N #include <linux/if_vlan.h> 38df828598SMugunthan V N 39739683b4SMugunthan V N #include <linux/pinctrl/consumer.h> 40df828598SMugunthan V N 41dbe34724SMugunthan V N #include "cpsw.h" 42df828598SMugunthan V N #include "cpsw_ale.h" 432e5b38abSRichard Cochran #include "cpts.h" 44df828598SMugunthan V N #include "davinci_cpdma.h" 45df828598SMugunthan V N 46df828598SMugunthan V N #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 47df828598SMugunthan V N NETIF_MSG_DRV | NETIF_MSG_LINK | \ 48df828598SMugunthan V N NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 49df828598SMugunthan V N NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 50df828598SMugunthan V N NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 51df828598SMugunthan V N NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 52df828598SMugunthan V N NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 53df828598SMugunthan V N NETIF_MSG_RX_STATUS) 54df828598SMugunthan V N 55df828598SMugunthan V N #define cpsw_info(priv, type, format, ...) \ 56df828598SMugunthan V N do { \ 57df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 58df828598SMugunthan V N dev_info(priv->dev, format, ## __VA_ARGS__); \ 59df828598SMugunthan V N } while (0) 60df828598SMugunthan V N 61df828598SMugunthan V N #define cpsw_err(priv, type, format, ...) \ 62df828598SMugunthan V N do { \ 63df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 64df828598SMugunthan V N dev_err(priv->dev, format, ## __VA_ARGS__); \ 65df828598SMugunthan V N } while (0) 66df828598SMugunthan V N 67df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...) \ 68df828598SMugunthan V N do { \ 69df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 70df828598SMugunthan V N dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 71df828598SMugunthan V N } while (0) 72df828598SMugunthan V N 73df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...) \ 74df828598SMugunthan V N do { \ 75df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 76df828598SMugunthan V N dev_notice(priv->dev, format, ## __VA_ARGS__); \ 77df828598SMugunthan V N } while (0) 78df828598SMugunthan V N 795c50a856SMugunthan V N #define ALE_ALL_PORTS 0x7 805c50a856SMugunthan V N 81df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 82df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 83df828598SMugunthan V N #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 84df828598SMugunthan V N 85e90cfac6SRichard Cochran #define CPSW_VERSION_1 0x19010a 86e90cfac6SRichard Cochran #define CPSW_VERSION_2 0x19010c 87c193f365SMugunthan V N #define CPSW_VERSION_3 0x19010f 88926489beSMugunthan V N #define CPSW_VERSION_4 0x190112 89549985eeSRichard Cochran 90549985eeSRichard Cochran #define HOST_PORT_NUM 0 91c6395f12SGrygorii Strashko #define CPSW_ALE_PORTS_NUM 3 92549985eeSRichard Cochran #define SLIVER_SIZE 0x40 93549985eeSRichard Cochran 94549985eeSRichard Cochran #define CPSW1_HOST_PORT_OFFSET 0x028 95549985eeSRichard Cochran #define CPSW1_SLAVE_OFFSET 0x050 96549985eeSRichard Cochran #define CPSW1_SLAVE_SIZE 0x040 97549985eeSRichard Cochran #define CPSW1_CPDMA_OFFSET 0x100 98549985eeSRichard Cochran #define CPSW1_STATERAM_OFFSET 0x200 99d9718546SMugunthan V N #define CPSW1_HW_STATS 0x400 100549985eeSRichard Cochran #define CPSW1_CPTS_OFFSET 0x500 101549985eeSRichard Cochran #define CPSW1_ALE_OFFSET 0x600 102549985eeSRichard Cochran #define CPSW1_SLIVER_OFFSET 0x700 103549985eeSRichard Cochran 104549985eeSRichard Cochran #define CPSW2_HOST_PORT_OFFSET 0x108 105549985eeSRichard Cochran #define CPSW2_SLAVE_OFFSET 0x200 106549985eeSRichard Cochran #define CPSW2_SLAVE_SIZE 0x100 107549985eeSRichard Cochran #define CPSW2_CPDMA_OFFSET 0x800 108d9718546SMugunthan V N #define CPSW2_HW_STATS 0x900 109549985eeSRichard Cochran #define CPSW2_STATERAM_OFFSET 0xa00 110549985eeSRichard Cochran #define CPSW2_CPTS_OFFSET 0xc00 111549985eeSRichard Cochran #define CPSW2_ALE_OFFSET 0xd00 112549985eeSRichard Cochran #define CPSW2_SLIVER_OFFSET 0xd80 113549985eeSRichard Cochran #define CPSW2_BD_OFFSET 0x2000 114549985eeSRichard Cochran 115df828598SMugunthan V N #define CPDMA_RXTHRESH 0x0c0 116df828598SMugunthan V N #define CPDMA_RXFREE 0x0e0 117df828598SMugunthan V N #define CPDMA_TXHDP 0x00 118df828598SMugunthan V N #define CPDMA_RXHDP 0x20 119df828598SMugunthan V N #define CPDMA_TXCP 0x40 120df828598SMugunthan V N #define CPDMA_RXCP 0x60 121df828598SMugunthan V N 122df828598SMugunthan V N #define CPSW_POLL_WEIGHT 64 1239421c901SGrygorii Strashko #define CPSW_MIN_PACKET_SIZE (VLAN_ETH_ZLEN) 1249421c901SGrygorii Strashko #define CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 125df828598SMugunthan V N 126df828598SMugunthan V N #define RX_PRIORITY_MAPPING 0x76543210 127df828598SMugunthan V N #define TX_PRIORITY_MAPPING 0x33221100 128e05107e6SIvan Khoronzhuk #define CPDMA_TX_PRIORITY_MAP 0x01234567 129df828598SMugunthan V N 1303b72c2feSMugunthan V N #define CPSW_VLAN_AWARE BIT(1) 1313b72c2feSMugunthan V N #define CPSW_ALE_VLAN_AWARE 1 1323b72c2feSMugunthan V N 13335717d8dSJohn Ogness #define CPSW_FIFO_NORMAL_MODE (0 << 16) 13435717d8dSJohn Ogness #define CPSW_FIFO_DUAL_MAC_MODE (1 << 16) 13535717d8dSJohn Ogness #define CPSW_FIFO_RATE_LIMIT_MODE (2 << 16) 136d9ba8f9eSMugunthan V N 137ff5b8ef2SMugunthan V N #define CPSW_INTPACEEN (0x3f << 16) 138ff5b8ef2SMugunthan V N #define CPSW_INTPRESCALE_MASK (0x7FF << 0) 139ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_CNT 63 140ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_CNT 2 141ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_INTVL (1000 / CPSW_CMINTMIN_CNT) 142ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_INTVL ((1000 / CPSW_CMINTMAX_CNT) + 1) 143ff5b8ef2SMugunthan V N 144606f3993SIvan Khoronzhuk #define cpsw_slave_index(cpsw, priv) \ 145606f3993SIvan Khoronzhuk ((cpsw->data.dual_emac) ? priv->emac_port : \ 146606f3993SIvan Khoronzhuk cpsw->data.active_slave) 147e38b5a3dSIvan Khoronzhuk #define IRQ_NUM 2 148e05107e6SIvan Khoronzhuk #define CPSW_MAX_QUEUES 8 14990225bf0SGrygorii Strashko #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 150d3bb9c58SMugunthan V N 151df828598SMugunthan V N static int debug_level; 152df828598SMugunthan V N module_param(debug_level, int, 0); 153df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 154df828598SMugunthan V N 155df828598SMugunthan V N static int ale_ageout = 10; 156df828598SMugunthan V N module_param(ale_ageout, int, 0); 157df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 158df828598SMugunthan V N 159df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 160df828598SMugunthan V N module_param(rx_packet_max, int, 0); 161df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 162df828598SMugunthan V N 16390225bf0SGrygorii Strashko static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT; 16490225bf0SGrygorii Strashko module_param(descs_pool_size, int, 0444); 16590225bf0SGrygorii Strashko MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool"); 16690225bf0SGrygorii Strashko 167996a5c27SRichard Cochran struct cpsw_wr_regs { 168df828598SMugunthan V N u32 id_ver; 169df828598SMugunthan V N u32 soft_reset; 170df828598SMugunthan V N u32 control; 171df828598SMugunthan V N u32 int_control; 172df828598SMugunthan V N u32 rx_thresh_en; 173df828598SMugunthan V N u32 rx_en; 174df828598SMugunthan V N u32 tx_en; 175df828598SMugunthan V N u32 misc_en; 176ff5b8ef2SMugunthan V N u32 mem_allign1[8]; 177ff5b8ef2SMugunthan V N u32 rx_thresh_stat; 178ff5b8ef2SMugunthan V N u32 rx_stat; 179ff5b8ef2SMugunthan V N u32 tx_stat; 180ff5b8ef2SMugunthan V N u32 misc_stat; 181ff5b8ef2SMugunthan V N u32 mem_allign2[8]; 182ff5b8ef2SMugunthan V N u32 rx_imax; 183ff5b8ef2SMugunthan V N u32 tx_imax; 184ff5b8ef2SMugunthan V N 185df828598SMugunthan V N }; 186df828598SMugunthan V N 187996a5c27SRichard Cochran struct cpsw_ss_regs { 188df828598SMugunthan V N u32 id_ver; 189df828598SMugunthan V N u32 control; 190df828598SMugunthan V N u32 soft_reset; 191df828598SMugunthan V N u32 stat_port_en; 192df828598SMugunthan V N u32 ptype; 193bd357af2SRichard Cochran u32 soft_idle; 194bd357af2SRichard Cochran u32 thru_rate; 195bd357af2SRichard Cochran u32 gap_thresh; 196bd357af2SRichard Cochran u32 tx_start_wds; 197bd357af2SRichard Cochran u32 flow_control; 198bd357af2SRichard Cochran u32 vlan_ltype; 199bd357af2SRichard Cochran u32 ts_ltype; 200bd357af2SRichard Cochran u32 dlr_ltype; 201df828598SMugunthan V N }; 202df828598SMugunthan V N 2039750a3adSRichard Cochran /* CPSW_PORT_V1 */ 2049750a3adSRichard Cochran #define CPSW1_MAX_BLKS 0x00 /* Maximum FIFO Blocks */ 2059750a3adSRichard Cochran #define CPSW1_BLK_CNT 0x04 /* FIFO Block Usage Count (Read Only) */ 2069750a3adSRichard Cochran #define CPSW1_TX_IN_CTL 0x08 /* Transmit FIFO Control */ 2079750a3adSRichard Cochran #define CPSW1_PORT_VLAN 0x0c /* VLAN Register */ 2089750a3adSRichard Cochran #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 2099750a3adSRichard Cochran #define CPSW1_TS_CTL 0x14 /* Time Sync Control */ 2109750a3adSRichard Cochran #define CPSW1_TS_SEQ_LTYPE 0x18 /* Time Sync Sequence ID Offset and Msg Type */ 2119750a3adSRichard Cochran #define CPSW1_TS_VLAN 0x1c /* Time Sync VLAN1 and VLAN2 */ 2129750a3adSRichard Cochran 2139750a3adSRichard Cochran /* CPSW_PORT_V2 */ 2149750a3adSRichard Cochran #define CPSW2_CONTROL 0x00 /* Control Register */ 2159750a3adSRichard Cochran #define CPSW2_MAX_BLKS 0x08 /* Maximum FIFO Blocks */ 2169750a3adSRichard Cochran #define CPSW2_BLK_CNT 0x0c /* FIFO Block Usage Count (Read Only) */ 2179750a3adSRichard Cochran #define CPSW2_TX_IN_CTL 0x10 /* Transmit FIFO Control */ 2189750a3adSRichard Cochran #define CPSW2_PORT_VLAN 0x14 /* VLAN Register */ 2199750a3adSRichard Cochran #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 2209750a3adSRichard Cochran #define CPSW2_TS_SEQ_MTYPE 0x1c /* Time Sync Sequence ID Offset and Msg Type */ 2219750a3adSRichard Cochran 2229750a3adSRichard Cochran /* CPSW_PORT_V1 and V2 */ 2239750a3adSRichard Cochran #define SA_LO 0x20 /* CPGMAC_SL Source Address Low */ 2249750a3adSRichard Cochran #define SA_HI 0x24 /* CPGMAC_SL Source Address High */ 2259750a3adSRichard Cochran #define SEND_PERCENT 0x28 /* Transmit Queue Send Percentages */ 2269750a3adSRichard Cochran 2279750a3adSRichard Cochran /* CPSW_PORT_V2 only */ 2289750a3adSRichard Cochran #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */ 2299750a3adSRichard Cochran #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */ 2309750a3adSRichard Cochran #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */ 2319750a3adSRichard Cochran #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */ 2329750a3adSRichard Cochran #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */ 2339750a3adSRichard Cochran #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */ 2349750a3adSRichard Cochran #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */ 2359750a3adSRichard Cochran #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */ 2369750a3adSRichard Cochran 2379750a3adSRichard Cochran /* Bit definitions for the CPSW2_CONTROL register */ 2389750a3adSRichard Cochran #define PASS_PRI_TAGGED (1<<24) /* Pass Priority Tagged */ 2399750a3adSRichard Cochran #define VLAN_LTYPE2_EN (1<<21) /* VLAN LTYPE 2 enable */ 2409750a3adSRichard Cochran #define VLAN_LTYPE1_EN (1<<20) /* VLAN LTYPE 1 enable */ 2419750a3adSRichard Cochran #define DSCP_PRI_EN (1<<16) /* DSCP Priority Enable */ 2429750a3adSRichard Cochran #define TS_320 (1<<14) /* Time Sync Dest Port 320 enable */ 2439750a3adSRichard Cochran #define TS_319 (1<<13) /* Time Sync Dest Port 319 enable */ 2449750a3adSRichard Cochran #define TS_132 (1<<12) /* Time Sync Dest IP Addr 132 enable */ 2459750a3adSRichard Cochran #define TS_131 (1<<11) /* Time Sync Dest IP Addr 131 enable */ 2469750a3adSRichard Cochran #define TS_130 (1<<10) /* Time Sync Dest IP Addr 130 enable */ 2479750a3adSRichard Cochran #define TS_129 (1<<9) /* Time Sync Dest IP Addr 129 enable */ 24809c55372SGeorge Cherian #define TS_TTL_NONZERO (1<<8) /* Time Sync Time To Live Non-zero enable */ 24909c55372SGeorge Cherian #define TS_ANNEX_F_EN (1<<6) /* Time Sync Annex F enable */ 2509750a3adSRichard Cochran #define TS_ANNEX_D_EN (1<<4) /* Time Sync Annex D enable */ 2519750a3adSRichard Cochran #define TS_LTYPE2_EN (1<<3) /* Time Sync LTYPE 2 enable */ 2529750a3adSRichard Cochran #define TS_LTYPE1_EN (1<<2) /* Time Sync LTYPE 1 enable */ 2539750a3adSRichard Cochran #define TS_TX_EN (1<<1) /* Time Sync Transmit Enable */ 2549750a3adSRichard Cochran #define TS_RX_EN (1<<0) /* Time Sync Receive Enable */ 2559750a3adSRichard Cochran 25609c55372SGeorge Cherian #define CTRL_V2_TS_BITS \ 25709c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 25809c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_D_EN | TS_LTYPE1_EN) 2599750a3adSRichard Cochran 26009c55372SGeorge Cherian #define CTRL_V2_ALL_TS_MASK (CTRL_V2_TS_BITS | TS_TX_EN | TS_RX_EN) 26109c55372SGeorge Cherian #define CTRL_V2_TX_TS_BITS (CTRL_V2_TS_BITS | TS_TX_EN) 26209c55372SGeorge Cherian #define CTRL_V2_RX_TS_BITS (CTRL_V2_TS_BITS | TS_RX_EN) 26309c55372SGeorge Cherian 26409c55372SGeorge Cherian 26509c55372SGeorge Cherian #define CTRL_V3_TS_BITS \ 26609c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 26709c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\ 26809c55372SGeorge Cherian TS_LTYPE1_EN) 26909c55372SGeorge Cherian 27009c55372SGeorge Cherian #define CTRL_V3_ALL_TS_MASK (CTRL_V3_TS_BITS | TS_TX_EN | TS_RX_EN) 27109c55372SGeorge Cherian #define CTRL_V3_TX_TS_BITS (CTRL_V3_TS_BITS | TS_TX_EN) 27209c55372SGeorge Cherian #define CTRL_V3_RX_TS_BITS (CTRL_V3_TS_BITS | TS_RX_EN) 2739750a3adSRichard Cochran 2749750a3adSRichard Cochran /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */ 2759750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_SHIFT (16) /* Time Sync Sequence ID Offset */ 2769750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_MASK (0x3f) 2779750a3adSRichard Cochran #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */ 2789750a3adSRichard Cochran #define TS_MSG_TYPE_EN_MASK (0xffff) 2799750a3adSRichard Cochran 2809750a3adSRichard Cochran /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 2819750a3adSRichard Cochran #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3)) 282df828598SMugunthan V N 2832e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_CTL register */ 2842e5b38abSRichard Cochran #define CPSW_V1_TS_RX_EN BIT(0) 2852e5b38abSRichard Cochran #define CPSW_V1_TS_TX_EN BIT(4) 2862e5b38abSRichard Cochran #define CPSW_V1_MSG_TYPE_OFS 16 2872e5b38abSRichard Cochran 2882e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */ 2892e5b38abSRichard Cochran #define CPSW_V1_SEQ_ID_OFS_SHIFT 16 2902e5b38abSRichard Cochran 29148f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_TX 15 29248f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_TX_SHIFT 4 29348f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_RX 5 29448f5bcccSGrygorii Strashko 295df828598SMugunthan V N struct cpsw_host_regs { 296df828598SMugunthan V N u32 max_blks; 297df828598SMugunthan V N u32 blk_cnt; 298d9ba8f9eSMugunthan V N u32 tx_in_ctl; 299df828598SMugunthan V N u32 port_vlan; 300df828598SMugunthan V N u32 tx_pri_map; 301df828598SMugunthan V N u32 cpdma_tx_pri_map; 302df828598SMugunthan V N u32 cpdma_rx_chan_map; 303df828598SMugunthan V N }; 304df828598SMugunthan V N 305df828598SMugunthan V N struct cpsw_sliver_regs { 306df828598SMugunthan V N u32 id_ver; 307df828598SMugunthan V N u32 mac_control; 308df828598SMugunthan V N u32 mac_status; 309df828598SMugunthan V N u32 soft_reset; 310df828598SMugunthan V N u32 rx_maxlen; 311df828598SMugunthan V N u32 __reserved_0; 312df828598SMugunthan V N u32 rx_pause; 313df828598SMugunthan V N u32 tx_pause; 314df828598SMugunthan V N u32 __reserved_1; 315df828598SMugunthan V N u32 rx_pri_map; 316df828598SMugunthan V N }; 317df828598SMugunthan V N 318d9718546SMugunthan V N struct cpsw_hw_stats { 319d9718546SMugunthan V N u32 rxgoodframes; 320d9718546SMugunthan V N u32 rxbroadcastframes; 321d9718546SMugunthan V N u32 rxmulticastframes; 322d9718546SMugunthan V N u32 rxpauseframes; 323d9718546SMugunthan V N u32 rxcrcerrors; 324d9718546SMugunthan V N u32 rxaligncodeerrors; 325d9718546SMugunthan V N u32 rxoversizedframes; 326d9718546SMugunthan V N u32 rxjabberframes; 327d9718546SMugunthan V N u32 rxundersizedframes; 328d9718546SMugunthan V N u32 rxfragments; 329d9718546SMugunthan V N u32 __pad_0[2]; 330d9718546SMugunthan V N u32 rxoctets; 331d9718546SMugunthan V N u32 txgoodframes; 332d9718546SMugunthan V N u32 txbroadcastframes; 333d9718546SMugunthan V N u32 txmulticastframes; 334d9718546SMugunthan V N u32 txpauseframes; 335d9718546SMugunthan V N u32 txdeferredframes; 336d9718546SMugunthan V N u32 txcollisionframes; 337d9718546SMugunthan V N u32 txsinglecollframes; 338d9718546SMugunthan V N u32 txmultcollframes; 339d9718546SMugunthan V N u32 txexcessivecollisions; 340d9718546SMugunthan V N u32 txlatecollisions; 341d9718546SMugunthan V N u32 txunderrun; 342d9718546SMugunthan V N u32 txcarriersenseerrors; 343d9718546SMugunthan V N u32 txoctets; 344d9718546SMugunthan V N u32 octetframes64; 345d9718546SMugunthan V N u32 octetframes65t127; 346d9718546SMugunthan V N u32 octetframes128t255; 347d9718546SMugunthan V N u32 octetframes256t511; 348d9718546SMugunthan V N u32 octetframes512t1023; 349d9718546SMugunthan V N u32 octetframes1024tup; 350d9718546SMugunthan V N u32 netoctets; 351d9718546SMugunthan V N u32 rxsofoverruns; 352d9718546SMugunthan V N u32 rxmofoverruns; 353d9718546SMugunthan V N u32 rxdmaoverruns; 354d9718546SMugunthan V N }; 355d9718546SMugunthan V N 3562c8a14d6SGrygorii Strashko struct cpsw_slave_data { 3572c8a14d6SGrygorii Strashko struct device_node *phy_node; 3582c8a14d6SGrygorii Strashko char phy_id[MII_BUS_ID_SIZE]; 3592c8a14d6SGrygorii Strashko int phy_if; 3602c8a14d6SGrygorii Strashko u8 mac_addr[ETH_ALEN]; 3612c8a14d6SGrygorii Strashko u16 dual_emac_res_vlan; /* Reserved VLAN for DualEMAC */ 3622c8a14d6SGrygorii Strashko }; 3632c8a14d6SGrygorii Strashko 3642c8a14d6SGrygorii Strashko struct cpsw_platform_data { 3652c8a14d6SGrygorii Strashko struct cpsw_slave_data *slave_data; 3662c8a14d6SGrygorii Strashko u32 ss_reg_ofs; /* Subsystem control register offset */ 3672c8a14d6SGrygorii Strashko u32 channels; /* number of cpdma channels (symmetric) */ 3682c8a14d6SGrygorii Strashko u32 slaves; /* number of slave cpgmac ports */ 3692c8a14d6SGrygorii Strashko u32 active_slave; /* time stamping, ethtool and SIOCGMIIPHY slave */ 3702c8a14d6SGrygorii Strashko u32 ale_entries; /* ale table size */ 3712c8a14d6SGrygorii Strashko u32 bd_ram_size; /*buffer descriptor ram size */ 3722c8a14d6SGrygorii Strashko u32 mac_control; /* Mac control register */ 3732c8a14d6SGrygorii Strashko u16 default_vlan; /* Def VLAN for ALE lookup in VLAN aware mode*/ 3742c8a14d6SGrygorii Strashko bool dual_emac; /* Enable Dual EMAC mode */ 3752c8a14d6SGrygorii Strashko }; 3762c8a14d6SGrygorii Strashko 377df828598SMugunthan V N struct cpsw_slave { 3789750a3adSRichard Cochran void __iomem *regs; 379df828598SMugunthan V N struct cpsw_sliver_regs __iomem *sliver; 380df828598SMugunthan V N int slave_num; 381df828598SMugunthan V N u32 mac_control; 382df828598SMugunthan V N struct cpsw_slave_data *data; 383df828598SMugunthan V N struct phy_device *phy; 384d9ba8f9eSMugunthan V N struct net_device *ndev; 385d9ba8f9eSMugunthan V N u32 port_vlan; 386df828598SMugunthan V N }; 387df828598SMugunthan V N 3889750a3adSRichard Cochran static inline u32 slave_read(struct cpsw_slave *slave, u32 offset) 3899750a3adSRichard Cochran { 390dda5f5feSGrygorii Strashko return readl_relaxed(slave->regs + offset); 3919750a3adSRichard Cochran } 3929750a3adSRichard Cochran 3939750a3adSRichard Cochran static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset) 3949750a3adSRichard Cochran { 395dda5f5feSGrygorii Strashko writel_relaxed(val, slave->regs + offset); 3969750a3adSRichard Cochran } 3979750a3adSRichard Cochran 3988feb0a19SIvan Khoronzhuk struct cpsw_vector { 3998feb0a19SIvan Khoronzhuk struct cpdma_chan *ch; 4008feb0a19SIvan Khoronzhuk int budget; 4018feb0a19SIvan Khoronzhuk }; 4028feb0a19SIvan Khoronzhuk 403649a1688SIvan Khoronzhuk struct cpsw_common { 40456e31bd8SIvan Khoronzhuk struct device *dev; 405606f3993SIvan Khoronzhuk struct cpsw_platform_data data; 406dbc4ec52SIvan Khoronzhuk struct napi_struct napi_rx; 407dbc4ec52SIvan Khoronzhuk struct napi_struct napi_tx; 4085d8d0d4dSIvan Khoronzhuk struct cpsw_ss_regs __iomem *regs; 4095d8d0d4dSIvan Khoronzhuk struct cpsw_wr_regs __iomem *wr_regs; 4105d8d0d4dSIvan Khoronzhuk u8 __iomem *hw_stats; 4115d8d0d4dSIvan Khoronzhuk struct cpsw_host_regs __iomem *host_port_regs; 4122a05a622SIvan Khoronzhuk u32 version; 4132a05a622SIvan Khoronzhuk u32 coal_intvl; 4142a05a622SIvan Khoronzhuk u32 bus_freq_mhz; 4152a05a622SIvan Khoronzhuk int rx_packet_max; 416606f3993SIvan Khoronzhuk struct cpsw_slave *slaves; 4172c836bd9SIvan Khoronzhuk struct cpdma_ctlr *dma; 4188feb0a19SIvan Khoronzhuk struct cpsw_vector txv[CPSW_MAX_QUEUES]; 4198feb0a19SIvan Khoronzhuk struct cpsw_vector rxv[CPSW_MAX_QUEUES]; 4202a05a622SIvan Khoronzhuk struct cpsw_ale *ale; 421e38b5a3dSIvan Khoronzhuk bool quirk_irq; 422e38b5a3dSIvan Khoronzhuk bool rx_irq_disabled; 423e38b5a3dSIvan Khoronzhuk bool tx_irq_disabled; 424e38b5a3dSIvan Khoronzhuk u32 irqs_table[IRQ_NUM]; 4252a05a622SIvan Khoronzhuk struct cpts *cpts; 426e05107e6SIvan Khoronzhuk int rx_ch_num, tx_ch_num; 4270be01b8eSIvan Khoronzhuk int speed; 428d5bc1613SIvan Khoronzhuk int usage_count; 429649a1688SIvan Khoronzhuk }; 430649a1688SIvan Khoronzhuk 431649a1688SIvan Khoronzhuk struct cpsw_priv { 432df828598SMugunthan V N struct net_device *ndev; 433df828598SMugunthan V N struct device *dev; 434df828598SMugunthan V N u32 msg_enable; 435df828598SMugunthan V N u8 mac_addr[ETH_ALEN]; 4361923d6e4SMugunthan V N bool rx_pause; 4371923d6e4SMugunthan V N bool tx_pause; 438d9ba8f9eSMugunthan V N u32 emac_port; 439649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 440df828598SMugunthan V N }; 441df828598SMugunthan V N 442d9718546SMugunthan V N struct cpsw_stats { 443d9718546SMugunthan V N char stat_string[ETH_GSTRING_LEN]; 444d9718546SMugunthan V N int type; 445d9718546SMugunthan V N int sizeof_stat; 446d9718546SMugunthan V N int stat_offset; 447d9718546SMugunthan V N }; 448d9718546SMugunthan V N 449d9718546SMugunthan V N enum { 450d9718546SMugunthan V N CPSW_STATS, 451d9718546SMugunthan V N CPDMA_RX_STATS, 452d9718546SMugunthan V N CPDMA_TX_STATS, 453d9718546SMugunthan V N }; 454d9718546SMugunthan V N 455d9718546SMugunthan V N #define CPSW_STAT(m) CPSW_STATS, \ 456d9718546SMugunthan V N sizeof(((struct cpsw_hw_stats *)0)->m), \ 457d9718546SMugunthan V N offsetof(struct cpsw_hw_stats, m) 458d9718546SMugunthan V N #define CPDMA_RX_STAT(m) CPDMA_RX_STATS, \ 459d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 460d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 461d9718546SMugunthan V N #define CPDMA_TX_STAT(m) CPDMA_TX_STATS, \ 462d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 463d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 464d9718546SMugunthan V N 465d9718546SMugunthan V N static const struct cpsw_stats cpsw_gstrings_stats[] = { 466d9718546SMugunthan V N { "Good Rx Frames", CPSW_STAT(rxgoodframes) }, 467d9718546SMugunthan V N { "Broadcast Rx Frames", CPSW_STAT(rxbroadcastframes) }, 468d9718546SMugunthan V N { "Multicast Rx Frames", CPSW_STAT(rxmulticastframes) }, 469d9718546SMugunthan V N { "Pause Rx Frames", CPSW_STAT(rxpauseframes) }, 470d9718546SMugunthan V N { "Rx CRC Errors", CPSW_STAT(rxcrcerrors) }, 471d9718546SMugunthan V N { "Rx Align/Code Errors", CPSW_STAT(rxaligncodeerrors) }, 472d9718546SMugunthan V N { "Oversize Rx Frames", CPSW_STAT(rxoversizedframes) }, 473d9718546SMugunthan V N { "Rx Jabbers", CPSW_STAT(rxjabberframes) }, 474d9718546SMugunthan V N { "Undersize (Short) Rx Frames", CPSW_STAT(rxundersizedframes) }, 475d9718546SMugunthan V N { "Rx Fragments", CPSW_STAT(rxfragments) }, 476d9718546SMugunthan V N { "Rx Octets", CPSW_STAT(rxoctets) }, 477d9718546SMugunthan V N { "Good Tx Frames", CPSW_STAT(txgoodframes) }, 478d9718546SMugunthan V N { "Broadcast Tx Frames", CPSW_STAT(txbroadcastframes) }, 479d9718546SMugunthan V N { "Multicast Tx Frames", CPSW_STAT(txmulticastframes) }, 480d9718546SMugunthan V N { "Pause Tx Frames", CPSW_STAT(txpauseframes) }, 481d9718546SMugunthan V N { "Deferred Tx Frames", CPSW_STAT(txdeferredframes) }, 482d9718546SMugunthan V N { "Collisions", CPSW_STAT(txcollisionframes) }, 483d9718546SMugunthan V N { "Single Collision Tx Frames", CPSW_STAT(txsinglecollframes) }, 484d9718546SMugunthan V N { "Multiple Collision Tx Frames", CPSW_STAT(txmultcollframes) }, 485d9718546SMugunthan V N { "Excessive Collisions", CPSW_STAT(txexcessivecollisions) }, 486d9718546SMugunthan V N { "Late Collisions", CPSW_STAT(txlatecollisions) }, 487d9718546SMugunthan V N { "Tx Underrun", CPSW_STAT(txunderrun) }, 488d9718546SMugunthan V N { "Carrier Sense Errors", CPSW_STAT(txcarriersenseerrors) }, 489d9718546SMugunthan V N { "Tx Octets", CPSW_STAT(txoctets) }, 490d9718546SMugunthan V N { "Rx + Tx 64 Octet Frames", CPSW_STAT(octetframes64) }, 491d9718546SMugunthan V N { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) }, 492d9718546SMugunthan V N { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) }, 493d9718546SMugunthan V N { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) }, 494d9718546SMugunthan V N { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) }, 495d9718546SMugunthan V N { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) }, 496d9718546SMugunthan V N { "Net Octets", CPSW_STAT(netoctets) }, 497d9718546SMugunthan V N { "Rx Start of Frame Overruns", CPSW_STAT(rxsofoverruns) }, 498d9718546SMugunthan V N { "Rx Middle of Frame Overruns", CPSW_STAT(rxmofoverruns) }, 499d9718546SMugunthan V N { "Rx DMA Overruns", CPSW_STAT(rxdmaoverruns) }, 500d9718546SMugunthan V N }; 501d9718546SMugunthan V N 502e05107e6SIvan Khoronzhuk static const struct cpsw_stats cpsw_gstrings_ch_stats[] = { 503e05107e6SIvan Khoronzhuk { "head_enqueue", CPDMA_RX_STAT(head_enqueue) }, 504e05107e6SIvan Khoronzhuk { "tail_enqueue", CPDMA_RX_STAT(tail_enqueue) }, 505e05107e6SIvan Khoronzhuk { "pad_enqueue", CPDMA_RX_STAT(pad_enqueue) }, 506e05107e6SIvan Khoronzhuk { "misqueued", CPDMA_RX_STAT(misqueued) }, 507e05107e6SIvan Khoronzhuk { "desc_alloc_fail", CPDMA_RX_STAT(desc_alloc_fail) }, 508e05107e6SIvan Khoronzhuk { "pad_alloc_fail", CPDMA_RX_STAT(pad_alloc_fail) }, 509e05107e6SIvan Khoronzhuk { "runt_receive_buf", CPDMA_RX_STAT(runt_receive_buff) }, 510e05107e6SIvan Khoronzhuk { "runt_transmit_buf", CPDMA_RX_STAT(runt_transmit_buff) }, 511e05107e6SIvan Khoronzhuk { "empty_dequeue", CPDMA_RX_STAT(empty_dequeue) }, 512e05107e6SIvan Khoronzhuk { "busy_dequeue", CPDMA_RX_STAT(busy_dequeue) }, 513e05107e6SIvan Khoronzhuk { "good_dequeue", CPDMA_RX_STAT(good_dequeue) }, 514e05107e6SIvan Khoronzhuk { "requeue", CPDMA_RX_STAT(requeue) }, 515e05107e6SIvan Khoronzhuk { "teardown_dequeue", CPDMA_RX_STAT(teardown_dequeue) }, 516e05107e6SIvan Khoronzhuk }; 517e05107e6SIvan Khoronzhuk 518e05107e6SIvan Khoronzhuk #define CPSW_STATS_COMMON_LEN ARRAY_SIZE(cpsw_gstrings_stats) 519e05107e6SIvan Khoronzhuk #define CPSW_STATS_CH_LEN ARRAY_SIZE(cpsw_gstrings_ch_stats) 520d9718546SMugunthan V N 521649a1688SIvan Khoronzhuk #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw) 522dbc4ec52SIvan Khoronzhuk #define napi_to_cpsw(napi) container_of(napi, struct cpsw_common, napi) 523df828598SMugunthan V N #define for_each_slave(priv, func, arg...) \ 524df828598SMugunthan V N do { \ 5256e6ceaedSSebastian Siewior struct cpsw_slave *slave; \ 526606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = (priv)->cpsw; \ 5276e6ceaedSSebastian Siewior int n; \ 528606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) \ 529606f3993SIvan Khoronzhuk (func)((cpsw)->slaves + priv->emac_port, ##arg);\ 530d9ba8f9eSMugunthan V N else \ 531606f3993SIvan Khoronzhuk for (n = cpsw->data.slaves, \ 532606f3993SIvan Khoronzhuk slave = cpsw->slaves; \ 5336e6ceaedSSebastian Siewior n; n--) \ 5346e6ceaedSSebastian Siewior (func)(slave++, ##arg); \ 535df828598SMugunthan V N } while (0) 536d9ba8f9eSMugunthan V N 5372a05a622SIvan Khoronzhuk #define cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb) \ 538d9ba8f9eSMugunthan V N do { \ 539606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) \ 540d9ba8f9eSMugunthan V N break; \ 541d9ba8f9eSMugunthan V N if (CPDMA_RX_SOURCE_PORT(status) == 1) { \ 542606f3993SIvan Khoronzhuk ndev = cpsw->slaves[0].ndev; \ 543d9ba8f9eSMugunthan V N skb->dev = ndev; \ 544d9ba8f9eSMugunthan V N } else if (CPDMA_RX_SOURCE_PORT(status) == 2) { \ 545606f3993SIvan Khoronzhuk ndev = cpsw->slaves[1].ndev; \ 546d9ba8f9eSMugunthan V N skb->dev = ndev; \ 547d9ba8f9eSMugunthan V N } \ 548d9ba8f9eSMugunthan V N } while (0) 549606f3993SIvan Khoronzhuk #define cpsw_add_mcast(cpsw, priv, addr) \ 550d9ba8f9eSMugunthan V N do { \ 551606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { \ 552606f3993SIvan Khoronzhuk struct cpsw_slave *slave = cpsw->slaves + \ 553d9ba8f9eSMugunthan V N priv->emac_port; \ 5546f1f5836SIvan Khoronzhuk int slave_port = cpsw_get_slave_port( \ 555d9ba8f9eSMugunthan V N slave->slave_num); \ 5562a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 55771a2cbb7SGrygorii Strashko 1 << slave_port | ALE_PORT_HOST, \ 558d9ba8f9eSMugunthan V N ALE_VLAN, slave->port_vlan, 0); \ 559d9ba8f9eSMugunthan V N } else { \ 5602a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 56161f1cef9SGrygorii Strashko ALE_ALL_PORTS, \ 562d9ba8f9eSMugunthan V N 0, 0, 0); \ 563d9ba8f9eSMugunthan V N } \ 564d9ba8f9eSMugunthan V N } while (0) 565d9ba8f9eSMugunthan V N 5666f1f5836SIvan Khoronzhuk static inline int cpsw_get_slave_port(u32 slave_num) 567d9ba8f9eSMugunthan V N { 568d9ba8f9eSMugunthan V N return slave_num + 1; 569d9ba8f9eSMugunthan V N } 570df828598SMugunthan V N 5710cd8f9ccSMugunthan V N static void cpsw_set_promiscious(struct net_device *ndev, bool enable) 5720cd8f9ccSMugunthan V N { 5732a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 5742a05a622SIvan Khoronzhuk struct cpsw_ale *ale = cpsw->ale; 5750cd8f9ccSMugunthan V N int i; 5760cd8f9ccSMugunthan V N 577606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 5780cd8f9ccSMugunthan V N bool flag = false; 5790cd8f9ccSMugunthan V N 5800cd8f9ccSMugunthan V N /* Enabling promiscuous mode for one interface will be 5810cd8f9ccSMugunthan V N * common for both the interface as the interface shares 5820cd8f9ccSMugunthan V N * the same hardware resource. 5830cd8f9ccSMugunthan V N */ 584606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 585606f3993SIvan Khoronzhuk if (cpsw->slaves[i].ndev->flags & IFF_PROMISC) 5860cd8f9ccSMugunthan V N flag = true; 5870cd8f9ccSMugunthan V N 5880cd8f9ccSMugunthan V N if (!enable && flag) { 5890cd8f9ccSMugunthan V N enable = true; 5900cd8f9ccSMugunthan V N dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n"); 5910cd8f9ccSMugunthan V N } 5920cd8f9ccSMugunthan V N 5930cd8f9ccSMugunthan V N if (enable) { 5940cd8f9ccSMugunthan V N /* Enable Bypass */ 5950cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1); 5960cd8f9ccSMugunthan V N 5970cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 5980cd8f9ccSMugunthan V N } else { 5990cd8f9ccSMugunthan V N /* Disable Bypass */ 6000cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0); 6010cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6020cd8f9ccSMugunthan V N } 6030cd8f9ccSMugunthan V N } else { 6040cd8f9ccSMugunthan V N if (enable) { 6050cd8f9ccSMugunthan V N unsigned long timeout = jiffies + HZ; 6060cd8f9ccSMugunthan V N 6076f979eb3SLennart Sorensen /* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */ 608606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6090cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6100cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 1); 6110cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6120cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 1); 6130cd8f9ccSMugunthan V N } 6140cd8f9ccSMugunthan V N 6150cd8f9ccSMugunthan V N /* Clear All Untouched entries */ 6160cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 6170cd8f9ccSMugunthan V N do { 6180cd8f9ccSMugunthan V N cpu_relax(); 6190cd8f9ccSMugunthan V N if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT)) 6200cd8f9ccSMugunthan V N break; 6210cd8f9ccSMugunthan V N } while (time_after(timeout, jiffies)); 6220cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 6230cd8f9ccSMugunthan V N 6240cd8f9ccSMugunthan V N /* Clear all mcast from ALE */ 62561f1cef9SGrygorii Strashko cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1); 6260cd8f9ccSMugunthan V N 6270cd8f9ccSMugunthan V N /* Flood All Unicast Packets to Host port */ 6280cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1); 6290cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 6300cd8f9ccSMugunthan V N } else { 6316f979eb3SLennart Sorensen /* Don't Flood All Unicast Packets to Host port */ 6320cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0); 6330cd8f9ccSMugunthan V N 6346f979eb3SLennart Sorensen /* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */ 635606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6360cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6370cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 0); 6380cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6390cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 0); 6400cd8f9ccSMugunthan V N } 6410cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6420cd8f9ccSMugunthan V N } 6430cd8f9ccSMugunthan V N } 6440cd8f9ccSMugunthan V N } 6450cd8f9ccSMugunthan V N 6465c50a856SMugunthan V N static void cpsw_ndo_set_rx_mode(struct net_device *ndev) 6475c50a856SMugunthan V N { 6485c50a856SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 649606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 65025906052SMugunthan V N int vid; 65125906052SMugunthan V N 652606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 653606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 65425906052SMugunthan V N else 655606f3993SIvan Khoronzhuk vid = cpsw->data.default_vlan; 6565c50a856SMugunthan V N 6575c50a856SMugunthan V N if (ndev->flags & IFF_PROMISC) { 6585c50a856SMugunthan V N /* Enable promiscuous mode */ 6590cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, true); 6602a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI); 6615c50a856SMugunthan V N return; 6620cd8f9ccSMugunthan V N } else { 6630cd8f9ccSMugunthan V N /* Disable promiscuous mode */ 6640cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, false); 6655c50a856SMugunthan V N } 6665c50a856SMugunthan V N 6671e5c4bc4SLennart Sorensen /* Restore allmulti on vlans if necessary */ 6682a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, priv->ndev->flags & IFF_ALLMULTI); 6691e5c4bc4SLennart Sorensen 6705c50a856SMugunthan V N /* Clear all mcast from ALE */ 6712a05a622SIvan Khoronzhuk cpsw_ale_flush_multicast(cpsw->ale, ALE_ALL_PORTS, vid); 6725c50a856SMugunthan V N 6735c50a856SMugunthan V N if (!netdev_mc_empty(ndev)) { 6745c50a856SMugunthan V N struct netdev_hw_addr *ha; 6755c50a856SMugunthan V N 6765c50a856SMugunthan V N /* program multicast address list into ALE register */ 6775c50a856SMugunthan V N netdev_for_each_mc_addr(ha, ndev) { 678606f3993SIvan Khoronzhuk cpsw_add_mcast(cpsw, priv, (u8 *)ha->addr); 6795c50a856SMugunthan V N } 6805c50a856SMugunthan V N } 6815c50a856SMugunthan V N } 6825c50a856SMugunthan V N 6832c836bd9SIvan Khoronzhuk static void cpsw_intr_enable(struct cpsw_common *cpsw) 684df828598SMugunthan V N { 685dda5f5feSGrygorii Strashko writel_relaxed(0xFF, &cpsw->wr_regs->tx_en); 686dda5f5feSGrygorii Strashko writel_relaxed(0xFF, &cpsw->wr_regs->rx_en); 687df828598SMugunthan V N 6882c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, true); 689df828598SMugunthan V N return; 690df828598SMugunthan V N } 691df828598SMugunthan V N 6922c836bd9SIvan Khoronzhuk static void cpsw_intr_disable(struct cpsw_common *cpsw) 693df828598SMugunthan V N { 694dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->wr_regs->tx_en); 695dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->wr_regs->rx_en); 696df828598SMugunthan V N 6972c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, false); 698df828598SMugunthan V N return; 699df828598SMugunthan V N } 700df828598SMugunthan V N 7011a3b5056SOlof Johansson static void cpsw_tx_handler(void *token, int len, int status) 702df828598SMugunthan V N { 703e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 704df828598SMugunthan V N struct sk_buff *skb = token; 705df828598SMugunthan V N struct net_device *ndev = skb->dev; 7062a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 707df828598SMugunthan V N 708fae50823SMugunthan V N /* Check whether the queue is stopped due to stalled tx dma, if the 709fae50823SMugunthan V N * queue is stopped then start the queue as we have free desc for tx 710fae50823SMugunthan V N */ 711e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 712e05107e6SIvan Khoronzhuk if (unlikely(netif_tx_queue_stopped(txq))) 713e05107e6SIvan Khoronzhuk netif_tx_wake_queue(txq); 714e05107e6SIvan Khoronzhuk 7152a05a622SIvan Khoronzhuk cpts_tx_timestamp(cpsw->cpts, skb); 7168dc43ddcSTobias Klauser ndev->stats.tx_packets++; 7178dc43ddcSTobias Klauser ndev->stats.tx_bytes += len; 718df828598SMugunthan V N dev_kfree_skb_any(skb); 719df828598SMugunthan V N } 720df828598SMugunthan V N 7211a3b5056SOlof Johansson static void cpsw_rx_handler(void *token, int len, int status) 722df828598SMugunthan V N { 723e05107e6SIvan Khoronzhuk struct cpdma_chan *ch; 724df828598SMugunthan V N struct sk_buff *skb = token; 725b4727e69SSebastian Siewior struct sk_buff *new_skb; 726df828598SMugunthan V N struct net_device *ndev = skb->dev; 727df828598SMugunthan V N int ret = 0; 7282a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 729df828598SMugunthan V N 7302a05a622SIvan Khoronzhuk cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb); 731d9ba8f9eSMugunthan V N 73216e5c57dSMugunthan V N if (unlikely(status < 0) || unlikely(!netif_running(ndev))) { 733a0e2c822SMugunthan V N /* In dual emac mode check for all interfaces */ 734d5bc1613SIvan Khoronzhuk if (cpsw->data.dual_emac && cpsw->usage_count && 735fe734d0aSIvan Khoronzhuk (status >= 0)) { 736a0e2c822SMugunthan V N /* The packet received is for the interface which 737a0e2c822SMugunthan V N * is already down and the other interface is up 738dbedd44eSJoe Perches * and running, instead of freeing which results 739a0e2c822SMugunthan V N * in reducing of the number of rx descriptor in 740a0e2c822SMugunthan V N * DMA engine, requeue skb back to cpdma. 741a0e2c822SMugunthan V N */ 742a0e2c822SMugunthan V N new_skb = skb; 743a0e2c822SMugunthan V N goto requeue; 744a0e2c822SMugunthan V N } 745a0e2c822SMugunthan V N 746b4727e69SSebastian Siewior /* the interface is going down, skbs are purged */ 747df828598SMugunthan V N dev_kfree_skb_any(skb); 748df828598SMugunthan V N return; 749df828598SMugunthan V N } 750b4727e69SSebastian Siewior 7512a05a622SIvan Khoronzhuk new_skb = netdev_alloc_skb_ip_align(ndev, cpsw->rx_packet_max); 752b4727e69SSebastian Siewior if (new_skb) { 753e05107e6SIvan Khoronzhuk skb_copy_queue_mapping(new_skb, skb); 754df828598SMugunthan V N skb_put(skb, len); 7552a05a622SIvan Khoronzhuk cpts_rx_timestamp(cpsw->cpts, skb); 756df828598SMugunthan V N skb->protocol = eth_type_trans(skb, ndev); 757df828598SMugunthan V N netif_receive_skb(skb); 7588dc43ddcSTobias Klauser ndev->stats.rx_bytes += len; 7598dc43ddcSTobias Klauser ndev->stats.rx_packets++; 760254a49d5SGrygorii Strashko kmemleak_not_leak(new_skb); 761b4727e69SSebastian Siewior } else { 7628dc43ddcSTobias Klauser ndev->stats.rx_dropped++; 763b4727e69SSebastian Siewior new_skb = skb; 764df828598SMugunthan V N } 765df828598SMugunthan V N 766a0e2c822SMugunthan V N requeue: 767ce52c744SIvan Khoronzhuk if (netif_dormant(ndev)) { 768ce52c744SIvan Khoronzhuk dev_kfree_skb_any(new_skb); 769ce52c744SIvan Khoronzhuk return; 770ce52c744SIvan Khoronzhuk } 771ce52c744SIvan Khoronzhuk 7728feb0a19SIvan Khoronzhuk ch = cpsw->rxv[skb_get_queue_mapping(new_skb)].ch; 773e05107e6SIvan Khoronzhuk ret = cpdma_chan_submit(ch, new_skb, new_skb->data, 774b4727e69SSebastian Siewior skb_tailroom(new_skb), 0); 775b4727e69SSebastian Siewior if (WARN_ON(ret < 0)) 776b4727e69SSebastian Siewior dev_kfree_skb_any(new_skb); 777df828598SMugunthan V N } 778df828598SMugunthan V N 77932b78d85SIvan Khoronzhuk static void cpsw_split_res(struct net_device *ndev) 78048e0a83eSIvan Khoronzhuk { 78148e0a83eSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 78232b78d85SIvan Khoronzhuk u32 consumed_rate = 0, bigest_rate = 0; 78348e0a83eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 78448e0a83eSIvan Khoronzhuk struct cpsw_vector *txv = cpsw->txv; 78532b78d85SIvan Khoronzhuk int i, ch_weight, rlim_ch_num = 0; 78648e0a83eSIvan Khoronzhuk int budget, bigest_rate_ch = 0; 78748e0a83eSIvan Khoronzhuk u32 ch_rate, max_rate; 78848e0a83eSIvan Khoronzhuk int ch_budget = 0; 78948e0a83eSIvan Khoronzhuk 79048e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 79148e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 79248e0a83eSIvan Khoronzhuk if (!ch_rate) 79348e0a83eSIvan Khoronzhuk continue; 79448e0a83eSIvan Khoronzhuk 79548e0a83eSIvan Khoronzhuk rlim_ch_num++; 79648e0a83eSIvan Khoronzhuk consumed_rate += ch_rate; 79748e0a83eSIvan Khoronzhuk } 79848e0a83eSIvan Khoronzhuk 79948e0a83eSIvan Khoronzhuk if (cpsw->tx_ch_num == rlim_ch_num) { 80048e0a83eSIvan Khoronzhuk max_rate = consumed_rate; 80132b78d85SIvan Khoronzhuk } else if (!rlim_ch_num) { 80232b78d85SIvan Khoronzhuk ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num; 80332b78d85SIvan Khoronzhuk bigest_rate = 0; 80432b78d85SIvan Khoronzhuk max_rate = consumed_rate; 80548e0a83eSIvan Khoronzhuk } else { 8060be01b8eSIvan Khoronzhuk max_rate = cpsw->speed * 1000; 8070be01b8eSIvan Khoronzhuk 8080be01b8eSIvan Khoronzhuk /* if max_rate is less then expected due to reduced link speed, 8090be01b8eSIvan Khoronzhuk * split proportionally according next potential max speed 8100be01b8eSIvan Khoronzhuk */ 8110be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 8120be01b8eSIvan Khoronzhuk max_rate *= 10; 8130be01b8eSIvan Khoronzhuk 8140be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 8150be01b8eSIvan Khoronzhuk max_rate *= 10; 81632b78d85SIvan Khoronzhuk 81748e0a83eSIvan Khoronzhuk ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate; 81848e0a83eSIvan Khoronzhuk ch_budget = (CPSW_POLL_WEIGHT - ch_budget) / 81948e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 82048e0a83eSIvan Khoronzhuk bigest_rate = (max_rate - consumed_rate) / 82148e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 82248e0a83eSIvan Khoronzhuk } 82348e0a83eSIvan Khoronzhuk 82432b78d85SIvan Khoronzhuk /* split tx weight/budget */ 82548e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 82648e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 82748e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 82848e0a83eSIvan Khoronzhuk if (ch_rate) { 82948e0a83eSIvan Khoronzhuk txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate; 83048e0a83eSIvan Khoronzhuk if (!txv[i].budget) 83132b78d85SIvan Khoronzhuk txv[i].budget++; 83248e0a83eSIvan Khoronzhuk if (ch_rate > bigest_rate) { 83348e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 83448e0a83eSIvan Khoronzhuk bigest_rate = ch_rate; 83548e0a83eSIvan Khoronzhuk } 83632b78d85SIvan Khoronzhuk 83732b78d85SIvan Khoronzhuk ch_weight = (ch_rate * 100) / max_rate; 83832b78d85SIvan Khoronzhuk if (!ch_weight) 83932b78d85SIvan Khoronzhuk ch_weight++; 84032b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight); 84148e0a83eSIvan Khoronzhuk } else { 84248e0a83eSIvan Khoronzhuk txv[i].budget = ch_budget; 84348e0a83eSIvan Khoronzhuk if (!bigest_rate_ch) 84448e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 84532b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, 0); 84648e0a83eSIvan Khoronzhuk } 84748e0a83eSIvan Khoronzhuk 84848e0a83eSIvan Khoronzhuk budget -= txv[i].budget; 84948e0a83eSIvan Khoronzhuk } 85048e0a83eSIvan Khoronzhuk 85148e0a83eSIvan Khoronzhuk if (budget) 85248e0a83eSIvan Khoronzhuk txv[bigest_rate_ch].budget += budget; 85348e0a83eSIvan Khoronzhuk 85448e0a83eSIvan Khoronzhuk /* split rx budget */ 85548e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 85648e0a83eSIvan Khoronzhuk ch_budget = budget / cpsw->rx_ch_num; 85748e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->rx_ch_num; i++) { 85848e0a83eSIvan Khoronzhuk cpsw->rxv[i].budget = ch_budget; 85948e0a83eSIvan Khoronzhuk budget -= ch_budget; 86048e0a83eSIvan Khoronzhuk } 86148e0a83eSIvan Khoronzhuk 86248e0a83eSIvan Khoronzhuk if (budget) 86348e0a83eSIvan Khoronzhuk cpsw->rxv[0].budget += budget; 86448e0a83eSIvan Khoronzhuk } 86548e0a83eSIvan Khoronzhuk 866c03abd84SFelipe Balbi static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id) 867df828598SMugunthan V N { 868dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 8697ce67a38SFelipe Balbi 8705d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->tx_en); 8712c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX); 872c03abd84SFelipe Balbi 873e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 874e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[1]); 875e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = true; 8767da11600SMugunthan V N } 8777da11600SMugunthan V N 878dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_tx); 879c03abd84SFelipe Balbi return IRQ_HANDLED; 880c03abd84SFelipe Balbi } 881c03abd84SFelipe Balbi 882c03abd84SFelipe Balbi static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id) 883c03abd84SFelipe Balbi { 884dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 885c03abd84SFelipe Balbi 8862c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX); 8875d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->rx_en); 888fd51cf19SSebastian Siewior 889e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 890e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[0]); 891e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = true; 8927da11600SMugunthan V N } 8937da11600SMugunthan V N 894dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_rx); 895df828598SMugunthan V N return IRQ_HANDLED; 896df828598SMugunthan V N } 897df828598SMugunthan V N 89832a7432cSMugunthan V N static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget) 899df828598SMugunthan V N { 900e05107e6SIvan Khoronzhuk u32 ch_map; 9018feb0a19SIvan Khoronzhuk int num_tx, cur_budget, ch; 902dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_tx); 9038feb0a19SIvan Khoronzhuk struct cpsw_vector *txv; 90432a7432cSMugunthan V N 905e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 906e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_txchs_state(cpsw->dma); 907342934a5SIvan Khoronzhuk for (ch = 0, num_tx = 0; ch_map; ch_map >>= 1, ch++) { 908e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 909e05107e6SIvan Khoronzhuk continue; 910e05107e6SIvan Khoronzhuk 9118feb0a19SIvan Khoronzhuk txv = &cpsw->txv[ch]; 9128feb0a19SIvan Khoronzhuk if (unlikely(txv->budget > budget - num_tx)) 9138feb0a19SIvan Khoronzhuk cur_budget = budget - num_tx; 9148feb0a19SIvan Khoronzhuk else 9158feb0a19SIvan Khoronzhuk cur_budget = txv->budget; 9168feb0a19SIvan Khoronzhuk 9178feb0a19SIvan Khoronzhuk num_tx += cpdma_chan_process(txv->ch, cur_budget); 918342934a5SIvan Khoronzhuk if (num_tx >= budget) 919342934a5SIvan Khoronzhuk break; 920e05107e6SIvan Khoronzhuk } 921e05107e6SIvan Khoronzhuk 92232a7432cSMugunthan V N if (num_tx < budget) { 92332a7432cSMugunthan V N napi_complete(napi_tx); 9245d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->tx_en); 925e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->tx_irq_disabled) { 926e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 927e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 9287da11600SMugunthan V N } 92932a7432cSMugunthan V N } 93032a7432cSMugunthan V N 93132a7432cSMugunthan V N return num_tx; 93232a7432cSMugunthan V N } 93332a7432cSMugunthan V N 93432a7432cSMugunthan V N static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget) 93532a7432cSMugunthan V N { 936e05107e6SIvan Khoronzhuk u32 ch_map; 9378feb0a19SIvan Khoronzhuk int num_rx, cur_budget, ch; 938dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_rx); 9398feb0a19SIvan Khoronzhuk struct cpsw_vector *rxv; 940510a1e72SMugunthan V N 941e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 942e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_rxchs_state(cpsw->dma); 943342934a5SIvan Khoronzhuk for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) { 944e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 945e05107e6SIvan Khoronzhuk continue; 946e05107e6SIvan Khoronzhuk 9478feb0a19SIvan Khoronzhuk rxv = &cpsw->rxv[ch]; 9488feb0a19SIvan Khoronzhuk if (unlikely(rxv->budget > budget - num_rx)) 9498feb0a19SIvan Khoronzhuk cur_budget = budget - num_rx; 9508feb0a19SIvan Khoronzhuk else 9518feb0a19SIvan Khoronzhuk cur_budget = rxv->budget; 9528feb0a19SIvan Khoronzhuk 9538feb0a19SIvan Khoronzhuk num_rx += cpdma_chan_process(rxv->ch, cur_budget); 954342934a5SIvan Khoronzhuk if (num_rx >= budget) 955342934a5SIvan Khoronzhuk break; 956e05107e6SIvan Khoronzhuk } 957e05107e6SIvan Khoronzhuk 958510a1e72SMugunthan V N if (num_rx < budget) { 9596ad20165SEric Dumazet napi_complete_done(napi_rx, num_rx); 9605d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->rx_en); 961e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->rx_irq_disabled) { 962e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 963e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 9647da11600SMugunthan V N } 965510a1e72SMugunthan V N } 966df828598SMugunthan V N 967df828598SMugunthan V N return num_rx; 968df828598SMugunthan V N } 969df828598SMugunthan V N 970df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg) 971df828598SMugunthan V N { 972df828598SMugunthan V N unsigned long timeout = jiffies + HZ; 973df828598SMugunthan V N 974dda5f5feSGrygorii Strashko writel_relaxed(1, reg); 975df828598SMugunthan V N do { 976df828598SMugunthan V N cpu_relax(); 977dda5f5feSGrygorii Strashko } while ((readl_relaxed(reg) & 1) && time_after(timeout, jiffies)); 978df828598SMugunthan V N 979dda5f5feSGrygorii Strashko WARN(readl_relaxed(reg) & 1, "failed to soft-reset %s\n", module); 980df828598SMugunthan V N } 981df828598SMugunthan V N 982df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave, 983df828598SMugunthan V N struct cpsw_priv *priv) 984df828598SMugunthan V N { 9859750a3adSRichard Cochran slave_write(slave, mac_hi(priv->mac_addr), SA_HI); 9869750a3adSRichard Cochran slave_write(slave, mac_lo(priv->mac_addr), SA_LO); 987df828598SMugunthan V N } 988df828598SMugunthan V N 989df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave, 990df828598SMugunthan V N struct cpsw_priv *priv, bool *link) 991df828598SMugunthan V N { 992df828598SMugunthan V N struct phy_device *phy = slave->phy; 993df828598SMugunthan V N u32 mac_control = 0; 994df828598SMugunthan V N u32 slave_port; 995606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 996df828598SMugunthan V N 997df828598SMugunthan V N if (!phy) 998df828598SMugunthan V N return; 999df828598SMugunthan V N 10006f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1001df828598SMugunthan V N 1002df828598SMugunthan V N if (phy->link) { 1003606f3993SIvan Khoronzhuk mac_control = cpsw->data.mac_control; 1004df828598SMugunthan V N 1005df828598SMugunthan V N /* enable forwarding */ 10062a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1007df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1008df828598SMugunthan V N 1009df828598SMugunthan V N if (phy->speed == 1000) 1010df828598SMugunthan V N mac_control |= BIT(7); /* GIGABITEN */ 1011df828598SMugunthan V N if (phy->duplex) 1012df828598SMugunthan V N mac_control |= BIT(0); /* FULLDUPLEXEN */ 1013342b7b74SDaniel Mack 1014342b7b74SDaniel Mack /* set speed_in input in case RMII mode is used in 100Mbps */ 1015342b7b74SDaniel Mack if (phy->speed == 100) 1016342b7b74SDaniel Mack mac_control |= BIT(15); 1017a81d8762SMugunthan V N else if (phy->speed == 10) 1018a81d8762SMugunthan V N mac_control |= BIT(18); /* In Band mode */ 1019342b7b74SDaniel Mack 10201923d6e4SMugunthan V N if (priv->rx_pause) 10211923d6e4SMugunthan V N mac_control |= BIT(3); 10221923d6e4SMugunthan V N 10231923d6e4SMugunthan V N if (priv->tx_pause) 10241923d6e4SMugunthan V N mac_control |= BIT(4); 10251923d6e4SMugunthan V N 1026df828598SMugunthan V N *link = true; 1027df828598SMugunthan V N } else { 1028df828598SMugunthan V N mac_control = 0; 1029df828598SMugunthan V N /* disable forwarding */ 10302a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1031df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 1032df828598SMugunthan V N } 1033df828598SMugunthan V N 1034df828598SMugunthan V N if (mac_control != slave->mac_control) { 1035df828598SMugunthan V N phy_print_status(phy); 1036dda5f5feSGrygorii Strashko writel_relaxed(mac_control, &slave->sliver->mac_control); 1037df828598SMugunthan V N } 1038df828598SMugunthan V N 1039df828598SMugunthan V N slave->mac_control = mac_control; 1040df828598SMugunthan V N } 1041df828598SMugunthan V N 10420be01b8eSIvan Khoronzhuk static int cpsw_get_common_speed(struct cpsw_common *cpsw) 10430be01b8eSIvan Khoronzhuk { 10440be01b8eSIvan Khoronzhuk int i, speed; 10450be01b8eSIvan Khoronzhuk 10460be01b8eSIvan Khoronzhuk for (i = 0, speed = 0; i < cpsw->data.slaves; i++) 10470be01b8eSIvan Khoronzhuk if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link) 10480be01b8eSIvan Khoronzhuk speed += cpsw->slaves[i].phy->speed; 10490be01b8eSIvan Khoronzhuk 10500be01b8eSIvan Khoronzhuk return speed; 10510be01b8eSIvan Khoronzhuk } 10520be01b8eSIvan Khoronzhuk 10530be01b8eSIvan Khoronzhuk static int cpsw_need_resplit(struct cpsw_common *cpsw) 10540be01b8eSIvan Khoronzhuk { 10550be01b8eSIvan Khoronzhuk int i, rlim_ch_num; 10560be01b8eSIvan Khoronzhuk int speed, ch_rate; 10570be01b8eSIvan Khoronzhuk 10580be01b8eSIvan Khoronzhuk /* re-split resources only in case speed was changed */ 10590be01b8eSIvan Khoronzhuk speed = cpsw_get_common_speed(cpsw); 10600be01b8eSIvan Khoronzhuk if (speed == cpsw->speed || !speed) 10610be01b8eSIvan Khoronzhuk return 0; 10620be01b8eSIvan Khoronzhuk 10630be01b8eSIvan Khoronzhuk cpsw->speed = speed; 10640be01b8eSIvan Khoronzhuk 10650be01b8eSIvan Khoronzhuk for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) { 10660be01b8eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch); 10670be01b8eSIvan Khoronzhuk if (!ch_rate) 10680be01b8eSIvan Khoronzhuk break; 10690be01b8eSIvan Khoronzhuk 10700be01b8eSIvan Khoronzhuk rlim_ch_num++; 10710be01b8eSIvan Khoronzhuk } 10720be01b8eSIvan Khoronzhuk 10730be01b8eSIvan Khoronzhuk /* cases not dependent on speed */ 10740be01b8eSIvan Khoronzhuk if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num) 10750be01b8eSIvan Khoronzhuk return 0; 10760be01b8eSIvan Khoronzhuk 10770be01b8eSIvan Khoronzhuk return 1; 10780be01b8eSIvan Khoronzhuk } 10790be01b8eSIvan Khoronzhuk 1080df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev) 1081df828598SMugunthan V N { 1082df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 10830be01b8eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1084df828598SMugunthan V N bool link = false; 1085df828598SMugunthan V N 1086df828598SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 1087df828598SMugunthan V N 1088df828598SMugunthan V N if (link) { 10890be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 10900be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 10910be01b8eSIvan Khoronzhuk 1092df828598SMugunthan V N netif_carrier_on(ndev); 1093df828598SMugunthan V N if (netif_running(ndev)) 1094e05107e6SIvan Khoronzhuk netif_tx_wake_all_queues(ndev); 1095df828598SMugunthan V N } else { 1096df828598SMugunthan V N netif_carrier_off(ndev); 1097e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(ndev); 1098df828598SMugunthan V N } 1099df828598SMugunthan V N } 1100df828598SMugunthan V N 1101ff5b8ef2SMugunthan V N static int cpsw_get_coalesce(struct net_device *ndev, 1102ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1103ff5b8ef2SMugunthan V N { 11042a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1105ff5b8ef2SMugunthan V N 11062a05a622SIvan Khoronzhuk coal->rx_coalesce_usecs = cpsw->coal_intvl; 1107ff5b8ef2SMugunthan V N return 0; 1108ff5b8ef2SMugunthan V N } 1109ff5b8ef2SMugunthan V N 1110ff5b8ef2SMugunthan V N static int cpsw_set_coalesce(struct net_device *ndev, 1111ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1112ff5b8ef2SMugunthan V N { 1113ff5b8ef2SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1114ff5b8ef2SMugunthan V N u32 int_ctrl; 1115ff5b8ef2SMugunthan V N u32 num_interrupts = 0; 1116ff5b8ef2SMugunthan V N u32 prescale = 0; 1117ff5b8ef2SMugunthan V N u32 addnl_dvdr = 1; 1118ff5b8ef2SMugunthan V N u32 coal_intvl = 0; 11195d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1120ff5b8ef2SMugunthan V N 1121ff5b8ef2SMugunthan V N coal_intvl = coal->rx_coalesce_usecs; 1122ff5b8ef2SMugunthan V N 11235d8d0d4dSIvan Khoronzhuk int_ctrl = readl(&cpsw->wr_regs->int_control); 11242a05a622SIvan Khoronzhuk prescale = cpsw->bus_freq_mhz * 4; 1125ff5b8ef2SMugunthan V N 1126a84bc2a9SMugunthan V N if (!coal->rx_coalesce_usecs) { 1127a84bc2a9SMugunthan V N int_ctrl &= ~(CPSW_INTPRESCALE_MASK | CPSW_INTPACEEN); 1128a84bc2a9SMugunthan V N goto update_return; 1129a84bc2a9SMugunthan V N } 1130a84bc2a9SMugunthan V N 1131ff5b8ef2SMugunthan V N if (coal_intvl < CPSW_CMINTMIN_INTVL) 1132ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMIN_INTVL; 1133ff5b8ef2SMugunthan V N 1134ff5b8ef2SMugunthan V N if (coal_intvl > CPSW_CMINTMAX_INTVL) { 1135ff5b8ef2SMugunthan V N /* Interrupt pacer works with 4us Pulse, we can 1136ff5b8ef2SMugunthan V N * throttle further by dilating the 4us pulse. 1137ff5b8ef2SMugunthan V N */ 1138ff5b8ef2SMugunthan V N addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale; 1139ff5b8ef2SMugunthan V N 1140ff5b8ef2SMugunthan V N if (addnl_dvdr > 1) { 1141ff5b8ef2SMugunthan V N prescale *= addnl_dvdr; 1142ff5b8ef2SMugunthan V N if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr)) 1143ff5b8ef2SMugunthan V N coal_intvl = (CPSW_CMINTMAX_INTVL 1144ff5b8ef2SMugunthan V N * addnl_dvdr); 1145ff5b8ef2SMugunthan V N } else { 1146ff5b8ef2SMugunthan V N addnl_dvdr = 1; 1147ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMAX_INTVL; 1148ff5b8ef2SMugunthan V N } 1149ff5b8ef2SMugunthan V N } 1150ff5b8ef2SMugunthan V N 1151ff5b8ef2SMugunthan V N num_interrupts = (1000 * addnl_dvdr) / coal_intvl; 11525d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->rx_imax); 11535d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->tx_imax); 1154ff5b8ef2SMugunthan V N 1155ff5b8ef2SMugunthan V N int_ctrl |= CPSW_INTPACEEN; 1156ff5b8ef2SMugunthan V N int_ctrl &= (~CPSW_INTPRESCALE_MASK); 1157ff5b8ef2SMugunthan V N int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK); 1158a84bc2a9SMugunthan V N 1159a84bc2a9SMugunthan V N update_return: 11605d8d0d4dSIvan Khoronzhuk writel(int_ctrl, &cpsw->wr_regs->int_control); 1161ff5b8ef2SMugunthan V N 1162ff5b8ef2SMugunthan V N cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl); 11632a05a622SIvan Khoronzhuk cpsw->coal_intvl = coal_intvl; 1164ff5b8ef2SMugunthan V N 1165ff5b8ef2SMugunthan V N return 0; 1166ff5b8ef2SMugunthan V N } 1167ff5b8ef2SMugunthan V N 1168d9718546SMugunthan V N static int cpsw_get_sset_count(struct net_device *ndev, int sset) 1169d9718546SMugunthan V N { 1170e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1171e05107e6SIvan Khoronzhuk 1172d9718546SMugunthan V N switch (sset) { 1173d9718546SMugunthan V N case ETH_SS_STATS: 1174e05107e6SIvan Khoronzhuk return (CPSW_STATS_COMMON_LEN + 1175e05107e6SIvan Khoronzhuk (cpsw->rx_ch_num + cpsw->tx_ch_num) * 1176e05107e6SIvan Khoronzhuk CPSW_STATS_CH_LEN); 1177d9718546SMugunthan V N default: 1178d9718546SMugunthan V N return -EOPNOTSUPP; 1179d9718546SMugunthan V N } 1180d9718546SMugunthan V N } 1181d9718546SMugunthan V N 1182e05107e6SIvan Khoronzhuk static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) 1183e05107e6SIvan Khoronzhuk { 1184e05107e6SIvan Khoronzhuk int ch_stats_len; 1185e05107e6SIvan Khoronzhuk int line; 1186e05107e6SIvan Khoronzhuk int i; 1187e05107e6SIvan Khoronzhuk 1188e05107e6SIvan Khoronzhuk ch_stats_len = CPSW_STATS_CH_LEN * ch_num; 1189e05107e6SIvan Khoronzhuk for (i = 0; i < ch_stats_len; i++) { 1190e05107e6SIvan Khoronzhuk line = i % CPSW_STATS_CH_LEN; 1191e05107e6SIvan Khoronzhuk snprintf(*p, ETH_GSTRING_LEN, 1192e05107e6SIvan Khoronzhuk "%s DMA chan %d: %s", rx_dir ? "Rx" : "Tx", 1193e05107e6SIvan Khoronzhuk i / CPSW_STATS_CH_LEN, 1194e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[line].stat_string); 1195e05107e6SIvan Khoronzhuk *p += ETH_GSTRING_LEN; 1196e05107e6SIvan Khoronzhuk } 1197e05107e6SIvan Khoronzhuk } 1198e05107e6SIvan Khoronzhuk 1199d9718546SMugunthan V N static void cpsw_get_strings(struct net_device *ndev, u32 stringset, u8 *data) 1200d9718546SMugunthan V N { 1201e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1202d9718546SMugunthan V N u8 *p = data; 1203d9718546SMugunthan V N int i; 1204d9718546SMugunthan V N 1205d9718546SMugunthan V N switch (stringset) { 1206d9718546SMugunthan V N case ETH_SS_STATS: 1207e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_COMMON_LEN; i++) { 1208d9718546SMugunthan V N memcpy(p, cpsw_gstrings_stats[i].stat_string, 1209d9718546SMugunthan V N ETH_GSTRING_LEN); 1210d9718546SMugunthan V N p += ETH_GSTRING_LEN; 1211d9718546SMugunthan V N } 1212e05107e6SIvan Khoronzhuk 1213e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->rx_ch_num, 1); 1214e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->tx_ch_num, 0); 1215d9718546SMugunthan V N break; 1216d9718546SMugunthan V N } 1217d9718546SMugunthan V N } 1218d9718546SMugunthan V N 1219d9718546SMugunthan V N static void cpsw_get_ethtool_stats(struct net_device *ndev, 1220d9718546SMugunthan V N struct ethtool_stats *stats, u64 *data) 1221d9718546SMugunthan V N { 1222d9718546SMugunthan V N u8 *p; 12232c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1224e05107e6SIvan Khoronzhuk struct cpdma_chan_stats ch_stats; 1225e05107e6SIvan Khoronzhuk int i, l, ch; 1226d9718546SMugunthan V N 1227d9718546SMugunthan V N /* Collect Davinci CPDMA stats for Rx and Tx Channel */ 1228e05107e6SIvan Khoronzhuk for (l = 0; l < CPSW_STATS_COMMON_LEN; l++) 1229e05107e6SIvan Khoronzhuk data[l] = readl(cpsw->hw_stats + 1230e05107e6SIvan Khoronzhuk cpsw_gstrings_stats[l].stat_offset); 1231d9718546SMugunthan V N 1232e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 12338feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->rxv[ch].ch, &ch_stats); 1234e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1235e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1236e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1237e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1238e05107e6SIvan Khoronzhuk } 1239e05107e6SIvan Khoronzhuk } 1240d9718546SMugunthan V N 1241e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 12428feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->txv[ch].ch, &ch_stats); 1243e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1244e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1245e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1246e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1247d9718546SMugunthan V N } 1248d9718546SMugunthan V N } 1249d9718546SMugunthan V N } 1250d9718546SMugunthan V N 125127e9e103SIvan Khoronzhuk static inline int cpsw_tx_packet_submit(struct cpsw_priv *priv, 1252e05107e6SIvan Khoronzhuk struct sk_buff *skb, 1253e05107e6SIvan Khoronzhuk struct cpdma_chan *txch) 1254d9ba8f9eSMugunthan V N { 12552c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 12562c836bd9SIvan Khoronzhuk 125798fdd857SIvan Khoronzhuk skb_tx_timestamp(skb); 1258e05107e6SIvan Khoronzhuk return cpdma_chan_submit(txch, skb, skb->data, skb->len, 1259606f3993SIvan Khoronzhuk priv->emac_port + cpsw->data.dual_emac); 1260d9ba8f9eSMugunthan V N } 1261d9ba8f9eSMugunthan V N 1262d9ba8f9eSMugunthan V N static inline void cpsw_add_dual_emac_def_ale_entries( 1263d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct cpsw_slave *slave, 1264d9ba8f9eSMugunthan V N u32 slave_port) 1265d9ba8f9eSMugunthan V N { 12662a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 126771a2cbb7SGrygorii Strashko u32 port_mask = 1 << slave_port | ALE_PORT_HOST; 1268d9ba8f9eSMugunthan V N 12692a05a622SIvan Khoronzhuk if (cpsw->version == CPSW_VERSION_1) 1270d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN); 1271d9ba8f9eSMugunthan V N else 1272d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN); 12732a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask, 1274d9ba8f9eSMugunthan V N port_mask, port_mask, 0); 12752a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1276d9ba8f9eSMugunthan V N port_mask, ALE_VLAN, slave->port_vlan, 0); 12772a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 12782a05a622SIvan Khoronzhuk HOST_PORT_NUM, ALE_VLAN | 12792a05a622SIvan Khoronzhuk ALE_SECURE, slave->port_vlan); 1280d9ba8f9eSMugunthan V N } 1281d9ba8f9eSMugunthan V N 12821e7a2e21SDaniel Mack static void soft_reset_slave(struct cpsw_slave *slave) 1283df828598SMugunthan V N { 1284df828598SMugunthan V N char name[32]; 12851e7a2e21SDaniel Mack 12861e7a2e21SDaniel Mack snprintf(name, sizeof(name), "slave-%d", slave->slave_num); 12871e7a2e21SDaniel Mack soft_reset(name, &slave->sliver->soft_reset); 12881e7a2e21SDaniel Mack } 12891e7a2e21SDaniel Mack 12901e7a2e21SDaniel Mack static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 12911e7a2e21SDaniel Mack { 1292df828598SMugunthan V N u32 slave_port; 129330c57f07SSekhar Nori struct phy_device *phy; 1294649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1295df828598SMugunthan V N 12961e7a2e21SDaniel Mack soft_reset_slave(slave); 1297df828598SMugunthan V N 1298df828598SMugunthan V N /* setup priority mapping */ 1299dda5f5feSGrygorii Strashko writel_relaxed(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 13009750a3adSRichard Cochran 13012a05a622SIvan Khoronzhuk switch (cpsw->version) { 13029750a3adSRichard Cochran case CPSW_VERSION_1: 13039750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP); 130448f5bcccSGrygorii Strashko /* Increase RX FIFO size to 5 for supporting fullduplex 130548f5bcccSGrygorii Strashko * flow control mode 130648f5bcccSGrygorii Strashko */ 130748f5bcccSGrygorii Strashko slave_write(slave, 130848f5bcccSGrygorii Strashko (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) | 130948f5bcccSGrygorii Strashko CPSW_MAX_BLKS_RX, CPSW1_MAX_BLKS); 13109750a3adSRichard Cochran break; 13119750a3adSRichard Cochran case CPSW_VERSION_2: 1312c193f365SMugunthan V N case CPSW_VERSION_3: 1313926489beSMugunthan V N case CPSW_VERSION_4: 13149750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP); 131548f5bcccSGrygorii Strashko /* Increase RX FIFO size to 5 for supporting fullduplex 131648f5bcccSGrygorii Strashko * flow control mode 131748f5bcccSGrygorii Strashko */ 131848f5bcccSGrygorii Strashko slave_write(slave, 131948f5bcccSGrygorii Strashko (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) | 132048f5bcccSGrygorii Strashko CPSW_MAX_BLKS_RX, CPSW2_MAX_BLKS); 13219750a3adSRichard Cochran break; 13229750a3adSRichard Cochran } 1323df828598SMugunthan V N 1324df828598SMugunthan V N /* setup max packet size, and mac address */ 1325dda5f5feSGrygorii Strashko writel_relaxed(cpsw->rx_packet_max, &slave->sliver->rx_maxlen); 1326df828598SMugunthan V N cpsw_set_slave_mac(slave, priv); 1327df828598SMugunthan V N 1328df828598SMugunthan V N slave->mac_control = 0; /* no link yet */ 1329df828598SMugunthan V N 13306f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1331df828598SMugunthan V N 1332606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1333d9ba8f9eSMugunthan V N cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port); 1334d9ba8f9eSMugunthan V N else 13352a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1336e11b220fSMugunthan V N 1 << slave_port, 0, 0, ALE_MCAST_FWD_2); 1337df828598SMugunthan V N 1338d733f754SDavid Rivshin if (slave->data->phy_node) { 133930c57f07SSekhar Nori phy = of_phy_connect(priv->ndev, slave->data->phy_node, 13409e42f715SHeiko Schocher &cpsw_adjust_link, 0, slave->data->phy_if); 134130c57f07SSekhar Nori if (!phy) { 1342f7ce9103SRob Herring dev_err(priv->dev, "phy \"%pOF\" not found on slave %d\n", 1343f7ce9103SRob Herring slave->data->phy_node, 1344d733f754SDavid Rivshin slave->slave_num); 1345d733f754SDavid Rivshin return; 1346d733f754SDavid Rivshin } 1347d733f754SDavid Rivshin } else { 134830c57f07SSekhar Nori phy = phy_connect(priv->ndev, slave->data->phy_id, 1349f9a8f83bSFlorian Fainelli &cpsw_adjust_link, slave->data->phy_if); 135030c57f07SSekhar Nori if (IS_ERR(phy)) { 1351d733f754SDavid Rivshin dev_err(priv->dev, 1352d733f754SDavid Rivshin "phy \"%s\" not found on slave %d, err %ld\n", 1353d733f754SDavid Rivshin slave->data->phy_id, slave->slave_num, 135430c57f07SSekhar Nori PTR_ERR(phy)); 1355d733f754SDavid Rivshin return; 1356d733f754SDavid Rivshin } 1357d733f754SDavid Rivshin } 1358d733f754SDavid Rivshin 135930c57f07SSekhar Nori slave->phy = phy; 136030c57f07SSekhar Nori 13612220943aSAndrew Lunn phy_attached_info(slave->phy); 13622220943aSAndrew Lunn 1363df828598SMugunthan V N phy_start(slave->phy); 1364388367a5SMugunthan V N 1365388367a5SMugunthan V N /* Configure GMII_SEL register */ 136656e31bd8SIvan Khoronzhuk cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num); 1367df828598SMugunthan V N } 1368df828598SMugunthan V N 13693b72c2feSMugunthan V N static inline void cpsw_add_default_vlan(struct cpsw_priv *priv) 13703b72c2feSMugunthan V N { 1371606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1372606f3993SIvan Khoronzhuk const int vlan = cpsw->data.default_vlan; 13733b72c2feSMugunthan V N u32 reg; 13743b72c2feSMugunthan V N int i; 13751e5c4bc4SLennart Sorensen int unreg_mcast_mask; 13763b72c2feSMugunthan V N 13772a05a622SIvan Khoronzhuk reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN : 13783b72c2feSMugunthan V N CPSW2_PORT_VLAN; 13793b72c2feSMugunthan V N 13805d8d0d4dSIvan Khoronzhuk writel(vlan, &cpsw->host_port_regs->port_vlan); 13813b72c2feSMugunthan V N 1382606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 1383606f3993SIvan Khoronzhuk slave_write(cpsw->slaves + i, vlan, reg); 13843b72c2feSMugunthan V N 13851e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 13861e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 13871e5c4bc4SLennart Sorensen else 13881e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 13891e5c4bc4SLennart Sorensen 13902a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS, 139161f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 139261f1cef9SGrygorii Strashko unreg_mcast_mask); 13933b72c2feSMugunthan V N } 13943b72c2feSMugunthan V N 1395df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv) 1396df828598SMugunthan V N { 1397d9ba8f9eSMugunthan V N u32 fifo_mode; 13985d8d0d4dSIvan Khoronzhuk u32 control_reg; 13995d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14003b72c2feSMugunthan V N 1401df828598SMugunthan V N /* soft reset the controller and initialize ale */ 14025d8d0d4dSIvan Khoronzhuk soft_reset("cpsw", &cpsw->regs->soft_reset); 14032a05a622SIvan Khoronzhuk cpsw_ale_start(cpsw->ale); 1404df828598SMugunthan V N 1405df828598SMugunthan V N /* switch to vlan unaware mode */ 14062a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 14073b72c2feSMugunthan V N CPSW_ALE_VLAN_AWARE); 14085d8d0d4dSIvan Khoronzhuk control_reg = readl(&cpsw->regs->control); 14093b72c2feSMugunthan V N control_reg |= CPSW_VLAN_AWARE; 14105d8d0d4dSIvan Khoronzhuk writel(control_reg, &cpsw->regs->control); 1411606f3993SIvan Khoronzhuk fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE : 1412d9ba8f9eSMugunthan V N CPSW_FIFO_NORMAL_MODE; 14135d8d0d4dSIvan Khoronzhuk writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl); 1414df828598SMugunthan V N 1415df828598SMugunthan V N /* setup host port priority mapping */ 1416dda5f5feSGrygorii Strashko writel_relaxed(CPDMA_TX_PRIORITY_MAP, 14175d8d0d4dSIvan Khoronzhuk &cpsw->host_port_regs->cpdma_tx_pri_map); 1418dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->host_port_regs->cpdma_rx_chan_map); 1419df828598SMugunthan V N 14202a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, 1421df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1422df828598SMugunthan V N 1423606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) { 14242a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1425d9ba8f9eSMugunthan V N 0, 0); 14262a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 142771a2cbb7SGrygorii Strashko ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2); 1428df828598SMugunthan V N } 1429d9ba8f9eSMugunthan V N } 1430df828598SMugunthan V N 14313802dce1SIvan Khoronzhuk static int cpsw_fill_rx_channels(struct cpsw_priv *priv) 14323802dce1SIvan Khoronzhuk { 14333802dce1SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14343802dce1SIvan Khoronzhuk struct sk_buff *skb; 14353802dce1SIvan Khoronzhuk int ch_buf_num; 1436e05107e6SIvan Khoronzhuk int ch, i, ret; 14373802dce1SIvan Khoronzhuk 1438e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 14398feb0a19SIvan Khoronzhuk ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch); 14403802dce1SIvan Khoronzhuk for (i = 0; i < ch_buf_num; i++) { 14413802dce1SIvan Khoronzhuk skb = __netdev_alloc_skb_ip_align(priv->ndev, 14423802dce1SIvan Khoronzhuk cpsw->rx_packet_max, 14433802dce1SIvan Khoronzhuk GFP_KERNEL); 14443802dce1SIvan Khoronzhuk if (!skb) { 14453802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, "cannot allocate skb\n"); 14463802dce1SIvan Khoronzhuk return -ENOMEM; 14473802dce1SIvan Khoronzhuk } 14483802dce1SIvan Khoronzhuk 1449e05107e6SIvan Khoronzhuk skb_set_queue_mapping(skb, ch); 14508feb0a19SIvan Khoronzhuk ret = cpdma_chan_submit(cpsw->rxv[ch].ch, skb, 14518feb0a19SIvan Khoronzhuk skb->data, skb_tailroom(skb), 14528feb0a19SIvan Khoronzhuk 0); 14533802dce1SIvan Khoronzhuk if (ret < 0) { 14543802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, 1455e05107e6SIvan Khoronzhuk "cannot submit skb to channel %d rx, error %d\n", 1456e05107e6SIvan Khoronzhuk ch, ret); 14573802dce1SIvan Khoronzhuk kfree_skb(skb); 14583802dce1SIvan Khoronzhuk return ret; 14593802dce1SIvan Khoronzhuk } 14603802dce1SIvan Khoronzhuk kmemleak_not_leak(skb); 14613802dce1SIvan Khoronzhuk } 14623802dce1SIvan Khoronzhuk 1463e05107e6SIvan Khoronzhuk cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n", 1464e05107e6SIvan Khoronzhuk ch, ch_buf_num); 1465e05107e6SIvan Khoronzhuk } 14663802dce1SIvan Khoronzhuk 1467e05107e6SIvan Khoronzhuk return 0; 14683802dce1SIvan Khoronzhuk } 14693802dce1SIvan Khoronzhuk 14702a05a622SIvan Khoronzhuk static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw) 1471aacebbf8SSebastian Siewior { 14723995d265SSchuyler Patton u32 slave_port; 14733995d265SSchuyler Patton 14746f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 14753995d265SSchuyler Patton 1476aacebbf8SSebastian Siewior if (!slave->phy) 1477aacebbf8SSebastian Siewior return; 1478aacebbf8SSebastian Siewior phy_stop(slave->phy); 1479aacebbf8SSebastian Siewior phy_disconnect(slave->phy); 1480aacebbf8SSebastian Siewior slave->phy = NULL; 14812a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 14823995d265SSchuyler Patton ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 14831f95ba00SGrygorii Strashko soft_reset_slave(slave); 1484aacebbf8SSebastian Siewior } 1485aacebbf8SSebastian Siewior 1486df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev) 1487df828598SMugunthan V N { 1488df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1489649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14903802dce1SIvan Khoronzhuk int ret; 1491df828598SMugunthan V N u32 reg; 1492df828598SMugunthan V N 149356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1494108a6537SGrygorii Strashko if (ret < 0) { 149556e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1496108a6537SGrygorii Strashko return ret; 1497108a6537SGrygorii Strashko } 14983fa88c51SGrygorii Strashko 1499df828598SMugunthan V N netif_carrier_off(ndev); 1500df828598SMugunthan V N 1501e05107e6SIvan Khoronzhuk /* Notify the stack of the actual queue counts. */ 1502e05107e6SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num); 1503e05107e6SIvan Khoronzhuk if (ret) { 1504e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 1505e05107e6SIvan Khoronzhuk goto err_cleanup; 1506e05107e6SIvan Khoronzhuk } 1507e05107e6SIvan Khoronzhuk 1508e05107e6SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num); 1509e05107e6SIvan Khoronzhuk if (ret) { 1510e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 1511e05107e6SIvan Khoronzhuk goto err_cleanup; 1512e05107e6SIvan Khoronzhuk } 1513e05107e6SIvan Khoronzhuk 15142a05a622SIvan Khoronzhuk reg = cpsw->version; 1515df828598SMugunthan V N 1516df828598SMugunthan V N dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 1517df828598SMugunthan V N CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 1518df828598SMugunthan V N CPSW_RTL_VERSION(reg)); 1519df828598SMugunthan V N 1520d5bc1613SIvan Khoronzhuk /* Initialize host and slave ports */ 1521d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) 1522df828598SMugunthan V N cpsw_init_host_port(priv); 1523df828598SMugunthan V N for_each_slave(priv, cpsw_slave_open, priv); 1524df828598SMugunthan V N 15253b72c2feSMugunthan V N /* Add default VLAN */ 1526606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) 15273b72c2feSMugunthan V N cpsw_add_default_vlan(priv); 1528e6afea0bSMugunthan V N else 15292a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan, 153061f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0); 15313b72c2feSMugunthan V N 1532d5bc1613SIvan Khoronzhuk /* initialize shared resources for every ndev */ 1533d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) { 1534d9ba8f9eSMugunthan V N /* disable priority elevation */ 1535dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->regs->ptype); 1536df828598SMugunthan V N 1537d9ba8f9eSMugunthan V N /* enable statistics collection only on all ports */ 1538dda5f5feSGrygorii Strashko writel_relaxed(0x7, &cpsw->regs->stat_port_en); 1539df828598SMugunthan V N 15401923d6e4SMugunthan V N /* Enable internal fifo flow control */ 15415d8d0d4dSIvan Khoronzhuk writel(0x7, &cpsw->regs->flow_control); 15421923d6e4SMugunthan V N 1543dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_rx); 1544dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_tx); 1545d354eb85SMugunthan V N 1546e38b5a3dSIvan Khoronzhuk if (cpsw->tx_irq_disabled) { 1547e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 1548e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 15497da11600SMugunthan V N } 15507da11600SMugunthan V N 1551e38b5a3dSIvan Khoronzhuk if (cpsw->rx_irq_disabled) { 1552e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 1553e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 15547da11600SMugunthan V N } 15557da11600SMugunthan V N 15563802dce1SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 15573802dce1SIvan Khoronzhuk if (ret < 0) 1558aacebbf8SSebastian Siewior goto err_cleanup; 1559f280e89aSMugunthan V N 15608a2c9a5aSGrygorii Strashko if (cpts_register(cpsw->cpts)) 1561f280e89aSMugunthan V N dev_err(priv->dev, "error registering cpts device\n"); 1562f280e89aSMugunthan V N 1563d9ba8f9eSMugunthan V N } 1564df828598SMugunthan V N 1565ff5b8ef2SMugunthan V N /* Enable Interrupt pacing if configured */ 15662a05a622SIvan Khoronzhuk if (cpsw->coal_intvl != 0) { 1567ff5b8ef2SMugunthan V N struct ethtool_coalesce coal; 1568ff5b8ef2SMugunthan V N 15692a05a622SIvan Khoronzhuk coal.rx_coalesce_usecs = cpsw->coal_intvl; 1570ff5b8ef2SMugunthan V N cpsw_set_coalesce(ndev, &coal); 1571ff5b8ef2SMugunthan V N } 1572ff5b8ef2SMugunthan V N 15732c836bd9SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 15742c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1575d5bc1613SIvan Khoronzhuk cpsw->usage_count++; 1576f63a975eSMugunthan V N 1577df828598SMugunthan V N return 0; 1578df828598SMugunthan V N 1579aacebbf8SSebastian Siewior err_cleanup: 15802c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 15812a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 158256e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1583aacebbf8SSebastian Siewior netif_carrier_off(priv->ndev); 1584aacebbf8SSebastian Siewior return ret; 1585df828598SMugunthan V N } 1586df828598SMugunthan V N 1587df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev) 1588df828598SMugunthan V N { 1589df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1590649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1591df828598SMugunthan V N 1592df828598SMugunthan V N cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 1593e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(priv->ndev); 1594df828598SMugunthan V N netif_carrier_off(priv->ndev); 1595d9ba8f9eSMugunthan V N 1596d5bc1613SIvan Khoronzhuk if (cpsw->usage_count <= 1) { 1597dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_rx); 1598dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_tx); 15992a05a622SIvan Khoronzhuk cpts_unregister(cpsw->cpts); 16002c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 16012c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 16022a05a622SIvan Khoronzhuk cpsw_ale_stop(cpsw->ale); 1603d9ba8f9eSMugunthan V N } 16042a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 16050be01b8eSIvan Khoronzhuk 16060be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 16070be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 16080be01b8eSIvan Khoronzhuk 1609d5bc1613SIvan Khoronzhuk cpsw->usage_count--; 161056e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1611df828598SMugunthan V N return 0; 1612df828598SMugunthan V N } 1613df828598SMugunthan V N 1614df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 1615df828598SMugunthan V N struct net_device *ndev) 1616df828598SMugunthan V N { 1617df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 16182c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1619f44f8417SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 1620e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 1621e05107e6SIvan Khoronzhuk struct cpdma_chan *txch; 1622e05107e6SIvan Khoronzhuk int ret, q_idx; 1623df828598SMugunthan V N 1624df828598SMugunthan V N if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 1625df828598SMugunthan V N cpsw_err(priv, tx_err, "packet pad failed\n"); 16268dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 16271bf96050SIvan Khoronzhuk return NET_XMIT_DROP; 1628df828598SMugunthan V N } 1629df828598SMugunthan V N 16309232b16dSMugunthan V N if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 1631f44f8417SIvan Khoronzhuk cpts_is_tx_enabled(cpts) && cpts_can_timestamp(cpts, skb)) 16322e5b38abSRichard Cochran skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 16332e5b38abSRichard Cochran 1634e05107e6SIvan Khoronzhuk q_idx = skb_get_queue_mapping(skb); 1635e05107e6SIvan Khoronzhuk if (q_idx >= cpsw->tx_ch_num) 1636e05107e6SIvan Khoronzhuk q_idx = q_idx % cpsw->tx_ch_num; 1637e05107e6SIvan Khoronzhuk 16388feb0a19SIvan Khoronzhuk txch = cpsw->txv[q_idx].ch; 1639e05107e6SIvan Khoronzhuk ret = cpsw_tx_packet_submit(priv, skb, txch); 1640df828598SMugunthan V N if (unlikely(ret != 0)) { 1641df828598SMugunthan V N cpsw_err(priv, tx_err, "desc submit failed\n"); 1642df828598SMugunthan V N goto fail; 1643df828598SMugunthan V N } 1644df828598SMugunthan V N 1645fae50823SMugunthan V N /* If there is no more tx desc left free then we need to 1646fae50823SMugunthan V N * tell the kernel to stop sending us tx frames. 1647fae50823SMugunthan V N */ 1648e05107e6SIvan Khoronzhuk if (unlikely(!cpdma_check_free_tx_desc(txch))) { 1649e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, q_idx); 1650e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1651e05107e6SIvan Khoronzhuk } 1652fae50823SMugunthan V N 1653df828598SMugunthan V N return NETDEV_TX_OK; 1654df828598SMugunthan V N fail: 16558dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 1656e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 1657e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1658df828598SMugunthan V N return NETDEV_TX_BUSY; 1659df828598SMugunthan V N } 1660df828598SMugunthan V N 1661c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 16622e5b38abSRichard Cochran 16632a05a622SIvan Khoronzhuk static void cpsw_hwtstamp_v1(struct cpsw_common *cpsw) 16642e5b38abSRichard Cochran { 1665606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave]; 16662e5b38abSRichard Cochran u32 ts_en, seq_id; 16672e5b38abSRichard Cochran 1668b63ba58eSGrygorii Strashko if (!cpts_is_tx_enabled(cpsw->cpts) && 1669b63ba58eSGrygorii Strashko !cpts_is_rx_enabled(cpsw->cpts)) { 16702e5b38abSRichard Cochran slave_write(slave, 0, CPSW1_TS_CTL); 16712e5b38abSRichard Cochran return; 16722e5b38abSRichard Cochran } 16732e5b38abSRichard Cochran 16742e5b38abSRichard Cochran seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588; 16752e5b38abSRichard Cochran ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS; 16762e5b38abSRichard Cochran 1677b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 16782e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_TX_EN; 16792e5b38abSRichard Cochran 1680b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 16812e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_RX_EN; 16822e5b38abSRichard Cochran 16832e5b38abSRichard Cochran slave_write(slave, ts_en, CPSW1_TS_CTL); 16842e5b38abSRichard Cochran slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE); 16852e5b38abSRichard Cochran } 16862e5b38abSRichard Cochran 16872e5b38abSRichard Cochran static void cpsw_hwtstamp_v2(struct cpsw_priv *priv) 16882e5b38abSRichard Cochran { 1689d9ba8f9eSMugunthan V N struct cpsw_slave *slave; 16905d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16912e5b38abSRichard Cochran u32 ctrl, mtype; 16922e5b38abSRichard Cochran 1693cb7d78d0SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 1694d9ba8f9eSMugunthan V N 16952e5b38abSRichard Cochran ctrl = slave_read(slave, CPSW2_CONTROL); 16962a05a622SIvan Khoronzhuk switch (cpsw->version) { 169709c55372SGeorge Cherian case CPSW_VERSION_2: 169809c55372SGeorge Cherian ctrl &= ~CTRL_V2_ALL_TS_MASK; 16992e5b38abSRichard Cochran 1700b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 170109c55372SGeorge Cherian ctrl |= CTRL_V2_TX_TS_BITS; 17022e5b38abSRichard Cochran 1703b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 170409c55372SGeorge Cherian ctrl |= CTRL_V2_RX_TS_BITS; 170509c55372SGeorge Cherian break; 170609c55372SGeorge Cherian case CPSW_VERSION_3: 170709c55372SGeorge Cherian default: 170809c55372SGeorge Cherian ctrl &= ~CTRL_V3_ALL_TS_MASK; 170909c55372SGeorge Cherian 1710b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 171109c55372SGeorge Cherian ctrl |= CTRL_V3_TX_TS_BITS; 171209c55372SGeorge Cherian 1713b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 171409c55372SGeorge Cherian ctrl |= CTRL_V3_RX_TS_BITS; 171509c55372SGeorge Cherian break; 171609c55372SGeorge Cherian } 17172e5b38abSRichard Cochran 17182e5b38abSRichard Cochran mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS; 17192e5b38abSRichard Cochran 17202e5b38abSRichard Cochran slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE); 17212e5b38abSRichard Cochran slave_write(slave, ctrl, CPSW2_CONTROL); 1722dda5f5feSGrygorii Strashko writel_relaxed(ETH_P_1588, &cpsw->regs->ts_ltype); 17232e5b38abSRichard Cochran } 17242e5b38abSRichard Cochran 1725a5b4145bSBen Hutchings static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 17262e5b38abSRichard Cochran { 17273177bf6fSMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 17282e5b38abSRichard Cochran struct hwtstamp_config cfg; 17292a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 17302a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 17312e5b38abSRichard Cochran 17322a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 17332a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 17342a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 17352ee91e54SBen Hutchings return -EOPNOTSUPP; 17362ee91e54SBen Hutchings 17372e5b38abSRichard Cochran if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 17382e5b38abSRichard Cochran return -EFAULT; 17392e5b38abSRichard Cochran 17402e5b38abSRichard Cochran /* reserved for future extensions */ 17412e5b38abSRichard Cochran if (cfg.flags) 17422e5b38abSRichard Cochran return -EINVAL; 17432e5b38abSRichard Cochran 17442ee91e54SBen Hutchings if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON) 17452e5b38abSRichard Cochran return -ERANGE; 17462e5b38abSRichard Cochran 17472e5b38abSRichard Cochran switch (cfg.rx_filter) { 17482e5b38abSRichard Cochran case HWTSTAMP_FILTER_NONE: 1749b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 0); 17502e5b38abSRichard Cochran break; 17512e5b38abSRichard Cochran case HWTSTAMP_FILTER_ALL: 1752e9523a5aSGrygorii Strashko case HWTSTAMP_FILTER_NTP_ALL: 1753e9523a5aSGrygorii Strashko return -ERANGE; 17542e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 17552e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 17562e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 1757e9523a5aSGrygorii Strashko cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V1_L4_EVENT); 1758e9523a5aSGrygorii Strashko cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; 1759e9523a5aSGrygorii Strashko break; 17602e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 17612e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 17622e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 17632e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 17642e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 17652e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 17662e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_EVENT: 17672e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_SYNC: 17682e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1769e9523a5aSGrygorii Strashko cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V2_EVENT); 17702e5b38abSRichard Cochran cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 17712e5b38abSRichard Cochran break; 17722e5b38abSRichard Cochran default: 17732e5b38abSRichard Cochran return -ERANGE; 17742e5b38abSRichard Cochran } 17752e5b38abSRichard Cochran 1776b63ba58eSGrygorii Strashko cpts_tx_enable(cpts, cfg.tx_type == HWTSTAMP_TX_ON); 17772ee91e54SBen Hutchings 17782a05a622SIvan Khoronzhuk switch (cpsw->version) { 17792e5b38abSRichard Cochran case CPSW_VERSION_1: 17802a05a622SIvan Khoronzhuk cpsw_hwtstamp_v1(cpsw); 17812e5b38abSRichard Cochran break; 17822e5b38abSRichard Cochran case CPSW_VERSION_2: 1783f7d403cbSGeorge Cherian case CPSW_VERSION_3: 17842e5b38abSRichard Cochran cpsw_hwtstamp_v2(priv); 17852e5b38abSRichard Cochran break; 17862e5b38abSRichard Cochran default: 17872ee91e54SBen Hutchings WARN_ON(1); 17882e5b38abSRichard Cochran } 17892e5b38abSRichard Cochran 17902e5b38abSRichard Cochran return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 17912e5b38abSRichard Cochran } 17922e5b38abSRichard Cochran 1793a5b4145bSBen Hutchings static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1794a5b4145bSBen Hutchings { 17952a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(dev); 17962a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 1797a5b4145bSBen Hutchings struct hwtstamp_config cfg; 1798a5b4145bSBen Hutchings 17992a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 18002a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 18012a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 1802a5b4145bSBen Hutchings return -EOPNOTSUPP; 1803a5b4145bSBen Hutchings 1804a5b4145bSBen Hutchings cfg.flags = 0; 1805b63ba58eSGrygorii Strashko cfg.tx_type = cpts_is_tx_enabled(cpts) ? 1806b63ba58eSGrygorii Strashko HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; 1807b63ba58eSGrygorii Strashko cfg.rx_filter = (cpts_is_rx_enabled(cpts) ? 1808e9523a5aSGrygorii Strashko cpts->rx_enable : HWTSTAMP_FILTER_NONE); 1809a5b4145bSBen Hutchings 1810a5b4145bSBen Hutchings return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 1811a5b4145bSBen Hutchings } 1812c8395d4eSGrygorii Strashko #else 1813c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1814c8395d4eSGrygorii Strashko { 1815c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1816c8395d4eSGrygorii Strashko } 1817a5b4145bSBen Hutchings 1818c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 1819c8395d4eSGrygorii Strashko { 1820c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1821c8395d4eSGrygorii Strashko } 18222e5b38abSRichard Cochran #endif /*CONFIG_TI_CPTS*/ 18232e5b38abSRichard Cochran 18242e5b38abSRichard Cochran static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 18252e5b38abSRichard Cochran { 182611f2c988SMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 1827606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1828606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 182911f2c988SMugunthan V N 18302e5b38abSRichard Cochran if (!netif_running(dev)) 18312e5b38abSRichard Cochran return -EINVAL; 18322e5b38abSRichard Cochran 183311f2c988SMugunthan V N switch (cmd) { 183411f2c988SMugunthan V N case SIOCSHWTSTAMP: 1835a5b4145bSBen Hutchings return cpsw_hwtstamp_set(dev, req); 1836a5b4145bSBen Hutchings case SIOCGHWTSTAMP: 1837a5b4145bSBen Hutchings return cpsw_hwtstamp_get(dev, req); 18382e5b38abSRichard Cochran } 18392e5b38abSRichard Cochran 1840606f3993SIvan Khoronzhuk if (!cpsw->slaves[slave_no].phy) 1841c1b59947SStefan Sørensen return -EOPNOTSUPP; 1842606f3993SIvan Khoronzhuk return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd); 184311f2c988SMugunthan V N } 184411f2c988SMugunthan V N 1845df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev) 1846df828598SMugunthan V N { 1847df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 18482c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1849e05107e6SIvan Khoronzhuk int ch; 1850df828598SMugunthan V N 1851df828598SMugunthan V N cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 18528dc43ddcSTobias Klauser ndev->stats.tx_errors++; 18532c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1854e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 18558feb0a19SIvan Khoronzhuk cpdma_chan_stop(cpsw->txv[ch].ch); 18568feb0a19SIvan Khoronzhuk cpdma_chan_start(cpsw->txv[ch].ch); 1857e05107e6SIvan Khoronzhuk } 1858e05107e6SIvan Khoronzhuk 18592c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 186075514b66SGrygorii Strashko netif_trans_update(ndev); 186175514b66SGrygorii Strashko netif_tx_wake_all_queues(ndev); 1862df828598SMugunthan V N } 1863df828598SMugunthan V N 1864dcfd8d58SMugunthan V N static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p) 1865dcfd8d58SMugunthan V N { 1866dcfd8d58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1867dcfd8d58SMugunthan V N struct sockaddr *addr = (struct sockaddr *)p; 1868649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1869dcfd8d58SMugunthan V N int flags = 0; 1870dcfd8d58SMugunthan V N u16 vid = 0; 1871a6c5d14fSGrygorii Strashko int ret; 1872dcfd8d58SMugunthan V N 1873dcfd8d58SMugunthan V N if (!is_valid_ether_addr(addr->sa_data)) 1874dcfd8d58SMugunthan V N return -EADDRNOTAVAIL; 1875dcfd8d58SMugunthan V N 187656e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1877a6c5d14fSGrygorii Strashko if (ret < 0) { 187856e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1879a6c5d14fSGrygorii Strashko return ret; 1880a6c5d14fSGrygorii Strashko } 1881a6c5d14fSGrygorii Strashko 1882606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 1883606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 1884dcfd8d58SMugunthan V N flags = ALE_VLAN; 1885dcfd8d58SMugunthan V N } 1886dcfd8d58SMugunthan V N 18872a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1888dcfd8d58SMugunthan V N flags, vid); 18892a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM, 1890dcfd8d58SMugunthan V N flags, vid); 1891dcfd8d58SMugunthan V N 1892dcfd8d58SMugunthan V N memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); 1893dcfd8d58SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 1894dcfd8d58SMugunthan V N for_each_slave(priv, cpsw_set_slave_mac, priv); 1895dcfd8d58SMugunthan V N 189656e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1897a6c5d14fSGrygorii Strashko 1898dcfd8d58SMugunthan V N return 0; 1899dcfd8d58SMugunthan V N } 1900dcfd8d58SMugunthan V N 1901df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 1902df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev) 1903df828598SMugunthan V N { 1904dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1905df828598SMugunthan V N 1906dbc4ec52SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1907dbc4ec52SIvan Khoronzhuk cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw); 1908dbc4ec52SIvan Khoronzhuk cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw); 1909dbc4ec52SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1910df828598SMugunthan V N } 1911df828598SMugunthan V N #endif 1912df828598SMugunthan V N 19133b72c2feSMugunthan V N static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, 19143b72c2feSMugunthan V N unsigned short vid) 19153b72c2feSMugunthan V N { 19163b72c2feSMugunthan V N int ret; 19179f6bd8faSMugunthan V N int unreg_mcast_mask = 0; 19189f6bd8faSMugunthan V N u32 port_mask; 1919606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19209f6bd8faSMugunthan V N 1921606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 19229f6bd8faSMugunthan V N port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST; 19239f6bd8faSMugunthan V N 19249f6bd8faSMugunthan V N if (priv->ndev->flags & IFF_ALLMULTI) 19259f6bd8faSMugunthan V N unreg_mcast_mask = port_mask; 19269f6bd8faSMugunthan V N } else { 19279f6bd8faSMugunthan V N port_mask = ALE_ALL_PORTS; 19281e5c4bc4SLennart Sorensen 19291e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 19301e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 19311e5c4bc4SLennart Sorensen else 19321e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 19339f6bd8faSMugunthan V N } 19343b72c2feSMugunthan V N 19352a05a622SIvan Khoronzhuk ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, 193661f1cef9SGrygorii Strashko unreg_mcast_mask); 19373b72c2feSMugunthan V N if (ret != 0) 19383b72c2feSMugunthan V N return ret; 19393b72c2feSMugunthan V N 19402a05a622SIvan Khoronzhuk ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 194171a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19423b72c2feSMugunthan V N if (ret != 0) 19433b72c2feSMugunthan V N goto clean_vid; 19443b72c2feSMugunthan V N 19452a05a622SIvan Khoronzhuk ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 19469f6bd8faSMugunthan V N port_mask, ALE_VLAN, vid, 0); 19473b72c2feSMugunthan V N if (ret != 0) 19483b72c2feSMugunthan V N goto clean_vlan_ucast; 19493b72c2feSMugunthan V N return 0; 19503b72c2feSMugunthan V N 19513b72c2feSMugunthan V N clean_vlan_ucast: 19522a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 195371a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19543b72c2feSMugunthan V N clean_vid: 19552a05a622SIvan Khoronzhuk cpsw_ale_del_vlan(cpsw->ale, vid, 0); 19563b72c2feSMugunthan V N return ret; 19573b72c2feSMugunthan V N } 19583b72c2feSMugunthan V N 19593b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, 196080d5c368SPatrick McHardy __be16 proto, u16 vid) 19613b72c2feSMugunthan V N { 19623b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1963649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1964a6c5d14fSGrygorii Strashko int ret; 19653b72c2feSMugunthan V N 1966606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 19673b72c2feSMugunthan V N return 0; 19683b72c2feSMugunthan V N 196956e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1970a6c5d14fSGrygorii Strashko if (ret < 0) { 197156e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1972a6c5d14fSGrygorii Strashko return ret; 1973a6c5d14fSGrygorii Strashko } 1974a6c5d14fSGrygorii Strashko 1975606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 197602a54164SMugunthan V N /* In dual EMAC, reserved VLAN id should not be used for 197702a54164SMugunthan V N * creating VLAN interfaces as this can break the dual 197802a54164SMugunthan V N * EMAC port separation 197902a54164SMugunthan V N */ 198002a54164SMugunthan V N int i; 198102a54164SMugunthan V N 1982606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 1983606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 198402a54164SMugunthan V N return -EINVAL; 198502a54164SMugunthan V N } 198602a54164SMugunthan V N } 198702a54164SMugunthan V N 19883b72c2feSMugunthan V N dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid); 1989a6c5d14fSGrygorii Strashko ret = cpsw_add_vlan_ale_entry(priv, vid); 1990a6c5d14fSGrygorii Strashko 199156e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1992a6c5d14fSGrygorii Strashko return ret; 19933b72c2feSMugunthan V N } 19943b72c2feSMugunthan V N 19953b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev, 199680d5c368SPatrick McHardy __be16 proto, u16 vid) 19973b72c2feSMugunthan V N { 19983b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1999649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 20003b72c2feSMugunthan V N int ret; 20013b72c2feSMugunthan V N 2002606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 20033b72c2feSMugunthan V N return 0; 20043b72c2feSMugunthan V N 200556e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 2006a6c5d14fSGrygorii Strashko if (ret < 0) { 200756e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 2008a6c5d14fSGrygorii Strashko return ret; 2009a6c5d14fSGrygorii Strashko } 2010a6c5d14fSGrygorii Strashko 2011606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 201202a54164SMugunthan V N int i; 201302a54164SMugunthan V N 2014606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 2015606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 201602a54164SMugunthan V N return -EINVAL; 201702a54164SMugunthan V N } 201802a54164SMugunthan V N } 201902a54164SMugunthan V N 20203b72c2feSMugunthan V N dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid); 20212a05a622SIvan Khoronzhuk ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0); 20223b72c2feSMugunthan V N if (ret != 0) 20233b72c2feSMugunthan V N return ret; 20243b72c2feSMugunthan V N 20252a05a622SIvan Khoronzhuk ret = cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 202661f1cef9SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 20273b72c2feSMugunthan V N if (ret != 0) 20283b72c2feSMugunthan V N return ret; 20293b72c2feSMugunthan V N 20302a05a622SIvan Khoronzhuk ret = cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast, 20313b72c2feSMugunthan V N 0, ALE_VLAN, vid); 203256e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 2033a6c5d14fSGrygorii Strashko return ret; 20343b72c2feSMugunthan V N } 20353b72c2feSMugunthan V N 203683fcad0cSIvan Khoronzhuk static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate) 203783fcad0cSIvan Khoronzhuk { 203883fcad0cSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 203983fcad0cSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 204052986a2fSIvan Khoronzhuk struct cpsw_slave *slave; 204132b78d85SIvan Khoronzhuk u32 min_rate; 204283fcad0cSIvan Khoronzhuk u32 ch_rate; 204352986a2fSIvan Khoronzhuk int i, ret; 204483fcad0cSIvan Khoronzhuk 204583fcad0cSIvan Khoronzhuk ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate; 204683fcad0cSIvan Khoronzhuk if (ch_rate == rate) 204783fcad0cSIvan Khoronzhuk return 0; 204883fcad0cSIvan Khoronzhuk 204932b78d85SIvan Khoronzhuk ch_rate = rate * 1000; 205083fcad0cSIvan Khoronzhuk min_rate = cpdma_chan_get_min_rate(cpsw->dma); 205132b78d85SIvan Khoronzhuk if ((ch_rate < min_rate && ch_rate)) { 205232b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be less than %dMbps", 205383fcad0cSIvan Khoronzhuk min_rate); 205483fcad0cSIvan Khoronzhuk return -EINVAL; 205583fcad0cSIvan Khoronzhuk } 205683fcad0cSIvan Khoronzhuk 20570be01b8eSIvan Khoronzhuk if (rate > cpsw->speed) { 205832b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be more than 2Gbps"); 205932b78d85SIvan Khoronzhuk return -EINVAL; 206032b78d85SIvan Khoronzhuk } 206132b78d85SIvan Khoronzhuk 206283fcad0cSIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 206383fcad0cSIvan Khoronzhuk if (ret < 0) { 206483fcad0cSIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 206583fcad0cSIvan Khoronzhuk return ret; 206683fcad0cSIvan Khoronzhuk } 206783fcad0cSIvan Khoronzhuk 206832b78d85SIvan Khoronzhuk ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate); 206983fcad0cSIvan Khoronzhuk pm_runtime_put(cpsw->dev); 207032b78d85SIvan Khoronzhuk 207132b78d85SIvan Khoronzhuk if (ret) 207232b78d85SIvan Khoronzhuk return ret; 207332b78d85SIvan Khoronzhuk 207452986a2fSIvan Khoronzhuk /* update rates for slaves tx queues */ 207552986a2fSIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 207652986a2fSIvan Khoronzhuk slave = &cpsw->slaves[i]; 207752986a2fSIvan Khoronzhuk if (!slave->ndev) 207852986a2fSIvan Khoronzhuk continue; 207952986a2fSIvan Khoronzhuk 208052986a2fSIvan Khoronzhuk netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate; 208152986a2fSIvan Khoronzhuk } 208252986a2fSIvan Khoronzhuk 208332b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 208483fcad0cSIvan Khoronzhuk return ret; 208583fcad0cSIvan Khoronzhuk } 208683fcad0cSIvan Khoronzhuk 2087df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = { 2088df828598SMugunthan V N .ndo_open = cpsw_ndo_open, 2089df828598SMugunthan V N .ndo_stop = cpsw_ndo_stop, 2090df828598SMugunthan V N .ndo_start_xmit = cpsw_ndo_start_xmit, 2091dcfd8d58SMugunthan V N .ndo_set_mac_address = cpsw_ndo_set_mac_address, 20922e5b38abSRichard Cochran .ndo_do_ioctl = cpsw_ndo_ioctl, 2093df828598SMugunthan V N .ndo_validate_addr = eth_validate_addr, 2094df828598SMugunthan V N .ndo_tx_timeout = cpsw_ndo_tx_timeout, 20955c50a856SMugunthan V N .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, 209683fcad0cSIvan Khoronzhuk .ndo_set_tx_maxrate = cpsw_ndo_set_tx_maxrate, 2097df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 2098df828598SMugunthan V N .ndo_poll_controller = cpsw_ndo_poll_controller, 2099df828598SMugunthan V N #endif 21003b72c2feSMugunthan V N .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, 21013b72c2feSMugunthan V N .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, 2102df828598SMugunthan V N }; 2103df828598SMugunthan V N 210452c4f0ecSMugunthan V N static int cpsw_get_regs_len(struct net_device *ndev) 210552c4f0ecSMugunthan V N { 2106606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 210752c4f0ecSMugunthan V N 2108606f3993SIvan Khoronzhuk return cpsw->data.ale_entries * ALE_ENTRY_WORDS * sizeof(u32); 210952c4f0ecSMugunthan V N } 211052c4f0ecSMugunthan V N 211152c4f0ecSMugunthan V N static void cpsw_get_regs(struct net_device *ndev, 211252c4f0ecSMugunthan V N struct ethtool_regs *regs, void *p) 211352c4f0ecSMugunthan V N { 211452c4f0ecSMugunthan V N u32 *reg = p; 21152a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 211652c4f0ecSMugunthan V N 211752c4f0ecSMugunthan V N /* update CPSW IP version */ 21182a05a622SIvan Khoronzhuk regs->version = cpsw->version; 211952c4f0ecSMugunthan V N 21202a05a622SIvan Khoronzhuk cpsw_ale_dump(cpsw->ale, reg); 212152c4f0ecSMugunthan V N } 212252c4f0ecSMugunthan V N 2123df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev, 2124df828598SMugunthan V N struct ethtool_drvinfo *info) 2125df828598SMugunthan V N { 2126649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 212756e31bd8SIvan Khoronzhuk struct platform_device *pdev = to_platform_device(cpsw->dev); 21287826d43fSJiri Pirko 212952c4f0ecSMugunthan V N strlcpy(info->driver, "cpsw", sizeof(info->driver)); 21307826d43fSJiri Pirko strlcpy(info->version, "1.0", sizeof(info->version)); 213156e31bd8SIvan Khoronzhuk strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info)); 2132df828598SMugunthan V N } 2133df828598SMugunthan V N 2134df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev) 2135df828598SMugunthan V N { 2136df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2137df828598SMugunthan V N return priv->msg_enable; 2138df828598SMugunthan V N } 2139df828598SMugunthan V N 2140df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 2141df828598SMugunthan V N { 2142df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2143df828598SMugunthan V N priv->msg_enable = value; 2144df828598SMugunthan V N } 2145df828598SMugunthan V N 2146c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 21472e5b38abSRichard Cochran static int cpsw_get_ts_info(struct net_device *ndev, 21482e5b38abSRichard Cochran struct ethtool_ts_info *info) 21492e5b38abSRichard Cochran { 21502a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 21512e5b38abSRichard Cochran 21522e5b38abSRichard Cochran info->so_timestamping = 21532e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_HARDWARE | 21542e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21552e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_HARDWARE | 21562e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21572e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE | 21582e5b38abSRichard Cochran SOF_TIMESTAMPING_RAW_HARDWARE; 21592a05a622SIvan Khoronzhuk info->phc_index = cpsw->cpts->phc_index; 21602e5b38abSRichard Cochran info->tx_types = 21612e5b38abSRichard Cochran (1 << HWTSTAMP_TX_OFF) | 21622e5b38abSRichard Cochran (1 << HWTSTAMP_TX_ON); 21632e5b38abSRichard Cochran info->rx_filters = 21642e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_NONE) | 2165e9523a5aSGrygorii Strashko (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 21662e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); 2167c8395d4eSGrygorii Strashko return 0; 2168c8395d4eSGrygorii Strashko } 21692e5b38abSRichard Cochran #else 2170c8395d4eSGrygorii Strashko static int cpsw_get_ts_info(struct net_device *ndev, 2171c8395d4eSGrygorii Strashko struct ethtool_ts_info *info) 2172c8395d4eSGrygorii Strashko { 21732e5b38abSRichard Cochran info->so_timestamping = 21742e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21752e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21762e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE; 21772e5b38abSRichard Cochran info->phc_index = -1; 21782e5b38abSRichard Cochran info->tx_types = 0; 21792e5b38abSRichard Cochran info->rx_filters = 0; 21802e5b38abSRichard Cochran return 0; 21812e5b38abSRichard Cochran } 2182c8395d4eSGrygorii Strashko #endif 21832e5b38abSRichard Cochran 21842479876dSPhilippe Reynes static int cpsw_get_link_ksettings(struct net_device *ndev, 21852479876dSPhilippe Reynes struct ethtool_link_ksettings *ecmd) 2186d3bb9c58SMugunthan V N { 2187d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2188606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2189606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2190d3bb9c58SMugunthan V N 21915514174fSyuval.shaia@oracle.com if (!cpsw->slaves[slave_no].phy) 2192d3bb9c58SMugunthan V N return -EOPNOTSUPP; 21935514174fSyuval.shaia@oracle.com 21945514174fSyuval.shaia@oracle.com phy_ethtool_ksettings_get(cpsw->slaves[slave_no].phy, ecmd); 21955514174fSyuval.shaia@oracle.com return 0; 2196d3bb9c58SMugunthan V N } 2197d3bb9c58SMugunthan V N 21982479876dSPhilippe Reynes static int cpsw_set_link_ksettings(struct net_device *ndev, 21992479876dSPhilippe Reynes const struct ethtool_link_ksettings *ecmd) 2200d3bb9c58SMugunthan V N { 2201d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2202606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2203606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2204d3bb9c58SMugunthan V N 2205606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 22062479876dSPhilippe Reynes return phy_ethtool_ksettings_set(cpsw->slaves[slave_no].phy, 22072479876dSPhilippe Reynes ecmd); 2208d3bb9c58SMugunthan V N else 2209d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2210d3bb9c58SMugunthan V N } 2211d3bb9c58SMugunthan V N 2212d8a64420SMatus Ujhelyi static void cpsw_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2213d8a64420SMatus Ujhelyi { 2214d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2215606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2216606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2217d8a64420SMatus Ujhelyi 2218d8a64420SMatus Ujhelyi wol->supported = 0; 2219d8a64420SMatus Ujhelyi wol->wolopts = 0; 2220d8a64420SMatus Ujhelyi 2221606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2222606f3993SIvan Khoronzhuk phy_ethtool_get_wol(cpsw->slaves[slave_no].phy, wol); 2223d8a64420SMatus Ujhelyi } 2224d8a64420SMatus Ujhelyi 2225d8a64420SMatus Ujhelyi static int cpsw_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2226d8a64420SMatus Ujhelyi { 2227d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2228606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2229606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2230d8a64420SMatus Ujhelyi 2231606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2232606f3993SIvan Khoronzhuk return phy_ethtool_set_wol(cpsw->slaves[slave_no].phy, wol); 2233d8a64420SMatus Ujhelyi else 2234d8a64420SMatus Ujhelyi return -EOPNOTSUPP; 2235d8a64420SMatus Ujhelyi } 2236d8a64420SMatus Ujhelyi 22371923d6e4SMugunthan V N static void cpsw_get_pauseparam(struct net_device *ndev, 22381923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22391923d6e4SMugunthan V N { 22401923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22411923d6e4SMugunthan V N 22421923d6e4SMugunthan V N pause->autoneg = AUTONEG_DISABLE; 22431923d6e4SMugunthan V N pause->rx_pause = priv->rx_pause ? true : false; 22441923d6e4SMugunthan V N pause->tx_pause = priv->tx_pause ? true : false; 22451923d6e4SMugunthan V N } 22461923d6e4SMugunthan V N 22471923d6e4SMugunthan V N static int cpsw_set_pauseparam(struct net_device *ndev, 22481923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22491923d6e4SMugunthan V N { 22501923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22511923d6e4SMugunthan V N bool link; 22521923d6e4SMugunthan V N 22531923d6e4SMugunthan V N priv->rx_pause = pause->rx_pause ? true : false; 22541923d6e4SMugunthan V N priv->tx_pause = pause->tx_pause ? true : false; 22551923d6e4SMugunthan V N 22561923d6e4SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 22571923d6e4SMugunthan V N return 0; 22581923d6e4SMugunthan V N } 22591923d6e4SMugunthan V N 22607898b1daSGrygorii Strashko static int cpsw_ethtool_op_begin(struct net_device *ndev) 22617898b1daSGrygorii Strashko { 22627898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2263649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 22647898b1daSGrygorii Strashko int ret; 22657898b1daSGrygorii Strashko 226656e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 22677898b1daSGrygorii Strashko if (ret < 0) { 22687898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool begin failed %d\n", ret); 226956e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 22707898b1daSGrygorii Strashko } 22717898b1daSGrygorii Strashko 22727898b1daSGrygorii Strashko return ret; 22737898b1daSGrygorii Strashko } 22747898b1daSGrygorii Strashko 22757898b1daSGrygorii Strashko static void cpsw_ethtool_op_complete(struct net_device *ndev) 22767898b1daSGrygorii Strashko { 22777898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 22787898b1daSGrygorii Strashko int ret; 22797898b1daSGrygorii Strashko 228056e31bd8SIvan Khoronzhuk ret = pm_runtime_put(priv->cpsw->dev); 22817898b1daSGrygorii Strashko if (ret < 0) 22827898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool complete failed %d\n", ret); 22837898b1daSGrygorii Strashko } 22847898b1daSGrygorii Strashko 2285ce52c744SIvan Khoronzhuk static void cpsw_get_channels(struct net_device *ndev, 2286ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2287ce52c744SIvan Khoronzhuk { 2288ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2289ce52c744SIvan Khoronzhuk 2290ce52c744SIvan Khoronzhuk ch->max_combined = 0; 2291ce52c744SIvan Khoronzhuk ch->max_rx = CPSW_MAX_QUEUES; 2292ce52c744SIvan Khoronzhuk ch->max_tx = CPSW_MAX_QUEUES; 2293ce52c744SIvan Khoronzhuk ch->max_other = 0; 2294ce52c744SIvan Khoronzhuk ch->other_count = 0; 2295ce52c744SIvan Khoronzhuk ch->rx_count = cpsw->rx_ch_num; 2296ce52c744SIvan Khoronzhuk ch->tx_count = cpsw->tx_ch_num; 2297ce52c744SIvan Khoronzhuk ch->combined_count = 0; 2298ce52c744SIvan Khoronzhuk } 2299ce52c744SIvan Khoronzhuk 2300ce52c744SIvan Khoronzhuk static int cpsw_check_ch_settings(struct cpsw_common *cpsw, 2301ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2302ce52c744SIvan Khoronzhuk { 2303ce52c744SIvan Khoronzhuk if (ch->combined_count) 2304ce52c744SIvan Khoronzhuk return -EINVAL; 2305ce52c744SIvan Khoronzhuk 2306ce52c744SIvan Khoronzhuk /* verify we have at least one channel in each direction */ 2307ce52c744SIvan Khoronzhuk if (!ch->rx_count || !ch->tx_count) 2308ce52c744SIvan Khoronzhuk return -EINVAL; 2309ce52c744SIvan Khoronzhuk 2310ce52c744SIvan Khoronzhuk if (ch->rx_count > cpsw->data.channels || 2311ce52c744SIvan Khoronzhuk ch->tx_count > cpsw->data.channels) 2312ce52c744SIvan Khoronzhuk return -EINVAL; 2313ce52c744SIvan Khoronzhuk 2314ce52c744SIvan Khoronzhuk return 0; 2315ce52c744SIvan Khoronzhuk } 2316ce52c744SIvan Khoronzhuk 2317ce52c744SIvan Khoronzhuk static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx) 2318ce52c744SIvan Khoronzhuk { 2319ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2320ce52c744SIvan Khoronzhuk void (*handler)(void *, int, int); 232183fcad0cSIvan Khoronzhuk struct netdev_queue *queue; 23228feb0a19SIvan Khoronzhuk struct cpsw_vector *vec; 2323ce52c744SIvan Khoronzhuk int ret, *ch; 2324ce52c744SIvan Khoronzhuk 2325ce52c744SIvan Khoronzhuk if (rx) { 2326ce52c744SIvan Khoronzhuk ch = &cpsw->rx_ch_num; 23278feb0a19SIvan Khoronzhuk vec = cpsw->rxv; 2328ce52c744SIvan Khoronzhuk handler = cpsw_rx_handler; 2329ce52c744SIvan Khoronzhuk } else { 2330ce52c744SIvan Khoronzhuk ch = &cpsw->tx_ch_num; 23318feb0a19SIvan Khoronzhuk vec = cpsw->txv; 2332ce52c744SIvan Khoronzhuk handler = cpsw_tx_handler; 2333ce52c744SIvan Khoronzhuk } 2334ce52c744SIvan Khoronzhuk 2335ce52c744SIvan Khoronzhuk while (*ch < ch_num) { 23368feb0a19SIvan Khoronzhuk vec[*ch].ch = cpdma_chan_create(cpsw->dma, *ch, handler, rx); 233783fcad0cSIvan Khoronzhuk queue = netdev_get_tx_queue(priv->ndev, *ch); 233883fcad0cSIvan Khoronzhuk queue->tx_maxrate = 0; 2339ce52c744SIvan Khoronzhuk 23408feb0a19SIvan Khoronzhuk if (IS_ERR(vec[*ch].ch)) 23418feb0a19SIvan Khoronzhuk return PTR_ERR(vec[*ch].ch); 2342ce52c744SIvan Khoronzhuk 23438feb0a19SIvan Khoronzhuk if (!vec[*ch].ch) 2344ce52c744SIvan Khoronzhuk return -EINVAL; 2345ce52c744SIvan Khoronzhuk 2346ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "created new %d %s channel\n", *ch, 2347ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2348ce52c744SIvan Khoronzhuk (*ch)++; 2349ce52c744SIvan Khoronzhuk } 2350ce52c744SIvan Khoronzhuk 2351ce52c744SIvan Khoronzhuk while (*ch > ch_num) { 2352ce52c744SIvan Khoronzhuk (*ch)--; 2353ce52c744SIvan Khoronzhuk 23548feb0a19SIvan Khoronzhuk ret = cpdma_chan_destroy(vec[*ch].ch); 2355ce52c744SIvan Khoronzhuk if (ret) 2356ce52c744SIvan Khoronzhuk return ret; 2357ce52c744SIvan Khoronzhuk 2358ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "destroyed %d %s channel\n", *ch, 2359ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2360ce52c744SIvan Khoronzhuk } 2361ce52c744SIvan Khoronzhuk 2362ce52c744SIvan Khoronzhuk return 0; 2363ce52c744SIvan Khoronzhuk } 2364ce52c744SIvan Khoronzhuk 2365ce52c744SIvan Khoronzhuk static int cpsw_update_channels(struct cpsw_priv *priv, 2366ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2367ce52c744SIvan Khoronzhuk { 2368ce52c744SIvan Khoronzhuk int ret; 2369ce52c744SIvan Khoronzhuk 2370ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->rx_count, 1); 2371ce52c744SIvan Khoronzhuk if (ret) 2372ce52c744SIvan Khoronzhuk return ret; 2373ce52c744SIvan Khoronzhuk 2374ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->tx_count, 0); 2375ce52c744SIvan Khoronzhuk if (ret) 2376ce52c744SIvan Khoronzhuk return ret; 2377ce52c744SIvan Khoronzhuk 2378ce52c744SIvan Khoronzhuk return 0; 2379ce52c744SIvan Khoronzhuk } 2380ce52c744SIvan Khoronzhuk 2381022d7ad7SIvan Khoronzhuk static void cpsw_suspend_data_pass(struct net_device *ndev) 2382ce52c744SIvan Khoronzhuk { 2383022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2384ce52c744SIvan Khoronzhuk struct cpsw_slave *slave; 2385022d7ad7SIvan Khoronzhuk int i; 2386ce52c744SIvan Khoronzhuk 2387ce52c744SIvan Khoronzhuk /* Disable NAPI scheduling */ 2388ce52c744SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2389ce52c744SIvan Khoronzhuk 2390ce52c744SIvan Khoronzhuk /* Stop all transmit queues for every network device. 2391ce52c744SIvan Khoronzhuk * Disable re-using rx descriptors with dormant_on. 2392ce52c744SIvan Khoronzhuk */ 2393ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2394ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2395ce52c744SIvan Khoronzhuk continue; 2396ce52c744SIvan Khoronzhuk 2397ce52c744SIvan Khoronzhuk netif_tx_stop_all_queues(slave->ndev); 2398ce52c744SIvan Khoronzhuk netif_dormant_on(slave->ndev); 2399ce52c744SIvan Khoronzhuk } 2400ce52c744SIvan Khoronzhuk 2401ce52c744SIvan Khoronzhuk /* Handle rest of tx packets and stop cpdma channels */ 2402ce52c744SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 2403022d7ad7SIvan Khoronzhuk } 2404022d7ad7SIvan Khoronzhuk 2405022d7ad7SIvan Khoronzhuk static int cpsw_resume_data_pass(struct net_device *ndev) 2406022d7ad7SIvan Khoronzhuk { 2407022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2408022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2409022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2410022d7ad7SIvan Khoronzhuk int i, ret; 2411022d7ad7SIvan Khoronzhuk 2412022d7ad7SIvan Khoronzhuk /* Allow rx packets handling */ 2413022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2414022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2415022d7ad7SIvan Khoronzhuk netif_dormant_off(slave->ndev); 2416022d7ad7SIvan Khoronzhuk 2417022d7ad7SIvan Khoronzhuk /* After this receive is started */ 2418d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) { 2419022d7ad7SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 2420022d7ad7SIvan Khoronzhuk if (ret) 2421022d7ad7SIvan Khoronzhuk return ret; 2422022d7ad7SIvan Khoronzhuk 2423022d7ad7SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 2424022d7ad7SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2425022d7ad7SIvan Khoronzhuk } 2426022d7ad7SIvan Khoronzhuk 2427022d7ad7SIvan Khoronzhuk /* Resume transmit for every affected interface */ 2428022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2429022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2430022d7ad7SIvan Khoronzhuk netif_tx_start_all_queues(slave->ndev); 2431022d7ad7SIvan Khoronzhuk 2432022d7ad7SIvan Khoronzhuk return 0; 2433022d7ad7SIvan Khoronzhuk } 2434022d7ad7SIvan Khoronzhuk 2435022d7ad7SIvan Khoronzhuk static int cpsw_set_channels(struct net_device *ndev, 2436022d7ad7SIvan Khoronzhuk struct ethtool_channels *chs) 2437022d7ad7SIvan Khoronzhuk { 2438022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2439022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2440022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2441022d7ad7SIvan Khoronzhuk int i, ret; 2442022d7ad7SIvan Khoronzhuk 2443022d7ad7SIvan Khoronzhuk ret = cpsw_check_ch_settings(cpsw, chs); 2444022d7ad7SIvan Khoronzhuk if (ret < 0) 2445022d7ad7SIvan Khoronzhuk return ret; 2446022d7ad7SIvan Khoronzhuk 2447022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 2448ce52c744SIvan Khoronzhuk ret = cpsw_update_channels(priv, chs); 2449ce52c744SIvan Khoronzhuk if (ret) 2450ce52c744SIvan Khoronzhuk goto err; 2451ce52c744SIvan Khoronzhuk 2452ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2453ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2454ce52c744SIvan Khoronzhuk continue; 2455ce52c744SIvan Khoronzhuk 2456ce52c744SIvan Khoronzhuk /* Inform stack about new count of queues */ 2457ce52c744SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(slave->ndev, 2458ce52c744SIvan Khoronzhuk cpsw->tx_ch_num); 2459ce52c744SIvan Khoronzhuk if (ret) { 2460ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 2461ce52c744SIvan Khoronzhuk goto err; 2462ce52c744SIvan Khoronzhuk } 2463ce52c744SIvan Khoronzhuk 2464ce52c744SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(slave->ndev, 2465ce52c744SIvan Khoronzhuk cpsw->rx_ch_num); 2466ce52c744SIvan Khoronzhuk if (ret) { 2467ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 2468ce52c744SIvan Khoronzhuk goto err; 2469ce52c744SIvan Khoronzhuk } 2470ce52c744SIvan Khoronzhuk } 2471ce52c744SIvan Khoronzhuk 2472d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 247332b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 24748feb0a19SIvan Khoronzhuk 2475022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 2476022d7ad7SIvan Khoronzhuk if (!ret) 2477ce52c744SIvan Khoronzhuk return 0; 2478ce52c744SIvan Khoronzhuk err: 2479ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot update channels number, closing device\n"); 2480ce52c744SIvan Khoronzhuk dev_close(ndev); 2481ce52c744SIvan Khoronzhuk return ret; 2482ce52c744SIvan Khoronzhuk } 2483ce52c744SIvan Khoronzhuk 2484a0909949SYegor Yefremov static int cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata) 2485a0909949SYegor Yefremov { 2486a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2487a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2488a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2489a0909949SYegor Yefremov 2490a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2491a0909949SYegor Yefremov return phy_ethtool_get_eee(cpsw->slaves[slave_no].phy, edata); 2492a0909949SYegor Yefremov else 2493a0909949SYegor Yefremov return -EOPNOTSUPP; 2494a0909949SYegor Yefremov } 2495a0909949SYegor Yefremov 2496a0909949SYegor Yefremov static int cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata) 2497a0909949SYegor Yefremov { 2498a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2499a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2500a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2501a0909949SYegor Yefremov 2502a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2503a0909949SYegor Yefremov return phy_ethtool_set_eee(cpsw->slaves[slave_no].phy, edata); 2504a0909949SYegor Yefremov else 2505a0909949SYegor Yefremov return -EOPNOTSUPP; 2506a0909949SYegor Yefremov } 2507a0909949SYegor Yefremov 25086bb10c2bSYegor Yefremov static int cpsw_nway_reset(struct net_device *ndev) 25096bb10c2bSYegor Yefremov { 25106bb10c2bSYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 25116bb10c2bSYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 25126bb10c2bSYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 25136bb10c2bSYegor Yefremov 25146bb10c2bSYegor Yefremov if (cpsw->slaves[slave_no].phy) 25156bb10c2bSYegor Yefremov return genphy_restart_aneg(cpsw->slaves[slave_no].phy); 25166bb10c2bSYegor Yefremov else 25176bb10c2bSYegor Yefremov return -EOPNOTSUPP; 25186bb10c2bSYegor Yefremov } 25196bb10c2bSYegor Yefremov 2520be034fc1SGrygorii Strashko static void cpsw_get_ringparam(struct net_device *ndev, 2521be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2522be034fc1SGrygorii Strashko { 2523be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2524be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2525be034fc1SGrygorii Strashko 2526be034fc1SGrygorii Strashko /* not supported */ 2527be034fc1SGrygorii Strashko ering->tx_max_pending = 0; 2528be034fc1SGrygorii Strashko ering->tx_pending = cpdma_get_num_tx_descs(cpsw->dma); 2529f89d21b9SIvan Khoronzhuk ering->rx_max_pending = descs_pool_size - CPSW_MAX_QUEUES; 2530be034fc1SGrygorii Strashko ering->rx_pending = cpdma_get_num_rx_descs(cpsw->dma); 2531be034fc1SGrygorii Strashko } 2532be034fc1SGrygorii Strashko 2533be034fc1SGrygorii Strashko static int cpsw_set_ringparam(struct net_device *ndev, 2534be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2535be034fc1SGrygorii Strashko { 2536be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2537be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2538022d7ad7SIvan Khoronzhuk int ret; 2539be034fc1SGrygorii Strashko 2540be034fc1SGrygorii Strashko /* ignore ering->tx_pending - only rx_pending adjustment is supported */ 2541be034fc1SGrygorii Strashko 2542be034fc1SGrygorii Strashko if (ering->rx_mini_pending || ering->rx_jumbo_pending || 2543f89d21b9SIvan Khoronzhuk ering->rx_pending < CPSW_MAX_QUEUES || 2544f89d21b9SIvan Khoronzhuk ering->rx_pending > (descs_pool_size - CPSW_MAX_QUEUES)) 2545be034fc1SGrygorii Strashko return -EINVAL; 2546be034fc1SGrygorii Strashko 2547be034fc1SGrygorii Strashko if (ering->rx_pending == cpdma_get_num_rx_descs(cpsw->dma)) 2548be034fc1SGrygorii Strashko return 0; 2549be034fc1SGrygorii Strashko 2550022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 2551be034fc1SGrygorii Strashko 2552be034fc1SGrygorii Strashko cpdma_set_num_rx_descs(cpsw->dma, ering->rx_pending); 2553be034fc1SGrygorii Strashko 2554d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 2555be034fc1SGrygorii Strashko cpdma_chan_split_pool(cpsw->dma); 2556be034fc1SGrygorii Strashko 2557022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 2558022d7ad7SIvan Khoronzhuk if (!ret) 2559be034fc1SGrygorii Strashko return 0; 2560022d7ad7SIvan Khoronzhuk 2561022d7ad7SIvan Khoronzhuk dev_err(&ndev->dev, "cannot set ring params, closing device\n"); 2562be034fc1SGrygorii Strashko dev_close(ndev); 2563be034fc1SGrygorii Strashko return ret; 2564be034fc1SGrygorii Strashko } 2565be034fc1SGrygorii Strashko 2566df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = { 2567df828598SMugunthan V N .get_drvinfo = cpsw_get_drvinfo, 2568df828598SMugunthan V N .get_msglevel = cpsw_get_msglevel, 2569df828598SMugunthan V N .set_msglevel = cpsw_set_msglevel, 2570df828598SMugunthan V N .get_link = ethtool_op_get_link, 25712e5b38abSRichard Cochran .get_ts_info = cpsw_get_ts_info, 2572ff5b8ef2SMugunthan V N .get_coalesce = cpsw_get_coalesce, 2573ff5b8ef2SMugunthan V N .set_coalesce = cpsw_set_coalesce, 2574d9718546SMugunthan V N .get_sset_count = cpsw_get_sset_count, 2575d9718546SMugunthan V N .get_strings = cpsw_get_strings, 2576d9718546SMugunthan V N .get_ethtool_stats = cpsw_get_ethtool_stats, 25771923d6e4SMugunthan V N .get_pauseparam = cpsw_get_pauseparam, 25781923d6e4SMugunthan V N .set_pauseparam = cpsw_set_pauseparam, 2579d8a64420SMatus Ujhelyi .get_wol = cpsw_get_wol, 2580d8a64420SMatus Ujhelyi .set_wol = cpsw_set_wol, 258152c4f0ecSMugunthan V N .get_regs_len = cpsw_get_regs_len, 258252c4f0ecSMugunthan V N .get_regs = cpsw_get_regs, 25837898b1daSGrygorii Strashko .begin = cpsw_ethtool_op_begin, 25847898b1daSGrygorii Strashko .complete = cpsw_ethtool_op_complete, 2585ce52c744SIvan Khoronzhuk .get_channels = cpsw_get_channels, 2586ce52c744SIvan Khoronzhuk .set_channels = cpsw_set_channels, 25872479876dSPhilippe Reynes .get_link_ksettings = cpsw_get_link_ksettings, 25882479876dSPhilippe Reynes .set_link_ksettings = cpsw_set_link_ksettings, 2589a0909949SYegor Yefremov .get_eee = cpsw_get_eee, 2590a0909949SYegor Yefremov .set_eee = cpsw_set_eee, 25916bb10c2bSYegor Yefremov .nway_reset = cpsw_nway_reset, 2592be034fc1SGrygorii Strashko .get_ringparam = cpsw_get_ringparam, 2593be034fc1SGrygorii Strashko .set_ringparam = cpsw_set_ringparam, 2594df828598SMugunthan V N }; 2595df828598SMugunthan V N 2596606f3993SIvan Khoronzhuk static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_common *cpsw, 2597549985eeSRichard Cochran u32 slave_reg_ofs, u32 sliver_reg_ofs) 2598df828598SMugunthan V N { 25995d8d0d4dSIvan Khoronzhuk void __iomem *regs = cpsw->regs; 2600df828598SMugunthan V N int slave_num = slave->slave_num; 2601606f3993SIvan Khoronzhuk struct cpsw_slave_data *data = cpsw->data.slave_data + slave_num; 2602df828598SMugunthan V N 2603df828598SMugunthan V N slave->data = data; 2604549985eeSRichard Cochran slave->regs = regs + slave_reg_ofs; 2605549985eeSRichard Cochran slave->sliver = regs + sliver_reg_ofs; 2606d9ba8f9eSMugunthan V N slave->port_vlan = data->dual_emac_res_vlan; 2607df828598SMugunthan V N } 2608df828598SMugunthan V N 2609552165bcSDavid Rivshin static int cpsw_probe_dt(struct cpsw_platform_data *data, 26102eb32b0aSMugunthan V N struct platform_device *pdev) 26112eb32b0aSMugunthan V N { 26122eb32b0aSMugunthan V N struct device_node *node = pdev->dev.of_node; 26132eb32b0aSMugunthan V N struct device_node *slave_node; 26142eb32b0aSMugunthan V N int i = 0, ret; 26152eb32b0aSMugunthan V N u32 prop; 26162eb32b0aSMugunthan V N 26172eb32b0aSMugunthan V N if (!node) 26182eb32b0aSMugunthan V N return -EINVAL; 26192eb32b0aSMugunthan V N 26202eb32b0aSMugunthan V N if (of_property_read_u32(node, "slaves", &prop)) { 262188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing slaves property in the DT.\n"); 26222eb32b0aSMugunthan V N return -EINVAL; 26232eb32b0aSMugunthan V N } 26242eb32b0aSMugunthan V N data->slaves = prop; 26252eb32b0aSMugunthan V N 2626e86ac13bSMugunthan V N if (of_property_read_u32(node, "active_slave", &prop)) { 262788c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing active_slave property in the DT.\n"); 2628aa1a15e2SDaniel Mack return -EINVAL; 262978ca0b28SRichard Cochran } 2630e86ac13bSMugunthan V N data->active_slave = prop; 263178ca0b28SRichard Cochran 2632aa1a15e2SDaniel Mack data->slave_data = devm_kzalloc(&pdev->dev, data->slaves 2633aa1a15e2SDaniel Mack * sizeof(struct cpsw_slave_data), 2634b2adaca9SJoe Perches GFP_KERNEL); 2635b2adaca9SJoe Perches if (!data->slave_data) 2636aa1a15e2SDaniel Mack return -ENOMEM; 26372eb32b0aSMugunthan V N 26382eb32b0aSMugunthan V N if (of_property_read_u32(node, "cpdma_channels", &prop)) { 263988c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n"); 2640aa1a15e2SDaniel Mack return -EINVAL; 26412eb32b0aSMugunthan V N } 26422eb32b0aSMugunthan V N data->channels = prop; 26432eb32b0aSMugunthan V N 26442eb32b0aSMugunthan V N if (of_property_read_u32(node, "ale_entries", &prop)) { 264588c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n"); 2646aa1a15e2SDaniel Mack return -EINVAL; 26472eb32b0aSMugunthan V N } 26482eb32b0aSMugunthan V N data->ale_entries = prop; 26492eb32b0aSMugunthan V N 26502eb32b0aSMugunthan V N if (of_property_read_u32(node, "bd_ram_size", &prop)) { 265188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n"); 2652aa1a15e2SDaniel Mack return -EINVAL; 26532eb32b0aSMugunthan V N } 26542eb32b0aSMugunthan V N data->bd_ram_size = prop; 26552eb32b0aSMugunthan V N 26562eb32b0aSMugunthan V N if (of_property_read_u32(node, "mac_control", &prop)) { 265788c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing mac_control property in the DT.\n"); 2658aa1a15e2SDaniel Mack return -EINVAL; 26592eb32b0aSMugunthan V N } 26602eb32b0aSMugunthan V N data->mac_control = prop; 26612eb32b0aSMugunthan V N 2662281abd96SMarkus Pargmann if (of_property_read_bool(node, "dual_emac")) 2663281abd96SMarkus Pargmann data->dual_emac = 1; 2664d9ba8f9eSMugunthan V N 26651fb19aa7SVaibhav Hiremath /* 26661fb19aa7SVaibhav Hiremath * Populate all the child nodes here... 26671fb19aa7SVaibhav Hiremath */ 26681fb19aa7SVaibhav Hiremath ret = of_platform_populate(node, NULL, NULL, &pdev->dev); 26691fb19aa7SVaibhav Hiremath /* We do not want to force this, as in some cases may not have child */ 26701fb19aa7SVaibhav Hiremath if (ret) 267188c99ff6SGeorge Cherian dev_warn(&pdev->dev, "Doesn't have any child node\n"); 26721fb19aa7SVaibhav Hiremath 26738658aaf2SBen Hutchings for_each_available_child_of_node(node, slave_node) { 2674549985eeSRichard Cochran struct cpsw_slave_data *slave_data = data->slave_data + i; 2675549985eeSRichard Cochran const void *mac_addr = NULL; 2676549985eeSRichard Cochran int lenp; 2677549985eeSRichard Cochran const __be32 *parp; 2678549985eeSRichard Cochran 2679f468b10eSMarkus Pargmann /* This is no slave child node, continue */ 2680f468b10eSMarkus Pargmann if (strcmp(slave_node->name, "slave")) 2681f468b10eSMarkus Pargmann continue; 2682f468b10eSMarkus Pargmann 2683552165bcSDavid Rivshin slave_data->phy_node = of_parse_phandle(slave_node, 2684552165bcSDavid Rivshin "phy-handle", 0); 2685f1eea5c1SDavid Rivshin parp = of_get_property(slave_node, "phy_id", &lenp); 2686ae092b5bSDavid Rivshin if (slave_data->phy_node) { 2687ae092b5bSDavid Rivshin dev_dbg(&pdev->dev, 2688f7ce9103SRob Herring "slave[%d] using phy-handle=\"%pOF\"\n", 2689f7ce9103SRob Herring i, slave_data->phy_node); 2690ae092b5bSDavid Rivshin } else if (of_phy_is_fixed_link(slave_node)) { 2691dfc0a6d3SDavid Rivshin /* In the case of a fixed PHY, the DT node associated 2692dfc0a6d3SDavid Rivshin * to the PHY is the Ethernet MAC DT node. 2693dfc0a6d3SDavid Rivshin */ 26941f71e8c9SMarkus Brunner ret = of_phy_register_fixed_link(slave_node); 269523a09873SJohan Hovold if (ret) { 269623a09873SJohan Hovold if (ret != -EPROBE_DEFER) 269723a09873SJohan Hovold dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret); 26981f71e8c9SMarkus Brunner return ret; 269923a09873SJohan Hovold } 270006cd6d6eSDavid Rivshin slave_data->phy_node = of_node_get(slave_node); 2701f1eea5c1SDavid Rivshin } else if (parp) { 2702f1eea5c1SDavid Rivshin u32 phyid; 2703f1eea5c1SDavid Rivshin struct device_node *mdio_node; 2704f1eea5c1SDavid Rivshin struct platform_device *mdio; 2705f1eea5c1SDavid Rivshin 2706f1eea5c1SDavid Rivshin if (lenp != (sizeof(__be32) * 2)) { 2707f1eea5c1SDavid Rivshin dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i); 270847276fccSMugunthan V N goto no_phy_slave; 2709549985eeSRichard Cochran } 2710549985eeSRichard Cochran mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); 2711549985eeSRichard Cochran phyid = be32_to_cpup(parp+1); 2712549985eeSRichard Cochran mdio = of_find_device_by_node(mdio_node); 271360e71ab5SJohan Hovold of_node_put(mdio_node); 27146954cc1fSJohan Hovold if (!mdio) { 271556fdb2e0SMarkus Pargmann dev_err(&pdev->dev, "Missing mdio platform device\n"); 27166954cc1fSJohan Hovold return -EINVAL; 27176954cc1fSJohan Hovold } 2718549985eeSRichard Cochran snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), 2719549985eeSRichard Cochran PHY_ID_FMT, mdio->name, phyid); 272086e1d5adSJohan Hovold put_device(&mdio->dev); 2721f1eea5c1SDavid Rivshin } else { 2722ae092b5bSDavid Rivshin dev_err(&pdev->dev, 2723ae092b5bSDavid Rivshin "No slave[%d] phy_id, phy-handle, or fixed-link property\n", 2724ae092b5bSDavid Rivshin i); 2725f1eea5c1SDavid Rivshin goto no_phy_slave; 2726f1eea5c1SDavid Rivshin } 272747276fccSMugunthan V N slave_data->phy_if = of_get_phy_mode(slave_node); 272847276fccSMugunthan V N if (slave_data->phy_if < 0) { 272947276fccSMugunthan V N dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n", 273047276fccSMugunthan V N i); 273147276fccSMugunthan V N return slave_data->phy_if; 273247276fccSMugunthan V N } 273347276fccSMugunthan V N 273447276fccSMugunthan V N no_phy_slave: 2735549985eeSRichard Cochran mac_addr = of_get_mac_address(slave_node); 27360ba517b1SMarkus Pargmann if (mac_addr) { 2737549985eeSRichard Cochran memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); 27380ba517b1SMarkus Pargmann } else { 2739b6745f6eSMugunthan V N ret = ti_cm_get_macid(&pdev->dev, i, 27400ba517b1SMarkus Pargmann slave_data->mac_addr); 27410ba517b1SMarkus Pargmann if (ret) 27420ba517b1SMarkus Pargmann return ret; 27430ba517b1SMarkus Pargmann } 2744d9ba8f9eSMugunthan V N if (data->dual_emac) { 274591c4166cSMugunthan V N if (of_property_read_u32(slave_node, "dual_emac_res_vlan", 2746d9ba8f9eSMugunthan V N &prop)) { 274788c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n"); 2748d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = i+1; 274988c99ff6SGeorge Cherian dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n", 2750d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan, i); 2751d9ba8f9eSMugunthan V N } else { 2752d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = prop; 2753d9ba8f9eSMugunthan V N } 2754d9ba8f9eSMugunthan V N } 2755d9ba8f9eSMugunthan V N 2756549985eeSRichard Cochran i++; 27573a27bfacSMugunthan V N if (i == data->slaves) 27583a27bfacSMugunthan V N break; 2759549985eeSRichard Cochran } 2760549985eeSRichard Cochran 27612eb32b0aSMugunthan V N return 0; 27622eb32b0aSMugunthan V N } 27632eb32b0aSMugunthan V N 2764a4e32b0dSJohan Hovold static void cpsw_remove_dt(struct platform_device *pdev) 2765a4e32b0dSJohan Hovold { 27668cbcc466SJohan Hovold struct net_device *ndev = platform_get_drvdata(pdev); 27678cbcc466SJohan Hovold struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 27688cbcc466SJohan Hovold struct cpsw_platform_data *data = &cpsw->data; 27698cbcc466SJohan Hovold struct device_node *node = pdev->dev.of_node; 27708cbcc466SJohan Hovold struct device_node *slave_node; 27718cbcc466SJohan Hovold int i = 0; 27728cbcc466SJohan Hovold 27738cbcc466SJohan Hovold for_each_available_child_of_node(node, slave_node) { 27748cbcc466SJohan Hovold struct cpsw_slave_data *slave_data = &data->slave_data[i]; 27758cbcc466SJohan Hovold 27768cbcc466SJohan Hovold if (strcmp(slave_node->name, "slave")) 27778cbcc466SJohan Hovold continue; 27788cbcc466SJohan Hovold 27793f65047cSJohan Hovold if (of_phy_is_fixed_link(slave_node)) 27803f65047cSJohan Hovold of_phy_deregister_fixed_link(slave_node); 27818cbcc466SJohan Hovold 27828cbcc466SJohan Hovold of_node_put(slave_data->phy_node); 27838cbcc466SJohan Hovold 27848cbcc466SJohan Hovold i++; 27858cbcc466SJohan Hovold if (i == data->slaves) 27868cbcc466SJohan Hovold break; 27878cbcc466SJohan Hovold } 27888cbcc466SJohan Hovold 2789a4e32b0dSJohan Hovold of_platform_depopulate(&pdev->dev); 2790a4e32b0dSJohan Hovold } 2791a4e32b0dSJohan Hovold 279256e31bd8SIvan Khoronzhuk static int cpsw_probe_dual_emac(struct cpsw_priv *priv) 2793d9ba8f9eSMugunthan V N { 2794606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2795606f3993SIvan Khoronzhuk struct cpsw_platform_data *data = &cpsw->data; 2796d9ba8f9eSMugunthan V N struct net_device *ndev; 2797d9ba8f9eSMugunthan V N struct cpsw_priv *priv_sl2; 2798e38b5a3dSIvan Khoronzhuk int ret = 0; 2799d9ba8f9eSMugunthan V N 2800e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2801d9ba8f9eSMugunthan V N if (!ndev) { 280256e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error allocating net_device\n"); 2803d9ba8f9eSMugunthan V N return -ENOMEM; 2804d9ba8f9eSMugunthan V N } 2805d9ba8f9eSMugunthan V N 2806d9ba8f9eSMugunthan V N priv_sl2 = netdev_priv(ndev); 2807606f3993SIvan Khoronzhuk priv_sl2->cpsw = cpsw; 2808d9ba8f9eSMugunthan V N priv_sl2->ndev = ndev; 2809d9ba8f9eSMugunthan V N priv_sl2->dev = &ndev->dev; 2810d9ba8f9eSMugunthan V N priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 2811d9ba8f9eSMugunthan V N 2812d9ba8f9eSMugunthan V N if (is_valid_ether_addr(data->slave_data[1].mac_addr)) { 2813d9ba8f9eSMugunthan V N memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr, 2814d9ba8f9eSMugunthan V N ETH_ALEN); 281556e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n", 281656e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2817d9ba8f9eSMugunthan V N } else { 2818d9ba8f9eSMugunthan V N random_ether_addr(priv_sl2->mac_addr); 281956e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n", 282056e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2821d9ba8f9eSMugunthan V N } 2822d9ba8f9eSMugunthan V N memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN); 2823d9ba8f9eSMugunthan V N 2824d9ba8f9eSMugunthan V N priv_sl2->emac_port = 1; 2825606f3993SIvan Khoronzhuk cpsw->slaves[1].ndev = ndev; 2826f646968fSPatrick McHardy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 2827d9ba8f9eSMugunthan V N 2828d9ba8f9eSMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 28297ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 2830d9ba8f9eSMugunthan V N 2831d9ba8f9eSMugunthan V N /* register the network device */ 283256e31bd8SIvan Khoronzhuk SET_NETDEV_DEV(ndev, cpsw->dev); 2833d9ba8f9eSMugunthan V N ret = register_netdev(ndev); 2834d9ba8f9eSMugunthan V N if (ret) { 283556e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error registering net device\n"); 2836d9ba8f9eSMugunthan V N free_netdev(ndev); 2837d9ba8f9eSMugunthan V N ret = -ENODEV; 2838d9ba8f9eSMugunthan V N } 2839d9ba8f9eSMugunthan V N 2840d9ba8f9eSMugunthan V N return ret; 2841d9ba8f9eSMugunthan V N } 2842d9ba8f9eSMugunthan V N 28437da11600SMugunthan V N #define CPSW_QUIRK_IRQ BIT(0) 28447da11600SMugunthan V N 2845f5b58948SArvind Yadav static const struct platform_device_id cpsw_devtype[] = { 28467da11600SMugunthan V N { 28477da11600SMugunthan V N /* keep it for existing comaptibles */ 28487da11600SMugunthan V N .name = "cpsw", 28497da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28507da11600SMugunthan V N }, { 28517da11600SMugunthan V N .name = "am335x-cpsw", 28527da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28537da11600SMugunthan V N }, { 28547da11600SMugunthan V N .name = "am4372-cpsw", 28557da11600SMugunthan V N .driver_data = 0, 28567da11600SMugunthan V N }, { 28577da11600SMugunthan V N .name = "dra7-cpsw", 28587da11600SMugunthan V N .driver_data = 0, 28597da11600SMugunthan V N }, { 28607da11600SMugunthan V N /* sentinel */ 28617da11600SMugunthan V N } 28627da11600SMugunthan V N }; 28637da11600SMugunthan V N MODULE_DEVICE_TABLE(platform, cpsw_devtype); 28647da11600SMugunthan V N 28657da11600SMugunthan V N enum ti_cpsw_type { 28667da11600SMugunthan V N CPSW = 0, 28677da11600SMugunthan V N AM335X_CPSW, 28687da11600SMugunthan V N AM4372_CPSW, 28697da11600SMugunthan V N DRA7_CPSW, 28707da11600SMugunthan V N }; 28717da11600SMugunthan V N 28727da11600SMugunthan V N static const struct of_device_id cpsw_of_mtable[] = { 28737da11600SMugunthan V N { .compatible = "ti,cpsw", .data = &cpsw_devtype[CPSW], }, 28747da11600SMugunthan V N { .compatible = "ti,am335x-cpsw", .data = &cpsw_devtype[AM335X_CPSW], }, 28757da11600SMugunthan V N { .compatible = "ti,am4372-cpsw", .data = &cpsw_devtype[AM4372_CPSW], }, 28767da11600SMugunthan V N { .compatible = "ti,dra7-cpsw", .data = &cpsw_devtype[DRA7_CPSW], }, 28777da11600SMugunthan V N { /* sentinel */ }, 28787da11600SMugunthan V N }; 28797da11600SMugunthan V N MODULE_DEVICE_TABLE(of, cpsw_of_mtable); 28807da11600SMugunthan V N 2881663e12e6SBill Pemberton static int cpsw_probe(struct platform_device *pdev) 2882df828598SMugunthan V N { 2883ef4183a1SIvan Khoronzhuk struct clk *clk; 2884d1bd9acfSSebastian Siewior struct cpsw_platform_data *data; 2885df828598SMugunthan V N struct net_device *ndev; 2886df828598SMugunthan V N struct cpsw_priv *priv; 2887df828598SMugunthan V N struct cpdma_params dma_params; 2888df828598SMugunthan V N struct cpsw_ale_params ale_params; 2889aa1a15e2SDaniel Mack void __iomem *ss_regs; 28908a2c9a5aSGrygorii Strashko void __iomem *cpts_regs; 2891aa1a15e2SDaniel Mack struct resource *res, *ss_res; 28927da11600SMugunthan V N const struct of_device_id *of_id; 28931d147ccbSMugunthan V N struct gpio_descs *mode; 2894549985eeSRichard Cochran u32 slave_offset, sliver_offset, slave_size; 2895649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 28965087b915SFelipe Balbi int ret = 0, i; 28975087b915SFelipe Balbi int irq; 2898df828598SMugunthan V N 2899649a1688SIvan Khoronzhuk cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL); 29003420ea88SJohan Hovold if (!cpsw) 29013420ea88SJohan Hovold return -ENOMEM; 29023420ea88SJohan Hovold 290356e31bd8SIvan Khoronzhuk cpsw->dev = &pdev->dev; 2904649a1688SIvan Khoronzhuk 2905e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2906df828598SMugunthan V N if (!ndev) { 290788c99ff6SGeorge Cherian dev_err(&pdev->dev, "error allocating net_device\n"); 2908df828598SMugunthan V N return -ENOMEM; 2909df828598SMugunthan V N } 2910df828598SMugunthan V N 2911df828598SMugunthan V N platform_set_drvdata(pdev, ndev); 2912df828598SMugunthan V N priv = netdev_priv(ndev); 2913649a1688SIvan Khoronzhuk priv->cpsw = cpsw; 2914df828598SMugunthan V N priv->ndev = ndev; 2915df828598SMugunthan V N priv->dev = &ndev->dev; 2916df828598SMugunthan V N priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 29172a05a622SIvan Khoronzhuk cpsw->rx_packet_max = max(rx_packet_max, 128); 2918df828598SMugunthan V N 29191d147ccbSMugunthan V N mode = devm_gpiod_get_array_optional(&pdev->dev, "mode", GPIOD_OUT_LOW); 29201d147ccbSMugunthan V N if (IS_ERR(mode)) { 29211d147ccbSMugunthan V N ret = PTR_ERR(mode); 29221d147ccbSMugunthan V N dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret); 29231d147ccbSMugunthan V N goto clean_ndev_ret; 29241d147ccbSMugunthan V N } 29251d147ccbSMugunthan V N 29261fb19aa7SVaibhav Hiremath /* 29271fb19aa7SVaibhav Hiremath * This may be required here for child devices. 29281fb19aa7SVaibhav Hiremath */ 29291fb19aa7SVaibhav Hiremath pm_runtime_enable(&pdev->dev); 29301fb19aa7SVaibhav Hiremath 2931739683b4SMugunthan V N /* Select default pin state */ 2932739683b4SMugunthan V N pinctrl_pm_select_default_state(&pdev->dev); 2933739683b4SMugunthan V N 2934a4e32b0dSJohan Hovold /* Need to enable clocks with runtime PM api to access module 2935a4e32b0dSJohan Hovold * registers 2936a4e32b0dSJohan Hovold */ 2937a4e32b0dSJohan Hovold ret = pm_runtime_get_sync(&pdev->dev); 2938a4e32b0dSJohan Hovold if (ret < 0) { 2939a4e32b0dSJohan Hovold pm_runtime_put_noidle(&pdev->dev); 2940aa1a15e2SDaniel Mack goto clean_runtime_disable_ret; 29412eb32b0aSMugunthan V N } 2942a4e32b0dSJohan Hovold 294323a09873SJohan Hovold ret = cpsw_probe_dt(&cpsw->data, pdev); 294423a09873SJohan Hovold if (ret) 2945a4e32b0dSJohan Hovold goto clean_dt_ret; 294623a09873SJohan Hovold 2947606f3993SIvan Khoronzhuk data = &cpsw->data; 2948e05107e6SIvan Khoronzhuk cpsw->rx_ch_num = 1; 2949e05107e6SIvan Khoronzhuk cpsw->tx_ch_num = 1; 29502eb32b0aSMugunthan V N 2951df828598SMugunthan V N if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 2952df828598SMugunthan V N memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 295388c99ff6SGeorge Cherian dev_info(&pdev->dev, "Detected MACID = %pM\n", priv->mac_addr); 2954df828598SMugunthan V N } else { 29557efd26d0SJoe Perches eth_random_addr(priv->mac_addr); 295688c99ff6SGeorge Cherian dev_info(&pdev->dev, "Random MACID = %pM\n", priv->mac_addr); 2957df828598SMugunthan V N } 2958df828598SMugunthan V N 2959df828598SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 2960df828598SMugunthan V N 2961606f3993SIvan Khoronzhuk cpsw->slaves = devm_kzalloc(&pdev->dev, 2962aa1a15e2SDaniel Mack sizeof(struct cpsw_slave) * data->slaves, 2963df828598SMugunthan V N GFP_KERNEL); 2964606f3993SIvan Khoronzhuk if (!cpsw->slaves) { 2965aa1a15e2SDaniel Mack ret = -ENOMEM; 2966a4e32b0dSJohan Hovold goto clean_dt_ret; 2967df828598SMugunthan V N } 2968df828598SMugunthan V N for (i = 0; i < data->slaves; i++) 2969606f3993SIvan Khoronzhuk cpsw->slaves[i].slave_num = i; 2970df828598SMugunthan V N 2971606f3993SIvan Khoronzhuk cpsw->slaves[0].ndev = ndev; 2972d9ba8f9eSMugunthan V N priv->emac_port = 0; 2973d9ba8f9eSMugunthan V N 2974ef4183a1SIvan Khoronzhuk clk = devm_clk_get(&pdev->dev, "fck"); 2975ef4183a1SIvan Khoronzhuk if (IS_ERR(clk)) { 2976aa1a15e2SDaniel Mack dev_err(priv->dev, "fck is not found\n"); 2977f150bd7fSMugunthan V N ret = -ENODEV; 2978a4e32b0dSJohan Hovold goto clean_dt_ret; 2979df828598SMugunthan V N } 29802a05a622SIvan Khoronzhuk cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000; 2981df828598SMugunthan V N 2982aa1a15e2SDaniel Mack ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2983aa1a15e2SDaniel Mack ss_regs = devm_ioremap_resource(&pdev->dev, ss_res); 2984aa1a15e2SDaniel Mack if (IS_ERR(ss_regs)) { 2985aa1a15e2SDaniel Mack ret = PTR_ERR(ss_regs); 2986a4e32b0dSJohan Hovold goto clean_dt_ret; 2987df828598SMugunthan V N } 29885d8d0d4dSIvan Khoronzhuk cpsw->regs = ss_regs; 2989df828598SMugunthan V N 29902a05a622SIvan Khoronzhuk cpsw->version = readl(&cpsw->regs->id_ver); 2991f280e89aSMugunthan V N 2992aa1a15e2SDaniel Mack res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 29935d8d0d4dSIvan Khoronzhuk cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res); 29945d8d0d4dSIvan Khoronzhuk if (IS_ERR(cpsw->wr_regs)) { 29955d8d0d4dSIvan Khoronzhuk ret = PTR_ERR(cpsw->wr_regs); 2996a4e32b0dSJohan Hovold goto clean_dt_ret; 2997df828598SMugunthan V N } 2998df828598SMugunthan V N 2999df828598SMugunthan V N memset(&dma_params, 0, sizeof(dma_params)); 3000549985eeSRichard Cochran memset(&ale_params, 0, sizeof(ale_params)); 3001549985eeSRichard Cochran 30022a05a622SIvan Khoronzhuk switch (cpsw->version) { 3003549985eeSRichard Cochran case CPSW_VERSION_1: 30045d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET; 30058a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW1_CPTS_OFFSET; 30065d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW1_HW_STATS; 3007549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET; 3008549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET; 3009549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET; 3010549985eeSRichard Cochran slave_offset = CPSW1_SLAVE_OFFSET; 3011549985eeSRichard Cochran slave_size = CPSW1_SLAVE_SIZE; 3012549985eeSRichard Cochran sliver_offset = CPSW1_SLIVER_OFFSET; 3013549985eeSRichard Cochran dma_params.desc_mem_phys = 0; 3014549985eeSRichard Cochran break; 3015549985eeSRichard Cochran case CPSW_VERSION_2: 3016c193f365SMugunthan V N case CPSW_VERSION_3: 3017926489beSMugunthan V N case CPSW_VERSION_4: 30185d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET; 30198a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW2_CPTS_OFFSET; 30205d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW2_HW_STATS; 3021549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET; 3022549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET; 3023549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET; 3024549985eeSRichard Cochran slave_offset = CPSW2_SLAVE_OFFSET; 3025549985eeSRichard Cochran slave_size = CPSW2_SLAVE_SIZE; 3026549985eeSRichard Cochran sliver_offset = CPSW2_SLIVER_OFFSET; 3027549985eeSRichard Cochran dma_params.desc_mem_phys = 3028aa1a15e2SDaniel Mack (u32 __force) ss_res->start + CPSW2_BD_OFFSET; 3029549985eeSRichard Cochran break; 3030549985eeSRichard Cochran default: 30312a05a622SIvan Khoronzhuk dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version); 3032549985eeSRichard Cochran ret = -ENODEV; 3033a4e32b0dSJohan Hovold goto clean_dt_ret; 3034549985eeSRichard Cochran } 3035606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3036606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[i]; 3037606f3993SIvan Khoronzhuk 3038606f3993SIvan Khoronzhuk cpsw_slave_init(slave, cpsw, slave_offset, sliver_offset); 3039549985eeSRichard Cochran slave_offset += slave_size; 3040549985eeSRichard Cochran sliver_offset += SLIVER_SIZE; 3041549985eeSRichard Cochran } 3042549985eeSRichard Cochran 3043df828598SMugunthan V N dma_params.dev = &pdev->dev; 3044549985eeSRichard Cochran dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH; 3045549985eeSRichard Cochran dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE; 3046549985eeSRichard Cochran dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP; 3047549985eeSRichard Cochran dma_params.txcp = dma_params.txhdp + CPDMA_TXCP; 3048549985eeSRichard Cochran dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP; 3049df828598SMugunthan V N 3050df828598SMugunthan V N dma_params.num_chan = data->channels; 3051df828598SMugunthan V N dma_params.has_soft_reset = true; 3052df828598SMugunthan V N dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 3053df828598SMugunthan V N dma_params.desc_mem_size = data->bd_ram_size; 3054df828598SMugunthan V N dma_params.desc_align = 16; 3055df828598SMugunthan V N dma_params.has_ext_regs = true; 3056549985eeSRichard Cochran dma_params.desc_hw_addr = dma_params.desc_mem_phys; 305783fcad0cSIvan Khoronzhuk dma_params.bus_freq_mhz = cpsw->bus_freq_mhz; 305890225bf0SGrygorii Strashko dma_params.descs_pool_size = descs_pool_size; 3059df828598SMugunthan V N 30602c836bd9SIvan Khoronzhuk cpsw->dma = cpdma_ctlr_create(&dma_params); 30612c836bd9SIvan Khoronzhuk if (!cpsw->dma) { 3062df828598SMugunthan V N dev_err(priv->dev, "error initializing dma\n"); 3063df828598SMugunthan V N ret = -ENOMEM; 3064a4e32b0dSJohan Hovold goto clean_dt_ret; 3065df828598SMugunthan V N } 3066df828598SMugunthan V N 30678feb0a19SIvan Khoronzhuk cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_tx_handler, 0); 30688a83c5d7SIvan Khoronzhuk if (IS_ERR(cpsw->txv[0].ch)) { 30698a83c5d7SIvan Khoronzhuk dev_err(priv->dev, "error initializing tx dma channel\n"); 30708a83c5d7SIvan Khoronzhuk ret = PTR_ERR(cpsw->txv[0].ch); 30718a83c5d7SIvan Khoronzhuk goto clean_dma_ret; 30728a83c5d7SIvan Khoronzhuk } 30738a83c5d7SIvan Khoronzhuk 30748feb0a19SIvan Khoronzhuk cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1); 30758a83c5d7SIvan Khoronzhuk if (IS_ERR(cpsw->rxv[0].ch)) { 30768a83c5d7SIvan Khoronzhuk dev_err(priv->dev, "error initializing rx dma channel\n"); 30778a83c5d7SIvan Khoronzhuk ret = PTR_ERR(cpsw->rxv[0].ch); 3078df828598SMugunthan V N goto clean_dma_ret; 3079df828598SMugunthan V N } 3080df828598SMugunthan V N 30819fe9aa0bSIvan Khoronzhuk ale_params.dev = &pdev->dev; 3082df828598SMugunthan V N ale_params.ale_ageout = ale_ageout; 3083df828598SMugunthan V N ale_params.ale_entries = data->ale_entries; 3084c6395f12SGrygorii Strashko ale_params.ale_ports = CPSW_ALE_PORTS_NUM; 3085df828598SMugunthan V N 30862a05a622SIvan Khoronzhuk cpsw->ale = cpsw_ale_create(&ale_params); 30872a05a622SIvan Khoronzhuk if (!cpsw->ale) { 3088df828598SMugunthan V N dev_err(priv->dev, "error initializing ale engine\n"); 3089df828598SMugunthan V N ret = -ENODEV; 3090df828598SMugunthan V N goto clean_dma_ret; 3091df828598SMugunthan V N } 3092df828598SMugunthan V N 30934a88fb95SGrygorii Strashko cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node); 30948a2c9a5aSGrygorii Strashko if (IS_ERR(cpsw->cpts)) { 30958a2c9a5aSGrygorii Strashko ret = PTR_ERR(cpsw->cpts); 30961971ab58SGrygorii Strashko goto clean_dma_ret; 30978a2c9a5aSGrygorii Strashko } 30988a2c9a5aSGrygorii Strashko 3099c03abd84SFelipe Balbi ndev->irq = platform_get_irq(pdev, 1); 3100df828598SMugunthan V N if (ndev->irq < 0) { 3101df828598SMugunthan V N dev_err(priv->dev, "error getting irq resource\n"); 3102c1e3334fSJulia Lawall ret = ndev->irq; 31031971ab58SGrygorii Strashko goto clean_dma_ret; 3104df828598SMugunthan V N } 3105df828598SMugunthan V N 31067da11600SMugunthan V N of_id = of_match_device(cpsw_of_mtable, &pdev->dev); 31077da11600SMugunthan V N if (of_id) { 31087da11600SMugunthan V N pdev->id_entry = of_id->data; 31097da11600SMugunthan V N if (pdev->id_entry->driver_data) 3110e38b5a3dSIvan Khoronzhuk cpsw->quirk_irq = true; 31117da11600SMugunthan V N } 31127da11600SMugunthan V N 3113070f9c65SKeerthy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3114070f9c65SKeerthy 3115070f9c65SKeerthy ndev->netdev_ops = &cpsw_netdev_ops; 3116070f9c65SKeerthy ndev->ethtool_ops = &cpsw_ethtool_ops; 3117070f9c65SKeerthy netif_napi_add(ndev, &cpsw->napi_rx, cpsw_rx_poll, CPSW_POLL_WEIGHT); 3118070f9c65SKeerthy netif_tx_napi_add(ndev, &cpsw->napi_tx, cpsw_tx_poll, CPSW_POLL_WEIGHT); 3119070f9c65SKeerthy cpsw_split_res(ndev); 3120070f9c65SKeerthy 3121070f9c65SKeerthy /* register the network device */ 3122070f9c65SKeerthy SET_NETDEV_DEV(ndev, &pdev->dev); 3123070f9c65SKeerthy ret = register_netdev(ndev); 3124070f9c65SKeerthy if (ret) { 3125070f9c65SKeerthy dev_err(priv->dev, "error registering net device\n"); 3126070f9c65SKeerthy ret = -ENODEV; 31271971ab58SGrygorii Strashko goto clean_dma_ret; 3128070f9c65SKeerthy } 3129070f9c65SKeerthy 3130070f9c65SKeerthy if (cpsw->data.dual_emac) { 3131070f9c65SKeerthy ret = cpsw_probe_dual_emac(priv); 3132070f9c65SKeerthy if (ret) { 3133070f9c65SKeerthy cpsw_err(priv, probe, "error probe slave 2 emac interface\n"); 3134070f9c65SKeerthy goto clean_unregister_netdev_ret; 3135070f9c65SKeerthy } 3136070f9c65SKeerthy } 3137070f9c65SKeerthy 3138c03abd84SFelipe Balbi /* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and 3139c03abd84SFelipe Balbi * MISC IRQs which are always kept disabled with this driver so 3140c03abd84SFelipe Balbi * we will not request them. 3141c03abd84SFelipe Balbi * 3142c03abd84SFelipe Balbi * If anyone wants to implement support for those, make sure to 3143c03abd84SFelipe Balbi * first request and append them to irqs_table array. 3144c03abd84SFelipe Balbi */ 3145c2b32e58SDaniel Mack 3146c03abd84SFelipe Balbi /* RX IRQ */ 31475087b915SFelipe Balbi irq = platform_get_irq(pdev, 1); 3148c1e3334fSJulia Lawall if (irq < 0) { 3149c1e3334fSJulia Lawall ret = irq; 31501971ab58SGrygorii Strashko goto clean_dma_ret; 3151c1e3334fSJulia Lawall } 31525087b915SFelipe Balbi 3153e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[0] = irq; 3154c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_rx_interrupt, 3155dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31565087b915SFelipe Balbi if (ret < 0) { 31575087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31581971ab58SGrygorii Strashko goto clean_dma_ret; 3159df828598SMugunthan V N } 3160df828598SMugunthan V N 3161c03abd84SFelipe Balbi /* TX IRQ */ 31625087b915SFelipe Balbi irq = platform_get_irq(pdev, 2); 3163c1e3334fSJulia Lawall if (irq < 0) { 3164c1e3334fSJulia Lawall ret = irq; 31651971ab58SGrygorii Strashko goto clean_dma_ret; 3166c1e3334fSJulia Lawall } 31675087b915SFelipe Balbi 3168e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[1] = irq; 3169c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_tx_interrupt, 3170dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31715087b915SFelipe Balbi if (ret < 0) { 31725087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31731971ab58SGrygorii Strashko goto clean_dma_ret; 31745087b915SFelipe Balbi } 3175c2b32e58SDaniel Mack 317690225bf0SGrygorii Strashko cpsw_notice(priv, probe, 317790225bf0SGrygorii Strashko "initialized device (regs %pa, irq %d, pool size %d)\n", 317890225bf0SGrygorii Strashko &ss_res->start, ndev->irq, dma_params.descs_pool_size); 3179d9ba8f9eSMugunthan V N 3180c46ab7e0SJohan Hovold pm_runtime_put(&pdev->dev); 3181c46ab7e0SJohan Hovold 3182df828598SMugunthan V N return 0; 3183df828598SMugunthan V N 3184a7fe9d46SJohan Hovold clean_unregister_netdev_ret: 3185a7fe9d46SJohan Hovold unregister_netdev(ndev); 3186df828598SMugunthan V N clean_dma_ret: 31872c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3188a4e32b0dSJohan Hovold clean_dt_ret: 3189a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 3190c46ab7e0SJohan Hovold pm_runtime_put_sync(&pdev->dev); 3191aa1a15e2SDaniel Mack clean_runtime_disable_ret: 3192f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 3193df828598SMugunthan V N clean_ndev_ret: 3194d1bd9acfSSebastian Siewior free_netdev(priv->ndev); 3195df828598SMugunthan V N return ret; 3196df828598SMugunthan V N } 3197df828598SMugunthan V N 3198663e12e6SBill Pemberton static int cpsw_remove(struct platform_device *pdev) 3199df828598SMugunthan V N { 3200df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 32012a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 32028a0b6dc9SGrygorii Strashko int ret; 32038a0b6dc9SGrygorii Strashko 32048a0b6dc9SGrygorii Strashko ret = pm_runtime_get_sync(&pdev->dev); 32058a0b6dc9SGrygorii Strashko if (ret < 0) { 32068a0b6dc9SGrygorii Strashko pm_runtime_put_noidle(&pdev->dev); 32078a0b6dc9SGrygorii Strashko return ret; 32088a0b6dc9SGrygorii Strashko } 3209df828598SMugunthan V N 3210606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3211606f3993SIvan Khoronzhuk unregister_netdev(cpsw->slaves[1].ndev); 3212d1bd9acfSSebastian Siewior unregister_netdev(ndev); 3213df828598SMugunthan V N 32148a2c9a5aSGrygorii Strashko cpts_release(cpsw->cpts); 32152c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3216a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 32178a0b6dc9SGrygorii Strashko pm_runtime_put_sync(&pdev->dev); 32188a0b6dc9SGrygorii Strashko pm_runtime_disable(&pdev->dev); 3219606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3220606f3993SIvan Khoronzhuk free_netdev(cpsw->slaves[1].ndev); 3221df828598SMugunthan V N free_netdev(ndev); 3222df828598SMugunthan V N return 0; 3223df828598SMugunthan V N } 3224df828598SMugunthan V N 32258963a504SGrygorii Strashko #ifdef CONFIG_PM_SLEEP 3226df828598SMugunthan V N static int cpsw_suspend(struct device *dev) 3227df828598SMugunthan V N { 3228df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3229df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3230606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3231df828598SMugunthan V N 3232606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3233618073e3SMugunthan V N int i; 3234618073e3SMugunthan V N 3235606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3236606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3237606f3993SIvan Khoronzhuk cpsw_ndo_stop(cpsw->slaves[i].ndev); 3238618073e3SMugunthan V N } 3239618073e3SMugunthan V N } else { 3240df828598SMugunthan V N if (netif_running(ndev)) 3241df828598SMugunthan V N cpsw_ndo_stop(ndev); 3242618073e3SMugunthan V N } 32431e7a2e21SDaniel Mack 3244739683b4SMugunthan V N /* Select sleep pin state */ 324556e31bd8SIvan Khoronzhuk pinctrl_pm_select_sleep_state(dev); 3246739683b4SMugunthan V N 3247df828598SMugunthan V N return 0; 3248df828598SMugunthan V N } 3249df828598SMugunthan V N 3250df828598SMugunthan V N static int cpsw_resume(struct device *dev) 3251df828598SMugunthan V N { 3252df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3253df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3254a60ced99SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3255df828598SMugunthan V N 3256739683b4SMugunthan V N /* Select default pin state */ 325756e31bd8SIvan Khoronzhuk pinctrl_pm_select_default_state(dev); 3258739683b4SMugunthan V N 32594ccfd638SGrygorii Strashko /* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */ 32604ccfd638SGrygorii Strashko rtnl_lock(); 3261606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3262618073e3SMugunthan V N int i; 3263618073e3SMugunthan V N 3264606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3265606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3266606f3993SIvan Khoronzhuk cpsw_ndo_open(cpsw->slaves[i].ndev); 3267618073e3SMugunthan V N } 3268618073e3SMugunthan V N } else { 3269df828598SMugunthan V N if (netif_running(ndev)) 3270df828598SMugunthan V N cpsw_ndo_open(ndev); 3271618073e3SMugunthan V N } 32724ccfd638SGrygorii Strashko rtnl_unlock(); 32734ccfd638SGrygorii Strashko 3274df828598SMugunthan V N return 0; 3275df828598SMugunthan V N } 32768963a504SGrygorii Strashko #endif 3277df828598SMugunthan V N 32788963a504SGrygorii Strashko static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume); 3279df828598SMugunthan V N 3280df828598SMugunthan V N static struct platform_driver cpsw_driver = { 3281df828598SMugunthan V N .driver = { 3282df828598SMugunthan V N .name = "cpsw", 3283df828598SMugunthan V N .pm = &cpsw_pm_ops, 32841e5c76d4SSachin Kamat .of_match_table = cpsw_of_mtable, 3285df828598SMugunthan V N }, 3286df828598SMugunthan V N .probe = cpsw_probe, 3287663e12e6SBill Pemberton .remove = cpsw_remove, 3288df828598SMugunthan V N }; 3289df828598SMugunthan V N 32906fb3b6b5SGrygorii Strashko module_platform_driver(cpsw_driver); 3291df828598SMugunthan V N 3292df828598SMugunthan V N MODULE_LICENSE("GPL"); 3293df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 3294df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 3295df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 3296