1df828598SMugunthan V N /* 2df828598SMugunthan V N * Texas Instruments Ethernet Switch Driver 3df828598SMugunthan V N * 4df828598SMugunthan V N * Copyright (C) 2012 Texas Instruments 5df828598SMugunthan V N * 6df828598SMugunthan V N * This program is free software; you can redistribute it and/or 7df828598SMugunthan V N * modify it under the terms of the GNU General Public License as 8df828598SMugunthan V N * published by the Free Software Foundation version 2. 9df828598SMugunthan V N * 10df828598SMugunthan V N * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11df828598SMugunthan V N * kind, whether express or implied; without even the implied warranty 12df828598SMugunthan V N * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13df828598SMugunthan V N * GNU General Public License for more details. 14df828598SMugunthan V N */ 15df828598SMugunthan V N 16df828598SMugunthan V N #include <linux/kernel.h> 17df828598SMugunthan V N #include <linux/io.h> 18df828598SMugunthan V N #include <linux/clk.h> 19df828598SMugunthan V N #include <linux/timer.h> 20df828598SMugunthan V N #include <linux/module.h> 21df828598SMugunthan V N #include <linux/platform_device.h> 22df828598SMugunthan V N #include <linux/irqreturn.h> 23df828598SMugunthan V N #include <linux/interrupt.h> 24df828598SMugunthan V N #include <linux/if_ether.h> 25df828598SMugunthan V N #include <linux/etherdevice.h> 26df828598SMugunthan V N #include <linux/netdevice.h> 272e5b38abSRichard Cochran #include <linux/net_tstamp.h> 28df828598SMugunthan V N #include <linux/phy.h> 29df828598SMugunthan V N #include <linux/workqueue.h> 30df828598SMugunthan V N #include <linux/delay.h> 31f150bd7fSMugunthan V N #include <linux/pm_runtime.h> 322eb32b0aSMugunthan V N #include <linux/of.h> 332eb32b0aSMugunthan V N #include <linux/of_net.h> 342eb32b0aSMugunthan V N #include <linux/of_device.h> 353b72c2feSMugunthan V N #include <linux/if_vlan.h> 36df828598SMugunthan V N 37df828598SMugunthan V N #include <linux/platform_data/cpsw.h> 38df828598SMugunthan V N 39df828598SMugunthan V N #include "cpsw_ale.h" 402e5b38abSRichard Cochran #include "cpts.h" 41df828598SMugunthan V N #include "davinci_cpdma.h" 42df828598SMugunthan V N 43df828598SMugunthan V N #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 44df828598SMugunthan V N NETIF_MSG_DRV | NETIF_MSG_LINK | \ 45df828598SMugunthan V N NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 46df828598SMugunthan V N NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 47df828598SMugunthan V N NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 48df828598SMugunthan V N NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 49df828598SMugunthan V N NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 50df828598SMugunthan V N NETIF_MSG_RX_STATUS) 51df828598SMugunthan V N 52df828598SMugunthan V N #define cpsw_info(priv, type, format, ...) \ 53df828598SMugunthan V N do { \ 54df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 55df828598SMugunthan V N dev_info(priv->dev, format, ## __VA_ARGS__); \ 56df828598SMugunthan V N } while (0) 57df828598SMugunthan V N 58df828598SMugunthan V N #define cpsw_err(priv, type, format, ...) \ 59df828598SMugunthan V N do { \ 60df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 61df828598SMugunthan V N dev_err(priv->dev, format, ## __VA_ARGS__); \ 62df828598SMugunthan V N } while (0) 63df828598SMugunthan V N 64df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...) \ 65df828598SMugunthan V N do { \ 66df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 67df828598SMugunthan V N dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 68df828598SMugunthan V N } while (0) 69df828598SMugunthan V N 70df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...) \ 71df828598SMugunthan V N do { \ 72df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 73df828598SMugunthan V N dev_notice(priv->dev, format, ## __VA_ARGS__); \ 74df828598SMugunthan V N } while (0) 75df828598SMugunthan V N 765c50a856SMugunthan V N #define ALE_ALL_PORTS 0x7 775c50a856SMugunthan V N 78df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 79df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 80df828598SMugunthan V N #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 81df828598SMugunthan V N 82e90cfac6SRichard Cochran #define CPSW_VERSION_1 0x19010a 83e90cfac6SRichard Cochran #define CPSW_VERSION_2 0x19010c 84549985eeSRichard Cochran 85549985eeSRichard Cochran #define HOST_PORT_NUM 0 86549985eeSRichard Cochran #define SLIVER_SIZE 0x40 87549985eeSRichard Cochran 88549985eeSRichard Cochran #define CPSW1_HOST_PORT_OFFSET 0x028 89549985eeSRichard Cochran #define CPSW1_SLAVE_OFFSET 0x050 90549985eeSRichard Cochran #define CPSW1_SLAVE_SIZE 0x040 91549985eeSRichard Cochran #define CPSW1_CPDMA_OFFSET 0x100 92549985eeSRichard Cochran #define CPSW1_STATERAM_OFFSET 0x200 93549985eeSRichard Cochran #define CPSW1_CPTS_OFFSET 0x500 94549985eeSRichard Cochran #define CPSW1_ALE_OFFSET 0x600 95549985eeSRichard Cochran #define CPSW1_SLIVER_OFFSET 0x700 96549985eeSRichard Cochran 97549985eeSRichard Cochran #define CPSW2_HOST_PORT_OFFSET 0x108 98549985eeSRichard Cochran #define CPSW2_SLAVE_OFFSET 0x200 99549985eeSRichard Cochran #define CPSW2_SLAVE_SIZE 0x100 100549985eeSRichard Cochran #define CPSW2_CPDMA_OFFSET 0x800 101549985eeSRichard Cochran #define CPSW2_STATERAM_OFFSET 0xa00 102549985eeSRichard Cochran #define CPSW2_CPTS_OFFSET 0xc00 103549985eeSRichard Cochran #define CPSW2_ALE_OFFSET 0xd00 104549985eeSRichard Cochran #define CPSW2_SLIVER_OFFSET 0xd80 105549985eeSRichard Cochran #define CPSW2_BD_OFFSET 0x2000 106549985eeSRichard Cochran 107df828598SMugunthan V N #define CPDMA_RXTHRESH 0x0c0 108df828598SMugunthan V N #define CPDMA_RXFREE 0x0e0 109df828598SMugunthan V N #define CPDMA_TXHDP 0x00 110df828598SMugunthan V N #define CPDMA_RXHDP 0x20 111df828598SMugunthan V N #define CPDMA_TXCP 0x40 112df828598SMugunthan V N #define CPDMA_RXCP 0x60 113df828598SMugunthan V N 114df828598SMugunthan V N #define CPSW_POLL_WEIGHT 64 115df828598SMugunthan V N #define CPSW_MIN_PACKET_SIZE 60 116df828598SMugunthan V N #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4) 117df828598SMugunthan V N 118df828598SMugunthan V N #define RX_PRIORITY_MAPPING 0x76543210 119df828598SMugunthan V N #define TX_PRIORITY_MAPPING 0x33221100 120df828598SMugunthan V N #define CPDMA_TX_PRIORITY_MAP 0x76543210 121df828598SMugunthan V N 1223b72c2feSMugunthan V N #define CPSW_VLAN_AWARE BIT(1) 1233b72c2feSMugunthan V N #define CPSW_ALE_VLAN_AWARE 1 1243b72c2feSMugunthan V N 125d9ba8f9eSMugunthan V N #define CPSW_FIFO_NORMAL_MODE (0 << 15) 126d9ba8f9eSMugunthan V N #define CPSW_FIFO_DUAL_MAC_MODE (1 << 15) 127d9ba8f9eSMugunthan V N #define CPSW_FIFO_RATE_LIMIT_MODE (2 << 15) 128d9ba8f9eSMugunthan V N 129df828598SMugunthan V N #define cpsw_enable_irq(priv) \ 130df828598SMugunthan V N do { \ 131df828598SMugunthan V N u32 i; \ 132df828598SMugunthan V N for (i = 0; i < priv->num_irqs; i++) \ 133df828598SMugunthan V N enable_irq(priv->irqs_table[i]); \ 134df828598SMugunthan V N } while (0); 135df828598SMugunthan V N #define cpsw_disable_irq(priv) \ 136df828598SMugunthan V N do { \ 137df828598SMugunthan V N u32 i; \ 138df828598SMugunthan V N for (i = 0; i < priv->num_irqs; i++) \ 139df828598SMugunthan V N disable_irq_nosync(priv->irqs_table[i]); \ 140df828598SMugunthan V N } while (0); 141df828598SMugunthan V N 142df828598SMugunthan V N static int debug_level; 143df828598SMugunthan V N module_param(debug_level, int, 0); 144df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 145df828598SMugunthan V N 146df828598SMugunthan V N static int ale_ageout = 10; 147df828598SMugunthan V N module_param(ale_ageout, int, 0); 148df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 149df828598SMugunthan V N 150df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 151df828598SMugunthan V N module_param(rx_packet_max, int, 0); 152df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 153df828598SMugunthan V N 154996a5c27SRichard Cochran struct cpsw_wr_regs { 155df828598SMugunthan V N u32 id_ver; 156df828598SMugunthan V N u32 soft_reset; 157df828598SMugunthan V N u32 control; 158df828598SMugunthan V N u32 int_control; 159df828598SMugunthan V N u32 rx_thresh_en; 160df828598SMugunthan V N u32 rx_en; 161df828598SMugunthan V N u32 tx_en; 162df828598SMugunthan V N u32 misc_en; 163df828598SMugunthan V N }; 164df828598SMugunthan V N 165996a5c27SRichard Cochran struct cpsw_ss_regs { 166df828598SMugunthan V N u32 id_ver; 167df828598SMugunthan V N u32 control; 168df828598SMugunthan V N u32 soft_reset; 169df828598SMugunthan V N u32 stat_port_en; 170df828598SMugunthan V N u32 ptype; 171bd357af2SRichard Cochran u32 soft_idle; 172bd357af2SRichard Cochran u32 thru_rate; 173bd357af2SRichard Cochran u32 gap_thresh; 174bd357af2SRichard Cochran u32 tx_start_wds; 175bd357af2SRichard Cochran u32 flow_control; 176bd357af2SRichard Cochran u32 vlan_ltype; 177bd357af2SRichard Cochran u32 ts_ltype; 178bd357af2SRichard Cochran u32 dlr_ltype; 179df828598SMugunthan V N }; 180df828598SMugunthan V N 1819750a3adSRichard Cochran /* CPSW_PORT_V1 */ 1829750a3adSRichard Cochran #define CPSW1_MAX_BLKS 0x00 /* Maximum FIFO Blocks */ 1839750a3adSRichard Cochran #define CPSW1_BLK_CNT 0x04 /* FIFO Block Usage Count (Read Only) */ 1849750a3adSRichard Cochran #define CPSW1_TX_IN_CTL 0x08 /* Transmit FIFO Control */ 1859750a3adSRichard Cochran #define CPSW1_PORT_VLAN 0x0c /* VLAN Register */ 1869750a3adSRichard Cochran #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 1879750a3adSRichard Cochran #define CPSW1_TS_CTL 0x14 /* Time Sync Control */ 1889750a3adSRichard Cochran #define CPSW1_TS_SEQ_LTYPE 0x18 /* Time Sync Sequence ID Offset and Msg Type */ 1899750a3adSRichard Cochran #define CPSW1_TS_VLAN 0x1c /* Time Sync VLAN1 and VLAN2 */ 1909750a3adSRichard Cochran 1919750a3adSRichard Cochran /* CPSW_PORT_V2 */ 1929750a3adSRichard Cochran #define CPSW2_CONTROL 0x00 /* Control Register */ 1939750a3adSRichard Cochran #define CPSW2_MAX_BLKS 0x08 /* Maximum FIFO Blocks */ 1949750a3adSRichard Cochran #define CPSW2_BLK_CNT 0x0c /* FIFO Block Usage Count (Read Only) */ 1959750a3adSRichard Cochran #define CPSW2_TX_IN_CTL 0x10 /* Transmit FIFO Control */ 1969750a3adSRichard Cochran #define CPSW2_PORT_VLAN 0x14 /* VLAN Register */ 1979750a3adSRichard Cochran #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 1989750a3adSRichard Cochran #define CPSW2_TS_SEQ_MTYPE 0x1c /* Time Sync Sequence ID Offset and Msg Type */ 1999750a3adSRichard Cochran 2009750a3adSRichard Cochran /* CPSW_PORT_V1 and V2 */ 2019750a3adSRichard Cochran #define SA_LO 0x20 /* CPGMAC_SL Source Address Low */ 2029750a3adSRichard Cochran #define SA_HI 0x24 /* CPGMAC_SL Source Address High */ 2039750a3adSRichard Cochran #define SEND_PERCENT 0x28 /* Transmit Queue Send Percentages */ 2049750a3adSRichard Cochran 2059750a3adSRichard Cochran /* CPSW_PORT_V2 only */ 2069750a3adSRichard Cochran #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */ 2079750a3adSRichard Cochran #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */ 2089750a3adSRichard Cochran #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */ 2099750a3adSRichard Cochran #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */ 2109750a3adSRichard Cochran #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */ 2119750a3adSRichard Cochran #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */ 2129750a3adSRichard Cochran #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */ 2139750a3adSRichard Cochran #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */ 2149750a3adSRichard Cochran 2159750a3adSRichard Cochran /* Bit definitions for the CPSW2_CONTROL register */ 2169750a3adSRichard Cochran #define PASS_PRI_TAGGED (1<<24) /* Pass Priority Tagged */ 2179750a3adSRichard Cochran #define VLAN_LTYPE2_EN (1<<21) /* VLAN LTYPE 2 enable */ 2189750a3adSRichard Cochran #define VLAN_LTYPE1_EN (1<<20) /* VLAN LTYPE 1 enable */ 2199750a3adSRichard Cochran #define DSCP_PRI_EN (1<<16) /* DSCP Priority Enable */ 2209750a3adSRichard Cochran #define TS_320 (1<<14) /* Time Sync Dest Port 320 enable */ 2219750a3adSRichard Cochran #define TS_319 (1<<13) /* Time Sync Dest Port 319 enable */ 2229750a3adSRichard Cochran #define TS_132 (1<<12) /* Time Sync Dest IP Addr 132 enable */ 2239750a3adSRichard Cochran #define TS_131 (1<<11) /* Time Sync Dest IP Addr 131 enable */ 2249750a3adSRichard Cochran #define TS_130 (1<<10) /* Time Sync Dest IP Addr 130 enable */ 2259750a3adSRichard Cochran #define TS_129 (1<<9) /* Time Sync Dest IP Addr 129 enable */ 2269750a3adSRichard Cochran #define TS_BIT8 (1<<8) /* ts_ttl_nonzero? */ 2279750a3adSRichard Cochran #define TS_ANNEX_D_EN (1<<4) /* Time Sync Annex D enable */ 2289750a3adSRichard Cochran #define TS_LTYPE2_EN (1<<3) /* Time Sync LTYPE 2 enable */ 2299750a3adSRichard Cochran #define TS_LTYPE1_EN (1<<2) /* Time Sync LTYPE 1 enable */ 2309750a3adSRichard Cochran #define TS_TX_EN (1<<1) /* Time Sync Transmit Enable */ 2319750a3adSRichard Cochran #define TS_RX_EN (1<<0) /* Time Sync Receive Enable */ 2329750a3adSRichard Cochran 2339750a3adSRichard Cochran #define CTRL_TS_BITS \ 2349750a3adSRichard Cochran (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 | TS_BIT8 | \ 2359750a3adSRichard Cochran TS_ANNEX_D_EN | TS_LTYPE1_EN) 2369750a3adSRichard Cochran 2379750a3adSRichard Cochran #define CTRL_ALL_TS_MASK (CTRL_TS_BITS | TS_TX_EN | TS_RX_EN) 2389750a3adSRichard Cochran #define CTRL_TX_TS_BITS (CTRL_TS_BITS | TS_TX_EN) 2399750a3adSRichard Cochran #define CTRL_RX_TS_BITS (CTRL_TS_BITS | TS_RX_EN) 2409750a3adSRichard Cochran 2419750a3adSRichard Cochran /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */ 2429750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_SHIFT (16) /* Time Sync Sequence ID Offset */ 2439750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_MASK (0x3f) 2449750a3adSRichard Cochran #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */ 2459750a3adSRichard Cochran #define TS_MSG_TYPE_EN_MASK (0xffff) 2469750a3adSRichard Cochran 2479750a3adSRichard Cochran /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 2489750a3adSRichard Cochran #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3)) 249df828598SMugunthan V N 2502e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_CTL register */ 2512e5b38abSRichard Cochran #define CPSW_V1_TS_RX_EN BIT(0) 2522e5b38abSRichard Cochran #define CPSW_V1_TS_TX_EN BIT(4) 2532e5b38abSRichard Cochran #define CPSW_V1_MSG_TYPE_OFS 16 2542e5b38abSRichard Cochran 2552e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */ 2562e5b38abSRichard Cochran #define CPSW_V1_SEQ_ID_OFS_SHIFT 16 2572e5b38abSRichard Cochran 258df828598SMugunthan V N struct cpsw_host_regs { 259df828598SMugunthan V N u32 max_blks; 260df828598SMugunthan V N u32 blk_cnt; 261d9ba8f9eSMugunthan V N u32 tx_in_ctl; 262df828598SMugunthan V N u32 port_vlan; 263df828598SMugunthan V N u32 tx_pri_map; 264df828598SMugunthan V N u32 cpdma_tx_pri_map; 265df828598SMugunthan V N u32 cpdma_rx_chan_map; 266df828598SMugunthan V N }; 267df828598SMugunthan V N 268df828598SMugunthan V N struct cpsw_sliver_regs { 269df828598SMugunthan V N u32 id_ver; 270df828598SMugunthan V N u32 mac_control; 271df828598SMugunthan V N u32 mac_status; 272df828598SMugunthan V N u32 soft_reset; 273df828598SMugunthan V N u32 rx_maxlen; 274df828598SMugunthan V N u32 __reserved_0; 275df828598SMugunthan V N u32 rx_pause; 276df828598SMugunthan V N u32 tx_pause; 277df828598SMugunthan V N u32 __reserved_1; 278df828598SMugunthan V N u32 rx_pri_map; 279df828598SMugunthan V N }; 280df828598SMugunthan V N 281df828598SMugunthan V N struct cpsw_slave { 2829750a3adSRichard Cochran void __iomem *regs; 283df828598SMugunthan V N struct cpsw_sliver_regs __iomem *sliver; 284df828598SMugunthan V N int slave_num; 285df828598SMugunthan V N u32 mac_control; 286df828598SMugunthan V N struct cpsw_slave_data *data; 287df828598SMugunthan V N struct phy_device *phy; 288d9ba8f9eSMugunthan V N struct net_device *ndev; 289d9ba8f9eSMugunthan V N u32 port_vlan; 290d9ba8f9eSMugunthan V N u32 open_stat; 291df828598SMugunthan V N }; 292df828598SMugunthan V N 2939750a3adSRichard Cochran static inline u32 slave_read(struct cpsw_slave *slave, u32 offset) 2949750a3adSRichard Cochran { 2959750a3adSRichard Cochran return __raw_readl(slave->regs + offset); 2969750a3adSRichard Cochran } 2979750a3adSRichard Cochran 2989750a3adSRichard Cochran static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset) 2999750a3adSRichard Cochran { 3009750a3adSRichard Cochran __raw_writel(val, slave->regs + offset); 3019750a3adSRichard Cochran } 3029750a3adSRichard Cochran 303df828598SMugunthan V N struct cpsw_priv { 304df828598SMugunthan V N spinlock_t lock; 305df828598SMugunthan V N struct platform_device *pdev; 306df828598SMugunthan V N struct net_device *ndev; 307df828598SMugunthan V N struct resource *cpsw_res; 308a65dd5b2SRichard Cochran struct resource *cpsw_wr_res; 309df828598SMugunthan V N struct napi_struct napi; 310df828598SMugunthan V N struct device *dev; 311df828598SMugunthan V N struct cpsw_platform_data data; 312996a5c27SRichard Cochran struct cpsw_ss_regs __iomem *regs; 313996a5c27SRichard Cochran struct cpsw_wr_regs __iomem *wr_regs; 314df828598SMugunthan V N struct cpsw_host_regs __iomem *host_port_regs; 315df828598SMugunthan V N u32 msg_enable; 316e90cfac6SRichard Cochran u32 version; 317df828598SMugunthan V N struct net_device_stats stats; 318df828598SMugunthan V N int rx_packet_max; 319df828598SMugunthan V N int host_port; 320df828598SMugunthan V N struct clk *clk; 321df828598SMugunthan V N u8 mac_addr[ETH_ALEN]; 322df828598SMugunthan V N struct cpsw_slave *slaves; 323df828598SMugunthan V N struct cpdma_ctlr *dma; 324df828598SMugunthan V N struct cpdma_chan *txch, *rxch; 325df828598SMugunthan V N struct cpsw_ale *ale; 326df828598SMugunthan V N /* snapshot of IRQ numbers */ 327df828598SMugunthan V N u32 irqs_table[4]; 328df828598SMugunthan V N u32 num_irqs; 3299232b16dSMugunthan V N struct cpts *cpts; 330d9ba8f9eSMugunthan V N u32 emac_port; 331df828598SMugunthan V N }; 332df828598SMugunthan V N 333df828598SMugunthan V N #define napi_to_priv(napi) container_of(napi, struct cpsw_priv, napi) 334df828598SMugunthan V N #define for_each_slave(priv, func, arg...) \ 335df828598SMugunthan V N do { \ 336df828598SMugunthan V N int idx; \ 337d9ba8f9eSMugunthan V N if (priv->data.dual_emac) \ 338d9ba8f9eSMugunthan V N (func)((priv)->slaves + priv->emac_port, ##arg);\ 339d9ba8f9eSMugunthan V N else \ 340df828598SMugunthan V N for (idx = 0; idx < (priv)->data.slaves; idx++) \ 341df828598SMugunthan V N (func)((priv)->slaves + idx, ##arg); \ 342df828598SMugunthan V N } while (0) 343d9ba8f9eSMugunthan V N #define cpsw_get_slave_ndev(priv, __slave_no__) \ 344d9ba8f9eSMugunthan V N (priv->slaves[__slave_no__].ndev) 345d9ba8f9eSMugunthan V N #define cpsw_get_slave_priv(priv, __slave_no__) \ 346d9ba8f9eSMugunthan V N ((priv->slaves[__slave_no__].ndev) ? \ 347d9ba8f9eSMugunthan V N netdev_priv(priv->slaves[__slave_no__].ndev) : NULL) \ 348d9ba8f9eSMugunthan V N 349d9ba8f9eSMugunthan V N #define cpsw_dual_emac_src_port_detect(status, priv, ndev, skb) \ 350d9ba8f9eSMugunthan V N do { \ 351d9ba8f9eSMugunthan V N if (!priv->data.dual_emac) \ 352d9ba8f9eSMugunthan V N break; \ 353d9ba8f9eSMugunthan V N if (CPDMA_RX_SOURCE_PORT(status) == 1) { \ 354d9ba8f9eSMugunthan V N ndev = cpsw_get_slave_ndev(priv, 0); \ 355d9ba8f9eSMugunthan V N priv = netdev_priv(ndev); \ 356d9ba8f9eSMugunthan V N skb->dev = ndev; \ 357d9ba8f9eSMugunthan V N } else if (CPDMA_RX_SOURCE_PORT(status) == 2) { \ 358d9ba8f9eSMugunthan V N ndev = cpsw_get_slave_ndev(priv, 1); \ 359d9ba8f9eSMugunthan V N priv = netdev_priv(ndev); \ 360d9ba8f9eSMugunthan V N skb->dev = ndev; \ 361d9ba8f9eSMugunthan V N } \ 362d9ba8f9eSMugunthan V N } while (0) 363d9ba8f9eSMugunthan V N #define cpsw_add_mcast(priv, addr) \ 364d9ba8f9eSMugunthan V N do { \ 365d9ba8f9eSMugunthan V N if (priv->data.dual_emac) { \ 366d9ba8f9eSMugunthan V N struct cpsw_slave *slave = priv->slaves + \ 367d9ba8f9eSMugunthan V N priv->emac_port; \ 368d9ba8f9eSMugunthan V N int slave_port = cpsw_get_slave_port(priv, \ 369d9ba8f9eSMugunthan V N slave->slave_num); \ 370d9ba8f9eSMugunthan V N cpsw_ale_add_mcast(priv->ale, addr, \ 371d9ba8f9eSMugunthan V N 1 << slave_port | 1 << priv->host_port, \ 372d9ba8f9eSMugunthan V N ALE_VLAN, slave->port_vlan, 0); \ 373d9ba8f9eSMugunthan V N } else { \ 374d9ba8f9eSMugunthan V N cpsw_ale_add_mcast(priv->ale, addr, \ 375d9ba8f9eSMugunthan V N ALE_ALL_PORTS << priv->host_port, \ 376d9ba8f9eSMugunthan V N 0, 0, 0); \ 377d9ba8f9eSMugunthan V N } \ 378d9ba8f9eSMugunthan V N } while (0) 379d9ba8f9eSMugunthan V N 380d9ba8f9eSMugunthan V N static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num) 381d9ba8f9eSMugunthan V N { 382d9ba8f9eSMugunthan V N if (priv->host_port == 0) 383d9ba8f9eSMugunthan V N return slave_num + 1; 384d9ba8f9eSMugunthan V N else 385d9ba8f9eSMugunthan V N return slave_num; 386d9ba8f9eSMugunthan V N } 387df828598SMugunthan V N 3885c50a856SMugunthan V N static void cpsw_ndo_set_rx_mode(struct net_device *ndev) 3895c50a856SMugunthan V N { 3905c50a856SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 3915c50a856SMugunthan V N 3925c50a856SMugunthan V N if (ndev->flags & IFF_PROMISC) { 3935c50a856SMugunthan V N /* Enable promiscuous mode */ 3945c50a856SMugunthan V N dev_err(priv->dev, "Ignoring Promiscuous mode\n"); 3955c50a856SMugunthan V N return; 3965c50a856SMugunthan V N } 3975c50a856SMugunthan V N 3985c50a856SMugunthan V N /* Clear all mcast from ALE */ 3995c50a856SMugunthan V N cpsw_ale_flush_multicast(priv->ale, ALE_ALL_PORTS << priv->host_port); 4005c50a856SMugunthan V N 4015c50a856SMugunthan V N if (!netdev_mc_empty(ndev)) { 4025c50a856SMugunthan V N struct netdev_hw_addr *ha; 4035c50a856SMugunthan V N 4045c50a856SMugunthan V N /* program multicast address list into ALE register */ 4055c50a856SMugunthan V N netdev_for_each_mc_addr(ha, ndev) { 406d9ba8f9eSMugunthan V N cpsw_add_mcast(priv, (u8 *)ha->addr); 4075c50a856SMugunthan V N } 4085c50a856SMugunthan V N } 4095c50a856SMugunthan V N } 4105c50a856SMugunthan V N 411df828598SMugunthan V N static void cpsw_intr_enable(struct cpsw_priv *priv) 412df828598SMugunthan V N { 413996a5c27SRichard Cochran __raw_writel(0xFF, &priv->wr_regs->tx_en); 414996a5c27SRichard Cochran __raw_writel(0xFF, &priv->wr_regs->rx_en); 415df828598SMugunthan V N 416df828598SMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, true); 417df828598SMugunthan V N return; 418df828598SMugunthan V N } 419df828598SMugunthan V N 420df828598SMugunthan V N static void cpsw_intr_disable(struct cpsw_priv *priv) 421df828598SMugunthan V N { 422996a5c27SRichard Cochran __raw_writel(0, &priv->wr_regs->tx_en); 423996a5c27SRichard Cochran __raw_writel(0, &priv->wr_regs->rx_en); 424df828598SMugunthan V N 425df828598SMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, false); 426df828598SMugunthan V N return; 427df828598SMugunthan V N } 428df828598SMugunthan V N 429df828598SMugunthan V N void cpsw_tx_handler(void *token, int len, int status) 430df828598SMugunthan V N { 431df828598SMugunthan V N struct sk_buff *skb = token; 432df828598SMugunthan V N struct net_device *ndev = skb->dev; 433df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 434df828598SMugunthan V N 435fae50823SMugunthan V N /* Check whether the queue is stopped due to stalled tx dma, if the 436fae50823SMugunthan V N * queue is stopped then start the queue as we have free desc for tx 437fae50823SMugunthan V N */ 438df828598SMugunthan V N if (unlikely(netif_queue_stopped(ndev))) 439df828598SMugunthan V N netif_start_queue(ndev); 4409232b16dSMugunthan V N cpts_tx_timestamp(priv->cpts, skb); 441df828598SMugunthan V N priv->stats.tx_packets++; 442df828598SMugunthan V N priv->stats.tx_bytes += len; 443df828598SMugunthan V N dev_kfree_skb_any(skb); 444df828598SMugunthan V N } 445df828598SMugunthan V N 446df828598SMugunthan V N void cpsw_rx_handler(void *token, int len, int status) 447df828598SMugunthan V N { 448df828598SMugunthan V N struct sk_buff *skb = token; 449df828598SMugunthan V N struct net_device *ndev = skb->dev; 450df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 451df828598SMugunthan V N int ret = 0; 452df828598SMugunthan V N 453d9ba8f9eSMugunthan V N cpsw_dual_emac_src_port_detect(status, priv, ndev, skb); 454d9ba8f9eSMugunthan V N 455df828598SMugunthan V N /* free and bail if we are shutting down */ 456df828598SMugunthan V N if (unlikely(!netif_running(ndev)) || 457df828598SMugunthan V N unlikely(!netif_carrier_ok(ndev))) { 458df828598SMugunthan V N dev_kfree_skb_any(skb); 459df828598SMugunthan V N return; 460df828598SMugunthan V N } 461df828598SMugunthan V N if (likely(status >= 0)) { 462df828598SMugunthan V N skb_put(skb, len); 4639232b16dSMugunthan V N cpts_rx_timestamp(priv->cpts, skb); 464df828598SMugunthan V N skb->protocol = eth_type_trans(skb, ndev); 465df828598SMugunthan V N netif_receive_skb(skb); 466df828598SMugunthan V N priv->stats.rx_bytes += len; 467df828598SMugunthan V N priv->stats.rx_packets++; 468df828598SMugunthan V N skb = NULL; 469df828598SMugunthan V N } 470df828598SMugunthan V N 471df828598SMugunthan V N if (unlikely(!netif_running(ndev))) { 472df828598SMugunthan V N if (skb) 473df828598SMugunthan V N dev_kfree_skb_any(skb); 474df828598SMugunthan V N return; 475df828598SMugunthan V N } 476df828598SMugunthan V N 477df828598SMugunthan V N if (likely(!skb)) { 478df828598SMugunthan V N skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max); 479df828598SMugunthan V N if (WARN_ON(!skb)) 480df828598SMugunthan V N return; 481df828598SMugunthan V N 482df828598SMugunthan V N ret = cpdma_chan_submit(priv->rxch, skb, skb->data, 483f6e135c8SMugunthan V N skb_tailroom(skb), 0, GFP_KERNEL); 484df828598SMugunthan V N } 485df828598SMugunthan V N WARN_ON(ret < 0); 486df828598SMugunthan V N } 487df828598SMugunthan V N 488df828598SMugunthan V N static irqreturn_t cpsw_interrupt(int irq, void *dev_id) 489df828598SMugunthan V N { 490df828598SMugunthan V N struct cpsw_priv *priv = dev_id; 491df828598SMugunthan V N 492df828598SMugunthan V N if (likely(netif_running(priv->ndev))) { 493df828598SMugunthan V N cpsw_intr_disable(priv); 494df828598SMugunthan V N cpsw_disable_irq(priv); 495df828598SMugunthan V N napi_schedule(&priv->napi); 496d9ba8f9eSMugunthan V N } else { 497d9ba8f9eSMugunthan V N priv = cpsw_get_slave_priv(priv, 1); 498d9ba8f9eSMugunthan V N if (likely(priv) && likely(netif_running(priv->ndev))) { 499d9ba8f9eSMugunthan V N cpsw_intr_disable(priv); 500d9ba8f9eSMugunthan V N cpsw_disable_irq(priv); 501d9ba8f9eSMugunthan V N napi_schedule(&priv->napi); 502d9ba8f9eSMugunthan V N } 503df828598SMugunthan V N } 504df828598SMugunthan V N return IRQ_HANDLED; 505df828598SMugunthan V N } 506df828598SMugunthan V N 507df828598SMugunthan V N static int cpsw_poll(struct napi_struct *napi, int budget) 508df828598SMugunthan V N { 509df828598SMugunthan V N struct cpsw_priv *priv = napi_to_priv(napi); 510df828598SMugunthan V N int num_tx, num_rx; 511df828598SMugunthan V N 512df828598SMugunthan V N num_tx = cpdma_chan_process(priv->txch, 128); 513510a1e72SMugunthan V N if (num_tx) 514510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX); 515510a1e72SMugunthan V N 516df828598SMugunthan V N num_rx = cpdma_chan_process(priv->rxch, budget); 517510a1e72SMugunthan V N if (num_rx < budget) { 518510a1e72SMugunthan V N napi_complete(napi); 519510a1e72SMugunthan V N cpsw_intr_enable(priv); 520510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX); 521510a1e72SMugunthan V N cpsw_enable_irq(priv); 522510a1e72SMugunthan V N } 523df828598SMugunthan V N 524df828598SMugunthan V N if (num_rx || num_tx) 525df828598SMugunthan V N cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n", 526df828598SMugunthan V N num_rx, num_tx); 527df828598SMugunthan V N 528df828598SMugunthan V N return num_rx; 529df828598SMugunthan V N } 530df828598SMugunthan V N 531df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg) 532df828598SMugunthan V N { 533df828598SMugunthan V N unsigned long timeout = jiffies + HZ; 534df828598SMugunthan V N 535df828598SMugunthan V N __raw_writel(1, reg); 536df828598SMugunthan V N do { 537df828598SMugunthan V N cpu_relax(); 538df828598SMugunthan V N } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies)); 539df828598SMugunthan V N 540df828598SMugunthan V N WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module); 541df828598SMugunthan V N } 542df828598SMugunthan V N 543df828598SMugunthan V N #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ 544df828598SMugunthan V N ((mac)[2] << 16) | ((mac)[3] << 24)) 545df828598SMugunthan V N #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) 546df828598SMugunthan V N 547df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave, 548df828598SMugunthan V N struct cpsw_priv *priv) 549df828598SMugunthan V N { 5509750a3adSRichard Cochran slave_write(slave, mac_hi(priv->mac_addr), SA_HI); 5519750a3adSRichard Cochran slave_write(slave, mac_lo(priv->mac_addr), SA_LO); 552df828598SMugunthan V N } 553df828598SMugunthan V N 554df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave, 555df828598SMugunthan V N struct cpsw_priv *priv, bool *link) 556df828598SMugunthan V N { 557df828598SMugunthan V N struct phy_device *phy = slave->phy; 558df828598SMugunthan V N u32 mac_control = 0; 559df828598SMugunthan V N u32 slave_port; 560df828598SMugunthan V N 561df828598SMugunthan V N if (!phy) 562df828598SMugunthan V N return; 563df828598SMugunthan V N 564df828598SMugunthan V N slave_port = cpsw_get_slave_port(priv, slave->slave_num); 565df828598SMugunthan V N 566df828598SMugunthan V N if (phy->link) { 567df828598SMugunthan V N mac_control = priv->data.mac_control; 568df828598SMugunthan V N 569df828598SMugunthan V N /* enable forwarding */ 570df828598SMugunthan V N cpsw_ale_control_set(priv->ale, slave_port, 571df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 572df828598SMugunthan V N 573df828598SMugunthan V N if (phy->speed == 1000) 574df828598SMugunthan V N mac_control |= BIT(7); /* GIGABITEN */ 575df828598SMugunthan V N if (phy->duplex) 576df828598SMugunthan V N mac_control |= BIT(0); /* FULLDUPLEXEN */ 577342b7b74SDaniel Mack 578342b7b74SDaniel Mack /* set speed_in input in case RMII mode is used in 100Mbps */ 579342b7b74SDaniel Mack if (phy->speed == 100) 580342b7b74SDaniel Mack mac_control |= BIT(15); 581342b7b74SDaniel Mack 582df828598SMugunthan V N *link = true; 583df828598SMugunthan V N } else { 584df828598SMugunthan V N mac_control = 0; 585df828598SMugunthan V N /* disable forwarding */ 586df828598SMugunthan V N cpsw_ale_control_set(priv->ale, slave_port, 587df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 588df828598SMugunthan V N } 589df828598SMugunthan V N 590df828598SMugunthan V N if (mac_control != slave->mac_control) { 591df828598SMugunthan V N phy_print_status(phy); 592df828598SMugunthan V N __raw_writel(mac_control, &slave->sliver->mac_control); 593df828598SMugunthan V N } 594df828598SMugunthan V N 595df828598SMugunthan V N slave->mac_control = mac_control; 596df828598SMugunthan V N } 597df828598SMugunthan V N 598df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev) 599df828598SMugunthan V N { 600df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 601df828598SMugunthan V N bool link = false; 602df828598SMugunthan V N 603df828598SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 604df828598SMugunthan V N 605df828598SMugunthan V N if (link) { 606df828598SMugunthan V N netif_carrier_on(ndev); 607df828598SMugunthan V N if (netif_running(ndev)) 608df828598SMugunthan V N netif_wake_queue(ndev); 609df828598SMugunthan V N } else { 610df828598SMugunthan V N netif_carrier_off(ndev); 611df828598SMugunthan V N netif_stop_queue(ndev); 612df828598SMugunthan V N } 613df828598SMugunthan V N } 614df828598SMugunthan V N 615df828598SMugunthan V N static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val) 616df828598SMugunthan V N { 617df828598SMugunthan V N static char *leader = "........................................"; 618df828598SMugunthan V N 619df828598SMugunthan V N if (!val) 620df828598SMugunthan V N return 0; 621df828598SMugunthan V N else 622df828598SMugunthan V N return snprintf(buf, maxlen, "%s %s %10d\n", name, 623df828598SMugunthan V N leader + strlen(name), val); 624df828598SMugunthan V N } 625df828598SMugunthan V N 626d9ba8f9eSMugunthan V N static int cpsw_common_res_usage_state(struct cpsw_priv *priv) 627d9ba8f9eSMugunthan V N { 628d9ba8f9eSMugunthan V N u32 i; 629d9ba8f9eSMugunthan V N u32 usage_count = 0; 630d9ba8f9eSMugunthan V N 631d9ba8f9eSMugunthan V N if (!priv->data.dual_emac) 632d9ba8f9eSMugunthan V N return 0; 633d9ba8f9eSMugunthan V N 634d9ba8f9eSMugunthan V N for (i = 0; i < priv->data.slaves; i++) 635d9ba8f9eSMugunthan V N if (priv->slaves[i].open_stat) 636d9ba8f9eSMugunthan V N usage_count++; 637d9ba8f9eSMugunthan V N 638d9ba8f9eSMugunthan V N return usage_count; 639d9ba8f9eSMugunthan V N } 640d9ba8f9eSMugunthan V N 641d9ba8f9eSMugunthan V N static inline int cpsw_tx_packet_submit(struct net_device *ndev, 642d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct sk_buff *skb) 643d9ba8f9eSMugunthan V N { 644d9ba8f9eSMugunthan V N if (!priv->data.dual_emac) 645d9ba8f9eSMugunthan V N return cpdma_chan_submit(priv->txch, skb, skb->data, 646d9ba8f9eSMugunthan V N skb->len, 0, GFP_KERNEL); 647d9ba8f9eSMugunthan V N 648d9ba8f9eSMugunthan V N if (ndev == cpsw_get_slave_ndev(priv, 0)) 649d9ba8f9eSMugunthan V N return cpdma_chan_submit(priv->txch, skb, skb->data, 650d9ba8f9eSMugunthan V N skb->len, 1, GFP_KERNEL); 651d9ba8f9eSMugunthan V N else 652d9ba8f9eSMugunthan V N return cpdma_chan_submit(priv->txch, skb, skb->data, 653d9ba8f9eSMugunthan V N skb->len, 2, GFP_KERNEL); 654d9ba8f9eSMugunthan V N } 655d9ba8f9eSMugunthan V N 656d9ba8f9eSMugunthan V N static inline void cpsw_add_dual_emac_def_ale_entries( 657d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct cpsw_slave *slave, 658d9ba8f9eSMugunthan V N u32 slave_port) 659d9ba8f9eSMugunthan V N { 660d9ba8f9eSMugunthan V N u32 port_mask = 1 << slave_port | 1 << priv->host_port; 661d9ba8f9eSMugunthan V N 662d9ba8f9eSMugunthan V N if (priv->version == CPSW_VERSION_1) 663d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN); 664d9ba8f9eSMugunthan V N else 665d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN); 666d9ba8f9eSMugunthan V N cpsw_ale_add_vlan(priv->ale, slave->port_vlan, port_mask, 667d9ba8f9eSMugunthan V N port_mask, port_mask, 0); 668d9ba8f9eSMugunthan V N cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 669d9ba8f9eSMugunthan V N port_mask, ALE_VLAN, slave->port_vlan, 0); 670d9ba8f9eSMugunthan V N cpsw_ale_add_ucast(priv->ale, priv->mac_addr, 671d9ba8f9eSMugunthan V N priv->host_port, ALE_VLAN, slave->port_vlan); 672d9ba8f9eSMugunthan V N } 673d9ba8f9eSMugunthan V N 674df828598SMugunthan V N static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 675df828598SMugunthan V N { 676df828598SMugunthan V N char name[32]; 677df828598SMugunthan V N u32 slave_port; 678df828598SMugunthan V N 679df828598SMugunthan V N sprintf(name, "slave-%d", slave->slave_num); 680df828598SMugunthan V N 681df828598SMugunthan V N soft_reset(name, &slave->sliver->soft_reset); 682df828598SMugunthan V N 683df828598SMugunthan V N /* setup priority mapping */ 684df828598SMugunthan V N __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 6859750a3adSRichard Cochran 6869750a3adSRichard Cochran switch (priv->version) { 6879750a3adSRichard Cochran case CPSW_VERSION_1: 6889750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP); 6899750a3adSRichard Cochran break; 6909750a3adSRichard Cochran case CPSW_VERSION_2: 6919750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP); 6929750a3adSRichard Cochran break; 6939750a3adSRichard Cochran } 694df828598SMugunthan V N 695df828598SMugunthan V N /* setup max packet size, and mac address */ 696df828598SMugunthan V N __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen); 697df828598SMugunthan V N cpsw_set_slave_mac(slave, priv); 698df828598SMugunthan V N 699df828598SMugunthan V N slave->mac_control = 0; /* no link yet */ 700df828598SMugunthan V N 701df828598SMugunthan V N slave_port = cpsw_get_slave_port(priv, slave->slave_num); 702df828598SMugunthan V N 703d9ba8f9eSMugunthan V N if (priv->data.dual_emac) 704d9ba8f9eSMugunthan V N cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port); 705d9ba8f9eSMugunthan V N else 706df828598SMugunthan V N cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 707e11b220fSMugunthan V N 1 << slave_port, 0, 0, ALE_MCAST_FWD_2); 708df828598SMugunthan V N 709df828598SMugunthan V N slave->phy = phy_connect(priv->ndev, slave->data->phy_id, 710f9a8f83bSFlorian Fainelli &cpsw_adjust_link, slave->data->phy_if); 711df828598SMugunthan V N if (IS_ERR(slave->phy)) { 712df828598SMugunthan V N dev_err(priv->dev, "phy %s not found on slave %d\n", 713df828598SMugunthan V N slave->data->phy_id, slave->slave_num); 714df828598SMugunthan V N slave->phy = NULL; 715df828598SMugunthan V N } else { 716df828598SMugunthan V N dev_info(priv->dev, "phy found : id is : 0x%x\n", 717df828598SMugunthan V N slave->phy->phy_id); 718df828598SMugunthan V N phy_start(slave->phy); 719df828598SMugunthan V N } 720df828598SMugunthan V N } 721df828598SMugunthan V N 7223b72c2feSMugunthan V N static inline void cpsw_add_default_vlan(struct cpsw_priv *priv) 7233b72c2feSMugunthan V N { 7243b72c2feSMugunthan V N const int vlan = priv->data.default_vlan; 7253b72c2feSMugunthan V N const int port = priv->host_port; 7263b72c2feSMugunthan V N u32 reg; 7273b72c2feSMugunthan V N int i; 7283b72c2feSMugunthan V N 7293b72c2feSMugunthan V N reg = (priv->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN : 7303b72c2feSMugunthan V N CPSW2_PORT_VLAN; 7313b72c2feSMugunthan V N 7323b72c2feSMugunthan V N writel(vlan, &priv->host_port_regs->port_vlan); 7333b72c2feSMugunthan V N 7343b72c2feSMugunthan V N for (i = 0; i < 2; i++) 7353b72c2feSMugunthan V N slave_write(priv->slaves + i, vlan, reg); 7363b72c2feSMugunthan V N 7373b72c2feSMugunthan V N cpsw_ale_add_vlan(priv->ale, vlan, ALE_ALL_PORTS << port, 7383b72c2feSMugunthan V N ALE_ALL_PORTS << port, ALE_ALL_PORTS << port, 7393b72c2feSMugunthan V N (ALE_PORT_1 | ALE_PORT_2) << port); 7403b72c2feSMugunthan V N } 7413b72c2feSMugunthan V N 742df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv) 743df828598SMugunthan V N { 7443b72c2feSMugunthan V N u32 control_reg; 745d9ba8f9eSMugunthan V N u32 fifo_mode; 7463b72c2feSMugunthan V N 747df828598SMugunthan V N /* soft reset the controller and initialize ale */ 748df828598SMugunthan V N soft_reset("cpsw", &priv->regs->soft_reset); 749df828598SMugunthan V N cpsw_ale_start(priv->ale); 750df828598SMugunthan V N 751df828598SMugunthan V N /* switch to vlan unaware mode */ 7523b72c2feSMugunthan V N cpsw_ale_control_set(priv->ale, priv->host_port, ALE_VLAN_AWARE, 7533b72c2feSMugunthan V N CPSW_ALE_VLAN_AWARE); 7543b72c2feSMugunthan V N control_reg = readl(&priv->regs->control); 7553b72c2feSMugunthan V N control_reg |= CPSW_VLAN_AWARE; 7563b72c2feSMugunthan V N writel(control_reg, &priv->regs->control); 757d9ba8f9eSMugunthan V N fifo_mode = (priv->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE : 758d9ba8f9eSMugunthan V N CPSW_FIFO_NORMAL_MODE; 759d9ba8f9eSMugunthan V N writel(fifo_mode, &priv->host_port_regs->tx_in_ctl); 760df828598SMugunthan V N 761df828598SMugunthan V N /* setup host port priority mapping */ 762df828598SMugunthan V N __raw_writel(CPDMA_TX_PRIORITY_MAP, 763df828598SMugunthan V N &priv->host_port_regs->cpdma_tx_pri_map); 764df828598SMugunthan V N __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map); 765df828598SMugunthan V N 766df828598SMugunthan V N cpsw_ale_control_set(priv->ale, priv->host_port, 767df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 768df828598SMugunthan V N 769d9ba8f9eSMugunthan V N if (!priv->data.dual_emac) { 770d9ba8f9eSMugunthan V N cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port, 771d9ba8f9eSMugunthan V N 0, 0); 772df828598SMugunthan V N cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 773e11b220fSMugunthan V N 1 << priv->host_port, 0, 0, ALE_MCAST_FWD_2); 774df828598SMugunthan V N } 775d9ba8f9eSMugunthan V N } 776df828598SMugunthan V N 777df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev) 778df828598SMugunthan V N { 779df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 780df828598SMugunthan V N int i, ret; 781df828598SMugunthan V N u32 reg; 782df828598SMugunthan V N 783d9ba8f9eSMugunthan V N if (!cpsw_common_res_usage_state(priv)) 784df828598SMugunthan V N cpsw_intr_disable(priv); 785df828598SMugunthan V N netif_carrier_off(ndev); 786df828598SMugunthan V N 787f150bd7fSMugunthan V N pm_runtime_get_sync(&priv->pdev->dev); 788df828598SMugunthan V N 789549985eeSRichard Cochran reg = priv->version; 790df828598SMugunthan V N 791df828598SMugunthan V N dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 792df828598SMugunthan V N CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 793df828598SMugunthan V N CPSW_RTL_VERSION(reg)); 794df828598SMugunthan V N 795df828598SMugunthan V N /* initialize host and slave ports */ 796d9ba8f9eSMugunthan V N if (!cpsw_common_res_usage_state(priv)) 797df828598SMugunthan V N cpsw_init_host_port(priv); 798df828598SMugunthan V N for_each_slave(priv, cpsw_slave_open, priv); 799df828598SMugunthan V N 8003b72c2feSMugunthan V N /* Add default VLAN */ 801d9ba8f9eSMugunthan V N if (!priv->data.dual_emac) 8023b72c2feSMugunthan V N cpsw_add_default_vlan(priv); 8033b72c2feSMugunthan V N 804d9ba8f9eSMugunthan V N if (!cpsw_common_res_usage_state(priv)) { 805df828598SMugunthan V N /* setup tx dma to fixed prio and zero offset */ 806df828598SMugunthan V N cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1); 807df828598SMugunthan V N cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0); 808df828598SMugunthan V N 809d9ba8f9eSMugunthan V N /* disable priority elevation */ 810df828598SMugunthan V N __raw_writel(0, &priv->regs->ptype); 811df828598SMugunthan V N 812d9ba8f9eSMugunthan V N /* enable statistics collection only on all ports */ 813df828598SMugunthan V N __raw_writel(0x7, &priv->regs->stat_port_en); 814df828598SMugunthan V N 815df828598SMugunthan V N if (WARN_ON(!priv->data.rx_descs)) 816df828598SMugunthan V N priv->data.rx_descs = 128; 817df828598SMugunthan V N 818df828598SMugunthan V N for (i = 0; i < priv->data.rx_descs; i++) { 819df828598SMugunthan V N struct sk_buff *skb; 820df828598SMugunthan V N 821df828598SMugunthan V N ret = -ENOMEM; 822df828598SMugunthan V N skb = netdev_alloc_skb_ip_align(priv->ndev, 823df828598SMugunthan V N priv->rx_packet_max); 824df828598SMugunthan V N if (!skb) 825df828598SMugunthan V N break; 826df828598SMugunthan V N ret = cpdma_chan_submit(priv->rxch, skb, skb->data, 827f6e135c8SMugunthan V N skb_tailroom(skb), 0, GFP_KERNEL); 828df828598SMugunthan V N if (WARN_ON(ret < 0)) 829df828598SMugunthan V N break; 830df828598SMugunthan V N } 831d9ba8f9eSMugunthan V N /* continue even if we didn't manage to submit all 832d9ba8f9eSMugunthan V N * receive descs 833d9ba8f9eSMugunthan V N */ 834df828598SMugunthan V N cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i); 835d9ba8f9eSMugunthan V N } 836df828598SMugunthan V N 837df828598SMugunthan V N cpdma_ctlr_start(priv->dma); 838df828598SMugunthan V N cpsw_intr_enable(priv); 839df828598SMugunthan V N napi_enable(&priv->napi); 840510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX); 841510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX); 842df828598SMugunthan V N 843d9ba8f9eSMugunthan V N if (priv->data.dual_emac) 844d9ba8f9eSMugunthan V N priv->slaves[priv->emac_port].open_stat = true; 845df828598SMugunthan V N return 0; 846df828598SMugunthan V N } 847df828598SMugunthan V N 848df828598SMugunthan V N static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv) 849df828598SMugunthan V N { 850df828598SMugunthan V N if (!slave->phy) 851df828598SMugunthan V N return; 852df828598SMugunthan V N phy_stop(slave->phy); 853df828598SMugunthan V N phy_disconnect(slave->phy); 854df828598SMugunthan V N slave->phy = NULL; 855df828598SMugunthan V N } 856df828598SMugunthan V N 857df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev) 858df828598SMugunthan V N { 859df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 860df828598SMugunthan V N 861df828598SMugunthan V N cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 862df828598SMugunthan V N netif_stop_queue(priv->ndev); 863df828598SMugunthan V N napi_disable(&priv->napi); 864df828598SMugunthan V N netif_carrier_off(priv->ndev); 865d9ba8f9eSMugunthan V N 866d9ba8f9eSMugunthan V N if (cpsw_common_res_usage_state(priv) <= 1) { 86771380f9bSMugunthan V N cpsw_intr_disable(priv); 86871380f9bSMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, false); 86971380f9bSMugunthan V N cpdma_ctlr_stop(priv->dma); 870df828598SMugunthan V N cpsw_ale_stop(priv->ale); 871d9ba8f9eSMugunthan V N } 872df828598SMugunthan V N for_each_slave(priv, cpsw_slave_stop, priv); 873f150bd7fSMugunthan V N pm_runtime_put_sync(&priv->pdev->dev); 874d9ba8f9eSMugunthan V N if (priv->data.dual_emac) 875d9ba8f9eSMugunthan V N priv->slaves[priv->emac_port].open_stat = false; 876df828598SMugunthan V N return 0; 877df828598SMugunthan V N } 878df828598SMugunthan V N 879df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 880df828598SMugunthan V N struct net_device *ndev) 881df828598SMugunthan V N { 882df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 883df828598SMugunthan V N int ret; 884df828598SMugunthan V N 885df828598SMugunthan V N ndev->trans_start = jiffies; 886df828598SMugunthan V N 887df828598SMugunthan V N if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 888df828598SMugunthan V N cpsw_err(priv, tx_err, "packet pad failed\n"); 889df828598SMugunthan V N priv->stats.tx_dropped++; 890df828598SMugunthan V N return NETDEV_TX_OK; 891df828598SMugunthan V N } 892df828598SMugunthan V N 8939232b16dSMugunthan V N if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 8949232b16dSMugunthan V N priv->cpts->tx_enable) 8952e5b38abSRichard Cochran skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 8962e5b38abSRichard Cochran 8972e5b38abSRichard Cochran skb_tx_timestamp(skb); 8982e5b38abSRichard Cochran 899d9ba8f9eSMugunthan V N ret = cpsw_tx_packet_submit(ndev, priv, skb); 900df828598SMugunthan V N if (unlikely(ret != 0)) { 901df828598SMugunthan V N cpsw_err(priv, tx_err, "desc submit failed\n"); 902df828598SMugunthan V N goto fail; 903df828598SMugunthan V N } 904df828598SMugunthan V N 905fae50823SMugunthan V N /* If there is no more tx desc left free then we need to 906fae50823SMugunthan V N * tell the kernel to stop sending us tx frames. 907fae50823SMugunthan V N */ 908fae50823SMugunthan V N if (unlikely(cpdma_check_free_tx_desc(priv->txch))) 909fae50823SMugunthan V N netif_stop_queue(ndev); 910fae50823SMugunthan V N 911df828598SMugunthan V N return NETDEV_TX_OK; 912df828598SMugunthan V N fail: 913df828598SMugunthan V N priv->stats.tx_dropped++; 914df828598SMugunthan V N netif_stop_queue(ndev); 915df828598SMugunthan V N return NETDEV_TX_BUSY; 916df828598SMugunthan V N } 917df828598SMugunthan V N 918df828598SMugunthan V N static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags) 919df828598SMugunthan V N { 920df828598SMugunthan V N /* 921df828598SMugunthan V N * The switch cannot operate in promiscuous mode without substantial 922df828598SMugunthan V N * headache. For promiscuous mode to work, we would need to put the 923df828598SMugunthan V N * ALE in bypass mode and route all traffic to the host port. 924df828598SMugunthan V N * Subsequently, the host will need to operate as a "bridge", learn, 925df828598SMugunthan V N * and flood as needed. For now, we simply complain here and 926df828598SMugunthan V N * do nothing about it :-) 927df828598SMugunthan V N */ 928df828598SMugunthan V N if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC)) 929df828598SMugunthan V N dev_err(&ndev->dev, "promiscuity ignored!\n"); 930df828598SMugunthan V N 931df828598SMugunthan V N /* 932df828598SMugunthan V N * The switch cannot filter multicast traffic unless it is configured 933df828598SMugunthan V N * in "VLAN Aware" mode. Unfortunately, VLAN awareness requires a 934df828598SMugunthan V N * whole bunch of additional logic that this driver does not implement 935df828598SMugunthan V N * at present. 936df828598SMugunthan V N */ 937df828598SMugunthan V N if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI)) 938df828598SMugunthan V N dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n"); 939df828598SMugunthan V N } 940df828598SMugunthan V N 9412e5b38abSRichard Cochran #ifdef CONFIG_TI_CPTS 9422e5b38abSRichard Cochran 9432e5b38abSRichard Cochran static void cpsw_hwtstamp_v1(struct cpsw_priv *priv) 9442e5b38abSRichard Cochran { 9452e5b38abSRichard Cochran struct cpsw_slave *slave = &priv->slaves[priv->data.cpts_active_slave]; 9462e5b38abSRichard Cochran u32 ts_en, seq_id; 9472e5b38abSRichard Cochran 9489232b16dSMugunthan V N if (!priv->cpts->tx_enable && !priv->cpts->rx_enable) { 9492e5b38abSRichard Cochran slave_write(slave, 0, CPSW1_TS_CTL); 9502e5b38abSRichard Cochran return; 9512e5b38abSRichard Cochran } 9522e5b38abSRichard Cochran 9532e5b38abSRichard Cochran seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588; 9542e5b38abSRichard Cochran ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS; 9552e5b38abSRichard Cochran 9569232b16dSMugunthan V N if (priv->cpts->tx_enable) 9572e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_TX_EN; 9582e5b38abSRichard Cochran 9599232b16dSMugunthan V N if (priv->cpts->rx_enable) 9602e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_RX_EN; 9612e5b38abSRichard Cochran 9622e5b38abSRichard Cochran slave_write(slave, ts_en, CPSW1_TS_CTL); 9632e5b38abSRichard Cochran slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE); 9642e5b38abSRichard Cochran } 9652e5b38abSRichard Cochran 9662e5b38abSRichard Cochran static void cpsw_hwtstamp_v2(struct cpsw_priv *priv) 9672e5b38abSRichard Cochran { 968d9ba8f9eSMugunthan V N struct cpsw_slave *slave; 9692e5b38abSRichard Cochran u32 ctrl, mtype; 9702e5b38abSRichard Cochran 971d9ba8f9eSMugunthan V N if (priv->data.dual_emac) 972d9ba8f9eSMugunthan V N slave = &priv->slaves[priv->emac_port]; 973d9ba8f9eSMugunthan V N else 974d9ba8f9eSMugunthan V N slave = &priv->slaves[priv->data.cpts_active_slave]; 975d9ba8f9eSMugunthan V N 9762e5b38abSRichard Cochran ctrl = slave_read(slave, CPSW2_CONTROL); 9772e5b38abSRichard Cochran ctrl &= ~CTRL_ALL_TS_MASK; 9782e5b38abSRichard Cochran 9799232b16dSMugunthan V N if (priv->cpts->tx_enable) 9802e5b38abSRichard Cochran ctrl |= CTRL_TX_TS_BITS; 9812e5b38abSRichard Cochran 9829232b16dSMugunthan V N if (priv->cpts->rx_enable) 9832e5b38abSRichard Cochran ctrl |= CTRL_RX_TS_BITS; 9842e5b38abSRichard Cochran 9852e5b38abSRichard Cochran mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS; 9862e5b38abSRichard Cochran 9872e5b38abSRichard Cochran slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE); 9882e5b38abSRichard Cochran slave_write(slave, ctrl, CPSW2_CONTROL); 9892e5b38abSRichard Cochran __raw_writel(ETH_P_1588, &priv->regs->ts_ltype); 9902e5b38abSRichard Cochran } 9912e5b38abSRichard Cochran 9923177bf6fSMugunthan V N static int cpsw_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) 9932e5b38abSRichard Cochran { 9943177bf6fSMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 9959232b16dSMugunthan V N struct cpts *cpts = priv->cpts; 9962e5b38abSRichard Cochran struct hwtstamp_config cfg; 9972e5b38abSRichard Cochran 9982e5b38abSRichard Cochran if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 9992e5b38abSRichard Cochran return -EFAULT; 10002e5b38abSRichard Cochran 10012e5b38abSRichard Cochran /* reserved for future extensions */ 10022e5b38abSRichard Cochran if (cfg.flags) 10032e5b38abSRichard Cochran return -EINVAL; 10042e5b38abSRichard Cochran 10052e5b38abSRichard Cochran switch (cfg.tx_type) { 10062e5b38abSRichard Cochran case HWTSTAMP_TX_OFF: 10072e5b38abSRichard Cochran cpts->tx_enable = 0; 10082e5b38abSRichard Cochran break; 10092e5b38abSRichard Cochran case HWTSTAMP_TX_ON: 10102e5b38abSRichard Cochran cpts->tx_enable = 1; 10112e5b38abSRichard Cochran break; 10122e5b38abSRichard Cochran default: 10132e5b38abSRichard Cochran return -ERANGE; 10142e5b38abSRichard Cochran } 10152e5b38abSRichard Cochran 10162e5b38abSRichard Cochran switch (cfg.rx_filter) { 10172e5b38abSRichard Cochran case HWTSTAMP_FILTER_NONE: 10182e5b38abSRichard Cochran cpts->rx_enable = 0; 10192e5b38abSRichard Cochran break; 10202e5b38abSRichard Cochran case HWTSTAMP_FILTER_ALL: 10212e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 10222e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 10232e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 10242e5b38abSRichard Cochran return -ERANGE; 10252e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 10262e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 10272e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 10282e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 10292e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 10302e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 10312e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_EVENT: 10322e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_SYNC: 10332e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 10342e5b38abSRichard Cochran cpts->rx_enable = 1; 10352e5b38abSRichard Cochran cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 10362e5b38abSRichard Cochran break; 10372e5b38abSRichard Cochran default: 10382e5b38abSRichard Cochran return -ERANGE; 10392e5b38abSRichard Cochran } 10402e5b38abSRichard Cochran 10412e5b38abSRichard Cochran switch (priv->version) { 10422e5b38abSRichard Cochran case CPSW_VERSION_1: 10432e5b38abSRichard Cochran cpsw_hwtstamp_v1(priv); 10442e5b38abSRichard Cochran break; 10452e5b38abSRichard Cochran case CPSW_VERSION_2: 10462e5b38abSRichard Cochran cpsw_hwtstamp_v2(priv); 10472e5b38abSRichard Cochran break; 10482e5b38abSRichard Cochran default: 10492e5b38abSRichard Cochran return -ENOTSUPP; 10502e5b38abSRichard Cochran } 10512e5b38abSRichard Cochran 10522e5b38abSRichard Cochran return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 10532e5b38abSRichard Cochran } 10542e5b38abSRichard Cochran 10552e5b38abSRichard Cochran #endif /*CONFIG_TI_CPTS*/ 10562e5b38abSRichard Cochran 10572e5b38abSRichard Cochran static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 10582e5b38abSRichard Cochran { 10592e5b38abSRichard Cochran if (!netif_running(dev)) 10602e5b38abSRichard Cochran return -EINVAL; 10612e5b38abSRichard Cochran 10622e5b38abSRichard Cochran #ifdef CONFIG_TI_CPTS 10632e5b38abSRichard Cochran if (cmd == SIOCSHWTSTAMP) 10643177bf6fSMugunthan V N return cpsw_hwtstamp_ioctl(dev, req); 10652e5b38abSRichard Cochran #endif 10662e5b38abSRichard Cochran return -ENOTSUPP; 10672e5b38abSRichard Cochran } 10682e5b38abSRichard Cochran 1069df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev) 1070df828598SMugunthan V N { 1071df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1072df828598SMugunthan V N 1073df828598SMugunthan V N cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 1074df828598SMugunthan V N priv->stats.tx_errors++; 1075df828598SMugunthan V N cpsw_intr_disable(priv); 1076df828598SMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, false); 1077df828598SMugunthan V N cpdma_chan_stop(priv->txch); 1078df828598SMugunthan V N cpdma_chan_start(priv->txch); 1079df828598SMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, true); 1080df828598SMugunthan V N cpsw_intr_enable(priv); 1081510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX); 1082510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX); 1083510a1e72SMugunthan V N 1084df828598SMugunthan V N } 1085df828598SMugunthan V N 1086df828598SMugunthan V N static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev) 1087df828598SMugunthan V N { 1088df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1089df828598SMugunthan V N return &priv->stats; 1090df828598SMugunthan V N } 1091df828598SMugunthan V N 1092df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 1093df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev) 1094df828598SMugunthan V N { 1095df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1096df828598SMugunthan V N 1097df828598SMugunthan V N cpsw_intr_disable(priv); 1098df828598SMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, false); 1099df828598SMugunthan V N cpsw_interrupt(ndev->irq, priv); 1100df828598SMugunthan V N cpdma_ctlr_int_ctrl(priv->dma, true); 1101df828598SMugunthan V N cpsw_intr_enable(priv); 1102510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX); 1103510a1e72SMugunthan V N cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX); 1104510a1e72SMugunthan V N 1105df828598SMugunthan V N } 1106df828598SMugunthan V N #endif 1107df828598SMugunthan V N 11083b72c2feSMugunthan V N static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, 11093b72c2feSMugunthan V N unsigned short vid) 11103b72c2feSMugunthan V N { 11113b72c2feSMugunthan V N int ret; 11123b72c2feSMugunthan V N 11133b72c2feSMugunthan V N ret = cpsw_ale_add_vlan(priv->ale, vid, 11143b72c2feSMugunthan V N ALE_ALL_PORTS << priv->host_port, 11153b72c2feSMugunthan V N 0, ALE_ALL_PORTS << priv->host_port, 11163b72c2feSMugunthan V N (ALE_PORT_1 | ALE_PORT_2) << priv->host_port); 11173b72c2feSMugunthan V N if (ret != 0) 11183b72c2feSMugunthan V N return ret; 11193b72c2feSMugunthan V N 11203b72c2feSMugunthan V N ret = cpsw_ale_add_ucast(priv->ale, priv->mac_addr, 11213b72c2feSMugunthan V N priv->host_port, ALE_VLAN, vid); 11223b72c2feSMugunthan V N if (ret != 0) 11233b72c2feSMugunthan V N goto clean_vid; 11243b72c2feSMugunthan V N 11253b72c2feSMugunthan V N ret = cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 11263b72c2feSMugunthan V N ALE_ALL_PORTS << priv->host_port, 11273b72c2feSMugunthan V N ALE_VLAN, vid, 0); 11283b72c2feSMugunthan V N if (ret != 0) 11293b72c2feSMugunthan V N goto clean_vlan_ucast; 11303b72c2feSMugunthan V N return 0; 11313b72c2feSMugunthan V N 11323b72c2feSMugunthan V N clean_vlan_ucast: 11333b72c2feSMugunthan V N cpsw_ale_del_ucast(priv->ale, priv->mac_addr, 11343b72c2feSMugunthan V N priv->host_port, ALE_VLAN, vid); 11353b72c2feSMugunthan V N clean_vid: 11363b72c2feSMugunthan V N cpsw_ale_del_vlan(priv->ale, vid, 0); 11373b72c2feSMugunthan V N return ret; 11383b72c2feSMugunthan V N } 11393b72c2feSMugunthan V N 11403b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, 11413b72c2feSMugunthan V N unsigned short vid) 11423b72c2feSMugunthan V N { 11433b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 11443b72c2feSMugunthan V N 11453b72c2feSMugunthan V N if (vid == priv->data.default_vlan) 11463b72c2feSMugunthan V N return 0; 11473b72c2feSMugunthan V N 11483b72c2feSMugunthan V N dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid); 11493b72c2feSMugunthan V N return cpsw_add_vlan_ale_entry(priv, vid); 11503b72c2feSMugunthan V N } 11513b72c2feSMugunthan V N 11523b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev, 11533b72c2feSMugunthan V N unsigned short vid) 11543b72c2feSMugunthan V N { 11553b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 11563b72c2feSMugunthan V N int ret; 11573b72c2feSMugunthan V N 11583b72c2feSMugunthan V N if (vid == priv->data.default_vlan) 11593b72c2feSMugunthan V N return 0; 11603b72c2feSMugunthan V N 11613b72c2feSMugunthan V N dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid); 11623b72c2feSMugunthan V N ret = cpsw_ale_del_vlan(priv->ale, vid, 0); 11633b72c2feSMugunthan V N if (ret != 0) 11643b72c2feSMugunthan V N return ret; 11653b72c2feSMugunthan V N 11663b72c2feSMugunthan V N ret = cpsw_ale_del_ucast(priv->ale, priv->mac_addr, 11673b72c2feSMugunthan V N priv->host_port, ALE_VLAN, vid); 11683b72c2feSMugunthan V N if (ret != 0) 11693b72c2feSMugunthan V N return ret; 11703b72c2feSMugunthan V N 11713b72c2feSMugunthan V N return cpsw_ale_del_mcast(priv->ale, priv->ndev->broadcast, 11723b72c2feSMugunthan V N 0, ALE_VLAN, vid); 11733b72c2feSMugunthan V N } 11743b72c2feSMugunthan V N 1175df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = { 1176df828598SMugunthan V N .ndo_open = cpsw_ndo_open, 1177df828598SMugunthan V N .ndo_stop = cpsw_ndo_stop, 1178df828598SMugunthan V N .ndo_start_xmit = cpsw_ndo_start_xmit, 1179df828598SMugunthan V N .ndo_change_rx_flags = cpsw_ndo_change_rx_flags, 11802e5b38abSRichard Cochran .ndo_do_ioctl = cpsw_ndo_ioctl, 1181df828598SMugunthan V N .ndo_validate_addr = eth_validate_addr, 11825c473ed2SDavid S. Miller .ndo_change_mtu = eth_change_mtu, 1183df828598SMugunthan V N .ndo_tx_timeout = cpsw_ndo_tx_timeout, 1184df828598SMugunthan V N .ndo_get_stats = cpsw_ndo_get_stats, 11855c50a856SMugunthan V N .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, 1186df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 1187df828598SMugunthan V N .ndo_poll_controller = cpsw_ndo_poll_controller, 1188df828598SMugunthan V N #endif 11893b72c2feSMugunthan V N .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, 11903b72c2feSMugunthan V N .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, 1191df828598SMugunthan V N }; 1192df828598SMugunthan V N 1193df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev, 1194df828598SMugunthan V N struct ethtool_drvinfo *info) 1195df828598SMugunthan V N { 1196df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 11977826d43fSJiri Pirko 11987826d43fSJiri Pirko strlcpy(info->driver, "TI CPSW Driver v1.0", sizeof(info->driver)); 11997826d43fSJiri Pirko strlcpy(info->version, "1.0", sizeof(info->version)); 12007826d43fSJiri Pirko strlcpy(info->bus_info, priv->pdev->name, sizeof(info->bus_info)); 1201df828598SMugunthan V N } 1202df828598SMugunthan V N 1203df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev) 1204df828598SMugunthan V N { 1205df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1206df828598SMugunthan V N return priv->msg_enable; 1207df828598SMugunthan V N } 1208df828598SMugunthan V N 1209df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 1210df828598SMugunthan V N { 1211df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1212df828598SMugunthan V N priv->msg_enable = value; 1213df828598SMugunthan V N } 1214df828598SMugunthan V N 12152e5b38abSRichard Cochran static int cpsw_get_ts_info(struct net_device *ndev, 12162e5b38abSRichard Cochran struct ethtool_ts_info *info) 12172e5b38abSRichard Cochran { 12182e5b38abSRichard Cochran #ifdef CONFIG_TI_CPTS 12192e5b38abSRichard Cochran struct cpsw_priv *priv = netdev_priv(ndev); 12202e5b38abSRichard Cochran 12212e5b38abSRichard Cochran info->so_timestamping = 12222e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_HARDWARE | 12232e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 12242e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_HARDWARE | 12252e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 12262e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE | 12272e5b38abSRichard Cochran SOF_TIMESTAMPING_RAW_HARDWARE; 12289232b16dSMugunthan V N info->phc_index = priv->cpts->phc_index; 12292e5b38abSRichard Cochran info->tx_types = 12302e5b38abSRichard Cochran (1 << HWTSTAMP_TX_OFF) | 12312e5b38abSRichard Cochran (1 << HWTSTAMP_TX_ON); 12322e5b38abSRichard Cochran info->rx_filters = 12332e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_NONE) | 12342e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); 12352e5b38abSRichard Cochran #else 12362e5b38abSRichard Cochran info->so_timestamping = 12372e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 12382e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 12392e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE; 12402e5b38abSRichard Cochran info->phc_index = -1; 12412e5b38abSRichard Cochran info->tx_types = 0; 12422e5b38abSRichard Cochran info->rx_filters = 0; 12432e5b38abSRichard Cochran #endif 12442e5b38abSRichard Cochran return 0; 12452e5b38abSRichard Cochran } 12462e5b38abSRichard Cochran 1247df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = { 1248df828598SMugunthan V N .get_drvinfo = cpsw_get_drvinfo, 1249df828598SMugunthan V N .get_msglevel = cpsw_get_msglevel, 1250df828598SMugunthan V N .set_msglevel = cpsw_set_msglevel, 1251df828598SMugunthan V N .get_link = ethtool_op_get_link, 12522e5b38abSRichard Cochran .get_ts_info = cpsw_get_ts_info, 1253df828598SMugunthan V N }; 1254df828598SMugunthan V N 1255549985eeSRichard Cochran static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv, 1256549985eeSRichard Cochran u32 slave_reg_ofs, u32 sliver_reg_ofs) 1257df828598SMugunthan V N { 1258df828598SMugunthan V N void __iomem *regs = priv->regs; 1259df828598SMugunthan V N int slave_num = slave->slave_num; 1260df828598SMugunthan V N struct cpsw_slave_data *data = priv->data.slave_data + slave_num; 1261df828598SMugunthan V N 1262df828598SMugunthan V N slave->data = data; 1263549985eeSRichard Cochran slave->regs = regs + slave_reg_ofs; 1264549985eeSRichard Cochran slave->sliver = regs + sliver_reg_ofs; 1265d9ba8f9eSMugunthan V N slave->port_vlan = data->dual_emac_res_vlan; 1266df828598SMugunthan V N } 1267df828598SMugunthan V N 12682eb32b0aSMugunthan V N static int cpsw_probe_dt(struct cpsw_platform_data *data, 12692eb32b0aSMugunthan V N struct platform_device *pdev) 12702eb32b0aSMugunthan V N { 12712eb32b0aSMugunthan V N struct device_node *node = pdev->dev.of_node; 12722eb32b0aSMugunthan V N struct device_node *slave_node; 12732eb32b0aSMugunthan V N int i = 0, ret; 12742eb32b0aSMugunthan V N u32 prop; 12752eb32b0aSMugunthan V N 12762eb32b0aSMugunthan V N if (!node) 12772eb32b0aSMugunthan V N return -EINVAL; 12782eb32b0aSMugunthan V N 12792eb32b0aSMugunthan V N if (of_property_read_u32(node, "slaves", &prop)) { 12802eb32b0aSMugunthan V N pr_err("Missing slaves property in the DT.\n"); 12812eb32b0aSMugunthan V N return -EINVAL; 12822eb32b0aSMugunthan V N } 12832eb32b0aSMugunthan V N data->slaves = prop; 12842eb32b0aSMugunthan V N 128578ca0b28SRichard Cochran if (of_property_read_u32(node, "cpts_active_slave", &prop)) { 128678ca0b28SRichard Cochran pr_err("Missing cpts_active_slave property in the DT.\n"); 128778ca0b28SRichard Cochran ret = -EINVAL; 128878ca0b28SRichard Cochran goto error_ret; 128978ca0b28SRichard Cochran } 129078ca0b28SRichard Cochran data->cpts_active_slave = prop; 129178ca0b28SRichard Cochran 129200ab94eeSRichard Cochran if (of_property_read_u32(node, "cpts_clock_mult", &prop)) { 129300ab94eeSRichard Cochran pr_err("Missing cpts_clock_mult property in the DT.\n"); 129400ab94eeSRichard Cochran ret = -EINVAL; 129500ab94eeSRichard Cochran goto error_ret; 129600ab94eeSRichard Cochran } 129700ab94eeSRichard Cochran data->cpts_clock_mult = prop; 129800ab94eeSRichard Cochran 129900ab94eeSRichard Cochran if (of_property_read_u32(node, "cpts_clock_shift", &prop)) { 130000ab94eeSRichard Cochran pr_err("Missing cpts_clock_shift property in the DT.\n"); 130100ab94eeSRichard Cochran ret = -EINVAL; 130200ab94eeSRichard Cochran goto error_ret; 130300ab94eeSRichard Cochran } 130400ab94eeSRichard Cochran data->cpts_clock_shift = prop; 130500ab94eeSRichard Cochran 1306b2adaca9SJoe Perches data->slave_data = kcalloc(data->slaves, sizeof(struct cpsw_slave_data), 1307b2adaca9SJoe Perches GFP_KERNEL); 1308b2adaca9SJoe Perches if (!data->slave_data) 13092eb32b0aSMugunthan V N return -EINVAL; 13102eb32b0aSMugunthan V N 13112eb32b0aSMugunthan V N if (of_property_read_u32(node, "cpdma_channels", &prop)) { 13122eb32b0aSMugunthan V N pr_err("Missing cpdma_channels property in the DT.\n"); 13132eb32b0aSMugunthan V N ret = -EINVAL; 13142eb32b0aSMugunthan V N goto error_ret; 13152eb32b0aSMugunthan V N } 13162eb32b0aSMugunthan V N data->channels = prop; 13172eb32b0aSMugunthan V N 13182eb32b0aSMugunthan V N if (of_property_read_u32(node, "ale_entries", &prop)) { 13192eb32b0aSMugunthan V N pr_err("Missing ale_entries property in the DT.\n"); 13202eb32b0aSMugunthan V N ret = -EINVAL; 13212eb32b0aSMugunthan V N goto error_ret; 13222eb32b0aSMugunthan V N } 13232eb32b0aSMugunthan V N data->ale_entries = prop; 13242eb32b0aSMugunthan V N 13252eb32b0aSMugunthan V N if (of_property_read_u32(node, "bd_ram_size", &prop)) { 13262eb32b0aSMugunthan V N pr_err("Missing bd_ram_size property in the DT.\n"); 13272eb32b0aSMugunthan V N ret = -EINVAL; 13282eb32b0aSMugunthan V N goto error_ret; 13292eb32b0aSMugunthan V N } 13302eb32b0aSMugunthan V N data->bd_ram_size = prop; 13312eb32b0aSMugunthan V N 13322eb32b0aSMugunthan V N if (of_property_read_u32(node, "rx_descs", &prop)) { 13332eb32b0aSMugunthan V N pr_err("Missing rx_descs property in the DT.\n"); 13342eb32b0aSMugunthan V N ret = -EINVAL; 13352eb32b0aSMugunthan V N goto error_ret; 13362eb32b0aSMugunthan V N } 13372eb32b0aSMugunthan V N data->rx_descs = prop; 13382eb32b0aSMugunthan V N 13392eb32b0aSMugunthan V N if (of_property_read_u32(node, "mac_control", &prop)) { 13402eb32b0aSMugunthan V N pr_err("Missing mac_control property in the DT.\n"); 13412eb32b0aSMugunthan V N ret = -EINVAL; 13422eb32b0aSMugunthan V N goto error_ret; 13432eb32b0aSMugunthan V N } 13442eb32b0aSMugunthan V N data->mac_control = prop; 13452eb32b0aSMugunthan V N 1346d9ba8f9eSMugunthan V N if (!of_property_read_u32(node, "dual_emac", &prop)) 1347d9ba8f9eSMugunthan V N data->dual_emac = prop; 1348d9ba8f9eSMugunthan V N 13491fb19aa7SVaibhav Hiremath /* 13501fb19aa7SVaibhav Hiremath * Populate all the child nodes here... 13511fb19aa7SVaibhav Hiremath */ 13521fb19aa7SVaibhav Hiremath ret = of_platform_populate(node, NULL, NULL, &pdev->dev); 13531fb19aa7SVaibhav Hiremath /* We do not want to force this, as in some cases may not have child */ 13541fb19aa7SVaibhav Hiremath if (ret) 13551fb19aa7SVaibhav Hiremath pr_warn("Doesn't have any child node\n"); 13561fb19aa7SVaibhav Hiremath 1357549985eeSRichard Cochran for_each_node_by_name(slave_node, "slave") { 1358549985eeSRichard Cochran struct cpsw_slave_data *slave_data = data->slave_data + i; 1359549985eeSRichard Cochran const void *mac_addr = NULL; 1360549985eeSRichard Cochran u32 phyid; 1361549985eeSRichard Cochran int lenp; 1362549985eeSRichard Cochran const __be32 *parp; 1363549985eeSRichard Cochran struct device_node *mdio_node; 1364549985eeSRichard Cochran struct platform_device *mdio; 1365549985eeSRichard Cochran 1366549985eeSRichard Cochran parp = of_get_property(slave_node, "phy_id", &lenp); 1367549985eeSRichard Cochran if ((parp == NULL) && (lenp != (sizeof(void *) * 2))) { 1368549985eeSRichard Cochran pr_err("Missing slave[%d] phy_id property\n", i); 1369549985eeSRichard Cochran ret = -EINVAL; 1370549985eeSRichard Cochran goto error_ret; 1371549985eeSRichard Cochran } 1372549985eeSRichard Cochran mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); 1373549985eeSRichard Cochran phyid = be32_to_cpup(parp+1); 1374549985eeSRichard Cochran mdio = of_find_device_by_node(mdio_node); 1375549985eeSRichard Cochran snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), 1376549985eeSRichard Cochran PHY_ID_FMT, mdio->name, phyid); 1377549985eeSRichard Cochran 1378549985eeSRichard Cochran mac_addr = of_get_mac_address(slave_node); 1379549985eeSRichard Cochran if (mac_addr) 1380549985eeSRichard Cochran memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); 1381549985eeSRichard Cochran 1382d9ba8f9eSMugunthan V N if (data->dual_emac) { 1383d9ba8f9eSMugunthan V N if (of_property_read_u32(node, "dual_emac_res_vlan", 1384d9ba8f9eSMugunthan V N &prop)) { 1385d9ba8f9eSMugunthan V N pr_err("Missing dual_emac_res_vlan in DT.\n"); 1386d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = i+1; 1387d9ba8f9eSMugunthan V N pr_err("Using %d as Reserved VLAN for %d slave\n", 1388d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan, i); 1389d9ba8f9eSMugunthan V N } else { 1390d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = prop; 1391d9ba8f9eSMugunthan V N } 1392d9ba8f9eSMugunthan V N } 1393d9ba8f9eSMugunthan V N 1394549985eeSRichard Cochran i++; 1395549985eeSRichard Cochran } 1396549985eeSRichard Cochran 13972eb32b0aSMugunthan V N return 0; 13982eb32b0aSMugunthan V N 13992eb32b0aSMugunthan V N error_ret: 14002eb32b0aSMugunthan V N kfree(data->slave_data); 14012eb32b0aSMugunthan V N return ret; 14022eb32b0aSMugunthan V N } 14032eb32b0aSMugunthan V N 1404d9ba8f9eSMugunthan V N static int cpsw_probe_dual_emac(struct platform_device *pdev, 1405d9ba8f9eSMugunthan V N struct cpsw_priv *priv) 1406d9ba8f9eSMugunthan V N { 1407d9ba8f9eSMugunthan V N struct cpsw_platform_data *data = &priv->data; 1408d9ba8f9eSMugunthan V N struct net_device *ndev; 1409d9ba8f9eSMugunthan V N struct cpsw_priv *priv_sl2; 1410d9ba8f9eSMugunthan V N int ret = 0, i; 1411d9ba8f9eSMugunthan V N 1412d9ba8f9eSMugunthan V N ndev = alloc_etherdev(sizeof(struct cpsw_priv)); 1413d9ba8f9eSMugunthan V N if (!ndev) { 1414d9ba8f9eSMugunthan V N pr_err("cpsw: error allocating net_device\n"); 1415d9ba8f9eSMugunthan V N return -ENOMEM; 1416d9ba8f9eSMugunthan V N } 1417d9ba8f9eSMugunthan V N 1418d9ba8f9eSMugunthan V N priv_sl2 = netdev_priv(ndev); 1419d9ba8f9eSMugunthan V N spin_lock_init(&priv_sl2->lock); 1420d9ba8f9eSMugunthan V N priv_sl2->data = *data; 1421d9ba8f9eSMugunthan V N priv_sl2->pdev = pdev; 1422d9ba8f9eSMugunthan V N priv_sl2->ndev = ndev; 1423d9ba8f9eSMugunthan V N priv_sl2->dev = &ndev->dev; 1424d9ba8f9eSMugunthan V N priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 1425d9ba8f9eSMugunthan V N priv_sl2->rx_packet_max = max(rx_packet_max, 128); 1426d9ba8f9eSMugunthan V N 1427d9ba8f9eSMugunthan V N if (is_valid_ether_addr(data->slave_data[1].mac_addr)) { 1428d9ba8f9eSMugunthan V N memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr, 1429d9ba8f9eSMugunthan V N ETH_ALEN); 1430d9ba8f9eSMugunthan V N pr_info("cpsw: Detected MACID = %pM\n", priv_sl2->mac_addr); 1431d9ba8f9eSMugunthan V N } else { 1432d9ba8f9eSMugunthan V N random_ether_addr(priv_sl2->mac_addr); 1433d9ba8f9eSMugunthan V N pr_info("cpsw: Random MACID = %pM\n", priv_sl2->mac_addr); 1434d9ba8f9eSMugunthan V N } 1435d9ba8f9eSMugunthan V N memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN); 1436d9ba8f9eSMugunthan V N 1437d9ba8f9eSMugunthan V N priv_sl2->slaves = priv->slaves; 1438d9ba8f9eSMugunthan V N priv_sl2->clk = priv->clk; 1439d9ba8f9eSMugunthan V N 1440d9ba8f9eSMugunthan V N priv_sl2->cpsw_res = priv->cpsw_res; 1441d9ba8f9eSMugunthan V N priv_sl2->regs = priv->regs; 1442d9ba8f9eSMugunthan V N priv_sl2->host_port = priv->host_port; 1443d9ba8f9eSMugunthan V N priv_sl2->host_port_regs = priv->host_port_regs; 1444d9ba8f9eSMugunthan V N priv_sl2->wr_regs = priv->wr_regs; 1445d9ba8f9eSMugunthan V N priv_sl2->dma = priv->dma; 1446d9ba8f9eSMugunthan V N priv_sl2->txch = priv->txch; 1447d9ba8f9eSMugunthan V N priv_sl2->rxch = priv->rxch; 1448d9ba8f9eSMugunthan V N priv_sl2->ale = priv->ale; 1449d9ba8f9eSMugunthan V N priv_sl2->emac_port = 1; 1450d9ba8f9eSMugunthan V N priv->slaves[1].ndev = ndev; 1451d9ba8f9eSMugunthan V N priv_sl2->cpts = priv->cpts; 1452d9ba8f9eSMugunthan V N priv_sl2->version = priv->version; 1453d9ba8f9eSMugunthan V N 1454d9ba8f9eSMugunthan V N for (i = 0; i < priv->num_irqs; i++) { 1455d9ba8f9eSMugunthan V N priv_sl2->irqs_table[i] = priv->irqs_table[i]; 1456d9ba8f9eSMugunthan V N priv_sl2->num_irqs = priv->num_irqs; 1457d9ba8f9eSMugunthan V N } 1458d9ba8f9eSMugunthan V N 1459d9ba8f9eSMugunthan V N ndev->features |= NETIF_F_HW_VLAN_FILTER; 1460d9ba8f9eSMugunthan V N 1461d9ba8f9eSMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 1462d9ba8f9eSMugunthan V N SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops); 1463d9ba8f9eSMugunthan V N netif_napi_add(ndev, &priv_sl2->napi, cpsw_poll, CPSW_POLL_WEIGHT); 1464d9ba8f9eSMugunthan V N 1465d9ba8f9eSMugunthan V N /* register the network device */ 1466d9ba8f9eSMugunthan V N SET_NETDEV_DEV(ndev, &pdev->dev); 1467d9ba8f9eSMugunthan V N ret = register_netdev(ndev); 1468d9ba8f9eSMugunthan V N if (ret) { 1469d9ba8f9eSMugunthan V N pr_err("cpsw: error registering net device\n"); 1470d9ba8f9eSMugunthan V N free_netdev(ndev); 1471d9ba8f9eSMugunthan V N ret = -ENODEV; 1472d9ba8f9eSMugunthan V N } 1473d9ba8f9eSMugunthan V N 1474d9ba8f9eSMugunthan V N return ret; 1475d9ba8f9eSMugunthan V N } 1476d9ba8f9eSMugunthan V N 1477663e12e6SBill Pemberton static int cpsw_probe(struct platform_device *pdev) 1478df828598SMugunthan V N { 1479df828598SMugunthan V N struct cpsw_platform_data *data = pdev->dev.platform_data; 1480df828598SMugunthan V N struct net_device *ndev; 1481df828598SMugunthan V N struct cpsw_priv *priv; 1482df828598SMugunthan V N struct cpdma_params dma_params; 1483df828598SMugunthan V N struct cpsw_ale_params ale_params; 1484549985eeSRichard Cochran void __iomem *ss_regs, *wr_regs; 1485df828598SMugunthan V N struct resource *res; 1486549985eeSRichard Cochran u32 slave_offset, sliver_offset, slave_size; 1487df828598SMugunthan V N int ret = 0, i, k = 0; 1488df828598SMugunthan V N 1489df828598SMugunthan V N ndev = alloc_etherdev(sizeof(struct cpsw_priv)); 1490df828598SMugunthan V N if (!ndev) { 1491df828598SMugunthan V N pr_err("error allocating net_device\n"); 1492df828598SMugunthan V N return -ENOMEM; 1493df828598SMugunthan V N } 1494df828598SMugunthan V N 1495df828598SMugunthan V N platform_set_drvdata(pdev, ndev); 1496df828598SMugunthan V N priv = netdev_priv(ndev); 1497df828598SMugunthan V N spin_lock_init(&priv->lock); 1498df828598SMugunthan V N priv->pdev = pdev; 1499df828598SMugunthan V N priv->ndev = ndev; 1500df828598SMugunthan V N priv->dev = &ndev->dev; 1501df828598SMugunthan V N priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 1502df828598SMugunthan V N priv->rx_packet_max = max(rx_packet_max, 128); 15039232b16dSMugunthan V N priv->cpts = devm_kzalloc(&pdev->dev, sizeof(struct cpts), GFP_KERNEL); 15049232b16dSMugunthan V N if (!ndev) { 15059232b16dSMugunthan V N pr_err("error allocating cpts\n"); 15069232b16dSMugunthan V N goto clean_ndev_ret; 15079232b16dSMugunthan V N } 1508df828598SMugunthan V N 15091fb19aa7SVaibhav Hiremath /* 15101fb19aa7SVaibhav Hiremath * This may be required here for child devices. 15111fb19aa7SVaibhav Hiremath */ 15121fb19aa7SVaibhav Hiremath pm_runtime_enable(&pdev->dev); 15131fb19aa7SVaibhav Hiremath 15142eb32b0aSMugunthan V N if (cpsw_probe_dt(&priv->data, pdev)) { 15152eb32b0aSMugunthan V N pr_err("cpsw: platform data missing\n"); 15162eb32b0aSMugunthan V N ret = -ENODEV; 15172eb32b0aSMugunthan V N goto clean_ndev_ret; 15182eb32b0aSMugunthan V N } 15192eb32b0aSMugunthan V N data = &priv->data; 15202eb32b0aSMugunthan V N 1521df828598SMugunthan V N if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 1522df828598SMugunthan V N memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 1523df828598SMugunthan V N pr_info("Detected MACID = %pM", priv->mac_addr); 1524df828598SMugunthan V N } else { 15257efd26d0SJoe Perches eth_random_addr(priv->mac_addr); 1526df828598SMugunthan V N pr_info("Random MACID = %pM", priv->mac_addr); 1527df828598SMugunthan V N } 1528df828598SMugunthan V N 1529df828598SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 1530df828598SMugunthan V N 1531df828598SMugunthan V N priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves, 1532df828598SMugunthan V N GFP_KERNEL); 1533df828598SMugunthan V N if (!priv->slaves) { 1534df828598SMugunthan V N ret = -EBUSY; 1535df828598SMugunthan V N goto clean_ndev_ret; 1536df828598SMugunthan V N } 1537df828598SMugunthan V N for (i = 0; i < data->slaves; i++) 1538df828598SMugunthan V N priv->slaves[i].slave_num = i; 1539df828598SMugunthan V N 1540d9ba8f9eSMugunthan V N priv->slaves[0].ndev = ndev; 1541d9ba8f9eSMugunthan V N priv->emac_port = 0; 1542d9ba8f9eSMugunthan V N 1543f150bd7fSMugunthan V N priv->clk = clk_get(&pdev->dev, "fck"); 1544df828598SMugunthan V N if (IS_ERR(priv->clk)) { 1545f150bd7fSMugunthan V N dev_err(&pdev->dev, "fck is not found\n"); 1546f150bd7fSMugunthan V N ret = -ENODEV; 1547f150bd7fSMugunthan V N goto clean_slave_ret; 1548df828598SMugunthan V N } 1549df828598SMugunthan V N 1550df828598SMugunthan V N priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1551df828598SMugunthan V N if (!priv->cpsw_res) { 1552df828598SMugunthan V N dev_err(priv->dev, "error getting i/o resource\n"); 1553df828598SMugunthan V N ret = -ENOENT; 1554df828598SMugunthan V N goto clean_clk_ret; 1555df828598SMugunthan V N } 1556df828598SMugunthan V N if (!request_mem_region(priv->cpsw_res->start, 1557df828598SMugunthan V N resource_size(priv->cpsw_res), ndev->name)) { 1558df828598SMugunthan V N dev_err(priv->dev, "failed request i/o region\n"); 1559df828598SMugunthan V N ret = -ENXIO; 1560df828598SMugunthan V N goto clean_clk_ret; 1561df828598SMugunthan V N } 1562549985eeSRichard Cochran ss_regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res)); 1563549985eeSRichard Cochran if (!ss_regs) { 1564df828598SMugunthan V N dev_err(priv->dev, "unable to map i/o region\n"); 1565df828598SMugunthan V N goto clean_cpsw_iores_ret; 1566df828598SMugunthan V N } 1567549985eeSRichard Cochran priv->regs = ss_regs; 1568549985eeSRichard Cochran priv->version = __raw_readl(&priv->regs->id_ver); 1569549985eeSRichard Cochran priv->host_port = HOST_PORT_NUM; 1570df828598SMugunthan V N 1571a65dd5b2SRichard Cochran priv->cpsw_wr_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1572a65dd5b2SRichard Cochran if (!priv->cpsw_wr_res) { 1573df828598SMugunthan V N dev_err(priv->dev, "error getting i/o resource\n"); 1574df828598SMugunthan V N ret = -ENOENT; 15755250c969SRichard Cochran goto clean_iomap_ret; 1576df828598SMugunthan V N } 1577a65dd5b2SRichard Cochran if (!request_mem_region(priv->cpsw_wr_res->start, 1578a65dd5b2SRichard Cochran resource_size(priv->cpsw_wr_res), ndev->name)) { 1579df828598SMugunthan V N dev_err(priv->dev, "failed request i/o region\n"); 1580df828598SMugunthan V N ret = -ENXIO; 15815250c969SRichard Cochran goto clean_iomap_ret; 1582df828598SMugunthan V N } 1583549985eeSRichard Cochran wr_regs = ioremap(priv->cpsw_wr_res->start, 1584a65dd5b2SRichard Cochran resource_size(priv->cpsw_wr_res)); 1585549985eeSRichard Cochran if (!wr_regs) { 1586df828598SMugunthan V N dev_err(priv->dev, "unable to map i/o region\n"); 1587a65dd5b2SRichard Cochran goto clean_cpsw_wr_iores_ret; 1588df828598SMugunthan V N } 1589549985eeSRichard Cochran priv->wr_regs = wr_regs; 1590df828598SMugunthan V N 1591df828598SMugunthan V N memset(&dma_params, 0, sizeof(dma_params)); 1592549985eeSRichard Cochran memset(&ale_params, 0, sizeof(ale_params)); 1593549985eeSRichard Cochran 1594549985eeSRichard Cochran switch (priv->version) { 1595549985eeSRichard Cochran case CPSW_VERSION_1: 1596549985eeSRichard Cochran priv->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET; 15979232b16dSMugunthan V N priv->cpts->reg = ss_regs + CPSW1_CPTS_OFFSET; 1598549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET; 1599549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET; 1600549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET; 1601549985eeSRichard Cochran slave_offset = CPSW1_SLAVE_OFFSET; 1602549985eeSRichard Cochran slave_size = CPSW1_SLAVE_SIZE; 1603549985eeSRichard Cochran sliver_offset = CPSW1_SLIVER_OFFSET; 1604549985eeSRichard Cochran dma_params.desc_mem_phys = 0; 1605549985eeSRichard Cochran break; 1606549985eeSRichard Cochran case CPSW_VERSION_2: 1607549985eeSRichard Cochran priv->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET; 16089232b16dSMugunthan V N priv->cpts->reg = ss_regs + CPSW2_CPTS_OFFSET; 1609549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET; 1610549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET; 1611549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET; 1612549985eeSRichard Cochran slave_offset = CPSW2_SLAVE_OFFSET; 1613549985eeSRichard Cochran slave_size = CPSW2_SLAVE_SIZE; 1614549985eeSRichard Cochran sliver_offset = CPSW2_SLIVER_OFFSET; 1615549985eeSRichard Cochran dma_params.desc_mem_phys = 1616549985eeSRichard Cochran (u32 __force) priv->cpsw_res->start + CPSW2_BD_OFFSET; 1617549985eeSRichard Cochran break; 1618549985eeSRichard Cochran default: 1619549985eeSRichard Cochran dev_err(priv->dev, "unknown version 0x%08x\n", priv->version); 1620549985eeSRichard Cochran ret = -ENODEV; 1621549985eeSRichard Cochran goto clean_cpsw_wr_iores_ret; 1622549985eeSRichard Cochran } 1623549985eeSRichard Cochran for (i = 0; i < priv->data.slaves; i++) { 1624549985eeSRichard Cochran struct cpsw_slave *slave = &priv->slaves[i]; 1625549985eeSRichard Cochran cpsw_slave_init(slave, priv, slave_offset, sliver_offset); 1626549985eeSRichard Cochran slave_offset += slave_size; 1627549985eeSRichard Cochran sliver_offset += SLIVER_SIZE; 1628549985eeSRichard Cochran } 1629549985eeSRichard Cochran 1630df828598SMugunthan V N dma_params.dev = &pdev->dev; 1631549985eeSRichard Cochran dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH; 1632549985eeSRichard Cochran dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE; 1633549985eeSRichard Cochran dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP; 1634549985eeSRichard Cochran dma_params.txcp = dma_params.txhdp + CPDMA_TXCP; 1635549985eeSRichard Cochran dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP; 1636df828598SMugunthan V N 1637df828598SMugunthan V N dma_params.num_chan = data->channels; 1638df828598SMugunthan V N dma_params.has_soft_reset = true; 1639df828598SMugunthan V N dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 1640df828598SMugunthan V N dma_params.desc_mem_size = data->bd_ram_size; 1641df828598SMugunthan V N dma_params.desc_align = 16; 1642df828598SMugunthan V N dma_params.has_ext_regs = true; 1643549985eeSRichard Cochran dma_params.desc_hw_addr = dma_params.desc_mem_phys; 1644df828598SMugunthan V N 1645df828598SMugunthan V N priv->dma = cpdma_ctlr_create(&dma_params); 1646df828598SMugunthan V N if (!priv->dma) { 1647df828598SMugunthan V N dev_err(priv->dev, "error initializing dma\n"); 1648df828598SMugunthan V N ret = -ENOMEM; 16495250c969SRichard Cochran goto clean_wr_iomap_ret; 1650df828598SMugunthan V N } 1651df828598SMugunthan V N 1652df828598SMugunthan V N priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0), 1653df828598SMugunthan V N cpsw_tx_handler); 1654df828598SMugunthan V N priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0), 1655df828598SMugunthan V N cpsw_rx_handler); 1656df828598SMugunthan V N 1657df828598SMugunthan V N if (WARN_ON(!priv->txch || !priv->rxch)) { 1658df828598SMugunthan V N dev_err(priv->dev, "error initializing dma channels\n"); 1659df828598SMugunthan V N ret = -ENOMEM; 1660df828598SMugunthan V N goto clean_dma_ret; 1661df828598SMugunthan V N } 1662df828598SMugunthan V N 1663df828598SMugunthan V N ale_params.dev = &ndev->dev; 1664df828598SMugunthan V N ale_params.ale_ageout = ale_ageout; 1665df828598SMugunthan V N ale_params.ale_entries = data->ale_entries; 1666df828598SMugunthan V N ale_params.ale_ports = data->slaves; 1667df828598SMugunthan V N 1668df828598SMugunthan V N priv->ale = cpsw_ale_create(&ale_params); 1669df828598SMugunthan V N if (!priv->ale) { 1670df828598SMugunthan V N dev_err(priv->dev, "error initializing ale engine\n"); 1671df828598SMugunthan V N ret = -ENODEV; 1672df828598SMugunthan V N goto clean_dma_ret; 1673df828598SMugunthan V N } 1674df828598SMugunthan V N 1675df828598SMugunthan V N ndev->irq = platform_get_irq(pdev, 0); 1676df828598SMugunthan V N if (ndev->irq < 0) { 1677df828598SMugunthan V N dev_err(priv->dev, "error getting irq resource\n"); 1678df828598SMugunthan V N ret = -ENOENT; 1679df828598SMugunthan V N goto clean_ale_ret; 1680df828598SMugunthan V N } 1681df828598SMugunthan V N 1682df828598SMugunthan V N while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) { 1683df828598SMugunthan V N for (i = res->start; i <= res->end; i++) { 1684df828598SMugunthan V N if (request_irq(i, cpsw_interrupt, IRQF_DISABLED, 1685df828598SMugunthan V N dev_name(&pdev->dev), priv)) { 1686df828598SMugunthan V N dev_err(priv->dev, "error attaching irq\n"); 1687df828598SMugunthan V N goto clean_ale_ret; 1688df828598SMugunthan V N } 1689df828598SMugunthan V N priv->irqs_table[k] = i; 1690df828598SMugunthan V N priv->num_irqs = k; 1691df828598SMugunthan V N } 1692df828598SMugunthan V N k++; 1693df828598SMugunthan V N } 1694df828598SMugunthan V N 16953b72c2feSMugunthan V N ndev->features |= NETIF_F_HW_VLAN_FILTER; 1696df828598SMugunthan V N 1697df828598SMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 1698df828598SMugunthan V N SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops); 1699df828598SMugunthan V N netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT); 1700df828598SMugunthan V N 1701df828598SMugunthan V N /* register the network device */ 1702df828598SMugunthan V N SET_NETDEV_DEV(ndev, &pdev->dev); 1703df828598SMugunthan V N ret = register_netdev(ndev); 1704df828598SMugunthan V N if (ret) { 1705df828598SMugunthan V N dev_err(priv->dev, "error registering net device\n"); 1706df828598SMugunthan V N ret = -ENODEV; 1707df828598SMugunthan V N goto clean_irq_ret; 1708df828598SMugunthan V N } 1709df828598SMugunthan V N 17109232b16dSMugunthan V N if (cpts_register(&pdev->dev, priv->cpts, 17112e5b38abSRichard Cochran data->cpts_clock_mult, data->cpts_clock_shift)) 17122e5b38abSRichard Cochran dev_err(priv->dev, "error registering cpts device\n"); 17132e5b38abSRichard Cochran 1714df828598SMugunthan V N cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n", 1715df828598SMugunthan V N priv->cpsw_res->start, ndev->irq); 1716df828598SMugunthan V N 1717d9ba8f9eSMugunthan V N if (priv->data.dual_emac) { 1718d9ba8f9eSMugunthan V N ret = cpsw_probe_dual_emac(pdev, priv); 1719d9ba8f9eSMugunthan V N if (ret) { 1720d9ba8f9eSMugunthan V N cpsw_err(priv, probe, "error probe slave 2 emac interface\n"); 1721d9ba8f9eSMugunthan V N goto clean_irq_ret; 1722d9ba8f9eSMugunthan V N } 1723d9ba8f9eSMugunthan V N } 1724d9ba8f9eSMugunthan V N 1725df828598SMugunthan V N return 0; 1726df828598SMugunthan V N 1727df828598SMugunthan V N clean_irq_ret: 1728df828598SMugunthan V N free_irq(ndev->irq, priv); 1729df828598SMugunthan V N clean_ale_ret: 1730df828598SMugunthan V N cpsw_ale_destroy(priv->ale); 1731df828598SMugunthan V N clean_dma_ret: 1732df828598SMugunthan V N cpdma_chan_destroy(priv->txch); 1733df828598SMugunthan V N cpdma_chan_destroy(priv->rxch); 1734df828598SMugunthan V N cpdma_ctlr_destroy(priv->dma); 17355250c969SRichard Cochran clean_wr_iomap_ret: 17365250c969SRichard Cochran iounmap(priv->wr_regs); 1737a65dd5b2SRichard Cochran clean_cpsw_wr_iores_ret: 1738a65dd5b2SRichard Cochran release_mem_region(priv->cpsw_wr_res->start, 1739a65dd5b2SRichard Cochran resource_size(priv->cpsw_wr_res)); 17405250c969SRichard Cochran clean_iomap_ret: 17415250c969SRichard Cochran iounmap(priv->regs); 1742df828598SMugunthan V N clean_cpsw_iores_ret: 1743df828598SMugunthan V N release_mem_region(priv->cpsw_res->start, 1744df828598SMugunthan V N resource_size(priv->cpsw_res)); 1745df828598SMugunthan V N clean_clk_ret: 1746df828598SMugunthan V N clk_put(priv->clk); 1747f150bd7fSMugunthan V N clean_slave_ret: 1748f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 1749df828598SMugunthan V N kfree(priv->slaves); 1750df828598SMugunthan V N clean_ndev_ret: 1751df828598SMugunthan V N free_netdev(ndev); 1752df828598SMugunthan V N return ret; 1753df828598SMugunthan V N } 1754df828598SMugunthan V N 1755663e12e6SBill Pemberton static int cpsw_remove(struct platform_device *pdev) 1756df828598SMugunthan V N { 1757df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 1758df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1759df828598SMugunthan V N 1760df828598SMugunthan V N pr_info("removing device"); 1761df828598SMugunthan V N platform_set_drvdata(pdev, NULL); 1762df828598SMugunthan V N 17639232b16dSMugunthan V N cpts_unregister(priv->cpts); 1764df828598SMugunthan V N free_irq(ndev->irq, priv); 1765df828598SMugunthan V N cpsw_ale_destroy(priv->ale); 1766df828598SMugunthan V N cpdma_chan_destroy(priv->txch); 1767df828598SMugunthan V N cpdma_chan_destroy(priv->rxch); 1768df828598SMugunthan V N cpdma_ctlr_destroy(priv->dma); 1769df828598SMugunthan V N iounmap(priv->regs); 1770df828598SMugunthan V N release_mem_region(priv->cpsw_res->start, 1771df828598SMugunthan V N resource_size(priv->cpsw_res)); 17725250c969SRichard Cochran iounmap(priv->wr_regs); 1773a65dd5b2SRichard Cochran release_mem_region(priv->cpsw_wr_res->start, 1774a65dd5b2SRichard Cochran resource_size(priv->cpsw_wr_res)); 1775f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 1776df828598SMugunthan V N clk_put(priv->clk); 1777df828598SMugunthan V N kfree(priv->slaves); 1778df828598SMugunthan V N free_netdev(ndev); 1779df828598SMugunthan V N 1780df828598SMugunthan V N return 0; 1781df828598SMugunthan V N } 1782df828598SMugunthan V N 1783df828598SMugunthan V N static int cpsw_suspend(struct device *dev) 1784df828598SMugunthan V N { 1785df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 1786df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 1787df828598SMugunthan V N 1788df828598SMugunthan V N if (netif_running(ndev)) 1789df828598SMugunthan V N cpsw_ndo_stop(ndev); 1790f150bd7fSMugunthan V N pm_runtime_put_sync(&pdev->dev); 1791f150bd7fSMugunthan V N 1792df828598SMugunthan V N return 0; 1793df828598SMugunthan V N } 1794df828598SMugunthan V N 1795df828598SMugunthan V N static int cpsw_resume(struct device *dev) 1796df828598SMugunthan V N { 1797df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 1798df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 1799df828598SMugunthan V N 1800f150bd7fSMugunthan V N pm_runtime_get_sync(&pdev->dev); 1801df828598SMugunthan V N if (netif_running(ndev)) 1802df828598SMugunthan V N cpsw_ndo_open(ndev); 1803df828598SMugunthan V N return 0; 1804df828598SMugunthan V N } 1805df828598SMugunthan V N 1806df828598SMugunthan V N static const struct dev_pm_ops cpsw_pm_ops = { 1807df828598SMugunthan V N .suspend = cpsw_suspend, 1808df828598SMugunthan V N .resume = cpsw_resume, 1809df828598SMugunthan V N }; 1810df828598SMugunthan V N 18112eb32b0aSMugunthan V N static const struct of_device_id cpsw_of_mtable[] = { 18122eb32b0aSMugunthan V N { .compatible = "ti,cpsw", }, 18132eb32b0aSMugunthan V N { /* sentinel */ }, 18142eb32b0aSMugunthan V N }; 18152eb32b0aSMugunthan V N 1816df828598SMugunthan V N static struct platform_driver cpsw_driver = { 1817df828598SMugunthan V N .driver = { 1818df828598SMugunthan V N .name = "cpsw", 1819df828598SMugunthan V N .owner = THIS_MODULE, 1820df828598SMugunthan V N .pm = &cpsw_pm_ops, 18212eb32b0aSMugunthan V N .of_match_table = of_match_ptr(cpsw_of_mtable), 1822df828598SMugunthan V N }, 1823df828598SMugunthan V N .probe = cpsw_probe, 1824663e12e6SBill Pemberton .remove = cpsw_remove, 1825df828598SMugunthan V N }; 1826df828598SMugunthan V N 1827df828598SMugunthan V N static int __init cpsw_init(void) 1828df828598SMugunthan V N { 1829df828598SMugunthan V N return platform_driver_register(&cpsw_driver); 1830df828598SMugunthan V N } 1831df828598SMugunthan V N late_initcall(cpsw_init); 1832df828598SMugunthan V N 1833df828598SMugunthan V N static void __exit cpsw_exit(void) 1834df828598SMugunthan V N { 1835df828598SMugunthan V N platform_driver_unregister(&cpsw_driver); 1836df828598SMugunthan V N } 1837df828598SMugunthan V N module_exit(cpsw_exit); 1838df828598SMugunthan V N 1839df828598SMugunthan V N MODULE_LICENSE("GPL"); 1840df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 1841df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 1842df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 1843