xref: /openbmc/linux/drivers/net/ethernet/ti/cpsw.c (revision 2eb32b0a)
1df828598SMugunthan V N /*
2df828598SMugunthan V N  * Texas Instruments Ethernet Switch Driver
3df828598SMugunthan V N  *
4df828598SMugunthan V N  * Copyright (C) 2012 Texas Instruments
5df828598SMugunthan V N  *
6df828598SMugunthan V N  * This program is free software; you can redistribute it and/or
7df828598SMugunthan V N  * modify it under the terms of the GNU General Public License as
8df828598SMugunthan V N  * published by the Free Software Foundation version 2.
9df828598SMugunthan V N  *
10df828598SMugunthan V N  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11df828598SMugunthan V N  * kind, whether express or implied; without even the implied warranty
12df828598SMugunthan V N  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13df828598SMugunthan V N  * GNU General Public License for more details.
14df828598SMugunthan V N  */
15df828598SMugunthan V N 
16df828598SMugunthan V N #include <linux/kernel.h>
17df828598SMugunthan V N #include <linux/io.h>
18df828598SMugunthan V N #include <linux/clk.h>
19df828598SMugunthan V N #include <linux/timer.h>
20df828598SMugunthan V N #include <linux/module.h>
21df828598SMugunthan V N #include <linux/platform_device.h>
22df828598SMugunthan V N #include <linux/irqreturn.h>
23df828598SMugunthan V N #include <linux/interrupt.h>
24df828598SMugunthan V N #include <linux/if_ether.h>
25df828598SMugunthan V N #include <linux/etherdevice.h>
26df828598SMugunthan V N #include <linux/netdevice.h>
27df828598SMugunthan V N #include <linux/phy.h>
28df828598SMugunthan V N #include <linux/workqueue.h>
29df828598SMugunthan V N #include <linux/delay.h>
30f150bd7fSMugunthan V N #include <linux/pm_runtime.h>
312eb32b0aSMugunthan V N #include <linux/of.h>
322eb32b0aSMugunthan V N #include <linux/of_net.h>
332eb32b0aSMugunthan V N #include <linux/of_device.h>
34df828598SMugunthan V N 
35df828598SMugunthan V N #include <linux/platform_data/cpsw.h>
36df828598SMugunthan V N 
37df828598SMugunthan V N #include "cpsw_ale.h"
38df828598SMugunthan V N #include "davinci_cpdma.h"
39df828598SMugunthan V N 
40df828598SMugunthan V N #define CPSW_DEBUG	(NETIF_MSG_HW		| NETIF_MSG_WOL		| \
41df828598SMugunthan V N 			 NETIF_MSG_DRV		| NETIF_MSG_LINK	| \
42df828598SMugunthan V N 			 NETIF_MSG_IFUP		| NETIF_MSG_INTR	| \
43df828598SMugunthan V N 			 NETIF_MSG_PROBE	| NETIF_MSG_TIMER	| \
44df828598SMugunthan V N 			 NETIF_MSG_IFDOWN	| NETIF_MSG_RX_ERR	| \
45df828598SMugunthan V N 			 NETIF_MSG_TX_ERR	| NETIF_MSG_TX_DONE	| \
46df828598SMugunthan V N 			 NETIF_MSG_PKTDATA	| NETIF_MSG_TX_QUEUED	| \
47df828598SMugunthan V N 			 NETIF_MSG_RX_STATUS)
48df828598SMugunthan V N 
49df828598SMugunthan V N #define cpsw_info(priv, type, format, ...)		\
50df828598SMugunthan V N do {								\
51df828598SMugunthan V N 	if (netif_msg_##type(priv) && net_ratelimit())		\
52df828598SMugunthan V N 		dev_info(priv->dev, format, ## __VA_ARGS__);	\
53df828598SMugunthan V N } while (0)
54df828598SMugunthan V N 
55df828598SMugunthan V N #define cpsw_err(priv, type, format, ...)		\
56df828598SMugunthan V N do {								\
57df828598SMugunthan V N 	if (netif_msg_##type(priv) && net_ratelimit())		\
58df828598SMugunthan V N 		dev_err(priv->dev, format, ## __VA_ARGS__);	\
59df828598SMugunthan V N } while (0)
60df828598SMugunthan V N 
61df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...)		\
62df828598SMugunthan V N do {								\
63df828598SMugunthan V N 	if (netif_msg_##type(priv) && net_ratelimit())		\
64df828598SMugunthan V N 		dev_dbg(priv->dev, format, ## __VA_ARGS__);	\
65df828598SMugunthan V N } while (0)
66df828598SMugunthan V N 
67df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...)		\
68df828598SMugunthan V N do {								\
69df828598SMugunthan V N 	if (netif_msg_##type(priv) && net_ratelimit())		\
70df828598SMugunthan V N 		dev_notice(priv->dev, format, ## __VA_ARGS__);	\
71df828598SMugunthan V N } while (0)
72df828598SMugunthan V N 
73df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg)		(reg >> 8 & 0x7)
74df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg)		(reg & 0xff)
75df828598SMugunthan V N #define CPSW_RTL_VERSION(reg)		((reg >> 11) & 0x1f)
76df828598SMugunthan V N 
77df828598SMugunthan V N #define CPDMA_RXTHRESH		0x0c0
78df828598SMugunthan V N #define CPDMA_RXFREE		0x0e0
79df828598SMugunthan V N #define CPDMA_TXHDP		0x00
80df828598SMugunthan V N #define CPDMA_RXHDP		0x20
81df828598SMugunthan V N #define CPDMA_TXCP		0x40
82df828598SMugunthan V N #define CPDMA_RXCP		0x60
83df828598SMugunthan V N 
84df828598SMugunthan V N #define cpsw_dma_regs(base, offset)		\
85df828598SMugunthan V N 	(void __iomem *)((base) + (offset))
86df828598SMugunthan V N #define cpsw_dma_rxthresh(base, offset)		\
87df828598SMugunthan V N 	(void __iomem *)((base) + (offset) + CPDMA_RXTHRESH)
88df828598SMugunthan V N #define cpsw_dma_rxfree(base, offset)		\
89df828598SMugunthan V N 	(void __iomem *)((base) + (offset) + CPDMA_RXFREE)
90df828598SMugunthan V N #define cpsw_dma_txhdp(base, offset)		\
91df828598SMugunthan V N 	(void __iomem *)((base) + (offset) + CPDMA_TXHDP)
92df828598SMugunthan V N #define cpsw_dma_rxhdp(base, offset)		\
93df828598SMugunthan V N 	(void __iomem *)((base) + (offset) + CPDMA_RXHDP)
94df828598SMugunthan V N #define cpsw_dma_txcp(base, offset)		\
95df828598SMugunthan V N 	(void __iomem *)((base) + (offset) + CPDMA_TXCP)
96df828598SMugunthan V N #define cpsw_dma_rxcp(base, offset)		\
97df828598SMugunthan V N 	(void __iomem *)((base) + (offset) + CPDMA_RXCP)
98df828598SMugunthan V N 
99df828598SMugunthan V N #define CPSW_POLL_WEIGHT	64
100df828598SMugunthan V N #define CPSW_MIN_PACKET_SIZE	60
101df828598SMugunthan V N #define CPSW_MAX_PACKET_SIZE	(1500 + 14 + 4 + 4)
102df828598SMugunthan V N 
103df828598SMugunthan V N #define RX_PRIORITY_MAPPING	0x76543210
104df828598SMugunthan V N #define TX_PRIORITY_MAPPING	0x33221100
105df828598SMugunthan V N #define CPDMA_TX_PRIORITY_MAP	0x76543210
106df828598SMugunthan V N 
107df828598SMugunthan V N #define cpsw_enable_irq(priv)	\
108df828598SMugunthan V N 	do {			\
109df828598SMugunthan V N 		u32 i;		\
110df828598SMugunthan V N 		for (i = 0; i < priv->num_irqs; i++) \
111df828598SMugunthan V N 			enable_irq(priv->irqs_table[i]); \
112df828598SMugunthan V N 	} while (0);
113df828598SMugunthan V N #define cpsw_disable_irq(priv)	\
114df828598SMugunthan V N 	do {			\
115df828598SMugunthan V N 		u32 i;		\
116df828598SMugunthan V N 		for (i = 0; i < priv->num_irqs; i++) \
117df828598SMugunthan V N 			disable_irq_nosync(priv->irqs_table[i]); \
118df828598SMugunthan V N 	} while (0);
119df828598SMugunthan V N 
120df828598SMugunthan V N static int debug_level;
121df828598SMugunthan V N module_param(debug_level, int, 0);
122df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
123df828598SMugunthan V N 
124df828598SMugunthan V N static int ale_ageout = 10;
125df828598SMugunthan V N module_param(ale_ageout, int, 0);
126df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
127df828598SMugunthan V N 
128df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
129df828598SMugunthan V N module_param(rx_packet_max, int, 0);
130df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
131df828598SMugunthan V N 
132df828598SMugunthan V N struct cpsw_ss_regs {
133df828598SMugunthan V N 	u32	id_ver;
134df828598SMugunthan V N 	u32	soft_reset;
135df828598SMugunthan V N 	u32	control;
136df828598SMugunthan V N 	u32	int_control;
137df828598SMugunthan V N 	u32	rx_thresh_en;
138df828598SMugunthan V N 	u32	rx_en;
139df828598SMugunthan V N 	u32	tx_en;
140df828598SMugunthan V N 	u32	misc_en;
141df828598SMugunthan V N };
142df828598SMugunthan V N 
143df828598SMugunthan V N struct cpsw_regs {
144df828598SMugunthan V N 	u32	id_ver;
145df828598SMugunthan V N 	u32	control;
146df828598SMugunthan V N 	u32	soft_reset;
147df828598SMugunthan V N 	u32	stat_port_en;
148df828598SMugunthan V N 	u32	ptype;
149df828598SMugunthan V N };
150df828598SMugunthan V N 
151df828598SMugunthan V N struct cpsw_slave_regs {
152df828598SMugunthan V N 	u32	max_blks;
153df828598SMugunthan V N 	u32	blk_cnt;
154df828598SMugunthan V N 	u32	flow_thresh;
155df828598SMugunthan V N 	u32	port_vlan;
156df828598SMugunthan V N 	u32	tx_pri_map;
157df828598SMugunthan V N 	u32	ts_ctl;
158df828598SMugunthan V N 	u32	ts_seq_ltype;
159df828598SMugunthan V N 	u32	ts_vlan;
160df828598SMugunthan V N 	u32	sa_lo;
161df828598SMugunthan V N 	u32	sa_hi;
162df828598SMugunthan V N };
163df828598SMugunthan V N 
164df828598SMugunthan V N struct cpsw_host_regs {
165df828598SMugunthan V N 	u32	max_blks;
166df828598SMugunthan V N 	u32	blk_cnt;
167df828598SMugunthan V N 	u32	flow_thresh;
168df828598SMugunthan V N 	u32	port_vlan;
169df828598SMugunthan V N 	u32	tx_pri_map;
170df828598SMugunthan V N 	u32	cpdma_tx_pri_map;
171df828598SMugunthan V N 	u32	cpdma_rx_chan_map;
172df828598SMugunthan V N };
173df828598SMugunthan V N 
174df828598SMugunthan V N struct cpsw_sliver_regs {
175df828598SMugunthan V N 	u32	id_ver;
176df828598SMugunthan V N 	u32	mac_control;
177df828598SMugunthan V N 	u32	mac_status;
178df828598SMugunthan V N 	u32	soft_reset;
179df828598SMugunthan V N 	u32	rx_maxlen;
180df828598SMugunthan V N 	u32	__reserved_0;
181df828598SMugunthan V N 	u32	rx_pause;
182df828598SMugunthan V N 	u32	tx_pause;
183df828598SMugunthan V N 	u32	__reserved_1;
184df828598SMugunthan V N 	u32	rx_pri_map;
185df828598SMugunthan V N };
186df828598SMugunthan V N 
187df828598SMugunthan V N struct cpsw_slave {
188df828598SMugunthan V N 	struct cpsw_slave_regs __iomem	*regs;
189df828598SMugunthan V N 	struct cpsw_sliver_regs __iomem	*sliver;
190df828598SMugunthan V N 	int				slave_num;
191df828598SMugunthan V N 	u32				mac_control;
192df828598SMugunthan V N 	struct cpsw_slave_data		*data;
193df828598SMugunthan V N 	struct phy_device		*phy;
194df828598SMugunthan V N };
195df828598SMugunthan V N 
196df828598SMugunthan V N struct cpsw_priv {
197df828598SMugunthan V N 	spinlock_t			lock;
198df828598SMugunthan V N 	struct platform_device		*pdev;
199df828598SMugunthan V N 	struct net_device		*ndev;
200df828598SMugunthan V N 	struct resource			*cpsw_res;
201df828598SMugunthan V N 	struct resource			*cpsw_ss_res;
202df828598SMugunthan V N 	struct napi_struct		napi;
203df828598SMugunthan V N 	struct device			*dev;
204df828598SMugunthan V N 	struct cpsw_platform_data	data;
205df828598SMugunthan V N 	struct cpsw_regs __iomem	*regs;
206df828598SMugunthan V N 	struct cpsw_ss_regs __iomem	*ss_regs;
207df828598SMugunthan V N 	struct cpsw_host_regs __iomem	*host_port_regs;
208df828598SMugunthan V N 	u32				msg_enable;
209df828598SMugunthan V N 	struct net_device_stats		stats;
210df828598SMugunthan V N 	int				rx_packet_max;
211df828598SMugunthan V N 	int				host_port;
212df828598SMugunthan V N 	struct clk			*clk;
213df828598SMugunthan V N 	u8				mac_addr[ETH_ALEN];
214df828598SMugunthan V N 	struct cpsw_slave		*slaves;
215df828598SMugunthan V N 	struct cpdma_ctlr		*dma;
216df828598SMugunthan V N 	struct cpdma_chan		*txch, *rxch;
217df828598SMugunthan V N 	struct cpsw_ale			*ale;
218df828598SMugunthan V N 	/* snapshot of IRQ numbers */
219df828598SMugunthan V N 	u32 irqs_table[4];
220df828598SMugunthan V N 	u32 num_irqs;
221df828598SMugunthan V N };
222df828598SMugunthan V N 
223df828598SMugunthan V N #define napi_to_priv(napi)	container_of(napi, struct cpsw_priv, napi)
224df828598SMugunthan V N #define for_each_slave(priv, func, arg...)			\
225df828598SMugunthan V N 	do {							\
226df828598SMugunthan V N 		int idx;					\
227df828598SMugunthan V N 		for (idx = 0; idx < (priv)->data.slaves; idx++)	\
228df828598SMugunthan V N 			(func)((priv)->slaves + idx, ##arg);	\
229df828598SMugunthan V N 	} while (0)
230df828598SMugunthan V N 
231df828598SMugunthan V N static void cpsw_intr_enable(struct cpsw_priv *priv)
232df828598SMugunthan V N {
233df828598SMugunthan V N 	__raw_writel(0xFF, &priv->ss_regs->tx_en);
234df828598SMugunthan V N 	__raw_writel(0xFF, &priv->ss_regs->rx_en);
235df828598SMugunthan V N 
236df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, true);
237df828598SMugunthan V N 	return;
238df828598SMugunthan V N }
239df828598SMugunthan V N 
240df828598SMugunthan V N static void cpsw_intr_disable(struct cpsw_priv *priv)
241df828598SMugunthan V N {
242df828598SMugunthan V N 	__raw_writel(0, &priv->ss_regs->tx_en);
243df828598SMugunthan V N 	__raw_writel(0, &priv->ss_regs->rx_en);
244df828598SMugunthan V N 
245df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, false);
246df828598SMugunthan V N 	return;
247df828598SMugunthan V N }
248df828598SMugunthan V N 
249df828598SMugunthan V N void cpsw_tx_handler(void *token, int len, int status)
250df828598SMugunthan V N {
251df828598SMugunthan V N 	struct sk_buff		*skb = token;
252df828598SMugunthan V N 	struct net_device	*ndev = skb->dev;
253df828598SMugunthan V N 	struct cpsw_priv	*priv = netdev_priv(ndev);
254df828598SMugunthan V N 
255df828598SMugunthan V N 	if (unlikely(netif_queue_stopped(ndev)))
256df828598SMugunthan V N 		netif_start_queue(ndev);
257df828598SMugunthan V N 	priv->stats.tx_packets++;
258df828598SMugunthan V N 	priv->stats.tx_bytes += len;
259df828598SMugunthan V N 	dev_kfree_skb_any(skb);
260df828598SMugunthan V N }
261df828598SMugunthan V N 
262df828598SMugunthan V N void cpsw_rx_handler(void *token, int len, int status)
263df828598SMugunthan V N {
264df828598SMugunthan V N 	struct sk_buff		*skb = token;
265df828598SMugunthan V N 	struct net_device	*ndev = skb->dev;
266df828598SMugunthan V N 	struct cpsw_priv	*priv = netdev_priv(ndev);
267df828598SMugunthan V N 	int			ret = 0;
268df828598SMugunthan V N 
269df828598SMugunthan V N 	/* free and bail if we are shutting down */
270df828598SMugunthan V N 	if (unlikely(!netif_running(ndev)) ||
271df828598SMugunthan V N 			unlikely(!netif_carrier_ok(ndev))) {
272df828598SMugunthan V N 		dev_kfree_skb_any(skb);
273df828598SMugunthan V N 		return;
274df828598SMugunthan V N 	}
275df828598SMugunthan V N 	if (likely(status >= 0)) {
276df828598SMugunthan V N 		skb_put(skb, len);
277df828598SMugunthan V N 		skb->protocol = eth_type_trans(skb, ndev);
278df828598SMugunthan V N 		netif_receive_skb(skb);
279df828598SMugunthan V N 		priv->stats.rx_bytes += len;
280df828598SMugunthan V N 		priv->stats.rx_packets++;
281df828598SMugunthan V N 		skb = NULL;
282df828598SMugunthan V N 	}
283df828598SMugunthan V N 
284df828598SMugunthan V N 	if (unlikely(!netif_running(ndev))) {
285df828598SMugunthan V N 		if (skb)
286df828598SMugunthan V N 			dev_kfree_skb_any(skb);
287df828598SMugunthan V N 		return;
288df828598SMugunthan V N 	}
289df828598SMugunthan V N 
290df828598SMugunthan V N 	if (likely(!skb)) {
291df828598SMugunthan V N 		skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max);
292df828598SMugunthan V N 		if (WARN_ON(!skb))
293df828598SMugunthan V N 			return;
294df828598SMugunthan V N 
295df828598SMugunthan V N 		ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
296df828598SMugunthan V N 					skb_tailroom(skb), GFP_KERNEL);
297df828598SMugunthan V N 	}
298df828598SMugunthan V N 	WARN_ON(ret < 0);
299df828598SMugunthan V N }
300df828598SMugunthan V N 
301df828598SMugunthan V N static irqreturn_t cpsw_interrupt(int irq, void *dev_id)
302df828598SMugunthan V N {
303df828598SMugunthan V N 	struct cpsw_priv *priv = dev_id;
304df828598SMugunthan V N 
305df828598SMugunthan V N 	if (likely(netif_running(priv->ndev))) {
306df828598SMugunthan V N 		cpsw_intr_disable(priv);
307df828598SMugunthan V N 		cpsw_disable_irq(priv);
308df828598SMugunthan V N 		napi_schedule(&priv->napi);
309df828598SMugunthan V N 	}
310df828598SMugunthan V N 	return IRQ_HANDLED;
311df828598SMugunthan V N }
312df828598SMugunthan V N 
313df828598SMugunthan V N static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
314df828598SMugunthan V N {
315df828598SMugunthan V N 	if (priv->host_port == 0)
316df828598SMugunthan V N 		return slave_num + 1;
317df828598SMugunthan V N 	else
318df828598SMugunthan V N 		return slave_num;
319df828598SMugunthan V N }
320df828598SMugunthan V N 
321df828598SMugunthan V N static int cpsw_poll(struct napi_struct *napi, int budget)
322df828598SMugunthan V N {
323df828598SMugunthan V N 	struct cpsw_priv	*priv = napi_to_priv(napi);
324df828598SMugunthan V N 	int			num_tx, num_rx;
325df828598SMugunthan V N 
326df828598SMugunthan V N 	num_tx = cpdma_chan_process(priv->txch, 128);
327df828598SMugunthan V N 	num_rx = cpdma_chan_process(priv->rxch, budget);
328df828598SMugunthan V N 
329df828598SMugunthan V N 	if (num_rx || num_tx)
330df828598SMugunthan V N 		cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n",
331df828598SMugunthan V N 			 num_rx, num_tx);
332df828598SMugunthan V N 
333df828598SMugunthan V N 	if (num_rx < budget) {
334df828598SMugunthan V N 		napi_complete(napi);
335df828598SMugunthan V N 		cpsw_intr_enable(priv);
336df828598SMugunthan V N 		cpdma_ctlr_eoi(priv->dma);
337df828598SMugunthan V N 		cpsw_enable_irq(priv);
338df828598SMugunthan V N 	}
339df828598SMugunthan V N 
340df828598SMugunthan V N 	return num_rx;
341df828598SMugunthan V N }
342df828598SMugunthan V N 
343df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg)
344df828598SMugunthan V N {
345df828598SMugunthan V N 	unsigned long timeout = jiffies + HZ;
346df828598SMugunthan V N 
347df828598SMugunthan V N 	__raw_writel(1, reg);
348df828598SMugunthan V N 	do {
349df828598SMugunthan V N 		cpu_relax();
350df828598SMugunthan V N 	} while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies));
351df828598SMugunthan V N 
352df828598SMugunthan V N 	WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module);
353df828598SMugunthan V N }
354df828598SMugunthan V N 
355df828598SMugunthan V N #define mac_hi(mac)	(((mac)[0] << 0) | ((mac)[1] << 8) |	\
356df828598SMugunthan V N 			 ((mac)[2] << 16) | ((mac)[3] << 24))
357df828598SMugunthan V N #define mac_lo(mac)	(((mac)[4] << 0) | ((mac)[5] << 8))
358df828598SMugunthan V N 
359df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave,
360df828598SMugunthan V N 			       struct cpsw_priv *priv)
361df828598SMugunthan V N {
362df828598SMugunthan V N 	__raw_writel(mac_hi(priv->mac_addr), &slave->regs->sa_hi);
363df828598SMugunthan V N 	__raw_writel(mac_lo(priv->mac_addr), &slave->regs->sa_lo);
364df828598SMugunthan V N }
365df828598SMugunthan V N 
366df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave,
367df828598SMugunthan V N 			      struct cpsw_priv *priv, bool *link)
368df828598SMugunthan V N {
369df828598SMugunthan V N 	struct phy_device	*phy = slave->phy;
370df828598SMugunthan V N 	u32			mac_control = 0;
371df828598SMugunthan V N 	u32			slave_port;
372df828598SMugunthan V N 
373df828598SMugunthan V N 	if (!phy)
374df828598SMugunthan V N 		return;
375df828598SMugunthan V N 
376df828598SMugunthan V N 	slave_port = cpsw_get_slave_port(priv, slave->slave_num);
377df828598SMugunthan V N 
378df828598SMugunthan V N 	if (phy->link) {
379df828598SMugunthan V N 		mac_control = priv->data.mac_control;
380df828598SMugunthan V N 
381df828598SMugunthan V N 		/* enable forwarding */
382df828598SMugunthan V N 		cpsw_ale_control_set(priv->ale, slave_port,
383df828598SMugunthan V N 				     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
384df828598SMugunthan V N 
385df828598SMugunthan V N 		if (phy->speed == 1000)
386df828598SMugunthan V N 			mac_control |= BIT(7);	/* GIGABITEN	*/
387df828598SMugunthan V N 		if (phy->duplex)
388df828598SMugunthan V N 			mac_control |= BIT(0);	/* FULLDUPLEXEN	*/
389df828598SMugunthan V N 		*link = true;
390df828598SMugunthan V N 	} else {
391df828598SMugunthan V N 		mac_control = 0;
392df828598SMugunthan V N 		/* disable forwarding */
393df828598SMugunthan V N 		cpsw_ale_control_set(priv->ale, slave_port,
394df828598SMugunthan V N 				     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
395df828598SMugunthan V N 	}
396df828598SMugunthan V N 
397df828598SMugunthan V N 	if (mac_control != slave->mac_control) {
398df828598SMugunthan V N 		phy_print_status(phy);
399df828598SMugunthan V N 		__raw_writel(mac_control, &slave->sliver->mac_control);
400df828598SMugunthan V N 	}
401df828598SMugunthan V N 
402df828598SMugunthan V N 	slave->mac_control = mac_control;
403df828598SMugunthan V N }
404df828598SMugunthan V N 
405df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev)
406df828598SMugunthan V N {
407df828598SMugunthan V N 	struct cpsw_priv	*priv = netdev_priv(ndev);
408df828598SMugunthan V N 	bool			link = false;
409df828598SMugunthan V N 
410df828598SMugunthan V N 	for_each_slave(priv, _cpsw_adjust_link, priv, &link);
411df828598SMugunthan V N 
412df828598SMugunthan V N 	if (link) {
413df828598SMugunthan V N 		netif_carrier_on(ndev);
414df828598SMugunthan V N 		if (netif_running(ndev))
415df828598SMugunthan V N 			netif_wake_queue(ndev);
416df828598SMugunthan V N 	} else {
417df828598SMugunthan V N 		netif_carrier_off(ndev);
418df828598SMugunthan V N 		netif_stop_queue(ndev);
419df828598SMugunthan V N 	}
420df828598SMugunthan V N }
421df828598SMugunthan V N 
422df828598SMugunthan V N static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val)
423df828598SMugunthan V N {
424df828598SMugunthan V N 	static char *leader = "........................................";
425df828598SMugunthan V N 
426df828598SMugunthan V N 	if (!val)
427df828598SMugunthan V N 		return 0;
428df828598SMugunthan V N 	else
429df828598SMugunthan V N 		return snprintf(buf, maxlen, "%s %s %10d\n", name,
430df828598SMugunthan V N 				leader + strlen(name), val);
431df828598SMugunthan V N }
432df828598SMugunthan V N 
433df828598SMugunthan V N static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
434df828598SMugunthan V N {
435df828598SMugunthan V N 	char name[32];
436df828598SMugunthan V N 	u32 slave_port;
437df828598SMugunthan V N 
438df828598SMugunthan V N 	sprintf(name, "slave-%d", slave->slave_num);
439df828598SMugunthan V N 
440df828598SMugunthan V N 	soft_reset(name, &slave->sliver->soft_reset);
441df828598SMugunthan V N 
442df828598SMugunthan V N 	/* setup priority mapping */
443df828598SMugunthan V N 	__raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map);
444df828598SMugunthan V N 	__raw_writel(TX_PRIORITY_MAPPING, &slave->regs->tx_pri_map);
445df828598SMugunthan V N 
446df828598SMugunthan V N 	/* setup max packet size, and mac address */
447df828598SMugunthan V N 	__raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen);
448df828598SMugunthan V N 	cpsw_set_slave_mac(slave, priv);
449df828598SMugunthan V N 
450df828598SMugunthan V N 	slave->mac_control = 0;	/* no link yet */
451df828598SMugunthan V N 
452df828598SMugunthan V N 	slave_port = cpsw_get_slave_port(priv, slave->slave_num);
453df828598SMugunthan V N 
454df828598SMugunthan V N 	cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
455df828598SMugunthan V N 			   1 << slave_port, 0, ALE_MCAST_FWD_2);
456df828598SMugunthan V N 
457df828598SMugunthan V N 	slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
458df828598SMugunthan V N 				 &cpsw_adjust_link, 0, slave->data->phy_if);
459df828598SMugunthan V N 	if (IS_ERR(slave->phy)) {
460df828598SMugunthan V N 		dev_err(priv->dev, "phy %s not found on slave %d\n",
461df828598SMugunthan V N 			slave->data->phy_id, slave->slave_num);
462df828598SMugunthan V N 		slave->phy = NULL;
463df828598SMugunthan V N 	} else {
464df828598SMugunthan V N 		dev_info(priv->dev, "phy found : id is : 0x%x\n",
465df828598SMugunthan V N 			 slave->phy->phy_id);
466df828598SMugunthan V N 		phy_start(slave->phy);
467df828598SMugunthan V N 	}
468df828598SMugunthan V N }
469df828598SMugunthan V N 
470df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv)
471df828598SMugunthan V N {
472df828598SMugunthan V N 	/* soft reset the controller and initialize ale */
473df828598SMugunthan V N 	soft_reset("cpsw", &priv->regs->soft_reset);
474df828598SMugunthan V N 	cpsw_ale_start(priv->ale);
475df828598SMugunthan V N 
476df828598SMugunthan V N 	/* switch to vlan unaware mode */
477df828598SMugunthan V N 	cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0);
478df828598SMugunthan V N 
479df828598SMugunthan V N 	/* setup host port priority mapping */
480df828598SMugunthan V N 	__raw_writel(CPDMA_TX_PRIORITY_MAP,
481df828598SMugunthan V N 		     &priv->host_port_regs->cpdma_tx_pri_map);
482df828598SMugunthan V N 	__raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map);
483df828598SMugunthan V N 
484df828598SMugunthan V N 	cpsw_ale_control_set(priv->ale, priv->host_port,
485df828598SMugunthan V N 			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
486df828598SMugunthan V N 
487df828598SMugunthan V N 	cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port, 0);
488df828598SMugunthan V N 	cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
489df828598SMugunthan V N 			   1 << priv->host_port, 0, ALE_MCAST_FWD_2);
490df828598SMugunthan V N }
491df828598SMugunthan V N 
492df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev)
493df828598SMugunthan V N {
494df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
495df828598SMugunthan V N 	int i, ret;
496df828598SMugunthan V N 	u32 reg;
497df828598SMugunthan V N 
498df828598SMugunthan V N 	cpsw_intr_disable(priv);
499df828598SMugunthan V N 	netif_carrier_off(ndev);
500df828598SMugunthan V N 
501f150bd7fSMugunthan V N 	pm_runtime_get_sync(&priv->pdev->dev);
502df828598SMugunthan V N 
503df828598SMugunthan V N 	reg = __raw_readl(&priv->regs->id_ver);
504df828598SMugunthan V N 
505df828598SMugunthan V N 	dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
506df828598SMugunthan V N 		 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
507df828598SMugunthan V N 		 CPSW_RTL_VERSION(reg));
508df828598SMugunthan V N 
509df828598SMugunthan V N 	/* initialize host and slave ports */
510df828598SMugunthan V N 	cpsw_init_host_port(priv);
511df828598SMugunthan V N 	for_each_slave(priv, cpsw_slave_open, priv);
512df828598SMugunthan V N 
513df828598SMugunthan V N 	/* setup tx dma to fixed prio and zero offset */
514df828598SMugunthan V N 	cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1);
515df828598SMugunthan V N 	cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0);
516df828598SMugunthan V N 
517df828598SMugunthan V N 	/* disable priority elevation and enable statistics on all ports */
518df828598SMugunthan V N 	__raw_writel(0, &priv->regs->ptype);
519df828598SMugunthan V N 
520df828598SMugunthan V N 	/* enable statistics collection only on the host port */
521df828598SMugunthan V N 	__raw_writel(0x7, &priv->regs->stat_port_en);
522df828598SMugunthan V N 
523df828598SMugunthan V N 	if (WARN_ON(!priv->data.rx_descs))
524df828598SMugunthan V N 		priv->data.rx_descs = 128;
525df828598SMugunthan V N 
526df828598SMugunthan V N 	for (i = 0; i < priv->data.rx_descs; i++) {
527df828598SMugunthan V N 		struct sk_buff *skb;
528df828598SMugunthan V N 
529df828598SMugunthan V N 		ret = -ENOMEM;
530df828598SMugunthan V N 		skb = netdev_alloc_skb_ip_align(priv->ndev,
531df828598SMugunthan V N 						priv->rx_packet_max);
532df828598SMugunthan V N 		if (!skb)
533df828598SMugunthan V N 			break;
534df828598SMugunthan V N 		ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
535df828598SMugunthan V N 					skb_tailroom(skb), GFP_KERNEL);
536df828598SMugunthan V N 		if (WARN_ON(ret < 0))
537df828598SMugunthan V N 			break;
538df828598SMugunthan V N 	}
539df828598SMugunthan V N 	/* continue even if we didn't manage to submit all receive descs */
540df828598SMugunthan V N 	cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i);
541df828598SMugunthan V N 
542df828598SMugunthan V N 	cpdma_ctlr_start(priv->dma);
543df828598SMugunthan V N 	cpsw_intr_enable(priv);
544df828598SMugunthan V N 	napi_enable(&priv->napi);
545df828598SMugunthan V N 	cpdma_ctlr_eoi(priv->dma);
546df828598SMugunthan V N 
547df828598SMugunthan V N 	return 0;
548df828598SMugunthan V N }
549df828598SMugunthan V N 
550df828598SMugunthan V N static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv)
551df828598SMugunthan V N {
552df828598SMugunthan V N 	if (!slave->phy)
553df828598SMugunthan V N 		return;
554df828598SMugunthan V N 	phy_stop(slave->phy);
555df828598SMugunthan V N 	phy_disconnect(slave->phy);
556df828598SMugunthan V N 	slave->phy = NULL;
557df828598SMugunthan V N }
558df828598SMugunthan V N 
559df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev)
560df828598SMugunthan V N {
561df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
562df828598SMugunthan V N 
563df828598SMugunthan V N 	cpsw_info(priv, ifdown, "shutting down cpsw device\n");
564df828598SMugunthan V N 	cpsw_intr_disable(priv);
565df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, false);
566df828598SMugunthan V N 	cpdma_ctlr_stop(priv->dma);
567df828598SMugunthan V N 	netif_stop_queue(priv->ndev);
568df828598SMugunthan V N 	napi_disable(&priv->napi);
569df828598SMugunthan V N 	netif_carrier_off(priv->ndev);
570df828598SMugunthan V N 	cpsw_ale_stop(priv->ale);
571df828598SMugunthan V N 	for_each_slave(priv, cpsw_slave_stop, priv);
572f150bd7fSMugunthan V N 	pm_runtime_put_sync(&priv->pdev->dev);
573df828598SMugunthan V N 	return 0;
574df828598SMugunthan V N }
575df828598SMugunthan V N 
576df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
577df828598SMugunthan V N 				       struct net_device *ndev)
578df828598SMugunthan V N {
579df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
580df828598SMugunthan V N 	int ret;
581df828598SMugunthan V N 
582df828598SMugunthan V N 	ndev->trans_start = jiffies;
583df828598SMugunthan V N 
584df828598SMugunthan V N 	if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) {
585df828598SMugunthan V N 		cpsw_err(priv, tx_err, "packet pad failed\n");
586df828598SMugunthan V N 		priv->stats.tx_dropped++;
587df828598SMugunthan V N 		return NETDEV_TX_OK;
588df828598SMugunthan V N 	}
589df828598SMugunthan V N 
590df828598SMugunthan V N 	ret = cpdma_chan_submit(priv->txch, skb, skb->data,
591df828598SMugunthan V N 				skb->len, GFP_KERNEL);
592df828598SMugunthan V N 	if (unlikely(ret != 0)) {
593df828598SMugunthan V N 		cpsw_err(priv, tx_err, "desc submit failed\n");
594df828598SMugunthan V N 		goto fail;
595df828598SMugunthan V N 	}
596df828598SMugunthan V N 
597df828598SMugunthan V N 	return NETDEV_TX_OK;
598df828598SMugunthan V N fail:
599df828598SMugunthan V N 	priv->stats.tx_dropped++;
600df828598SMugunthan V N 	netif_stop_queue(ndev);
601df828598SMugunthan V N 	return NETDEV_TX_BUSY;
602df828598SMugunthan V N }
603df828598SMugunthan V N 
604df828598SMugunthan V N static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags)
605df828598SMugunthan V N {
606df828598SMugunthan V N 	/*
607df828598SMugunthan V N 	 * The switch cannot operate in promiscuous mode without substantial
608df828598SMugunthan V N 	 * headache.  For promiscuous mode to work, we would need to put the
609df828598SMugunthan V N 	 * ALE in bypass mode and route all traffic to the host port.
610df828598SMugunthan V N 	 * Subsequently, the host will need to operate as a "bridge", learn,
611df828598SMugunthan V N 	 * and flood as needed.  For now, we simply complain here and
612df828598SMugunthan V N 	 * do nothing about it :-)
613df828598SMugunthan V N 	 */
614df828598SMugunthan V N 	if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC))
615df828598SMugunthan V N 		dev_err(&ndev->dev, "promiscuity ignored!\n");
616df828598SMugunthan V N 
617df828598SMugunthan V N 	/*
618df828598SMugunthan V N 	 * The switch cannot filter multicast traffic unless it is configured
619df828598SMugunthan V N 	 * in "VLAN Aware" mode.  Unfortunately, VLAN awareness requires a
620df828598SMugunthan V N 	 * whole bunch of additional logic that this driver does not implement
621df828598SMugunthan V N 	 * at present.
622df828598SMugunthan V N 	 */
623df828598SMugunthan V N 	if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI))
624df828598SMugunthan V N 		dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n");
625df828598SMugunthan V N }
626df828598SMugunthan V N 
627df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev)
628df828598SMugunthan V N {
629df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
630df828598SMugunthan V N 
631df828598SMugunthan V N 	cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n");
632df828598SMugunthan V N 	priv->stats.tx_errors++;
633df828598SMugunthan V N 	cpsw_intr_disable(priv);
634df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, false);
635df828598SMugunthan V N 	cpdma_chan_stop(priv->txch);
636df828598SMugunthan V N 	cpdma_chan_start(priv->txch);
637df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, true);
638df828598SMugunthan V N 	cpsw_intr_enable(priv);
639df828598SMugunthan V N 	cpdma_ctlr_eoi(priv->dma);
640df828598SMugunthan V N }
641df828598SMugunthan V N 
642df828598SMugunthan V N static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev)
643df828598SMugunthan V N {
644df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
645df828598SMugunthan V N 	return &priv->stats;
646df828598SMugunthan V N }
647df828598SMugunthan V N 
648df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER
649df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev)
650df828598SMugunthan V N {
651df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
652df828598SMugunthan V N 
653df828598SMugunthan V N 	cpsw_intr_disable(priv);
654df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, false);
655df828598SMugunthan V N 	cpsw_interrupt(ndev->irq, priv);
656df828598SMugunthan V N 	cpdma_ctlr_int_ctrl(priv->dma, true);
657df828598SMugunthan V N 	cpsw_intr_enable(priv);
658df828598SMugunthan V N 	cpdma_ctlr_eoi(priv->dma);
659df828598SMugunthan V N }
660df828598SMugunthan V N #endif
661df828598SMugunthan V N 
662df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = {
663df828598SMugunthan V N 	.ndo_open		= cpsw_ndo_open,
664df828598SMugunthan V N 	.ndo_stop		= cpsw_ndo_stop,
665df828598SMugunthan V N 	.ndo_start_xmit		= cpsw_ndo_start_xmit,
666df828598SMugunthan V N 	.ndo_change_rx_flags	= cpsw_ndo_change_rx_flags,
667df828598SMugunthan V N 	.ndo_validate_addr	= eth_validate_addr,
6685c473ed2SDavid S. Miller 	.ndo_change_mtu		= eth_change_mtu,
669df828598SMugunthan V N 	.ndo_tx_timeout		= cpsw_ndo_tx_timeout,
670df828598SMugunthan V N 	.ndo_get_stats		= cpsw_ndo_get_stats,
671df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER
672df828598SMugunthan V N 	.ndo_poll_controller	= cpsw_ndo_poll_controller,
673df828598SMugunthan V N #endif
674df828598SMugunthan V N };
675df828598SMugunthan V N 
676df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev,
677df828598SMugunthan V N 			     struct ethtool_drvinfo *info)
678df828598SMugunthan V N {
679df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
680df828598SMugunthan V N 	strcpy(info->driver, "TI CPSW Driver v1.0");
681df828598SMugunthan V N 	strcpy(info->version, "1.0");
682df828598SMugunthan V N 	strcpy(info->bus_info, priv->pdev->name);
683df828598SMugunthan V N }
684df828598SMugunthan V N 
685df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev)
686df828598SMugunthan V N {
687df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
688df828598SMugunthan V N 	return priv->msg_enable;
689df828598SMugunthan V N }
690df828598SMugunthan V N 
691df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value)
692df828598SMugunthan V N {
693df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
694df828598SMugunthan V N 	priv->msg_enable = value;
695df828598SMugunthan V N }
696df828598SMugunthan V N 
697df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = {
698df828598SMugunthan V N 	.get_drvinfo	= cpsw_get_drvinfo,
699df828598SMugunthan V N 	.get_msglevel	= cpsw_get_msglevel,
700df828598SMugunthan V N 	.set_msglevel	= cpsw_set_msglevel,
701df828598SMugunthan V N 	.get_link	= ethtool_op_get_link,
702df828598SMugunthan V N };
703df828598SMugunthan V N 
704df828598SMugunthan V N static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
705df828598SMugunthan V N {
706df828598SMugunthan V N 	void __iomem		*regs = priv->regs;
707df828598SMugunthan V N 	int			slave_num = slave->slave_num;
708df828598SMugunthan V N 	struct cpsw_slave_data	*data = priv->data.slave_data + slave_num;
709df828598SMugunthan V N 
710df828598SMugunthan V N 	slave->data	= data;
711df828598SMugunthan V N 	slave->regs	= regs + data->slave_reg_ofs;
712df828598SMugunthan V N 	slave->sliver	= regs + data->sliver_reg_ofs;
713df828598SMugunthan V N }
714df828598SMugunthan V N 
7152eb32b0aSMugunthan V N static int cpsw_probe_dt(struct cpsw_platform_data *data,
7162eb32b0aSMugunthan V N 			 struct platform_device *pdev)
7172eb32b0aSMugunthan V N {
7182eb32b0aSMugunthan V N 	struct device_node *node = pdev->dev.of_node;
7192eb32b0aSMugunthan V N 	struct device_node *slave_node;
7202eb32b0aSMugunthan V N 	int i = 0, ret;
7212eb32b0aSMugunthan V N 	u32 prop;
7222eb32b0aSMugunthan V N 
7232eb32b0aSMugunthan V N 	if (!node)
7242eb32b0aSMugunthan V N 		return -EINVAL;
7252eb32b0aSMugunthan V N 
7262eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "slaves", &prop)) {
7272eb32b0aSMugunthan V N 		pr_err("Missing slaves property in the DT.\n");
7282eb32b0aSMugunthan V N 		return -EINVAL;
7292eb32b0aSMugunthan V N 	}
7302eb32b0aSMugunthan V N 	data->slaves = prop;
7312eb32b0aSMugunthan V N 
7322eb32b0aSMugunthan V N 	data->slave_data = kzalloc(sizeof(struct cpsw_slave_data) *
7332eb32b0aSMugunthan V N 				   data->slaves, GFP_KERNEL);
7342eb32b0aSMugunthan V N 	if (!data->slave_data) {
7352eb32b0aSMugunthan V N 		pr_err("Could not allocate slave memory.\n");
7362eb32b0aSMugunthan V N 		return -EINVAL;
7372eb32b0aSMugunthan V N 	}
7382eb32b0aSMugunthan V N 
7392eb32b0aSMugunthan V N 	data->no_bd_ram = of_property_read_bool(node, "no_bd_ram");
7402eb32b0aSMugunthan V N 
7412eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "cpdma_channels", &prop)) {
7422eb32b0aSMugunthan V N 		pr_err("Missing cpdma_channels property in the DT.\n");
7432eb32b0aSMugunthan V N 		ret = -EINVAL;
7442eb32b0aSMugunthan V N 		goto error_ret;
7452eb32b0aSMugunthan V N 	}
7462eb32b0aSMugunthan V N 	data->channels = prop;
7472eb32b0aSMugunthan V N 
7482eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "host_port_no", &prop)) {
7492eb32b0aSMugunthan V N 		pr_err("Missing host_port_no property in the DT.\n");
7502eb32b0aSMugunthan V N 		ret = -EINVAL;
7512eb32b0aSMugunthan V N 		goto error_ret;
7522eb32b0aSMugunthan V N 	}
7532eb32b0aSMugunthan V N 	data->host_port_num = prop;
7542eb32b0aSMugunthan V N 
7552eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "cpdma_reg_ofs", &prop)) {
7562eb32b0aSMugunthan V N 		pr_err("Missing cpdma_reg_ofs property in the DT.\n");
7572eb32b0aSMugunthan V N 		ret = -EINVAL;
7582eb32b0aSMugunthan V N 		goto error_ret;
7592eb32b0aSMugunthan V N 	}
7602eb32b0aSMugunthan V N 	data->cpdma_reg_ofs = prop;
7612eb32b0aSMugunthan V N 
7622eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "cpdma_sram_ofs", &prop)) {
7632eb32b0aSMugunthan V N 		pr_err("Missing cpdma_sram_ofs property in the DT.\n");
7642eb32b0aSMugunthan V N 		ret = -EINVAL;
7652eb32b0aSMugunthan V N 		goto error_ret;
7662eb32b0aSMugunthan V N 	}
7672eb32b0aSMugunthan V N 	data->cpdma_sram_ofs = prop;
7682eb32b0aSMugunthan V N 
7692eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "ale_reg_ofs", &prop)) {
7702eb32b0aSMugunthan V N 		pr_err("Missing ale_reg_ofs property in the DT.\n");
7712eb32b0aSMugunthan V N 		ret = -EINVAL;
7722eb32b0aSMugunthan V N 		goto error_ret;
7732eb32b0aSMugunthan V N 	}
7742eb32b0aSMugunthan V N 	data->ale_reg_ofs = prop;
7752eb32b0aSMugunthan V N 
7762eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "ale_entries", &prop)) {
7772eb32b0aSMugunthan V N 		pr_err("Missing ale_entries property in the DT.\n");
7782eb32b0aSMugunthan V N 		ret = -EINVAL;
7792eb32b0aSMugunthan V N 		goto error_ret;
7802eb32b0aSMugunthan V N 	}
7812eb32b0aSMugunthan V N 	data->ale_entries = prop;
7822eb32b0aSMugunthan V N 
7832eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "host_port_reg_ofs", &prop)) {
7842eb32b0aSMugunthan V N 		pr_err("Missing host_port_reg_ofs property in the DT.\n");
7852eb32b0aSMugunthan V N 		ret = -EINVAL;
7862eb32b0aSMugunthan V N 		goto error_ret;
7872eb32b0aSMugunthan V N 	}
7882eb32b0aSMugunthan V N 	data->host_port_reg_ofs = prop;
7892eb32b0aSMugunthan V N 
7902eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "hw_stats_reg_ofs", &prop)) {
7912eb32b0aSMugunthan V N 		pr_err("Missing hw_stats_reg_ofs property in the DT.\n");
7922eb32b0aSMugunthan V N 		ret = -EINVAL;
7932eb32b0aSMugunthan V N 		goto error_ret;
7942eb32b0aSMugunthan V N 	}
7952eb32b0aSMugunthan V N 	data->hw_stats_reg_ofs = prop;
7962eb32b0aSMugunthan V N 
7972eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "bd_ram_ofs", &prop)) {
7982eb32b0aSMugunthan V N 		pr_err("Missing bd_ram_ofs property in the DT.\n");
7992eb32b0aSMugunthan V N 		ret = -EINVAL;
8002eb32b0aSMugunthan V N 		goto error_ret;
8012eb32b0aSMugunthan V N 	}
8022eb32b0aSMugunthan V N 	data->bd_ram_ofs = prop;
8032eb32b0aSMugunthan V N 
8042eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "bd_ram_size", &prop)) {
8052eb32b0aSMugunthan V N 		pr_err("Missing bd_ram_size property in the DT.\n");
8062eb32b0aSMugunthan V N 		ret = -EINVAL;
8072eb32b0aSMugunthan V N 		goto error_ret;
8082eb32b0aSMugunthan V N 	}
8092eb32b0aSMugunthan V N 	data->bd_ram_size = prop;
8102eb32b0aSMugunthan V N 
8112eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "rx_descs", &prop)) {
8122eb32b0aSMugunthan V N 		pr_err("Missing rx_descs property in the DT.\n");
8132eb32b0aSMugunthan V N 		ret = -EINVAL;
8142eb32b0aSMugunthan V N 		goto error_ret;
8152eb32b0aSMugunthan V N 	}
8162eb32b0aSMugunthan V N 	data->rx_descs = prop;
8172eb32b0aSMugunthan V N 
8182eb32b0aSMugunthan V N 	if (of_property_read_u32(node, "mac_control", &prop)) {
8192eb32b0aSMugunthan V N 		pr_err("Missing mac_control property in the DT.\n");
8202eb32b0aSMugunthan V N 		ret = -EINVAL;
8212eb32b0aSMugunthan V N 		goto error_ret;
8222eb32b0aSMugunthan V N 	}
8232eb32b0aSMugunthan V N 	data->mac_control = prop;
8242eb32b0aSMugunthan V N 
8252eb32b0aSMugunthan V N 	for_each_child_of_node(node, slave_node) {
8262eb32b0aSMugunthan V N 		struct cpsw_slave_data *slave_data = data->slave_data + i;
8272eb32b0aSMugunthan V N 		const char *phy_id = NULL;
8282eb32b0aSMugunthan V N 		const void *mac_addr = NULL;
8292eb32b0aSMugunthan V N 
8302eb32b0aSMugunthan V N 		if (of_property_read_string(slave_node, "phy_id", &phy_id)) {
8312eb32b0aSMugunthan V N 			pr_err("Missing slave[%d] phy_id property\n", i);
8322eb32b0aSMugunthan V N 			ret = -EINVAL;
8332eb32b0aSMugunthan V N 			goto error_ret;
8342eb32b0aSMugunthan V N 		}
8352eb32b0aSMugunthan V N 		slave_data->phy_id = phy_id;
8362eb32b0aSMugunthan V N 
8372eb32b0aSMugunthan V N 		if (of_property_read_u32(slave_node, "slave_reg_ofs", &prop)) {
8382eb32b0aSMugunthan V N 			pr_err("Missing slave[%d] slave_reg_ofs property\n", i);
8392eb32b0aSMugunthan V N 			ret = -EINVAL;
8402eb32b0aSMugunthan V N 			goto error_ret;
8412eb32b0aSMugunthan V N 		}
8422eb32b0aSMugunthan V N 		slave_data->slave_reg_ofs = prop;
8432eb32b0aSMugunthan V N 
8442eb32b0aSMugunthan V N 		if (of_property_read_u32(slave_node, "sliver_reg_ofs",
8452eb32b0aSMugunthan V N 					 &prop)) {
8462eb32b0aSMugunthan V N 			pr_err("Missing slave[%d] sliver_reg_ofs property\n",
8472eb32b0aSMugunthan V N 				i);
8482eb32b0aSMugunthan V N 			ret = -EINVAL;
8492eb32b0aSMugunthan V N 			goto error_ret;
8502eb32b0aSMugunthan V N 		}
8512eb32b0aSMugunthan V N 		slave_data->sliver_reg_ofs = prop;
8522eb32b0aSMugunthan V N 
8532eb32b0aSMugunthan V N 		mac_addr = of_get_mac_address(slave_node);
8542eb32b0aSMugunthan V N 		if (mac_addr)
8552eb32b0aSMugunthan V N 			memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
8562eb32b0aSMugunthan V N 
8572eb32b0aSMugunthan V N 		i++;
8582eb32b0aSMugunthan V N 	}
8592eb32b0aSMugunthan V N 
8602eb32b0aSMugunthan V N 	return 0;
8612eb32b0aSMugunthan V N 
8622eb32b0aSMugunthan V N error_ret:
8632eb32b0aSMugunthan V N 	kfree(data->slave_data);
8642eb32b0aSMugunthan V N 	return ret;
8652eb32b0aSMugunthan V N }
8662eb32b0aSMugunthan V N 
867df828598SMugunthan V N static int __devinit cpsw_probe(struct platform_device *pdev)
868df828598SMugunthan V N {
869df828598SMugunthan V N 	struct cpsw_platform_data	*data = pdev->dev.platform_data;
870df828598SMugunthan V N 	struct net_device		*ndev;
871df828598SMugunthan V N 	struct cpsw_priv		*priv;
872df828598SMugunthan V N 	struct cpdma_params		dma_params;
873df828598SMugunthan V N 	struct cpsw_ale_params		ale_params;
874df828598SMugunthan V N 	void __iomem			*regs;
875df828598SMugunthan V N 	struct resource			*res;
876df828598SMugunthan V N 	int ret = 0, i, k = 0;
877df828598SMugunthan V N 
878df828598SMugunthan V N 	ndev = alloc_etherdev(sizeof(struct cpsw_priv));
879df828598SMugunthan V N 	if (!ndev) {
880df828598SMugunthan V N 		pr_err("error allocating net_device\n");
881df828598SMugunthan V N 		return -ENOMEM;
882df828598SMugunthan V N 	}
883df828598SMugunthan V N 
884df828598SMugunthan V N 	platform_set_drvdata(pdev, ndev);
885df828598SMugunthan V N 	priv = netdev_priv(ndev);
886df828598SMugunthan V N 	spin_lock_init(&priv->lock);
887df828598SMugunthan V N 	priv->pdev = pdev;
888df828598SMugunthan V N 	priv->ndev = ndev;
889df828598SMugunthan V N 	priv->dev  = &ndev->dev;
890df828598SMugunthan V N 	priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
891df828598SMugunthan V N 	priv->rx_packet_max = max(rx_packet_max, 128);
892df828598SMugunthan V N 
8932eb32b0aSMugunthan V N 	if (cpsw_probe_dt(&priv->data, pdev)) {
8942eb32b0aSMugunthan V N 		pr_err("cpsw: platform data missing\n");
8952eb32b0aSMugunthan V N 		ret = -ENODEV;
8962eb32b0aSMugunthan V N 		goto clean_ndev_ret;
8972eb32b0aSMugunthan V N 	}
8982eb32b0aSMugunthan V N 	data = &priv->data;
8992eb32b0aSMugunthan V N 
900df828598SMugunthan V N 	if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
901df828598SMugunthan V N 		memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
902df828598SMugunthan V N 		pr_info("Detected MACID = %pM", priv->mac_addr);
903df828598SMugunthan V N 	} else {
9047efd26d0SJoe Perches 		eth_random_addr(priv->mac_addr);
905df828598SMugunthan V N 		pr_info("Random MACID = %pM", priv->mac_addr);
906df828598SMugunthan V N 	}
907df828598SMugunthan V N 
908df828598SMugunthan V N 	memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
909df828598SMugunthan V N 
910df828598SMugunthan V N 	priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves,
911df828598SMugunthan V N 			       GFP_KERNEL);
912df828598SMugunthan V N 	if (!priv->slaves) {
913df828598SMugunthan V N 		ret = -EBUSY;
914df828598SMugunthan V N 		goto clean_ndev_ret;
915df828598SMugunthan V N 	}
916df828598SMugunthan V N 	for (i = 0; i < data->slaves; i++)
917df828598SMugunthan V N 		priv->slaves[i].slave_num = i;
918df828598SMugunthan V N 
919f150bd7fSMugunthan V N 	pm_runtime_enable(&pdev->dev);
920f150bd7fSMugunthan V N 	priv->clk = clk_get(&pdev->dev, "fck");
921df828598SMugunthan V N 	if (IS_ERR(priv->clk)) {
922f150bd7fSMugunthan V N 		dev_err(&pdev->dev, "fck is not found\n");
923f150bd7fSMugunthan V N 		ret = -ENODEV;
924f150bd7fSMugunthan V N 		goto clean_slave_ret;
925df828598SMugunthan V N 	}
926df828598SMugunthan V N 
927df828598SMugunthan V N 	priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
928df828598SMugunthan V N 	if (!priv->cpsw_res) {
929df828598SMugunthan V N 		dev_err(priv->dev, "error getting i/o resource\n");
930df828598SMugunthan V N 		ret = -ENOENT;
931df828598SMugunthan V N 		goto clean_clk_ret;
932df828598SMugunthan V N 	}
933df828598SMugunthan V N 
934df828598SMugunthan V N 	if (!request_mem_region(priv->cpsw_res->start,
935df828598SMugunthan V N 				resource_size(priv->cpsw_res), ndev->name)) {
936df828598SMugunthan V N 		dev_err(priv->dev, "failed request i/o region\n");
937df828598SMugunthan V N 		ret = -ENXIO;
938df828598SMugunthan V N 		goto clean_clk_ret;
939df828598SMugunthan V N 	}
940df828598SMugunthan V N 
941df828598SMugunthan V N 	regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
942df828598SMugunthan V N 	if (!regs) {
943df828598SMugunthan V N 		dev_err(priv->dev, "unable to map i/o region\n");
944df828598SMugunthan V N 		goto clean_cpsw_iores_ret;
945df828598SMugunthan V N 	}
946df828598SMugunthan V N 	priv->regs = regs;
947df828598SMugunthan V N 	priv->host_port = data->host_port_num;
948df828598SMugunthan V N 	priv->host_port_regs = regs + data->host_port_reg_ofs;
949df828598SMugunthan V N 
950df828598SMugunthan V N 	priv->cpsw_ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
951df828598SMugunthan V N 	if (!priv->cpsw_ss_res) {
952df828598SMugunthan V N 		dev_err(priv->dev, "error getting i/o resource\n");
953df828598SMugunthan V N 		ret = -ENOENT;
954df828598SMugunthan V N 		goto clean_clk_ret;
955df828598SMugunthan V N 	}
956df828598SMugunthan V N 
957df828598SMugunthan V N 	if (!request_mem_region(priv->cpsw_ss_res->start,
958df828598SMugunthan V N 			resource_size(priv->cpsw_ss_res), ndev->name)) {
959df828598SMugunthan V N 		dev_err(priv->dev, "failed request i/o region\n");
960df828598SMugunthan V N 		ret = -ENXIO;
961df828598SMugunthan V N 		goto clean_clk_ret;
962df828598SMugunthan V N 	}
963df828598SMugunthan V N 
964df828598SMugunthan V N 	regs = ioremap(priv->cpsw_ss_res->start,
965df828598SMugunthan V N 				resource_size(priv->cpsw_ss_res));
966df828598SMugunthan V N 	if (!regs) {
967df828598SMugunthan V N 		dev_err(priv->dev, "unable to map i/o region\n");
968df828598SMugunthan V N 		goto clean_cpsw_ss_iores_ret;
969df828598SMugunthan V N 	}
970df828598SMugunthan V N 	priv->ss_regs = regs;
971df828598SMugunthan V N 
972df828598SMugunthan V N 	for_each_slave(priv, cpsw_slave_init, priv);
973df828598SMugunthan V N 
974df828598SMugunthan V N 	memset(&dma_params, 0, sizeof(dma_params));
975df828598SMugunthan V N 	dma_params.dev		= &pdev->dev;
976df828598SMugunthan V N 	dma_params.dmaregs	= cpsw_dma_regs((u32)priv->regs,
977df828598SMugunthan V N 						data->cpdma_reg_ofs);
978df828598SMugunthan V N 	dma_params.rxthresh	= cpsw_dma_rxthresh((u32)priv->regs,
979df828598SMugunthan V N 						    data->cpdma_reg_ofs);
980df828598SMugunthan V N 	dma_params.rxfree	= cpsw_dma_rxfree((u32)priv->regs,
981df828598SMugunthan V N 						  data->cpdma_reg_ofs);
982df828598SMugunthan V N 	dma_params.txhdp	= cpsw_dma_txhdp((u32)priv->regs,
983df828598SMugunthan V N 						 data->cpdma_sram_ofs);
984df828598SMugunthan V N 	dma_params.rxhdp	= cpsw_dma_rxhdp((u32)priv->regs,
985df828598SMugunthan V N 						 data->cpdma_sram_ofs);
986df828598SMugunthan V N 	dma_params.txcp		= cpsw_dma_txcp((u32)priv->regs,
987df828598SMugunthan V N 						data->cpdma_sram_ofs);
988df828598SMugunthan V N 	dma_params.rxcp		= cpsw_dma_rxcp((u32)priv->regs,
989df828598SMugunthan V N 						data->cpdma_sram_ofs);
990df828598SMugunthan V N 
991df828598SMugunthan V N 	dma_params.num_chan		= data->channels;
992df828598SMugunthan V N 	dma_params.has_soft_reset	= true;
993df828598SMugunthan V N 	dma_params.min_packet_size	= CPSW_MIN_PACKET_SIZE;
994df828598SMugunthan V N 	dma_params.desc_mem_size	= data->bd_ram_size;
995df828598SMugunthan V N 	dma_params.desc_align		= 16;
996df828598SMugunthan V N 	dma_params.has_ext_regs		= true;
997df828598SMugunthan V N 	dma_params.desc_mem_phys        = data->no_bd_ram ? 0 :
998df828598SMugunthan V N 			(u32 __force)priv->cpsw_res->start + data->bd_ram_ofs;
999df828598SMugunthan V N 	dma_params.desc_hw_addr         = data->hw_ram_addr ?
1000df828598SMugunthan V N 			data->hw_ram_addr : dma_params.desc_mem_phys ;
1001df828598SMugunthan V N 
1002df828598SMugunthan V N 	priv->dma = cpdma_ctlr_create(&dma_params);
1003df828598SMugunthan V N 	if (!priv->dma) {
1004df828598SMugunthan V N 		dev_err(priv->dev, "error initializing dma\n");
1005df828598SMugunthan V N 		ret = -ENOMEM;
1006df828598SMugunthan V N 		goto clean_iomap_ret;
1007df828598SMugunthan V N 	}
1008df828598SMugunthan V N 
1009df828598SMugunthan V N 	priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0),
1010df828598SMugunthan V N 				       cpsw_tx_handler);
1011df828598SMugunthan V N 	priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0),
1012df828598SMugunthan V N 				       cpsw_rx_handler);
1013df828598SMugunthan V N 
1014df828598SMugunthan V N 	if (WARN_ON(!priv->txch || !priv->rxch)) {
1015df828598SMugunthan V N 		dev_err(priv->dev, "error initializing dma channels\n");
1016df828598SMugunthan V N 		ret = -ENOMEM;
1017df828598SMugunthan V N 		goto clean_dma_ret;
1018df828598SMugunthan V N 	}
1019df828598SMugunthan V N 
1020df828598SMugunthan V N 	memset(&ale_params, 0, sizeof(ale_params));
1021df828598SMugunthan V N 	ale_params.dev			= &ndev->dev;
1022df828598SMugunthan V N 	ale_params.ale_regs		= (void *)((u32)priv->regs) +
1023df828598SMugunthan V N 						((u32)data->ale_reg_ofs);
1024df828598SMugunthan V N 	ale_params.ale_ageout		= ale_ageout;
1025df828598SMugunthan V N 	ale_params.ale_entries		= data->ale_entries;
1026df828598SMugunthan V N 	ale_params.ale_ports		= data->slaves;
1027df828598SMugunthan V N 
1028df828598SMugunthan V N 	priv->ale = cpsw_ale_create(&ale_params);
1029df828598SMugunthan V N 	if (!priv->ale) {
1030df828598SMugunthan V N 		dev_err(priv->dev, "error initializing ale engine\n");
1031df828598SMugunthan V N 		ret = -ENODEV;
1032df828598SMugunthan V N 		goto clean_dma_ret;
1033df828598SMugunthan V N 	}
1034df828598SMugunthan V N 
1035df828598SMugunthan V N 	ndev->irq = platform_get_irq(pdev, 0);
1036df828598SMugunthan V N 	if (ndev->irq < 0) {
1037df828598SMugunthan V N 		dev_err(priv->dev, "error getting irq resource\n");
1038df828598SMugunthan V N 		ret = -ENOENT;
1039df828598SMugunthan V N 		goto clean_ale_ret;
1040df828598SMugunthan V N 	}
1041df828598SMugunthan V N 
1042df828598SMugunthan V N 	while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) {
1043df828598SMugunthan V N 		for (i = res->start; i <= res->end; i++) {
1044df828598SMugunthan V N 			if (request_irq(i, cpsw_interrupt, IRQF_DISABLED,
1045df828598SMugunthan V N 					dev_name(&pdev->dev), priv)) {
1046df828598SMugunthan V N 				dev_err(priv->dev, "error attaching irq\n");
1047df828598SMugunthan V N 				goto clean_ale_ret;
1048df828598SMugunthan V N 			}
1049df828598SMugunthan V N 			priv->irqs_table[k] = i;
1050df828598SMugunthan V N 			priv->num_irqs = k;
1051df828598SMugunthan V N 		}
1052df828598SMugunthan V N 		k++;
1053df828598SMugunthan V N 	}
1054df828598SMugunthan V N 
1055df828598SMugunthan V N 	ndev->flags |= IFF_ALLMULTI;	/* see cpsw_ndo_change_rx_flags() */
1056df828598SMugunthan V N 
1057df828598SMugunthan V N 	ndev->netdev_ops = &cpsw_netdev_ops;
1058df828598SMugunthan V N 	SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops);
1059df828598SMugunthan V N 	netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT);
1060df828598SMugunthan V N 
1061df828598SMugunthan V N 	/* register the network device */
1062df828598SMugunthan V N 	SET_NETDEV_DEV(ndev, &pdev->dev);
1063df828598SMugunthan V N 	ret = register_netdev(ndev);
1064df828598SMugunthan V N 	if (ret) {
1065df828598SMugunthan V N 		dev_err(priv->dev, "error registering net device\n");
1066df828598SMugunthan V N 		ret = -ENODEV;
1067df828598SMugunthan V N 		goto clean_irq_ret;
1068df828598SMugunthan V N 	}
1069df828598SMugunthan V N 
1070df828598SMugunthan V N 	cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n",
1071df828598SMugunthan V N 		  priv->cpsw_res->start, ndev->irq);
1072df828598SMugunthan V N 
1073df828598SMugunthan V N 	return 0;
1074df828598SMugunthan V N 
1075df828598SMugunthan V N clean_irq_ret:
1076df828598SMugunthan V N 	free_irq(ndev->irq, priv);
1077df828598SMugunthan V N clean_ale_ret:
1078df828598SMugunthan V N 	cpsw_ale_destroy(priv->ale);
1079df828598SMugunthan V N clean_dma_ret:
1080df828598SMugunthan V N 	cpdma_chan_destroy(priv->txch);
1081df828598SMugunthan V N 	cpdma_chan_destroy(priv->rxch);
1082df828598SMugunthan V N 	cpdma_ctlr_destroy(priv->dma);
1083df828598SMugunthan V N clean_iomap_ret:
1084df828598SMugunthan V N 	iounmap(priv->regs);
1085df828598SMugunthan V N clean_cpsw_ss_iores_ret:
1086df828598SMugunthan V N 	release_mem_region(priv->cpsw_ss_res->start,
1087df828598SMugunthan V N 			   resource_size(priv->cpsw_ss_res));
1088df828598SMugunthan V N clean_cpsw_iores_ret:
1089df828598SMugunthan V N 	release_mem_region(priv->cpsw_res->start,
1090df828598SMugunthan V N 			   resource_size(priv->cpsw_res));
1091df828598SMugunthan V N clean_clk_ret:
1092df828598SMugunthan V N 	clk_put(priv->clk);
1093f150bd7fSMugunthan V N clean_slave_ret:
1094f150bd7fSMugunthan V N 	pm_runtime_disable(&pdev->dev);
1095df828598SMugunthan V N 	kfree(priv->slaves);
1096df828598SMugunthan V N clean_ndev_ret:
1097df828598SMugunthan V N 	free_netdev(ndev);
1098df828598SMugunthan V N 	return ret;
1099df828598SMugunthan V N }
1100df828598SMugunthan V N 
1101df828598SMugunthan V N static int __devexit cpsw_remove(struct platform_device *pdev)
1102df828598SMugunthan V N {
1103df828598SMugunthan V N 	struct net_device *ndev = platform_get_drvdata(pdev);
1104df828598SMugunthan V N 	struct cpsw_priv *priv = netdev_priv(ndev);
1105df828598SMugunthan V N 
1106df828598SMugunthan V N 	pr_info("removing device");
1107df828598SMugunthan V N 	platform_set_drvdata(pdev, NULL);
1108df828598SMugunthan V N 
1109df828598SMugunthan V N 	free_irq(ndev->irq, priv);
1110df828598SMugunthan V N 	cpsw_ale_destroy(priv->ale);
1111df828598SMugunthan V N 	cpdma_chan_destroy(priv->txch);
1112df828598SMugunthan V N 	cpdma_chan_destroy(priv->rxch);
1113df828598SMugunthan V N 	cpdma_ctlr_destroy(priv->dma);
1114df828598SMugunthan V N 	iounmap(priv->regs);
1115df828598SMugunthan V N 	release_mem_region(priv->cpsw_res->start,
1116df828598SMugunthan V N 			   resource_size(priv->cpsw_res));
1117df828598SMugunthan V N 	release_mem_region(priv->cpsw_ss_res->start,
1118df828598SMugunthan V N 			   resource_size(priv->cpsw_ss_res));
1119f150bd7fSMugunthan V N 	pm_runtime_disable(&pdev->dev);
1120df828598SMugunthan V N 	clk_put(priv->clk);
1121df828598SMugunthan V N 	kfree(priv->slaves);
1122df828598SMugunthan V N 	free_netdev(ndev);
1123df828598SMugunthan V N 
1124df828598SMugunthan V N 	return 0;
1125df828598SMugunthan V N }
1126df828598SMugunthan V N 
1127df828598SMugunthan V N static int cpsw_suspend(struct device *dev)
1128df828598SMugunthan V N {
1129df828598SMugunthan V N 	struct platform_device	*pdev = to_platform_device(dev);
1130df828598SMugunthan V N 	struct net_device	*ndev = platform_get_drvdata(pdev);
1131df828598SMugunthan V N 
1132df828598SMugunthan V N 	if (netif_running(ndev))
1133df828598SMugunthan V N 		cpsw_ndo_stop(ndev);
1134f150bd7fSMugunthan V N 	pm_runtime_put_sync(&pdev->dev);
1135f150bd7fSMugunthan V N 
1136df828598SMugunthan V N 	return 0;
1137df828598SMugunthan V N }
1138df828598SMugunthan V N 
1139df828598SMugunthan V N static int cpsw_resume(struct device *dev)
1140df828598SMugunthan V N {
1141df828598SMugunthan V N 	struct platform_device	*pdev = to_platform_device(dev);
1142df828598SMugunthan V N 	struct net_device	*ndev = platform_get_drvdata(pdev);
1143df828598SMugunthan V N 
1144f150bd7fSMugunthan V N 	pm_runtime_get_sync(&pdev->dev);
1145df828598SMugunthan V N 	if (netif_running(ndev))
1146df828598SMugunthan V N 		cpsw_ndo_open(ndev);
1147df828598SMugunthan V N 	return 0;
1148df828598SMugunthan V N }
1149df828598SMugunthan V N 
1150df828598SMugunthan V N static const struct dev_pm_ops cpsw_pm_ops = {
1151df828598SMugunthan V N 	.suspend	= cpsw_suspend,
1152df828598SMugunthan V N 	.resume		= cpsw_resume,
1153df828598SMugunthan V N };
1154df828598SMugunthan V N 
11552eb32b0aSMugunthan V N static const struct of_device_id cpsw_of_mtable[] = {
11562eb32b0aSMugunthan V N 	{ .compatible = "ti,cpsw", },
11572eb32b0aSMugunthan V N 	{ /* sentinel */ },
11582eb32b0aSMugunthan V N };
11592eb32b0aSMugunthan V N 
1160df828598SMugunthan V N static struct platform_driver cpsw_driver = {
1161df828598SMugunthan V N 	.driver = {
1162df828598SMugunthan V N 		.name	 = "cpsw",
1163df828598SMugunthan V N 		.owner	 = THIS_MODULE,
1164df828598SMugunthan V N 		.pm	 = &cpsw_pm_ops,
11652eb32b0aSMugunthan V N 		.of_match_table = of_match_ptr(cpsw_of_mtable),
1166df828598SMugunthan V N 	},
1167df828598SMugunthan V N 	.probe = cpsw_probe,
1168df828598SMugunthan V N 	.remove = __devexit_p(cpsw_remove),
1169df828598SMugunthan V N };
1170df828598SMugunthan V N 
1171df828598SMugunthan V N static int __init cpsw_init(void)
1172df828598SMugunthan V N {
1173df828598SMugunthan V N 	return platform_driver_register(&cpsw_driver);
1174df828598SMugunthan V N }
1175df828598SMugunthan V N late_initcall(cpsw_init);
1176df828598SMugunthan V N 
1177df828598SMugunthan V N static void __exit cpsw_exit(void)
1178df828598SMugunthan V N {
1179df828598SMugunthan V N 	platform_driver_unregister(&cpsw_driver);
1180df828598SMugunthan V N }
1181df828598SMugunthan V N module_exit(cpsw_exit);
1182df828598SMugunthan V N 
1183df828598SMugunthan V N MODULE_LICENSE("GPL");
1184df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
1185df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
1186df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver");
1187