1df828598SMugunthan V N /* 2df828598SMugunthan V N * Texas Instruments Ethernet Switch Driver 3df828598SMugunthan V N * 4df828598SMugunthan V N * Copyright (C) 2012 Texas Instruments 5df828598SMugunthan V N * 6df828598SMugunthan V N * This program is free software; you can redistribute it and/or 7df828598SMugunthan V N * modify it under the terms of the GNU General Public License as 8df828598SMugunthan V N * published by the Free Software Foundation version 2. 9df828598SMugunthan V N * 10df828598SMugunthan V N * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11df828598SMugunthan V N * kind, whether express or implied; without even the implied warranty 12df828598SMugunthan V N * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13df828598SMugunthan V N * GNU General Public License for more details. 14df828598SMugunthan V N */ 15df828598SMugunthan V N 16df828598SMugunthan V N #include <linux/kernel.h> 17df828598SMugunthan V N #include <linux/io.h> 18df828598SMugunthan V N #include <linux/clk.h> 19df828598SMugunthan V N #include <linux/timer.h> 20df828598SMugunthan V N #include <linux/module.h> 21df828598SMugunthan V N #include <linux/platform_device.h> 22df828598SMugunthan V N #include <linux/irqreturn.h> 23df828598SMugunthan V N #include <linux/interrupt.h> 24df828598SMugunthan V N #include <linux/if_ether.h> 25df828598SMugunthan V N #include <linux/etherdevice.h> 26df828598SMugunthan V N #include <linux/netdevice.h> 272e5b38abSRichard Cochran #include <linux/net_tstamp.h> 28df828598SMugunthan V N #include <linux/phy.h> 29df828598SMugunthan V N #include <linux/workqueue.h> 30df828598SMugunthan V N #include <linux/delay.h> 31f150bd7fSMugunthan V N #include <linux/pm_runtime.h> 321d147ccbSMugunthan V N #include <linux/gpio.h> 332eb32b0aSMugunthan V N #include <linux/of.h> 349e42f715SHeiko Schocher #include <linux/of_mdio.h> 352eb32b0aSMugunthan V N #include <linux/of_net.h> 362eb32b0aSMugunthan V N #include <linux/of_device.h> 373b72c2feSMugunthan V N #include <linux/if_vlan.h> 38df828598SMugunthan V N 39739683b4SMugunthan V N #include <linux/pinctrl/consumer.h> 40df828598SMugunthan V N 41dbe34724SMugunthan V N #include "cpsw.h" 42df828598SMugunthan V N #include "cpsw_ale.h" 432e5b38abSRichard Cochran #include "cpts.h" 44df828598SMugunthan V N #include "davinci_cpdma.h" 45df828598SMugunthan V N 46df828598SMugunthan V N #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 47df828598SMugunthan V N NETIF_MSG_DRV | NETIF_MSG_LINK | \ 48df828598SMugunthan V N NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 49df828598SMugunthan V N NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 50df828598SMugunthan V N NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 51df828598SMugunthan V N NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 52df828598SMugunthan V N NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 53df828598SMugunthan V N NETIF_MSG_RX_STATUS) 54df828598SMugunthan V N 55df828598SMugunthan V N #define cpsw_info(priv, type, format, ...) \ 56df828598SMugunthan V N do { \ 57df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 58df828598SMugunthan V N dev_info(priv->dev, format, ## __VA_ARGS__); \ 59df828598SMugunthan V N } while (0) 60df828598SMugunthan V N 61df828598SMugunthan V N #define cpsw_err(priv, type, format, ...) \ 62df828598SMugunthan V N do { \ 63df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 64df828598SMugunthan V N dev_err(priv->dev, format, ## __VA_ARGS__); \ 65df828598SMugunthan V N } while (0) 66df828598SMugunthan V N 67df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...) \ 68df828598SMugunthan V N do { \ 69df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 70df828598SMugunthan V N dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 71df828598SMugunthan V N } while (0) 72df828598SMugunthan V N 73df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...) \ 74df828598SMugunthan V N do { \ 75df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 76df828598SMugunthan V N dev_notice(priv->dev, format, ## __VA_ARGS__); \ 77df828598SMugunthan V N } while (0) 78df828598SMugunthan V N 795c50a856SMugunthan V N #define ALE_ALL_PORTS 0x7 805c50a856SMugunthan V N 81df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 82df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 83df828598SMugunthan V N #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 84df828598SMugunthan V N 85e90cfac6SRichard Cochran #define CPSW_VERSION_1 0x19010a 86e90cfac6SRichard Cochran #define CPSW_VERSION_2 0x19010c 87c193f365SMugunthan V N #define CPSW_VERSION_3 0x19010f 88926489beSMugunthan V N #define CPSW_VERSION_4 0x190112 89549985eeSRichard Cochran 90549985eeSRichard Cochran #define HOST_PORT_NUM 0 91549985eeSRichard Cochran #define SLIVER_SIZE 0x40 92549985eeSRichard Cochran 93549985eeSRichard Cochran #define CPSW1_HOST_PORT_OFFSET 0x028 94549985eeSRichard Cochran #define CPSW1_SLAVE_OFFSET 0x050 95549985eeSRichard Cochran #define CPSW1_SLAVE_SIZE 0x040 96549985eeSRichard Cochran #define CPSW1_CPDMA_OFFSET 0x100 97549985eeSRichard Cochran #define CPSW1_STATERAM_OFFSET 0x200 98d9718546SMugunthan V N #define CPSW1_HW_STATS 0x400 99549985eeSRichard Cochran #define CPSW1_CPTS_OFFSET 0x500 100549985eeSRichard Cochran #define CPSW1_ALE_OFFSET 0x600 101549985eeSRichard Cochran #define CPSW1_SLIVER_OFFSET 0x700 102549985eeSRichard Cochran 103549985eeSRichard Cochran #define CPSW2_HOST_PORT_OFFSET 0x108 104549985eeSRichard Cochran #define CPSW2_SLAVE_OFFSET 0x200 105549985eeSRichard Cochran #define CPSW2_SLAVE_SIZE 0x100 106549985eeSRichard Cochran #define CPSW2_CPDMA_OFFSET 0x800 107d9718546SMugunthan V N #define CPSW2_HW_STATS 0x900 108549985eeSRichard Cochran #define CPSW2_STATERAM_OFFSET 0xa00 109549985eeSRichard Cochran #define CPSW2_CPTS_OFFSET 0xc00 110549985eeSRichard Cochran #define CPSW2_ALE_OFFSET 0xd00 111549985eeSRichard Cochran #define CPSW2_SLIVER_OFFSET 0xd80 112549985eeSRichard Cochran #define CPSW2_BD_OFFSET 0x2000 113549985eeSRichard Cochran 114df828598SMugunthan V N #define CPDMA_RXTHRESH 0x0c0 115df828598SMugunthan V N #define CPDMA_RXFREE 0x0e0 116df828598SMugunthan V N #define CPDMA_TXHDP 0x00 117df828598SMugunthan V N #define CPDMA_RXHDP 0x20 118df828598SMugunthan V N #define CPDMA_TXCP 0x40 119df828598SMugunthan V N #define CPDMA_RXCP 0x60 120df828598SMugunthan V N 121df828598SMugunthan V N #define CPSW_POLL_WEIGHT 64 1229421c901SGrygorii Strashko #define CPSW_MIN_PACKET_SIZE (VLAN_ETH_ZLEN) 1239421c901SGrygorii Strashko #define CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 124df828598SMugunthan V N 125df828598SMugunthan V N #define RX_PRIORITY_MAPPING 0x76543210 126df828598SMugunthan V N #define TX_PRIORITY_MAPPING 0x33221100 127e05107e6SIvan Khoronzhuk #define CPDMA_TX_PRIORITY_MAP 0x01234567 128df828598SMugunthan V N 1293b72c2feSMugunthan V N #define CPSW_VLAN_AWARE BIT(1) 1303b72c2feSMugunthan V N #define CPSW_ALE_VLAN_AWARE 1 1313b72c2feSMugunthan V N 13235717d8dSJohn Ogness #define CPSW_FIFO_NORMAL_MODE (0 << 16) 13335717d8dSJohn Ogness #define CPSW_FIFO_DUAL_MAC_MODE (1 << 16) 13435717d8dSJohn Ogness #define CPSW_FIFO_RATE_LIMIT_MODE (2 << 16) 135d9ba8f9eSMugunthan V N 136ff5b8ef2SMugunthan V N #define CPSW_INTPACEEN (0x3f << 16) 137ff5b8ef2SMugunthan V N #define CPSW_INTPRESCALE_MASK (0x7FF << 0) 138ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_CNT 63 139ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_CNT 2 140ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_INTVL (1000 / CPSW_CMINTMIN_CNT) 141ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_INTVL ((1000 / CPSW_CMINTMAX_CNT) + 1) 142ff5b8ef2SMugunthan V N 143606f3993SIvan Khoronzhuk #define cpsw_slave_index(cpsw, priv) \ 144606f3993SIvan Khoronzhuk ((cpsw->data.dual_emac) ? priv->emac_port : \ 145606f3993SIvan Khoronzhuk cpsw->data.active_slave) 146e38b5a3dSIvan Khoronzhuk #define IRQ_NUM 2 147e05107e6SIvan Khoronzhuk #define CPSW_MAX_QUEUES 8 14890225bf0SGrygorii Strashko #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 149d3bb9c58SMugunthan V N 150df828598SMugunthan V N static int debug_level; 151df828598SMugunthan V N module_param(debug_level, int, 0); 152df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 153df828598SMugunthan V N 154df828598SMugunthan V N static int ale_ageout = 10; 155df828598SMugunthan V N module_param(ale_ageout, int, 0); 156df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 157df828598SMugunthan V N 158df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 159df828598SMugunthan V N module_param(rx_packet_max, int, 0); 160df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 161df828598SMugunthan V N 16290225bf0SGrygorii Strashko static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT; 16390225bf0SGrygorii Strashko module_param(descs_pool_size, int, 0444); 16490225bf0SGrygorii Strashko MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool"); 16590225bf0SGrygorii Strashko 166996a5c27SRichard Cochran struct cpsw_wr_regs { 167df828598SMugunthan V N u32 id_ver; 168df828598SMugunthan V N u32 soft_reset; 169df828598SMugunthan V N u32 control; 170df828598SMugunthan V N u32 int_control; 171df828598SMugunthan V N u32 rx_thresh_en; 172df828598SMugunthan V N u32 rx_en; 173df828598SMugunthan V N u32 tx_en; 174df828598SMugunthan V N u32 misc_en; 175ff5b8ef2SMugunthan V N u32 mem_allign1[8]; 176ff5b8ef2SMugunthan V N u32 rx_thresh_stat; 177ff5b8ef2SMugunthan V N u32 rx_stat; 178ff5b8ef2SMugunthan V N u32 tx_stat; 179ff5b8ef2SMugunthan V N u32 misc_stat; 180ff5b8ef2SMugunthan V N u32 mem_allign2[8]; 181ff5b8ef2SMugunthan V N u32 rx_imax; 182ff5b8ef2SMugunthan V N u32 tx_imax; 183ff5b8ef2SMugunthan V N 184df828598SMugunthan V N }; 185df828598SMugunthan V N 186996a5c27SRichard Cochran struct cpsw_ss_regs { 187df828598SMugunthan V N u32 id_ver; 188df828598SMugunthan V N u32 control; 189df828598SMugunthan V N u32 soft_reset; 190df828598SMugunthan V N u32 stat_port_en; 191df828598SMugunthan V N u32 ptype; 192bd357af2SRichard Cochran u32 soft_idle; 193bd357af2SRichard Cochran u32 thru_rate; 194bd357af2SRichard Cochran u32 gap_thresh; 195bd357af2SRichard Cochran u32 tx_start_wds; 196bd357af2SRichard Cochran u32 flow_control; 197bd357af2SRichard Cochran u32 vlan_ltype; 198bd357af2SRichard Cochran u32 ts_ltype; 199bd357af2SRichard Cochran u32 dlr_ltype; 200df828598SMugunthan V N }; 201df828598SMugunthan V N 2029750a3adSRichard Cochran /* CPSW_PORT_V1 */ 2039750a3adSRichard Cochran #define CPSW1_MAX_BLKS 0x00 /* Maximum FIFO Blocks */ 2049750a3adSRichard Cochran #define CPSW1_BLK_CNT 0x04 /* FIFO Block Usage Count (Read Only) */ 2059750a3adSRichard Cochran #define CPSW1_TX_IN_CTL 0x08 /* Transmit FIFO Control */ 2069750a3adSRichard Cochran #define CPSW1_PORT_VLAN 0x0c /* VLAN Register */ 2079750a3adSRichard Cochran #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 2089750a3adSRichard Cochran #define CPSW1_TS_CTL 0x14 /* Time Sync Control */ 2099750a3adSRichard Cochran #define CPSW1_TS_SEQ_LTYPE 0x18 /* Time Sync Sequence ID Offset and Msg Type */ 2109750a3adSRichard Cochran #define CPSW1_TS_VLAN 0x1c /* Time Sync VLAN1 and VLAN2 */ 2119750a3adSRichard Cochran 2129750a3adSRichard Cochran /* CPSW_PORT_V2 */ 2139750a3adSRichard Cochran #define CPSW2_CONTROL 0x00 /* Control Register */ 2149750a3adSRichard Cochran #define CPSW2_MAX_BLKS 0x08 /* Maximum FIFO Blocks */ 2159750a3adSRichard Cochran #define CPSW2_BLK_CNT 0x0c /* FIFO Block Usage Count (Read Only) */ 2169750a3adSRichard Cochran #define CPSW2_TX_IN_CTL 0x10 /* Transmit FIFO Control */ 2179750a3adSRichard Cochran #define CPSW2_PORT_VLAN 0x14 /* VLAN Register */ 2189750a3adSRichard Cochran #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 2199750a3adSRichard Cochran #define CPSW2_TS_SEQ_MTYPE 0x1c /* Time Sync Sequence ID Offset and Msg Type */ 2209750a3adSRichard Cochran 2219750a3adSRichard Cochran /* CPSW_PORT_V1 and V2 */ 2229750a3adSRichard Cochran #define SA_LO 0x20 /* CPGMAC_SL Source Address Low */ 2239750a3adSRichard Cochran #define SA_HI 0x24 /* CPGMAC_SL Source Address High */ 2249750a3adSRichard Cochran #define SEND_PERCENT 0x28 /* Transmit Queue Send Percentages */ 2259750a3adSRichard Cochran 2269750a3adSRichard Cochran /* CPSW_PORT_V2 only */ 2279750a3adSRichard Cochran #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */ 2289750a3adSRichard Cochran #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */ 2299750a3adSRichard Cochran #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */ 2309750a3adSRichard Cochran #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */ 2319750a3adSRichard Cochran #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */ 2329750a3adSRichard Cochran #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */ 2339750a3adSRichard Cochran #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */ 2349750a3adSRichard Cochran #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */ 2359750a3adSRichard Cochran 2369750a3adSRichard Cochran /* Bit definitions for the CPSW2_CONTROL register */ 2379750a3adSRichard Cochran #define PASS_PRI_TAGGED (1<<24) /* Pass Priority Tagged */ 2389750a3adSRichard Cochran #define VLAN_LTYPE2_EN (1<<21) /* VLAN LTYPE 2 enable */ 2399750a3adSRichard Cochran #define VLAN_LTYPE1_EN (1<<20) /* VLAN LTYPE 1 enable */ 2409750a3adSRichard Cochran #define DSCP_PRI_EN (1<<16) /* DSCP Priority Enable */ 2419750a3adSRichard Cochran #define TS_320 (1<<14) /* Time Sync Dest Port 320 enable */ 2429750a3adSRichard Cochran #define TS_319 (1<<13) /* Time Sync Dest Port 319 enable */ 2439750a3adSRichard Cochran #define TS_132 (1<<12) /* Time Sync Dest IP Addr 132 enable */ 2449750a3adSRichard Cochran #define TS_131 (1<<11) /* Time Sync Dest IP Addr 131 enable */ 2459750a3adSRichard Cochran #define TS_130 (1<<10) /* Time Sync Dest IP Addr 130 enable */ 2469750a3adSRichard Cochran #define TS_129 (1<<9) /* Time Sync Dest IP Addr 129 enable */ 24709c55372SGeorge Cherian #define TS_TTL_NONZERO (1<<8) /* Time Sync Time To Live Non-zero enable */ 24809c55372SGeorge Cherian #define TS_ANNEX_F_EN (1<<6) /* Time Sync Annex F enable */ 2499750a3adSRichard Cochran #define TS_ANNEX_D_EN (1<<4) /* Time Sync Annex D enable */ 2509750a3adSRichard Cochran #define TS_LTYPE2_EN (1<<3) /* Time Sync LTYPE 2 enable */ 2519750a3adSRichard Cochran #define TS_LTYPE1_EN (1<<2) /* Time Sync LTYPE 1 enable */ 2529750a3adSRichard Cochran #define TS_TX_EN (1<<1) /* Time Sync Transmit Enable */ 2539750a3adSRichard Cochran #define TS_RX_EN (1<<0) /* Time Sync Receive Enable */ 2549750a3adSRichard Cochran 25509c55372SGeorge Cherian #define CTRL_V2_TS_BITS \ 25609c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 25709c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_D_EN | TS_LTYPE1_EN) 2589750a3adSRichard Cochran 25909c55372SGeorge Cherian #define CTRL_V2_ALL_TS_MASK (CTRL_V2_TS_BITS | TS_TX_EN | TS_RX_EN) 26009c55372SGeorge Cherian #define CTRL_V2_TX_TS_BITS (CTRL_V2_TS_BITS | TS_TX_EN) 26109c55372SGeorge Cherian #define CTRL_V2_RX_TS_BITS (CTRL_V2_TS_BITS | TS_RX_EN) 26209c55372SGeorge Cherian 26309c55372SGeorge Cherian 26409c55372SGeorge Cherian #define CTRL_V3_TS_BITS \ 26509c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 26609c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\ 26709c55372SGeorge Cherian TS_LTYPE1_EN) 26809c55372SGeorge Cherian 26909c55372SGeorge Cherian #define CTRL_V3_ALL_TS_MASK (CTRL_V3_TS_BITS | TS_TX_EN | TS_RX_EN) 27009c55372SGeorge Cherian #define CTRL_V3_TX_TS_BITS (CTRL_V3_TS_BITS | TS_TX_EN) 27109c55372SGeorge Cherian #define CTRL_V3_RX_TS_BITS (CTRL_V3_TS_BITS | TS_RX_EN) 2729750a3adSRichard Cochran 2739750a3adSRichard Cochran /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */ 2749750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_SHIFT (16) /* Time Sync Sequence ID Offset */ 2759750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_MASK (0x3f) 2769750a3adSRichard Cochran #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */ 2779750a3adSRichard Cochran #define TS_MSG_TYPE_EN_MASK (0xffff) 2789750a3adSRichard Cochran 2799750a3adSRichard Cochran /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 2809750a3adSRichard Cochran #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3)) 281df828598SMugunthan V N 2822e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_CTL register */ 2832e5b38abSRichard Cochran #define CPSW_V1_TS_RX_EN BIT(0) 2842e5b38abSRichard Cochran #define CPSW_V1_TS_TX_EN BIT(4) 2852e5b38abSRichard Cochran #define CPSW_V1_MSG_TYPE_OFS 16 2862e5b38abSRichard Cochran 2872e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */ 2882e5b38abSRichard Cochran #define CPSW_V1_SEQ_ID_OFS_SHIFT 16 2892e5b38abSRichard Cochran 29048f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_TX 15 29148f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_TX_SHIFT 4 29248f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_RX 5 29348f5bcccSGrygorii Strashko 294df828598SMugunthan V N struct cpsw_host_regs { 295df828598SMugunthan V N u32 max_blks; 296df828598SMugunthan V N u32 blk_cnt; 297d9ba8f9eSMugunthan V N u32 tx_in_ctl; 298df828598SMugunthan V N u32 port_vlan; 299df828598SMugunthan V N u32 tx_pri_map; 300df828598SMugunthan V N u32 cpdma_tx_pri_map; 301df828598SMugunthan V N u32 cpdma_rx_chan_map; 302df828598SMugunthan V N }; 303df828598SMugunthan V N 304df828598SMugunthan V N struct cpsw_sliver_regs { 305df828598SMugunthan V N u32 id_ver; 306df828598SMugunthan V N u32 mac_control; 307df828598SMugunthan V N u32 mac_status; 308df828598SMugunthan V N u32 soft_reset; 309df828598SMugunthan V N u32 rx_maxlen; 310df828598SMugunthan V N u32 __reserved_0; 311df828598SMugunthan V N u32 rx_pause; 312df828598SMugunthan V N u32 tx_pause; 313df828598SMugunthan V N u32 __reserved_1; 314df828598SMugunthan V N u32 rx_pri_map; 315df828598SMugunthan V N }; 316df828598SMugunthan V N 317d9718546SMugunthan V N struct cpsw_hw_stats { 318d9718546SMugunthan V N u32 rxgoodframes; 319d9718546SMugunthan V N u32 rxbroadcastframes; 320d9718546SMugunthan V N u32 rxmulticastframes; 321d9718546SMugunthan V N u32 rxpauseframes; 322d9718546SMugunthan V N u32 rxcrcerrors; 323d9718546SMugunthan V N u32 rxaligncodeerrors; 324d9718546SMugunthan V N u32 rxoversizedframes; 325d9718546SMugunthan V N u32 rxjabberframes; 326d9718546SMugunthan V N u32 rxundersizedframes; 327d9718546SMugunthan V N u32 rxfragments; 328d9718546SMugunthan V N u32 __pad_0[2]; 329d9718546SMugunthan V N u32 rxoctets; 330d9718546SMugunthan V N u32 txgoodframes; 331d9718546SMugunthan V N u32 txbroadcastframes; 332d9718546SMugunthan V N u32 txmulticastframes; 333d9718546SMugunthan V N u32 txpauseframes; 334d9718546SMugunthan V N u32 txdeferredframes; 335d9718546SMugunthan V N u32 txcollisionframes; 336d9718546SMugunthan V N u32 txsinglecollframes; 337d9718546SMugunthan V N u32 txmultcollframes; 338d9718546SMugunthan V N u32 txexcessivecollisions; 339d9718546SMugunthan V N u32 txlatecollisions; 340d9718546SMugunthan V N u32 txunderrun; 341d9718546SMugunthan V N u32 txcarriersenseerrors; 342d9718546SMugunthan V N u32 txoctets; 343d9718546SMugunthan V N u32 octetframes64; 344d9718546SMugunthan V N u32 octetframes65t127; 345d9718546SMugunthan V N u32 octetframes128t255; 346d9718546SMugunthan V N u32 octetframes256t511; 347d9718546SMugunthan V N u32 octetframes512t1023; 348d9718546SMugunthan V N u32 octetframes1024tup; 349d9718546SMugunthan V N u32 netoctets; 350d9718546SMugunthan V N u32 rxsofoverruns; 351d9718546SMugunthan V N u32 rxmofoverruns; 352d9718546SMugunthan V N u32 rxdmaoverruns; 353d9718546SMugunthan V N }; 354d9718546SMugunthan V N 3552c8a14d6SGrygorii Strashko struct cpsw_slave_data { 3562c8a14d6SGrygorii Strashko struct device_node *phy_node; 3572c8a14d6SGrygorii Strashko char phy_id[MII_BUS_ID_SIZE]; 3582c8a14d6SGrygorii Strashko int phy_if; 3592c8a14d6SGrygorii Strashko u8 mac_addr[ETH_ALEN]; 3602c8a14d6SGrygorii Strashko u16 dual_emac_res_vlan; /* Reserved VLAN for DualEMAC */ 3612c8a14d6SGrygorii Strashko }; 3622c8a14d6SGrygorii Strashko 3632c8a14d6SGrygorii Strashko struct cpsw_platform_data { 3642c8a14d6SGrygorii Strashko struct cpsw_slave_data *slave_data; 3652c8a14d6SGrygorii Strashko u32 ss_reg_ofs; /* Subsystem control register offset */ 3662c8a14d6SGrygorii Strashko u32 channels; /* number of cpdma channels (symmetric) */ 3672c8a14d6SGrygorii Strashko u32 slaves; /* number of slave cpgmac ports */ 3682c8a14d6SGrygorii Strashko u32 active_slave; /* time stamping, ethtool and SIOCGMIIPHY slave */ 3692c8a14d6SGrygorii Strashko u32 ale_entries; /* ale table size */ 3702c8a14d6SGrygorii Strashko u32 bd_ram_size; /*buffer descriptor ram size */ 3712c8a14d6SGrygorii Strashko u32 mac_control; /* Mac control register */ 3722c8a14d6SGrygorii Strashko u16 default_vlan; /* Def VLAN for ALE lookup in VLAN aware mode*/ 3732c8a14d6SGrygorii Strashko bool dual_emac; /* Enable Dual EMAC mode */ 3742c8a14d6SGrygorii Strashko }; 3752c8a14d6SGrygorii Strashko 376df828598SMugunthan V N struct cpsw_slave { 3779750a3adSRichard Cochran void __iomem *regs; 378df828598SMugunthan V N struct cpsw_sliver_regs __iomem *sliver; 379df828598SMugunthan V N int slave_num; 380df828598SMugunthan V N u32 mac_control; 381df828598SMugunthan V N struct cpsw_slave_data *data; 382df828598SMugunthan V N struct phy_device *phy; 383d9ba8f9eSMugunthan V N struct net_device *ndev; 384d9ba8f9eSMugunthan V N u32 port_vlan; 385df828598SMugunthan V N }; 386df828598SMugunthan V N 3879750a3adSRichard Cochran static inline u32 slave_read(struct cpsw_slave *slave, u32 offset) 3889750a3adSRichard Cochran { 389dda5f5feSGrygorii Strashko return readl_relaxed(slave->regs + offset); 3909750a3adSRichard Cochran } 3919750a3adSRichard Cochran 3929750a3adSRichard Cochran static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset) 3939750a3adSRichard Cochran { 394dda5f5feSGrygorii Strashko writel_relaxed(val, slave->regs + offset); 3959750a3adSRichard Cochran } 3969750a3adSRichard Cochran 3978feb0a19SIvan Khoronzhuk struct cpsw_vector { 3988feb0a19SIvan Khoronzhuk struct cpdma_chan *ch; 3998feb0a19SIvan Khoronzhuk int budget; 4008feb0a19SIvan Khoronzhuk }; 4018feb0a19SIvan Khoronzhuk 402649a1688SIvan Khoronzhuk struct cpsw_common { 40356e31bd8SIvan Khoronzhuk struct device *dev; 404606f3993SIvan Khoronzhuk struct cpsw_platform_data data; 405dbc4ec52SIvan Khoronzhuk struct napi_struct napi_rx; 406dbc4ec52SIvan Khoronzhuk struct napi_struct napi_tx; 4075d8d0d4dSIvan Khoronzhuk struct cpsw_ss_regs __iomem *regs; 4085d8d0d4dSIvan Khoronzhuk struct cpsw_wr_regs __iomem *wr_regs; 4095d8d0d4dSIvan Khoronzhuk u8 __iomem *hw_stats; 4105d8d0d4dSIvan Khoronzhuk struct cpsw_host_regs __iomem *host_port_regs; 4112a05a622SIvan Khoronzhuk u32 version; 4122a05a622SIvan Khoronzhuk u32 coal_intvl; 4132a05a622SIvan Khoronzhuk u32 bus_freq_mhz; 4142a05a622SIvan Khoronzhuk int rx_packet_max; 415606f3993SIvan Khoronzhuk struct cpsw_slave *slaves; 4162c836bd9SIvan Khoronzhuk struct cpdma_ctlr *dma; 4178feb0a19SIvan Khoronzhuk struct cpsw_vector txv[CPSW_MAX_QUEUES]; 4188feb0a19SIvan Khoronzhuk struct cpsw_vector rxv[CPSW_MAX_QUEUES]; 4192a05a622SIvan Khoronzhuk struct cpsw_ale *ale; 420e38b5a3dSIvan Khoronzhuk bool quirk_irq; 421e38b5a3dSIvan Khoronzhuk bool rx_irq_disabled; 422e38b5a3dSIvan Khoronzhuk bool tx_irq_disabled; 423e38b5a3dSIvan Khoronzhuk u32 irqs_table[IRQ_NUM]; 4242a05a622SIvan Khoronzhuk struct cpts *cpts; 425e05107e6SIvan Khoronzhuk int rx_ch_num, tx_ch_num; 4260be01b8eSIvan Khoronzhuk int speed; 427d5bc1613SIvan Khoronzhuk int usage_count; 428649a1688SIvan Khoronzhuk }; 429649a1688SIvan Khoronzhuk 430649a1688SIvan Khoronzhuk struct cpsw_priv { 431df828598SMugunthan V N struct net_device *ndev; 432df828598SMugunthan V N struct device *dev; 433df828598SMugunthan V N u32 msg_enable; 434df828598SMugunthan V N u8 mac_addr[ETH_ALEN]; 4351923d6e4SMugunthan V N bool rx_pause; 4361923d6e4SMugunthan V N bool tx_pause; 437d9ba8f9eSMugunthan V N u32 emac_port; 438649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 439df828598SMugunthan V N }; 440df828598SMugunthan V N 441d9718546SMugunthan V N struct cpsw_stats { 442d9718546SMugunthan V N char stat_string[ETH_GSTRING_LEN]; 443d9718546SMugunthan V N int type; 444d9718546SMugunthan V N int sizeof_stat; 445d9718546SMugunthan V N int stat_offset; 446d9718546SMugunthan V N }; 447d9718546SMugunthan V N 448d9718546SMugunthan V N enum { 449d9718546SMugunthan V N CPSW_STATS, 450d9718546SMugunthan V N CPDMA_RX_STATS, 451d9718546SMugunthan V N CPDMA_TX_STATS, 452d9718546SMugunthan V N }; 453d9718546SMugunthan V N 454d9718546SMugunthan V N #define CPSW_STAT(m) CPSW_STATS, \ 455d9718546SMugunthan V N sizeof(((struct cpsw_hw_stats *)0)->m), \ 456d9718546SMugunthan V N offsetof(struct cpsw_hw_stats, m) 457d9718546SMugunthan V N #define CPDMA_RX_STAT(m) CPDMA_RX_STATS, \ 458d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 459d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 460d9718546SMugunthan V N #define CPDMA_TX_STAT(m) CPDMA_TX_STATS, \ 461d9718546SMugunthan V N sizeof(((struct cpdma_chan_stats *)0)->m), \ 462d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 463d9718546SMugunthan V N 464d9718546SMugunthan V N static const struct cpsw_stats cpsw_gstrings_stats[] = { 465d9718546SMugunthan V N { "Good Rx Frames", CPSW_STAT(rxgoodframes) }, 466d9718546SMugunthan V N { "Broadcast Rx Frames", CPSW_STAT(rxbroadcastframes) }, 467d9718546SMugunthan V N { "Multicast Rx Frames", CPSW_STAT(rxmulticastframes) }, 468d9718546SMugunthan V N { "Pause Rx Frames", CPSW_STAT(rxpauseframes) }, 469d9718546SMugunthan V N { "Rx CRC Errors", CPSW_STAT(rxcrcerrors) }, 470d9718546SMugunthan V N { "Rx Align/Code Errors", CPSW_STAT(rxaligncodeerrors) }, 471d9718546SMugunthan V N { "Oversize Rx Frames", CPSW_STAT(rxoversizedframes) }, 472d9718546SMugunthan V N { "Rx Jabbers", CPSW_STAT(rxjabberframes) }, 473d9718546SMugunthan V N { "Undersize (Short) Rx Frames", CPSW_STAT(rxundersizedframes) }, 474d9718546SMugunthan V N { "Rx Fragments", CPSW_STAT(rxfragments) }, 475d9718546SMugunthan V N { "Rx Octets", CPSW_STAT(rxoctets) }, 476d9718546SMugunthan V N { "Good Tx Frames", CPSW_STAT(txgoodframes) }, 477d9718546SMugunthan V N { "Broadcast Tx Frames", CPSW_STAT(txbroadcastframes) }, 478d9718546SMugunthan V N { "Multicast Tx Frames", CPSW_STAT(txmulticastframes) }, 479d9718546SMugunthan V N { "Pause Tx Frames", CPSW_STAT(txpauseframes) }, 480d9718546SMugunthan V N { "Deferred Tx Frames", CPSW_STAT(txdeferredframes) }, 481d9718546SMugunthan V N { "Collisions", CPSW_STAT(txcollisionframes) }, 482d9718546SMugunthan V N { "Single Collision Tx Frames", CPSW_STAT(txsinglecollframes) }, 483d9718546SMugunthan V N { "Multiple Collision Tx Frames", CPSW_STAT(txmultcollframes) }, 484d9718546SMugunthan V N { "Excessive Collisions", CPSW_STAT(txexcessivecollisions) }, 485d9718546SMugunthan V N { "Late Collisions", CPSW_STAT(txlatecollisions) }, 486d9718546SMugunthan V N { "Tx Underrun", CPSW_STAT(txunderrun) }, 487d9718546SMugunthan V N { "Carrier Sense Errors", CPSW_STAT(txcarriersenseerrors) }, 488d9718546SMugunthan V N { "Tx Octets", CPSW_STAT(txoctets) }, 489d9718546SMugunthan V N { "Rx + Tx 64 Octet Frames", CPSW_STAT(octetframes64) }, 490d9718546SMugunthan V N { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) }, 491d9718546SMugunthan V N { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) }, 492d9718546SMugunthan V N { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) }, 493d9718546SMugunthan V N { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) }, 494d9718546SMugunthan V N { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) }, 495d9718546SMugunthan V N { "Net Octets", CPSW_STAT(netoctets) }, 496d9718546SMugunthan V N { "Rx Start of Frame Overruns", CPSW_STAT(rxsofoverruns) }, 497d9718546SMugunthan V N { "Rx Middle of Frame Overruns", CPSW_STAT(rxmofoverruns) }, 498d9718546SMugunthan V N { "Rx DMA Overruns", CPSW_STAT(rxdmaoverruns) }, 499d9718546SMugunthan V N }; 500d9718546SMugunthan V N 501e05107e6SIvan Khoronzhuk static const struct cpsw_stats cpsw_gstrings_ch_stats[] = { 502e05107e6SIvan Khoronzhuk { "head_enqueue", CPDMA_RX_STAT(head_enqueue) }, 503e05107e6SIvan Khoronzhuk { "tail_enqueue", CPDMA_RX_STAT(tail_enqueue) }, 504e05107e6SIvan Khoronzhuk { "pad_enqueue", CPDMA_RX_STAT(pad_enqueue) }, 505e05107e6SIvan Khoronzhuk { "misqueued", CPDMA_RX_STAT(misqueued) }, 506e05107e6SIvan Khoronzhuk { "desc_alloc_fail", CPDMA_RX_STAT(desc_alloc_fail) }, 507e05107e6SIvan Khoronzhuk { "pad_alloc_fail", CPDMA_RX_STAT(pad_alloc_fail) }, 508e05107e6SIvan Khoronzhuk { "runt_receive_buf", CPDMA_RX_STAT(runt_receive_buff) }, 509e05107e6SIvan Khoronzhuk { "runt_transmit_buf", CPDMA_RX_STAT(runt_transmit_buff) }, 510e05107e6SIvan Khoronzhuk { "empty_dequeue", CPDMA_RX_STAT(empty_dequeue) }, 511e05107e6SIvan Khoronzhuk { "busy_dequeue", CPDMA_RX_STAT(busy_dequeue) }, 512e05107e6SIvan Khoronzhuk { "good_dequeue", CPDMA_RX_STAT(good_dequeue) }, 513e05107e6SIvan Khoronzhuk { "requeue", CPDMA_RX_STAT(requeue) }, 514e05107e6SIvan Khoronzhuk { "teardown_dequeue", CPDMA_RX_STAT(teardown_dequeue) }, 515e05107e6SIvan Khoronzhuk }; 516e05107e6SIvan Khoronzhuk 517e05107e6SIvan Khoronzhuk #define CPSW_STATS_COMMON_LEN ARRAY_SIZE(cpsw_gstrings_stats) 518e05107e6SIvan Khoronzhuk #define CPSW_STATS_CH_LEN ARRAY_SIZE(cpsw_gstrings_ch_stats) 519d9718546SMugunthan V N 520649a1688SIvan Khoronzhuk #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw) 521dbc4ec52SIvan Khoronzhuk #define napi_to_cpsw(napi) container_of(napi, struct cpsw_common, napi) 522df828598SMugunthan V N #define for_each_slave(priv, func, arg...) \ 523df828598SMugunthan V N do { \ 5246e6ceaedSSebastian Siewior struct cpsw_slave *slave; \ 525606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = (priv)->cpsw; \ 5266e6ceaedSSebastian Siewior int n; \ 527606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) \ 528606f3993SIvan Khoronzhuk (func)((cpsw)->slaves + priv->emac_port, ##arg);\ 529d9ba8f9eSMugunthan V N else \ 530606f3993SIvan Khoronzhuk for (n = cpsw->data.slaves, \ 531606f3993SIvan Khoronzhuk slave = cpsw->slaves; \ 5326e6ceaedSSebastian Siewior n; n--) \ 5336e6ceaedSSebastian Siewior (func)(slave++, ##arg); \ 534df828598SMugunthan V N } while (0) 535d9ba8f9eSMugunthan V N 5362a05a622SIvan Khoronzhuk #define cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb) \ 537d9ba8f9eSMugunthan V N do { \ 538606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) \ 539d9ba8f9eSMugunthan V N break; \ 540d9ba8f9eSMugunthan V N if (CPDMA_RX_SOURCE_PORT(status) == 1) { \ 541606f3993SIvan Khoronzhuk ndev = cpsw->slaves[0].ndev; \ 542d9ba8f9eSMugunthan V N skb->dev = ndev; \ 543d9ba8f9eSMugunthan V N } else if (CPDMA_RX_SOURCE_PORT(status) == 2) { \ 544606f3993SIvan Khoronzhuk ndev = cpsw->slaves[1].ndev; \ 545d9ba8f9eSMugunthan V N skb->dev = ndev; \ 546d9ba8f9eSMugunthan V N } \ 547d9ba8f9eSMugunthan V N } while (0) 548606f3993SIvan Khoronzhuk #define cpsw_add_mcast(cpsw, priv, addr) \ 549d9ba8f9eSMugunthan V N do { \ 550606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { \ 551606f3993SIvan Khoronzhuk struct cpsw_slave *slave = cpsw->slaves + \ 552d9ba8f9eSMugunthan V N priv->emac_port; \ 5536f1f5836SIvan Khoronzhuk int slave_port = cpsw_get_slave_port( \ 554d9ba8f9eSMugunthan V N slave->slave_num); \ 5552a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 55671a2cbb7SGrygorii Strashko 1 << slave_port | ALE_PORT_HOST, \ 557d9ba8f9eSMugunthan V N ALE_VLAN, slave->port_vlan, 0); \ 558d9ba8f9eSMugunthan V N } else { \ 5592a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, addr, \ 56061f1cef9SGrygorii Strashko ALE_ALL_PORTS, \ 561d9ba8f9eSMugunthan V N 0, 0, 0); \ 562d9ba8f9eSMugunthan V N } \ 563d9ba8f9eSMugunthan V N } while (0) 564d9ba8f9eSMugunthan V N 5656f1f5836SIvan Khoronzhuk static inline int cpsw_get_slave_port(u32 slave_num) 566d9ba8f9eSMugunthan V N { 567d9ba8f9eSMugunthan V N return slave_num + 1; 568d9ba8f9eSMugunthan V N } 569df828598SMugunthan V N 5700cd8f9ccSMugunthan V N static void cpsw_set_promiscious(struct net_device *ndev, bool enable) 5710cd8f9ccSMugunthan V N { 5722a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 5732a05a622SIvan Khoronzhuk struct cpsw_ale *ale = cpsw->ale; 5740cd8f9ccSMugunthan V N int i; 5750cd8f9ccSMugunthan V N 576606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 5770cd8f9ccSMugunthan V N bool flag = false; 5780cd8f9ccSMugunthan V N 5790cd8f9ccSMugunthan V N /* Enabling promiscuous mode for one interface will be 5800cd8f9ccSMugunthan V N * common for both the interface as the interface shares 5810cd8f9ccSMugunthan V N * the same hardware resource. 5820cd8f9ccSMugunthan V N */ 583606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 584606f3993SIvan Khoronzhuk if (cpsw->slaves[i].ndev->flags & IFF_PROMISC) 5850cd8f9ccSMugunthan V N flag = true; 5860cd8f9ccSMugunthan V N 5870cd8f9ccSMugunthan V N if (!enable && flag) { 5880cd8f9ccSMugunthan V N enable = true; 5890cd8f9ccSMugunthan V N dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n"); 5900cd8f9ccSMugunthan V N } 5910cd8f9ccSMugunthan V N 5920cd8f9ccSMugunthan V N if (enable) { 5930cd8f9ccSMugunthan V N /* Enable Bypass */ 5940cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1); 5950cd8f9ccSMugunthan V N 5960cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 5970cd8f9ccSMugunthan V N } else { 5980cd8f9ccSMugunthan V N /* Disable Bypass */ 5990cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0); 6000cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6010cd8f9ccSMugunthan V N } 6020cd8f9ccSMugunthan V N } else { 6030cd8f9ccSMugunthan V N if (enable) { 6040cd8f9ccSMugunthan V N unsigned long timeout = jiffies + HZ; 6050cd8f9ccSMugunthan V N 6066f979eb3SLennart Sorensen /* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */ 607606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6080cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6090cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 1); 6100cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6110cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 1); 6120cd8f9ccSMugunthan V N } 6130cd8f9ccSMugunthan V N 6140cd8f9ccSMugunthan V N /* Clear All Untouched entries */ 6150cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 6160cd8f9ccSMugunthan V N do { 6170cd8f9ccSMugunthan V N cpu_relax(); 6180cd8f9ccSMugunthan V N if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT)) 6190cd8f9ccSMugunthan V N break; 6200cd8f9ccSMugunthan V N } while (time_after(timeout, jiffies)); 6210cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 6220cd8f9ccSMugunthan V N 6230cd8f9ccSMugunthan V N /* Clear all mcast from ALE */ 62461f1cef9SGrygorii Strashko cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1); 6250cd8f9ccSMugunthan V N 6260cd8f9ccSMugunthan V N /* Flood All Unicast Packets to Host port */ 6270cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1); 6280cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 6290cd8f9ccSMugunthan V N } else { 6306f979eb3SLennart Sorensen /* Don't Flood All Unicast Packets to Host port */ 6310cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0); 6320cd8f9ccSMugunthan V N 6336f979eb3SLennart Sorensen /* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */ 634606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6350cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6360cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 0); 6370cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6380cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 0); 6390cd8f9ccSMugunthan V N } 6400cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6410cd8f9ccSMugunthan V N } 6420cd8f9ccSMugunthan V N } 6430cd8f9ccSMugunthan V N } 6440cd8f9ccSMugunthan V N 6455c50a856SMugunthan V N static void cpsw_ndo_set_rx_mode(struct net_device *ndev) 6465c50a856SMugunthan V N { 6475c50a856SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 648606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 64925906052SMugunthan V N int vid; 65025906052SMugunthan V N 651606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 652606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 65325906052SMugunthan V N else 654606f3993SIvan Khoronzhuk vid = cpsw->data.default_vlan; 6555c50a856SMugunthan V N 6565c50a856SMugunthan V N if (ndev->flags & IFF_PROMISC) { 6575c50a856SMugunthan V N /* Enable promiscuous mode */ 6580cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, true); 6592a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI); 6605c50a856SMugunthan V N return; 6610cd8f9ccSMugunthan V N } else { 6620cd8f9ccSMugunthan V N /* Disable promiscuous mode */ 6630cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, false); 6645c50a856SMugunthan V N } 6655c50a856SMugunthan V N 6661e5c4bc4SLennart Sorensen /* Restore allmulti on vlans if necessary */ 6672a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, priv->ndev->flags & IFF_ALLMULTI); 6681e5c4bc4SLennart Sorensen 6695c50a856SMugunthan V N /* Clear all mcast from ALE */ 6702a05a622SIvan Khoronzhuk cpsw_ale_flush_multicast(cpsw->ale, ALE_ALL_PORTS, vid); 6715c50a856SMugunthan V N 6725c50a856SMugunthan V N if (!netdev_mc_empty(ndev)) { 6735c50a856SMugunthan V N struct netdev_hw_addr *ha; 6745c50a856SMugunthan V N 6755c50a856SMugunthan V N /* program multicast address list into ALE register */ 6765c50a856SMugunthan V N netdev_for_each_mc_addr(ha, ndev) { 677606f3993SIvan Khoronzhuk cpsw_add_mcast(cpsw, priv, (u8 *)ha->addr); 6785c50a856SMugunthan V N } 6795c50a856SMugunthan V N } 6805c50a856SMugunthan V N } 6815c50a856SMugunthan V N 6822c836bd9SIvan Khoronzhuk static void cpsw_intr_enable(struct cpsw_common *cpsw) 683df828598SMugunthan V N { 684dda5f5feSGrygorii Strashko writel_relaxed(0xFF, &cpsw->wr_regs->tx_en); 685dda5f5feSGrygorii Strashko writel_relaxed(0xFF, &cpsw->wr_regs->rx_en); 686df828598SMugunthan V N 6872c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, true); 688df828598SMugunthan V N return; 689df828598SMugunthan V N } 690df828598SMugunthan V N 6912c836bd9SIvan Khoronzhuk static void cpsw_intr_disable(struct cpsw_common *cpsw) 692df828598SMugunthan V N { 693dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->wr_regs->tx_en); 694dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->wr_regs->rx_en); 695df828598SMugunthan V N 6962c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, false); 697df828598SMugunthan V N return; 698df828598SMugunthan V N } 699df828598SMugunthan V N 7001a3b5056SOlof Johansson static void cpsw_tx_handler(void *token, int len, int status) 701df828598SMugunthan V N { 702e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 703df828598SMugunthan V N struct sk_buff *skb = token; 704df828598SMugunthan V N struct net_device *ndev = skb->dev; 7052a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 706df828598SMugunthan V N 707fae50823SMugunthan V N /* Check whether the queue is stopped due to stalled tx dma, if the 708fae50823SMugunthan V N * queue is stopped then start the queue as we have free desc for tx 709fae50823SMugunthan V N */ 710e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 711e05107e6SIvan Khoronzhuk if (unlikely(netif_tx_queue_stopped(txq))) 712e05107e6SIvan Khoronzhuk netif_tx_wake_queue(txq); 713e05107e6SIvan Khoronzhuk 7142a05a622SIvan Khoronzhuk cpts_tx_timestamp(cpsw->cpts, skb); 7158dc43ddcSTobias Klauser ndev->stats.tx_packets++; 7168dc43ddcSTobias Klauser ndev->stats.tx_bytes += len; 717df828598SMugunthan V N dev_kfree_skb_any(skb); 718df828598SMugunthan V N } 719df828598SMugunthan V N 7201a3b5056SOlof Johansson static void cpsw_rx_handler(void *token, int len, int status) 721df828598SMugunthan V N { 722e05107e6SIvan Khoronzhuk struct cpdma_chan *ch; 723df828598SMugunthan V N struct sk_buff *skb = token; 724b4727e69SSebastian Siewior struct sk_buff *new_skb; 725df828598SMugunthan V N struct net_device *ndev = skb->dev; 726df828598SMugunthan V N int ret = 0; 7272a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 728df828598SMugunthan V N 7292a05a622SIvan Khoronzhuk cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb); 730d9ba8f9eSMugunthan V N 73116e5c57dSMugunthan V N if (unlikely(status < 0) || unlikely(!netif_running(ndev))) { 732a0e2c822SMugunthan V N /* In dual emac mode check for all interfaces */ 733d5bc1613SIvan Khoronzhuk if (cpsw->data.dual_emac && cpsw->usage_count && 734fe734d0aSIvan Khoronzhuk (status >= 0)) { 735a0e2c822SMugunthan V N /* The packet received is for the interface which 736a0e2c822SMugunthan V N * is already down and the other interface is up 737dbedd44eSJoe Perches * and running, instead of freeing which results 738a0e2c822SMugunthan V N * in reducing of the number of rx descriptor in 739a0e2c822SMugunthan V N * DMA engine, requeue skb back to cpdma. 740a0e2c822SMugunthan V N */ 741a0e2c822SMugunthan V N new_skb = skb; 742a0e2c822SMugunthan V N goto requeue; 743a0e2c822SMugunthan V N } 744a0e2c822SMugunthan V N 745b4727e69SSebastian Siewior /* the interface is going down, skbs are purged */ 746df828598SMugunthan V N dev_kfree_skb_any(skb); 747df828598SMugunthan V N return; 748df828598SMugunthan V N } 749b4727e69SSebastian Siewior 7502a05a622SIvan Khoronzhuk new_skb = netdev_alloc_skb_ip_align(ndev, cpsw->rx_packet_max); 751b4727e69SSebastian Siewior if (new_skb) { 752e05107e6SIvan Khoronzhuk skb_copy_queue_mapping(new_skb, skb); 753df828598SMugunthan V N skb_put(skb, len); 7542a05a622SIvan Khoronzhuk cpts_rx_timestamp(cpsw->cpts, skb); 755df828598SMugunthan V N skb->protocol = eth_type_trans(skb, ndev); 756df828598SMugunthan V N netif_receive_skb(skb); 7578dc43ddcSTobias Klauser ndev->stats.rx_bytes += len; 7588dc43ddcSTobias Klauser ndev->stats.rx_packets++; 759254a49d5SGrygorii Strashko kmemleak_not_leak(new_skb); 760b4727e69SSebastian Siewior } else { 7618dc43ddcSTobias Klauser ndev->stats.rx_dropped++; 762b4727e69SSebastian Siewior new_skb = skb; 763df828598SMugunthan V N } 764df828598SMugunthan V N 765a0e2c822SMugunthan V N requeue: 766ce52c744SIvan Khoronzhuk if (netif_dormant(ndev)) { 767ce52c744SIvan Khoronzhuk dev_kfree_skb_any(new_skb); 768ce52c744SIvan Khoronzhuk return; 769ce52c744SIvan Khoronzhuk } 770ce52c744SIvan Khoronzhuk 7718feb0a19SIvan Khoronzhuk ch = cpsw->rxv[skb_get_queue_mapping(new_skb)].ch; 772e05107e6SIvan Khoronzhuk ret = cpdma_chan_submit(ch, new_skb, new_skb->data, 773b4727e69SSebastian Siewior skb_tailroom(new_skb), 0); 774b4727e69SSebastian Siewior if (WARN_ON(ret < 0)) 775b4727e69SSebastian Siewior dev_kfree_skb_any(new_skb); 776df828598SMugunthan V N } 777df828598SMugunthan V N 77832b78d85SIvan Khoronzhuk static void cpsw_split_res(struct net_device *ndev) 77948e0a83eSIvan Khoronzhuk { 78048e0a83eSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 78132b78d85SIvan Khoronzhuk u32 consumed_rate = 0, bigest_rate = 0; 78248e0a83eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 78348e0a83eSIvan Khoronzhuk struct cpsw_vector *txv = cpsw->txv; 78432b78d85SIvan Khoronzhuk int i, ch_weight, rlim_ch_num = 0; 78548e0a83eSIvan Khoronzhuk int budget, bigest_rate_ch = 0; 78648e0a83eSIvan Khoronzhuk u32 ch_rate, max_rate; 78748e0a83eSIvan Khoronzhuk int ch_budget = 0; 78848e0a83eSIvan Khoronzhuk 78948e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 79048e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 79148e0a83eSIvan Khoronzhuk if (!ch_rate) 79248e0a83eSIvan Khoronzhuk continue; 79348e0a83eSIvan Khoronzhuk 79448e0a83eSIvan Khoronzhuk rlim_ch_num++; 79548e0a83eSIvan Khoronzhuk consumed_rate += ch_rate; 79648e0a83eSIvan Khoronzhuk } 79748e0a83eSIvan Khoronzhuk 79848e0a83eSIvan Khoronzhuk if (cpsw->tx_ch_num == rlim_ch_num) { 79948e0a83eSIvan Khoronzhuk max_rate = consumed_rate; 80032b78d85SIvan Khoronzhuk } else if (!rlim_ch_num) { 80132b78d85SIvan Khoronzhuk ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num; 80232b78d85SIvan Khoronzhuk bigest_rate = 0; 80332b78d85SIvan Khoronzhuk max_rate = consumed_rate; 80448e0a83eSIvan Khoronzhuk } else { 8050be01b8eSIvan Khoronzhuk max_rate = cpsw->speed * 1000; 8060be01b8eSIvan Khoronzhuk 8070be01b8eSIvan Khoronzhuk /* if max_rate is less then expected due to reduced link speed, 8080be01b8eSIvan Khoronzhuk * split proportionally according next potential max speed 8090be01b8eSIvan Khoronzhuk */ 8100be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 8110be01b8eSIvan Khoronzhuk max_rate *= 10; 8120be01b8eSIvan Khoronzhuk 8130be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 8140be01b8eSIvan Khoronzhuk max_rate *= 10; 81532b78d85SIvan Khoronzhuk 81648e0a83eSIvan Khoronzhuk ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate; 81748e0a83eSIvan Khoronzhuk ch_budget = (CPSW_POLL_WEIGHT - ch_budget) / 81848e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 81948e0a83eSIvan Khoronzhuk bigest_rate = (max_rate - consumed_rate) / 82048e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 82148e0a83eSIvan Khoronzhuk } 82248e0a83eSIvan Khoronzhuk 82332b78d85SIvan Khoronzhuk /* split tx weight/budget */ 82448e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 82548e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 82648e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 82748e0a83eSIvan Khoronzhuk if (ch_rate) { 82848e0a83eSIvan Khoronzhuk txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate; 82948e0a83eSIvan Khoronzhuk if (!txv[i].budget) 83032b78d85SIvan Khoronzhuk txv[i].budget++; 83148e0a83eSIvan Khoronzhuk if (ch_rate > bigest_rate) { 83248e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 83348e0a83eSIvan Khoronzhuk bigest_rate = ch_rate; 83448e0a83eSIvan Khoronzhuk } 83532b78d85SIvan Khoronzhuk 83632b78d85SIvan Khoronzhuk ch_weight = (ch_rate * 100) / max_rate; 83732b78d85SIvan Khoronzhuk if (!ch_weight) 83832b78d85SIvan Khoronzhuk ch_weight++; 83932b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight); 84048e0a83eSIvan Khoronzhuk } else { 84148e0a83eSIvan Khoronzhuk txv[i].budget = ch_budget; 84248e0a83eSIvan Khoronzhuk if (!bigest_rate_ch) 84348e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 84432b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, 0); 84548e0a83eSIvan Khoronzhuk } 84648e0a83eSIvan Khoronzhuk 84748e0a83eSIvan Khoronzhuk budget -= txv[i].budget; 84848e0a83eSIvan Khoronzhuk } 84948e0a83eSIvan Khoronzhuk 85048e0a83eSIvan Khoronzhuk if (budget) 85148e0a83eSIvan Khoronzhuk txv[bigest_rate_ch].budget += budget; 85248e0a83eSIvan Khoronzhuk 85348e0a83eSIvan Khoronzhuk /* split rx budget */ 85448e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 85548e0a83eSIvan Khoronzhuk ch_budget = budget / cpsw->rx_ch_num; 85648e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->rx_ch_num; i++) { 85748e0a83eSIvan Khoronzhuk cpsw->rxv[i].budget = ch_budget; 85848e0a83eSIvan Khoronzhuk budget -= ch_budget; 85948e0a83eSIvan Khoronzhuk } 86048e0a83eSIvan Khoronzhuk 86148e0a83eSIvan Khoronzhuk if (budget) 86248e0a83eSIvan Khoronzhuk cpsw->rxv[0].budget += budget; 86348e0a83eSIvan Khoronzhuk } 86448e0a83eSIvan Khoronzhuk 865c03abd84SFelipe Balbi static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id) 866df828598SMugunthan V N { 867dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 8687ce67a38SFelipe Balbi 8695d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->tx_en); 8702c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX); 871c03abd84SFelipe Balbi 872e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 873e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[1]); 874e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = true; 8757da11600SMugunthan V N } 8767da11600SMugunthan V N 877dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_tx); 878c03abd84SFelipe Balbi return IRQ_HANDLED; 879c03abd84SFelipe Balbi } 880c03abd84SFelipe Balbi 881c03abd84SFelipe Balbi static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id) 882c03abd84SFelipe Balbi { 883dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 884c03abd84SFelipe Balbi 8852c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX); 8865d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->rx_en); 887fd51cf19SSebastian Siewior 888e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 889e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[0]); 890e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = true; 8917da11600SMugunthan V N } 8927da11600SMugunthan V N 893dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_rx); 894df828598SMugunthan V N return IRQ_HANDLED; 895df828598SMugunthan V N } 896df828598SMugunthan V N 89732a7432cSMugunthan V N static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget) 898df828598SMugunthan V N { 899e05107e6SIvan Khoronzhuk u32 ch_map; 9008feb0a19SIvan Khoronzhuk int num_tx, cur_budget, ch; 901dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_tx); 9028feb0a19SIvan Khoronzhuk struct cpsw_vector *txv; 90332a7432cSMugunthan V N 904e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 905e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_txchs_state(cpsw->dma); 906342934a5SIvan Khoronzhuk for (ch = 0, num_tx = 0; ch_map; ch_map >>= 1, ch++) { 907e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 908e05107e6SIvan Khoronzhuk continue; 909e05107e6SIvan Khoronzhuk 9108feb0a19SIvan Khoronzhuk txv = &cpsw->txv[ch]; 9118feb0a19SIvan Khoronzhuk if (unlikely(txv->budget > budget - num_tx)) 9128feb0a19SIvan Khoronzhuk cur_budget = budget - num_tx; 9138feb0a19SIvan Khoronzhuk else 9148feb0a19SIvan Khoronzhuk cur_budget = txv->budget; 9158feb0a19SIvan Khoronzhuk 9168feb0a19SIvan Khoronzhuk num_tx += cpdma_chan_process(txv->ch, cur_budget); 917342934a5SIvan Khoronzhuk if (num_tx >= budget) 918342934a5SIvan Khoronzhuk break; 919e05107e6SIvan Khoronzhuk } 920e05107e6SIvan Khoronzhuk 92132a7432cSMugunthan V N if (num_tx < budget) { 92232a7432cSMugunthan V N napi_complete(napi_tx); 9235d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->tx_en); 924e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->tx_irq_disabled) { 925e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 926e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 9277da11600SMugunthan V N } 92832a7432cSMugunthan V N } 92932a7432cSMugunthan V N 93032a7432cSMugunthan V N return num_tx; 93132a7432cSMugunthan V N } 93232a7432cSMugunthan V N 93332a7432cSMugunthan V N static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget) 93432a7432cSMugunthan V N { 935e05107e6SIvan Khoronzhuk u32 ch_map; 9368feb0a19SIvan Khoronzhuk int num_rx, cur_budget, ch; 937dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_rx); 9388feb0a19SIvan Khoronzhuk struct cpsw_vector *rxv; 939510a1e72SMugunthan V N 940e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 941e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_rxchs_state(cpsw->dma); 942342934a5SIvan Khoronzhuk for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) { 943e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 944e05107e6SIvan Khoronzhuk continue; 945e05107e6SIvan Khoronzhuk 9468feb0a19SIvan Khoronzhuk rxv = &cpsw->rxv[ch]; 9478feb0a19SIvan Khoronzhuk if (unlikely(rxv->budget > budget - num_rx)) 9488feb0a19SIvan Khoronzhuk cur_budget = budget - num_rx; 9498feb0a19SIvan Khoronzhuk else 9508feb0a19SIvan Khoronzhuk cur_budget = rxv->budget; 9518feb0a19SIvan Khoronzhuk 9528feb0a19SIvan Khoronzhuk num_rx += cpdma_chan_process(rxv->ch, cur_budget); 953342934a5SIvan Khoronzhuk if (num_rx >= budget) 954342934a5SIvan Khoronzhuk break; 955e05107e6SIvan Khoronzhuk } 956e05107e6SIvan Khoronzhuk 957510a1e72SMugunthan V N if (num_rx < budget) { 9586ad20165SEric Dumazet napi_complete_done(napi_rx, num_rx); 9595d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->rx_en); 960e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq && cpsw->rx_irq_disabled) { 961e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 962e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 9637da11600SMugunthan V N } 964510a1e72SMugunthan V N } 965df828598SMugunthan V N 966df828598SMugunthan V N return num_rx; 967df828598SMugunthan V N } 968df828598SMugunthan V N 969df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg) 970df828598SMugunthan V N { 971df828598SMugunthan V N unsigned long timeout = jiffies + HZ; 972df828598SMugunthan V N 973dda5f5feSGrygorii Strashko writel_relaxed(1, reg); 974df828598SMugunthan V N do { 975df828598SMugunthan V N cpu_relax(); 976dda5f5feSGrygorii Strashko } while ((readl_relaxed(reg) & 1) && time_after(timeout, jiffies)); 977df828598SMugunthan V N 978dda5f5feSGrygorii Strashko WARN(readl_relaxed(reg) & 1, "failed to soft-reset %s\n", module); 979df828598SMugunthan V N } 980df828598SMugunthan V N 981df828598SMugunthan V N #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ 982df828598SMugunthan V N ((mac)[2] << 16) | ((mac)[3] << 24)) 983df828598SMugunthan V N #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) 984df828598SMugunthan V N 985df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave, 986df828598SMugunthan V N struct cpsw_priv *priv) 987df828598SMugunthan V N { 9889750a3adSRichard Cochran slave_write(slave, mac_hi(priv->mac_addr), SA_HI); 9899750a3adSRichard Cochran slave_write(slave, mac_lo(priv->mac_addr), SA_LO); 990df828598SMugunthan V N } 991df828598SMugunthan V N 992df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave, 993df828598SMugunthan V N struct cpsw_priv *priv, bool *link) 994df828598SMugunthan V N { 995df828598SMugunthan V N struct phy_device *phy = slave->phy; 996df828598SMugunthan V N u32 mac_control = 0; 997df828598SMugunthan V N u32 slave_port; 998606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 999df828598SMugunthan V N 1000df828598SMugunthan V N if (!phy) 1001df828598SMugunthan V N return; 1002df828598SMugunthan V N 10036f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1004df828598SMugunthan V N 1005df828598SMugunthan V N if (phy->link) { 1006606f3993SIvan Khoronzhuk mac_control = cpsw->data.mac_control; 1007df828598SMugunthan V N 1008df828598SMugunthan V N /* enable forwarding */ 10092a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1010df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1011df828598SMugunthan V N 1012df828598SMugunthan V N if (phy->speed == 1000) 1013df828598SMugunthan V N mac_control |= BIT(7); /* GIGABITEN */ 1014df828598SMugunthan V N if (phy->duplex) 1015df828598SMugunthan V N mac_control |= BIT(0); /* FULLDUPLEXEN */ 1016342b7b74SDaniel Mack 1017342b7b74SDaniel Mack /* set speed_in input in case RMII mode is used in 100Mbps */ 1018342b7b74SDaniel Mack if (phy->speed == 100) 1019342b7b74SDaniel Mack mac_control |= BIT(15); 1020a81d8762SMugunthan V N else if (phy->speed == 10) 1021a81d8762SMugunthan V N mac_control |= BIT(18); /* In Band mode */ 1022342b7b74SDaniel Mack 10231923d6e4SMugunthan V N if (priv->rx_pause) 10241923d6e4SMugunthan V N mac_control |= BIT(3); 10251923d6e4SMugunthan V N 10261923d6e4SMugunthan V N if (priv->tx_pause) 10271923d6e4SMugunthan V N mac_control |= BIT(4); 10281923d6e4SMugunthan V N 1029df828598SMugunthan V N *link = true; 1030df828598SMugunthan V N } else { 1031df828598SMugunthan V N mac_control = 0; 1032df828598SMugunthan V N /* disable forwarding */ 10332a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1034df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 1035df828598SMugunthan V N } 1036df828598SMugunthan V N 1037df828598SMugunthan V N if (mac_control != slave->mac_control) { 1038df828598SMugunthan V N phy_print_status(phy); 1039dda5f5feSGrygorii Strashko writel_relaxed(mac_control, &slave->sliver->mac_control); 1040df828598SMugunthan V N } 1041df828598SMugunthan V N 1042df828598SMugunthan V N slave->mac_control = mac_control; 1043df828598SMugunthan V N } 1044df828598SMugunthan V N 10450be01b8eSIvan Khoronzhuk static int cpsw_get_common_speed(struct cpsw_common *cpsw) 10460be01b8eSIvan Khoronzhuk { 10470be01b8eSIvan Khoronzhuk int i, speed; 10480be01b8eSIvan Khoronzhuk 10490be01b8eSIvan Khoronzhuk for (i = 0, speed = 0; i < cpsw->data.slaves; i++) 10500be01b8eSIvan Khoronzhuk if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link) 10510be01b8eSIvan Khoronzhuk speed += cpsw->slaves[i].phy->speed; 10520be01b8eSIvan Khoronzhuk 10530be01b8eSIvan Khoronzhuk return speed; 10540be01b8eSIvan Khoronzhuk } 10550be01b8eSIvan Khoronzhuk 10560be01b8eSIvan Khoronzhuk static int cpsw_need_resplit(struct cpsw_common *cpsw) 10570be01b8eSIvan Khoronzhuk { 10580be01b8eSIvan Khoronzhuk int i, rlim_ch_num; 10590be01b8eSIvan Khoronzhuk int speed, ch_rate; 10600be01b8eSIvan Khoronzhuk 10610be01b8eSIvan Khoronzhuk /* re-split resources only in case speed was changed */ 10620be01b8eSIvan Khoronzhuk speed = cpsw_get_common_speed(cpsw); 10630be01b8eSIvan Khoronzhuk if (speed == cpsw->speed || !speed) 10640be01b8eSIvan Khoronzhuk return 0; 10650be01b8eSIvan Khoronzhuk 10660be01b8eSIvan Khoronzhuk cpsw->speed = speed; 10670be01b8eSIvan Khoronzhuk 10680be01b8eSIvan Khoronzhuk for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) { 10690be01b8eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch); 10700be01b8eSIvan Khoronzhuk if (!ch_rate) 10710be01b8eSIvan Khoronzhuk break; 10720be01b8eSIvan Khoronzhuk 10730be01b8eSIvan Khoronzhuk rlim_ch_num++; 10740be01b8eSIvan Khoronzhuk } 10750be01b8eSIvan Khoronzhuk 10760be01b8eSIvan Khoronzhuk /* cases not dependent on speed */ 10770be01b8eSIvan Khoronzhuk if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num) 10780be01b8eSIvan Khoronzhuk return 0; 10790be01b8eSIvan Khoronzhuk 10800be01b8eSIvan Khoronzhuk return 1; 10810be01b8eSIvan Khoronzhuk } 10820be01b8eSIvan Khoronzhuk 1083df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev) 1084df828598SMugunthan V N { 1085df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 10860be01b8eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1087df828598SMugunthan V N bool link = false; 1088df828598SMugunthan V N 1089df828598SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 1090df828598SMugunthan V N 1091df828598SMugunthan V N if (link) { 10920be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 10930be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 10940be01b8eSIvan Khoronzhuk 1095df828598SMugunthan V N netif_carrier_on(ndev); 1096df828598SMugunthan V N if (netif_running(ndev)) 1097e05107e6SIvan Khoronzhuk netif_tx_wake_all_queues(ndev); 1098df828598SMugunthan V N } else { 1099df828598SMugunthan V N netif_carrier_off(ndev); 1100e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(ndev); 1101df828598SMugunthan V N } 1102df828598SMugunthan V N } 1103df828598SMugunthan V N 1104ff5b8ef2SMugunthan V N static int cpsw_get_coalesce(struct net_device *ndev, 1105ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1106ff5b8ef2SMugunthan V N { 11072a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1108ff5b8ef2SMugunthan V N 11092a05a622SIvan Khoronzhuk coal->rx_coalesce_usecs = cpsw->coal_intvl; 1110ff5b8ef2SMugunthan V N return 0; 1111ff5b8ef2SMugunthan V N } 1112ff5b8ef2SMugunthan V N 1113ff5b8ef2SMugunthan V N static int cpsw_set_coalesce(struct net_device *ndev, 1114ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1115ff5b8ef2SMugunthan V N { 1116ff5b8ef2SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1117ff5b8ef2SMugunthan V N u32 int_ctrl; 1118ff5b8ef2SMugunthan V N u32 num_interrupts = 0; 1119ff5b8ef2SMugunthan V N u32 prescale = 0; 1120ff5b8ef2SMugunthan V N u32 addnl_dvdr = 1; 1121ff5b8ef2SMugunthan V N u32 coal_intvl = 0; 11225d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1123ff5b8ef2SMugunthan V N 1124ff5b8ef2SMugunthan V N coal_intvl = coal->rx_coalesce_usecs; 1125ff5b8ef2SMugunthan V N 11265d8d0d4dSIvan Khoronzhuk int_ctrl = readl(&cpsw->wr_regs->int_control); 11272a05a622SIvan Khoronzhuk prescale = cpsw->bus_freq_mhz * 4; 1128ff5b8ef2SMugunthan V N 1129a84bc2a9SMugunthan V N if (!coal->rx_coalesce_usecs) { 1130a84bc2a9SMugunthan V N int_ctrl &= ~(CPSW_INTPRESCALE_MASK | CPSW_INTPACEEN); 1131a84bc2a9SMugunthan V N goto update_return; 1132a84bc2a9SMugunthan V N } 1133a84bc2a9SMugunthan V N 1134ff5b8ef2SMugunthan V N if (coal_intvl < CPSW_CMINTMIN_INTVL) 1135ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMIN_INTVL; 1136ff5b8ef2SMugunthan V N 1137ff5b8ef2SMugunthan V N if (coal_intvl > CPSW_CMINTMAX_INTVL) { 1138ff5b8ef2SMugunthan V N /* Interrupt pacer works with 4us Pulse, we can 1139ff5b8ef2SMugunthan V N * throttle further by dilating the 4us pulse. 1140ff5b8ef2SMugunthan V N */ 1141ff5b8ef2SMugunthan V N addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale; 1142ff5b8ef2SMugunthan V N 1143ff5b8ef2SMugunthan V N if (addnl_dvdr > 1) { 1144ff5b8ef2SMugunthan V N prescale *= addnl_dvdr; 1145ff5b8ef2SMugunthan V N if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr)) 1146ff5b8ef2SMugunthan V N coal_intvl = (CPSW_CMINTMAX_INTVL 1147ff5b8ef2SMugunthan V N * addnl_dvdr); 1148ff5b8ef2SMugunthan V N } else { 1149ff5b8ef2SMugunthan V N addnl_dvdr = 1; 1150ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMAX_INTVL; 1151ff5b8ef2SMugunthan V N } 1152ff5b8ef2SMugunthan V N } 1153ff5b8ef2SMugunthan V N 1154ff5b8ef2SMugunthan V N num_interrupts = (1000 * addnl_dvdr) / coal_intvl; 11555d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->rx_imax); 11565d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->tx_imax); 1157ff5b8ef2SMugunthan V N 1158ff5b8ef2SMugunthan V N int_ctrl |= CPSW_INTPACEEN; 1159ff5b8ef2SMugunthan V N int_ctrl &= (~CPSW_INTPRESCALE_MASK); 1160ff5b8ef2SMugunthan V N int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK); 1161a84bc2a9SMugunthan V N 1162a84bc2a9SMugunthan V N update_return: 11635d8d0d4dSIvan Khoronzhuk writel(int_ctrl, &cpsw->wr_regs->int_control); 1164ff5b8ef2SMugunthan V N 1165ff5b8ef2SMugunthan V N cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl); 11662a05a622SIvan Khoronzhuk cpsw->coal_intvl = coal_intvl; 1167ff5b8ef2SMugunthan V N 1168ff5b8ef2SMugunthan V N return 0; 1169ff5b8ef2SMugunthan V N } 1170ff5b8ef2SMugunthan V N 1171d9718546SMugunthan V N static int cpsw_get_sset_count(struct net_device *ndev, int sset) 1172d9718546SMugunthan V N { 1173e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1174e05107e6SIvan Khoronzhuk 1175d9718546SMugunthan V N switch (sset) { 1176d9718546SMugunthan V N case ETH_SS_STATS: 1177e05107e6SIvan Khoronzhuk return (CPSW_STATS_COMMON_LEN + 1178e05107e6SIvan Khoronzhuk (cpsw->rx_ch_num + cpsw->tx_ch_num) * 1179e05107e6SIvan Khoronzhuk CPSW_STATS_CH_LEN); 1180d9718546SMugunthan V N default: 1181d9718546SMugunthan V N return -EOPNOTSUPP; 1182d9718546SMugunthan V N } 1183d9718546SMugunthan V N } 1184d9718546SMugunthan V N 1185e05107e6SIvan Khoronzhuk static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) 1186e05107e6SIvan Khoronzhuk { 1187e05107e6SIvan Khoronzhuk int ch_stats_len; 1188e05107e6SIvan Khoronzhuk int line; 1189e05107e6SIvan Khoronzhuk int i; 1190e05107e6SIvan Khoronzhuk 1191e05107e6SIvan Khoronzhuk ch_stats_len = CPSW_STATS_CH_LEN * ch_num; 1192e05107e6SIvan Khoronzhuk for (i = 0; i < ch_stats_len; i++) { 1193e05107e6SIvan Khoronzhuk line = i % CPSW_STATS_CH_LEN; 1194e05107e6SIvan Khoronzhuk snprintf(*p, ETH_GSTRING_LEN, 1195e05107e6SIvan Khoronzhuk "%s DMA chan %d: %s", rx_dir ? "Rx" : "Tx", 1196e05107e6SIvan Khoronzhuk i / CPSW_STATS_CH_LEN, 1197e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[line].stat_string); 1198e05107e6SIvan Khoronzhuk *p += ETH_GSTRING_LEN; 1199e05107e6SIvan Khoronzhuk } 1200e05107e6SIvan Khoronzhuk } 1201e05107e6SIvan Khoronzhuk 1202d9718546SMugunthan V N static void cpsw_get_strings(struct net_device *ndev, u32 stringset, u8 *data) 1203d9718546SMugunthan V N { 1204e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1205d9718546SMugunthan V N u8 *p = data; 1206d9718546SMugunthan V N int i; 1207d9718546SMugunthan V N 1208d9718546SMugunthan V N switch (stringset) { 1209d9718546SMugunthan V N case ETH_SS_STATS: 1210e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_COMMON_LEN; i++) { 1211d9718546SMugunthan V N memcpy(p, cpsw_gstrings_stats[i].stat_string, 1212d9718546SMugunthan V N ETH_GSTRING_LEN); 1213d9718546SMugunthan V N p += ETH_GSTRING_LEN; 1214d9718546SMugunthan V N } 1215e05107e6SIvan Khoronzhuk 1216e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->rx_ch_num, 1); 1217e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->tx_ch_num, 0); 1218d9718546SMugunthan V N break; 1219d9718546SMugunthan V N } 1220d9718546SMugunthan V N } 1221d9718546SMugunthan V N 1222d9718546SMugunthan V N static void cpsw_get_ethtool_stats(struct net_device *ndev, 1223d9718546SMugunthan V N struct ethtool_stats *stats, u64 *data) 1224d9718546SMugunthan V N { 1225d9718546SMugunthan V N u8 *p; 12262c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1227e05107e6SIvan Khoronzhuk struct cpdma_chan_stats ch_stats; 1228e05107e6SIvan Khoronzhuk int i, l, ch; 1229d9718546SMugunthan V N 1230d9718546SMugunthan V N /* Collect Davinci CPDMA stats for Rx and Tx Channel */ 1231e05107e6SIvan Khoronzhuk for (l = 0; l < CPSW_STATS_COMMON_LEN; l++) 1232e05107e6SIvan Khoronzhuk data[l] = readl(cpsw->hw_stats + 1233e05107e6SIvan Khoronzhuk cpsw_gstrings_stats[l].stat_offset); 1234d9718546SMugunthan V N 1235e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 12368feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->rxv[ch].ch, &ch_stats); 1237e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1238e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1239e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1240e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1241e05107e6SIvan Khoronzhuk } 1242e05107e6SIvan Khoronzhuk } 1243d9718546SMugunthan V N 1244e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 12458feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->txv[ch].ch, &ch_stats); 1246e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1247e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1248e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1249e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1250d9718546SMugunthan V N } 1251d9718546SMugunthan V N } 1252d9718546SMugunthan V N } 1253d9718546SMugunthan V N 125427e9e103SIvan Khoronzhuk static inline int cpsw_tx_packet_submit(struct cpsw_priv *priv, 1255e05107e6SIvan Khoronzhuk struct sk_buff *skb, 1256e05107e6SIvan Khoronzhuk struct cpdma_chan *txch) 1257d9ba8f9eSMugunthan V N { 12582c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 12592c836bd9SIvan Khoronzhuk 126098fdd857SIvan Khoronzhuk skb_tx_timestamp(skb); 1261e05107e6SIvan Khoronzhuk return cpdma_chan_submit(txch, skb, skb->data, skb->len, 1262606f3993SIvan Khoronzhuk priv->emac_port + cpsw->data.dual_emac); 1263d9ba8f9eSMugunthan V N } 1264d9ba8f9eSMugunthan V N 1265d9ba8f9eSMugunthan V N static inline void cpsw_add_dual_emac_def_ale_entries( 1266d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct cpsw_slave *slave, 1267d9ba8f9eSMugunthan V N u32 slave_port) 1268d9ba8f9eSMugunthan V N { 12692a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 127071a2cbb7SGrygorii Strashko u32 port_mask = 1 << slave_port | ALE_PORT_HOST; 1271d9ba8f9eSMugunthan V N 12722a05a622SIvan Khoronzhuk if (cpsw->version == CPSW_VERSION_1) 1273d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN); 1274d9ba8f9eSMugunthan V N else 1275d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN); 12762a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask, 1277d9ba8f9eSMugunthan V N port_mask, port_mask, 0); 12782a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1279d9ba8f9eSMugunthan V N port_mask, ALE_VLAN, slave->port_vlan, 0); 12802a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 12812a05a622SIvan Khoronzhuk HOST_PORT_NUM, ALE_VLAN | 12822a05a622SIvan Khoronzhuk ALE_SECURE, slave->port_vlan); 1283d9ba8f9eSMugunthan V N } 1284d9ba8f9eSMugunthan V N 12851e7a2e21SDaniel Mack static void soft_reset_slave(struct cpsw_slave *slave) 1286df828598SMugunthan V N { 1287df828598SMugunthan V N char name[32]; 12881e7a2e21SDaniel Mack 12891e7a2e21SDaniel Mack snprintf(name, sizeof(name), "slave-%d", slave->slave_num); 12901e7a2e21SDaniel Mack soft_reset(name, &slave->sliver->soft_reset); 12911e7a2e21SDaniel Mack } 12921e7a2e21SDaniel Mack 12931e7a2e21SDaniel Mack static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 12941e7a2e21SDaniel Mack { 1295df828598SMugunthan V N u32 slave_port; 129630c57f07SSekhar Nori struct phy_device *phy; 1297649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1298df828598SMugunthan V N 12991e7a2e21SDaniel Mack soft_reset_slave(slave); 1300df828598SMugunthan V N 1301df828598SMugunthan V N /* setup priority mapping */ 1302dda5f5feSGrygorii Strashko writel_relaxed(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 13039750a3adSRichard Cochran 13042a05a622SIvan Khoronzhuk switch (cpsw->version) { 13059750a3adSRichard Cochran case CPSW_VERSION_1: 13069750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP); 130748f5bcccSGrygorii Strashko /* Increase RX FIFO size to 5 for supporting fullduplex 130848f5bcccSGrygorii Strashko * flow control mode 130948f5bcccSGrygorii Strashko */ 131048f5bcccSGrygorii Strashko slave_write(slave, 131148f5bcccSGrygorii Strashko (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) | 131248f5bcccSGrygorii Strashko CPSW_MAX_BLKS_RX, CPSW1_MAX_BLKS); 13139750a3adSRichard Cochran break; 13149750a3adSRichard Cochran case CPSW_VERSION_2: 1315c193f365SMugunthan V N case CPSW_VERSION_3: 1316926489beSMugunthan V N case CPSW_VERSION_4: 13179750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP); 131848f5bcccSGrygorii Strashko /* Increase RX FIFO size to 5 for supporting fullduplex 131948f5bcccSGrygorii Strashko * flow control mode 132048f5bcccSGrygorii Strashko */ 132148f5bcccSGrygorii Strashko slave_write(slave, 132248f5bcccSGrygorii Strashko (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) | 132348f5bcccSGrygorii Strashko CPSW_MAX_BLKS_RX, CPSW2_MAX_BLKS); 13249750a3adSRichard Cochran break; 13259750a3adSRichard Cochran } 1326df828598SMugunthan V N 1327df828598SMugunthan V N /* setup max packet size, and mac address */ 1328dda5f5feSGrygorii Strashko writel_relaxed(cpsw->rx_packet_max, &slave->sliver->rx_maxlen); 1329df828598SMugunthan V N cpsw_set_slave_mac(slave, priv); 1330df828598SMugunthan V N 1331df828598SMugunthan V N slave->mac_control = 0; /* no link yet */ 1332df828598SMugunthan V N 13336f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1334df828598SMugunthan V N 1335606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1336d9ba8f9eSMugunthan V N cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port); 1337d9ba8f9eSMugunthan V N else 13382a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1339e11b220fSMugunthan V N 1 << slave_port, 0, 0, ALE_MCAST_FWD_2); 1340df828598SMugunthan V N 1341d733f754SDavid Rivshin if (slave->data->phy_node) { 134230c57f07SSekhar Nori phy = of_phy_connect(priv->ndev, slave->data->phy_node, 13439e42f715SHeiko Schocher &cpsw_adjust_link, 0, slave->data->phy_if); 134430c57f07SSekhar Nori if (!phy) { 1345f7ce9103SRob Herring dev_err(priv->dev, "phy \"%pOF\" not found on slave %d\n", 1346f7ce9103SRob Herring slave->data->phy_node, 1347d733f754SDavid Rivshin slave->slave_num); 1348d733f754SDavid Rivshin return; 1349d733f754SDavid Rivshin } 1350d733f754SDavid Rivshin } else { 135130c57f07SSekhar Nori phy = phy_connect(priv->ndev, slave->data->phy_id, 1352f9a8f83bSFlorian Fainelli &cpsw_adjust_link, slave->data->phy_if); 135330c57f07SSekhar Nori if (IS_ERR(phy)) { 1354d733f754SDavid Rivshin dev_err(priv->dev, 1355d733f754SDavid Rivshin "phy \"%s\" not found on slave %d, err %ld\n", 1356d733f754SDavid Rivshin slave->data->phy_id, slave->slave_num, 135730c57f07SSekhar Nori PTR_ERR(phy)); 1358d733f754SDavid Rivshin return; 1359d733f754SDavid Rivshin } 1360d733f754SDavid Rivshin } 1361d733f754SDavid Rivshin 136230c57f07SSekhar Nori slave->phy = phy; 136330c57f07SSekhar Nori 13642220943aSAndrew Lunn phy_attached_info(slave->phy); 13652220943aSAndrew Lunn 1366df828598SMugunthan V N phy_start(slave->phy); 1367388367a5SMugunthan V N 1368388367a5SMugunthan V N /* Configure GMII_SEL register */ 136956e31bd8SIvan Khoronzhuk cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num); 1370df828598SMugunthan V N } 1371df828598SMugunthan V N 13723b72c2feSMugunthan V N static inline void cpsw_add_default_vlan(struct cpsw_priv *priv) 13733b72c2feSMugunthan V N { 1374606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1375606f3993SIvan Khoronzhuk const int vlan = cpsw->data.default_vlan; 13763b72c2feSMugunthan V N u32 reg; 13773b72c2feSMugunthan V N int i; 13781e5c4bc4SLennart Sorensen int unreg_mcast_mask; 13793b72c2feSMugunthan V N 13802a05a622SIvan Khoronzhuk reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN : 13813b72c2feSMugunthan V N CPSW2_PORT_VLAN; 13823b72c2feSMugunthan V N 13835d8d0d4dSIvan Khoronzhuk writel(vlan, &cpsw->host_port_regs->port_vlan); 13843b72c2feSMugunthan V N 1385606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 1386606f3993SIvan Khoronzhuk slave_write(cpsw->slaves + i, vlan, reg); 13873b72c2feSMugunthan V N 13881e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 13891e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 13901e5c4bc4SLennart Sorensen else 13911e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 13921e5c4bc4SLennart Sorensen 13932a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS, 139461f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 139561f1cef9SGrygorii Strashko unreg_mcast_mask); 13963b72c2feSMugunthan V N } 13973b72c2feSMugunthan V N 1398df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv) 1399df828598SMugunthan V N { 1400d9ba8f9eSMugunthan V N u32 fifo_mode; 14015d8d0d4dSIvan Khoronzhuk u32 control_reg; 14025d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14033b72c2feSMugunthan V N 1404df828598SMugunthan V N /* soft reset the controller and initialize ale */ 14055d8d0d4dSIvan Khoronzhuk soft_reset("cpsw", &cpsw->regs->soft_reset); 14062a05a622SIvan Khoronzhuk cpsw_ale_start(cpsw->ale); 1407df828598SMugunthan V N 1408df828598SMugunthan V N /* switch to vlan unaware mode */ 14092a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 14103b72c2feSMugunthan V N CPSW_ALE_VLAN_AWARE); 14115d8d0d4dSIvan Khoronzhuk control_reg = readl(&cpsw->regs->control); 14123b72c2feSMugunthan V N control_reg |= CPSW_VLAN_AWARE; 14135d8d0d4dSIvan Khoronzhuk writel(control_reg, &cpsw->regs->control); 1414606f3993SIvan Khoronzhuk fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE : 1415d9ba8f9eSMugunthan V N CPSW_FIFO_NORMAL_MODE; 14165d8d0d4dSIvan Khoronzhuk writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl); 1417df828598SMugunthan V N 1418df828598SMugunthan V N /* setup host port priority mapping */ 1419dda5f5feSGrygorii Strashko writel_relaxed(CPDMA_TX_PRIORITY_MAP, 14205d8d0d4dSIvan Khoronzhuk &cpsw->host_port_regs->cpdma_tx_pri_map); 1421dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->host_port_regs->cpdma_rx_chan_map); 1422df828598SMugunthan V N 14232a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, 1424df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1425df828598SMugunthan V N 1426606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) { 14272a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1428d9ba8f9eSMugunthan V N 0, 0); 14292a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 143071a2cbb7SGrygorii Strashko ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2); 1431df828598SMugunthan V N } 1432d9ba8f9eSMugunthan V N } 1433df828598SMugunthan V N 14343802dce1SIvan Khoronzhuk static int cpsw_fill_rx_channels(struct cpsw_priv *priv) 14353802dce1SIvan Khoronzhuk { 14363802dce1SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14373802dce1SIvan Khoronzhuk struct sk_buff *skb; 14383802dce1SIvan Khoronzhuk int ch_buf_num; 1439e05107e6SIvan Khoronzhuk int ch, i, ret; 14403802dce1SIvan Khoronzhuk 1441e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 14428feb0a19SIvan Khoronzhuk ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch); 14433802dce1SIvan Khoronzhuk for (i = 0; i < ch_buf_num; i++) { 14443802dce1SIvan Khoronzhuk skb = __netdev_alloc_skb_ip_align(priv->ndev, 14453802dce1SIvan Khoronzhuk cpsw->rx_packet_max, 14463802dce1SIvan Khoronzhuk GFP_KERNEL); 14473802dce1SIvan Khoronzhuk if (!skb) { 14483802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, "cannot allocate skb\n"); 14493802dce1SIvan Khoronzhuk return -ENOMEM; 14503802dce1SIvan Khoronzhuk } 14513802dce1SIvan Khoronzhuk 1452e05107e6SIvan Khoronzhuk skb_set_queue_mapping(skb, ch); 14538feb0a19SIvan Khoronzhuk ret = cpdma_chan_submit(cpsw->rxv[ch].ch, skb, 14548feb0a19SIvan Khoronzhuk skb->data, skb_tailroom(skb), 14558feb0a19SIvan Khoronzhuk 0); 14563802dce1SIvan Khoronzhuk if (ret < 0) { 14573802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, 1458e05107e6SIvan Khoronzhuk "cannot submit skb to channel %d rx, error %d\n", 1459e05107e6SIvan Khoronzhuk ch, ret); 14603802dce1SIvan Khoronzhuk kfree_skb(skb); 14613802dce1SIvan Khoronzhuk return ret; 14623802dce1SIvan Khoronzhuk } 14633802dce1SIvan Khoronzhuk kmemleak_not_leak(skb); 14643802dce1SIvan Khoronzhuk } 14653802dce1SIvan Khoronzhuk 1466e05107e6SIvan Khoronzhuk cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n", 1467e05107e6SIvan Khoronzhuk ch, ch_buf_num); 1468e05107e6SIvan Khoronzhuk } 14693802dce1SIvan Khoronzhuk 1470e05107e6SIvan Khoronzhuk return 0; 14713802dce1SIvan Khoronzhuk } 14723802dce1SIvan Khoronzhuk 14732a05a622SIvan Khoronzhuk static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw) 1474aacebbf8SSebastian Siewior { 14753995d265SSchuyler Patton u32 slave_port; 14763995d265SSchuyler Patton 14776f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 14783995d265SSchuyler Patton 1479aacebbf8SSebastian Siewior if (!slave->phy) 1480aacebbf8SSebastian Siewior return; 1481aacebbf8SSebastian Siewior phy_stop(slave->phy); 1482aacebbf8SSebastian Siewior phy_disconnect(slave->phy); 1483aacebbf8SSebastian Siewior slave->phy = NULL; 14842a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 14853995d265SSchuyler Patton ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 14861f95ba00SGrygorii Strashko soft_reset_slave(slave); 1487aacebbf8SSebastian Siewior } 1488aacebbf8SSebastian Siewior 1489df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev) 1490df828598SMugunthan V N { 1491df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1492649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 14933802dce1SIvan Khoronzhuk int ret; 1494df828598SMugunthan V N u32 reg; 1495df828598SMugunthan V N 149656e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1497108a6537SGrygorii Strashko if (ret < 0) { 149856e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1499108a6537SGrygorii Strashko return ret; 1500108a6537SGrygorii Strashko } 15013fa88c51SGrygorii Strashko 1502df828598SMugunthan V N netif_carrier_off(ndev); 1503df828598SMugunthan V N 1504e05107e6SIvan Khoronzhuk /* Notify the stack of the actual queue counts. */ 1505e05107e6SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num); 1506e05107e6SIvan Khoronzhuk if (ret) { 1507e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 1508e05107e6SIvan Khoronzhuk goto err_cleanup; 1509e05107e6SIvan Khoronzhuk } 1510e05107e6SIvan Khoronzhuk 1511e05107e6SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num); 1512e05107e6SIvan Khoronzhuk if (ret) { 1513e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 1514e05107e6SIvan Khoronzhuk goto err_cleanup; 1515e05107e6SIvan Khoronzhuk } 1516e05107e6SIvan Khoronzhuk 15172a05a622SIvan Khoronzhuk reg = cpsw->version; 1518df828598SMugunthan V N 1519df828598SMugunthan V N dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 1520df828598SMugunthan V N CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 1521df828598SMugunthan V N CPSW_RTL_VERSION(reg)); 1522df828598SMugunthan V N 1523d5bc1613SIvan Khoronzhuk /* Initialize host and slave ports */ 1524d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) 1525df828598SMugunthan V N cpsw_init_host_port(priv); 1526df828598SMugunthan V N for_each_slave(priv, cpsw_slave_open, priv); 1527df828598SMugunthan V N 15283b72c2feSMugunthan V N /* Add default VLAN */ 1529606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) 15303b72c2feSMugunthan V N cpsw_add_default_vlan(priv); 1531e6afea0bSMugunthan V N else 15322a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan, 153361f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0); 15343b72c2feSMugunthan V N 1535d5bc1613SIvan Khoronzhuk /* initialize shared resources for every ndev */ 1536d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) { 1537d9ba8f9eSMugunthan V N /* disable priority elevation */ 1538dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->regs->ptype); 1539df828598SMugunthan V N 1540d9ba8f9eSMugunthan V N /* enable statistics collection only on all ports */ 1541dda5f5feSGrygorii Strashko writel_relaxed(0x7, &cpsw->regs->stat_port_en); 1542df828598SMugunthan V N 15431923d6e4SMugunthan V N /* Enable internal fifo flow control */ 15445d8d0d4dSIvan Khoronzhuk writel(0x7, &cpsw->regs->flow_control); 15451923d6e4SMugunthan V N 1546dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_rx); 1547dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_tx); 1548d354eb85SMugunthan V N 1549e38b5a3dSIvan Khoronzhuk if (cpsw->tx_irq_disabled) { 1550e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 1551e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 15527da11600SMugunthan V N } 15537da11600SMugunthan V N 1554e38b5a3dSIvan Khoronzhuk if (cpsw->rx_irq_disabled) { 1555e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 1556e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 15577da11600SMugunthan V N } 15587da11600SMugunthan V N 15593802dce1SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 15603802dce1SIvan Khoronzhuk if (ret < 0) 1561aacebbf8SSebastian Siewior goto err_cleanup; 1562f280e89aSMugunthan V N 15638a2c9a5aSGrygorii Strashko if (cpts_register(cpsw->cpts)) 1564f280e89aSMugunthan V N dev_err(priv->dev, "error registering cpts device\n"); 1565f280e89aSMugunthan V N 1566d9ba8f9eSMugunthan V N } 1567df828598SMugunthan V N 1568ff5b8ef2SMugunthan V N /* Enable Interrupt pacing if configured */ 15692a05a622SIvan Khoronzhuk if (cpsw->coal_intvl != 0) { 1570ff5b8ef2SMugunthan V N struct ethtool_coalesce coal; 1571ff5b8ef2SMugunthan V N 15722a05a622SIvan Khoronzhuk coal.rx_coalesce_usecs = cpsw->coal_intvl; 1573ff5b8ef2SMugunthan V N cpsw_set_coalesce(ndev, &coal); 1574ff5b8ef2SMugunthan V N } 1575ff5b8ef2SMugunthan V N 15762c836bd9SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 15772c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1578d5bc1613SIvan Khoronzhuk cpsw->usage_count++; 1579f63a975eSMugunthan V N 1580df828598SMugunthan V N return 0; 1581df828598SMugunthan V N 1582aacebbf8SSebastian Siewior err_cleanup: 15832c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 15842a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 158556e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1586aacebbf8SSebastian Siewior netif_carrier_off(priv->ndev); 1587aacebbf8SSebastian Siewior return ret; 1588df828598SMugunthan V N } 1589df828598SMugunthan V N 1590df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev) 1591df828598SMugunthan V N { 1592df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1593649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1594df828598SMugunthan V N 1595df828598SMugunthan V N cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 1596e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(priv->ndev); 1597df828598SMugunthan V N netif_carrier_off(priv->ndev); 1598d9ba8f9eSMugunthan V N 1599d5bc1613SIvan Khoronzhuk if (cpsw->usage_count <= 1) { 1600dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_rx); 1601dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_tx); 16022a05a622SIvan Khoronzhuk cpts_unregister(cpsw->cpts); 16032c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 16042c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 16052a05a622SIvan Khoronzhuk cpsw_ale_stop(cpsw->ale); 1606d9ba8f9eSMugunthan V N } 16072a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 16080be01b8eSIvan Khoronzhuk 16090be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 16100be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 16110be01b8eSIvan Khoronzhuk 1612d5bc1613SIvan Khoronzhuk cpsw->usage_count--; 161356e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 1614df828598SMugunthan V N return 0; 1615df828598SMugunthan V N } 1616df828598SMugunthan V N 1617df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 1618df828598SMugunthan V N struct net_device *ndev) 1619df828598SMugunthan V N { 1620df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 16212c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1622f44f8417SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 1623e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 1624e05107e6SIvan Khoronzhuk struct cpdma_chan *txch; 1625e05107e6SIvan Khoronzhuk int ret, q_idx; 1626df828598SMugunthan V N 1627df828598SMugunthan V N if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 1628df828598SMugunthan V N cpsw_err(priv, tx_err, "packet pad failed\n"); 16298dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 16301bf96050SIvan Khoronzhuk return NET_XMIT_DROP; 1631df828598SMugunthan V N } 1632df828598SMugunthan V N 16339232b16dSMugunthan V N if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 1634f44f8417SIvan Khoronzhuk cpts_is_tx_enabled(cpts) && cpts_can_timestamp(cpts, skb)) 16352e5b38abSRichard Cochran skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 16362e5b38abSRichard Cochran 1637e05107e6SIvan Khoronzhuk q_idx = skb_get_queue_mapping(skb); 1638e05107e6SIvan Khoronzhuk if (q_idx >= cpsw->tx_ch_num) 1639e05107e6SIvan Khoronzhuk q_idx = q_idx % cpsw->tx_ch_num; 1640e05107e6SIvan Khoronzhuk 16418feb0a19SIvan Khoronzhuk txch = cpsw->txv[q_idx].ch; 1642e05107e6SIvan Khoronzhuk ret = cpsw_tx_packet_submit(priv, skb, txch); 1643df828598SMugunthan V N if (unlikely(ret != 0)) { 1644df828598SMugunthan V N cpsw_err(priv, tx_err, "desc submit failed\n"); 1645df828598SMugunthan V N goto fail; 1646df828598SMugunthan V N } 1647df828598SMugunthan V N 1648fae50823SMugunthan V N /* If there is no more tx desc left free then we need to 1649fae50823SMugunthan V N * tell the kernel to stop sending us tx frames. 1650fae50823SMugunthan V N */ 1651e05107e6SIvan Khoronzhuk if (unlikely(!cpdma_check_free_tx_desc(txch))) { 1652e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, q_idx); 1653e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1654e05107e6SIvan Khoronzhuk } 1655fae50823SMugunthan V N 1656df828598SMugunthan V N return NETDEV_TX_OK; 1657df828598SMugunthan V N fail: 16588dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 1659e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 1660e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 1661df828598SMugunthan V N return NETDEV_TX_BUSY; 1662df828598SMugunthan V N } 1663df828598SMugunthan V N 1664c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 16652e5b38abSRichard Cochran 16662a05a622SIvan Khoronzhuk static void cpsw_hwtstamp_v1(struct cpsw_common *cpsw) 16672e5b38abSRichard Cochran { 1668606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave]; 16692e5b38abSRichard Cochran u32 ts_en, seq_id; 16702e5b38abSRichard Cochran 1671b63ba58eSGrygorii Strashko if (!cpts_is_tx_enabled(cpsw->cpts) && 1672b63ba58eSGrygorii Strashko !cpts_is_rx_enabled(cpsw->cpts)) { 16732e5b38abSRichard Cochran slave_write(slave, 0, CPSW1_TS_CTL); 16742e5b38abSRichard Cochran return; 16752e5b38abSRichard Cochran } 16762e5b38abSRichard Cochran 16772e5b38abSRichard Cochran seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588; 16782e5b38abSRichard Cochran ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS; 16792e5b38abSRichard Cochran 1680b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 16812e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_TX_EN; 16822e5b38abSRichard Cochran 1683b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 16842e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_RX_EN; 16852e5b38abSRichard Cochran 16862e5b38abSRichard Cochran slave_write(slave, ts_en, CPSW1_TS_CTL); 16872e5b38abSRichard Cochran slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE); 16882e5b38abSRichard Cochran } 16892e5b38abSRichard Cochran 16902e5b38abSRichard Cochran static void cpsw_hwtstamp_v2(struct cpsw_priv *priv) 16912e5b38abSRichard Cochran { 1692d9ba8f9eSMugunthan V N struct cpsw_slave *slave; 16935d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16942e5b38abSRichard Cochran u32 ctrl, mtype; 16952e5b38abSRichard Cochran 1696cb7d78d0SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 1697d9ba8f9eSMugunthan V N 16982e5b38abSRichard Cochran ctrl = slave_read(slave, CPSW2_CONTROL); 16992a05a622SIvan Khoronzhuk switch (cpsw->version) { 170009c55372SGeorge Cherian case CPSW_VERSION_2: 170109c55372SGeorge Cherian ctrl &= ~CTRL_V2_ALL_TS_MASK; 17022e5b38abSRichard Cochran 1703b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 170409c55372SGeorge Cherian ctrl |= CTRL_V2_TX_TS_BITS; 17052e5b38abSRichard Cochran 1706b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 170709c55372SGeorge Cherian ctrl |= CTRL_V2_RX_TS_BITS; 170809c55372SGeorge Cherian break; 170909c55372SGeorge Cherian case CPSW_VERSION_3: 171009c55372SGeorge Cherian default: 171109c55372SGeorge Cherian ctrl &= ~CTRL_V3_ALL_TS_MASK; 171209c55372SGeorge Cherian 1713b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 171409c55372SGeorge Cherian ctrl |= CTRL_V3_TX_TS_BITS; 171509c55372SGeorge Cherian 1716b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 171709c55372SGeorge Cherian ctrl |= CTRL_V3_RX_TS_BITS; 171809c55372SGeorge Cherian break; 171909c55372SGeorge Cherian } 17202e5b38abSRichard Cochran 17212e5b38abSRichard Cochran mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS; 17222e5b38abSRichard Cochran 17232e5b38abSRichard Cochran slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE); 17242e5b38abSRichard Cochran slave_write(slave, ctrl, CPSW2_CONTROL); 1725dda5f5feSGrygorii Strashko writel_relaxed(ETH_P_1588, &cpsw->regs->ts_ltype); 17262e5b38abSRichard Cochran } 17272e5b38abSRichard Cochran 1728a5b4145bSBen Hutchings static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 17292e5b38abSRichard Cochran { 17303177bf6fSMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 17312e5b38abSRichard Cochran struct hwtstamp_config cfg; 17322a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 17332a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 17342e5b38abSRichard Cochran 17352a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 17362a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 17372a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 17382ee91e54SBen Hutchings return -EOPNOTSUPP; 17392ee91e54SBen Hutchings 17402e5b38abSRichard Cochran if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 17412e5b38abSRichard Cochran return -EFAULT; 17422e5b38abSRichard Cochran 17432e5b38abSRichard Cochran /* reserved for future extensions */ 17442e5b38abSRichard Cochran if (cfg.flags) 17452e5b38abSRichard Cochran return -EINVAL; 17462e5b38abSRichard Cochran 17472ee91e54SBen Hutchings if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON) 17482e5b38abSRichard Cochran return -ERANGE; 17492e5b38abSRichard Cochran 17502e5b38abSRichard Cochran switch (cfg.rx_filter) { 17512e5b38abSRichard Cochran case HWTSTAMP_FILTER_NONE: 1752b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 0); 17532e5b38abSRichard Cochran break; 17542e5b38abSRichard Cochran case HWTSTAMP_FILTER_ALL: 1755e9523a5aSGrygorii Strashko case HWTSTAMP_FILTER_NTP_ALL: 1756e9523a5aSGrygorii Strashko return -ERANGE; 17572e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 17582e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 17592e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 1760e9523a5aSGrygorii Strashko cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V1_L4_EVENT); 1761e9523a5aSGrygorii Strashko cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; 1762e9523a5aSGrygorii Strashko break; 17632e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 17642e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 17652e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 17662e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 17672e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 17682e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 17692e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_EVENT: 17702e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_SYNC: 17712e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1772e9523a5aSGrygorii Strashko cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V2_EVENT); 17732e5b38abSRichard Cochran cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 17742e5b38abSRichard Cochran break; 17752e5b38abSRichard Cochran default: 17762e5b38abSRichard Cochran return -ERANGE; 17772e5b38abSRichard Cochran } 17782e5b38abSRichard Cochran 1779b63ba58eSGrygorii Strashko cpts_tx_enable(cpts, cfg.tx_type == HWTSTAMP_TX_ON); 17802ee91e54SBen Hutchings 17812a05a622SIvan Khoronzhuk switch (cpsw->version) { 17822e5b38abSRichard Cochran case CPSW_VERSION_1: 17832a05a622SIvan Khoronzhuk cpsw_hwtstamp_v1(cpsw); 17842e5b38abSRichard Cochran break; 17852e5b38abSRichard Cochran case CPSW_VERSION_2: 1786f7d403cbSGeorge Cherian case CPSW_VERSION_3: 17872e5b38abSRichard Cochran cpsw_hwtstamp_v2(priv); 17882e5b38abSRichard Cochran break; 17892e5b38abSRichard Cochran default: 17902ee91e54SBen Hutchings WARN_ON(1); 17912e5b38abSRichard Cochran } 17922e5b38abSRichard Cochran 17932e5b38abSRichard Cochran return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 17942e5b38abSRichard Cochran } 17952e5b38abSRichard Cochran 1796a5b4145bSBen Hutchings static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1797a5b4145bSBen Hutchings { 17982a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(dev); 17992a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 1800a5b4145bSBen Hutchings struct hwtstamp_config cfg; 1801a5b4145bSBen Hutchings 18022a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 18032a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 18042a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 1805a5b4145bSBen Hutchings return -EOPNOTSUPP; 1806a5b4145bSBen Hutchings 1807a5b4145bSBen Hutchings cfg.flags = 0; 1808b63ba58eSGrygorii Strashko cfg.tx_type = cpts_is_tx_enabled(cpts) ? 1809b63ba58eSGrygorii Strashko HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; 1810b63ba58eSGrygorii Strashko cfg.rx_filter = (cpts_is_rx_enabled(cpts) ? 1811e9523a5aSGrygorii Strashko cpts->rx_enable : HWTSTAMP_FILTER_NONE); 1812a5b4145bSBen Hutchings 1813a5b4145bSBen Hutchings return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 1814a5b4145bSBen Hutchings } 1815c8395d4eSGrygorii Strashko #else 1816c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 1817c8395d4eSGrygorii Strashko { 1818c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1819c8395d4eSGrygorii Strashko } 1820a5b4145bSBen Hutchings 1821c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 1822c8395d4eSGrygorii Strashko { 1823c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 1824c8395d4eSGrygorii Strashko } 18252e5b38abSRichard Cochran #endif /*CONFIG_TI_CPTS*/ 18262e5b38abSRichard Cochran 18272e5b38abSRichard Cochran static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 18282e5b38abSRichard Cochran { 182911f2c988SMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 1830606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1831606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 183211f2c988SMugunthan V N 18332e5b38abSRichard Cochran if (!netif_running(dev)) 18342e5b38abSRichard Cochran return -EINVAL; 18352e5b38abSRichard Cochran 183611f2c988SMugunthan V N switch (cmd) { 183711f2c988SMugunthan V N case SIOCSHWTSTAMP: 1838a5b4145bSBen Hutchings return cpsw_hwtstamp_set(dev, req); 1839a5b4145bSBen Hutchings case SIOCGHWTSTAMP: 1840a5b4145bSBen Hutchings return cpsw_hwtstamp_get(dev, req); 18412e5b38abSRichard Cochran } 18422e5b38abSRichard Cochran 1843606f3993SIvan Khoronzhuk if (!cpsw->slaves[slave_no].phy) 1844c1b59947SStefan Sørensen return -EOPNOTSUPP; 1845606f3993SIvan Khoronzhuk return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd); 184611f2c988SMugunthan V N } 184711f2c988SMugunthan V N 1848df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev) 1849df828598SMugunthan V N { 1850df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 18512c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1852e05107e6SIvan Khoronzhuk int ch; 1853df828598SMugunthan V N 1854df828598SMugunthan V N cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 18558dc43ddcSTobias Klauser ndev->stats.tx_errors++; 18562c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1857e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 18588feb0a19SIvan Khoronzhuk cpdma_chan_stop(cpsw->txv[ch].ch); 18598feb0a19SIvan Khoronzhuk cpdma_chan_start(cpsw->txv[ch].ch); 1860e05107e6SIvan Khoronzhuk } 1861e05107e6SIvan Khoronzhuk 18622c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 186375514b66SGrygorii Strashko netif_trans_update(ndev); 186475514b66SGrygorii Strashko netif_tx_wake_all_queues(ndev); 1865df828598SMugunthan V N } 1866df828598SMugunthan V N 1867dcfd8d58SMugunthan V N static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p) 1868dcfd8d58SMugunthan V N { 1869dcfd8d58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1870dcfd8d58SMugunthan V N struct sockaddr *addr = (struct sockaddr *)p; 1871649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1872dcfd8d58SMugunthan V N int flags = 0; 1873dcfd8d58SMugunthan V N u16 vid = 0; 1874a6c5d14fSGrygorii Strashko int ret; 1875dcfd8d58SMugunthan V N 1876dcfd8d58SMugunthan V N if (!is_valid_ether_addr(addr->sa_data)) 1877dcfd8d58SMugunthan V N return -EADDRNOTAVAIL; 1878dcfd8d58SMugunthan V N 187956e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1880a6c5d14fSGrygorii Strashko if (ret < 0) { 188156e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1882a6c5d14fSGrygorii Strashko return ret; 1883a6c5d14fSGrygorii Strashko } 1884a6c5d14fSGrygorii Strashko 1885606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 1886606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 1887dcfd8d58SMugunthan V N flags = ALE_VLAN; 1888dcfd8d58SMugunthan V N } 1889dcfd8d58SMugunthan V N 18902a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1891dcfd8d58SMugunthan V N flags, vid); 18922a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM, 1893dcfd8d58SMugunthan V N flags, vid); 1894dcfd8d58SMugunthan V N 1895dcfd8d58SMugunthan V N memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); 1896dcfd8d58SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 1897dcfd8d58SMugunthan V N for_each_slave(priv, cpsw_set_slave_mac, priv); 1898dcfd8d58SMugunthan V N 189956e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1900a6c5d14fSGrygorii Strashko 1901dcfd8d58SMugunthan V N return 0; 1902dcfd8d58SMugunthan V N } 1903dcfd8d58SMugunthan V N 1904df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 1905df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev) 1906df828598SMugunthan V N { 1907dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1908df828598SMugunthan V N 1909dbc4ec52SIvan Khoronzhuk cpsw_intr_disable(cpsw); 1910dbc4ec52SIvan Khoronzhuk cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw); 1911dbc4ec52SIvan Khoronzhuk cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw); 1912dbc4ec52SIvan Khoronzhuk cpsw_intr_enable(cpsw); 1913df828598SMugunthan V N } 1914df828598SMugunthan V N #endif 1915df828598SMugunthan V N 19163b72c2feSMugunthan V N static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, 19173b72c2feSMugunthan V N unsigned short vid) 19183b72c2feSMugunthan V N { 19193b72c2feSMugunthan V N int ret; 19209f6bd8faSMugunthan V N int unreg_mcast_mask = 0; 19219f6bd8faSMugunthan V N u32 port_mask; 1922606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19239f6bd8faSMugunthan V N 1924606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 19259f6bd8faSMugunthan V N port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST; 19269f6bd8faSMugunthan V N 19279f6bd8faSMugunthan V N if (priv->ndev->flags & IFF_ALLMULTI) 19289f6bd8faSMugunthan V N unreg_mcast_mask = port_mask; 19299f6bd8faSMugunthan V N } else { 19309f6bd8faSMugunthan V N port_mask = ALE_ALL_PORTS; 19311e5c4bc4SLennart Sorensen 19321e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 19331e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 19341e5c4bc4SLennart Sorensen else 19351e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 19369f6bd8faSMugunthan V N } 19373b72c2feSMugunthan V N 19382a05a622SIvan Khoronzhuk ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, 193961f1cef9SGrygorii Strashko unreg_mcast_mask); 19403b72c2feSMugunthan V N if (ret != 0) 19413b72c2feSMugunthan V N return ret; 19423b72c2feSMugunthan V N 19432a05a622SIvan Khoronzhuk ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 194471a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19453b72c2feSMugunthan V N if (ret != 0) 19463b72c2feSMugunthan V N goto clean_vid; 19473b72c2feSMugunthan V N 19482a05a622SIvan Khoronzhuk ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 19499f6bd8faSMugunthan V N port_mask, ALE_VLAN, vid, 0); 19503b72c2feSMugunthan V N if (ret != 0) 19513b72c2feSMugunthan V N goto clean_vlan_ucast; 19523b72c2feSMugunthan V N return 0; 19533b72c2feSMugunthan V N 19543b72c2feSMugunthan V N clean_vlan_ucast: 19552a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 195671a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 19573b72c2feSMugunthan V N clean_vid: 19582a05a622SIvan Khoronzhuk cpsw_ale_del_vlan(cpsw->ale, vid, 0); 19593b72c2feSMugunthan V N return ret; 19603b72c2feSMugunthan V N } 19613b72c2feSMugunthan V N 19623b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, 196380d5c368SPatrick McHardy __be16 proto, u16 vid) 19643b72c2feSMugunthan V N { 19653b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1966649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1967a6c5d14fSGrygorii Strashko int ret; 19683b72c2feSMugunthan V N 1969606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 19703b72c2feSMugunthan V N return 0; 19713b72c2feSMugunthan V N 197256e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1973a6c5d14fSGrygorii Strashko if (ret < 0) { 197456e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1975a6c5d14fSGrygorii Strashko return ret; 1976a6c5d14fSGrygorii Strashko } 1977a6c5d14fSGrygorii Strashko 1978606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 197902a54164SMugunthan V N /* In dual EMAC, reserved VLAN id should not be used for 198002a54164SMugunthan V N * creating VLAN interfaces as this can break the dual 198102a54164SMugunthan V N * EMAC port separation 198202a54164SMugunthan V N */ 198302a54164SMugunthan V N int i; 198402a54164SMugunthan V N 1985606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 1986606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 198702a54164SMugunthan V N return -EINVAL; 198802a54164SMugunthan V N } 198902a54164SMugunthan V N } 199002a54164SMugunthan V N 19913b72c2feSMugunthan V N dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid); 1992a6c5d14fSGrygorii Strashko ret = cpsw_add_vlan_ale_entry(priv, vid); 1993a6c5d14fSGrygorii Strashko 199456e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 1995a6c5d14fSGrygorii Strashko return ret; 19963b72c2feSMugunthan V N } 19973b72c2feSMugunthan V N 19983b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev, 199980d5c368SPatrick McHardy __be16 proto, u16 vid) 20003b72c2feSMugunthan V N { 20013b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2002649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 20033b72c2feSMugunthan V N int ret; 20043b72c2feSMugunthan V N 2005606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 20063b72c2feSMugunthan V N return 0; 20073b72c2feSMugunthan V N 200856e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 2009a6c5d14fSGrygorii Strashko if (ret < 0) { 201056e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 2011a6c5d14fSGrygorii Strashko return ret; 2012a6c5d14fSGrygorii Strashko } 2013a6c5d14fSGrygorii Strashko 2014606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 201502a54164SMugunthan V N int i; 201602a54164SMugunthan V N 2017606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 2018606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 201902a54164SMugunthan V N return -EINVAL; 202002a54164SMugunthan V N } 202102a54164SMugunthan V N } 202202a54164SMugunthan V N 20233b72c2feSMugunthan V N dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid); 20242a05a622SIvan Khoronzhuk ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0); 20253b72c2feSMugunthan V N if (ret != 0) 20263b72c2feSMugunthan V N return ret; 20273b72c2feSMugunthan V N 20282a05a622SIvan Khoronzhuk ret = cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 202961f1cef9SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 20303b72c2feSMugunthan V N if (ret != 0) 20313b72c2feSMugunthan V N return ret; 20323b72c2feSMugunthan V N 20332a05a622SIvan Khoronzhuk ret = cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast, 20343b72c2feSMugunthan V N 0, ALE_VLAN, vid); 203556e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 2036a6c5d14fSGrygorii Strashko return ret; 20373b72c2feSMugunthan V N } 20383b72c2feSMugunthan V N 203983fcad0cSIvan Khoronzhuk static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate) 204083fcad0cSIvan Khoronzhuk { 204183fcad0cSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 204283fcad0cSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 204352986a2fSIvan Khoronzhuk struct cpsw_slave *slave; 204432b78d85SIvan Khoronzhuk u32 min_rate; 204583fcad0cSIvan Khoronzhuk u32 ch_rate; 204652986a2fSIvan Khoronzhuk int i, ret; 204783fcad0cSIvan Khoronzhuk 204883fcad0cSIvan Khoronzhuk ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate; 204983fcad0cSIvan Khoronzhuk if (ch_rate == rate) 205083fcad0cSIvan Khoronzhuk return 0; 205183fcad0cSIvan Khoronzhuk 205232b78d85SIvan Khoronzhuk ch_rate = rate * 1000; 205383fcad0cSIvan Khoronzhuk min_rate = cpdma_chan_get_min_rate(cpsw->dma); 205432b78d85SIvan Khoronzhuk if ((ch_rate < min_rate && ch_rate)) { 205532b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be less than %dMbps", 205683fcad0cSIvan Khoronzhuk min_rate); 205783fcad0cSIvan Khoronzhuk return -EINVAL; 205883fcad0cSIvan Khoronzhuk } 205983fcad0cSIvan Khoronzhuk 20600be01b8eSIvan Khoronzhuk if (rate > cpsw->speed) { 206132b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be more than 2Gbps"); 206232b78d85SIvan Khoronzhuk return -EINVAL; 206332b78d85SIvan Khoronzhuk } 206432b78d85SIvan Khoronzhuk 206583fcad0cSIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 206683fcad0cSIvan Khoronzhuk if (ret < 0) { 206783fcad0cSIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 206883fcad0cSIvan Khoronzhuk return ret; 206983fcad0cSIvan Khoronzhuk } 207083fcad0cSIvan Khoronzhuk 207132b78d85SIvan Khoronzhuk ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate); 207283fcad0cSIvan Khoronzhuk pm_runtime_put(cpsw->dev); 207332b78d85SIvan Khoronzhuk 207432b78d85SIvan Khoronzhuk if (ret) 207532b78d85SIvan Khoronzhuk return ret; 207632b78d85SIvan Khoronzhuk 207752986a2fSIvan Khoronzhuk /* update rates for slaves tx queues */ 207852986a2fSIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 207952986a2fSIvan Khoronzhuk slave = &cpsw->slaves[i]; 208052986a2fSIvan Khoronzhuk if (!slave->ndev) 208152986a2fSIvan Khoronzhuk continue; 208252986a2fSIvan Khoronzhuk 208352986a2fSIvan Khoronzhuk netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate; 208452986a2fSIvan Khoronzhuk } 208552986a2fSIvan Khoronzhuk 208632b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 208783fcad0cSIvan Khoronzhuk return ret; 208883fcad0cSIvan Khoronzhuk } 208983fcad0cSIvan Khoronzhuk 2090df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = { 2091df828598SMugunthan V N .ndo_open = cpsw_ndo_open, 2092df828598SMugunthan V N .ndo_stop = cpsw_ndo_stop, 2093df828598SMugunthan V N .ndo_start_xmit = cpsw_ndo_start_xmit, 2094dcfd8d58SMugunthan V N .ndo_set_mac_address = cpsw_ndo_set_mac_address, 20952e5b38abSRichard Cochran .ndo_do_ioctl = cpsw_ndo_ioctl, 2096df828598SMugunthan V N .ndo_validate_addr = eth_validate_addr, 2097df828598SMugunthan V N .ndo_tx_timeout = cpsw_ndo_tx_timeout, 20985c50a856SMugunthan V N .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, 209983fcad0cSIvan Khoronzhuk .ndo_set_tx_maxrate = cpsw_ndo_set_tx_maxrate, 2100df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 2101df828598SMugunthan V N .ndo_poll_controller = cpsw_ndo_poll_controller, 2102df828598SMugunthan V N #endif 21033b72c2feSMugunthan V N .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, 21043b72c2feSMugunthan V N .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, 2105df828598SMugunthan V N }; 2106df828598SMugunthan V N 210752c4f0ecSMugunthan V N static int cpsw_get_regs_len(struct net_device *ndev) 210852c4f0ecSMugunthan V N { 2109606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 211052c4f0ecSMugunthan V N 2111606f3993SIvan Khoronzhuk return cpsw->data.ale_entries * ALE_ENTRY_WORDS * sizeof(u32); 211252c4f0ecSMugunthan V N } 211352c4f0ecSMugunthan V N 211452c4f0ecSMugunthan V N static void cpsw_get_regs(struct net_device *ndev, 211552c4f0ecSMugunthan V N struct ethtool_regs *regs, void *p) 211652c4f0ecSMugunthan V N { 211752c4f0ecSMugunthan V N u32 *reg = p; 21182a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 211952c4f0ecSMugunthan V N 212052c4f0ecSMugunthan V N /* update CPSW IP version */ 21212a05a622SIvan Khoronzhuk regs->version = cpsw->version; 212252c4f0ecSMugunthan V N 21232a05a622SIvan Khoronzhuk cpsw_ale_dump(cpsw->ale, reg); 212452c4f0ecSMugunthan V N } 212552c4f0ecSMugunthan V N 2126df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev, 2127df828598SMugunthan V N struct ethtool_drvinfo *info) 2128df828598SMugunthan V N { 2129649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 213056e31bd8SIvan Khoronzhuk struct platform_device *pdev = to_platform_device(cpsw->dev); 21317826d43fSJiri Pirko 213252c4f0ecSMugunthan V N strlcpy(info->driver, "cpsw", sizeof(info->driver)); 21337826d43fSJiri Pirko strlcpy(info->version, "1.0", sizeof(info->version)); 213456e31bd8SIvan Khoronzhuk strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info)); 2135df828598SMugunthan V N } 2136df828598SMugunthan V N 2137df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev) 2138df828598SMugunthan V N { 2139df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2140df828598SMugunthan V N return priv->msg_enable; 2141df828598SMugunthan V N } 2142df828598SMugunthan V N 2143df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 2144df828598SMugunthan V N { 2145df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2146df828598SMugunthan V N priv->msg_enable = value; 2147df828598SMugunthan V N } 2148df828598SMugunthan V N 2149c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 21502e5b38abSRichard Cochran static int cpsw_get_ts_info(struct net_device *ndev, 21512e5b38abSRichard Cochran struct ethtool_ts_info *info) 21522e5b38abSRichard Cochran { 21532a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 21542e5b38abSRichard Cochran 21552e5b38abSRichard Cochran info->so_timestamping = 21562e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_HARDWARE | 21572e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21582e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_HARDWARE | 21592e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21602e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE | 21612e5b38abSRichard Cochran SOF_TIMESTAMPING_RAW_HARDWARE; 21622a05a622SIvan Khoronzhuk info->phc_index = cpsw->cpts->phc_index; 21632e5b38abSRichard Cochran info->tx_types = 21642e5b38abSRichard Cochran (1 << HWTSTAMP_TX_OFF) | 21652e5b38abSRichard Cochran (1 << HWTSTAMP_TX_ON); 21662e5b38abSRichard Cochran info->rx_filters = 21672e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_NONE) | 2168e9523a5aSGrygorii Strashko (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 21692e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); 2170c8395d4eSGrygorii Strashko return 0; 2171c8395d4eSGrygorii Strashko } 21722e5b38abSRichard Cochran #else 2173c8395d4eSGrygorii Strashko static int cpsw_get_ts_info(struct net_device *ndev, 2174c8395d4eSGrygorii Strashko struct ethtool_ts_info *info) 2175c8395d4eSGrygorii Strashko { 21762e5b38abSRichard Cochran info->so_timestamping = 21772e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 21782e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 21792e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE; 21802e5b38abSRichard Cochran info->phc_index = -1; 21812e5b38abSRichard Cochran info->tx_types = 0; 21822e5b38abSRichard Cochran info->rx_filters = 0; 21832e5b38abSRichard Cochran return 0; 21842e5b38abSRichard Cochran } 2185c8395d4eSGrygorii Strashko #endif 21862e5b38abSRichard Cochran 21872479876dSPhilippe Reynes static int cpsw_get_link_ksettings(struct net_device *ndev, 21882479876dSPhilippe Reynes struct ethtool_link_ksettings *ecmd) 2189d3bb9c58SMugunthan V N { 2190d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2191606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2192606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2193d3bb9c58SMugunthan V N 21945514174fSyuval.shaia@oracle.com if (!cpsw->slaves[slave_no].phy) 2195d3bb9c58SMugunthan V N return -EOPNOTSUPP; 21965514174fSyuval.shaia@oracle.com 21975514174fSyuval.shaia@oracle.com phy_ethtool_ksettings_get(cpsw->slaves[slave_no].phy, ecmd); 21985514174fSyuval.shaia@oracle.com return 0; 2199d3bb9c58SMugunthan V N } 2200d3bb9c58SMugunthan V N 22012479876dSPhilippe Reynes static int cpsw_set_link_ksettings(struct net_device *ndev, 22022479876dSPhilippe Reynes const struct ethtool_link_ksettings *ecmd) 2203d3bb9c58SMugunthan V N { 2204d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2205606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2206606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2207d3bb9c58SMugunthan V N 2208606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 22092479876dSPhilippe Reynes return phy_ethtool_ksettings_set(cpsw->slaves[slave_no].phy, 22102479876dSPhilippe Reynes ecmd); 2211d3bb9c58SMugunthan V N else 2212d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2213d3bb9c58SMugunthan V N } 2214d3bb9c58SMugunthan V N 2215d8a64420SMatus Ujhelyi static void cpsw_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2216d8a64420SMatus Ujhelyi { 2217d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2218606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2219606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2220d8a64420SMatus Ujhelyi 2221d8a64420SMatus Ujhelyi wol->supported = 0; 2222d8a64420SMatus Ujhelyi wol->wolopts = 0; 2223d8a64420SMatus Ujhelyi 2224606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2225606f3993SIvan Khoronzhuk phy_ethtool_get_wol(cpsw->slaves[slave_no].phy, wol); 2226d8a64420SMatus Ujhelyi } 2227d8a64420SMatus Ujhelyi 2228d8a64420SMatus Ujhelyi static int cpsw_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2229d8a64420SMatus Ujhelyi { 2230d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2231606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2232606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2233d8a64420SMatus Ujhelyi 2234606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2235606f3993SIvan Khoronzhuk return phy_ethtool_set_wol(cpsw->slaves[slave_no].phy, wol); 2236d8a64420SMatus Ujhelyi else 2237d8a64420SMatus Ujhelyi return -EOPNOTSUPP; 2238d8a64420SMatus Ujhelyi } 2239d8a64420SMatus Ujhelyi 22401923d6e4SMugunthan V N static void cpsw_get_pauseparam(struct net_device *ndev, 22411923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22421923d6e4SMugunthan V N { 22431923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22441923d6e4SMugunthan V N 22451923d6e4SMugunthan V N pause->autoneg = AUTONEG_DISABLE; 22461923d6e4SMugunthan V N pause->rx_pause = priv->rx_pause ? true : false; 22471923d6e4SMugunthan V N pause->tx_pause = priv->tx_pause ? true : false; 22481923d6e4SMugunthan V N } 22491923d6e4SMugunthan V N 22501923d6e4SMugunthan V N static int cpsw_set_pauseparam(struct net_device *ndev, 22511923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 22521923d6e4SMugunthan V N { 22531923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 22541923d6e4SMugunthan V N bool link; 22551923d6e4SMugunthan V N 22561923d6e4SMugunthan V N priv->rx_pause = pause->rx_pause ? true : false; 22571923d6e4SMugunthan V N priv->tx_pause = pause->tx_pause ? true : false; 22581923d6e4SMugunthan V N 22591923d6e4SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 22601923d6e4SMugunthan V N return 0; 22611923d6e4SMugunthan V N } 22621923d6e4SMugunthan V N 22637898b1daSGrygorii Strashko static int cpsw_ethtool_op_begin(struct net_device *ndev) 22647898b1daSGrygorii Strashko { 22657898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2266649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 22677898b1daSGrygorii Strashko int ret; 22687898b1daSGrygorii Strashko 226956e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 22707898b1daSGrygorii Strashko if (ret < 0) { 22717898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool begin failed %d\n", ret); 227256e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 22737898b1daSGrygorii Strashko } 22747898b1daSGrygorii Strashko 22757898b1daSGrygorii Strashko return ret; 22767898b1daSGrygorii Strashko } 22777898b1daSGrygorii Strashko 22787898b1daSGrygorii Strashko static void cpsw_ethtool_op_complete(struct net_device *ndev) 22797898b1daSGrygorii Strashko { 22807898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 22817898b1daSGrygorii Strashko int ret; 22827898b1daSGrygorii Strashko 228356e31bd8SIvan Khoronzhuk ret = pm_runtime_put(priv->cpsw->dev); 22847898b1daSGrygorii Strashko if (ret < 0) 22857898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool complete failed %d\n", ret); 22867898b1daSGrygorii Strashko } 22877898b1daSGrygorii Strashko 2288ce52c744SIvan Khoronzhuk static void cpsw_get_channels(struct net_device *ndev, 2289ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2290ce52c744SIvan Khoronzhuk { 2291ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2292ce52c744SIvan Khoronzhuk 2293ce52c744SIvan Khoronzhuk ch->max_combined = 0; 2294ce52c744SIvan Khoronzhuk ch->max_rx = CPSW_MAX_QUEUES; 2295ce52c744SIvan Khoronzhuk ch->max_tx = CPSW_MAX_QUEUES; 2296ce52c744SIvan Khoronzhuk ch->max_other = 0; 2297ce52c744SIvan Khoronzhuk ch->other_count = 0; 2298ce52c744SIvan Khoronzhuk ch->rx_count = cpsw->rx_ch_num; 2299ce52c744SIvan Khoronzhuk ch->tx_count = cpsw->tx_ch_num; 2300ce52c744SIvan Khoronzhuk ch->combined_count = 0; 2301ce52c744SIvan Khoronzhuk } 2302ce52c744SIvan Khoronzhuk 2303ce52c744SIvan Khoronzhuk static int cpsw_check_ch_settings(struct cpsw_common *cpsw, 2304ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2305ce52c744SIvan Khoronzhuk { 2306ce52c744SIvan Khoronzhuk if (ch->combined_count) 2307ce52c744SIvan Khoronzhuk return -EINVAL; 2308ce52c744SIvan Khoronzhuk 2309ce52c744SIvan Khoronzhuk /* verify we have at least one channel in each direction */ 2310ce52c744SIvan Khoronzhuk if (!ch->rx_count || !ch->tx_count) 2311ce52c744SIvan Khoronzhuk return -EINVAL; 2312ce52c744SIvan Khoronzhuk 2313ce52c744SIvan Khoronzhuk if (ch->rx_count > cpsw->data.channels || 2314ce52c744SIvan Khoronzhuk ch->tx_count > cpsw->data.channels) 2315ce52c744SIvan Khoronzhuk return -EINVAL; 2316ce52c744SIvan Khoronzhuk 2317ce52c744SIvan Khoronzhuk return 0; 2318ce52c744SIvan Khoronzhuk } 2319ce52c744SIvan Khoronzhuk 2320ce52c744SIvan Khoronzhuk static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx) 2321ce52c744SIvan Khoronzhuk { 2322ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2323ce52c744SIvan Khoronzhuk void (*handler)(void *, int, int); 232483fcad0cSIvan Khoronzhuk struct netdev_queue *queue; 23258feb0a19SIvan Khoronzhuk struct cpsw_vector *vec; 2326ce52c744SIvan Khoronzhuk int ret, *ch; 2327ce52c744SIvan Khoronzhuk 2328ce52c744SIvan Khoronzhuk if (rx) { 2329ce52c744SIvan Khoronzhuk ch = &cpsw->rx_ch_num; 23308feb0a19SIvan Khoronzhuk vec = cpsw->rxv; 2331ce52c744SIvan Khoronzhuk handler = cpsw_rx_handler; 2332ce52c744SIvan Khoronzhuk } else { 2333ce52c744SIvan Khoronzhuk ch = &cpsw->tx_ch_num; 23348feb0a19SIvan Khoronzhuk vec = cpsw->txv; 2335ce52c744SIvan Khoronzhuk handler = cpsw_tx_handler; 2336ce52c744SIvan Khoronzhuk } 2337ce52c744SIvan Khoronzhuk 2338ce52c744SIvan Khoronzhuk while (*ch < ch_num) { 23398feb0a19SIvan Khoronzhuk vec[*ch].ch = cpdma_chan_create(cpsw->dma, *ch, handler, rx); 234083fcad0cSIvan Khoronzhuk queue = netdev_get_tx_queue(priv->ndev, *ch); 234183fcad0cSIvan Khoronzhuk queue->tx_maxrate = 0; 2342ce52c744SIvan Khoronzhuk 23438feb0a19SIvan Khoronzhuk if (IS_ERR(vec[*ch].ch)) 23448feb0a19SIvan Khoronzhuk return PTR_ERR(vec[*ch].ch); 2345ce52c744SIvan Khoronzhuk 23468feb0a19SIvan Khoronzhuk if (!vec[*ch].ch) 2347ce52c744SIvan Khoronzhuk return -EINVAL; 2348ce52c744SIvan Khoronzhuk 2349ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "created new %d %s channel\n", *ch, 2350ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2351ce52c744SIvan Khoronzhuk (*ch)++; 2352ce52c744SIvan Khoronzhuk } 2353ce52c744SIvan Khoronzhuk 2354ce52c744SIvan Khoronzhuk while (*ch > ch_num) { 2355ce52c744SIvan Khoronzhuk (*ch)--; 2356ce52c744SIvan Khoronzhuk 23578feb0a19SIvan Khoronzhuk ret = cpdma_chan_destroy(vec[*ch].ch); 2358ce52c744SIvan Khoronzhuk if (ret) 2359ce52c744SIvan Khoronzhuk return ret; 2360ce52c744SIvan Khoronzhuk 2361ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "destroyed %d %s channel\n", *ch, 2362ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2363ce52c744SIvan Khoronzhuk } 2364ce52c744SIvan Khoronzhuk 2365ce52c744SIvan Khoronzhuk return 0; 2366ce52c744SIvan Khoronzhuk } 2367ce52c744SIvan Khoronzhuk 2368ce52c744SIvan Khoronzhuk static int cpsw_update_channels(struct cpsw_priv *priv, 2369ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2370ce52c744SIvan Khoronzhuk { 2371ce52c744SIvan Khoronzhuk int ret; 2372ce52c744SIvan Khoronzhuk 2373ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->rx_count, 1); 2374ce52c744SIvan Khoronzhuk if (ret) 2375ce52c744SIvan Khoronzhuk return ret; 2376ce52c744SIvan Khoronzhuk 2377ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->tx_count, 0); 2378ce52c744SIvan Khoronzhuk if (ret) 2379ce52c744SIvan Khoronzhuk return ret; 2380ce52c744SIvan Khoronzhuk 2381ce52c744SIvan Khoronzhuk return 0; 2382ce52c744SIvan Khoronzhuk } 2383ce52c744SIvan Khoronzhuk 2384022d7ad7SIvan Khoronzhuk static void cpsw_suspend_data_pass(struct net_device *ndev) 2385ce52c744SIvan Khoronzhuk { 2386022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2387ce52c744SIvan Khoronzhuk struct cpsw_slave *slave; 2388022d7ad7SIvan Khoronzhuk int i; 2389ce52c744SIvan Khoronzhuk 2390ce52c744SIvan Khoronzhuk /* Disable NAPI scheduling */ 2391ce52c744SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2392ce52c744SIvan Khoronzhuk 2393ce52c744SIvan Khoronzhuk /* Stop all transmit queues for every network device. 2394ce52c744SIvan Khoronzhuk * Disable re-using rx descriptors with dormant_on. 2395ce52c744SIvan Khoronzhuk */ 2396ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2397ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2398ce52c744SIvan Khoronzhuk continue; 2399ce52c744SIvan Khoronzhuk 2400ce52c744SIvan Khoronzhuk netif_tx_stop_all_queues(slave->ndev); 2401ce52c744SIvan Khoronzhuk netif_dormant_on(slave->ndev); 2402ce52c744SIvan Khoronzhuk } 2403ce52c744SIvan Khoronzhuk 2404ce52c744SIvan Khoronzhuk /* Handle rest of tx packets and stop cpdma channels */ 2405ce52c744SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 2406022d7ad7SIvan Khoronzhuk } 2407022d7ad7SIvan Khoronzhuk 2408022d7ad7SIvan Khoronzhuk static int cpsw_resume_data_pass(struct net_device *ndev) 2409022d7ad7SIvan Khoronzhuk { 2410022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2411022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2412022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2413022d7ad7SIvan Khoronzhuk int i, ret; 2414022d7ad7SIvan Khoronzhuk 2415022d7ad7SIvan Khoronzhuk /* Allow rx packets handling */ 2416022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2417022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2418022d7ad7SIvan Khoronzhuk netif_dormant_off(slave->ndev); 2419022d7ad7SIvan Khoronzhuk 2420022d7ad7SIvan Khoronzhuk /* After this receive is started */ 2421d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) { 2422022d7ad7SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 2423022d7ad7SIvan Khoronzhuk if (ret) 2424022d7ad7SIvan Khoronzhuk return ret; 2425022d7ad7SIvan Khoronzhuk 2426022d7ad7SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 2427022d7ad7SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2428022d7ad7SIvan Khoronzhuk } 2429022d7ad7SIvan Khoronzhuk 2430022d7ad7SIvan Khoronzhuk /* Resume transmit for every affected interface */ 2431022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2432022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2433022d7ad7SIvan Khoronzhuk netif_tx_start_all_queues(slave->ndev); 2434022d7ad7SIvan Khoronzhuk 2435022d7ad7SIvan Khoronzhuk return 0; 2436022d7ad7SIvan Khoronzhuk } 2437022d7ad7SIvan Khoronzhuk 2438022d7ad7SIvan Khoronzhuk static int cpsw_set_channels(struct net_device *ndev, 2439022d7ad7SIvan Khoronzhuk struct ethtool_channels *chs) 2440022d7ad7SIvan Khoronzhuk { 2441022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2442022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2443022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2444022d7ad7SIvan Khoronzhuk int i, ret; 2445022d7ad7SIvan Khoronzhuk 2446022d7ad7SIvan Khoronzhuk ret = cpsw_check_ch_settings(cpsw, chs); 2447022d7ad7SIvan Khoronzhuk if (ret < 0) 2448022d7ad7SIvan Khoronzhuk return ret; 2449022d7ad7SIvan Khoronzhuk 2450022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 2451ce52c744SIvan Khoronzhuk ret = cpsw_update_channels(priv, chs); 2452ce52c744SIvan Khoronzhuk if (ret) 2453ce52c744SIvan Khoronzhuk goto err; 2454ce52c744SIvan Khoronzhuk 2455ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2456ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2457ce52c744SIvan Khoronzhuk continue; 2458ce52c744SIvan Khoronzhuk 2459ce52c744SIvan Khoronzhuk /* Inform stack about new count of queues */ 2460ce52c744SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(slave->ndev, 2461ce52c744SIvan Khoronzhuk cpsw->tx_ch_num); 2462ce52c744SIvan Khoronzhuk if (ret) { 2463ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 2464ce52c744SIvan Khoronzhuk goto err; 2465ce52c744SIvan Khoronzhuk } 2466ce52c744SIvan Khoronzhuk 2467ce52c744SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(slave->ndev, 2468ce52c744SIvan Khoronzhuk cpsw->rx_ch_num); 2469ce52c744SIvan Khoronzhuk if (ret) { 2470ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 2471ce52c744SIvan Khoronzhuk goto err; 2472ce52c744SIvan Khoronzhuk } 2473ce52c744SIvan Khoronzhuk } 2474ce52c744SIvan Khoronzhuk 2475d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 247632b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 24778feb0a19SIvan Khoronzhuk 2478022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 2479022d7ad7SIvan Khoronzhuk if (!ret) 2480ce52c744SIvan Khoronzhuk return 0; 2481ce52c744SIvan Khoronzhuk err: 2482ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot update channels number, closing device\n"); 2483ce52c744SIvan Khoronzhuk dev_close(ndev); 2484ce52c744SIvan Khoronzhuk return ret; 2485ce52c744SIvan Khoronzhuk } 2486ce52c744SIvan Khoronzhuk 2487a0909949SYegor Yefremov static int cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata) 2488a0909949SYegor Yefremov { 2489a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2490a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2491a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2492a0909949SYegor Yefremov 2493a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2494a0909949SYegor Yefremov return phy_ethtool_get_eee(cpsw->slaves[slave_no].phy, edata); 2495a0909949SYegor Yefremov else 2496a0909949SYegor Yefremov return -EOPNOTSUPP; 2497a0909949SYegor Yefremov } 2498a0909949SYegor Yefremov 2499a0909949SYegor Yefremov static int cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata) 2500a0909949SYegor Yefremov { 2501a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 2502a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 2503a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 2504a0909949SYegor Yefremov 2505a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 2506a0909949SYegor Yefremov return phy_ethtool_set_eee(cpsw->slaves[slave_no].phy, edata); 2507a0909949SYegor Yefremov else 2508a0909949SYegor Yefremov return -EOPNOTSUPP; 2509a0909949SYegor Yefremov } 2510a0909949SYegor Yefremov 25116bb10c2bSYegor Yefremov static int cpsw_nway_reset(struct net_device *ndev) 25126bb10c2bSYegor Yefremov { 25136bb10c2bSYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 25146bb10c2bSYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 25156bb10c2bSYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 25166bb10c2bSYegor Yefremov 25176bb10c2bSYegor Yefremov if (cpsw->slaves[slave_no].phy) 25186bb10c2bSYegor Yefremov return genphy_restart_aneg(cpsw->slaves[slave_no].phy); 25196bb10c2bSYegor Yefremov else 25206bb10c2bSYegor Yefremov return -EOPNOTSUPP; 25216bb10c2bSYegor Yefremov } 25226bb10c2bSYegor Yefremov 2523be034fc1SGrygorii Strashko static void cpsw_get_ringparam(struct net_device *ndev, 2524be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2525be034fc1SGrygorii Strashko { 2526be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2527be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2528be034fc1SGrygorii Strashko 2529be034fc1SGrygorii Strashko /* not supported */ 2530be034fc1SGrygorii Strashko ering->tx_max_pending = 0; 2531be034fc1SGrygorii Strashko ering->tx_pending = cpdma_get_num_tx_descs(cpsw->dma); 2532f89d21b9SIvan Khoronzhuk ering->rx_max_pending = descs_pool_size - CPSW_MAX_QUEUES; 2533be034fc1SGrygorii Strashko ering->rx_pending = cpdma_get_num_rx_descs(cpsw->dma); 2534be034fc1SGrygorii Strashko } 2535be034fc1SGrygorii Strashko 2536be034fc1SGrygorii Strashko static int cpsw_set_ringparam(struct net_device *ndev, 2537be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 2538be034fc1SGrygorii Strashko { 2539be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2540be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 2541022d7ad7SIvan Khoronzhuk int ret; 2542be034fc1SGrygorii Strashko 2543be034fc1SGrygorii Strashko /* ignore ering->tx_pending - only rx_pending adjustment is supported */ 2544be034fc1SGrygorii Strashko 2545be034fc1SGrygorii Strashko if (ering->rx_mini_pending || ering->rx_jumbo_pending || 2546f89d21b9SIvan Khoronzhuk ering->rx_pending < CPSW_MAX_QUEUES || 2547f89d21b9SIvan Khoronzhuk ering->rx_pending > (descs_pool_size - CPSW_MAX_QUEUES)) 2548be034fc1SGrygorii Strashko return -EINVAL; 2549be034fc1SGrygorii Strashko 2550be034fc1SGrygorii Strashko if (ering->rx_pending == cpdma_get_num_rx_descs(cpsw->dma)) 2551be034fc1SGrygorii Strashko return 0; 2552be034fc1SGrygorii Strashko 2553022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 2554be034fc1SGrygorii Strashko 2555be034fc1SGrygorii Strashko cpdma_set_num_rx_descs(cpsw->dma, ering->rx_pending); 2556be034fc1SGrygorii Strashko 2557d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 2558be034fc1SGrygorii Strashko cpdma_chan_split_pool(cpsw->dma); 2559be034fc1SGrygorii Strashko 2560022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 2561022d7ad7SIvan Khoronzhuk if (!ret) 2562be034fc1SGrygorii Strashko return 0; 2563022d7ad7SIvan Khoronzhuk 2564022d7ad7SIvan Khoronzhuk dev_err(&ndev->dev, "cannot set ring params, closing device\n"); 2565be034fc1SGrygorii Strashko dev_close(ndev); 2566be034fc1SGrygorii Strashko return ret; 2567be034fc1SGrygorii Strashko } 2568be034fc1SGrygorii Strashko 2569df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = { 2570df828598SMugunthan V N .get_drvinfo = cpsw_get_drvinfo, 2571df828598SMugunthan V N .get_msglevel = cpsw_get_msglevel, 2572df828598SMugunthan V N .set_msglevel = cpsw_set_msglevel, 2573df828598SMugunthan V N .get_link = ethtool_op_get_link, 25742e5b38abSRichard Cochran .get_ts_info = cpsw_get_ts_info, 2575ff5b8ef2SMugunthan V N .get_coalesce = cpsw_get_coalesce, 2576ff5b8ef2SMugunthan V N .set_coalesce = cpsw_set_coalesce, 2577d9718546SMugunthan V N .get_sset_count = cpsw_get_sset_count, 2578d9718546SMugunthan V N .get_strings = cpsw_get_strings, 2579d9718546SMugunthan V N .get_ethtool_stats = cpsw_get_ethtool_stats, 25801923d6e4SMugunthan V N .get_pauseparam = cpsw_get_pauseparam, 25811923d6e4SMugunthan V N .set_pauseparam = cpsw_set_pauseparam, 2582d8a64420SMatus Ujhelyi .get_wol = cpsw_get_wol, 2583d8a64420SMatus Ujhelyi .set_wol = cpsw_set_wol, 258452c4f0ecSMugunthan V N .get_regs_len = cpsw_get_regs_len, 258552c4f0ecSMugunthan V N .get_regs = cpsw_get_regs, 25867898b1daSGrygorii Strashko .begin = cpsw_ethtool_op_begin, 25877898b1daSGrygorii Strashko .complete = cpsw_ethtool_op_complete, 2588ce52c744SIvan Khoronzhuk .get_channels = cpsw_get_channels, 2589ce52c744SIvan Khoronzhuk .set_channels = cpsw_set_channels, 25902479876dSPhilippe Reynes .get_link_ksettings = cpsw_get_link_ksettings, 25912479876dSPhilippe Reynes .set_link_ksettings = cpsw_set_link_ksettings, 2592a0909949SYegor Yefremov .get_eee = cpsw_get_eee, 2593a0909949SYegor Yefremov .set_eee = cpsw_set_eee, 25946bb10c2bSYegor Yefremov .nway_reset = cpsw_nway_reset, 2595be034fc1SGrygorii Strashko .get_ringparam = cpsw_get_ringparam, 2596be034fc1SGrygorii Strashko .set_ringparam = cpsw_set_ringparam, 2597df828598SMugunthan V N }; 2598df828598SMugunthan V N 2599606f3993SIvan Khoronzhuk static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_common *cpsw, 2600549985eeSRichard Cochran u32 slave_reg_ofs, u32 sliver_reg_ofs) 2601df828598SMugunthan V N { 26025d8d0d4dSIvan Khoronzhuk void __iomem *regs = cpsw->regs; 2603df828598SMugunthan V N int slave_num = slave->slave_num; 2604606f3993SIvan Khoronzhuk struct cpsw_slave_data *data = cpsw->data.slave_data + slave_num; 2605df828598SMugunthan V N 2606df828598SMugunthan V N slave->data = data; 2607549985eeSRichard Cochran slave->regs = regs + slave_reg_ofs; 2608549985eeSRichard Cochran slave->sliver = regs + sliver_reg_ofs; 2609d9ba8f9eSMugunthan V N slave->port_vlan = data->dual_emac_res_vlan; 2610df828598SMugunthan V N } 2611df828598SMugunthan V N 2612552165bcSDavid Rivshin static int cpsw_probe_dt(struct cpsw_platform_data *data, 26132eb32b0aSMugunthan V N struct platform_device *pdev) 26142eb32b0aSMugunthan V N { 26152eb32b0aSMugunthan V N struct device_node *node = pdev->dev.of_node; 26162eb32b0aSMugunthan V N struct device_node *slave_node; 26172eb32b0aSMugunthan V N int i = 0, ret; 26182eb32b0aSMugunthan V N u32 prop; 26192eb32b0aSMugunthan V N 26202eb32b0aSMugunthan V N if (!node) 26212eb32b0aSMugunthan V N return -EINVAL; 26222eb32b0aSMugunthan V N 26232eb32b0aSMugunthan V N if (of_property_read_u32(node, "slaves", &prop)) { 262488c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing slaves property in the DT.\n"); 26252eb32b0aSMugunthan V N return -EINVAL; 26262eb32b0aSMugunthan V N } 26272eb32b0aSMugunthan V N data->slaves = prop; 26282eb32b0aSMugunthan V N 2629e86ac13bSMugunthan V N if (of_property_read_u32(node, "active_slave", &prop)) { 263088c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing active_slave property in the DT.\n"); 2631aa1a15e2SDaniel Mack return -EINVAL; 263278ca0b28SRichard Cochran } 2633e86ac13bSMugunthan V N data->active_slave = prop; 263478ca0b28SRichard Cochran 2635aa1a15e2SDaniel Mack data->slave_data = devm_kzalloc(&pdev->dev, data->slaves 2636aa1a15e2SDaniel Mack * sizeof(struct cpsw_slave_data), 2637b2adaca9SJoe Perches GFP_KERNEL); 2638b2adaca9SJoe Perches if (!data->slave_data) 2639aa1a15e2SDaniel Mack return -ENOMEM; 26402eb32b0aSMugunthan V N 26412eb32b0aSMugunthan V N if (of_property_read_u32(node, "cpdma_channels", &prop)) { 264288c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n"); 2643aa1a15e2SDaniel Mack return -EINVAL; 26442eb32b0aSMugunthan V N } 26452eb32b0aSMugunthan V N data->channels = prop; 26462eb32b0aSMugunthan V N 26472eb32b0aSMugunthan V N if (of_property_read_u32(node, "ale_entries", &prop)) { 264888c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n"); 2649aa1a15e2SDaniel Mack return -EINVAL; 26502eb32b0aSMugunthan V N } 26512eb32b0aSMugunthan V N data->ale_entries = prop; 26522eb32b0aSMugunthan V N 26532eb32b0aSMugunthan V N if (of_property_read_u32(node, "bd_ram_size", &prop)) { 265488c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n"); 2655aa1a15e2SDaniel Mack return -EINVAL; 26562eb32b0aSMugunthan V N } 26572eb32b0aSMugunthan V N data->bd_ram_size = prop; 26582eb32b0aSMugunthan V N 26592eb32b0aSMugunthan V N if (of_property_read_u32(node, "mac_control", &prop)) { 266088c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing mac_control property in the DT.\n"); 2661aa1a15e2SDaniel Mack return -EINVAL; 26622eb32b0aSMugunthan V N } 26632eb32b0aSMugunthan V N data->mac_control = prop; 26642eb32b0aSMugunthan V N 2665281abd96SMarkus Pargmann if (of_property_read_bool(node, "dual_emac")) 2666281abd96SMarkus Pargmann data->dual_emac = 1; 2667d9ba8f9eSMugunthan V N 26681fb19aa7SVaibhav Hiremath /* 26691fb19aa7SVaibhav Hiremath * Populate all the child nodes here... 26701fb19aa7SVaibhav Hiremath */ 26711fb19aa7SVaibhav Hiremath ret = of_platform_populate(node, NULL, NULL, &pdev->dev); 26721fb19aa7SVaibhav Hiremath /* We do not want to force this, as in some cases may not have child */ 26731fb19aa7SVaibhav Hiremath if (ret) 267488c99ff6SGeorge Cherian dev_warn(&pdev->dev, "Doesn't have any child node\n"); 26751fb19aa7SVaibhav Hiremath 26768658aaf2SBen Hutchings for_each_available_child_of_node(node, slave_node) { 2677549985eeSRichard Cochran struct cpsw_slave_data *slave_data = data->slave_data + i; 2678549985eeSRichard Cochran const void *mac_addr = NULL; 2679549985eeSRichard Cochran int lenp; 2680549985eeSRichard Cochran const __be32 *parp; 2681549985eeSRichard Cochran 2682f468b10eSMarkus Pargmann /* This is no slave child node, continue */ 2683f468b10eSMarkus Pargmann if (strcmp(slave_node->name, "slave")) 2684f468b10eSMarkus Pargmann continue; 2685f468b10eSMarkus Pargmann 2686552165bcSDavid Rivshin slave_data->phy_node = of_parse_phandle(slave_node, 2687552165bcSDavid Rivshin "phy-handle", 0); 2688f1eea5c1SDavid Rivshin parp = of_get_property(slave_node, "phy_id", &lenp); 2689ae092b5bSDavid Rivshin if (slave_data->phy_node) { 2690ae092b5bSDavid Rivshin dev_dbg(&pdev->dev, 2691f7ce9103SRob Herring "slave[%d] using phy-handle=\"%pOF\"\n", 2692f7ce9103SRob Herring i, slave_data->phy_node); 2693ae092b5bSDavid Rivshin } else if (of_phy_is_fixed_link(slave_node)) { 2694dfc0a6d3SDavid Rivshin /* In the case of a fixed PHY, the DT node associated 2695dfc0a6d3SDavid Rivshin * to the PHY is the Ethernet MAC DT node. 2696dfc0a6d3SDavid Rivshin */ 26971f71e8c9SMarkus Brunner ret = of_phy_register_fixed_link(slave_node); 269823a09873SJohan Hovold if (ret) { 269923a09873SJohan Hovold if (ret != -EPROBE_DEFER) 270023a09873SJohan Hovold dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret); 27011f71e8c9SMarkus Brunner return ret; 270223a09873SJohan Hovold } 270306cd6d6eSDavid Rivshin slave_data->phy_node = of_node_get(slave_node); 2704f1eea5c1SDavid Rivshin } else if (parp) { 2705f1eea5c1SDavid Rivshin u32 phyid; 2706f1eea5c1SDavid Rivshin struct device_node *mdio_node; 2707f1eea5c1SDavid Rivshin struct platform_device *mdio; 2708f1eea5c1SDavid Rivshin 2709f1eea5c1SDavid Rivshin if (lenp != (sizeof(__be32) * 2)) { 2710f1eea5c1SDavid Rivshin dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i); 271147276fccSMugunthan V N goto no_phy_slave; 2712549985eeSRichard Cochran } 2713549985eeSRichard Cochran mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); 2714549985eeSRichard Cochran phyid = be32_to_cpup(parp+1); 2715549985eeSRichard Cochran mdio = of_find_device_by_node(mdio_node); 271660e71ab5SJohan Hovold of_node_put(mdio_node); 27176954cc1fSJohan Hovold if (!mdio) { 271856fdb2e0SMarkus Pargmann dev_err(&pdev->dev, "Missing mdio platform device\n"); 27196954cc1fSJohan Hovold return -EINVAL; 27206954cc1fSJohan Hovold } 2721549985eeSRichard Cochran snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), 2722549985eeSRichard Cochran PHY_ID_FMT, mdio->name, phyid); 272386e1d5adSJohan Hovold put_device(&mdio->dev); 2724f1eea5c1SDavid Rivshin } else { 2725ae092b5bSDavid Rivshin dev_err(&pdev->dev, 2726ae092b5bSDavid Rivshin "No slave[%d] phy_id, phy-handle, or fixed-link property\n", 2727ae092b5bSDavid Rivshin i); 2728f1eea5c1SDavid Rivshin goto no_phy_slave; 2729f1eea5c1SDavid Rivshin } 273047276fccSMugunthan V N slave_data->phy_if = of_get_phy_mode(slave_node); 273147276fccSMugunthan V N if (slave_data->phy_if < 0) { 273247276fccSMugunthan V N dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n", 273347276fccSMugunthan V N i); 273447276fccSMugunthan V N return slave_data->phy_if; 273547276fccSMugunthan V N } 273647276fccSMugunthan V N 273747276fccSMugunthan V N no_phy_slave: 2738549985eeSRichard Cochran mac_addr = of_get_mac_address(slave_node); 27390ba517b1SMarkus Pargmann if (mac_addr) { 2740549985eeSRichard Cochran memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); 27410ba517b1SMarkus Pargmann } else { 2742b6745f6eSMugunthan V N ret = ti_cm_get_macid(&pdev->dev, i, 27430ba517b1SMarkus Pargmann slave_data->mac_addr); 27440ba517b1SMarkus Pargmann if (ret) 27450ba517b1SMarkus Pargmann return ret; 27460ba517b1SMarkus Pargmann } 2747d9ba8f9eSMugunthan V N if (data->dual_emac) { 274891c4166cSMugunthan V N if (of_property_read_u32(slave_node, "dual_emac_res_vlan", 2749d9ba8f9eSMugunthan V N &prop)) { 275088c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n"); 2751d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = i+1; 275288c99ff6SGeorge Cherian dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n", 2753d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan, i); 2754d9ba8f9eSMugunthan V N } else { 2755d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = prop; 2756d9ba8f9eSMugunthan V N } 2757d9ba8f9eSMugunthan V N } 2758d9ba8f9eSMugunthan V N 2759549985eeSRichard Cochran i++; 27603a27bfacSMugunthan V N if (i == data->slaves) 27613a27bfacSMugunthan V N break; 2762549985eeSRichard Cochran } 2763549985eeSRichard Cochran 27642eb32b0aSMugunthan V N return 0; 27652eb32b0aSMugunthan V N } 27662eb32b0aSMugunthan V N 2767a4e32b0dSJohan Hovold static void cpsw_remove_dt(struct platform_device *pdev) 2768a4e32b0dSJohan Hovold { 27698cbcc466SJohan Hovold struct net_device *ndev = platform_get_drvdata(pdev); 27708cbcc466SJohan Hovold struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 27718cbcc466SJohan Hovold struct cpsw_platform_data *data = &cpsw->data; 27728cbcc466SJohan Hovold struct device_node *node = pdev->dev.of_node; 27738cbcc466SJohan Hovold struct device_node *slave_node; 27748cbcc466SJohan Hovold int i = 0; 27758cbcc466SJohan Hovold 27768cbcc466SJohan Hovold for_each_available_child_of_node(node, slave_node) { 27778cbcc466SJohan Hovold struct cpsw_slave_data *slave_data = &data->slave_data[i]; 27788cbcc466SJohan Hovold 27798cbcc466SJohan Hovold if (strcmp(slave_node->name, "slave")) 27808cbcc466SJohan Hovold continue; 27818cbcc466SJohan Hovold 27823f65047cSJohan Hovold if (of_phy_is_fixed_link(slave_node)) 27833f65047cSJohan Hovold of_phy_deregister_fixed_link(slave_node); 27848cbcc466SJohan Hovold 27858cbcc466SJohan Hovold of_node_put(slave_data->phy_node); 27868cbcc466SJohan Hovold 27878cbcc466SJohan Hovold i++; 27888cbcc466SJohan Hovold if (i == data->slaves) 27898cbcc466SJohan Hovold break; 27908cbcc466SJohan Hovold } 27918cbcc466SJohan Hovold 2792a4e32b0dSJohan Hovold of_platform_depopulate(&pdev->dev); 2793a4e32b0dSJohan Hovold } 2794a4e32b0dSJohan Hovold 279556e31bd8SIvan Khoronzhuk static int cpsw_probe_dual_emac(struct cpsw_priv *priv) 2796d9ba8f9eSMugunthan V N { 2797606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2798606f3993SIvan Khoronzhuk struct cpsw_platform_data *data = &cpsw->data; 2799d9ba8f9eSMugunthan V N struct net_device *ndev; 2800d9ba8f9eSMugunthan V N struct cpsw_priv *priv_sl2; 2801e38b5a3dSIvan Khoronzhuk int ret = 0; 2802d9ba8f9eSMugunthan V N 2803e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2804d9ba8f9eSMugunthan V N if (!ndev) { 280556e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error allocating net_device\n"); 2806d9ba8f9eSMugunthan V N return -ENOMEM; 2807d9ba8f9eSMugunthan V N } 2808d9ba8f9eSMugunthan V N 2809d9ba8f9eSMugunthan V N priv_sl2 = netdev_priv(ndev); 2810606f3993SIvan Khoronzhuk priv_sl2->cpsw = cpsw; 2811d9ba8f9eSMugunthan V N priv_sl2->ndev = ndev; 2812d9ba8f9eSMugunthan V N priv_sl2->dev = &ndev->dev; 2813d9ba8f9eSMugunthan V N priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 2814d9ba8f9eSMugunthan V N 2815d9ba8f9eSMugunthan V N if (is_valid_ether_addr(data->slave_data[1].mac_addr)) { 2816d9ba8f9eSMugunthan V N memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr, 2817d9ba8f9eSMugunthan V N ETH_ALEN); 281856e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n", 281956e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2820d9ba8f9eSMugunthan V N } else { 2821d9ba8f9eSMugunthan V N random_ether_addr(priv_sl2->mac_addr); 282256e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n", 282356e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 2824d9ba8f9eSMugunthan V N } 2825d9ba8f9eSMugunthan V N memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN); 2826d9ba8f9eSMugunthan V N 2827d9ba8f9eSMugunthan V N priv_sl2->emac_port = 1; 2828606f3993SIvan Khoronzhuk cpsw->slaves[1].ndev = ndev; 2829f646968fSPatrick McHardy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 2830d9ba8f9eSMugunthan V N 2831d9ba8f9eSMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 28327ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 2833d9ba8f9eSMugunthan V N 2834d9ba8f9eSMugunthan V N /* register the network device */ 283556e31bd8SIvan Khoronzhuk SET_NETDEV_DEV(ndev, cpsw->dev); 2836d9ba8f9eSMugunthan V N ret = register_netdev(ndev); 2837d9ba8f9eSMugunthan V N if (ret) { 283856e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error registering net device\n"); 2839d9ba8f9eSMugunthan V N free_netdev(ndev); 2840d9ba8f9eSMugunthan V N ret = -ENODEV; 2841d9ba8f9eSMugunthan V N } 2842d9ba8f9eSMugunthan V N 2843d9ba8f9eSMugunthan V N return ret; 2844d9ba8f9eSMugunthan V N } 2845d9ba8f9eSMugunthan V N 28467da11600SMugunthan V N #define CPSW_QUIRK_IRQ BIT(0) 28477da11600SMugunthan V N 2848f5b58948SArvind Yadav static const struct platform_device_id cpsw_devtype[] = { 28497da11600SMugunthan V N { 28507da11600SMugunthan V N /* keep it for existing comaptibles */ 28517da11600SMugunthan V N .name = "cpsw", 28527da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28537da11600SMugunthan V N }, { 28547da11600SMugunthan V N .name = "am335x-cpsw", 28557da11600SMugunthan V N .driver_data = CPSW_QUIRK_IRQ, 28567da11600SMugunthan V N }, { 28577da11600SMugunthan V N .name = "am4372-cpsw", 28587da11600SMugunthan V N .driver_data = 0, 28597da11600SMugunthan V N }, { 28607da11600SMugunthan V N .name = "dra7-cpsw", 28617da11600SMugunthan V N .driver_data = 0, 28627da11600SMugunthan V N }, { 28637da11600SMugunthan V N /* sentinel */ 28647da11600SMugunthan V N } 28657da11600SMugunthan V N }; 28667da11600SMugunthan V N MODULE_DEVICE_TABLE(platform, cpsw_devtype); 28677da11600SMugunthan V N 28687da11600SMugunthan V N enum ti_cpsw_type { 28697da11600SMugunthan V N CPSW = 0, 28707da11600SMugunthan V N AM335X_CPSW, 28717da11600SMugunthan V N AM4372_CPSW, 28727da11600SMugunthan V N DRA7_CPSW, 28737da11600SMugunthan V N }; 28747da11600SMugunthan V N 28757da11600SMugunthan V N static const struct of_device_id cpsw_of_mtable[] = { 28767da11600SMugunthan V N { .compatible = "ti,cpsw", .data = &cpsw_devtype[CPSW], }, 28777da11600SMugunthan V N { .compatible = "ti,am335x-cpsw", .data = &cpsw_devtype[AM335X_CPSW], }, 28787da11600SMugunthan V N { .compatible = "ti,am4372-cpsw", .data = &cpsw_devtype[AM4372_CPSW], }, 28797da11600SMugunthan V N { .compatible = "ti,dra7-cpsw", .data = &cpsw_devtype[DRA7_CPSW], }, 28807da11600SMugunthan V N { /* sentinel */ }, 28817da11600SMugunthan V N }; 28827da11600SMugunthan V N MODULE_DEVICE_TABLE(of, cpsw_of_mtable); 28837da11600SMugunthan V N 2884663e12e6SBill Pemberton static int cpsw_probe(struct platform_device *pdev) 2885df828598SMugunthan V N { 2886ef4183a1SIvan Khoronzhuk struct clk *clk; 2887d1bd9acfSSebastian Siewior struct cpsw_platform_data *data; 2888df828598SMugunthan V N struct net_device *ndev; 2889df828598SMugunthan V N struct cpsw_priv *priv; 2890df828598SMugunthan V N struct cpdma_params dma_params; 2891df828598SMugunthan V N struct cpsw_ale_params ale_params; 2892aa1a15e2SDaniel Mack void __iomem *ss_regs; 28938a2c9a5aSGrygorii Strashko void __iomem *cpts_regs; 2894aa1a15e2SDaniel Mack struct resource *res, *ss_res; 28957da11600SMugunthan V N const struct of_device_id *of_id; 28961d147ccbSMugunthan V N struct gpio_descs *mode; 2897549985eeSRichard Cochran u32 slave_offset, sliver_offset, slave_size; 2898649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 28995087b915SFelipe Balbi int ret = 0, i; 29005087b915SFelipe Balbi int irq; 2901df828598SMugunthan V N 2902649a1688SIvan Khoronzhuk cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL); 29033420ea88SJohan Hovold if (!cpsw) 29043420ea88SJohan Hovold return -ENOMEM; 29053420ea88SJohan Hovold 290656e31bd8SIvan Khoronzhuk cpsw->dev = &pdev->dev; 2907649a1688SIvan Khoronzhuk 2908e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 2909df828598SMugunthan V N if (!ndev) { 291088c99ff6SGeorge Cherian dev_err(&pdev->dev, "error allocating net_device\n"); 2911df828598SMugunthan V N return -ENOMEM; 2912df828598SMugunthan V N } 2913df828598SMugunthan V N 2914df828598SMugunthan V N platform_set_drvdata(pdev, ndev); 2915df828598SMugunthan V N priv = netdev_priv(ndev); 2916649a1688SIvan Khoronzhuk priv->cpsw = cpsw; 2917df828598SMugunthan V N priv->ndev = ndev; 2918df828598SMugunthan V N priv->dev = &ndev->dev; 2919df828598SMugunthan V N priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 29202a05a622SIvan Khoronzhuk cpsw->rx_packet_max = max(rx_packet_max, 128); 2921df828598SMugunthan V N 29221d147ccbSMugunthan V N mode = devm_gpiod_get_array_optional(&pdev->dev, "mode", GPIOD_OUT_LOW); 29231d147ccbSMugunthan V N if (IS_ERR(mode)) { 29241d147ccbSMugunthan V N ret = PTR_ERR(mode); 29251d147ccbSMugunthan V N dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret); 29261d147ccbSMugunthan V N goto clean_ndev_ret; 29271d147ccbSMugunthan V N } 29281d147ccbSMugunthan V N 29291fb19aa7SVaibhav Hiremath /* 29301fb19aa7SVaibhav Hiremath * This may be required here for child devices. 29311fb19aa7SVaibhav Hiremath */ 29321fb19aa7SVaibhav Hiremath pm_runtime_enable(&pdev->dev); 29331fb19aa7SVaibhav Hiremath 2934739683b4SMugunthan V N /* Select default pin state */ 2935739683b4SMugunthan V N pinctrl_pm_select_default_state(&pdev->dev); 2936739683b4SMugunthan V N 2937a4e32b0dSJohan Hovold /* Need to enable clocks with runtime PM api to access module 2938a4e32b0dSJohan Hovold * registers 2939a4e32b0dSJohan Hovold */ 2940a4e32b0dSJohan Hovold ret = pm_runtime_get_sync(&pdev->dev); 2941a4e32b0dSJohan Hovold if (ret < 0) { 2942a4e32b0dSJohan Hovold pm_runtime_put_noidle(&pdev->dev); 2943aa1a15e2SDaniel Mack goto clean_runtime_disable_ret; 29442eb32b0aSMugunthan V N } 2945a4e32b0dSJohan Hovold 294623a09873SJohan Hovold ret = cpsw_probe_dt(&cpsw->data, pdev); 294723a09873SJohan Hovold if (ret) 2948a4e32b0dSJohan Hovold goto clean_dt_ret; 294923a09873SJohan Hovold 2950606f3993SIvan Khoronzhuk data = &cpsw->data; 2951e05107e6SIvan Khoronzhuk cpsw->rx_ch_num = 1; 2952e05107e6SIvan Khoronzhuk cpsw->tx_ch_num = 1; 29532eb32b0aSMugunthan V N 2954df828598SMugunthan V N if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 2955df828598SMugunthan V N memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 295688c99ff6SGeorge Cherian dev_info(&pdev->dev, "Detected MACID = %pM\n", priv->mac_addr); 2957df828598SMugunthan V N } else { 29587efd26d0SJoe Perches eth_random_addr(priv->mac_addr); 295988c99ff6SGeorge Cherian dev_info(&pdev->dev, "Random MACID = %pM\n", priv->mac_addr); 2960df828598SMugunthan V N } 2961df828598SMugunthan V N 2962df828598SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 2963df828598SMugunthan V N 2964606f3993SIvan Khoronzhuk cpsw->slaves = devm_kzalloc(&pdev->dev, 2965aa1a15e2SDaniel Mack sizeof(struct cpsw_slave) * data->slaves, 2966df828598SMugunthan V N GFP_KERNEL); 2967606f3993SIvan Khoronzhuk if (!cpsw->slaves) { 2968aa1a15e2SDaniel Mack ret = -ENOMEM; 2969a4e32b0dSJohan Hovold goto clean_dt_ret; 2970df828598SMugunthan V N } 2971df828598SMugunthan V N for (i = 0; i < data->slaves; i++) 2972606f3993SIvan Khoronzhuk cpsw->slaves[i].slave_num = i; 2973df828598SMugunthan V N 2974606f3993SIvan Khoronzhuk cpsw->slaves[0].ndev = ndev; 2975d9ba8f9eSMugunthan V N priv->emac_port = 0; 2976d9ba8f9eSMugunthan V N 2977ef4183a1SIvan Khoronzhuk clk = devm_clk_get(&pdev->dev, "fck"); 2978ef4183a1SIvan Khoronzhuk if (IS_ERR(clk)) { 2979aa1a15e2SDaniel Mack dev_err(priv->dev, "fck is not found\n"); 2980f150bd7fSMugunthan V N ret = -ENODEV; 2981a4e32b0dSJohan Hovold goto clean_dt_ret; 2982df828598SMugunthan V N } 29832a05a622SIvan Khoronzhuk cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000; 2984df828598SMugunthan V N 2985aa1a15e2SDaniel Mack ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2986aa1a15e2SDaniel Mack ss_regs = devm_ioremap_resource(&pdev->dev, ss_res); 2987aa1a15e2SDaniel Mack if (IS_ERR(ss_regs)) { 2988aa1a15e2SDaniel Mack ret = PTR_ERR(ss_regs); 2989a4e32b0dSJohan Hovold goto clean_dt_ret; 2990df828598SMugunthan V N } 29915d8d0d4dSIvan Khoronzhuk cpsw->regs = ss_regs; 2992df828598SMugunthan V N 29932a05a622SIvan Khoronzhuk cpsw->version = readl(&cpsw->regs->id_ver); 2994f280e89aSMugunthan V N 2995aa1a15e2SDaniel Mack res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 29965d8d0d4dSIvan Khoronzhuk cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res); 29975d8d0d4dSIvan Khoronzhuk if (IS_ERR(cpsw->wr_regs)) { 29985d8d0d4dSIvan Khoronzhuk ret = PTR_ERR(cpsw->wr_regs); 2999a4e32b0dSJohan Hovold goto clean_dt_ret; 3000df828598SMugunthan V N } 3001df828598SMugunthan V N 3002df828598SMugunthan V N memset(&dma_params, 0, sizeof(dma_params)); 3003549985eeSRichard Cochran memset(&ale_params, 0, sizeof(ale_params)); 3004549985eeSRichard Cochran 30052a05a622SIvan Khoronzhuk switch (cpsw->version) { 3006549985eeSRichard Cochran case CPSW_VERSION_1: 30075d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET; 30088a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW1_CPTS_OFFSET; 30095d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW1_HW_STATS; 3010549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET; 3011549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET; 3012549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET; 3013549985eeSRichard Cochran slave_offset = CPSW1_SLAVE_OFFSET; 3014549985eeSRichard Cochran slave_size = CPSW1_SLAVE_SIZE; 3015549985eeSRichard Cochran sliver_offset = CPSW1_SLIVER_OFFSET; 3016549985eeSRichard Cochran dma_params.desc_mem_phys = 0; 3017549985eeSRichard Cochran break; 3018549985eeSRichard Cochran case CPSW_VERSION_2: 3019c193f365SMugunthan V N case CPSW_VERSION_3: 3020926489beSMugunthan V N case CPSW_VERSION_4: 30215d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET; 30228a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW2_CPTS_OFFSET; 30235d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW2_HW_STATS; 3024549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET; 3025549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET; 3026549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET; 3027549985eeSRichard Cochran slave_offset = CPSW2_SLAVE_OFFSET; 3028549985eeSRichard Cochran slave_size = CPSW2_SLAVE_SIZE; 3029549985eeSRichard Cochran sliver_offset = CPSW2_SLIVER_OFFSET; 3030549985eeSRichard Cochran dma_params.desc_mem_phys = 3031aa1a15e2SDaniel Mack (u32 __force) ss_res->start + CPSW2_BD_OFFSET; 3032549985eeSRichard Cochran break; 3033549985eeSRichard Cochran default: 30342a05a622SIvan Khoronzhuk dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version); 3035549985eeSRichard Cochran ret = -ENODEV; 3036a4e32b0dSJohan Hovold goto clean_dt_ret; 3037549985eeSRichard Cochran } 3038606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3039606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[i]; 3040606f3993SIvan Khoronzhuk 3041606f3993SIvan Khoronzhuk cpsw_slave_init(slave, cpsw, slave_offset, sliver_offset); 3042549985eeSRichard Cochran slave_offset += slave_size; 3043549985eeSRichard Cochran sliver_offset += SLIVER_SIZE; 3044549985eeSRichard Cochran } 3045549985eeSRichard Cochran 3046df828598SMugunthan V N dma_params.dev = &pdev->dev; 3047549985eeSRichard Cochran dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH; 3048549985eeSRichard Cochran dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE; 3049549985eeSRichard Cochran dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP; 3050549985eeSRichard Cochran dma_params.txcp = dma_params.txhdp + CPDMA_TXCP; 3051549985eeSRichard Cochran dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP; 3052df828598SMugunthan V N 3053df828598SMugunthan V N dma_params.num_chan = data->channels; 3054df828598SMugunthan V N dma_params.has_soft_reset = true; 3055df828598SMugunthan V N dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 3056df828598SMugunthan V N dma_params.desc_mem_size = data->bd_ram_size; 3057df828598SMugunthan V N dma_params.desc_align = 16; 3058df828598SMugunthan V N dma_params.has_ext_regs = true; 3059549985eeSRichard Cochran dma_params.desc_hw_addr = dma_params.desc_mem_phys; 306083fcad0cSIvan Khoronzhuk dma_params.bus_freq_mhz = cpsw->bus_freq_mhz; 306190225bf0SGrygorii Strashko dma_params.descs_pool_size = descs_pool_size; 3062df828598SMugunthan V N 30632c836bd9SIvan Khoronzhuk cpsw->dma = cpdma_ctlr_create(&dma_params); 30642c836bd9SIvan Khoronzhuk if (!cpsw->dma) { 3065df828598SMugunthan V N dev_err(priv->dev, "error initializing dma\n"); 3066df828598SMugunthan V N ret = -ENOMEM; 3067a4e32b0dSJohan Hovold goto clean_dt_ret; 3068df828598SMugunthan V N } 3069df828598SMugunthan V N 30708feb0a19SIvan Khoronzhuk cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_tx_handler, 0); 30718feb0a19SIvan Khoronzhuk cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1); 30728feb0a19SIvan Khoronzhuk if (WARN_ON(!cpsw->rxv[0].ch || !cpsw->txv[0].ch)) { 3073df828598SMugunthan V N dev_err(priv->dev, "error initializing dma channels\n"); 3074df828598SMugunthan V N ret = -ENOMEM; 3075df828598SMugunthan V N goto clean_dma_ret; 3076df828598SMugunthan V N } 3077df828598SMugunthan V N 30789fe9aa0bSIvan Khoronzhuk ale_params.dev = &pdev->dev; 3079df828598SMugunthan V N ale_params.ale_ageout = ale_ageout; 3080df828598SMugunthan V N ale_params.ale_entries = data->ale_entries; 3081df828598SMugunthan V N ale_params.ale_ports = data->slaves; 3082df828598SMugunthan V N 30832a05a622SIvan Khoronzhuk cpsw->ale = cpsw_ale_create(&ale_params); 30842a05a622SIvan Khoronzhuk if (!cpsw->ale) { 3085df828598SMugunthan V N dev_err(priv->dev, "error initializing ale engine\n"); 3086df828598SMugunthan V N ret = -ENODEV; 3087df828598SMugunthan V N goto clean_dma_ret; 3088df828598SMugunthan V N } 3089df828598SMugunthan V N 30904a88fb95SGrygorii Strashko cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node); 30918a2c9a5aSGrygorii Strashko if (IS_ERR(cpsw->cpts)) { 30928a2c9a5aSGrygorii Strashko ret = PTR_ERR(cpsw->cpts); 30938a2c9a5aSGrygorii Strashko goto clean_ale_ret; 30948a2c9a5aSGrygorii Strashko } 30958a2c9a5aSGrygorii Strashko 3096c03abd84SFelipe Balbi ndev->irq = platform_get_irq(pdev, 1); 3097df828598SMugunthan V N if (ndev->irq < 0) { 3098df828598SMugunthan V N dev_err(priv->dev, "error getting irq resource\n"); 3099c1e3334fSJulia Lawall ret = ndev->irq; 3100df828598SMugunthan V N goto clean_ale_ret; 3101df828598SMugunthan V N } 3102df828598SMugunthan V N 31037da11600SMugunthan V N of_id = of_match_device(cpsw_of_mtable, &pdev->dev); 31047da11600SMugunthan V N if (of_id) { 31057da11600SMugunthan V N pdev->id_entry = of_id->data; 31067da11600SMugunthan V N if (pdev->id_entry->driver_data) 3107e38b5a3dSIvan Khoronzhuk cpsw->quirk_irq = true; 31087da11600SMugunthan V N } 31097da11600SMugunthan V N 3110070f9c65SKeerthy ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3111070f9c65SKeerthy 3112070f9c65SKeerthy ndev->netdev_ops = &cpsw_netdev_ops; 3113070f9c65SKeerthy ndev->ethtool_ops = &cpsw_ethtool_ops; 3114070f9c65SKeerthy netif_napi_add(ndev, &cpsw->napi_rx, cpsw_rx_poll, CPSW_POLL_WEIGHT); 3115070f9c65SKeerthy netif_tx_napi_add(ndev, &cpsw->napi_tx, cpsw_tx_poll, CPSW_POLL_WEIGHT); 3116070f9c65SKeerthy cpsw_split_res(ndev); 3117070f9c65SKeerthy 3118070f9c65SKeerthy /* register the network device */ 3119070f9c65SKeerthy SET_NETDEV_DEV(ndev, &pdev->dev); 3120070f9c65SKeerthy ret = register_netdev(ndev); 3121070f9c65SKeerthy if (ret) { 3122070f9c65SKeerthy dev_err(priv->dev, "error registering net device\n"); 3123070f9c65SKeerthy ret = -ENODEV; 3124070f9c65SKeerthy goto clean_ale_ret; 3125070f9c65SKeerthy } 3126070f9c65SKeerthy 3127070f9c65SKeerthy if (cpsw->data.dual_emac) { 3128070f9c65SKeerthy ret = cpsw_probe_dual_emac(priv); 3129070f9c65SKeerthy if (ret) { 3130070f9c65SKeerthy cpsw_err(priv, probe, "error probe slave 2 emac interface\n"); 3131070f9c65SKeerthy goto clean_unregister_netdev_ret; 3132070f9c65SKeerthy } 3133070f9c65SKeerthy } 3134070f9c65SKeerthy 3135c03abd84SFelipe Balbi /* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and 3136c03abd84SFelipe Balbi * MISC IRQs which are always kept disabled with this driver so 3137c03abd84SFelipe Balbi * we will not request them. 3138c03abd84SFelipe Balbi * 3139c03abd84SFelipe Balbi * If anyone wants to implement support for those, make sure to 3140c03abd84SFelipe Balbi * first request and append them to irqs_table array. 3141c03abd84SFelipe Balbi */ 3142c2b32e58SDaniel Mack 3143c03abd84SFelipe Balbi /* RX IRQ */ 31445087b915SFelipe Balbi irq = platform_get_irq(pdev, 1); 3145c1e3334fSJulia Lawall if (irq < 0) { 3146c1e3334fSJulia Lawall ret = irq; 31475087b915SFelipe Balbi goto clean_ale_ret; 3148c1e3334fSJulia Lawall } 31495087b915SFelipe Balbi 3150e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[0] = irq; 3151c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_rx_interrupt, 3152dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31535087b915SFelipe Balbi if (ret < 0) { 31545087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31555087b915SFelipe Balbi goto clean_ale_ret; 3156df828598SMugunthan V N } 3157df828598SMugunthan V N 3158c03abd84SFelipe Balbi /* TX IRQ */ 31595087b915SFelipe Balbi irq = platform_get_irq(pdev, 2); 3160c1e3334fSJulia Lawall if (irq < 0) { 3161c1e3334fSJulia Lawall ret = irq; 31625087b915SFelipe Balbi goto clean_ale_ret; 3163c1e3334fSJulia Lawall } 31645087b915SFelipe Balbi 3165e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[1] = irq; 3166c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_tx_interrupt, 3167dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 31685087b915SFelipe Balbi if (ret < 0) { 31695087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 31705087b915SFelipe Balbi goto clean_ale_ret; 31715087b915SFelipe Balbi } 3172c2b32e58SDaniel Mack 317390225bf0SGrygorii Strashko cpsw_notice(priv, probe, 317490225bf0SGrygorii Strashko "initialized device (regs %pa, irq %d, pool size %d)\n", 317590225bf0SGrygorii Strashko &ss_res->start, ndev->irq, dma_params.descs_pool_size); 3176d9ba8f9eSMugunthan V N 3177c46ab7e0SJohan Hovold pm_runtime_put(&pdev->dev); 3178c46ab7e0SJohan Hovold 3179df828598SMugunthan V N return 0; 3180df828598SMugunthan V N 3181a7fe9d46SJohan Hovold clean_unregister_netdev_ret: 3182a7fe9d46SJohan Hovold unregister_netdev(ndev); 3183df828598SMugunthan V N clean_ale_ret: 31842a05a622SIvan Khoronzhuk cpsw_ale_destroy(cpsw->ale); 3185df828598SMugunthan V N clean_dma_ret: 31862c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3187a4e32b0dSJohan Hovold clean_dt_ret: 3188a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 3189c46ab7e0SJohan Hovold pm_runtime_put_sync(&pdev->dev); 3190aa1a15e2SDaniel Mack clean_runtime_disable_ret: 3191f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 3192df828598SMugunthan V N clean_ndev_ret: 3193d1bd9acfSSebastian Siewior free_netdev(priv->ndev); 3194df828598SMugunthan V N return ret; 3195df828598SMugunthan V N } 3196df828598SMugunthan V N 3197663e12e6SBill Pemberton static int cpsw_remove(struct platform_device *pdev) 3198df828598SMugunthan V N { 3199df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 32002a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 32018a0b6dc9SGrygorii Strashko int ret; 32028a0b6dc9SGrygorii Strashko 32038a0b6dc9SGrygorii Strashko ret = pm_runtime_get_sync(&pdev->dev); 32048a0b6dc9SGrygorii Strashko if (ret < 0) { 32058a0b6dc9SGrygorii Strashko pm_runtime_put_noidle(&pdev->dev); 32068a0b6dc9SGrygorii Strashko return ret; 32078a0b6dc9SGrygorii Strashko } 3208df828598SMugunthan V N 3209606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3210606f3993SIvan Khoronzhuk unregister_netdev(cpsw->slaves[1].ndev); 3211d1bd9acfSSebastian Siewior unregister_netdev(ndev); 3212df828598SMugunthan V N 32138a2c9a5aSGrygorii Strashko cpts_release(cpsw->cpts); 32142a05a622SIvan Khoronzhuk cpsw_ale_destroy(cpsw->ale); 32152c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3216a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 32178a0b6dc9SGrygorii Strashko pm_runtime_put_sync(&pdev->dev); 32188a0b6dc9SGrygorii Strashko pm_runtime_disable(&pdev->dev); 3219606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3220606f3993SIvan Khoronzhuk free_netdev(cpsw->slaves[1].ndev); 3221df828598SMugunthan V N free_netdev(ndev); 3222df828598SMugunthan V N return 0; 3223df828598SMugunthan V N } 3224df828598SMugunthan V N 32258963a504SGrygorii Strashko #ifdef CONFIG_PM_SLEEP 3226df828598SMugunthan V N static int cpsw_suspend(struct device *dev) 3227df828598SMugunthan V N { 3228df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3229df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3230606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3231df828598SMugunthan V N 3232606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3233618073e3SMugunthan V N int i; 3234618073e3SMugunthan V N 3235606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3236606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3237606f3993SIvan Khoronzhuk cpsw_ndo_stop(cpsw->slaves[i].ndev); 3238618073e3SMugunthan V N } 3239618073e3SMugunthan V N } else { 3240df828598SMugunthan V N if (netif_running(ndev)) 3241df828598SMugunthan V N cpsw_ndo_stop(ndev); 3242618073e3SMugunthan V N } 32431e7a2e21SDaniel Mack 3244739683b4SMugunthan V N /* Select sleep pin state */ 324556e31bd8SIvan Khoronzhuk pinctrl_pm_select_sleep_state(dev); 3246739683b4SMugunthan V N 3247df828598SMugunthan V N return 0; 3248df828598SMugunthan V N } 3249df828598SMugunthan V N 3250df828598SMugunthan V N static int cpsw_resume(struct device *dev) 3251df828598SMugunthan V N { 3252df828598SMugunthan V N struct platform_device *pdev = to_platform_device(dev); 3253df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 3254a60ced99SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3255df828598SMugunthan V N 3256739683b4SMugunthan V N /* Select default pin state */ 325756e31bd8SIvan Khoronzhuk pinctrl_pm_select_default_state(dev); 3258739683b4SMugunthan V N 32594ccfd638SGrygorii Strashko /* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */ 32604ccfd638SGrygorii Strashko rtnl_lock(); 3261606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3262618073e3SMugunthan V N int i; 3263618073e3SMugunthan V N 3264606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3265606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3266606f3993SIvan Khoronzhuk cpsw_ndo_open(cpsw->slaves[i].ndev); 3267618073e3SMugunthan V N } 3268618073e3SMugunthan V N } else { 3269df828598SMugunthan V N if (netif_running(ndev)) 3270df828598SMugunthan V N cpsw_ndo_open(ndev); 3271618073e3SMugunthan V N } 32724ccfd638SGrygorii Strashko rtnl_unlock(); 32734ccfd638SGrygorii Strashko 3274df828598SMugunthan V N return 0; 3275df828598SMugunthan V N } 32768963a504SGrygorii Strashko #endif 3277df828598SMugunthan V N 32788963a504SGrygorii Strashko static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume); 3279df828598SMugunthan V N 3280df828598SMugunthan V N static struct platform_driver cpsw_driver = { 3281df828598SMugunthan V N .driver = { 3282df828598SMugunthan V N .name = "cpsw", 3283df828598SMugunthan V N .pm = &cpsw_pm_ops, 32841e5c76d4SSachin Kamat .of_match_table = cpsw_of_mtable, 3285df828598SMugunthan V N }, 3286df828598SMugunthan V N .probe = cpsw_probe, 3287663e12e6SBill Pemberton .remove = cpsw_remove, 3288df828598SMugunthan V N }; 3289df828598SMugunthan V N 32906fb3b6b5SGrygorii Strashko module_platform_driver(cpsw_driver); 3291df828598SMugunthan V N 3292df828598SMugunthan V N MODULE_LICENSE("GPL"); 3293df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 3294df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 3295df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 3296