1df828598SMugunthan V N /* 2df828598SMugunthan V N * Texas Instruments Ethernet Switch Driver 3df828598SMugunthan V N * 4df828598SMugunthan V N * Copyright (C) 2012 Texas Instruments 5df828598SMugunthan V N * 6df828598SMugunthan V N * This program is free software; you can redistribute it and/or 7df828598SMugunthan V N * modify it under the terms of the GNU General Public License as 8df828598SMugunthan V N * published by the Free Software Foundation version 2. 9df828598SMugunthan V N * 10df828598SMugunthan V N * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11df828598SMugunthan V N * kind, whether express or implied; without even the implied warranty 12df828598SMugunthan V N * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13df828598SMugunthan V N * GNU General Public License for more details. 14df828598SMugunthan V N */ 15df828598SMugunthan V N 16df828598SMugunthan V N #include <linux/kernel.h> 17df828598SMugunthan V N #include <linux/io.h> 18df828598SMugunthan V N #include <linux/clk.h> 19df828598SMugunthan V N #include <linux/timer.h> 20df828598SMugunthan V N #include <linux/module.h> 21df828598SMugunthan V N #include <linux/platform_device.h> 22df828598SMugunthan V N #include <linux/irqreturn.h> 23df828598SMugunthan V N #include <linux/interrupt.h> 24df828598SMugunthan V N #include <linux/if_ether.h> 25df828598SMugunthan V N #include <linux/etherdevice.h> 26df828598SMugunthan V N #include <linux/netdevice.h> 272e5b38abSRichard Cochran #include <linux/net_tstamp.h> 28df828598SMugunthan V N #include <linux/phy.h> 29df828598SMugunthan V N #include <linux/workqueue.h> 30df828598SMugunthan V N #include <linux/delay.h> 31f150bd7fSMugunthan V N #include <linux/pm_runtime.h> 32e2b3e493SArnd Bergmann #include <linux/gpio/consumer.h> 332eb32b0aSMugunthan V N #include <linux/of.h> 349e42f715SHeiko Schocher #include <linux/of_mdio.h> 352eb32b0aSMugunthan V N #include <linux/of_net.h> 362eb32b0aSMugunthan V N #include <linux/of_device.h> 373b72c2feSMugunthan V N #include <linux/if_vlan.h> 38514c6032SRandy Dunlap #include <linux/kmemleak.h> 399611d6d6SIvan Khoronzhuk #include <linux/sys_soc.h> 40df828598SMugunthan V N 41739683b4SMugunthan V N #include <linux/pinctrl/consumer.h> 427929a668SIvan Khoronzhuk #include <net/pkt_cls.h> 43df828598SMugunthan V N 44dbe34724SMugunthan V N #include "cpsw.h" 45df828598SMugunthan V N #include "cpsw_ale.h" 462e5b38abSRichard Cochran #include "cpts.h" 47df828598SMugunthan V N #include "davinci_cpdma.h" 48df828598SMugunthan V N 4957d90148SIvan Khoronzhuk #include <net/pkt_sched.h> 5057d90148SIvan Khoronzhuk 51df828598SMugunthan V N #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ 52df828598SMugunthan V N NETIF_MSG_DRV | NETIF_MSG_LINK | \ 53df828598SMugunthan V N NETIF_MSG_IFUP | NETIF_MSG_INTR | \ 54df828598SMugunthan V N NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ 55df828598SMugunthan V N NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ 56df828598SMugunthan V N NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ 57df828598SMugunthan V N NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ 58df828598SMugunthan V N NETIF_MSG_RX_STATUS) 59df828598SMugunthan V N 60df828598SMugunthan V N #define cpsw_info(priv, type, format, ...) \ 61df828598SMugunthan V N do { \ 62df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 63df828598SMugunthan V N dev_info(priv->dev, format, ## __VA_ARGS__); \ 64df828598SMugunthan V N } while (0) 65df828598SMugunthan V N 66df828598SMugunthan V N #define cpsw_err(priv, type, format, ...) \ 67df828598SMugunthan V N do { \ 68df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 69df828598SMugunthan V N dev_err(priv->dev, format, ## __VA_ARGS__); \ 70df828598SMugunthan V N } while (0) 71df828598SMugunthan V N 72df828598SMugunthan V N #define cpsw_dbg(priv, type, format, ...) \ 73df828598SMugunthan V N do { \ 74df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 75df828598SMugunthan V N dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 76df828598SMugunthan V N } while (0) 77df828598SMugunthan V N 78df828598SMugunthan V N #define cpsw_notice(priv, type, format, ...) \ 79df828598SMugunthan V N do { \ 80df828598SMugunthan V N if (netif_msg_##type(priv) && net_ratelimit()) \ 81df828598SMugunthan V N dev_notice(priv->dev, format, ## __VA_ARGS__); \ 82df828598SMugunthan V N } while (0) 83df828598SMugunthan V N 845c50a856SMugunthan V N #define ALE_ALL_PORTS 0x7 855c50a856SMugunthan V N 86df828598SMugunthan V N #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) 87df828598SMugunthan V N #define CPSW_MINOR_VERSION(reg) (reg & 0xff) 88df828598SMugunthan V N #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) 89df828598SMugunthan V N 90e90cfac6SRichard Cochran #define CPSW_VERSION_1 0x19010a 91e90cfac6SRichard Cochran #define CPSW_VERSION_2 0x19010c 92c193f365SMugunthan V N #define CPSW_VERSION_3 0x19010f 93926489beSMugunthan V N #define CPSW_VERSION_4 0x190112 94549985eeSRichard Cochran 95549985eeSRichard Cochran #define HOST_PORT_NUM 0 96c6395f12SGrygorii Strashko #define CPSW_ALE_PORTS_NUM 3 97549985eeSRichard Cochran #define SLIVER_SIZE 0x40 98549985eeSRichard Cochran 99549985eeSRichard Cochran #define CPSW1_HOST_PORT_OFFSET 0x028 100549985eeSRichard Cochran #define CPSW1_SLAVE_OFFSET 0x050 101549985eeSRichard Cochran #define CPSW1_SLAVE_SIZE 0x040 102549985eeSRichard Cochran #define CPSW1_CPDMA_OFFSET 0x100 103549985eeSRichard Cochran #define CPSW1_STATERAM_OFFSET 0x200 104d9718546SMugunthan V N #define CPSW1_HW_STATS 0x400 105549985eeSRichard Cochran #define CPSW1_CPTS_OFFSET 0x500 106549985eeSRichard Cochran #define CPSW1_ALE_OFFSET 0x600 107549985eeSRichard Cochran #define CPSW1_SLIVER_OFFSET 0x700 108549985eeSRichard Cochran 109549985eeSRichard Cochran #define CPSW2_HOST_PORT_OFFSET 0x108 110549985eeSRichard Cochran #define CPSW2_SLAVE_OFFSET 0x200 111549985eeSRichard Cochran #define CPSW2_SLAVE_SIZE 0x100 112549985eeSRichard Cochran #define CPSW2_CPDMA_OFFSET 0x800 113d9718546SMugunthan V N #define CPSW2_HW_STATS 0x900 114549985eeSRichard Cochran #define CPSW2_STATERAM_OFFSET 0xa00 115549985eeSRichard Cochran #define CPSW2_CPTS_OFFSET 0xc00 116549985eeSRichard Cochran #define CPSW2_ALE_OFFSET 0xd00 117549985eeSRichard Cochran #define CPSW2_SLIVER_OFFSET 0xd80 118549985eeSRichard Cochran #define CPSW2_BD_OFFSET 0x2000 119549985eeSRichard Cochran 120df828598SMugunthan V N #define CPDMA_RXTHRESH 0x0c0 121df828598SMugunthan V N #define CPDMA_RXFREE 0x0e0 122df828598SMugunthan V N #define CPDMA_TXHDP 0x00 123df828598SMugunthan V N #define CPDMA_RXHDP 0x20 124df828598SMugunthan V N #define CPDMA_TXCP 0x40 125df828598SMugunthan V N #define CPDMA_RXCP 0x60 126df828598SMugunthan V N 127df828598SMugunthan V N #define CPSW_POLL_WEIGHT 64 128a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP_HDR_SIZE 4 1299421c901SGrygorii Strashko #define CPSW_MIN_PACKET_SIZE (VLAN_ETH_ZLEN) 130a3a41d2fSGrygorii Strashko #define CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN +\ 131a3a41d2fSGrygorii Strashko ETH_FCS_LEN +\ 132a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_SIZE) 133df828598SMugunthan V N 134df828598SMugunthan V N #define RX_PRIORITY_MAPPING 0x76543210 135df828598SMugunthan V N #define TX_PRIORITY_MAPPING 0x33221100 1365e391dc5SIvan Khoronzhuk #define CPDMA_TX_PRIORITY_MAP 0x76543210 137df828598SMugunthan V N 1383b72c2feSMugunthan V N #define CPSW_VLAN_AWARE BIT(1) 139a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP BIT(2) 1403b72c2feSMugunthan V N #define CPSW_ALE_VLAN_AWARE 1 1413b72c2feSMugunthan V N 14235717d8dSJohn Ogness #define CPSW_FIFO_NORMAL_MODE (0 << 16) 14335717d8dSJohn Ogness #define CPSW_FIFO_DUAL_MAC_MODE (1 << 16) 14435717d8dSJohn Ogness #define CPSW_FIFO_RATE_LIMIT_MODE (2 << 16) 145d9ba8f9eSMugunthan V N 146ff5b8ef2SMugunthan V N #define CPSW_INTPACEEN (0x3f << 16) 147ff5b8ef2SMugunthan V N #define CPSW_INTPRESCALE_MASK (0x7FF << 0) 148ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_CNT 63 149ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_CNT 2 150ff5b8ef2SMugunthan V N #define CPSW_CMINTMAX_INTVL (1000 / CPSW_CMINTMIN_CNT) 151ff5b8ef2SMugunthan V N #define CPSW_CMINTMIN_INTVL ((1000 / CPSW_CMINTMAX_CNT) + 1) 152ff5b8ef2SMugunthan V N 153606f3993SIvan Khoronzhuk #define cpsw_slave_index(cpsw, priv) \ 154606f3993SIvan Khoronzhuk ((cpsw->data.dual_emac) ? priv->emac_port : \ 155606f3993SIvan Khoronzhuk cpsw->data.active_slave) 156e38b5a3dSIvan Khoronzhuk #define IRQ_NUM 2 157e05107e6SIvan Khoronzhuk #define CPSW_MAX_QUEUES 8 15890225bf0SGrygorii Strashko #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 15957d90148SIvan Khoronzhuk #define CPSW_FIFO_QUEUE_TYPE_SHIFT 16 16057d90148SIvan Khoronzhuk #define CPSW_FIFO_SHAPE_EN_SHIFT 16 16157d90148SIvan Khoronzhuk #define CPSW_FIFO_RATE_EN_SHIFT 20 1627929a668SIvan Khoronzhuk #define CPSW_TC_NUM 4 1637929a668SIvan Khoronzhuk #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1) 16457d90148SIvan Khoronzhuk #define CPSW_PCT_MASK 0x7f 165d3bb9c58SMugunthan V N 166a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT 29 167a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK GENMASK(2, 0) 168a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP_HDR_VID_SHIFT 16 169a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_SHIFT 8 170a3a41d2fSGrygorii Strashko #define CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_MSK GENMASK(1, 0) 171a3a41d2fSGrygorii Strashko enum { 172a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PKT_VLAN_TAG = 0, 173a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PKT_RESERV, 174a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PKT_PRIO_TAG, 175a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PKT_UNTAG, 176a3a41d2fSGrygorii Strashko }; 177a3a41d2fSGrygorii Strashko 178df828598SMugunthan V N static int debug_level; 179df828598SMugunthan V N module_param(debug_level, int, 0); 180df828598SMugunthan V N MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 181df828598SMugunthan V N 182df828598SMugunthan V N static int ale_ageout = 10; 183df828598SMugunthan V N module_param(ale_ageout, int, 0); 184df828598SMugunthan V N MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 185df828598SMugunthan V N 186df828598SMugunthan V N static int rx_packet_max = CPSW_MAX_PACKET_SIZE; 187df828598SMugunthan V N module_param(rx_packet_max, int, 0); 188df828598SMugunthan V N MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); 189df828598SMugunthan V N 19090225bf0SGrygorii Strashko static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT; 19190225bf0SGrygorii Strashko module_param(descs_pool_size, int, 0444); 19290225bf0SGrygorii Strashko MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool"); 19390225bf0SGrygorii Strashko 194996a5c27SRichard Cochran struct cpsw_wr_regs { 195df828598SMugunthan V N u32 id_ver; 196df828598SMugunthan V N u32 soft_reset; 197df828598SMugunthan V N u32 control; 198df828598SMugunthan V N u32 int_control; 199df828598SMugunthan V N u32 rx_thresh_en; 200df828598SMugunthan V N u32 rx_en; 201df828598SMugunthan V N u32 tx_en; 202df828598SMugunthan V N u32 misc_en; 203ff5b8ef2SMugunthan V N u32 mem_allign1[8]; 204ff5b8ef2SMugunthan V N u32 rx_thresh_stat; 205ff5b8ef2SMugunthan V N u32 rx_stat; 206ff5b8ef2SMugunthan V N u32 tx_stat; 207ff5b8ef2SMugunthan V N u32 misc_stat; 208ff5b8ef2SMugunthan V N u32 mem_allign2[8]; 209ff5b8ef2SMugunthan V N u32 rx_imax; 210ff5b8ef2SMugunthan V N u32 tx_imax; 211ff5b8ef2SMugunthan V N 212df828598SMugunthan V N }; 213df828598SMugunthan V N 214996a5c27SRichard Cochran struct cpsw_ss_regs { 215df828598SMugunthan V N u32 id_ver; 216df828598SMugunthan V N u32 control; 217df828598SMugunthan V N u32 soft_reset; 218df828598SMugunthan V N u32 stat_port_en; 219df828598SMugunthan V N u32 ptype; 220bd357af2SRichard Cochran u32 soft_idle; 221bd357af2SRichard Cochran u32 thru_rate; 222bd357af2SRichard Cochran u32 gap_thresh; 223bd357af2SRichard Cochran u32 tx_start_wds; 224bd357af2SRichard Cochran u32 flow_control; 225bd357af2SRichard Cochran u32 vlan_ltype; 226bd357af2SRichard Cochran u32 ts_ltype; 227bd357af2SRichard Cochran u32 dlr_ltype; 228df828598SMugunthan V N }; 229df828598SMugunthan V N 2309750a3adSRichard Cochran /* CPSW_PORT_V1 */ 2319750a3adSRichard Cochran #define CPSW1_MAX_BLKS 0x00 /* Maximum FIFO Blocks */ 2329750a3adSRichard Cochran #define CPSW1_BLK_CNT 0x04 /* FIFO Block Usage Count (Read Only) */ 2339750a3adSRichard Cochran #define CPSW1_TX_IN_CTL 0x08 /* Transmit FIFO Control */ 2349750a3adSRichard Cochran #define CPSW1_PORT_VLAN 0x0c /* VLAN Register */ 2359750a3adSRichard Cochran #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 2369750a3adSRichard Cochran #define CPSW1_TS_CTL 0x14 /* Time Sync Control */ 2379750a3adSRichard Cochran #define CPSW1_TS_SEQ_LTYPE 0x18 /* Time Sync Sequence ID Offset and Msg Type */ 2389750a3adSRichard Cochran #define CPSW1_TS_VLAN 0x1c /* Time Sync VLAN1 and VLAN2 */ 2399750a3adSRichard Cochran 2409750a3adSRichard Cochran /* CPSW_PORT_V2 */ 2419750a3adSRichard Cochran #define CPSW2_CONTROL 0x00 /* Control Register */ 2429750a3adSRichard Cochran #define CPSW2_MAX_BLKS 0x08 /* Maximum FIFO Blocks */ 2439750a3adSRichard Cochran #define CPSW2_BLK_CNT 0x0c /* FIFO Block Usage Count (Read Only) */ 2449750a3adSRichard Cochran #define CPSW2_TX_IN_CTL 0x10 /* Transmit FIFO Control */ 2459750a3adSRichard Cochran #define CPSW2_PORT_VLAN 0x14 /* VLAN Register */ 2469750a3adSRichard Cochran #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 2479750a3adSRichard Cochran #define CPSW2_TS_SEQ_MTYPE 0x1c /* Time Sync Sequence ID Offset and Msg Type */ 2489750a3adSRichard Cochran 2499750a3adSRichard Cochran /* CPSW_PORT_V1 and V2 */ 2509750a3adSRichard Cochran #define SA_LO 0x20 /* CPGMAC_SL Source Address Low */ 2519750a3adSRichard Cochran #define SA_HI 0x24 /* CPGMAC_SL Source Address High */ 2529750a3adSRichard Cochran #define SEND_PERCENT 0x28 /* Transmit Queue Send Percentages */ 2539750a3adSRichard Cochran 2549750a3adSRichard Cochran /* CPSW_PORT_V2 only */ 2559750a3adSRichard Cochran #define RX_DSCP_PRI_MAP0 0x30 /* Rx DSCP Priority to Rx Packet Mapping */ 2569750a3adSRichard Cochran #define RX_DSCP_PRI_MAP1 0x34 /* Rx DSCP Priority to Rx Packet Mapping */ 2579750a3adSRichard Cochran #define RX_DSCP_PRI_MAP2 0x38 /* Rx DSCP Priority to Rx Packet Mapping */ 2589750a3adSRichard Cochran #define RX_DSCP_PRI_MAP3 0x3c /* Rx DSCP Priority to Rx Packet Mapping */ 2599750a3adSRichard Cochran #define RX_DSCP_PRI_MAP4 0x40 /* Rx DSCP Priority to Rx Packet Mapping */ 2609750a3adSRichard Cochran #define RX_DSCP_PRI_MAP5 0x44 /* Rx DSCP Priority to Rx Packet Mapping */ 2619750a3adSRichard Cochran #define RX_DSCP_PRI_MAP6 0x48 /* Rx DSCP Priority to Rx Packet Mapping */ 2629750a3adSRichard Cochran #define RX_DSCP_PRI_MAP7 0x4c /* Rx DSCP Priority to Rx Packet Mapping */ 2639750a3adSRichard Cochran 2649750a3adSRichard Cochran /* Bit definitions for the CPSW2_CONTROL register */ 2651239a96aSIvan Khoronzhuk #define PASS_PRI_TAGGED BIT(24) /* Pass Priority Tagged */ 2661239a96aSIvan Khoronzhuk #define VLAN_LTYPE2_EN BIT(21) /* VLAN LTYPE 2 enable */ 2671239a96aSIvan Khoronzhuk #define VLAN_LTYPE1_EN BIT(20) /* VLAN LTYPE 1 enable */ 2681239a96aSIvan Khoronzhuk #define DSCP_PRI_EN BIT(16) /* DSCP Priority Enable */ 2691c0e8123SIvan Khoronzhuk #define TS_107 BIT(15) /* Tyme Sync Dest IP Address 107 */ 2701239a96aSIvan Khoronzhuk #define TS_320 BIT(14) /* Time Sync Dest Port 320 enable */ 2711239a96aSIvan Khoronzhuk #define TS_319 BIT(13) /* Time Sync Dest Port 319 enable */ 2721239a96aSIvan Khoronzhuk #define TS_132 BIT(12) /* Time Sync Dest IP Addr 132 enable */ 2731239a96aSIvan Khoronzhuk #define TS_131 BIT(11) /* Time Sync Dest IP Addr 131 enable */ 2741239a96aSIvan Khoronzhuk #define TS_130 BIT(10) /* Time Sync Dest IP Addr 130 enable */ 2751239a96aSIvan Khoronzhuk #define TS_129 BIT(9) /* Time Sync Dest IP Addr 129 enable */ 2761239a96aSIvan Khoronzhuk #define TS_TTL_NONZERO BIT(8) /* Time Sync Time To Live Non-zero enable */ 2771239a96aSIvan Khoronzhuk #define TS_ANNEX_F_EN BIT(6) /* Time Sync Annex F enable */ 2781239a96aSIvan Khoronzhuk #define TS_ANNEX_D_EN BIT(4) /* Time Sync Annex D enable */ 2791239a96aSIvan Khoronzhuk #define TS_LTYPE2_EN BIT(3) /* Time Sync LTYPE 2 enable */ 2801239a96aSIvan Khoronzhuk #define TS_LTYPE1_EN BIT(2) /* Time Sync LTYPE 1 enable */ 2811239a96aSIvan Khoronzhuk #define TS_TX_EN BIT(1) /* Time Sync Transmit Enable */ 2821239a96aSIvan Khoronzhuk #define TS_RX_EN BIT(0) /* Time Sync Receive Enable */ 2839750a3adSRichard Cochran 28409c55372SGeorge Cherian #define CTRL_V2_TS_BITS \ 28509c55372SGeorge Cherian (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 28609c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_D_EN | TS_LTYPE1_EN) 2879750a3adSRichard Cochran 28809c55372SGeorge Cherian #define CTRL_V2_ALL_TS_MASK (CTRL_V2_TS_BITS | TS_TX_EN | TS_RX_EN) 28909c55372SGeorge Cherian #define CTRL_V2_TX_TS_BITS (CTRL_V2_TS_BITS | TS_TX_EN) 29009c55372SGeorge Cherian #define CTRL_V2_RX_TS_BITS (CTRL_V2_TS_BITS | TS_RX_EN) 29109c55372SGeorge Cherian 29209c55372SGeorge Cherian 29309c55372SGeorge Cherian #define CTRL_V3_TS_BITS \ 2941c0e8123SIvan Khoronzhuk (TS_107 | TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\ 29509c55372SGeorge Cherian TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\ 29609c55372SGeorge Cherian TS_LTYPE1_EN) 29709c55372SGeorge Cherian 29809c55372SGeorge Cherian #define CTRL_V3_ALL_TS_MASK (CTRL_V3_TS_BITS | TS_TX_EN | TS_RX_EN) 29909c55372SGeorge Cherian #define CTRL_V3_TX_TS_BITS (CTRL_V3_TS_BITS | TS_TX_EN) 30009c55372SGeorge Cherian #define CTRL_V3_RX_TS_BITS (CTRL_V3_TS_BITS | TS_RX_EN) 3019750a3adSRichard Cochran 3029750a3adSRichard Cochran /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */ 3039750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_SHIFT (16) /* Time Sync Sequence ID Offset */ 3049750a3adSRichard Cochran #define TS_SEQ_ID_OFFSET_MASK (0x3f) 3059750a3adSRichard Cochran #define TS_MSG_TYPE_EN_SHIFT (0) /* Time Sync Message Type Enable */ 3069750a3adSRichard Cochran #define TS_MSG_TYPE_EN_MASK (0xffff) 3079750a3adSRichard Cochran 3089750a3adSRichard Cochran /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 3099750a3adSRichard Cochran #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3)) 310df828598SMugunthan V N 3112e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_CTL register */ 3122e5b38abSRichard Cochran #define CPSW_V1_TS_RX_EN BIT(0) 3132e5b38abSRichard Cochran #define CPSW_V1_TS_TX_EN BIT(4) 3142e5b38abSRichard Cochran #define CPSW_V1_MSG_TYPE_OFS 16 3152e5b38abSRichard Cochran 3162e5b38abSRichard Cochran /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */ 3172e5b38abSRichard Cochran #define CPSW_V1_SEQ_ID_OFS_SHIFT 16 3182e5b38abSRichard Cochran 31948f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_TX 15 32048f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_TX_SHIFT 4 32148f5bcccSGrygorii Strashko #define CPSW_MAX_BLKS_RX 5 32248f5bcccSGrygorii Strashko 323df828598SMugunthan V N struct cpsw_host_regs { 324df828598SMugunthan V N u32 max_blks; 325df828598SMugunthan V N u32 blk_cnt; 326d9ba8f9eSMugunthan V N u32 tx_in_ctl; 327df828598SMugunthan V N u32 port_vlan; 328df828598SMugunthan V N u32 tx_pri_map; 329df828598SMugunthan V N u32 cpdma_tx_pri_map; 330df828598SMugunthan V N u32 cpdma_rx_chan_map; 331df828598SMugunthan V N }; 332df828598SMugunthan V N 333df828598SMugunthan V N struct cpsw_sliver_regs { 334df828598SMugunthan V N u32 id_ver; 335df828598SMugunthan V N u32 mac_control; 336df828598SMugunthan V N u32 mac_status; 337df828598SMugunthan V N u32 soft_reset; 338df828598SMugunthan V N u32 rx_maxlen; 339df828598SMugunthan V N u32 __reserved_0; 340df828598SMugunthan V N u32 rx_pause; 341df828598SMugunthan V N u32 tx_pause; 342df828598SMugunthan V N u32 __reserved_1; 343df828598SMugunthan V N u32 rx_pri_map; 344df828598SMugunthan V N }; 345df828598SMugunthan V N 346d9718546SMugunthan V N struct cpsw_hw_stats { 347d9718546SMugunthan V N u32 rxgoodframes; 348d9718546SMugunthan V N u32 rxbroadcastframes; 349d9718546SMugunthan V N u32 rxmulticastframes; 350d9718546SMugunthan V N u32 rxpauseframes; 351d9718546SMugunthan V N u32 rxcrcerrors; 352d9718546SMugunthan V N u32 rxaligncodeerrors; 353d9718546SMugunthan V N u32 rxoversizedframes; 354d9718546SMugunthan V N u32 rxjabberframes; 355d9718546SMugunthan V N u32 rxundersizedframes; 356d9718546SMugunthan V N u32 rxfragments; 357d9718546SMugunthan V N u32 __pad_0[2]; 358d9718546SMugunthan V N u32 rxoctets; 359d9718546SMugunthan V N u32 txgoodframes; 360d9718546SMugunthan V N u32 txbroadcastframes; 361d9718546SMugunthan V N u32 txmulticastframes; 362d9718546SMugunthan V N u32 txpauseframes; 363d9718546SMugunthan V N u32 txdeferredframes; 364d9718546SMugunthan V N u32 txcollisionframes; 365d9718546SMugunthan V N u32 txsinglecollframes; 366d9718546SMugunthan V N u32 txmultcollframes; 367d9718546SMugunthan V N u32 txexcessivecollisions; 368d9718546SMugunthan V N u32 txlatecollisions; 369d9718546SMugunthan V N u32 txunderrun; 370d9718546SMugunthan V N u32 txcarriersenseerrors; 371d9718546SMugunthan V N u32 txoctets; 372d9718546SMugunthan V N u32 octetframes64; 373d9718546SMugunthan V N u32 octetframes65t127; 374d9718546SMugunthan V N u32 octetframes128t255; 375d9718546SMugunthan V N u32 octetframes256t511; 376d9718546SMugunthan V N u32 octetframes512t1023; 377d9718546SMugunthan V N u32 octetframes1024tup; 378d9718546SMugunthan V N u32 netoctets; 379d9718546SMugunthan V N u32 rxsofoverruns; 380d9718546SMugunthan V N u32 rxmofoverruns; 381d9718546SMugunthan V N u32 rxdmaoverruns; 382d9718546SMugunthan V N }; 383d9718546SMugunthan V N 3842c8a14d6SGrygorii Strashko struct cpsw_slave_data { 3852c8a14d6SGrygorii Strashko struct device_node *phy_node; 3862c8a14d6SGrygorii Strashko char phy_id[MII_BUS_ID_SIZE]; 3872c8a14d6SGrygorii Strashko int phy_if; 3882c8a14d6SGrygorii Strashko u8 mac_addr[ETH_ALEN]; 3892c8a14d6SGrygorii Strashko u16 dual_emac_res_vlan; /* Reserved VLAN for DualEMAC */ 3902c8a14d6SGrygorii Strashko }; 3912c8a14d6SGrygorii Strashko 3922c8a14d6SGrygorii Strashko struct cpsw_platform_data { 3932c8a14d6SGrygorii Strashko struct cpsw_slave_data *slave_data; 3942c8a14d6SGrygorii Strashko u32 ss_reg_ofs; /* Subsystem control register offset */ 3952c8a14d6SGrygorii Strashko u32 channels; /* number of cpdma channels (symmetric) */ 3962c8a14d6SGrygorii Strashko u32 slaves; /* number of slave cpgmac ports */ 3972c8a14d6SGrygorii Strashko u32 active_slave; /* time stamping, ethtool and SIOCGMIIPHY slave */ 3982c8a14d6SGrygorii Strashko u32 ale_entries; /* ale table size */ 3992c8a14d6SGrygorii Strashko u32 bd_ram_size; /*buffer descriptor ram size */ 4002c8a14d6SGrygorii Strashko u32 mac_control; /* Mac control register */ 4012c8a14d6SGrygorii Strashko u16 default_vlan; /* Def VLAN for ALE lookup in VLAN aware mode*/ 4022c8a14d6SGrygorii Strashko bool dual_emac; /* Enable Dual EMAC mode */ 4032c8a14d6SGrygorii Strashko }; 4042c8a14d6SGrygorii Strashko 405df828598SMugunthan V N struct cpsw_slave { 4069750a3adSRichard Cochran void __iomem *regs; 407df828598SMugunthan V N struct cpsw_sliver_regs __iomem *sliver; 408df828598SMugunthan V N int slave_num; 409df828598SMugunthan V N u32 mac_control; 410df828598SMugunthan V N struct cpsw_slave_data *data; 411df828598SMugunthan V N struct phy_device *phy; 412d9ba8f9eSMugunthan V N struct net_device *ndev; 413d9ba8f9eSMugunthan V N u32 port_vlan; 414df828598SMugunthan V N }; 415df828598SMugunthan V N 4169750a3adSRichard Cochran static inline u32 slave_read(struct cpsw_slave *slave, u32 offset) 4179750a3adSRichard Cochran { 418dda5f5feSGrygorii Strashko return readl_relaxed(slave->regs + offset); 4199750a3adSRichard Cochran } 4209750a3adSRichard Cochran 4219750a3adSRichard Cochran static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset) 4229750a3adSRichard Cochran { 423dda5f5feSGrygorii Strashko writel_relaxed(val, slave->regs + offset); 4249750a3adSRichard Cochran } 4259750a3adSRichard Cochran 4268feb0a19SIvan Khoronzhuk struct cpsw_vector { 4278feb0a19SIvan Khoronzhuk struct cpdma_chan *ch; 4288feb0a19SIvan Khoronzhuk int budget; 4298feb0a19SIvan Khoronzhuk }; 4308feb0a19SIvan Khoronzhuk 431649a1688SIvan Khoronzhuk struct cpsw_common { 43256e31bd8SIvan Khoronzhuk struct device *dev; 433606f3993SIvan Khoronzhuk struct cpsw_platform_data data; 434dbc4ec52SIvan Khoronzhuk struct napi_struct napi_rx; 435dbc4ec52SIvan Khoronzhuk struct napi_struct napi_tx; 4365d8d0d4dSIvan Khoronzhuk struct cpsw_ss_regs __iomem *regs; 4375d8d0d4dSIvan Khoronzhuk struct cpsw_wr_regs __iomem *wr_regs; 4385d8d0d4dSIvan Khoronzhuk u8 __iomem *hw_stats; 4395d8d0d4dSIvan Khoronzhuk struct cpsw_host_regs __iomem *host_port_regs; 4402a05a622SIvan Khoronzhuk u32 version; 4412a05a622SIvan Khoronzhuk u32 coal_intvl; 4422a05a622SIvan Khoronzhuk u32 bus_freq_mhz; 4432a05a622SIvan Khoronzhuk int rx_packet_max; 444606f3993SIvan Khoronzhuk struct cpsw_slave *slaves; 4452c836bd9SIvan Khoronzhuk struct cpdma_ctlr *dma; 4468feb0a19SIvan Khoronzhuk struct cpsw_vector txv[CPSW_MAX_QUEUES]; 4478feb0a19SIvan Khoronzhuk struct cpsw_vector rxv[CPSW_MAX_QUEUES]; 4482a05a622SIvan Khoronzhuk struct cpsw_ale *ale; 449e38b5a3dSIvan Khoronzhuk bool quirk_irq; 450e38b5a3dSIvan Khoronzhuk bool rx_irq_disabled; 451e38b5a3dSIvan Khoronzhuk bool tx_irq_disabled; 452e38b5a3dSIvan Khoronzhuk u32 irqs_table[IRQ_NUM]; 4532a05a622SIvan Khoronzhuk struct cpts *cpts; 454e05107e6SIvan Khoronzhuk int rx_ch_num, tx_ch_num; 4550be01b8eSIvan Khoronzhuk int speed; 456d5bc1613SIvan Khoronzhuk int usage_count; 457649a1688SIvan Khoronzhuk }; 458649a1688SIvan Khoronzhuk 459649a1688SIvan Khoronzhuk struct cpsw_priv { 460df828598SMugunthan V N struct net_device *ndev; 461df828598SMugunthan V N struct device *dev; 462df828598SMugunthan V N u32 msg_enable; 463df828598SMugunthan V N u8 mac_addr[ETH_ALEN]; 4641923d6e4SMugunthan V N bool rx_pause; 4651923d6e4SMugunthan V N bool tx_pause; 4667929a668SIvan Khoronzhuk bool mqprio_hw; 46757d90148SIvan Khoronzhuk int fifo_bw[CPSW_TC_NUM]; 46857d90148SIvan Khoronzhuk int shp_cfg_speed; 469d9ba8f9eSMugunthan V N u32 emac_port; 470649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 471df828598SMugunthan V N }; 472df828598SMugunthan V N 473d9718546SMugunthan V N struct cpsw_stats { 474d9718546SMugunthan V N char stat_string[ETH_GSTRING_LEN]; 475d9718546SMugunthan V N int type; 476d9718546SMugunthan V N int sizeof_stat; 477d9718546SMugunthan V N int stat_offset; 478d9718546SMugunthan V N }; 479d9718546SMugunthan V N 480d9718546SMugunthan V N enum { 481d9718546SMugunthan V N CPSW_STATS, 482d9718546SMugunthan V N CPDMA_RX_STATS, 483d9718546SMugunthan V N CPDMA_TX_STATS, 484d9718546SMugunthan V N }; 485d9718546SMugunthan V N 486d9718546SMugunthan V N #define CPSW_STAT(m) CPSW_STATS, \ 487a90546e8Szhong jiang FIELD_SIZEOF(struct cpsw_hw_stats, m), \ 488d9718546SMugunthan V N offsetof(struct cpsw_hw_stats, m) 489d9718546SMugunthan V N #define CPDMA_RX_STAT(m) CPDMA_RX_STATS, \ 490a90546e8Szhong jiang FIELD_SIZEOF(struct cpdma_chan_stats, m), \ 491d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 492d9718546SMugunthan V N #define CPDMA_TX_STAT(m) CPDMA_TX_STATS, \ 493a90546e8Szhong jiang FIELD_SIZEOF(struct cpdma_chan_stats, m), \ 494d9718546SMugunthan V N offsetof(struct cpdma_chan_stats, m) 495d9718546SMugunthan V N 496d9718546SMugunthan V N static const struct cpsw_stats cpsw_gstrings_stats[] = { 497d9718546SMugunthan V N { "Good Rx Frames", CPSW_STAT(rxgoodframes) }, 498d9718546SMugunthan V N { "Broadcast Rx Frames", CPSW_STAT(rxbroadcastframes) }, 499d9718546SMugunthan V N { "Multicast Rx Frames", CPSW_STAT(rxmulticastframes) }, 500d9718546SMugunthan V N { "Pause Rx Frames", CPSW_STAT(rxpauseframes) }, 501d9718546SMugunthan V N { "Rx CRC Errors", CPSW_STAT(rxcrcerrors) }, 502d9718546SMugunthan V N { "Rx Align/Code Errors", CPSW_STAT(rxaligncodeerrors) }, 503d9718546SMugunthan V N { "Oversize Rx Frames", CPSW_STAT(rxoversizedframes) }, 504d9718546SMugunthan V N { "Rx Jabbers", CPSW_STAT(rxjabberframes) }, 505d9718546SMugunthan V N { "Undersize (Short) Rx Frames", CPSW_STAT(rxundersizedframes) }, 506d9718546SMugunthan V N { "Rx Fragments", CPSW_STAT(rxfragments) }, 507d9718546SMugunthan V N { "Rx Octets", CPSW_STAT(rxoctets) }, 508d9718546SMugunthan V N { "Good Tx Frames", CPSW_STAT(txgoodframes) }, 509d9718546SMugunthan V N { "Broadcast Tx Frames", CPSW_STAT(txbroadcastframes) }, 510d9718546SMugunthan V N { "Multicast Tx Frames", CPSW_STAT(txmulticastframes) }, 511d9718546SMugunthan V N { "Pause Tx Frames", CPSW_STAT(txpauseframes) }, 512d9718546SMugunthan V N { "Deferred Tx Frames", CPSW_STAT(txdeferredframes) }, 513d9718546SMugunthan V N { "Collisions", CPSW_STAT(txcollisionframes) }, 514d9718546SMugunthan V N { "Single Collision Tx Frames", CPSW_STAT(txsinglecollframes) }, 515d9718546SMugunthan V N { "Multiple Collision Tx Frames", CPSW_STAT(txmultcollframes) }, 516d9718546SMugunthan V N { "Excessive Collisions", CPSW_STAT(txexcessivecollisions) }, 517d9718546SMugunthan V N { "Late Collisions", CPSW_STAT(txlatecollisions) }, 518d9718546SMugunthan V N { "Tx Underrun", CPSW_STAT(txunderrun) }, 519d9718546SMugunthan V N { "Carrier Sense Errors", CPSW_STAT(txcarriersenseerrors) }, 520d9718546SMugunthan V N { "Tx Octets", CPSW_STAT(txoctets) }, 521d9718546SMugunthan V N { "Rx + Tx 64 Octet Frames", CPSW_STAT(octetframes64) }, 522d9718546SMugunthan V N { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) }, 523d9718546SMugunthan V N { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) }, 524d9718546SMugunthan V N { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) }, 525d9718546SMugunthan V N { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) }, 526d9718546SMugunthan V N { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) }, 527d9718546SMugunthan V N { "Net Octets", CPSW_STAT(netoctets) }, 528d9718546SMugunthan V N { "Rx Start of Frame Overruns", CPSW_STAT(rxsofoverruns) }, 529d9718546SMugunthan V N { "Rx Middle of Frame Overruns", CPSW_STAT(rxmofoverruns) }, 530d9718546SMugunthan V N { "Rx DMA Overruns", CPSW_STAT(rxdmaoverruns) }, 531d9718546SMugunthan V N }; 532d9718546SMugunthan V N 533e05107e6SIvan Khoronzhuk static const struct cpsw_stats cpsw_gstrings_ch_stats[] = { 534e05107e6SIvan Khoronzhuk { "head_enqueue", CPDMA_RX_STAT(head_enqueue) }, 535e05107e6SIvan Khoronzhuk { "tail_enqueue", CPDMA_RX_STAT(tail_enqueue) }, 536e05107e6SIvan Khoronzhuk { "pad_enqueue", CPDMA_RX_STAT(pad_enqueue) }, 537e05107e6SIvan Khoronzhuk { "misqueued", CPDMA_RX_STAT(misqueued) }, 538e05107e6SIvan Khoronzhuk { "desc_alloc_fail", CPDMA_RX_STAT(desc_alloc_fail) }, 539e05107e6SIvan Khoronzhuk { "pad_alloc_fail", CPDMA_RX_STAT(pad_alloc_fail) }, 540e05107e6SIvan Khoronzhuk { "runt_receive_buf", CPDMA_RX_STAT(runt_receive_buff) }, 541e05107e6SIvan Khoronzhuk { "runt_transmit_buf", CPDMA_RX_STAT(runt_transmit_buff) }, 542e05107e6SIvan Khoronzhuk { "empty_dequeue", CPDMA_RX_STAT(empty_dequeue) }, 543e05107e6SIvan Khoronzhuk { "busy_dequeue", CPDMA_RX_STAT(busy_dequeue) }, 544e05107e6SIvan Khoronzhuk { "good_dequeue", CPDMA_RX_STAT(good_dequeue) }, 545e05107e6SIvan Khoronzhuk { "requeue", CPDMA_RX_STAT(requeue) }, 546e05107e6SIvan Khoronzhuk { "teardown_dequeue", CPDMA_RX_STAT(teardown_dequeue) }, 547e05107e6SIvan Khoronzhuk }; 548e05107e6SIvan Khoronzhuk 549e05107e6SIvan Khoronzhuk #define CPSW_STATS_COMMON_LEN ARRAY_SIZE(cpsw_gstrings_stats) 550e05107e6SIvan Khoronzhuk #define CPSW_STATS_CH_LEN ARRAY_SIZE(cpsw_gstrings_ch_stats) 551d9718546SMugunthan V N 552649a1688SIvan Khoronzhuk #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw) 553dbc4ec52SIvan Khoronzhuk #define napi_to_cpsw(napi) container_of(napi, struct cpsw_common, napi) 554df828598SMugunthan V N #define for_each_slave(priv, func, arg...) \ 555df828598SMugunthan V N do { \ 5566e6ceaedSSebastian Siewior struct cpsw_slave *slave; \ 557606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = (priv)->cpsw; \ 5586e6ceaedSSebastian Siewior int n; \ 559606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) \ 560606f3993SIvan Khoronzhuk (func)((cpsw)->slaves + priv->emac_port, ##arg);\ 561d9ba8f9eSMugunthan V N else \ 562606f3993SIvan Khoronzhuk for (n = cpsw->data.slaves, \ 563606f3993SIvan Khoronzhuk slave = cpsw->slaves; \ 5646e6ceaedSSebastian Siewior n; n--) \ 5656e6ceaedSSebastian Siewior (func)(slave++, ##arg); \ 566df828598SMugunthan V N } while (0) 567d9ba8f9eSMugunthan V N 5686f1f5836SIvan Khoronzhuk static inline int cpsw_get_slave_port(u32 slave_num) 569d9ba8f9eSMugunthan V N { 570d9ba8f9eSMugunthan V N return slave_num + 1; 571d9ba8f9eSMugunthan V N } 572df828598SMugunthan V N 5730cd8f9ccSMugunthan V N static void cpsw_set_promiscious(struct net_device *ndev, bool enable) 5740cd8f9ccSMugunthan V N { 5752a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 5762a05a622SIvan Khoronzhuk struct cpsw_ale *ale = cpsw->ale; 5770cd8f9ccSMugunthan V N int i; 5780cd8f9ccSMugunthan V N 579606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 5800cd8f9ccSMugunthan V N bool flag = false; 5810cd8f9ccSMugunthan V N 5820cd8f9ccSMugunthan V N /* Enabling promiscuous mode for one interface will be 5830cd8f9ccSMugunthan V N * common for both the interface as the interface shares 5840cd8f9ccSMugunthan V N * the same hardware resource. 5850cd8f9ccSMugunthan V N */ 586606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 587606f3993SIvan Khoronzhuk if (cpsw->slaves[i].ndev->flags & IFF_PROMISC) 5880cd8f9ccSMugunthan V N flag = true; 5890cd8f9ccSMugunthan V N 5900cd8f9ccSMugunthan V N if (!enable && flag) { 5910cd8f9ccSMugunthan V N enable = true; 5920cd8f9ccSMugunthan V N dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n"); 5930cd8f9ccSMugunthan V N } 5940cd8f9ccSMugunthan V N 5950cd8f9ccSMugunthan V N if (enable) { 5960cd8f9ccSMugunthan V N /* Enable Bypass */ 5970cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1); 5980cd8f9ccSMugunthan V N 5990cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 6000cd8f9ccSMugunthan V N } else { 6010cd8f9ccSMugunthan V N /* Disable Bypass */ 6020cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0); 6030cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6040cd8f9ccSMugunthan V N } 6050cd8f9ccSMugunthan V N } else { 6060cd8f9ccSMugunthan V N if (enable) { 6070cd8f9ccSMugunthan V N unsigned long timeout = jiffies + HZ; 6080cd8f9ccSMugunthan V N 6096f979eb3SLennart Sorensen /* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */ 610606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6110cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6120cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 1); 6130cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6140cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 1); 6150cd8f9ccSMugunthan V N } 6160cd8f9ccSMugunthan V N 6170cd8f9ccSMugunthan V N /* Clear All Untouched entries */ 6180cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 6190cd8f9ccSMugunthan V N do { 6200cd8f9ccSMugunthan V N cpu_relax(); 6210cd8f9ccSMugunthan V N if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT)) 6220cd8f9ccSMugunthan V N break; 6230cd8f9ccSMugunthan V N } while (time_after(timeout, jiffies)); 6240cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); 6250cd8f9ccSMugunthan V N 6260cd8f9ccSMugunthan V N /* Clear all mcast from ALE */ 62761f1cef9SGrygorii Strashko cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1); 62815180ecaSIvan Khoronzhuk __hw_addr_ref_unsync_dev(&ndev->mc, ndev, NULL); 6290cd8f9ccSMugunthan V N 6300cd8f9ccSMugunthan V N /* Flood All Unicast Packets to Host port */ 6310cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1); 6320cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity enabled\n"); 6330cd8f9ccSMugunthan V N } else { 6346f979eb3SLennart Sorensen /* Don't Flood All Unicast Packets to Host port */ 6350cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0); 6360cd8f9ccSMugunthan V N 6376f979eb3SLennart Sorensen /* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */ 638606f3993SIvan Khoronzhuk for (i = 0; i <= cpsw->data.slaves; i++) { 6390cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6400cd8f9ccSMugunthan V N ALE_PORT_NOLEARN, 0); 6410cd8f9ccSMugunthan V N cpsw_ale_control_set(ale, i, 6420cd8f9ccSMugunthan V N ALE_PORT_NO_SA_UPDATE, 0); 6430cd8f9ccSMugunthan V N } 6440cd8f9ccSMugunthan V N dev_dbg(&ndev->dev, "promiscuity disabled\n"); 6450cd8f9ccSMugunthan V N } 6460cd8f9ccSMugunthan V N } 6470cd8f9ccSMugunthan V N } 6480cd8f9ccSMugunthan V N 64915180ecaSIvan Khoronzhuk struct addr_sync_ctx { 65015180ecaSIvan Khoronzhuk struct net_device *ndev; 65115180ecaSIvan Khoronzhuk const u8 *addr; /* address to be synched */ 65215180ecaSIvan Khoronzhuk int consumed; /* number of address instances */ 65315180ecaSIvan Khoronzhuk int flush; /* flush flag */ 65415180ecaSIvan Khoronzhuk }; 6555da19489SIvan Khoronzhuk 65615180ecaSIvan Khoronzhuk /** 65715180ecaSIvan Khoronzhuk * cpsw_set_mc - adds multicast entry to the table if it's not added or deletes 65815180ecaSIvan Khoronzhuk * if it's not deleted 65915180ecaSIvan Khoronzhuk * @ndev: device to sync 66015180ecaSIvan Khoronzhuk * @addr: address to be added or deleted 66115180ecaSIvan Khoronzhuk * @vid: vlan id, if vid < 0 set/unset address for real device 66215180ecaSIvan Khoronzhuk * @add: add address if the flag is set or remove otherwise 66315180ecaSIvan Khoronzhuk */ 66415180ecaSIvan Khoronzhuk static int cpsw_set_mc(struct net_device *ndev, const u8 *addr, 66515180ecaSIvan Khoronzhuk int vid, int add) 6665c50a856SMugunthan V N { 6675c50a856SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 668606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 66915180ecaSIvan Khoronzhuk int mask, flags, ret; 67025906052SMugunthan V N 67115180ecaSIvan Khoronzhuk if (vid < 0) { 67215180ecaSIvan Khoronzhuk if (cpsw->data.dual_emac) 673606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 67415180ecaSIvan Khoronzhuk else 6755da19489SIvan Khoronzhuk vid = 0; 6765da19489SIvan Khoronzhuk } 6775da19489SIvan Khoronzhuk 67815180ecaSIvan Khoronzhuk mask = cpsw->data.dual_emac ? ALE_PORT_HOST : ALE_ALL_PORTS; 67915180ecaSIvan Khoronzhuk flags = vid ? ALE_VLAN : 0; 68015180ecaSIvan Khoronzhuk 68115180ecaSIvan Khoronzhuk if (add) 68215180ecaSIvan Khoronzhuk ret = cpsw_ale_add_mcast(cpsw->ale, addr, mask, flags, vid, 0); 68315180ecaSIvan Khoronzhuk else 68415180ecaSIvan Khoronzhuk ret = cpsw_ale_del_mcast(cpsw->ale, addr, 0, flags, vid); 68515180ecaSIvan Khoronzhuk 68615180ecaSIvan Khoronzhuk return ret; 68715180ecaSIvan Khoronzhuk } 68815180ecaSIvan Khoronzhuk 68915180ecaSIvan Khoronzhuk static int cpsw_update_vlan_mc(struct net_device *vdev, int vid, void *ctx) 69015180ecaSIvan Khoronzhuk { 69115180ecaSIvan Khoronzhuk struct addr_sync_ctx *sync_ctx = ctx; 69215180ecaSIvan Khoronzhuk struct netdev_hw_addr *ha; 69315180ecaSIvan Khoronzhuk int found = 0, ret = 0; 69415180ecaSIvan Khoronzhuk 69515180ecaSIvan Khoronzhuk if (!vdev || !(vdev->flags & IFF_UP)) 69615180ecaSIvan Khoronzhuk return 0; 69715180ecaSIvan Khoronzhuk 69815180ecaSIvan Khoronzhuk /* vlan address is relevant if its sync_cnt != 0 */ 69915180ecaSIvan Khoronzhuk netdev_for_each_mc_addr(ha, vdev) { 70015180ecaSIvan Khoronzhuk if (ether_addr_equal(ha->addr, sync_ctx->addr)) { 70115180ecaSIvan Khoronzhuk found = ha->sync_cnt; 70215180ecaSIvan Khoronzhuk break; 70315180ecaSIvan Khoronzhuk } 70415180ecaSIvan Khoronzhuk } 70515180ecaSIvan Khoronzhuk 70615180ecaSIvan Khoronzhuk if (found) 70715180ecaSIvan Khoronzhuk sync_ctx->consumed++; 70815180ecaSIvan Khoronzhuk 70915180ecaSIvan Khoronzhuk if (sync_ctx->flush) { 71015180ecaSIvan Khoronzhuk if (!found) 71115180ecaSIvan Khoronzhuk cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 0); 71215180ecaSIvan Khoronzhuk return 0; 71315180ecaSIvan Khoronzhuk } 71415180ecaSIvan Khoronzhuk 71515180ecaSIvan Khoronzhuk if (found) 71615180ecaSIvan Khoronzhuk ret = cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 1); 71715180ecaSIvan Khoronzhuk 71815180ecaSIvan Khoronzhuk return ret; 71915180ecaSIvan Khoronzhuk } 72015180ecaSIvan Khoronzhuk 72115180ecaSIvan Khoronzhuk static int cpsw_add_mc_addr(struct net_device *ndev, const u8 *addr, int num) 72215180ecaSIvan Khoronzhuk { 72315180ecaSIvan Khoronzhuk struct addr_sync_ctx sync_ctx; 72415180ecaSIvan Khoronzhuk int ret; 72515180ecaSIvan Khoronzhuk 72615180ecaSIvan Khoronzhuk sync_ctx.consumed = 0; 72715180ecaSIvan Khoronzhuk sync_ctx.addr = addr; 72815180ecaSIvan Khoronzhuk sync_ctx.ndev = ndev; 72915180ecaSIvan Khoronzhuk sync_ctx.flush = 0; 73015180ecaSIvan Khoronzhuk 73115180ecaSIvan Khoronzhuk ret = vlan_for_each(ndev, cpsw_update_vlan_mc, &sync_ctx); 73215180ecaSIvan Khoronzhuk if (sync_ctx.consumed < num && !ret) 73315180ecaSIvan Khoronzhuk ret = cpsw_set_mc(ndev, addr, -1, 1); 73415180ecaSIvan Khoronzhuk 73515180ecaSIvan Khoronzhuk return ret; 73615180ecaSIvan Khoronzhuk } 73715180ecaSIvan Khoronzhuk 73815180ecaSIvan Khoronzhuk static int cpsw_del_mc_addr(struct net_device *ndev, const u8 *addr, int num) 73915180ecaSIvan Khoronzhuk { 74015180ecaSIvan Khoronzhuk struct addr_sync_ctx sync_ctx; 74115180ecaSIvan Khoronzhuk 74215180ecaSIvan Khoronzhuk sync_ctx.consumed = 0; 74315180ecaSIvan Khoronzhuk sync_ctx.addr = addr; 74415180ecaSIvan Khoronzhuk sync_ctx.ndev = ndev; 74515180ecaSIvan Khoronzhuk sync_ctx.flush = 1; 74615180ecaSIvan Khoronzhuk 74715180ecaSIvan Khoronzhuk vlan_for_each(ndev, cpsw_update_vlan_mc, &sync_ctx); 74815180ecaSIvan Khoronzhuk if (sync_ctx.consumed == num) 74915180ecaSIvan Khoronzhuk cpsw_set_mc(ndev, addr, -1, 0); 75015180ecaSIvan Khoronzhuk 75115180ecaSIvan Khoronzhuk return 0; 75215180ecaSIvan Khoronzhuk } 75315180ecaSIvan Khoronzhuk 75415180ecaSIvan Khoronzhuk static int cpsw_purge_vlan_mc(struct net_device *vdev, int vid, void *ctx) 75515180ecaSIvan Khoronzhuk { 75615180ecaSIvan Khoronzhuk struct addr_sync_ctx *sync_ctx = ctx; 75715180ecaSIvan Khoronzhuk struct netdev_hw_addr *ha; 75815180ecaSIvan Khoronzhuk int found = 0; 75915180ecaSIvan Khoronzhuk 76015180ecaSIvan Khoronzhuk if (!vdev || !(vdev->flags & IFF_UP)) 76115180ecaSIvan Khoronzhuk return 0; 76215180ecaSIvan Khoronzhuk 76315180ecaSIvan Khoronzhuk /* vlan address is relevant if its sync_cnt != 0 */ 76415180ecaSIvan Khoronzhuk netdev_for_each_mc_addr(ha, vdev) { 76515180ecaSIvan Khoronzhuk if (ether_addr_equal(ha->addr, sync_ctx->addr)) { 76615180ecaSIvan Khoronzhuk found = ha->sync_cnt; 76715180ecaSIvan Khoronzhuk break; 76815180ecaSIvan Khoronzhuk } 76915180ecaSIvan Khoronzhuk } 77015180ecaSIvan Khoronzhuk 77115180ecaSIvan Khoronzhuk if (!found) 77215180ecaSIvan Khoronzhuk return 0; 77315180ecaSIvan Khoronzhuk 77415180ecaSIvan Khoronzhuk sync_ctx->consumed++; 77515180ecaSIvan Khoronzhuk cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 0); 77615180ecaSIvan Khoronzhuk return 0; 77715180ecaSIvan Khoronzhuk } 77815180ecaSIvan Khoronzhuk 77915180ecaSIvan Khoronzhuk static int cpsw_purge_all_mc(struct net_device *ndev, const u8 *addr, int num) 78015180ecaSIvan Khoronzhuk { 78115180ecaSIvan Khoronzhuk struct addr_sync_ctx sync_ctx; 78215180ecaSIvan Khoronzhuk 78315180ecaSIvan Khoronzhuk sync_ctx.addr = addr; 78415180ecaSIvan Khoronzhuk sync_ctx.ndev = ndev; 78515180ecaSIvan Khoronzhuk sync_ctx.consumed = 0; 78615180ecaSIvan Khoronzhuk 78715180ecaSIvan Khoronzhuk vlan_for_each(ndev, cpsw_purge_vlan_mc, &sync_ctx); 78815180ecaSIvan Khoronzhuk if (sync_ctx.consumed < num) 78915180ecaSIvan Khoronzhuk cpsw_set_mc(ndev, addr, -1, 0); 79015180ecaSIvan Khoronzhuk 7915da19489SIvan Khoronzhuk return 0; 7925da19489SIvan Khoronzhuk } 7935da19489SIvan Khoronzhuk 7945da19489SIvan Khoronzhuk static void cpsw_ndo_set_rx_mode(struct net_device *ndev) 7955da19489SIvan Khoronzhuk { 7965da19489SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 7975c50a856SMugunthan V N 7985c50a856SMugunthan V N if (ndev->flags & IFF_PROMISC) { 7995c50a856SMugunthan V N /* Enable promiscuous mode */ 8000cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, true); 8012a05a622SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI); 8025c50a856SMugunthan V N return; 8030cd8f9ccSMugunthan V N } else { 8040cd8f9ccSMugunthan V N /* Disable promiscuous mode */ 8050cd8f9ccSMugunthan V N cpsw_set_promiscious(ndev, false); 8065c50a856SMugunthan V N } 8075c50a856SMugunthan V N 8081e5c4bc4SLennart Sorensen /* Restore allmulti on vlans if necessary */ 8095da19489SIvan Khoronzhuk cpsw_ale_set_allmulti(cpsw->ale, ndev->flags & IFF_ALLMULTI); 8101e5c4bc4SLennart Sorensen 81115180ecaSIvan Khoronzhuk /* add/remove mcast address either for real netdev or for vlan */ 81215180ecaSIvan Khoronzhuk __hw_addr_ref_sync_dev(&ndev->mc, ndev, cpsw_add_mc_addr, 81315180ecaSIvan Khoronzhuk cpsw_del_mc_addr); 8145c50a856SMugunthan V N } 8155c50a856SMugunthan V N 8162c836bd9SIvan Khoronzhuk static void cpsw_intr_enable(struct cpsw_common *cpsw) 817df828598SMugunthan V N { 818dda5f5feSGrygorii Strashko writel_relaxed(0xFF, &cpsw->wr_regs->tx_en); 819dda5f5feSGrygorii Strashko writel_relaxed(0xFF, &cpsw->wr_regs->rx_en); 820df828598SMugunthan V N 8212c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, true); 822df828598SMugunthan V N return; 823df828598SMugunthan V N } 824df828598SMugunthan V N 8252c836bd9SIvan Khoronzhuk static void cpsw_intr_disable(struct cpsw_common *cpsw) 826df828598SMugunthan V N { 827dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->wr_regs->tx_en); 828dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->wr_regs->rx_en); 829df828598SMugunthan V N 8302c836bd9SIvan Khoronzhuk cpdma_ctlr_int_ctrl(cpsw->dma, false); 831df828598SMugunthan V N return; 832df828598SMugunthan V N } 833df828598SMugunthan V N 8341a3b5056SOlof Johansson static void cpsw_tx_handler(void *token, int len, int status) 835df828598SMugunthan V N { 836e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 837df828598SMugunthan V N struct sk_buff *skb = token; 838df828598SMugunthan V N struct net_device *ndev = skb->dev; 8392a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 840df828598SMugunthan V N 841fae50823SMugunthan V N /* Check whether the queue is stopped due to stalled tx dma, if the 842fae50823SMugunthan V N * queue is stopped then start the queue as we have free desc for tx 843fae50823SMugunthan V N */ 844e05107e6SIvan Khoronzhuk txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); 845e05107e6SIvan Khoronzhuk if (unlikely(netif_tx_queue_stopped(txq))) 846e05107e6SIvan Khoronzhuk netif_tx_wake_queue(txq); 847e05107e6SIvan Khoronzhuk 8482a05a622SIvan Khoronzhuk cpts_tx_timestamp(cpsw->cpts, skb); 8498dc43ddcSTobias Klauser ndev->stats.tx_packets++; 8508dc43ddcSTobias Klauser ndev->stats.tx_bytes += len; 851df828598SMugunthan V N dev_kfree_skb_any(skb); 852df828598SMugunthan V N } 853df828598SMugunthan V N 854a3a41d2fSGrygorii Strashko static void cpsw_rx_vlan_encap(struct sk_buff *skb) 855a3a41d2fSGrygorii Strashko { 856a3a41d2fSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(skb->dev); 857a3a41d2fSGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 858a3a41d2fSGrygorii Strashko u32 rx_vlan_encap_hdr = *((u32 *)skb->data); 859a3a41d2fSGrygorii Strashko u16 vtag, vid, prio, pkt_type; 860a3a41d2fSGrygorii Strashko 861a3a41d2fSGrygorii Strashko /* Remove VLAN header encapsulation word */ 862a3a41d2fSGrygorii Strashko skb_pull(skb, CPSW_RX_VLAN_ENCAP_HDR_SIZE); 863a3a41d2fSGrygorii Strashko 864a3a41d2fSGrygorii Strashko pkt_type = (rx_vlan_encap_hdr >> 865a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_SHIFT) & 866a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_MSK; 867a3a41d2fSGrygorii Strashko /* Ignore unknown & Priority-tagged packets*/ 868a3a41d2fSGrygorii Strashko if (pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_RESERV || 869a3a41d2fSGrygorii Strashko pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_PRIO_TAG) 870a3a41d2fSGrygorii Strashko return; 871a3a41d2fSGrygorii Strashko 872a3a41d2fSGrygorii Strashko vid = (rx_vlan_encap_hdr >> 873a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_VID_SHIFT) & 874a3a41d2fSGrygorii Strashko VLAN_VID_MASK; 875a3a41d2fSGrygorii Strashko /* Ignore vid 0 and pass packet as is */ 876a3a41d2fSGrygorii Strashko if (!vid) 877a3a41d2fSGrygorii Strashko return; 878a3a41d2fSGrygorii Strashko /* Ignore default vlans in dual mac mode */ 879a3a41d2fSGrygorii Strashko if (cpsw->data.dual_emac && 880a3a41d2fSGrygorii Strashko vid == cpsw->slaves[priv->emac_port].port_vlan) 881a3a41d2fSGrygorii Strashko return; 882a3a41d2fSGrygorii Strashko 883a3a41d2fSGrygorii Strashko prio = (rx_vlan_encap_hdr >> 884a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT) & 885a3a41d2fSGrygorii Strashko CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK; 886a3a41d2fSGrygorii Strashko 887a3a41d2fSGrygorii Strashko vtag = (prio << VLAN_PRIO_SHIFT) | vid; 888a3a41d2fSGrygorii Strashko __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag); 889a3a41d2fSGrygorii Strashko 890a3a41d2fSGrygorii Strashko /* strip vlan tag for VLAN-tagged packet */ 891a3a41d2fSGrygorii Strashko if (pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_VLAN_TAG) { 892a3a41d2fSGrygorii Strashko memmove(skb->data + VLAN_HLEN, skb->data, 2 * ETH_ALEN); 893a3a41d2fSGrygorii Strashko skb_pull(skb, VLAN_HLEN); 894a3a41d2fSGrygorii Strashko } 895a3a41d2fSGrygorii Strashko } 896a3a41d2fSGrygorii Strashko 8971a3b5056SOlof Johansson static void cpsw_rx_handler(void *token, int len, int status) 898df828598SMugunthan V N { 899e05107e6SIvan Khoronzhuk struct cpdma_chan *ch; 900df828598SMugunthan V N struct sk_buff *skb = token; 901b4727e69SSebastian Siewior struct sk_buff *new_skb; 902df828598SMugunthan V N struct net_device *ndev = skb->dev; 903fea49f60SIvan Khoronzhuk int ret = 0, port; 9042a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 905df828598SMugunthan V N 906fea49f60SIvan Khoronzhuk if (cpsw->data.dual_emac) { 907fea49f60SIvan Khoronzhuk port = CPDMA_RX_SOURCE_PORT(status); 908fea49f60SIvan Khoronzhuk if (port) { 909fea49f60SIvan Khoronzhuk ndev = cpsw->slaves[--port].ndev; 910fea49f60SIvan Khoronzhuk skb->dev = ndev; 911fea49f60SIvan Khoronzhuk } 912fea49f60SIvan Khoronzhuk } 913d9ba8f9eSMugunthan V N 91416e5c57dSMugunthan V N if (unlikely(status < 0) || unlikely(!netif_running(ndev))) { 915a0e2c822SMugunthan V N /* In dual emac mode check for all interfaces */ 916d5bc1613SIvan Khoronzhuk if (cpsw->data.dual_emac && cpsw->usage_count && 917fe734d0aSIvan Khoronzhuk (status >= 0)) { 918a0e2c822SMugunthan V N /* The packet received is for the interface which 919a0e2c822SMugunthan V N * is already down and the other interface is up 920dbedd44eSJoe Perches * and running, instead of freeing which results 921a0e2c822SMugunthan V N * in reducing of the number of rx descriptor in 922a0e2c822SMugunthan V N * DMA engine, requeue skb back to cpdma. 923a0e2c822SMugunthan V N */ 924a0e2c822SMugunthan V N new_skb = skb; 925a0e2c822SMugunthan V N goto requeue; 926a0e2c822SMugunthan V N } 927a0e2c822SMugunthan V N 928b4727e69SSebastian Siewior /* the interface is going down, skbs are purged */ 929df828598SMugunthan V N dev_kfree_skb_any(skb); 930df828598SMugunthan V N return; 931df828598SMugunthan V N } 932b4727e69SSebastian Siewior 9332a05a622SIvan Khoronzhuk new_skb = netdev_alloc_skb_ip_align(ndev, cpsw->rx_packet_max); 934b4727e69SSebastian Siewior if (new_skb) { 935e05107e6SIvan Khoronzhuk skb_copy_queue_mapping(new_skb, skb); 936df828598SMugunthan V N skb_put(skb, len); 937a3a41d2fSGrygorii Strashko if (status & CPDMA_RX_VLAN_ENCAP) 938a3a41d2fSGrygorii Strashko cpsw_rx_vlan_encap(skb); 9392a05a622SIvan Khoronzhuk cpts_rx_timestamp(cpsw->cpts, skb); 940df828598SMugunthan V N skb->protocol = eth_type_trans(skb, ndev); 941df828598SMugunthan V N netif_receive_skb(skb); 9428dc43ddcSTobias Klauser ndev->stats.rx_bytes += len; 9438dc43ddcSTobias Klauser ndev->stats.rx_packets++; 944254a49d5SGrygorii Strashko kmemleak_not_leak(new_skb); 945b4727e69SSebastian Siewior } else { 9468dc43ddcSTobias Klauser ndev->stats.rx_dropped++; 947b4727e69SSebastian Siewior new_skb = skb; 948df828598SMugunthan V N } 949df828598SMugunthan V N 950a0e2c822SMugunthan V N requeue: 951ce52c744SIvan Khoronzhuk if (netif_dormant(ndev)) { 952ce52c744SIvan Khoronzhuk dev_kfree_skb_any(new_skb); 953ce52c744SIvan Khoronzhuk return; 954ce52c744SIvan Khoronzhuk } 955ce52c744SIvan Khoronzhuk 9568feb0a19SIvan Khoronzhuk ch = cpsw->rxv[skb_get_queue_mapping(new_skb)].ch; 957e05107e6SIvan Khoronzhuk ret = cpdma_chan_submit(ch, new_skb, new_skb->data, 958b4727e69SSebastian Siewior skb_tailroom(new_skb), 0); 959b4727e69SSebastian Siewior if (WARN_ON(ret < 0)) 960b4727e69SSebastian Siewior dev_kfree_skb_any(new_skb); 961df828598SMugunthan V N } 962df828598SMugunthan V N 96332b78d85SIvan Khoronzhuk static void cpsw_split_res(struct net_device *ndev) 96448e0a83eSIvan Khoronzhuk { 96548e0a83eSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 96632b78d85SIvan Khoronzhuk u32 consumed_rate = 0, bigest_rate = 0; 96748e0a83eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 96848e0a83eSIvan Khoronzhuk struct cpsw_vector *txv = cpsw->txv; 96932b78d85SIvan Khoronzhuk int i, ch_weight, rlim_ch_num = 0; 97048e0a83eSIvan Khoronzhuk int budget, bigest_rate_ch = 0; 97148e0a83eSIvan Khoronzhuk u32 ch_rate, max_rate; 97248e0a83eSIvan Khoronzhuk int ch_budget = 0; 97348e0a83eSIvan Khoronzhuk 97448e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 97548e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 97648e0a83eSIvan Khoronzhuk if (!ch_rate) 97748e0a83eSIvan Khoronzhuk continue; 97848e0a83eSIvan Khoronzhuk 97948e0a83eSIvan Khoronzhuk rlim_ch_num++; 98048e0a83eSIvan Khoronzhuk consumed_rate += ch_rate; 98148e0a83eSIvan Khoronzhuk } 98248e0a83eSIvan Khoronzhuk 98348e0a83eSIvan Khoronzhuk if (cpsw->tx_ch_num == rlim_ch_num) { 98448e0a83eSIvan Khoronzhuk max_rate = consumed_rate; 98532b78d85SIvan Khoronzhuk } else if (!rlim_ch_num) { 98632b78d85SIvan Khoronzhuk ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num; 98732b78d85SIvan Khoronzhuk bigest_rate = 0; 98832b78d85SIvan Khoronzhuk max_rate = consumed_rate; 98948e0a83eSIvan Khoronzhuk } else { 9900be01b8eSIvan Khoronzhuk max_rate = cpsw->speed * 1000; 9910be01b8eSIvan Khoronzhuk 9920be01b8eSIvan Khoronzhuk /* if max_rate is less then expected due to reduced link speed, 9930be01b8eSIvan Khoronzhuk * split proportionally according next potential max speed 9940be01b8eSIvan Khoronzhuk */ 9950be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 9960be01b8eSIvan Khoronzhuk max_rate *= 10; 9970be01b8eSIvan Khoronzhuk 9980be01b8eSIvan Khoronzhuk if (max_rate < consumed_rate) 9990be01b8eSIvan Khoronzhuk max_rate *= 10; 100032b78d85SIvan Khoronzhuk 100148e0a83eSIvan Khoronzhuk ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate; 100248e0a83eSIvan Khoronzhuk ch_budget = (CPSW_POLL_WEIGHT - ch_budget) / 100348e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 100448e0a83eSIvan Khoronzhuk bigest_rate = (max_rate - consumed_rate) / 100548e0a83eSIvan Khoronzhuk (cpsw->tx_ch_num - rlim_ch_num); 100648e0a83eSIvan Khoronzhuk } 100748e0a83eSIvan Khoronzhuk 100832b78d85SIvan Khoronzhuk /* split tx weight/budget */ 100948e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 101048e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->tx_ch_num; i++) { 101148e0a83eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(txv[i].ch); 101248e0a83eSIvan Khoronzhuk if (ch_rate) { 101348e0a83eSIvan Khoronzhuk txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate; 101448e0a83eSIvan Khoronzhuk if (!txv[i].budget) 101532b78d85SIvan Khoronzhuk txv[i].budget++; 101648e0a83eSIvan Khoronzhuk if (ch_rate > bigest_rate) { 101748e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 101848e0a83eSIvan Khoronzhuk bigest_rate = ch_rate; 101948e0a83eSIvan Khoronzhuk } 102032b78d85SIvan Khoronzhuk 102132b78d85SIvan Khoronzhuk ch_weight = (ch_rate * 100) / max_rate; 102232b78d85SIvan Khoronzhuk if (!ch_weight) 102332b78d85SIvan Khoronzhuk ch_weight++; 102432b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight); 102548e0a83eSIvan Khoronzhuk } else { 102648e0a83eSIvan Khoronzhuk txv[i].budget = ch_budget; 102748e0a83eSIvan Khoronzhuk if (!bigest_rate_ch) 102848e0a83eSIvan Khoronzhuk bigest_rate_ch = i; 102932b78d85SIvan Khoronzhuk cpdma_chan_set_weight(cpsw->txv[i].ch, 0); 103048e0a83eSIvan Khoronzhuk } 103148e0a83eSIvan Khoronzhuk 103248e0a83eSIvan Khoronzhuk budget -= txv[i].budget; 103348e0a83eSIvan Khoronzhuk } 103448e0a83eSIvan Khoronzhuk 103548e0a83eSIvan Khoronzhuk if (budget) 103648e0a83eSIvan Khoronzhuk txv[bigest_rate_ch].budget += budget; 103748e0a83eSIvan Khoronzhuk 103848e0a83eSIvan Khoronzhuk /* split rx budget */ 103948e0a83eSIvan Khoronzhuk budget = CPSW_POLL_WEIGHT; 104048e0a83eSIvan Khoronzhuk ch_budget = budget / cpsw->rx_ch_num; 104148e0a83eSIvan Khoronzhuk for (i = 0; i < cpsw->rx_ch_num; i++) { 104248e0a83eSIvan Khoronzhuk cpsw->rxv[i].budget = ch_budget; 104348e0a83eSIvan Khoronzhuk budget -= ch_budget; 104448e0a83eSIvan Khoronzhuk } 104548e0a83eSIvan Khoronzhuk 104648e0a83eSIvan Khoronzhuk if (budget) 104748e0a83eSIvan Khoronzhuk cpsw->rxv[0].budget += budget; 104848e0a83eSIvan Khoronzhuk } 104948e0a83eSIvan Khoronzhuk 1050c03abd84SFelipe Balbi static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id) 1051df828598SMugunthan V N { 1052dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 10537ce67a38SFelipe Balbi 10545d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->tx_en); 10552c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX); 1056c03abd84SFelipe Balbi 1057e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 1058e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[1]); 1059e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = true; 10607da11600SMugunthan V N } 10617da11600SMugunthan V N 1062dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_tx); 1063c03abd84SFelipe Balbi return IRQ_HANDLED; 1064c03abd84SFelipe Balbi } 1065c03abd84SFelipe Balbi 1066c03abd84SFelipe Balbi static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id) 1067c03abd84SFelipe Balbi { 1068dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = dev_id; 1069c03abd84SFelipe Balbi 10702c836bd9SIvan Khoronzhuk cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX); 10715d8d0d4dSIvan Khoronzhuk writel(0, &cpsw->wr_regs->rx_en); 1072fd51cf19SSebastian Siewior 1073e38b5a3dSIvan Khoronzhuk if (cpsw->quirk_irq) { 1074e38b5a3dSIvan Khoronzhuk disable_irq_nosync(cpsw->irqs_table[0]); 1075e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = true; 10767da11600SMugunthan V N } 10777da11600SMugunthan V N 1078dbc4ec52SIvan Khoronzhuk napi_schedule(&cpsw->napi_rx); 1079df828598SMugunthan V N return IRQ_HANDLED; 1080df828598SMugunthan V N } 1081df828598SMugunthan V N 10829611d6d6SIvan Khoronzhuk static int cpsw_tx_mq_poll(struct napi_struct *napi_tx, int budget) 1083df828598SMugunthan V N { 1084e05107e6SIvan Khoronzhuk u32 ch_map; 10858feb0a19SIvan Khoronzhuk int num_tx, cur_budget, ch; 1086dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_tx); 10878feb0a19SIvan Khoronzhuk struct cpsw_vector *txv; 108832a7432cSMugunthan V N 1089e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 1090e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_txchs_state(cpsw->dma); 109179b3325dSIvan Khoronzhuk for (ch = 0, num_tx = 0; ch_map & 0xff; ch_map <<= 1, ch++) { 109279b3325dSIvan Khoronzhuk if (!(ch_map & 0x80)) 1093e05107e6SIvan Khoronzhuk continue; 1094e05107e6SIvan Khoronzhuk 10958feb0a19SIvan Khoronzhuk txv = &cpsw->txv[ch]; 10968feb0a19SIvan Khoronzhuk if (unlikely(txv->budget > budget - num_tx)) 10978feb0a19SIvan Khoronzhuk cur_budget = budget - num_tx; 10988feb0a19SIvan Khoronzhuk else 10998feb0a19SIvan Khoronzhuk cur_budget = txv->budget; 11008feb0a19SIvan Khoronzhuk 11018feb0a19SIvan Khoronzhuk num_tx += cpdma_chan_process(txv->ch, cur_budget); 1102342934a5SIvan Khoronzhuk if (num_tx >= budget) 1103342934a5SIvan Khoronzhuk break; 1104e05107e6SIvan Khoronzhuk } 1105e05107e6SIvan Khoronzhuk 110632a7432cSMugunthan V N if (num_tx < budget) { 110732a7432cSMugunthan V N napi_complete(napi_tx); 11085d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->tx_en); 11099611d6d6SIvan Khoronzhuk } 11109611d6d6SIvan Khoronzhuk 11119611d6d6SIvan Khoronzhuk return num_tx; 11129611d6d6SIvan Khoronzhuk } 11139611d6d6SIvan Khoronzhuk 11149611d6d6SIvan Khoronzhuk static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget) 11159611d6d6SIvan Khoronzhuk { 11169611d6d6SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_tx); 11179611d6d6SIvan Khoronzhuk int num_tx; 11189611d6d6SIvan Khoronzhuk 11199611d6d6SIvan Khoronzhuk num_tx = cpdma_chan_process(cpsw->txv[0].ch, budget); 11209611d6d6SIvan Khoronzhuk if (num_tx < budget) { 11219611d6d6SIvan Khoronzhuk napi_complete(napi_tx); 11229611d6d6SIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->tx_en); 11239611d6d6SIvan Khoronzhuk if (cpsw->tx_irq_disabled) { 1124e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 1125e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 11267da11600SMugunthan V N } 112732a7432cSMugunthan V N } 112832a7432cSMugunthan V N 112932a7432cSMugunthan V N return num_tx; 113032a7432cSMugunthan V N } 113132a7432cSMugunthan V N 11329611d6d6SIvan Khoronzhuk static int cpsw_rx_mq_poll(struct napi_struct *napi_rx, int budget) 113332a7432cSMugunthan V N { 1134e05107e6SIvan Khoronzhuk u32 ch_map; 11358feb0a19SIvan Khoronzhuk int num_rx, cur_budget, ch; 1136dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_rx); 11378feb0a19SIvan Khoronzhuk struct cpsw_vector *rxv; 1138510a1e72SMugunthan V N 1139e05107e6SIvan Khoronzhuk /* process every unprocessed channel */ 1140e05107e6SIvan Khoronzhuk ch_map = cpdma_ctrl_rxchs_state(cpsw->dma); 1141342934a5SIvan Khoronzhuk for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) { 1142e05107e6SIvan Khoronzhuk if (!(ch_map & 0x01)) 1143e05107e6SIvan Khoronzhuk continue; 1144e05107e6SIvan Khoronzhuk 11458feb0a19SIvan Khoronzhuk rxv = &cpsw->rxv[ch]; 11468feb0a19SIvan Khoronzhuk if (unlikely(rxv->budget > budget - num_rx)) 11478feb0a19SIvan Khoronzhuk cur_budget = budget - num_rx; 11488feb0a19SIvan Khoronzhuk else 11498feb0a19SIvan Khoronzhuk cur_budget = rxv->budget; 11508feb0a19SIvan Khoronzhuk 11518feb0a19SIvan Khoronzhuk num_rx += cpdma_chan_process(rxv->ch, cur_budget); 1152342934a5SIvan Khoronzhuk if (num_rx >= budget) 1153342934a5SIvan Khoronzhuk break; 1154e05107e6SIvan Khoronzhuk } 1155e05107e6SIvan Khoronzhuk 1156510a1e72SMugunthan V N if (num_rx < budget) { 11576ad20165SEric Dumazet napi_complete_done(napi_rx, num_rx); 11585d8d0d4dSIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->rx_en); 11599611d6d6SIvan Khoronzhuk } 11609611d6d6SIvan Khoronzhuk 11619611d6d6SIvan Khoronzhuk return num_rx; 11629611d6d6SIvan Khoronzhuk } 11639611d6d6SIvan Khoronzhuk 11649611d6d6SIvan Khoronzhuk static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget) 11659611d6d6SIvan Khoronzhuk { 11669611d6d6SIvan Khoronzhuk struct cpsw_common *cpsw = napi_to_cpsw(napi_rx); 11679611d6d6SIvan Khoronzhuk int num_rx; 11689611d6d6SIvan Khoronzhuk 11699611d6d6SIvan Khoronzhuk num_rx = cpdma_chan_process(cpsw->rxv[0].ch, budget); 11709611d6d6SIvan Khoronzhuk if (num_rx < budget) { 11719611d6d6SIvan Khoronzhuk napi_complete_done(napi_rx, num_rx); 11729611d6d6SIvan Khoronzhuk writel(0xff, &cpsw->wr_regs->rx_en); 11739611d6d6SIvan Khoronzhuk if (cpsw->rx_irq_disabled) { 1174e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 1175e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 11767da11600SMugunthan V N } 1177510a1e72SMugunthan V N } 1178df828598SMugunthan V N 1179df828598SMugunthan V N return num_rx; 1180df828598SMugunthan V N } 1181df828598SMugunthan V N 1182df828598SMugunthan V N static inline void soft_reset(const char *module, void __iomem *reg) 1183df828598SMugunthan V N { 1184df828598SMugunthan V N unsigned long timeout = jiffies + HZ; 1185df828598SMugunthan V N 1186dda5f5feSGrygorii Strashko writel_relaxed(1, reg); 1187df828598SMugunthan V N do { 1188df828598SMugunthan V N cpu_relax(); 1189dda5f5feSGrygorii Strashko } while ((readl_relaxed(reg) & 1) && time_after(timeout, jiffies)); 1190df828598SMugunthan V N 1191dda5f5feSGrygorii Strashko WARN(readl_relaxed(reg) & 1, "failed to soft-reset %s\n", module); 1192df828598SMugunthan V N } 1193df828598SMugunthan V N 1194df828598SMugunthan V N static void cpsw_set_slave_mac(struct cpsw_slave *slave, 1195df828598SMugunthan V N struct cpsw_priv *priv) 1196df828598SMugunthan V N { 11979750a3adSRichard Cochran slave_write(slave, mac_hi(priv->mac_addr), SA_HI); 11989750a3adSRichard Cochran slave_write(slave, mac_lo(priv->mac_addr), SA_LO); 1199df828598SMugunthan V N } 1200df828598SMugunthan V N 120157d90148SIvan Khoronzhuk static bool cpsw_shp_is_off(struct cpsw_priv *priv) 120257d90148SIvan Khoronzhuk { 120357d90148SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 120457d90148SIvan Khoronzhuk struct cpsw_slave *slave; 120557d90148SIvan Khoronzhuk u32 shift, mask, val; 120657d90148SIvan Khoronzhuk 120757d90148SIvan Khoronzhuk val = readl_relaxed(&cpsw->regs->ptype); 120857d90148SIvan Khoronzhuk 120957d90148SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 121057d90148SIvan Khoronzhuk shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num; 121157d90148SIvan Khoronzhuk mask = 7 << shift; 121257d90148SIvan Khoronzhuk val = val & mask; 121357d90148SIvan Khoronzhuk 121457d90148SIvan Khoronzhuk return !val; 121557d90148SIvan Khoronzhuk } 121657d90148SIvan Khoronzhuk 121757d90148SIvan Khoronzhuk static void cpsw_fifo_shp_on(struct cpsw_priv *priv, int fifo, int on) 121857d90148SIvan Khoronzhuk { 121957d90148SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 122057d90148SIvan Khoronzhuk struct cpsw_slave *slave; 122157d90148SIvan Khoronzhuk u32 shift, mask, val; 122257d90148SIvan Khoronzhuk 122357d90148SIvan Khoronzhuk val = readl_relaxed(&cpsw->regs->ptype); 122457d90148SIvan Khoronzhuk 122557d90148SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 122657d90148SIvan Khoronzhuk shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num; 122757d90148SIvan Khoronzhuk mask = (1 << --fifo) << shift; 122857d90148SIvan Khoronzhuk val = on ? val | mask : val & ~mask; 122957d90148SIvan Khoronzhuk 123057d90148SIvan Khoronzhuk writel_relaxed(val, &cpsw->regs->ptype); 123157d90148SIvan Khoronzhuk } 123257d90148SIvan Khoronzhuk 1233df828598SMugunthan V N static void _cpsw_adjust_link(struct cpsw_slave *slave, 1234df828598SMugunthan V N struct cpsw_priv *priv, bool *link) 1235df828598SMugunthan V N { 1236df828598SMugunthan V N struct phy_device *phy = slave->phy; 1237df828598SMugunthan V N u32 mac_control = 0; 1238df828598SMugunthan V N u32 slave_port; 1239606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1240df828598SMugunthan V N 1241df828598SMugunthan V N if (!phy) 1242df828598SMugunthan V N return; 1243df828598SMugunthan V N 12446f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1245df828598SMugunthan V N 1246df828598SMugunthan V N if (phy->link) { 1247606f3993SIvan Khoronzhuk mac_control = cpsw->data.mac_control; 1248df828598SMugunthan V N 1249df828598SMugunthan V N /* enable forwarding */ 12502a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1251df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1252df828598SMugunthan V N 1253df828598SMugunthan V N if (phy->speed == 1000) 1254df828598SMugunthan V N mac_control |= BIT(7); /* GIGABITEN */ 1255df828598SMugunthan V N if (phy->duplex) 1256df828598SMugunthan V N mac_control |= BIT(0); /* FULLDUPLEXEN */ 1257342b7b74SDaniel Mack 1258342b7b74SDaniel Mack /* set speed_in input in case RMII mode is used in 100Mbps */ 1259342b7b74SDaniel Mack if (phy->speed == 100) 1260342b7b74SDaniel Mack mac_control |= BIT(15); 1261f9db5069SSZ Lin (林上智) /* in band mode only works in 10Mbps RGMII mode */ 1262f9db5069SSZ Lin (林上智) else if ((phy->speed == 10) && phy_interface_is_rgmii(phy)) 1263a81d8762SMugunthan V N mac_control |= BIT(18); /* In Band mode */ 1264342b7b74SDaniel Mack 12651923d6e4SMugunthan V N if (priv->rx_pause) 12661923d6e4SMugunthan V N mac_control |= BIT(3); 12671923d6e4SMugunthan V N 12681923d6e4SMugunthan V N if (priv->tx_pause) 12691923d6e4SMugunthan V N mac_control |= BIT(4); 12701923d6e4SMugunthan V N 1271df828598SMugunthan V N *link = true; 127257d90148SIvan Khoronzhuk 127357d90148SIvan Khoronzhuk if (priv->shp_cfg_speed && 127457d90148SIvan Khoronzhuk priv->shp_cfg_speed != slave->phy->speed && 127557d90148SIvan Khoronzhuk !cpsw_shp_is_off(priv)) 127657d90148SIvan Khoronzhuk dev_warn(priv->dev, 127757d90148SIvan Khoronzhuk "Speed was changed, CBS shaper speeds are changed!"); 1278df828598SMugunthan V N } else { 1279df828598SMugunthan V N mac_control = 0; 1280df828598SMugunthan V N /* disable forwarding */ 12812a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 1282df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 1283df828598SMugunthan V N } 1284df828598SMugunthan V N 1285df828598SMugunthan V N if (mac_control != slave->mac_control) { 1286df828598SMugunthan V N phy_print_status(phy); 1287dda5f5feSGrygorii Strashko writel_relaxed(mac_control, &slave->sliver->mac_control); 1288df828598SMugunthan V N } 1289df828598SMugunthan V N 1290df828598SMugunthan V N slave->mac_control = mac_control; 1291df828598SMugunthan V N } 1292df828598SMugunthan V N 12930be01b8eSIvan Khoronzhuk static int cpsw_get_common_speed(struct cpsw_common *cpsw) 12940be01b8eSIvan Khoronzhuk { 12950be01b8eSIvan Khoronzhuk int i, speed; 12960be01b8eSIvan Khoronzhuk 12970be01b8eSIvan Khoronzhuk for (i = 0, speed = 0; i < cpsw->data.slaves; i++) 12980be01b8eSIvan Khoronzhuk if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link) 12990be01b8eSIvan Khoronzhuk speed += cpsw->slaves[i].phy->speed; 13000be01b8eSIvan Khoronzhuk 13010be01b8eSIvan Khoronzhuk return speed; 13020be01b8eSIvan Khoronzhuk } 13030be01b8eSIvan Khoronzhuk 13040be01b8eSIvan Khoronzhuk static int cpsw_need_resplit(struct cpsw_common *cpsw) 13050be01b8eSIvan Khoronzhuk { 13060be01b8eSIvan Khoronzhuk int i, rlim_ch_num; 13070be01b8eSIvan Khoronzhuk int speed, ch_rate; 13080be01b8eSIvan Khoronzhuk 13090be01b8eSIvan Khoronzhuk /* re-split resources only in case speed was changed */ 13100be01b8eSIvan Khoronzhuk speed = cpsw_get_common_speed(cpsw); 13110be01b8eSIvan Khoronzhuk if (speed == cpsw->speed || !speed) 13120be01b8eSIvan Khoronzhuk return 0; 13130be01b8eSIvan Khoronzhuk 13140be01b8eSIvan Khoronzhuk cpsw->speed = speed; 13150be01b8eSIvan Khoronzhuk 13160be01b8eSIvan Khoronzhuk for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) { 13170be01b8eSIvan Khoronzhuk ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch); 13180be01b8eSIvan Khoronzhuk if (!ch_rate) 13190be01b8eSIvan Khoronzhuk break; 13200be01b8eSIvan Khoronzhuk 13210be01b8eSIvan Khoronzhuk rlim_ch_num++; 13220be01b8eSIvan Khoronzhuk } 13230be01b8eSIvan Khoronzhuk 13240be01b8eSIvan Khoronzhuk /* cases not dependent on speed */ 13250be01b8eSIvan Khoronzhuk if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num) 13260be01b8eSIvan Khoronzhuk return 0; 13270be01b8eSIvan Khoronzhuk 13280be01b8eSIvan Khoronzhuk return 1; 13290be01b8eSIvan Khoronzhuk } 13300be01b8eSIvan Khoronzhuk 1331df828598SMugunthan V N static void cpsw_adjust_link(struct net_device *ndev) 1332df828598SMugunthan V N { 1333df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 13340be01b8eSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1335df828598SMugunthan V N bool link = false; 1336df828598SMugunthan V N 1337df828598SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 1338df828598SMugunthan V N 1339df828598SMugunthan V N if (link) { 13400be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 13410be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 13420be01b8eSIvan Khoronzhuk 1343df828598SMugunthan V N netif_carrier_on(ndev); 1344df828598SMugunthan V N if (netif_running(ndev)) 1345e05107e6SIvan Khoronzhuk netif_tx_wake_all_queues(ndev); 1346df828598SMugunthan V N } else { 1347df828598SMugunthan V N netif_carrier_off(ndev); 1348e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(ndev); 1349df828598SMugunthan V N } 1350df828598SMugunthan V N } 1351df828598SMugunthan V N 1352ff5b8ef2SMugunthan V N static int cpsw_get_coalesce(struct net_device *ndev, 1353ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1354ff5b8ef2SMugunthan V N { 13552a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1356ff5b8ef2SMugunthan V N 13572a05a622SIvan Khoronzhuk coal->rx_coalesce_usecs = cpsw->coal_intvl; 1358ff5b8ef2SMugunthan V N return 0; 1359ff5b8ef2SMugunthan V N } 1360ff5b8ef2SMugunthan V N 1361ff5b8ef2SMugunthan V N static int cpsw_set_coalesce(struct net_device *ndev, 1362ff5b8ef2SMugunthan V N struct ethtool_coalesce *coal) 1363ff5b8ef2SMugunthan V N { 1364ff5b8ef2SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1365ff5b8ef2SMugunthan V N u32 int_ctrl; 1366ff5b8ef2SMugunthan V N u32 num_interrupts = 0; 1367ff5b8ef2SMugunthan V N u32 prescale = 0; 1368ff5b8ef2SMugunthan V N u32 addnl_dvdr = 1; 1369ff5b8ef2SMugunthan V N u32 coal_intvl = 0; 13705d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1371ff5b8ef2SMugunthan V N 1372ff5b8ef2SMugunthan V N coal_intvl = coal->rx_coalesce_usecs; 1373ff5b8ef2SMugunthan V N 13745d8d0d4dSIvan Khoronzhuk int_ctrl = readl(&cpsw->wr_regs->int_control); 13752a05a622SIvan Khoronzhuk prescale = cpsw->bus_freq_mhz * 4; 1376ff5b8ef2SMugunthan V N 1377a84bc2a9SMugunthan V N if (!coal->rx_coalesce_usecs) { 1378a84bc2a9SMugunthan V N int_ctrl &= ~(CPSW_INTPRESCALE_MASK | CPSW_INTPACEEN); 1379a84bc2a9SMugunthan V N goto update_return; 1380a84bc2a9SMugunthan V N } 1381a84bc2a9SMugunthan V N 1382ff5b8ef2SMugunthan V N if (coal_intvl < CPSW_CMINTMIN_INTVL) 1383ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMIN_INTVL; 1384ff5b8ef2SMugunthan V N 1385ff5b8ef2SMugunthan V N if (coal_intvl > CPSW_CMINTMAX_INTVL) { 1386ff5b8ef2SMugunthan V N /* Interrupt pacer works with 4us Pulse, we can 1387ff5b8ef2SMugunthan V N * throttle further by dilating the 4us pulse. 1388ff5b8ef2SMugunthan V N */ 1389ff5b8ef2SMugunthan V N addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale; 1390ff5b8ef2SMugunthan V N 1391ff5b8ef2SMugunthan V N if (addnl_dvdr > 1) { 1392ff5b8ef2SMugunthan V N prescale *= addnl_dvdr; 1393ff5b8ef2SMugunthan V N if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr)) 1394ff5b8ef2SMugunthan V N coal_intvl = (CPSW_CMINTMAX_INTVL 1395ff5b8ef2SMugunthan V N * addnl_dvdr); 1396ff5b8ef2SMugunthan V N } else { 1397ff5b8ef2SMugunthan V N addnl_dvdr = 1; 1398ff5b8ef2SMugunthan V N coal_intvl = CPSW_CMINTMAX_INTVL; 1399ff5b8ef2SMugunthan V N } 1400ff5b8ef2SMugunthan V N } 1401ff5b8ef2SMugunthan V N 1402ff5b8ef2SMugunthan V N num_interrupts = (1000 * addnl_dvdr) / coal_intvl; 14035d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->rx_imax); 14045d8d0d4dSIvan Khoronzhuk writel(num_interrupts, &cpsw->wr_regs->tx_imax); 1405ff5b8ef2SMugunthan V N 1406ff5b8ef2SMugunthan V N int_ctrl |= CPSW_INTPACEEN; 1407ff5b8ef2SMugunthan V N int_ctrl &= (~CPSW_INTPRESCALE_MASK); 1408ff5b8ef2SMugunthan V N int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK); 1409a84bc2a9SMugunthan V N 1410a84bc2a9SMugunthan V N update_return: 14115d8d0d4dSIvan Khoronzhuk writel(int_ctrl, &cpsw->wr_regs->int_control); 1412ff5b8ef2SMugunthan V N 1413ff5b8ef2SMugunthan V N cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl); 14142a05a622SIvan Khoronzhuk cpsw->coal_intvl = coal_intvl; 1415ff5b8ef2SMugunthan V N 1416ff5b8ef2SMugunthan V N return 0; 1417ff5b8ef2SMugunthan V N } 1418ff5b8ef2SMugunthan V N 1419d9718546SMugunthan V N static int cpsw_get_sset_count(struct net_device *ndev, int sset) 1420d9718546SMugunthan V N { 1421e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1422e05107e6SIvan Khoronzhuk 1423d9718546SMugunthan V N switch (sset) { 1424d9718546SMugunthan V N case ETH_SS_STATS: 1425e05107e6SIvan Khoronzhuk return (CPSW_STATS_COMMON_LEN + 1426e05107e6SIvan Khoronzhuk (cpsw->rx_ch_num + cpsw->tx_ch_num) * 1427e05107e6SIvan Khoronzhuk CPSW_STATS_CH_LEN); 1428d9718546SMugunthan V N default: 1429d9718546SMugunthan V N return -EOPNOTSUPP; 1430d9718546SMugunthan V N } 1431d9718546SMugunthan V N } 1432d9718546SMugunthan V N 1433e05107e6SIvan Khoronzhuk static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) 1434e05107e6SIvan Khoronzhuk { 1435e05107e6SIvan Khoronzhuk int ch_stats_len; 1436e05107e6SIvan Khoronzhuk int line; 1437e05107e6SIvan Khoronzhuk int i; 1438e05107e6SIvan Khoronzhuk 1439e05107e6SIvan Khoronzhuk ch_stats_len = CPSW_STATS_CH_LEN * ch_num; 1440e05107e6SIvan Khoronzhuk for (i = 0; i < ch_stats_len; i++) { 1441e05107e6SIvan Khoronzhuk line = i % CPSW_STATS_CH_LEN; 1442e05107e6SIvan Khoronzhuk snprintf(*p, ETH_GSTRING_LEN, 1443bf2ce3fdSFlorian Fainelli "%s DMA chan %ld: %s", rx_dir ? "Rx" : "Tx", 1444bf2ce3fdSFlorian Fainelli (long)(i / CPSW_STATS_CH_LEN), 1445e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[line].stat_string); 1446e05107e6SIvan Khoronzhuk *p += ETH_GSTRING_LEN; 1447e05107e6SIvan Khoronzhuk } 1448e05107e6SIvan Khoronzhuk } 1449e05107e6SIvan Khoronzhuk 1450d9718546SMugunthan V N static void cpsw_get_strings(struct net_device *ndev, u32 stringset, u8 *data) 1451d9718546SMugunthan V N { 1452e05107e6SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1453d9718546SMugunthan V N u8 *p = data; 1454d9718546SMugunthan V N int i; 1455d9718546SMugunthan V N 1456d9718546SMugunthan V N switch (stringset) { 1457d9718546SMugunthan V N case ETH_SS_STATS: 1458e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_COMMON_LEN; i++) { 1459d9718546SMugunthan V N memcpy(p, cpsw_gstrings_stats[i].stat_string, 1460d9718546SMugunthan V N ETH_GSTRING_LEN); 1461d9718546SMugunthan V N p += ETH_GSTRING_LEN; 1462d9718546SMugunthan V N } 1463e05107e6SIvan Khoronzhuk 1464e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->rx_ch_num, 1); 1465e05107e6SIvan Khoronzhuk cpsw_add_ch_strings(&p, cpsw->tx_ch_num, 0); 1466d9718546SMugunthan V N break; 1467d9718546SMugunthan V N } 1468d9718546SMugunthan V N } 1469d9718546SMugunthan V N 1470d9718546SMugunthan V N static void cpsw_get_ethtool_stats(struct net_device *ndev, 1471d9718546SMugunthan V N struct ethtool_stats *stats, u64 *data) 1472d9718546SMugunthan V N { 1473d9718546SMugunthan V N u8 *p; 14742c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 1475e05107e6SIvan Khoronzhuk struct cpdma_chan_stats ch_stats; 1476e05107e6SIvan Khoronzhuk int i, l, ch; 1477d9718546SMugunthan V N 1478d9718546SMugunthan V N /* Collect Davinci CPDMA stats for Rx and Tx Channel */ 1479e05107e6SIvan Khoronzhuk for (l = 0; l < CPSW_STATS_COMMON_LEN; l++) 1480e05107e6SIvan Khoronzhuk data[l] = readl(cpsw->hw_stats + 1481e05107e6SIvan Khoronzhuk cpsw_gstrings_stats[l].stat_offset); 1482d9718546SMugunthan V N 1483e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 14848feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->rxv[ch].ch, &ch_stats); 1485e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1486e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1487e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1488e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1489e05107e6SIvan Khoronzhuk } 1490e05107e6SIvan Khoronzhuk } 1491d9718546SMugunthan V N 1492e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 14938feb0a19SIvan Khoronzhuk cpdma_chan_get_stats(cpsw->txv[ch].ch, &ch_stats); 1494e05107e6SIvan Khoronzhuk for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) { 1495e05107e6SIvan Khoronzhuk p = (u8 *)&ch_stats + 1496e05107e6SIvan Khoronzhuk cpsw_gstrings_ch_stats[i].stat_offset; 1497e05107e6SIvan Khoronzhuk data[l] = *(u32 *)p; 1498d9718546SMugunthan V N } 1499d9718546SMugunthan V N } 1500d9718546SMugunthan V N } 1501d9718546SMugunthan V N 150227e9e103SIvan Khoronzhuk static inline int cpsw_tx_packet_submit(struct cpsw_priv *priv, 1503e05107e6SIvan Khoronzhuk struct sk_buff *skb, 1504e05107e6SIvan Khoronzhuk struct cpdma_chan *txch) 1505d9ba8f9eSMugunthan V N { 15062c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 15072c836bd9SIvan Khoronzhuk 150898fdd857SIvan Khoronzhuk skb_tx_timestamp(skb); 1509e05107e6SIvan Khoronzhuk return cpdma_chan_submit(txch, skb, skb->data, skb->len, 1510606f3993SIvan Khoronzhuk priv->emac_port + cpsw->data.dual_emac); 1511d9ba8f9eSMugunthan V N } 1512d9ba8f9eSMugunthan V N 1513d9ba8f9eSMugunthan V N static inline void cpsw_add_dual_emac_def_ale_entries( 1514d9ba8f9eSMugunthan V N struct cpsw_priv *priv, struct cpsw_slave *slave, 1515d9ba8f9eSMugunthan V N u32 slave_port) 1516d9ba8f9eSMugunthan V N { 15172a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 151871a2cbb7SGrygorii Strashko u32 port_mask = 1 << slave_port | ALE_PORT_HOST; 1519d9ba8f9eSMugunthan V N 15202a05a622SIvan Khoronzhuk if (cpsw->version == CPSW_VERSION_1) 1521d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN); 1522d9ba8f9eSMugunthan V N else 1523d9ba8f9eSMugunthan V N slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN); 15242a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask, 1525d9ba8f9eSMugunthan V N port_mask, port_mask, 0); 15262a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 15275b3a5a14SIvan Khoronzhuk ALE_PORT_HOST, ALE_VLAN, slave->port_vlan, 0); 15282a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 15292a05a622SIvan Khoronzhuk HOST_PORT_NUM, ALE_VLAN | 15302a05a622SIvan Khoronzhuk ALE_SECURE, slave->port_vlan); 15315e5add17SGrygorii Strashko cpsw_ale_control_set(cpsw->ale, slave_port, 15325e5add17SGrygorii Strashko ALE_PORT_DROP_UNKNOWN_VLAN, 1); 1533d9ba8f9eSMugunthan V N } 1534d9ba8f9eSMugunthan V N 15351e7a2e21SDaniel Mack static void soft_reset_slave(struct cpsw_slave *slave) 1536df828598SMugunthan V N { 1537df828598SMugunthan V N char name[32]; 15381e7a2e21SDaniel Mack 15391e7a2e21SDaniel Mack snprintf(name, sizeof(name), "slave-%d", slave->slave_num); 15401e7a2e21SDaniel Mack soft_reset(name, &slave->sliver->soft_reset); 15411e7a2e21SDaniel Mack } 15421e7a2e21SDaniel Mack 15431e7a2e21SDaniel Mack static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) 15441e7a2e21SDaniel Mack { 1545df828598SMugunthan V N u32 slave_port; 154630c57f07SSekhar Nori struct phy_device *phy; 1547649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1548df828598SMugunthan V N 15491e7a2e21SDaniel Mack soft_reset_slave(slave); 1550df828598SMugunthan V N 1551df828598SMugunthan V N /* setup priority mapping */ 1552dda5f5feSGrygorii Strashko writel_relaxed(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); 15539750a3adSRichard Cochran 15542a05a622SIvan Khoronzhuk switch (cpsw->version) { 15559750a3adSRichard Cochran case CPSW_VERSION_1: 15569750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP); 155748f5bcccSGrygorii Strashko /* Increase RX FIFO size to 5 for supporting fullduplex 155848f5bcccSGrygorii Strashko * flow control mode 155948f5bcccSGrygorii Strashko */ 156048f5bcccSGrygorii Strashko slave_write(slave, 156148f5bcccSGrygorii Strashko (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) | 156248f5bcccSGrygorii Strashko CPSW_MAX_BLKS_RX, CPSW1_MAX_BLKS); 15639750a3adSRichard Cochran break; 15649750a3adSRichard Cochran case CPSW_VERSION_2: 1565c193f365SMugunthan V N case CPSW_VERSION_3: 1566926489beSMugunthan V N case CPSW_VERSION_4: 15679750a3adSRichard Cochran slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP); 156848f5bcccSGrygorii Strashko /* Increase RX FIFO size to 5 for supporting fullduplex 156948f5bcccSGrygorii Strashko * flow control mode 157048f5bcccSGrygorii Strashko */ 157148f5bcccSGrygorii Strashko slave_write(slave, 157248f5bcccSGrygorii Strashko (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) | 157348f5bcccSGrygorii Strashko CPSW_MAX_BLKS_RX, CPSW2_MAX_BLKS); 15749750a3adSRichard Cochran break; 15759750a3adSRichard Cochran } 1576df828598SMugunthan V N 1577df828598SMugunthan V N /* setup max packet size, and mac address */ 1578dda5f5feSGrygorii Strashko writel_relaxed(cpsw->rx_packet_max, &slave->sliver->rx_maxlen); 1579df828598SMugunthan V N cpsw_set_slave_mac(slave, priv); 1580df828598SMugunthan V N 1581df828598SMugunthan V N slave->mac_control = 0; /* no link yet */ 1582df828598SMugunthan V N 15836f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 1584df828598SMugunthan V N 1585606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 1586d9ba8f9eSMugunthan V N cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port); 1587d9ba8f9eSMugunthan V N else 15882a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 1589e11b220fSMugunthan V N 1 << slave_port, 0, 0, ALE_MCAST_FWD_2); 1590df828598SMugunthan V N 1591d733f754SDavid Rivshin if (slave->data->phy_node) { 159230c57f07SSekhar Nori phy = of_phy_connect(priv->ndev, slave->data->phy_node, 15939e42f715SHeiko Schocher &cpsw_adjust_link, 0, slave->data->phy_if); 159430c57f07SSekhar Nori if (!phy) { 1595f7ce9103SRob Herring dev_err(priv->dev, "phy \"%pOF\" not found on slave %d\n", 1596f7ce9103SRob Herring slave->data->phy_node, 1597d733f754SDavid Rivshin slave->slave_num); 1598d733f754SDavid Rivshin return; 1599d733f754SDavid Rivshin } 1600d733f754SDavid Rivshin } else { 160130c57f07SSekhar Nori phy = phy_connect(priv->ndev, slave->data->phy_id, 1602f9a8f83bSFlorian Fainelli &cpsw_adjust_link, slave->data->phy_if); 160330c57f07SSekhar Nori if (IS_ERR(phy)) { 1604d733f754SDavid Rivshin dev_err(priv->dev, 1605d733f754SDavid Rivshin "phy \"%s\" not found on slave %d, err %ld\n", 1606d733f754SDavid Rivshin slave->data->phy_id, slave->slave_num, 160730c57f07SSekhar Nori PTR_ERR(phy)); 1608d733f754SDavid Rivshin return; 1609d733f754SDavid Rivshin } 1610d733f754SDavid Rivshin } 1611d733f754SDavid Rivshin 161230c57f07SSekhar Nori slave->phy = phy; 161330c57f07SSekhar Nori 16142220943aSAndrew Lunn phy_attached_info(slave->phy); 16152220943aSAndrew Lunn 1616df828598SMugunthan V N phy_start(slave->phy); 1617388367a5SMugunthan V N 1618388367a5SMugunthan V N /* Configure GMII_SEL register */ 161956e31bd8SIvan Khoronzhuk cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num); 1620df828598SMugunthan V N } 1621df828598SMugunthan V N 16223b72c2feSMugunthan V N static inline void cpsw_add_default_vlan(struct cpsw_priv *priv) 16233b72c2feSMugunthan V N { 1624606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 1625606f3993SIvan Khoronzhuk const int vlan = cpsw->data.default_vlan; 16263b72c2feSMugunthan V N u32 reg; 16273b72c2feSMugunthan V N int i; 16281e5c4bc4SLennart Sorensen int unreg_mcast_mask; 16293b72c2feSMugunthan V N 16302a05a622SIvan Khoronzhuk reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN : 16313b72c2feSMugunthan V N CPSW2_PORT_VLAN; 16323b72c2feSMugunthan V N 16335d8d0d4dSIvan Khoronzhuk writel(vlan, &cpsw->host_port_regs->port_vlan); 16343b72c2feSMugunthan V N 1635606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) 1636606f3993SIvan Khoronzhuk slave_write(cpsw->slaves + i, vlan, reg); 16373b72c2feSMugunthan V N 16381e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 16391e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 16401e5c4bc4SLennart Sorensen else 16411e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 16421e5c4bc4SLennart Sorensen 16432a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS, 164461f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 164561f1cef9SGrygorii Strashko unreg_mcast_mask); 16463b72c2feSMugunthan V N } 16473b72c2feSMugunthan V N 1648df828598SMugunthan V N static void cpsw_init_host_port(struct cpsw_priv *priv) 1649df828598SMugunthan V N { 1650d9ba8f9eSMugunthan V N u32 fifo_mode; 16515d8d0d4dSIvan Khoronzhuk u32 control_reg; 16525d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16533b72c2feSMugunthan V N 1654df828598SMugunthan V N /* soft reset the controller and initialize ale */ 16555d8d0d4dSIvan Khoronzhuk soft_reset("cpsw", &cpsw->regs->soft_reset); 16562a05a622SIvan Khoronzhuk cpsw_ale_start(cpsw->ale); 1657df828598SMugunthan V N 1658df828598SMugunthan V N /* switch to vlan unaware mode */ 16592a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 16603b72c2feSMugunthan V N CPSW_ALE_VLAN_AWARE); 16615d8d0d4dSIvan Khoronzhuk control_reg = readl(&cpsw->regs->control); 1662a3a41d2fSGrygorii Strashko control_reg |= CPSW_VLAN_AWARE | CPSW_RX_VLAN_ENCAP; 16635d8d0d4dSIvan Khoronzhuk writel(control_reg, &cpsw->regs->control); 1664606f3993SIvan Khoronzhuk fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE : 1665d9ba8f9eSMugunthan V N CPSW_FIFO_NORMAL_MODE; 16665d8d0d4dSIvan Khoronzhuk writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl); 1667df828598SMugunthan V N 1668df828598SMugunthan V N /* setup host port priority mapping */ 1669dda5f5feSGrygorii Strashko writel_relaxed(CPDMA_TX_PRIORITY_MAP, 16705d8d0d4dSIvan Khoronzhuk &cpsw->host_port_regs->cpdma_tx_pri_map); 1671dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->host_port_regs->cpdma_rx_chan_map); 1672df828598SMugunthan V N 16732a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, 1674df828598SMugunthan V N ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 1675df828598SMugunthan V N 1676606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) { 16772a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 1678d9ba8f9eSMugunthan V N 0, 0); 16792a05a622SIvan Khoronzhuk cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 168071a2cbb7SGrygorii Strashko ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2); 1681df828598SMugunthan V N } 1682d9ba8f9eSMugunthan V N } 1683df828598SMugunthan V N 16843802dce1SIvan Khoronzhuk static int cpsw_fill_rx_channels(struct cpsw_priv *priv) 16853802dce1SIvan Khoronzhuk { 16863802dce1SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 16873802dce1SIvan Khoronzhuk struct sk_buff *skb; 16883802dce1SIvan Khoronzhuk int ch_buf_num; 1689e05107e6SIvan Khoronzhuk int ch, i, ret; 16903802dce1SIvan Khoronzhuk 1691e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->rx_ch_num; ch++) { 16928feb0a19SIvan Khoronzhuk ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch); 16933802dce1SIvan Khoronzhuk for (i = 0; i < ch_buf_num; i++) { 16943802dce1SIvan Khoronzhuk skb = __netdev_alloc_skb_ip_align(priv->ndev, 16953802dce1SIvan Khoronzhuk cpsw->rx_packet_max, 16963802dce1SIvan Khoronzhuk GFP_KERNEL); 16973802dce1SIvan Khoronzhuk if (!skb) { 16983802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, "cannot allocate skb\n"); 16993802dce1SIvan Khoronzhuk return -ENOMEM; 17003802dce1SIvan Khoronzhuk } 17013802dce1SIvan Khoronzhuk 1702e05107e6SIvan Khoronzhuk skb_set_queue_mapping(skb, ch); 17038feb0a19SIvan Khoronzhuk ret = cpdma_chan_submit(cpsw->rxv[ch].ch, skb, 17048feb0a19SIvan Khoronzhuk skb->data, skb_tailroom(skb), 17058feb0a19SIvan Khoronzhuk 0); 17063802dce1SIvan Khoronzhuk if (ret < 0) { 17073802dce1SIvan Khoronzhuk cpsw_err(priv, ifup, 1708e05107e6SIvan Khoronzhuk "cannot submit skb to channel %d rx, error %d\n", 1709e05107e6SIvan Khoronzhuk ch, ret); 17103802dce1SIvan Khoronzhuk kfree_skb(skb); 17113802dce1SIvan Khoronzhuk return ret; 17123802dce1SIvan Khoronzhuk } 17133802dce1SIvan Khoronzhuk kmemleak_not_leak(skb); 17143802dce1SIvan Khoronzhuk } 17153802dce1SIvan Khoronzhuk 1716e05107e6SIvan Khoronzhuk cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n", 1717e05107e6SIvan Khoronzhuk ch, ch_buf_num); 1718e05107e6SIvan Khoronzhuk } 17193802dce1SIvan Khoronzhuk 1720e05107e6SIvan Khoronzhuk return 0; 17213802dce1SIvan Khoronzhuk } 17223802dce1SIvan Khoronzhuk 17232a05a622SIvan Khoronzhuk static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw) 1724aacebbf8SSebastian Siewior { 17253995d265SSchuyler Patton u32 slave_port; 17263995d265SSchuyler Patton 17276f1f5836SIvan Khoronzhuk slave_port = cpsw_get_slave_port(slave->slave_num); 17283995d265SSchuyler Patton 1729aacebbf8SSebastian Siewior if (!slave->phy) 1730aacebbf8SSebastian Siewior return; 1731aacebbf8SSebastian Siewior phy_stop(slave->phy); 1732aacebbf8SSebastian Siewior phy_disconnect(slave->phy); 1733aacebbf8SSebastian Siewior slave->phy = NULL; 17342a05a622SIvan Khoronzhuk cpsw_ale_control_set(cpsw->ale, slave_port, 17353995d265SSchuyler Patton ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 17361f95ba00SGrygorii Strashko soft_reset_slave(slave); 1737aacebbf8SSebastian Siewior } 1738aacebbf8SSebastian Siewior 17397929a668SIvan Khoronzhuk static int cpsw_tc_to_fifo(int tc, int num_tc) 17407929a668SIvan Khoronzhuk { 17417929a668SIvan Khoronzhuk if (tc == num_tc - 1) 17427929a668SIvan Khoronzhuk return 0; 17437929a668SIvan Khoronzhuk 17447929a668SIvan Khoronzhuk return CPSW_FIFO_SHAPERS_NUM - tc; 17457929a668SIvan Khoronzhuk } 17467929a668SIvan Khoronzhuk 174757d90148SIvan Khoronzhuk static int cpsw_set_fifo_bw(struct cpsw_priv *priv, int fifo, int bw) 174857d90148SIvan Khoronzhuk { 174957d90148SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 175057d90148SIvan Khoronzhuk u32 val = 0, send_pct, shift; 175157d90148SIvan Khoronzhuk struct cpsw_slave *slave; 175257d90148SIvan Khoronzhuk int pct = 0, i; 175357d90148SIvan Khoronzhuk 175457d90148SIvan Khoronzhuk if (bw > priv->shp_cfg_speed * 1000) 175557d90148SIvan Khoronzhuk goto err; 175657d90148SIvan Khoronzhuk 175757d90148SIvan Khoronzhuk /* shaping has to stay enabled for highest fifos linearly 175857d90148SIvan Khoronzhuk * and fifo bw no more then interface can allow 175957d90148SIvan Khoronzhuk */ 176057d90148SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 176157d90148SIvan Khoronzhuk send_pct = slave_read(slave, SEND_PERCENT); 176257d90148SIvan Khoronzhuk for (i = CPSW_FIFO_SHAPERS_NUM; i > 0; i--) { 176357d90148SIvan Khoronzhuk if (!bw) { 176457d90148SIvan Khoronzhuk if (i >= fifo || !priv->fifo_bw[i]) 176557d90148SIvan Khoronzhuk continue; 176657d90148SIvan Khoronzhuk 176757d90148SIvan Khoronzhuk dev_warn(priv->dev, "Prev FIFO%d is shaped", i); 176857d90148SIvan Khoronzhuk continue; 176957d90148SIvan Khoronzhuk } 177057d90148SIvan Khoronzhuk 177157d90148SIvan Khoronzhuk if (!priv->fifo_bw[i] && i > fifo) { 177257d90148SIvan Khoronzhuk dev_err(priv->dev, "Upper FIFO%d is not shaped", i); 177357d90148SIvan Khoronzhuk return -EINVAL; 177457d90148SIvan Khoronzhuk } 177557d90148SIvan Khoronzhuk 177657d90148SIvan Khoronzhuk shift = (i - 1) * 8; 177757d90148SIvan Khoronzhuk if (i == fifo) { 177857d90148SIvan Khoronzhuk send_pct &= ~(CPSW_PCT_MASK << shift); 177957d90148SIvan Khoronzhuk val = DIV_ROUND_UP(bw, priv->shp_cfg_speed * 10); 178057d90148SIvan Khoronzhuk if (!val) 178157d90148SIvan Khoronzhuk val = 1; 178257d90148SIvan Khoronzhuk 178357d90148SIvan Khoronzhuk send_pct |= val << shift; 178457d90148SIvan Khoronzhuk pct += val; 178557d90148SIvan Khoronzhuk continue; 178657d90148SIvan Khoronzhuk } 178757d90148SIvan Khoronzhuk 178857d90148SIvan Khoronzhuk if (priv->fifo_bw[i]) 178957d90148SIvan Khoronzhuk pct += (send_pct >> shift) & CPSW_PCT_MASK; 179057d90148SIvan Khoronzhuk } 179157d90148SIvan Khoronzhuk 179257d90148SIvan Khoronzhuk if (pct >= 100) 179357d90148SIvan Khoronzhuk goto err; 179457d90148SIvan Khoronzhuk 179557d90148SIvan Khoronzhuk slave_write(slave, send_pct, SEND_PERCENT); 179657d90148SIvan Khoronzhuk priv->fifo_bw[fifo] = bw; 179757d90148SIvan Khoronzhuk 179857d90148SIvan Khoronzhuk dev_warn(priv->dev, "set FIFO%d bw = %d\n", fifo, 179957d90148SIvan Khoronzhuk DIV_ROUND_CLOSEST(val * priv->shp_cfg_speed, 100)); 180057d90148SIvan Khoronzhuk 180157d90148SIvan Khoronzhuk return 0; 180257d90148SIvan Khoronzhuk err: 180357d90148SIvan Khoronzhuk dev_err(priv->dev, "Bandwidth doesn't fit in tc configuration"); 180457d90148SIvan Khoronzhuk return -EINVAL; 180557d90148SIvan Khoronzhuk } 180657d90148SIvan Khoronzhuk 180757d90148SIvan Khoronzhuk static int cpsw_set_fifo_rlimit(struct cpsw_priv *priv, int fifo, int bw) 180857d90148SIvan Khoronzhuk { 180957d90148SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 181057d90148SIvan Khoronzhuk struct cpsw_slave *slave; 181157d90148SIvan Khoronzhuk u32 tx_in_ctl_rg, val; 181257d90148SIvan Khoronzhuk int ret; 181357d90148SIvan Khoronzhuk 181457d90148SIvan Khoronzhuk ret = cpsw_set_fifo_bw(priv, fifo, bw); 181557d90148SIvan Khoronzhuk if (ret) 181657d90148SIvan Khoronzhuk return ret; 181757d90148SIvan Khoronzhuk 181857d90148SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 181957d90148SIvan Khoronzhuk tx_in_ctl_rg = cpsw->version == CPSW_VERSION_1 ? 182057d90148SIvan Khoronzhuk CPSW1_TX_IN_CTL : CPSW2_TX_IN_CTL; 182157d90148SIvan Khoronzhuk 182257d90148SIvan Khoronzhuk if (!bw) 182357d90148SIvan Khoronzhuk cpsw_fifo_shp_on(priv, fifo, bw); 182457d90148SIvan Khoronzhuk 182557d90148SIvan Khoronzhuk val = slave_read(slave, tx_in_ctl_rg); 182657d90148SIvan Khoronzhuk if (cpsw_shp_is_off(priv)) { 182757d90148SIvan Khoronzhuk /* disable FIFOs rate limited queues */ 182857d90148SIvan Khoronzhuk val &= ~(0xf << CPSW_FIFO_RATE_EN_SHIFT); 182957d90148SIvan Khoronzhuk 183057d90148SIvan Khoronzhuk /* set type of FIFO queues to normal priority mode */ 183157d90148SIvan Khoronzhuk val &= ~(3 << CPSW_FIFO_QUEUE_TYPE_SHIFT); 183257d90148SIvan Khoronzhuk 183357d90148SIvan Khoronzhuk /* set type of FIFO queues to be rate limited */ 183457d90148SIvan Khoronzhuk if (bw) 183557d90148SIvan Khoronzhuk val |= 2 << CPSW_FIFO_QUEUE_TYPE_SHIFT; 183657d90148SIvan Khoronzhuk else 183757d90148SIvan Khoronzhuk priv->shp_cfg_speed = 0; 183857d90148SIvan Khoronzhuk } 183957d90148SIvan Khoronzhuk 184057d90148SIvan Khoronzhuk /* toggle a FIFO rate limited queue */ 184157d90148SIvan Khoronzhuk if (bw) 184257d90148SIvan Khoronzhuk val |= BIT(fifo + CPSW_FIFO_RATE_EN_SHIFT); 184357d90148SIvan Khoronzhuk else 184457d90148SIvan Khoronzhuk val &= ~BIT(fifo + CPSW_FIFO_RATE_EN_SHIFT); 184557d90148SIvan Khoronzhuk slave_write(slave, val, tx_in_ctl_rg); 184657d90148SIvan Khoronzhuk 184757d90148SIvan Khoronzhuk /* FIFO transmit shape enable */ 184857d90148SIvan Khoronzhuk cpsw_fifo_shp_on(priv, fifo, bw); 184957d90148SIvan Khoronzhuk return 0; 185057d90148SIvan Khoronzhuk } 185157d90148SIvan Khoronzhuk 185257d90148SIvan Khoronzhuk /* Defaults: 185357d90148SIvan Khoronzhuk * class A - prio 3 185457d90148SIvan Khoronzhuk * class B - prio 2 185557d90148SIvan Khoronzhuk * shaping for class A should be set first 185657d90148SIvan Khoronzhuk */ 185757d90148SIvan Khoronzhuk static int cpsw_set_cbs(struct net_device *ndev, 185857d90148SIvan Khoronzhuk struct tc_cbs_qopt_offload *qopt) 185957d90148SIvan Khoronzhuk { 186057d90148SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 186157d90148SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 186257d90148SIvan Khoronzhuk struct cpsw_slave *slave; 186357d90148SIvan Khoronzhuk int prev_speed = 0; 186457d90148SIvan Khoronzhuk int tc, ret, fifo; 186557d90148SIvan Khoronzhuk u32 bw = 0; 186657d90148SIvan Khoronzhuk 186757d90148SIvan Khoronzhuk tc = netdev_txq_to_tc(priv->ndev, qopt->queue); 186857d90148SIvan Khoronzhuk 186957d90148SIvan Khoronzhuk /* enable channels in backward order, as highest FIFOs must be rate 187057d90148SIvan Khoronzhuk * limited first and for compliance with CPDMA rate limited channels 187157d90148SIvan Khoronzhuk * that also used in bacward order. FIFO0 cannot be rate limited. 187257d90148SIvan Khoronzhuk */ 187357d90148SIvan Khoronzhuk fifo = cpsw_tc_to_fifo(tc, ndev->num_tc); 187457d90148SIvan Khoronzhuk if (!fifo) { 187557d90148SIvan Khoronzhuk dev_err(priv->dev, "Last tc%d can't be rate limited", tc); 187657d90148SIvan Khoronzhuk return -EINVAL; 187757d90148SIvan Khoronzhuk } 187857d90148SIvan Khoronzhuk 187957d90148SIvan Khoronzhuk /* do nothing, it's disabled anyway */ 188057d90148SIvan Khoronzhuk if (!qopt->enable && !priv->fifo_bw[fifo]) 188157d90148SIvan Khoronzhuk return 0; 188257d90148SIvan Khoronzhuk 188357d90148SIvan Khoronzhuk /* shapers can be set if link speed is known */ 188457d90148SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 188557d90148SIvan Khoronzhuk if (slave->phy && slave->phy->link) { 188657d90148SIvan Khoronzhuk if (priv->shp_cfg_speed && 188757d90148SIvan Khoronzhuk priv->shp_cfg_speed != slave->phy->speed) 188857d90148SIvan Khoronzhuk prev_speed = priv->shp_cfg_speed; 188957d90148SIvan Khoronzhuk 189057d90148SIvan Khoronzhuk priv->shp_cfg_speed = slave->phy->speed; 189157d90148SIvan Khoronzhuk } 189257d90148SIvan Khoronzhuk 189357d90148SIvan Khoronzhuk if (!priv->shp_cfg_speed) { 189457d90148SIvan Khoronzhuk dev_err(priv->dev, "Link speed is not known"); 189557d90148SIvan Khoronzhuk return -1; 189657d90148SIvan Khoronzhuk } 189757d90148SIvan Khoronzhuk 189857d90148SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 189957d90148SIvan Khoronzhuk if (ret < 0) { 190057d90148SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 190157d90148SIvan Khoronzhuk return ret; 190257d90148SIvan Khoronzhuk } 190357d90148SIvan Khoronzhuk 190457d90148SIvan Khoronzhuk bw = qopt->enable ? qopt->idleslope : 0; 190557d90148SIvan Khoronzhuk ret = cpsw_set_fifo_rlimit(priv, fifo, bw); 190657d90148SIvan Khoronzhuk if (ret) { 190757d90148SIvan Khoronzhuk priv->shp_cfg_speed = prev_speed; 190857d90148SIvan Khoronzhuk prev_speed = 0; 190957d90148SIvan Khoronzhuk } 191057d90148SIvan Khoronzhuk 191157d90148SIvan Khoronzhuk if (bw && prev_speed) 191257d90148SIvan Khoronzhuk dev_warn(priv->dev, 191357d90148SIvan Khoronzhuk "Speed was changed, CBS shaper speeds are changed!"); 191457d90148SIvan Khoronzhuk 191557d90148SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 191657d90148SIvan Khoronzhuk return ret; 191757d90148SIvan Khoronzhuk } 191857d90148SIvan Khoronzhuk 19194b4255edSIvan Khoronzhuk static void cpsw_cbs_resume(struct cpsw_slave *slave, struct cpsw_priv *priv) 19204b4255edSIvan Khoronzhuk { 19214b4255edSIvan Khoronzhuk int fifo, bw; 19224b4255edSIvan Khoronzhuk 19234b4255edSIvan Khoronzhuk for (fifo = CPSW_FIFO_SHAPERS_NUM; fifo > 0; fifo--) { 19244b4255edSIvan Khoronzhuk bw = priv->fifo_bw[fifo]; 19254b4255edSIvan Khoronzhuk if (!bw) 19264b4255edSIvan Khoronzhuk continue; 19274b4255edSIvan Khoronzhuk 19284b4255edSIvan Khoronzhuk cpsw_set_fifo_rlimit(priv, fifo, bw); 19294b4255edSIvan Khoronzhuk } 19304b4255edSIvan Khoronzhuk } 19314b4255edSIvan Khoronzhuk 19324b4255edSIvan Khoronzhuk static void cpsw_mqprio_resume(struct cpsw_slave *slave, struct cpsw_priv *priv) 19334b4255edSIvan Khoronzhuk { 19344b4255edSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19354b4255edSIvan Khoronzhuk u32 tx_prio_map = 0; 19364b4255edSIvan Khoronzhuk int i, tc, fifo; 19374b4255edSIvan Khoronzhuk u32 tx_prio_rg; 19384b4255edSIvan Khoronzhuk 19394b4255edSIvan Khoronzhuk if (!priv->mqprio_hw) 19404b4255edSIvan Khoronzhuk return; 19414b4255edSIvan Khoronzhuk 19424b4255edSIvan Khoronzhuk for (i = 0; i < 8; i++) { 19434b4255edSIvan Khoronzhuk tc = netdev_get_prio_tc_map(priv->ndev, i); 19444b4255edSIvan Khoronzhuk fifo = CPSW_FIFO_SHAPERS_NUM - tc; 19454b4255edSIvan Khoronzhuk tx_prio_map |= fifo << (4 * i); 19464b4255edSIvan Khoronzhuk } 19474b4255edSIvan Khoronzhuk 19484b4255edSIvan Khoronzhuk tx_prio_rg = cpsw->version == CPSW_VERSION_1 ? 19494b4255edSIvan Khoronzhuk CPSW1_TX_PRI_MAP : CPSW2_TX_PRI_MAP; 19504b4255edSIvan Khoronzhuk 19514b4255edSIvan Khoronzhuk slave_write(slave, tx_prio_map, tx_prio_rg); 19524b4255edSIvan Khoronzhuk } 19534b4255edSIvan Khoronzhuk 19544b4255edSIvan Khoronzhuk /* restore resources after port reset */ 19554b4255edSIvan Khoronzhuk static void cpsw_restore(struct cpsw_priv *priv) 19564b4255edSIvan Khoronzhuk { 19574b4255edSIvan Khoronzhuk /* restore MQPRIO offload */ 19584b4255edSIvan Khoronzhuk for_each_slave(priv, cpsw_mqprio_resume, priv); 19594b4255edSIvan Khoronzhuk 19604b4255edSIvan Khoronzhuk /* restore CBS offload */ 19614b4255edSIvan Khoronzhuk for_each_slave(priv, cpsw_cbs_resume, priv); 19624b4255edSIvan Khoronzhuk } 19634b4255edSIvan Khoronzhuk 1964df828598SMugunthan V N static int cpsw_ndo_open(struct net_device *ndev) 1965df828598SMugunthan V N { 1966df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 1967649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 19683802dce1SIvan Khoronzhuk int ret; 1969df828598SMugunthan V N u32 reg; 1970df828598SMugunthan V N 197156e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 1972108a6537SGrygorii Strashko if (ret < 0) { 197356e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 1974108a6537SGrygorii Strashko return ret; 1975108a6537SGrygorii Strashko } 19763fa88c51SGrygorii Strashko 1977df828598SMugunthan V N netif_carrier_off(ndev); 1978df828598SMugunthan V N 1979e05107e6SIvan Khoronzhuk /* Notify the stack of the actual queue counts. */ 1980e05107e6SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num); 1981e05107e6SIvan Khoronzhuk if (ret) { 1982e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 1983e05107e6SIvan Khoronzhuk goto err_cleanup; 1984e05107e6SIvan Khoronzhuk } 1985e05107e6SIvan Khoronzhuk 1986e05107e6SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num); 1987e05107e6SIvan Khoronzhuk if (ret) { 1988e05107e6SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 1989e05107e6SIvan Khoronzhuk goto err_cleanup; 1990e05107e6SIvan Khoronzhuk } 1991e05107e6SIvan Khoronzhuk 19922a05a622SIvan Khoronzhuk reg = cpsw->version; 1993df828598SMugunthan V N 1994df828598SMugunthan V N dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", 1995df828598SMugunthan V N CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), 1996df828598SMugunthan V N CPSW_RTL_VERSION(reg)); 1997df828598SMugunthan V N 1998d5bc1613SIvan Khoronzhuk /* Initialize host and slave ports */ 1999d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) 2000df828598SMugunthan V N cpsw_init_host_port(priv); 2001df828598SMugunthan V N for_each_slave(priv, cpsw_slave_open, priv); 2002df828598SMugunthan V N 20033b72c2feSMugunthan V N /* Add default VLAN */ 2004606f3993SIvan Khoronzhuk if (!cpsw->data.dual_emac) 20053b72c2feSMugunthan V N cpsw_add_default_vlan(priv); 2006e6afea0bSMugunthan V N else 20072a05a622SIvan Khoronzhuk cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan, 200861f1cef9SGrygorii Strashko ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0); 20093b72c2feSMugunthan V N 2010d5bc1613SIvan Khoronzhuk /* initialize shared resources for every ndev */ 2011d5bc1613SIvan Khoronzhuk if (!cpsw->usage_count) { 2012d9ba8f9eSMugunthan V N /* disable priority elevation */ 2013dda5f5feSGrygorii Strashko writel_relaxed(0, &cpsw->regs->ptype); 2014df828598SMugunthan V N 2015d9ba8f9eSMugunthan V N /* enable statistics collection only on all ports */ 2016dda5f5feSGrygorii Strashko writel_relaxed(0x7, &cpsw->regs->stat_port_en); 2017df828598SMugunthan V N 20181923d6e4SMugunthan V N /* Enable internal fifo flow control */ 20195d8d0d4dSIvan Khoronzhuk writel(0x7, &cpsw->regs->flow_control); 20201923d6e4SMugunthan V N 2021dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_rx); 2022dbc4ec52SIvan Khoronzhuk napi_enable(&cpsw->napi_tx); 2023d354eb85SMugunthan V N 2024e38b5a3dSIvan Khoronzhuk if (cpsw->tx_irq_disabled) { 2025e38b5a3dSIvan Khoronzhuk cpsw->tx_irq_disabled = false; 2026e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[1]); 20277da11600SMugunthan V N } 20287da11600SMugunthan V N 2029e38b5a3dSIvan Khoronzhuk if (cpsw->rx_irq_disabled) { 2030e38b5a3dSIvan Khoronzhuk cpsw->rx_irq_disabled = false; 2031e38b5a3dSIvan Khoronzhuk enable_irq(cpsw->irqs_table[0]); 20327da11600SMugunthan V N } 20337da11600SMugunthan V N 20343802dce1SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 20353802dce1SIvan Khoronzhuk if (ret < 0) 2036aacebbf8SSebastian Siewior goto err_cleanup; 2037f280e89aSMugunthan V N 20388a2c9a5aSGrygorii Strashko if (cpts_register(cpsw->cpts)) 2039f280e89aSMugunthan V N dev_err(priv->dev, "error registering cpts device\n"); 2040f280e89aSMugunthan V N 2041d9ba8f9eSMugunthan V N } 2042df828598SMugunthan V N 20434b4255edSIvan Khoronzhuk cpsw_restore(priv); 20444b4255edSIvan Khoronzhuk 2045ff5b8ef2SMugunthan V N /* Enable Interrupt pacing if configured */ 20462a05a622SIvan Khoronzhuk if (cpsw->coal_intvl != 0) { 2047ff5b8ef2SMugunthan V N struct ethtool_coalesce coal; 2048ff5b8ef2SMugunthan V N 20492a05a622SIvan Khoronzhuk coal.rx_coalesce_usecs = cpsw->coal_intvl; 2050ff5b8ef2SMugunthan V N cpsw_set_coalesce(ndev, &coal); 2051ff5b8ef2SMugunthan V N } 2052ff5b8ef2SMugunthan V N 20532c836bd9SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 20542c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2055d5bc1613SIvan Khoronzhuk cpsw->usage_count++; 2056f63a975eSMugunthan V N 2057df828598SMugunthan V N return 0; 2058df828598SMugunthan V N 2059aacebbf8SSebastian Siewior err_cleanup: 20602c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 20612a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 206256e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 2063aacebbf8SSebastian Siewior netif_carrier_off(priv->ndev); 2064aacebbf8SSebastian Siewior return ret; 2065df828598SMugunthan V N } 2066df828598SMugunthan V N 2067df828598SMugunthan V N static int cpsw_ndo_stop(struct net_device *ndev) 2068df828598SMugunthan V N { 2069df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2070649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2071df828598SMugunthan V N 2072df828598SMugunthan V N cpsw_info(priv, ifdown, "shutting down cpsw device\n"); 207315180ecaSIvan Khoronzhuk __hw_addr_ref_unsync_dev(&ndev->mc, ndev, cpsw_purge_all_mc); 2074e05107e6SIvan Khoronzhuk netif_tx_stop_all_queues(priv->ndev); 2075df828598SMugunthan V N netif_carrier_off(priv->ndev); 2076d9ba8f9eSMugunthan V N 2077d5bc1613SIvan Khoronzhuk if (cpsw->usage_count <= 1) { 2078dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_rx); 2079dbc4ec52SIvan Khoronzhuk napi_disable(&cpsw->napi_tx); 20802a05a622SIvan Khoronzhuk cpts_unregister(cpsw->cpts); 20812c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 20822c836bd9SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 20832a05a622SIvan Khoronzhuk cpsw_ale_stop(cpsw->ale); 2084d9ba8f9eSMugunthan V N } 20852a05a622SIvan Khoronzhuk for_each_slave(priv, cpsw_slave_stop, cpsw); 20860be01b8eSIvan Khoronzhuk 20870be01b8eSIvan Khoronzhuk if (cpsw_need_resplit(cpsw)) 20880be01b8eSIvan Khoronzhuk cpsw_split_res(ndev); 20890be01b8eSIvan Khoronzhuk 2090d5bc1613SIvan Khoronzhuk cpsw->usage_count--; 209156e31bd8SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 2092df828598SMugunthan V N return 0; 2093df828598SMugunthan V N } 2094df828598SMugunthan V N 2095df828598SMugunthan V N static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, 2096df828598SMugunthan V N struct net_device *ndev) 2097df828598SMugunthan V N { 2098df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 20992c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2100f44f8417SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 2101e05107e6SIvan Khoronzhuk struct netdev_queue *txq; 2102e05107e6SIvan Khoronzhuk struct cpdma_chan *txch; 2103e05107e6SIvan Khoronzhuk int ret, q_idx; 2104df828598SMugunthan V N 2105df828598SMugunthan V N if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { 2106df828598SMugunthan V N cpsw_err(priv, tx_err, "packet pad failed\n"); 21078dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 21081bf96050SIvan Khoronzhuk return NET_XMIT_DROP; 2109df828598SMugunthan V N } 2110df828598SMugunthan V N 21119232b16dSMugunthan V N if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 2112f44f8417SIvan Khoronzhuk cpts_is_tx_enabled(cpts) && cpts_can_timestamp(cpts, skb)) 21132e5b38abSRichard Cochran skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 21142e5b38abSRichard Cochran 2115e05107e6SIvan Khoronzhuk q_idx = skb_get_queue_mapping(skb); 2116e05107e6SIvan Khoronzhuk if (q_idx >= cpsw->tx_ch_num) 2117e05107e6SIvan Khoronzhuk q_idx = q_idx % cpsw->tx_ch_num; 2118e05107e6SIvan Khoronzhuk 21198feb0a19SIvan Khoronzhuk txch = cpsw->txv[q_idx].ch; 212062f94c21SGrygorii Strashko txq = netdev_get_tx_queue(ndev, q_idx); 2121e05107e6SIvan Khoronzhuk ret = cpsw_tx_packet_submit(priv, skb, txch); 2122df828598SMugunthan V N if (unlikely(ret != 0)) { 2123df828598SMugunthan V N cpsw_err(priv, tx_err, "desc submit failed\n"); 2124df828598SMugunthan V N goto fail; 2125df828598SMugunthan V N } 2126df828598SMugunthan V N 2127fae50823SMugunthan V N /* If there is no more tx desc left free then we need to 2128fae50823SMugunthan V N * tell the kernel to stop sending us tx frames. 2129fae50823SMugunthan V N */ 2130e05107e6SIvan Khoronzhuk if (unlikely(!cpdma_check_free_tx_desc(txch))) { 2131e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 213262f94c21SGrygorii Strashko 213362f94c21SGrygorii Strashko /* Barrier, so that stop_queue visible to other cpus */ 213462f94c21SGrygorii Strashko smp_mb__after_atomic(); 213562f94c21SGrygorii Strashko 213662f94c21SGrygorii Strashko if (cpdma_check_free_tx_desc(txch)) 213762f94c21SGrygorii Strashko netif_tx_wake_queue(txq); 2138e05107e6SIvan Khoronzhuk } 2139fae50823SMugunthan V N 2140df828598SMugunthan V N return NETDEV_TX_OK; 2141df828598SMugunthan V N fail: 21428dc43ddcSTobias Klauser ndev->stats.tx_dropped++; 2143e05107e6SIvan Khoronzhuk netif_tx_stop_queue(txq); 214462f94c21SGrygorii Strashko 214562f94c21SGrygorii Strashko /* Barrier, so that stop_queue visible to other cpus */ 214662f94c21SGrygorii Strashko smp_mb__after_atomic(); 214762f94c21SGrygorii Strashko 214862f94c21SGrygorii Strashko if (cpdma_check_free_tx_desc(txch)) 214962f94c21SGrygorii Strashko netif_tx_wake_queue(txq); 215062f94c21SGrygorii Strashko 2151df828598SMugunthan V N return NETDEV_TX_BUSY; 2152df828598SMugunthan V N } 2153df828598SMugunthan V N 2154c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 21552e5b38abSRichard Cochran 21562a05a622SIvan Khoronzhuk static void cpsw_hwtstamp_v1(struct cpsw_common *cpsw) 21572e5b38abSRichard Cochran { 2158606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave]; 21592e5b38abSRichard Cochran u32 ts_en, seq_id; 21602e5b38abSRichard Cochran 2161b63ba58eSGrygorii Strashko if (!cpts_is_tx_enabled(cpsw->cpts) && 2162b63ba58eSGrygorii Strashko !cpts_is_rx_enabled(cpsw->cpts)) { 21632e5b38abSRichard Cochran slave_write(slave, 0, CPSW1_TS_CTL); 21642e5b38abSRichard Cochran return; 21652e5b38abSRichard Cochran } 21662e5b38abSRichard Cochran 21672e5b38abSRichard Cochran seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588; 21682e5b38abSRichard Cochran ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS; 21692e5b38abSRichard Cochran 2170b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 21712e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_TX_EN; 21722e5b38abSRichard Cochran 2173b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 21742e5b38abSRichard Cochran ts_en |= CPSW_V1_TS_RX_EN; 21752e5b38abSRichard Cochran 21762e5b38abSRichard Cochran slave_write(slave, ts_en, CPSW1_TS_CTL); 21772e5b38abSRichard Cochran slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE); 21782e5b38abSRichard Cochran } 21792e5b38abSRichard Cochran 21802e5b38abSRichard Cochran static void cpsw_hwtstamp_v2(struct cpsw_priv *priv) 21812e5b38abSRichard Cochran { 2182d9ba8f9eSMugunthan V N struct cpsw_slave *slave; 21835d8d0d4dSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 21842e5b38abSRichard Cochran u32 ctrl, mtype; 21852e5b38abSRichard Cochran 2186cb7d78d0SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 2187d9ba8f9eSMugunthan V N 21882e5b38abSRichard Cochran ctrl = slave_read(slave, CPSW2_CONTROL); 21892a05a622SIvan Khoronzhuk switch (cpsw->version) { 219009c55372SGeorge Cherian case CPSW_VERSION_2: 219109c55372SGeorge Cherian ctrl &= ~CTRL_V2_ALL_TS_MASK; 21922e5b38abSRichard Cochran 2193b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 219409c55372SGeorge Cherian ctrl |= CTRL_V2_TX_TS_BITS; 21952e5b38abSRichard Cochran 2196b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 219709c55372SGeorge Cherian ctrl |= CTRL_V2_RX_TS_BITS; 219809c55372SGeorge Cherian break; 219909c55372SGeorge Cherian case CPSW_VERSION_3: 220009c55372SGeorge Cherian default: 220109c55372SGeorge Cherian ctrl &= ~CTRL_V3_ALL_TS_MASK; 220209c55372SGeorge Cherian 2203b63ba58eSGrygorii Strashko if (cpts_is_tx_enabled(cpsw->cpts)) 220409c55372SGeorge Cherian ctrl |= CTRL_V3_TX_TS_BITS; 220509c55372SGeorge Cherian 2206b63ba58eSGrygorii Strashko if (cpts_is_rx_enabled(cpsw->cpts)) 220709c55372SGeorge Cherian ctrl |= CTRL_V3_RX_TS_BITS; 220809c55372SGeorge Cherian break; 220909c55372SGeorge Cherian } 22102e5b38abSRichard Cochran 22112e5b38abSRichard Cochran mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS; 22122e5b38abSRichard Cochran 22132e5b38abSRichard Cochran slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE); 22142e5b38abSRichard Cochran slave_write(slave, ctrl, CPSW2_CONTROL); 2215dda5f5feSGrygorii Strashko writel_relaxed(ETH_P_1588, &cpsw->regs->ts_ltype); 22162e5b38abSRichard Cochran } 22172e5b38abSRichard Cochran 2218a5b4145bSBen Hutchings static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 22192e5b38abSRichard Cochran { 22203177bf6fSMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 22212e5b38abSRichard Cochran struct hwtstamp_config cfg; 22222a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 22232a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 22242e5b38abSRichard Cochran 22252a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 22262a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 22272a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 22282ee91e54SBen Hutchings return -EOPNOTSUPP; 22292ee91e54SBen Hutchings 22302e5b38abSRichard Cochran if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 22312e5b38abSRichard Cochran return -EFAULT; 22322e5b38abSRichard Cochran 22332e5b38abSRichard Cochran /* reserved for future extensions */ 22342e5b38abSRichard Cochran if (cfg.flags) 22352e5b38abSRichard Cochran return -EINVAL; 22362e5b38abSRichard Cochran 22372ee91e54SBen Hutchings if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON) 22382e5b38abSRichard Cochran return -ERANGE; 22392e5b38abSRichard Cochran 22402e5b38abSRichard Cochran switch (cfg.rx_filter) { 22412e5b38abSRichard Cochran case HWTSTAMP_FILTER_NONE: 2242b63ba58eSGrygorii Strashko cpts_rx_enable(cpts, 0); 22432e5b38abSRichard Cochran break; 22442e5b38abSRichard Cochran case HWTSTAMP_FILTER_ALL: 2245e9523a5aSGrygorii Strashko case HWTSTAMP_FILTER_NTP_ALL: 2246e9523a5aSGrygorii Strashko return -ERANGE; 22472e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 22482e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 22492e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2250e9523a5aSGrygorii Strashko cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V1_L4_EVENT); 2251e9523a5aSGrygorii Strashko cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; 2252e9523a5aSGrygorii Strashko break; 22532e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 22542e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 22552e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 22562e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 22572e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 22582e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 22592e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_EVENT: 22602e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_SYNC: 22612e5b38abSRichard Cochran case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2262e9523a5aSGrygorii Strashko cpts_rx_enable(cpts, HWTSTAMP_FILTER_PTP_V2_EVENT); 22632e5b38abSRichard Cochran cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 22642e5b38abSRichard Cochran break; 22652e5b38abSRichard Cochran default: 22662e5b38abSRichard Cochran return -ERANGE; 22672e5b38abSRichard Cochran } 22682e5b38abSRichard Cochran 2269b63ba58eSGrygorii Strashko cpts_tx_enable(cpts, cfg.tx_type == HWTSTAMP_TX_ON); 22702ee91e54SBen Hutchings 22712a05a622SIvan Khoronzhuk switch (cpsw->version) { 22722e5b38abSRichard Cochran case CPSW_VERSION_1: 22732a05a622SIvan Khoronzhuk cpsw_hwtstamp_v1(cpsw); 22742e5b38abSRichard Cochran break; 22752e5b38abSRichard Cochran case CPSW_VERSION_2: 2276f7d403cbSGeorge Cherian case CPSW_VERSION_3: 22772e5b38abSRichard Cochran cpsw_hwtstamp_v2(priv); 22782e5b38abSRichard Cochran break; 22792e5b38abSRichard Cochran default: 22802ee91e54SBen Hutchings WARN_ON(1); 22812e5b38abSRichard Cochran } 22822e5b38abSRichard Cochran 22832e5b38abSRichard Cochran return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 22842e5b38abSRichard Cochran } 22852e5b38abSRichard Cochran 2286a5b4145bSBen Hutchings static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2287a5b4145bSBen Hutchings { 22882a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(dev); 22892a05a622SIvan Khoronzhuk struct cpts *cpts = cpsw->cpts; 2290a5b4145bSBen Hutchings struct hwtstamp_config cfg; 2291a5b4145bSBen Hutchings 22922a05a622SIvan Khoronzhuk if (cpsw->version != CPSW_VERSION_1 && 22932a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_2 && 22942a05a622SIvan Khoronzhuk cpsw->version != CPSW_VERSION_3) 2295a5b4145bSBen Hutchings return -EOPNOTSUPP; 2296a5b4145bSBen Hutchings 2297a5b4145bSBen Hutchings cfg.flags = 0; 2298b63ba58eSGrygorii Strashko cfg.tx_type = cpts_is_tx_enabled(cpts) ? 2299b63ba58eSGrygorii Strashko HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; 2300b63ba58eSGrygorii Strashko cfg.rx_filter = (cpts_is_rx_enabled(cpts) ? 2301e9523a5aSGrygorii Strashko cpts->rx_enable : HWTSTAMP_FILTER_NONE); 2302a5b4145bSBen Hutchings 2303a5b4145bSBen Hutchings return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 2304a5b4145bSBen Hutchings } 2305c8395d4eSGrygorii Strashko #else 2306c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) 2307c8395d4eSGrygorii Strashko { 2308c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 2309c8395d4eSGrygorii Strashko } 2310a5b4145bSBen Hutchings 2311c8395d4eSGrygorii Strashko static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) 2312c8395d4eSGrygorii Strashko { 2313c8395d4eSGrygorii Strashko return -EOPNOTSUPP; 2314c8395d4eSGrygorii Strashko } 23152e5b38abSRichard Cochran #endif /*CONFIG_TI_CPTS*/ 23162e5b38abSRichard Cochran 23172e5b38abSRichard Cochran static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd) 23182e5b38abSRichard Cochran { 231911f2c988SMugunthan V N struct cpsw_priv *priv = netdev_priv(dev); 2320606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2321606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 232211f2c988SMugunthan V N 23232e5b38abSRichard Cochran if (!netif_running(dev)) 23242e5b38abSRichard Cochran return -EINVAL; 23252e5b38abSRichard Cochran 232611f2c988SMugunthan V N switch (cmd) { 232711f2c988SMugunthan V N case SIOCSHWTSTAMP: 2328a5b4145bSBen Hutchings return cpsw_hwtstamp_set(dev, req); 2329a5b4145bSBen Hutchings case SIOCGHWTSTAMP: 2330a5b4145bSBen Hutchings return cpsw_hwtstamp_get(dev, req); 23312e5b38abSRichard Cochran } 23322e5b38abSRichard Cochran 2333606f3993SIvan Khoronzhuk if (!cpsw->slaves[slave_no].phy) 2334c1b59947SStefan Sørensen return -EOPNOTSUPP; 2335606f3993SIvan Khoronzhuk return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd); 233611f2c988SMugunthan V N } 233711f2c988SMugunthan V N 2338df828598SMugunthan V N static void cpsw_ndo_tx_timeout(struct net_device *ndev) 2339df828598SMugunthan V N { 2340df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 23412c836bd9SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2342e05107e6SIvan Khoronzhuk int ch; 2343df828598SMugunthan V N 2344df828598SMugunthan V N cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); 23458dc43ddcSTobias Klauser ndev->stats.tx_errors++; 23462c836bd9SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2347e05107e6SIvan Khoronzhuk for (ch = 0; ch < cpsw->tx_ch_num; ch++) { 23488feb0a19SIvan Khoronzhuk cpdma_chan_stop(cpsw->txv[ch].ch); 23498feb0a19SIvan Khoronzhuk cpdma_chan_start(cpsw->txv[ch].ch); 2350e05107e6SIvan Khoronzhuk } 2351e05107e6SIvan Khoronzhuk 23522c836bd9SIvan Khoronzhuk cpsw_intr_enable(cpsw); 235375514b66SGrygorii Strashko netif_trans_update(ndev); 235475514b66SGrygorii Strashko netif_tx_wake_all_queues(ndev); 2355df828598SMugunthan V N } 2356df828598SMugunthan V N 2357dcfd8d58SMugunthan V N static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p) 2358dcfd8d58SMugunthan V N { 2359dcfd8d58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2360dcfd8d58SMugunthan V N struct sockaddr *addr = (struct sockaddr *)p; 2361649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2362dcfd8d58SMugunthan V N int flags = 0; 2363dcfd8d58SMugunthan V N u16 vid = 0; 2364a6c5d14fSGrygorii Strashko int ret; 2365dcfd8d58SMugunthan V N 2366dcfd8d58SMugunthan V N if (!is_valid_ether_addr(addr->sa_data)) 2367dcfd8d58SMugunthan V N return -EADDRNOTAVAIL; 2368dcfd8d58SMugunthan V N 236956e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 2370a6c5d14fSGrygorii Strashko if (ret < 0) { 237156e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 2372a6c5d14fSGrygorii Strashko return ret; 2373a6c5d14fSGrygorii Strashko } 2374a6c5d14fSGrygorii Strashko 2375606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 2376606f3993SIvan Khoronzhuk vid = cpsw->slaves[priv->emac_port].port_vlan; 2377dcfd8d58SMugunthan V N flags = ALE_VLAN; 2378dcfd8d58SMugunthan V N } 2379dcfd8d58SMugunthan V N 23802a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM, 2381dcfd8d58SMugunthan V N flags, vid); 23822a05a622SIvan Khoronzhuk cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM, 2383dcfd8d58SMugunthan V N flags, vid); 2384dcfd8d58SMugunthan V N 2385dcfd8d58SMugunthan V N memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); 2386dcfd8d58SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 2387dcfd8d58SMugunthan V N for_each_slave(priv, cpsw_set_slave_mac, priv); 2388dcfd8d58SMugunthan V N 238956e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 2390a6c5d14fSGrygorii Strashko 2391dcfd8d58SMugunthan V N return 0; 2392dcfd8d58SMugunthan V N } 2393dcfd8d58SMugunthan V N 2394df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 2395df828598SMugunthan V N static void cpsw_ndo_poll_controller(struct net_device *ndev) 2396df828598SMugunthan V N { 2397dbc4ec52SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2398df828598SMugunthan V N 2399dbc4ec52SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2400dbc4ec52SIvan Khoronzhuk cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw); 2401dbc4ec52SIvan Khoronzhuk cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw); 2402dbc4ec52SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2403df828598SMugunthan V N } 2404df828598SMugunthan V N #endif 2405df828598SMugunthan V N 24063b72c2feSMugunthan V N static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv, 24073b72c2feSMugunthan V N unsigned short vid) 24083b72c2feSMugunthan V N { 24093b72c2feSMugunthan V N int ret; 24109f6bd8faSMugunthan V N int unreg_mcast_mask = 0; 24115b3a5a14SIvan Khoronzhuk int mcast_mask; 24129f6bd8faSMugunthan V N u32 port_mask; 2413606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 24149f6bd8faSMugunthan V N 2415606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 24169f6bd8faSMugunthan V N port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST; 24179f6bd8faSMugunthan V N 24185b3a5a14SIvan Khoronzhuk mcast_mask = ALE_PORT_HOST; 24199f6bd8faSMugunthan V N if (priv->ndev->flags & IFF_ALLMULTI) 24205b3a5a14SIvan Khoronzhuk unreg_mcast_mask = mcast_mask; 24219f6bd8faSMugunthan V N } else { 24229f6bd8faSMugunthan V N port_mask = ALE_ALL_PORTS; 24235b3a5a14SIvan Khoronzhuk mcast_mask = port_mask; 24241e5c4bc4SLennart Sorensen 24251e5c4bc4SLennart Sorensen if (priv->ndev->flags & IFF_ALLMULTI) 24261e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_ALL_PORTS; 24271e5c4bc4SLennart Sorensen else 24281e5c4bc4SLennart Sorensen unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2; 24299f6bd8faSMugunthan V N } 24303b72c2feSMugunthan V N 24312a05a622SIvan Khoronzhuk ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, 243261f1cef9SGrygorii Strashko unreg_mcast_mask); 24333b72c2feSMugunthan V N if (ret != 0) 24343b72c2feSMugunthan V N return ret; 24353b72c2feSMugunthan V N 24362a05a622SIvan Khoronzhuk ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, 243771a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 24383b72c2feSMugunthan V N if (ret != 0) 24393b72c2feSMugunthan V N goto clean_vid; 24403b72c2feSMugunthan V N 24412a05a622SIvan Khoronzhuk ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, 24425b3a5a14SIvan Khoronzhuk mcast_mask, ALE_VLAN, vid, 0); 24433b72c2feSMugunthan V N if (ret != 0) 24443b72c2feSMugunthan V N goto clean_vlan_ucast; 24453b72c2feSMugunthan V N return 0; 24463b72c2feSMugunthan V N 24473b72c2feSMugunthan V N clean_vlan_ucast: 24482a05a622SIvan Khoronzhuk cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 244971a2cbb7SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 24503b72c2feSMugunthan V N clean_vid: 24512a05a622SIvan Khoronzhuk cpsw_ale_del_vlan(cpsw->ale, vid, 0); 24523b72c2feSMugunthan V N return ret; 24533b72c2feSMugunthan V N } 24543b72c2feSMugunthan V N 24553b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, 245680d5c368SPatrick McHardy __be16 proto, u16 vid) 24573b72c2feSMugunthan V N { 24583b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2459649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2460a6c5d14fSGrygorii Strashko int ret; 24613b72c2feSMugunthan V N 2462606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 24633b72c2feSMugunthan V N return 0; 24643b72c2feSMugunthan V N 246556e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 2466a6c5d14fSGrygorii Strashko if (ret < 0) { 246756e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 2468a6c5d14fSGrygorii Strashko return ret; 2469a6c5d14fSGrygorii Strashko } 2470a6c5d14fSGrygorii Strashko 2471606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 247202a54164SMugunthan V N /* In dual EMAC, reserved VLAN id should not be used for 247302a54164SMugunthan V N * creating VLAN interfaces as this can break the dual 247402a54164SMugunthan V N * EMAC port separation 247502a54164SMugunthan V N */ 247602a54164SMugunthan V N int i; 247702a54164SMugunthan V N 2478606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 2479803c4f64SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) { 2480803c4f64SIvan Khoronzhuk ret = -EINVAL; 2481803c4f64SIvan Khoronzhuk goto err; 2482803c4f64SIvan Khoronzhuk } 248302a54164SMugunthan V N } 248402a54164SMugunthan V N } 248502a54164SMugunthan V N 24863b72c2feSMugunthan V N dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid); 2487a6c5d14fSGrygorii Strashko ret = cpsw_add_vlan_ale_entry(priv, vid); 2488803c4f64SIvan Khoronzhuk err: 248956e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 2490a6c5d14fSGrygorii Strashko return ret; 24913b72c2feSMugunthan V N } 24923b72c2feSMugunthan V N 24933b72c2feSMugunthan V N static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev, 249480d5c368SPatrick McHardy __be16 proto, u16 vid) 24953b72c2feSMugunthan V N { 24963b72c2feSMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2497649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 24983b72c2feSMugunthan V N int ret; 24993b72c2feSMugunthan V N 2500606f3993SIvan Khoronzhuk if (vid == cpsw->data.default_vlan) 25013b72c2feSMugunthan V N return 0; 25023b72c2feSMugunthan V N 250356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 2504a6c5d14fSGrygorii Strashko if (ret < 0) { 250556e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 2506a6c5d14fSGrygorii Strashko return ret; 2507a6c5d14fSGrygorii Strashko } 2508a6c5d14fSGrygorii Strashko 2509606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 251002a54164SMugunthan V N int i; 251102a54164SMugunthan V N 2512606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 2513606f3993SIvan Khoronzhuk if (vid == cpsw->slaves[i].port_vlan) 2514803c4f64SIvan Khoronzhuk goto err; 251502a54164SMugunthan V N } 251602a54164SMugunthan V N } 251702a54164SMugunthan V N 25183b72c2feSMugunthan V N dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid); 25192a05a622SIvan Khoronzhuk ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0); 2520be35b982SIvan Khoronzhuk ret |= cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, 252161f1cef9SGrygorii Strashko HOST_PORT_NUM, ALE_VLAN, vid); 2522be35b982SIvan Khoronzhuk ret |= cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast, 25233b72c2feSMugunthan V N 0, ALE_VLAN, vid); 252415180ecaSIvan Khoronzhuk ret |= cpsw_ale_flush_multicast(cpsw->ale, 0, vid); 2525803c4f64SIvan Khoronzhuk err: 252656e31bd8SIvan Khoronzhuk pm_runtime_put(cpsw->dev); 2527a6c5d14fSGrygorii Strashko return ret; 25283b72c2feSMugunthan V N } 25293b72c2feSMugunthan V N 253083fcad0cSIvan Khoronzhuk static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate) 253183fcad0cSIvan Khoronzhuk { 253283fcad0cSIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 253383fcad0cSIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 253452986a2fSIvan Khoronzhuk struct cpsw_slave *slave; 253532b78d85SIvan Khoronzhuk u32 min_rate; 253683fcad0cSIvan Khoronzhuk u32 ch_rate; 253752986a2fSIvan Khoronzhuk int i, ret; 253883fcad0cSIvan Khoronzhuk 253983fcad0cSIvan Khoronzhuk ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate; 254083fcad0cSIvan Khoronzhuk if (ch_rate == rate) 254183fcad0cSIvan Khoronzhuk return 0; 254283fcad0cSIvan Khoronzhuk 254332b78d85SIvan Khoronzhuk ch_rate = rate * 1000; 254483fcad0cSIvan Khoronzhuk min_rate = cpdma_chan_get_min_rate(cpsw->dma); 254532b78d85SIvan Khoronzhuk if ((ch_rate < min_rate && ch_rate)) { 254632b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be less than %dMbps", 254783fcad0cSIvan Khoronzhuk min_rate); 254883fcad0cSIvan Khoronzhuk return -EINVAL; 254983fcad0cSIvan Khoronzhuk } 255083fcad0cSIvan Khoronzhuk 25510be01b8eSIvan Khoronzhuk if (rate > cpsw->speed) { 255232b78d85SIvan Khoronzhuk dev_err(priv->dev, "The channel rate cannot be more than 2Gbps"); 255332b78d85SIvan Khoronzhuk return -EINVAL; 255432b78d85SIvan Khoronzhuk } 255532b78d85SIvan Khoronzhuk 255683fcad0cSIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 255783fcad0cSIvan Khoronzhuk if (ret < 0) { 255883fcad0cSIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 255983fcad0cSIvan Khoronzhuk return ret; 256083fcad0cSIvan Khoronzhuk } 256183fcad0cSIvan Khoronzhuk 256232b78d85SIvan Khoronzhuk ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate); 256383fcad0cSIvan Khoronzhuk pm_runtime_put(cpsw->dev); 256432b78d85SIvan Khoronzhuk 256532b78d85SIvan Khoronzhuk if (ret) 256632b78d85SIvan Khoronzhuk return ret; 256732b78d85SIvan Khoronzhuk 256852986a2fSIvan Khoronzhuk /* update rates for slaves tx queues */ 256952986a2fSIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 257052986a2fSIvan Khoronzhuk slave = &cpsw->slaves[i]; 257152986a2fSIvan Khoronzhuk if (!slave->ndev) 257252986a2fSIvan Khoronzhuk continue; 257352986a2fSIvan Khoronzhuk 257452986a2fSIvan Khoronzhuk netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate; 257552986a2fSIvan Khoronzhuk } 257652986a2fSIvan Khoronzhuk 257732b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 257883fcad0cSIvan Khoronzhuk return ret; 257983fcad0cSIvan Khoronzhuk } 258083fcad0cSIvan Khoronzhuk 25817929a668SIvan Khoronzhuk static int cpsw_set_mqprio(struct net_device *ndev, void *type_data) 25827929a668SIvan Khoronzhuk { 25837929a668SIvan Khoronzhuk struct tc_mqprio_qopt_offload *mqprio = type_data; 25847929a668SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 25857929a668SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 25867929a668SIvan Khoronzhuk int fifo, num_tc, count, offset; 25877929a668SIvan Khoronzhuk struct cpsw_slave *slave; 25887929a668SIvan Khoronzhuk u32 tx_prio_map = 0; 25897929a668SIvan Khoronzhuk int i, tc, ret; 25907929a668SIvan Khoronzhuk 25917929a668SIvan Khoronzhuk num_tc = mqprio->qopt.num_tc; 25927929a668SIvan Khoronzhuk if (num_tc > CPSW_TC_NUM) 25937929a668SIvan Khoronzhuk return -EINVAL; 25947929a668SIvan Khoronzhuk 25957929a668SIvan Khoronzhuk if (mqprio->mode != TC_MQPRIO_MODE_DCB) 25967929a668SIvan Khoronzhuk return -EINVAL; 25977929a668SIvan Khoronzhuk 25987929a668SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 25997929a668SIvan Khoronzhuk if (ret < 0) { 26007929a668SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 26017929a668SIvan Khoronzhuk return ret; 26027929a668SIvan Khoronzhuk } 26037929a668SIvan Khoronzhuk 26047929a668SIvan Khoronzhuk if (num_tc) { 26057929a668SIvan Khoronzhuk for (i = 0; i < 8; i++) { 26067929a668SIvan Khoronzhuk tc = mqprio->qopt.prio_tc_map[i]; 26077929a668SIvan Khoronzhuk fifo = cpsw_tc_to_fifo(tc, num_tc); 26087929a668SIvan Khoronzhuk tx_prio_map |= fifo << (4 * i); 26097929a668SIvan Khoronzhuk } 26107929a668SIvan Khoronzhuk 26117929a668SIvan Khoronzhuk netdev_set_num_tc(ndev, num_tc); 26127929a668SIvan Khoronzhuk for (i = 0; i < num_tc; i++) { 26137929a668SIvan Khoronzhuk count = mqprio->qopt.count[i]; 26147929a668SIvan Khoronzhuk offset = mqprio->qopt.offset[i]; 26157929a668SIvan Khoronzhuk netdev_set_tc_queue(ndev, i, count, offset); 26167929a668SIvan Khoronzhuk } 26177929a668SIvan Khoronzhuk } 26187929a668SIvan Khoronzhuk 26197929a668SIvan Khoronzhuk if (!mqprio->qopt.hw) { 26207929a668SIvan Khoronzhuk /* restore default configuration */ 26217929a668SIvan Khoronzhuk netdev_reset_tc(ndev); 26227929a668SIvan Khoronzhuk tx_prio_map = TX_PRIORITY_MAPPING; 26237929a668SIvan Khoronzhuk } 26247929a668SIvan Khoronzhuk 26257929a668SIvan Khoronzhuk priv->mqprio_hw = mqprio->qopt.hw; 26267929a668SIvan Khoronzhuk 26277929a668SIvan Khoronzhuk offset = cpsw->version == CPSW_VERSION_1 ? 26287929a668SIvan Khoronzhuk CPSW1_TX_PRI_MAP : CPSW2_TX_PRI_MAP; 26297929a668SIvan Khoronzhuk 26307929a668SIvan Khoronzhuk slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; 26317929a668SIvan Khoronzhuk slave_write(slave, tx_prio_map, offset); 26327929a668SIvan Khoronzhuk 26337929a668SIvan Khoronzhuk pm_runtime_put_sync(cpsw->dev); 26347929a668SIvan Khoronzhuk 26357929a668SIvan Khoronzhuk return 0; 26367929a668SIvan Khoronzhuk } 26377929a668SIvan Khoronzhuk 26387929a668SIvan Khoronzhuk static int cpsw_ndo_setup_tc(struct net_device *ndev, enum tc_setup_type type, 26397929a668SIvan Khoronzhuk void *type_data) 26407929a668SIvan Khoronzhuk { 26417929a668SIvan Khoronzhuk switch (type) { 264257d90148SIvan Khoronzhuk case TC_SETUP_QDISC_CBS: 264357d90148SIvan Khoronzhuk return cpsw_set_cbs(ndev, type_data); 264457d90148SIvan Khoronzhuk 26457929a668SIvan Khoronzhuk case TC_SETUP_QDISC_MQPRIO: 26467929a668SIvan Khoronzhuk return cpsw_set_mqprio(ndev, type_data); 26477929a668SIvan Khoronzhuk 26487929a668SIvan Khoronzhuk default: 26497929a668SIvan Khoronzhuk return -EOPNOTSUPP; 26507929a668SIvan Khoronzhuk } 26517929a668SIvan Khoronzhuk } 26527929a668SIvan Khoronzhuk 2653df828598SMugunthan V N static const struct net_device_ops cpsw_netdev_ops = { 2654df828598SMugunthan V N .ndo_open = cpsw_ndo_open, 2655df828598SMugunthan V N .ndo_stop = cpsw_ndo_stop, 2656df828598SMugunthan V N .ndo_start_xmit = cpsw_ndo_start_xmit, 2657dcfd8d58SMugunthan V N .ndo_set_mac_address = cpsw_ndo_set_mac_address, 26582e5b38abSRichard Cochran .ndo_do_ioctl = cpsw_ndo_ioctl, 2659df828598SMugunthan V N .ndo_validate_addr = eth_validate_addr, 2660df828598SMugunthan V N .ndo_tx_timeout = cpsw_ndo_tx_timeout, 26615c50a856SMugunthan V N .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, 266283fcad0cSIvan Khoronzhuk .ndo_set_tx_maxrate = cpsw_ndo_set_tx_maxrate, 2663df828598SMugunthan V N #ifdef CONFIG_NET_POLL_CONTROLLER 2664df828598SMugunthan V N .ndo_poll_controller = cpsw_ndo_poll_controller, 2665df828598SMugunthan V N #endif 26663b72c2feSMugunthan V N .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, 26673b72c2feSMugunthan V N .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, 26687929a668SIvan Khoronzhuk .ndo_setup_tc = cpsw_ndo_setup_tc, 2669df828598SMugunthan V N }; 2670df828598SMugunthan V N 267152c4f0ecSMugunthan V N static int cpsw_get_regs_len(struct net_device *ndev) 267252c4f0ecSMugunthan V N { 2673606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 267452c4f0ecSMugunthan V N 2675606f3993SIvan Khoronzhuk return cpsw->data.ale_entries * ALE_ENTRY_WORDS * sizeof(u32); 267652c4f0ecSMugunthan V N } 267752c4f0ecSMugunthan V N 267852c4f0ecSMugunthan V N static void cpsw_get_regs(struct net_device *ndev, 267952c4f0ecSMugunthan V N struct ethtool_regs *regs, void *p) 268052c4f0ecSMugunthan V N { 268152c4f0ecSMugunthan V N u32 *reg = p; 26822a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 268352c4f0ecSMugunthan V N 268452c4f0ecSMugunthan V N /* update CPSW IP version */ 26852a05a622SIvan Khoronzhuk regs->version = cpsw->version; 268652c4f0ecSMugunthan V N 26872a05a622SIvan Khoronzhuk cpsw_ale_dump(cpsw->ale, reg); 268852c4f0ecSMugunthan V N } 268952c4f0ecSMugunthan V N 2690df828598SMugunthan V N static void cpsw_get_drvinfo(struct net_device *ndev, 2691df828598SMugunthan V N struct ethtool_drvinfo *info) 2692df828598SMugunthan V N { 2693649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 269456e31bd8SIvan Khoronzhuk struct platform_device *pdev = to_platform_device(cpsw->dev); 26957826d43fSJiri Pirko 269652c4f0ecSMugunthan V N strlcpy(info->driver, "cpsw", sizeof(info->driver)); 26977826d43fSJiri Pirko strlcpy(info->version, "1.0", sizeof(info->version)); 269856e31bd8SIvan Khoronzhuk strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info)); 2699df828598SMugunthan V N } 2700df828598SMugunthan V N 2701df828598SMugunthan V N static u32 cpsw_get_msglevel(struct net_device *ndev) 2702df828598SMugunthan V N { 2703df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2704df828598SMugunthan V N return priv->msg_enable; 2705df828598SMugunthan V N } 2706df828598SMugunthan V N 2707df828598SMugunthan V N static void cpsw_set_msglevel(struct net_device *ndev, u32 value) 2708df828598SMugunthan V N { 2709df828598SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2710df828598SMugunthan V N priv->msg_enable = value; 2711df828598SMugunthan V N } 2712df828598SMugunthan V N 2713c8395d4eSGrygorii Strashko #if IS_ENABLED(CONFIG_TI_CPTS) 27142e5b38abSRichard Cochran static int cpsw_get_ts_info(struct net_device *ndev, 27152e5b38abSRichard Cochran struct ethtool_ts_info *info) 27162e5b38abSRichard Cochran { 27172a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 27182e5b38abSRichard Cochran 27192e5b38abSRichard Cochran info->so_timestamping = 27202e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_HARDWARE | 27212e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 27222e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_HARDWARE | 27232e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 27242e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE | 27252e5b38abSRichard Cochran SOF_TIMESTAMPING_RAW_HARDWARE; 27262a05a622SIvan Khoronzhuk info->phc_index = cpsw->cpts->phc_index; 27272e5b38abSRichard Cochran info->tx_types = 27282e5b38abSRichard Cochran (1 << HWTSTAMP_TX_OFF) | 27292e5b38abSRichard Cochran (1 << HWTSTAMP_TX_ON); 27302e5b38abSRichard Cochran info->rx_filters = 27312e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_NONE) | 2732e9523a5aSGrygorii Strashko (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 27332e5b38abSRichard Cochran (1 << HWTSTAMP_FILTER_PTP_V2_EVENT); 2734c8395d4eSGrygorii Strashko return 0; 2735c8395d4eSGrygorii Strashko } 27362e5b38abSRichard Cochran #else 2737c8395d4eSGrygorii Strashko static int cpsw_get_ts_info(struct net_device *ndev, 2738c8395d4eSGrygorii Strashko struct ethtool_ts_info *info) 2739c8395d4eSGrygorii Strashko { 27402e5b38abSRichard Cochran info->so_timestamping = 27412e5b38abSRichard Cochran SOF_TIMESTAMPING_TX_SOFTWARE | 27422e5b38abSRichard Cochran SOF_TIMESTAMPING_RX_SOFTWARE | 27432e5b38abSRichard Cochran SOF_TIMESTAMPING_SOFTWARE; 27442e5b38abSRichard Cochran info->phc_index = -1; 27452e5b38abSRichard Cochran info->tx_types = 0; 27462e5b38abSRichard Cochran info->rx_filters = 0; 27472e5b38abSRichard Cochran return 0; 27482e5b38abSRichard Cochran } 2749c8395d4eSGrygorii Strashko #endif 27502e5b38abSRichard Cochran 27512479876dSPhilippe Reynes static int cpsw_get_link_ksettings(struct net_device *ndev, 27522479876dSPhilippe Reynes struct ethtool_link_ksettings *ecmd) 2753d3bb9c58SMugunthan V N { 2754d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2755606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2756606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2757d3bb9c58SMugunthan V N 27585514174fSyuval.shaia@oracle.com if (!cpsw->slaves[slave_no].phy) 2759d3bb9c58SMugunthan V N return -EOPNOTSUPP; 27605514174fSyuval.shaia@oracle.com 27615514174fSyuval.shaia@oracle.com phy_ethtool_ksettings_get(cpsw->slaves[slave_no].phy, ecmd); 27625514174fSyuval.shaia@oracle.com return 0; 2763d3bb9c58SMugunthan V N } 2764d3bb9c58SMugunthan V N 27652479876dSPhilippe Reynes static int cpsw_set_link_ksettings(struct net_device *ndev, 27662479876dSPhilippe Reynes const struct ethtool_link_ksettings *ecmd) 2767d3bb9c58SMugunthan V N { 2768d3bb9c58SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 2769606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2770606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2771d3bb9c58SMugunthan V N 2772606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 27732479876dSPhilippe Reynes return phy_ethtool_ksettings_set(cpsw->slaves[slave_no].phy, 27742479876dSPhilippe Reynes ecmd); 2775d3bb9c58SMugunthan V N else 2776d3bb9c58SMugunthan V N return -EOPNOTSUPP; 2777d3bb9c58SMugunthan V N } 2778d3bb9c58SMugunthan V N 2779d8a64420SMatus Ujhelyi static void cpsw_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2780d8a64420SMatus Ujhelyi { 2781d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2782606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2783606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2784d8a64420SMatus Ujhelyi 2785d8a64420SMatus Ujhelyi wol->supported = 0; 2786d8a64420SMatus Ujhelyi wol->wolopts = 0; 2787d8a64420SMatus Ujhelyi 2788606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2789606f3993SIvan Khoronzhuk phy_ethtool_get_wol(cpsw->slaves[slave_no].phy, wol); 2790d8a64420SMatus Ujhelyi } 2791d8a64420SMatus Ujhelyi 2792d8a64420SMatus Ujhelyi static int cpsw_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 2793d8a64420SMatus Ujhelyi { 2794d8a64420SMatus Ujhelyi struct cpsw_priv *priv = netdev_priv(ndev); 2795606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2796606f3993SIvan Khoronzhuk int slave_no = cpsw_slave_index(cpsw, priv); 2797d8a64420SMatus Ujhelyi 2798606f3993SIvan Khoronzhuk if (cpsw->slaves[slave_no].phy) 2799606f3993SIvan Khoronzhuk return phy_ethtool_set_wol(cpsw->slaves[slave_no].phy, wol); 2800d8a64420SMatus Ujhelyi else 2801d8a64420SMatus Ujhelyi return -EOPNOTSUPP; 2802d8a64420SMatus Ujhelyi } 2803d8a64420SMatus Ujhelyi 28041923d6e4SMugunthan V N static void cpsw_get_pauseparam(struct net_device *ndev, 28051923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 28061923d6e4SMugunthan V N { 28071923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 28081923d6e4SMugunthan V N 28091923d6e4SMugunthan V N pause->autoneg = AUTONEG_DISABLE; 28101923d6e4SMugunthan V N pause->rx_pause = priv->rx_pause ? true : false; 28111923d6e4SMugunthan V N pause->tx_pause = priv->tx_pause ? true : false; 28121923d6e4SMugunthan V N } 28131923d6e4SMugunthan V N 28141923d6e4SMugunthan V N static int cpsw_set_pauseparam(struct net_device *ndev, 28151923d6e4SMugunthan V N struct ethtool_pauseparam *pause) 28161923d6e4SMugunthan V N { 28171923d6e4SMugunthan V N struct cpsw_priv *priv = netdev_priv(ndev); 28181923d6e4SMugunthan V N bool link; 28191923d6e4SMugunthan V N 28201923d6e4SMugunthan V N priv->rx_pause = pause->rx_pause ? true : false; 28211923d6e4SMugunthan V N priv->tx_pause = pause->tx_pause ? true : false; 28221923d6e4SMugunthan V N 28231923d6e4SMugunthan V N for_each_slave(priv, _cpsw_adjust_link, priv, &link); 28241923d6e4SMugunthan V N return 0; 28251923d6e4SMugunthan V N } 28261923d6e4SMugunthan V N 28277898b1daSGrygorii Strashko static int cpsw_ethtool_op_begin(struct net_device *ndev) 28287898b1daSGrygorii Strashko { 28297898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 2830649a1688SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 28317898b1daSGrygorii Strashko int ret; 28327898b1daSGrygorii Strashko 283356e31bd8SIvan Khoronzhuk ret = pm_runtime_get_sync(cpsw->dev); 28347898b1daSGrygorii Strashko if (ret < 0) { 28357898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool begin failed %d\n", ret); 283656e31bd8SIvan Khoronzhuk pm_runtime_put_noidle(cpsw->dev); 28377898b1daSGrygorii Strashko } 28387898b1daSGrygorii Strashko 28397898b1daSGrygorii Strashko return ret; 28407898b1daSGrygorii Strashko } 28417898b1daSGrygorii Strashko 28427898b1daSGrygorii Strashko static void cpsw_ethtool_op_complete(struct net_device *ndev) 28437898b1daSGrygorii Strashko { 28447898b1daSGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 28457898b1daSGrygorii Strashko int ret; 28467898b1daSGrygorii Strashko 284756e31bd8SIvan Khoronzhuk ret = pm_runtime_put(priv->cpsw->dev); 28487898b1daSGrygorii Strashko if (ret < 0) 28497898b1daSGrygorii Strashko cpsw_err(priv, drv, "ethtool complete failed %d\n", ret); 28507898b1daSGrygorii Strashko } 28517898b1daSGrygorii Strashko 2852ce52c744SIvan Khoronzhuk static void cpsw_get_channels(struct net_device *ndev, 2853ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2854ce52c744SIvan Khoronzhuk { 2855ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2856ce52c744SIvan Khoronzhuk 28579611d6d6SIvan Khoronzhuk ch->max_rx = cpsw->quirk_irq ? 1 : CPSW_MAX_QUEUES; 28589611d6d6SIvan Khoronzhuk ch->max_tx = cpsw->quirk_irq ? 1 : CPSW_MAX_QUEUES; 2859ce52c744SIvan Khoronzhuk ch->max_combined = 0; 2860ce52c744SIvan Khoronzhuk ch->max_other = 0; 2861ce52c744SIvan Khoronzhuk ch->other_count = 0; 2862ce52c744SIvan Khoronzhuk ch->rx_count = cpsw->rx_ch_num; 2863ce52c744SIvan Khoronzhuk ch->tx_count = cpsw->tx_ch_num; 2864ce52c744SIvan Khoronzhuk ch->combined_count = 0; 2865ce52c744SIvan Khoronzhuk } 2866ce52c744SIvan Khoronzhuk 2867ce52c744SIvan Khoronzhuk static int cpsw_check_ch_settings(struct cpsw_common *cpsw, 2868ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2869ce52c744SIvan Khoronzhuk { 28709611d6d6SIvan Khoronzhuk if (cpsw->quirk_irq) { 28719611d6d6SIvan Khoronzhuk dev_err(cpsw->dev, "Maximum one tx/rx queue is allowed"); 28729611d6d6SIvan Khoronzhuk return -EOPNOTSUPP; 28739611d6d6SIvan Khoronzhuk } 28749611d6d6SIvan Khoronzhuk 2875ce52c744SIvan Khoronzhuk if (ch->combined_count) 2876ce52c744SIvan Khoronzhuk return -EINVAL; 2877ce52c744SIvan Khoronzhuk 2878ce52c744SIvan Khoronzhuk /* verify we have at least one channel in each direction */ 2879ce52c744SIvan Khoronzhuk if (!ch->rx_count || !ch->tx_count) 2880ce52c744SIvan Khoronzhuk return -EINVAL; 2881ce52c744SIvan Khoronzhuk 2882ce52c744SIvan Khoronzhuk if (ch->rx_count > cpsw->data.channels || 2883ce52c744SIvan Khoronzhuk ch->tx_count > cpsw->data.channels) 2884ce52c744SIvan Khoronzhuk return -EINVAL; 2885ce52c744SIvan Khoronzhuk 2886ce52c744SIvan Khoronzhuk return 0; 2887ce52c744SIvan Khoronzhuk } 2888ce52c744SIvan Khoronzhuk 2889ce52c744SIvan Khoronzhuk static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx) 2890ce52c744SIvan Khoronzhuk { 2891ce52c744SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2892ce52c744SIvan Khoronzhuk void (*handler)(void *, int, int); 289383fcad0cSIvan Khoronzhuk struct netdev_queue *queue; 28948feb0a19SIvan Khoronzhuk struct cpsw_vector *vec; 289579b3325dSIvan Khoronzhuk int ret, *ch, vch; 2896ce52c744SIvan Khoronzhuk 2897ce52c744SIvan Khoronzhuk if (rx) { 2898ce52c744SIvan Khoronzhuk ch = &cpsw->rx_ch_num; 28998feb0a19SIvan Khoronzhuk vec = cpsw->rxv; 2900ce52c744SIvan Khoronzhuk handler = cpsw_rx_handler; 2901ce52c744SIvan Khoronzhuk } else { 2902ce52c744SIvan Khoronzhuk ch = &cpsw->tx_ch_num; 29038feb0a19SIvan Khoronzhuk vec = cpsw->txv; 2904ce52c744SIvan Khoronzhuk handler = cpsw_tx_handler; 2905ce52c744SIvan Khoronzhuk } 2906ce52c744SIvan Khoronzhuk 2907ce52c744SIvan Khoronzhuk while (*ch < ch_num) { 290879b3325dSIvan Khoronzhuk vch = rx ? *ch : 7 - *ch; 290979b3325dSIvan Khoronzhuk vec[*ch].ch = cpdma_chan_create(cpsw->dma, vch, handler, rx); 291083fcad0cSIvan Khoronzhuk queue = netdev_get_tx_queue(priv->ndev, *ch); 291183fcad0cSIvan Khoronzhuk queue->tx_maxrate = 0; 2912ce52c744SIvan Khoronzhuk 29138feb0a19SIvan Khoronzhuk if (IS_ERR(vec[*ch].ch)) 29148feb0a19SIvan Khoronzhuk return PTR_ERR(vec[*ch].ch); 2915ce52c744SIvan Khoronzhuk 29168feb0a19SIvan Khoronzhuk if (!vec[*ch].ch) 2917ce52c744SIvan Khoronzhuk return -EINVAL; 2918ce52c744SIvan Khoronzhuk 2919ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "created new %d %s channel\n", *ch, 2920ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2921ce52c744SIvan Khoronzhuk (*ch)++; 2922ce52c744SIvan Khoronzhuk } 2923ce52c744SIvan Khoronzhuk 2924ce52c744SIvan Khoronzhuk while (*ch > ch_num) { 2925ce52c744SIvan Khoronzhuk (*ch)--; 2926ce52c744SIvan Khoronzhuk 29278feb0a19SIvan Khoronzhuk ret = cpdma_chan_destroy(vec[*ch].ch); 2928ce52c744SIvan Khoronzhuk if (ret) 2929ce52c744SIvan Khoronzhuk return ret; 2930ce52c744SIvan Khoronzhuk 2931ce52c744SIvan Khoronzhuk cpsw_info(priv, ifup, "destroyed %d %s channel\n", *ch, 2932ce52c744SIvan Khoronzhuk (rx ? "rx" : "tx")); 2933ce52c744SIvan Khoronzhuk } 2934ce52c744SIvan Khoronzhuk 2935ce52c744SIvan Khoronzhuk return 0; 2936ce52c744SIvan Khoronzhuk } 2937ce52c744SIvan Khoronzhuk 2938ce52c744SIvan Khoronzhuk static int cpsw_update_channels(struct cpsw_priv *priv, 2939ce52c744SIvan Khoronzhuk struct ethtool_channels *ch) 2940ce52c744SIvan Khoronzhuk { 2941ce52c744SIvan Khoronzhuk int ret; 2942ce52c744SIvan Khoronzhuk 2943ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->rx_count, 1); 2944ce52c744SIvan Khoronzhuk if (ret) 2945ce52c744SIvan Khoronzhuk return ret; 2946ce52c744SIvan Khoronzhuk 2947ce52c744SIvan Khoronzhuk ret = cpsw_update_channels_res(priv, ch->tx_count, 0); 2948ce52c744SIvan Khoronzhuk if (ret) 2949ce52c744SIvan Khoronzhuk return ret; 2950ce52c744SIvan Khoronzhuk 2951ce52c744SIvan Khoronzhuk return 0; 2952ce52c744SIvan Khoronzhuk } 2953ce52c744SIvan Khoronzhuk 2954022d7ad7SIvan Khoronzhuk static void cpsw_suspend_data_pass(struct net_device *ndev) 2955ce52c744SIvan Khoronzhuk { 2956022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 2957ce52c744SIvan Khoronzhuk struct cpsw_slave *slave; 2958022d7ad7SIvan Khoronzhuk int i; 2959ce52c744SIvan Khoronzhuk 2960ce52c744SIvan Khoronzhuk /* Disable NAPI scheduling */ 2961ce52c744SIvan Khoronzhuk cpsw_intr_disable(cpsw); 2962ce52c744SIvan Khoronzhuk 2963ce52c744SIvan Khoronzhuk /* Stop all transmit queues for every network device. 2964ce52c744SIvan Khoronzhuk * Disable re-using rx descriptors with dormant_on. 2965ce52c744SIvan Khoronzhuk */ 2966ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 2967ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 2968ce52c744SIvan Khoronzhuk continue; 2969ce52c744SIvan Khoronzhuk 2970ce52c744SIvan Khoronzhuk netif_tx_stop_all_queues(slave->ndev); 2971ce52c744SIvan Khoronzhuk netif_dormant_on(slave->ndev); 2972ce52c744SIvan Khoronzhuk } 2973ce52c744SIvan Khoronzhuk 2974ce52c744SIvan Khoronzhuk /* Handle rest of tx packets and stop cpdma channels */ 2975ce52c744SIvan Khoronzhuk cpdma_ctlr_stop(cpsw->dma); 2976022d7ad7SIvan Khoronzhuk } 2977022d7ad7SIvan Khoronzhuk 2978022d7ad7SIvan Khoronzhuk static int cpsw_resume_data_pass(struct net_device *ndev) 2979022d7ad7SIvan Khoronzhuk { 2980022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 2981022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 2982022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 2983022d7ad7SIvan Khoronzhuk int i, ret; 2984022d7ad7SIvan Khoronzhuk 2985022d7ad7SIvan Khoronzhuk /* Allow rx packets handling */ 2986022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 2987022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 2988022d7ad7SIvan Khoronzhuk netif_dormant_off(slave->ndev); 2989022d7ad7SIvan Khoronzhuk 2990022d7ad7SIvan Khoronzhuk /* After this receive is started */ 2991d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) { 2992022d7ad7SIvan Khoronzhuk ret = cpsw_fill_rx_channels(priv); 2993022d7ad7SIvan Khoronzhuk if (ret) 2994022d7ad7SIvan Khoronzhuk return ret; 2995022d7ad7SIvan Khoronzhuk 2996022d7ad7SIvan Khoronzhuk cpdma_ctlr_start(cpsw->dma); 2997022d7ad7SIvan Khoronzhuk cpsw_intr_enable(cpsw); 2998022d7ad7SIvan Khoronzhuk } 2999022d7ad7SIvan Khoronzhuk 3000022d7ad7SIvan Khoronzhuk /* Resume transmit for every affected interface */ 3001022d7ad7SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) 3002022d7ad7SIvan Khoronzhuk if (slave->ndev && netif_running(slave->ndev)) 3003022d7ad7SIvan Khoronzhuk netif_tx_start_all_queues(slave->ndev); 3004022d7ad7SIvan Khoronzhuk 3005022d7ad7SIvan Khoronzhuk return 0; 3006022d7ad7SIvan Khoronzhuk } 3007022d7ad7SIvan Khoronzhuk 3008022d7ad7SIvan Khoronzhuk static int cpsw_set_channels(struct net_device *ndev, 3009022d7ad7SIvan Khoronzhuk struct ethtool_channels *chs) 3010022d7ad7SIvan Khoronzhuk { 3011022d7ad7SIvan Khoronzhuk struct cpsw_priv *priv = netdev_priv(ndev); 3012022d7ad7SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 3013022d7ad7SIvan Khoronzhuk struct cpsw_slave *slave; 3014022d7ad7SIvan Khoronzhuk int i, ret; 3015022d7ad7SIvan Khoronzhuk 3016022d7ad7SIvan Khoronzhuk ret = cpsw_check_ch_settings(cpsw, chs); 3017022d7ad7SIvan Khoronzhuk if (ret < 0) 3018022d7ad7SIvan Khoronzhuk return ret; 3019022d7ad7SIvan Khoronzhuk 3020022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 3021ce52c744SIvan Khoronzhuk ret = cpsw_update_channels(priv, chs); 3022ce52c744SIvan Khoronzhuk if (ret) 3023ce52c744SIvan Khoronzhuk goto err; 3024ce52c744SIvan Khoronzhuk 3025ce52c744SIvan Khoronzhuk for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) { 3026ce52c744SIvan Khoronzhuk if (!(slave->ndev && netif_running(slave->ndev))) 3027ce52c744SIvan Khoronzhuk continue; 3028ce52c744SIvan Khoronzhuk 3029ce52c744SIvan Khoronzhuk /* Inform stack about new count of queues */ 3030ce52c744SIvan Khoronzhuk ret = netif_set_real_num_tx_queues(slave->ndev, 3031ce52c744SIvan Khoronzhuk cpsw->tx_ch_num); 3032ce52c744SIvan Khoronzhuk if (ret) { 3033ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of tx queues\n"); 3034ce52c744SIvan Khoronzhuk goto err; 3035ce52c744SIvan Khoronzhuk } 3036ce52c744SIvan Khoronzhuk 3037ce52c744SIvan Khoronzhuk ret = netif_set_real_num_rx_queues(slave->ndev, 3038ce52c744SIvan Khoronzhuk cpsw->rx_ch_num); 3039ce52c744SIvan Khoronzhuk if (ret) { 3040ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot set real number of rx queues\n"); 3041ce52c744SIvan Khoronzhuk goto err; 3042ce52c744SIvan Khoronzhuk } 3043ce52c744SIvan Khoronzhuk } 3044ce52c744SIvan Khoronzhuk 3045d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 304632b78d85SIvan Khoronzhuk cpsw_split_res(ndev); 30478feb0a19SIvan Khoronzhuk 3048022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 3049022d7ad7SIvan Khoronzhuk if (!ret) 3050ce52c744SIvan Khoronzhuk return 0; 3051ce52c744SIvan Khoronzhuk err: 3052ce52c744SIvan Khoronzhuk dev_err(priv->dev, "cannot update channels number, closing device\n"); 3053ce52c744SIvan Khoronzhuk dev_close(ndev); 3054ce52c744SIvan Khoronzhuk return ret; 3055ce52c744SIvan Khoronzhuk } 3056ce52c744SIvan Khoronzhuk 3057a0909949SYegor Yefremov static int cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata) 3058a0909949SYegor Yefremov { 3059a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 3060a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 3061a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 3062a0909949SYegor Yefremov 3063a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 3064a0909949SYegor Yefremov return phy_ethtool_get_eee(cpsw->slaves[slave_no].phy, edata); 3065a0909949SYegor Yefremov else 3066a0909949SYegor Yefremov return -EOPNOTSUPP; 3067a0909949SYegor Yefremov } 3068a0909949SYegor Yefremov 3069a0909949SYegor Yefremov static int cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata) 3070a0909949SYegor Yefremov { 3071a0909949SYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 3072a0909949SYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 3073a0909949SYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 3074a0909949SYegor Yefremov 3075a0909949SYegor Yefremov if (cpsw->slaves[slave_no].phy) 3076a0909949SYegor Yefremov return phy_ethtool_set_eee(cpsw->slaves[slave_no].phy, edata); 3077a0909949SYegor Yefremov else 3078a0909949SYegor Yefremov return -EOPNOTSUPP; 3079a0909949SYegor Yefremov } 3080a0909949SYegor Yefremov 30816bb10c2bSYegor Yefremov static int cpsw_nway_reset(struct net_device *ndev) 30826bb10c2bSYegor Yefremov { 30836bb10c2bSYegor Yefremov struct cpsw_priv *priv = netdev_priv(ndev); 30846bb10c2bSYegor Yefremov struct cpsw_common *cpsw = priv->cpsw; 30856bb10c2bSYegor Yefremov int slave_no = cpsw_slave_index(cpsw, priv); 30866bb10c2bSYegor Yefremov 30876bb10c2bSYegor Yefremov if (cpsw->slaves[slave_no].phy) 30886bb10c2bSYegor Yefremov return genphy_restart_aneg(cpsw->slaves[slave_no].phy); 30896bb10c2bSYegor Yefremov else 30906bb10c2bSYegor Yefremov return -EOPNOTSUPP; 30916bb10c2bSYegor Yefremov } 30926bb10c2bSYegor Yefremov 3093be034fc1SGrygorii Strashko static void cpsw_get_ringparam(struct net_device *ndev, 3094be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 3095be034fc1SGrygorii Strashko { 3096be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 3097be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 3098be034fc1SGrygorii Strashko 3099be034fc1SGrygorii Strashko /* not supported */ 3100be034fc1SGrygorii Strashko ering->tx_max_pending = 0; 3101be034fc1SGrygorii Strashko ering->tx_pending = cpdma_get_num_tx_descs(cpsw->dma); 3102f89d21b9SIvan Khoronzhuk ering->rx_max_pending = descs_pool_size - CPSW_MAX_QUEUES; 3103be034fc1SGrygorii Strashko ering->rx_pending = cpdma_get_num_rx_descs(cpsw->dma); 3104be034fc1SGrygorii Strashko } 3105be034fc1SGrygorii Strashko 3106be034fc1SGrygorii Strashko static int cpsw_set_ringparam(struct net_device *ndev, 3107be034fc1SGrygorii Strashko struct ethtool_ringparam *ering) 3108be034fc1SGrygorii Strashko { 3109be034fc1SGrygorii Strashko struct cpsw_priv *priv = netdev_priv(ndev); 3110be034fc1SGrygorii Strashko struct cpsw_common *cpsw = priv->cpsw; 3111022d7ad7SIvan Khoronzhuk int ret; 3112be034fc1SGrygorii Strashko 3113be034fc1SGrygorii Strashko /* ignore ering->tx_pending - only rx_pending adjustment is supported */ 3114be034fc1SGrygorii Strashko 3115be034fc1SGrygorii Strashko if (ering->rx_mini_pending || ering->rx_jumbo_pending || 3116f89d21b9SIvan Khoronzhuk ering->rx_pending < CPSW_MAX_QUEUES || 3117f89d21b9SIvan Khoronzhuk ering->rx_pending > (descs_pool_size - CPSW_MAX_QUEUES)) 3118be034fc1SGrygorii Strashko return -EINVAL; 3119be034fc1SGrygorii Strashko 3120be034fc1SGrygorii Strashko if (ering->rx_pending == cpdma_get_num_rx_descs(cpsw->dma)) 3121be034fc1SGrygorii Strashko return 0; 3122be034fc1SGrygorii Strashko 3123022d7ad7SIvan Khoronzhuk cpsw_suspend_data_pass(ndev); 3124be034fc1SGrygorii Strashko 3125be034fc1SGrygorii Strashko cpdma_set_num_rx_descs(cpsw->dma, ering->rx_pending); 3126be034fc1SGrygorii Strashko 3127d5bc1613SIvan Khoronzhuk if (cpsw->usage_count) 3128be034fc1SGrygorii Strashko cpdma_chan_split_pool(cpsw->dma); 3129be034fc1SGrygorii Strashko 3130022d7ad7SIvan Khoronzhuk ret = cpsw_resume_data_pass(ndev); 3131022d7ad7SIvan Khoronzhuk if (!ret) 3132be034fc1SGrygorii Strashko return 0; 3133022d7ad7SIvan Khoronzhuk 3134022d7ad7SIvan Khoronzhuk dev_err(&ndev->dev, "cannot set ring params, closing device\n"); 3135be034fc1SGrygorii Strashko dev_close(ndev); 3136be034fc1SGrygorii Strashko return ret; 3137be034fc1SGrygorii Strashko } 3138be034fc1SGrygorii Strashko 3139df828598SMugunthan V N static const struct ethtool_ops cpsw_ethtool_ops = { 3140df828598SMugunthan V N .get_drvinfo = cpsw_get_drvinfo, 3141df828598SMugunthan V N .get_msglevel = cpsw_get_msglevel, 3142df828598SMugunthan V N .set_msglevel = cpsw_set_msglevel, 3143df828598SMugunthan V N .get_link = ethtool_op_get_link, 31442e5b38abSRichard Cochran .get_ts_info = cpsw_get_ts_info, 3145ff5b8ef2SMugunthan V N .get_coalesce = cpsw_get_coalesce, 3146ff5b8ef2SMugunthan V N .set_coalesce = cpsw_set_coalesce, 3147d9718546SMugunthan V N .get_sset_count = cpsw_get_sset_count, 3148d9718546SMugunthan V N .get_strings = cpsw_get_strings, 3149d9718546SMugunthan V N .get_ethtool_stats = cpsw_get_ethtool_stats, 31501923d6e4SMugunthan V N .get_pauseparam = cpsw_get_pauseparam, 31511923d6e4SMugunthan V N .set_pauseparam = cpsw_set_pauseparam, 3152d8a64420SMatus Ujhelyi .get_wol = cpsw_get_wol, 3153d8a64420SMatus Ujhelyi .set_wol = cpsw_set_wol, 315452c4f0ecSMugunthan V N .get_regs_len = cpsw_get_regs_len, 315552c4f0ecSMugunthan V N .get_regs = cpsw_get_regs, 31567898b1daSGrygorii Strashko .begin = cpsw_ethtool_op_begin, 31577898b1daSGrygorii Strashko .complete = cpsw_ethtool_op_complete, 3158ce52c744SIvan Khoronzhuk .get_channels = cpsw_get_channels, 3159ce52c744SIvan Khoronzhuk .set_channels = cpsw_set_channels, 31602479876dSPhilippe Reynes .get_link_ksettings = cpsw_get_link_ksettings, 31612479876dSPhilippe Reynes .set_link_ksettings = cpsw_set_link_ksettings, 3162a0909949SYegor Yefremov .get_eee = cpsw_get_eee, 3163a0909949SYegor Yefremov .set_eee = cpsw_set_eee, 31646bb10c2bSYegor Yefremov .nway_reset = cpsw_nway_reset, 3165be034fc1SGrygorii Strashko .get_ringparam = cpsw_get_ringparam, 3166be034fc1SGrygorii Strashko .set_ringparam = cpsw_set_ringparam, 3167df828598SMugunthan V N }; 3168df828598SMugunthan V N 3169606f3993SIvan Khoronzhuk static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_common *cpsw, 3170549985eeSRichard Cochran u32 slave_reg_ofs, u32 sliver_reg_ofs) 3171df828598SMugunthan V N { 31725d8d0d4dSIvan Khoronzhuk void __iomem *regs = cpsw->regs; 3173df828598SMugunthan V N int slave_num = slave->slave_num; 3174606f3993SIvan Khoronzhuk struct cpsw_slave_data *data = cpsw->data.slave_data + slave_num; 3175df828598SMugunthan V N 3176df828598SMugunthan V N slave->data = data; 3177549985eeSRichard Cochran slave->regs = regs + slave_reg_ofs; 3178549985eeSRichard Cochran slave->sliver = regs + sliver_reg_ofs; 3179d9ba8f9eSMugunthan V N slave->port_vlan = data->dual_emac_res_vlan; 3180df828598SMugunthan V N } 3181df828598SMugunthan V N 3182552165bcSDavid Rivshin static int cpsw_probe_dt(struct cpsw_platform_data *data, 31832eb32b0aSMugunthan V N struct platform_device *pdev) 31842eb32b0aSMugunthan V N { 31852eb32b0aSMugunthan V N struct device_node *node = pdev->dev.of_node; 31862eb32b0aSMugunthan V N struct device_node *slave_node; 31872eb32b0aSMugunthan V N int i = 0, ret; 31882eb32b0aSMugunthan V N u32 prop; 31892eb32b0aSMugunthan V N 31902eb32b0aSMugunthan V N if (!node) 31912eb32b0aSMugunthan V N return -EINVAL; 31922eb32b0aSMugunthan V N 31932eb32b0aSMugunthan V N if (of_property_read_u32(node, "slaves", &prop)) { 319488c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing slaves property in the DT.\n"); 31952eb32b0aSMugunthan V N return -EINVAL; 31962eb32b0aSMugunthan V N } 31972eb32b0aSMugunthan V N data->slaves = prop; 31982eb32b0aSMugunthan V N 3199e86ac13bSMugunthan V N if (of_property_read_u32(node, "active_slave", &prop)) { 320088c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing active_slave property in the DT.\n"); 3201aa1a15e2SDaniel Mack return -EINVAL; 320278ca0b28SRichard Cochran } 3203e86ac13bSMugunthan V N data->active_slave = prop; 320478ca0b28SRichard Cochran 3205a86854d0SKees Cook data->slave_data = devm_kcalloc(&pdev->dev, 3206a86854d0SKees Cook data->slaves, 3207a86854d0SKees Cook sizeof(struct cpsw_slave_data), 3208b2adaca9SJoe Perches GFP_KERNEL); 3209b2adaca9SJoe Perches if (!data->slave_data) 3210aa1a15e2SDaniel Mack return -ENOMEM; 32112eb32b0aSMugunthan V N 32122eb32b0aSMugunthan V N if (of_property_read_u32(node, "cpdma_channels", &prop)) { 321388c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n"); 3214aa1a15e2SDaniel Mack return -EINVAL; 32152eb32b0aSMugunthan V N } 32162eb32b0aSMugunthan V N data->channels = prop; 32172eb32b0aSMugunthan V N 32182eb32b0aSMugunthan V N if (of_property_read_u32(node, "ale_entries", &prop)) { 321988c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n"); 3220aa1a15e2SDaniel Mack return -EINVAL; 32212eb32b0aSMugunthan V N } 32222eb32b0aSMugunthan V N data->ale_entries = prop; 32232eb32b0aSMugunthan V N 32242eb32b0aSMugunthan V N if (of_property_read_u32(node, "bd_ram_size", &prop)) { 322588c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n"); 3226aa1a15e2SDaniel Mack return -EINVAL; 32272eb32b0aSMugunthan V N } 32282eb32b0aSMugunthan V N data->bd_ram_size = prop; 32292eb32b0aSMugunthan V N 32302eb32b0aSMugunthan V N if (of_property_read_u32(node, "mac_control", &prop)) { 323188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing mac_control property in the DT.\n"); 3232aa1a15e2SDaniel Mack return -EINVAL; 32332eb32b0aSMugunthan V N } 32342eb32b0aSMugunthan V N data->mac_control = prop; 32352eb32b0aSMugunthan V N 3236281abd96SMarkus Pargmann if (of_property_read_bool(node, "dual_emac")) 3237281abd96SMarkus Pargmann data->dual_emac = 1; 3238d9ba8f9eSMugunthan V N 32391fb19aa7SVaibhav Hiremath /* 32401fb19aa7SVaibhav Hiremath * Populate all the child nodes here... 32411fb19aa7SVaibhav Hiremath */ 32421fb19aa7SVaibhav Hiremath ret = of_platform_populate(node, NULL, NULL, &pdev->dev); 32431fb19aa7SVaibhav Hiremath /* We do not want to force this, as in some cases may not have child */ 32441fb19aa7SVaibhav Hiremath if (ret) 324588c99ff6SGeorge Cherian dev_warn(&pdev->dev, "Doesn't have any child node\n"); 32461fb19aa7SVaibhav Hiremath 32478658aaf2SBen Hutchings for_each_available_child_of_node(node, slave_node) { 3248549985eeSRichard Cochran struct cpsw_slave_data *slave_data = data->slave_data + i; 3249549985eeSRichard Cochran const void *mac_addr = NULL; 3250549985eeSRichard Cochran int lenp; 3251549985eeSRichard Cochran const __be32 *parp; 3252549985eeSRichard Cochran 3253f468b10eSMarkus Pargmann /* This is no slave child node, continue */ 3254f468b10eSMarkus Pargmann if (strcmp(slave_node->name, "slave")) 3255f468b10eSMarkus Pargmann continue; 3256f468b10eSMarkus Pargmann 3257552165bcSDavid Rivshin slave_data->phy_node = of_parse_phandle(slave_node, 3258552165bcSDavid Rivshin "phy-handle", 0); 3259f1eea5c1SDavid Rivshin parp = of_get_property(slave_node, "phy_id", &lenp); 3260ae092b5bSDavid Rivshin if (slave_data->phy_node) { 3261ae092b5bSDavid Rivshin dev_dbg(&pdev->dev, 3262f7ce9103SRob Herring "slave[%d] using phy-handle=\"%pOF\"\n", 3263f7ce9103SRob Herring i, slave_data->phy_node); 3264ae092b5bSDavid Rivshin } else if (of_phy_is_fixed_link(slave_node)) { 3265dfc0a6d3SDavid Rivshin /* In the case of a fixed PHY, the DT node associated 3266dfc0a6d3SDavid Rivshin * to the PHY is the Ethernet MAC DT node. 3267dfc0a6d3SDavid Rivshin */ 32681f71e8c9SMarkus Brunner ret = of_phy_register_fixed_link(slave_node); 326923a09873SJohan Hovold if (ret) { 327023a09873SJohan Hovold if (ret != -EPROBE_DEFER) 327123a09873SJohan Hovold dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret); 32721f71e8c9SMarkus Brunner return ret; 327323a09873SJohan Hovold } 327406cd6d6eSDavid Rivshin slave_data->phy_node = of_node_get(slave_node); 3275f1eea5c1SDavid Rivshin } else if (parp) { 3276f1eea5c1SDavid Rivshin u32 phyid; 3277f1eea5c1SDavid Rivshin struct device_node *mdio_node; 3278f1eea5c1SDavid Rivshin struct platform_device *mdio; 3279f1eea5c1SDavid Rivshin 3280f1eea5c1SDavid Rivshin if (lenp != (sizeof(__be32) * 2)) { 3281f1eea5c1SDavid Rivshin dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i); 328247276fccSMugunthan V N goto no_phy_slave; 3283549985eeSRichard Cochran } 3284549985eeSRichard Cochran mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); 3285549985eeSRichard Cochran phyid = be32_to_cpup(parp+1); 3286549985eeSRichard Cochran mdio = of_find_device_by_node(mdio_node); 328760e71ab5SJohan Hovold of_node_put(mdio_node); 32886954cc1fSJohan Hovold if (!mdio) { 328956fdb2e0SMarkus Pargmann dev_err(&pdev->dev, "Missing mdio platform device\n"); 32906954cc1fSJohan Hovold return -EINVAL; 32916954cc1fSJohan Hovold } 3292549985eeSRichard Cochran snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), 3293549985eeSRichard Cochran PHY_ID_FMT, mdio->name, phyid); 329486e1d5adSJohan Hovold put_device(&mdio->dev); 3295f1eea5c1SDavid Rivshin } else { 3296ae092b5bSDavid Rivshin dev_err(&pdev->dev, 3297ae092b5bSDavid Rivshin "No slave[%d] phy_id, phy-handle, or fixed-link property\n", 3298ae092b5bSDavid Rivshin i); 3299f1eea5c1SDavid Rivshin goto no_phy_slave; 3300f1eea5c1SDavid Rivshin } 330147276fccSMugunthan V N slave_data->phy_if = of_get_phy_mode(slave_node); 330247276fccSMugunthan V N if (slave_data->phy_if < 0) { 330347276fccSMugunthan V N dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n", 330447276fccSMugunthan V N i); 330547276fccSMugunthan V N return slave_data->phy_if; 330647276fccSMugunthan V N } 330747276fccSMugunthan V N 330847276fccSMugunthan V N no_phy_slave: 3309549985eeSRichard Cochran mac_addr = of_get_mac_address(slave_node); 33100ba517b1SMarkus Pargmann if (mac_addr) { 3311549985eeSRichard Cochran memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); 33120ba517b1SMarkus Pargmann } else { 3313b6745f6eSMugunthan V N ret = ti_cm_get_macid(&pdev->dev, i, 33140ba517b1SMarkus Pargmann slave_data->mac_addr); 33150ba517b1SMarkus Pargmann if (ret) 33160ba517b1SMarkus Pargmann return ret; 33170ba517b1SMarkus Pargmann } 3318d9ba8f9eSMugunthan V N if (data->dual_emac) { 331991c4166cSMugunthan V N if (of_property_read_u32(slave_node, "dual_emac_res_vlan", 3320d9ba8f9eSMugunthan V N &prop)) { 332188c99ff6SGeorge Cherian dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n"); 3322d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = i+1; 332388c99ff6SGeorge Cherian dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n", 3324d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan, i); 3325d9ba8f9eSMugunthan V N } else { 3326d9ba8f9eSMugunthan V N slave_data->dual_emac_res_vlan = prop; 3327d9ba8f9eSMugunthan V N } 3328d9ba8f9eSMugunthan V N } 3329d9ba8f9eSMugunthan V N 3330549985eeSRichard Cochran i++; 33313a27bfacSMugunthan V N if (i == data->slaves) 33323a27bfacSMugunthan V N break; 3333549985eeSRichard Cochran } 3334549985eeSRichard Cochran 33352eb32b0aSMugunthan V N return 0; 33362eb32b0aSMugunthan V N } 33372eb32b0aSMugunthan V N 3338a4e32b0dSJohan Hovold static void cpsw_remove_dt(struct platform_device *pdev) 3339a4e32b0dSJohan Hovold { 33408cbcc466SJohan Hovold struct net_device *ndev = platform_get_drvdata(pdev); 33418cbcc466SJohan Hovold struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 33428cbcc466SJohan Hovold struct cpsw_platform_data *data = &cpsw->data; 33438cbcc466SJohan Hovold struct device_node *node = pdev->dev.of_node; 33448cbcc466SJohan Hovold struct device_node *slave_node; 33458cbcc466SJohan Hovold int i = 0; 33468cbcc466SJohan Hovold 33478cbcc466SJohan Hovold for_each_available_child_of_node(node, slave_node) { 33488cbcc466SJohan Hovold struct cpsw_slave_data *slave_data = &data->slave_data[i]; 33498cbcc466SJohan Hovold 33508cbcc466SJohan Hovold if (strcmp(slave_node->name, "slave")) 33518cbcc466SJohan Hovold continue; 33528cbcc466SJohan Hovold 33533f65047cSJohan Hovold if (of_phy_is_fixed_link(slave_node)) 33543f65047cSJohan Hovold of_phy_deregister_fixed_link(slave_node); 33558cbcc466SJohan Hovold 33568cbcc466SJohan Hovold of_node_put(slave_data->phy_node); 33578cbcc466SJohan Hovold 33588cbcc466SJohan Hovold i++; 33598cbcc466SJohan Hovold if (i == data->slaves) 33608cbcc466SJohan Hovold break; 33618cbcc466SJohan Hovold } 33628cbcc466SJohan Hovold 3363a4e32b0dSJohan Hovold of_platform_depopulate(&pdev->dev); 3364a4e32b0dSJohan Hovold } 3365a4e32b0dSJohan Hovold 336656e31bd8SIvan Khoronzhuk static int cpsw_probe_dual_emac(struct cpsw_priv *priv) 3367d9ba8f9eSMugunthan V N { 3368606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = priv->cpsw; 3369606f3993SIvan Khoronzhuk struct cpsw_platform_data *data = &cpsw->data; 3370d9ba8f9eSMugunthan V N struct net_device *ndev; 3371d9ba8f9eSMugunthan V N struct cpsw_priv *priv_sl2; 3372e38b5a3dSIvan Khoronzhuk int ret = 0; 3373d9ba8f9eSMugunthan V N 3374e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 3375d9ba8f9eSMugunthan V N if (!ndev) { 337656e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error allocating net_device\n"); 3377d9ba8f9eSMugunthan V N return -ENOMEM; 3378d9ba8f9eSMugunthan V N } 3379d9ba8f9eSMugunthan V N 3380d9ba8f9eSMugunthan V N priv_sl2 = netdev_priv(ndev); 3381606f3993SIvan Khoronzhuk priv_sl2->cpsw = cpsw; 3382d9ba8f9eSMugunthan V N priv_sl2->ndev = ndev; 3383d9ba8f9eSMugunthan V N priv_sl2->dev = &ndev->dev; 3384d9ba8f9eSMugunthan V N priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 3385d9ba8f9eSMugunthan V N 3386d9ba8f9eSMugunthan V N if (is_valid_ether_addr(data->slave_data[1].mac_addr)) { 3387d9ba8f9eSMugunthan V N memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr, 3388d9ba8f9eSMugunthan V N ETH_ALEN); 338956e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n", 339056e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 3391d9ba8f9eSMugunthan V N } else { 33926c1f0a1fSJoe Perches eth_random_addr(priv_sl2->mac_addr); 339356e31bd8SIvan Khoronzhuk dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n", 339456e31bd8SIvan Khoronzhuk priv_sl2->mac_addr); 3395d9ba8f9eSMugunthan V N } 3396d9ba8f9eSMugunthan V N memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN); 3397d9ba8f9eSMugunthan V N 3398d9ba8f9eSMugunthan V N priv_sl2->emac_port = 1; 3399606f3993SIvan Khoronzhuk cpsw->slaves[1].ndev = ndev; 3400193736c8SIvan Khoronzhuk ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX; 3401d9ba8f9eSMugunthan V N 3402d9ba8f9eSMugunthan V N ndev->netdev_ops = &cpsw_netdev_ops; 34037ad24ea4SWilfried Klaebe ndev->ethtool_ops = &cpsw_ethtool_ops; 3404d9ba8f9eSMugunthan V N 3405d9ba8f9eSMugunthan V N /* register the network device */ 340656e31bd8SIvan Khoronzhuk SET_NETDEV_DEV(ndev, cpsw->dev); 3407d9ba8f9eSMugunthan V N ret = register_netdev(ndev); 3408d9ba8f9eSMugunthan V N if (ret) { 340956e31bd8SIvan Khoronzhuk dev_err(cpsw->dev, "cpsw: error registering net device\n"); 3410d9ba8f9eSMugunthan V N free_netdev(ndev); 3411d9ba8f9eSMugunthan V N ret = -ENODEV; 3412d9ba8f9eSMugunthan V N } 3413d9ba8f9eSMugunthan V N 3414d9ba8f9eSMugunthan V N return ret; 3415d9ba8f9eSMugunthan V N } 3416d9ba8f9eSMugunthan V N 34177da11600SMugunthan V N static const struct of_device_id cpsw_of_mtable[] = { 34189611d6d6SIvan Khoronzhuk { .compatible = "ti,cpsw"}, 34199611d6d6SIvan Khoronzhuk { .compatible = "ti,am335x-cpsw"}, 34209611d6d6SIvan Khoronzhuk { .compatible = "ti,am4372-cpsw"}, 34219611d6d6SIvan Khoronzhuk { .compatible = "ti,dra7-cpsw"}, 34227da11600SMugunthan V N { /* sentinel */ }, 34237da11600SMugunthan V N }; 34247da11600SMugunthan V N MODULE_DEVICE_TABLE(of, cpsw_of_mtable); 34257da11600SMugunthan V N 34269611d6d6SIvan Khoronzhuk static const struct soc_device_attribute cpsw_soc_devices[] = { 34279611d6d6SIvan Khoronzhuk { .family = "AM33xx", .revision = "ES1.0"}, 34289611d6d6SIvan Khoronzhuk { /* sentinel */ } 34299611d6d6SIvan Khoronzhuk }; 34309611d6d6SIvan Khoronzhuk 3431663e12e6SBill Pemberton static int cpsw_probe(struct platform_device *pdev) 3432df828598SMugunthan V N { 3433ef4183a1SIvan Khoronzhuk struct clk *clk; 3434d1bd9acfSSebastian Siewior struct cpsw_platform_data *data; 3435df828598SMugunthan V N struct net_device *ndev; 3436df828598SMugunthan V N struct cpsw_priv *priv; 3437df828598SMugunthan V N struct cpdma_params dma_params; 3438df828598SMugunthan V N struct cpsw_ale_params ale_params; 3439aa1a15e2SDaniel Mack void __iomem *ss_regs; 34408a2c9a5aSGrygorii Strashko void __iomem *cpts_regs; 3441aa1a15e2SDaniel Mack struct resource *res, *ss_res; 34421d147ccbSMugunthan V N struct gpio_descs *mode; 3443549985eeSRichard Cochran u32 slave_offset, sliver_offset, slave_size; 34449611d6d6SIvan Khoronzhuk const struct soc_device_attribute *soc; 3445649a1688SIvan Khoronzhuk struct cpsw_common *cpsw; 344679b3325dSIvan Khoronzhuk int ret = 0, i, ch; 34475087b915SFelipe Balbi int irq; 3448df828598SMugunthan V N 3449649a1688SIvan Khoronzhuk cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL); 34503420ea88SJohan Hovold if (!cpsw) 34513420ea88SJohan Hovold return -ENOMEM; 34523420ea88SJohan Hovold 345356e31bd8SIvan Khoronzhuk cpsw->dev = &pdev->dev; 3454649a1688SIvan Khoronzhuk 3455e05107e6SIvan Khoronzhuk ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES); 3456df828598SMugunthan V N if (!ndev) { 345788c99ff6SGeorge Cherian dev_err(&pdev->dev, "error allocating net_device\n"); 3458df828598SMugunthan V N return -ENOMEM; 3459df828598SMugunthan V N } 3460df828598SMugunthan V N 3461df828598SMugunthan V N platform_set_drvdata(pdev, ndev); 3462df828598SMugunthan V N priv = netdev_priv(ndev); 3463649a1688SIvan Khoronzhuk priv->cpsw = cpsw; 3464df828598SMugunthan V N priv->ndev = ndev; 3465df828598SMugunthan V N priv->dev = &ndev->dev; 3466df828598SMugunthan V N priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); 34672a05a622SIvan Khoronzhuk cpsw->rx_packet_max = max(rx_packet_max, 128); 3468df828598SMugunthan V N 34691d147ccbSMugunthan V N mode = devm_gpiod_get_array_optional(&pdev->dev, "mode", GPIOD_OUT_LOW); 34701d147ccbSMugunthan V N if (IS_ERR(mode)) { 34711d147ccbSMugunthan V N ret = PTR_ERR(mode); 34721d147ccbSMugunthan V N dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret); 34731d147ccbSMugunthan V N goto clean_ndev_ret; 34741d147ccbSMugunthan V N } 34751d147ccbSMugunthan V N 34761fb19aa7SVaibhav Hiremath /* 34771fb19aa7SVaibhav Hiremath * This may be required here for child devices. 34781fb19aa7SVaibhav Hiremath */ 34791fb19aa7SVaibhav Hiremath pm_runtime_enable(&pdev->dev); 34801fb19aa7SVaibhav Hiremath 3481739683b4SMugunthan V N /* Select default pin state */ 3482739683b4SMugunthan V N pinctrl_pm_select_default_state(&pdev->dev); 3483739683b4SMugunthan V N 3484a4e32b0dSJohan Hovold /* Need to enable clocks with runtime PM api to access module 3485a4e32b0dSJohan Hovold * registers 3486a4e32b0dSJohan Hovold */ 3487a4e32b0dSJohan Hovold ret = pm_runtime_get_sync(&pdev->dev); 3488a4e32b0dSJohan Hovold if (ret < 0) { 3489a4e32b0dSJohan Hovold pm_runtime_put_noidle(&pdev->dev); 3490aa1a15e2SDaniel Mack goto clean_runtime_disable_ret; 34912eb32b0aSMugunthan V N } 3492a4e32b0dSJohan Hovold 349323a09873SJohan Hovold ret = cpsw_probe_dt(&cpsw->data, pdev); 349423a09873SJohan Hovold if (ret) 3495a4e32b0dSJohan Hovold goto clean_dt_ret; 349623a09873SJohan Hovold 3497606f3993SIvan Khoronzhuk data = &cpsw->data; 3498e05107e6SIvan Khoronzhuk cpsw->rx_ch_num = 1; 3499e05107e6SIvan Khoronzhuk cpsw->tx_ch_num = 1; 35002eb32b0aSMugunthan V N 3501df828598SMugunthan V N if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { 3502df828598SMugunthan V N memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); 350388c99ff6SGeorge Cherian dev_info(&pdev->dev, "Detected MACID = %pM\n", priv->mac_addr); 3504df828598SMugunthan V N } else { 35057efd26d0SJoe Perches eth_random_addr(priv->mac_addr); 350688c99ff6SGeorge Cherian dev_info(&pdev->dev, "Random MACID = %pM\n", priv->mac_addr); 3507df828598SMugunthan V N } 3508df828598SMugunthan V N 3509df828598SMugunthan V N memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); 3510df828598SMugunthan V N 3511a86854d0SKees Cook cpsw->slaves = devm_kcalloc(&pdev->dev, 3512a86854d0SKees Cook data->slaves, sizeof(struct cpsw_slave), 3513df828598SMugunthan V N GFP_KERNEL); 3514606f3993SIvan Khoronzhuk if (!cpsw->slaves) { 3515aa1a15e2SDaniel Mack ret = -ENOMEM; 3516a4e32b0dSJohan Hovold goto clean_dt_ret; 3517df828598SMugunthan V N } 3518df828598SMugunthan V N for (i = 0; i < data->slaves; i++) 3519606f3993SIvan Khoronzhuk cpsw->slaves[i].slave_num = i; 3520df828598SMugunthan V N 3521606f3993SIvan Khoronzhuk cpsw->slaves[0].ndev = ndev; 3522d9ba8f9eSMugunthan V N priv->emac_port = 0; 3523d9ba8f9eSMugunthan V N 3524ef4183a1SIvan Khoronzhuk clk = devm_clk_get(&pdev->dev, "fck"); 3525ef4183a1SIvan Khoronzhuk if (IS_ERR(clk)) { 3526aa1a15e2SDaniel Mack dev_err(priv->dev, "fck is not found\n"); 3527f150bd7fSMugunthan V N ret = -ENODEV; 3528a4e32b0dSJohan Hovold goto clean_dt_ret; 3529df828598SMugunthan V N } 35302a05a622SIvan Khoronzhuk cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000; 3531df828598SMugunthan V N 3532aa1a15e2SDaniel Mack ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 3533aa1a15e2SDaniel Mack ss_regs = devm_ioremap_resource(&pdev->dev, ss_res); 3534aa1a15e2SDaniel Mack if (IS_ERR(ss_regs)) { 3535aa1a15e2SDaniel Mack ret = PTR_ERR(ss_regs); 3536a4e32b0dSJohan Hovold goto clean_dt_ret; 3537df828598SMugunthan V N } 35385d8d0d4dSIvan Khoronzhuk cpsw->regs = ss_regs; 3539df828598SMugunthan V N 35402a05a622SIvan Khoronzhuk cpsw->version = readl(&cpsw->regs->id_ver); 3541f280e89aSMugunthan V N 3542aa1a15e2SDaniel Mack res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 35435d8d0d4dSIvan Khoronzhuk cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res); 35445d8d0d4dSIvan Khoronzhuk if (IS_ERR(cpsw->wr_regs)) { 35455d8d0d4dSIvan Khoronzhuk ret = PTR_ERR(cpsw->wr_regs); 3546a4e32b0dSJohan Hovold goto clean_dt_ret; 3547df828598SMugunthan V N } 3548df828598SMugunthan V N 3549df828598SMugunthan V N memset(&dma_params, 0, sizeof(dma_params)); 3550549985eeSRichard Cochran memset(&ale_params, 0, sizeof(ale_params)); 3551549985eeSRichard Cochran 35522a05a622SIvan Khoronzhuk switch (cpsw->version) { 3553549985eeSRichard Cochran case CPSW_VERSION_1: 35545d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET; 35558a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW1_CPTS_OFFSET; 35565d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW1_HW_STATS; 3557549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET; 3558549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET; 3559549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET; 3560549985eeSRichard Cochran slave_offset = CPSW1_SLAVE_OFFSET; 3561549985eeSRichard Cochran slave_size = CPSW1_SLAVE_SIZE; 3562549985eeSRichard Cochran sliver_offset = CPSW1_SLIVER_OFFSET; 3563549985eeSRichard Cochran dma_params.desc_mem_phys = 0; 3564549985eeSRichard Cochran break; 3565549985eeSRichard Cochran case CPSW_VERSION_2: 3566c193f365SMugunthan V N case CPSW_VERSION_3: 3567926489beSMugunthan V N case CPSW_VERSION_4: 35685d8d0d4dSIvan Khoronzhuk cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET; 35698a2c9a5aSGrygorii Strashko cpts_regs = ss_regs + CPSW2_CPTS_OFFSET; 35705d8d0d4dSIvan Khoronzhuk cpsw->hw_stats = ss_regs + CPSW2_HW_STATS; 3571549985eeSRichard Cochran dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET; 3572549985eeSRichard Cochran dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET; 3573549985eeSRichard Cochran ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET; 3574549985eeSRichard Cochran slave_offset = CPSW2_SLAVE_OFFSET; 3575549985eeSRichard Cochran slave_size = CPSW2_SLAVE_SIZE; 3576549985eeSRichard Cochran sliver_offset = CPSW2_SLIVER_OFFSET; 3577549985eeSRichard Cochran dma_params.desc_mem_phys = 3578aa1a15e2SDaniel Mack (u32 __force) ss_res->start + CPSW2_BD_OFFSET; 3579549985eeSRichard Cochran break; 3580549985eeSRichard Cochran default: 35812a05a622SIvan Khoronzhuk dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version); 3582549985eeSRichard Cochran ret = -ENODEV; 3583a4e32b0dSJohan Hovold goto clean_dt_ret; 3584549985eeSRichard Cochran } 3585606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3586606f3993SIvan Khoronzhuk struct cpsw_slave *slave = &cpsw->slaves[i]; 3587606f3993SIvan Khoronzhuk 3588606f3993SIvan Khoronzhuk cpsw_slave_init(slave, cpsw, slave_offset, sliver_offset); 3589549985eeSRichard Cochran slave_offset += slave_size; 3590549985eeSRichard Cochran sliver_offset += SLIVER_SIZE; 3591549985eeSRichard Cochran } 3592549985eeSRichard Cochran 3593df828598SMugunthan V N dma_params.dev = &pdev->dev; 3594549985eeSRichard Cochran dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH; 3595549985eeSRichard Cochran dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE; 3596549985eeSRichard Cochran dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP; 3597549985eeSRichard Cochran dma_params.txcp = dma_params.txhdp + CPDMA_TXCP; 3598549985eeSRichard Cochran dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP; 3599df828598SMugunthan V N 3600df828598SMugunthan V N dma_params.num_chan = data->channels; 3601df828598SMugunthan V N dma_params.has_soft_reset = true; 3602df828598SMugunthan V N dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; 3603df828598SMugunthan V N dma_params.desc_mem_size = data->bd_ram_size; 3604df828598SMugunthan V N dma_params.desc_align = 16; 3605df828598SMugunthan V N dma_params.has_ext_regs = true; 3606549985eeSRichard Cochran dma_params.desc_hw_addr = dma_params.desc_mem_phys; 360783fcad0cSIvan Khoronzhuk dma_params.bus_freq_mhz = cpsw->bus_freq_mhz; 360890225bf0SGrygorii Strashko dma_params.descs_pool_size = descs_pool_size; 3609df828598SMugunthan V N 36102c836bd9SIvan Khoronzhuk cpsw->dma = cpdma_ctlr_create(&dma_params); 36112c836bd9SIvan Khoronzhuk if (!cpsw->dma) { 3612df828598SMugunthan V N dev_err(priv->dev, "error initializing dma\n"); 3613df828598SMugunthan V N ret = -ENOMEM; 3614a4e32b0dSJohan Hovold goto clean_dt_ret; 3615df828598SMugunthan V N } 3616df828598SMugunthan V N 36179611d6d6SIvan Khoronzhuk soc = soc_device_match(cpsw_soc_devices); 36189611d6d6SIvan Khoronzhuk if (soc) 36199611d6d6SIvan Khoronzhuk cpsw->quirk_irq = 1; 36209611d6d6SIvan Khoronzhuk 362179b3325dSIvan Khoronzhuk ch = cpsw->quirk_irq ? 0 : 7; 362279b3325dSIvan Khoronzhuk cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, ch, cpsw_tx_handler, 0); 36238a83c5d7SIvan Khoronzhuk if (IS_ERR(cpsw->txv[0].ch)) { 36248a83c5d7SIvan Khoronzhuk dev_err(priv->dev, "error initializing tx dma channel\n"); 36258a83c5d7SIvan Khoronzhuk ret = PTR_ERR(cpsw->txv[0].ch); 36268a83c5d7SIvan Khoronzhuk goto clean_dma_ret; 36278a83c5d7SIvan Khoronzhuk } 36288a83c5d7SIvan Khoronzhuk 36298feb0a19SIvan Khoronzhuk cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1); 36308a83c5d7SIvan Khoronzhuk if (IS_ERR(cpsw->rxv[0].ch)) { 36318a83c5d7SIvan Khoronzhuk dev_err(priv->dev, "error initializing rx dma channel\n"); 36328a83c5d7SIvan Khoronzhuk ret = PTR_ERR(cpsw->rxv[0].ch); 3633df828598SMugunthan V N goto clean_dma_ret; 3634df828598SMugunthan V N } 3635df828598SMugunthan V N 36369fe9aa0bSIvan Khoronzhuk ale_params.dev = &pdev->dev; 3637df828598SMugunthan V N ale_params.ale_ageout = ale_ageout; 3638df828598SMugunthan V N ale_params.ale_entries = data->ale_entries; 3639c6395f12SGrygorii Strashko ale_params.ale_ports = CPSW_ALE_PORTS_NUM; 3640df828598SMugunthan V N 36412a05a622SIvan Khoronzhuk cpsw->ale = cpsw_ale_create(&ale_params); 36422a05a622SIvan Khoronzhuk if (!cpsw->ale) { 3643df828598SMugunthan V N dev_err(priv->dev, "error initializing ale engine\n"); 3644df828598SMugunthan V N ret = -ENODEV; 3645df828598SMugunthan V N goto clean_dma_ret; 3646df828598SMugunthan V N } 3647df828598SMugunthan V N 36484a88fb95SGrygorii Strashko cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node); 36498a2c9a5aSGrygorii Strashko if (IS_ERR(cpsw->cpts)) { 36508a2c9a5aSGrygorii Strashko ret = PTR_ERR(cpsw->cpts); 36511971ab58SGrygorii Strashko goto clean_dma_ret; 36528a2c9a5aSGrygorii Strashko } 36538a2c9a5aSGrygorii Strashko 3654c03abd84SFelipe Balbi ndev->irq = platform_get_irq(pdev, 1); 3655df828598SMugunthan V N if (ndev->irq < 0) { 3656df828598SMugunthan V N dev_err(priv->dev, "error getting irq resource\n"); 3657c1e3334fSJulia Lawall ret = ndev->irq; 36581971ab58SGrygorii Strashko goto clean_dma_ret; 3659df828598SMugunthan V N } 3660df828598SMugunthan V N 3661a3a41d2fSGrygorii Strashko ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX; 3662070f9c65SKeerthy 3663070f9c65SKeerthy ndev->netdev_ops = &cpsw_netdev_ops; 3664070f9c65SKeerthy ndev->ethtool_ops = &cpsw_ethtool_ops; 36659611d6d6SIvan Khoronzhuk netif_napi_add(ndev, &cpsw->napi_rx, 36669611d6d6SIvan Khoronzhuk cpsw->quirk_irq ? cpsw_rx_poll : cpsw_rx_mq_poll, 36679611d6d6SIvan Khoronzhuk CPSW_POLL_WEIGHT); 36689611d6d6SIvan Khoronzhuk netif_tx_napi_add(ndev, &cpsw->napi_tx, 36699611d6d6SIvan Khoronzhuk cpsw->quirk_irq ? cpsw_tx_poll : cpsw_tx_mq_poll, 36709611d6d6SIvan Khoronzhuk CPSW_POLL_WEIGHT); 3671070f9c65SKeerthy cpsw_split_res(ndev); 3672070f9c65SKeerthy 3673070f9c65SKeerthy /* register the network device */ 3674070f9c65SKeerthy SET_NETDEV_DEV(ndev, &pdev->dev); 3675070f9c65SKeerthy ret = register_netdev(ndev); 3676070f9c65SKeerthy if (ret) { 3677070f9c65SKeerthy dev_err(priv->dev, "error registering net device\n"); 3678070f9c65SKeerthy ret = -ENODEV; 36791971ab58SGrygorii Strashko goto clean_dma_ret; 3680070f9c65SKeerthy } 3681070f9c65SKeerthy 3682070f9c65SKeerthy if (cpsw->data.dual_emac) { 3683070f9c65SKeerthy ret = cpsw_probe_dual_emac(priv); 3684070f9c65SKeerthy if (ret) { 3685070f9c65SKeerthy cpsw_err(priv, probe, "error probe slave 2 emac interface\n"); 3686070f9c65SKeerthy goto clean_unregister_netdev_ret; 3687070f9c65SKeerthy } 3688070f9c65SKeerthy } 3689070f9c65SKeerthy 3690c03abd84SFelipe Balbi /* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and 3691c03abd84SFelipe Balbi * MISC IRQs which are always kept disabled with this driver so 3692c03abd84SFelipe Balbi * we will not request them. 3693c03abd84SFelipe Balbi * 3694c03abd84SFelipe Balbi * If anyone wants to implement support for those, make sure to 3695c03abd84SFelipe Balbi * first request and append them to irqs_table array. 3696c03abd84SFelipe Balbi */ 3697c2b32e58SDaniel Mack 3698c03abd84SFelipe Balbi /* RX IRQ */ 36995087b915SFelipe Balbi irq = platform_get_irq(pdev, 1); 3700c1e3334fSJulia Lawall if (irq < 0) { 3701c1e3334fSJulia Lawall ret = irq; 37021971ab58SGrygorii Strashko goto clean_dma_ret; 3703c1e3334fSJulia Lawall } 37045087b915SFelipe Balbi 3705e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[0] = irq; 3706c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_rx_interrupt, 3707dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 37085087b915SFelipe Balbi if (ret < 0) { 37095087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 37101971ab58SGrygorii Strashko goto clean_dma_ret; 3711df828598SMugunthan V N } 3712df828598SMugunthan V N 3713c03abd84SFelipe Balbi /* TX IRQ */ 37145087b915SFelipe Balbi irq = platform_get_irq(pdev, 2); 3715c1e3334fSJulia Lawall if (irq < 0) { 3716c1e3334fSJulia Lawall ret = irq; 37171971ab58SGrygorii Strashko goto clean_dma_ret; 3718c1e3334fSJulia Lawall } 37195087b915SFelipe Balbi 3720e38b5a3dSIvan Khoronzhuk cpsw->irqs_table[1] = irq; 3721c03abd84SFelipe Balbi ret = devm_request_irq(&pdev->dev, irq, cpsw_tx_interrupt, 3722dbc4ec52SIvan Khoronzhuk 0, dev_name(&pdev->dev), cpsw); 37235087b915SFelipe Balbi if (ret < 0) { 37245087b915SFelipe Balbi dev_err(priv->dev, "error attaching irq (%d)\n", ret); 37251971ab58SGrygorii Strashko goto clean_dma_ret; 37265087b915SFelipe Balbi } 3727c2b32e58SDaniel Mack 372890225bf0SGrygorii Strashko cpsw_notice(priv, probe, 372990225bf0SGrygorii Strashko "initialized device (regs %pa, irq %d, pool size %d)\n", 373090225bf0SGrygorii Strashko &ss_res->start, ndev->irq, dma_params.descs_pool_size); 3731d9ba8f9eSMugunthan V N 3732c46ab7e0SJohan Hovold pm_runtime_put(&pdev->dev); 3733c46ab7e0SJohan Hovold 3734df828598SMugunthan V N return 0; 3735df828598SMugunthan V N 3736a7fe9d46SJohan Hovold clean_unregister_netdev_ret: 3737a7fe9d46SJohan Hovold unregister_netdev(ndev); 3738df828598SMugunthan V N clean_dma_ret: 37392c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3740a4e32b0dSJohan Hovold clean_dt_ret: 3741a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 3742c46ab7e0SJohan Hovold pm_runtime_put_sync(&pdev->dev); 3743aa1a15e2SDaniel Mack clean_runtime_disable_ret: 3744f150bd7fSMugunthan V N pm_runtime_disable(&pdev->dev); 3745df828598SMugunthan V N clean_ndev_ret: 3746d1bd9acfSSebastian Siewior free_netdev(priv->ndev); 3747df828598SMugunthan V N return ret; 3748df828598SMugunthan V N } 3749df828598SMugunthan V N 3750663e12e6SBill Pemberton static int cpsw_remove(struct platform_device *pdev) 3751df828598SMugunthan V N { 3752df828598SMugunthan V N struct net_device *ndev = platform_get_drvdata(pdev); 37532a05a622SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 37548a0b6dc9SGrygorii Strashko int ret; 37558a0b6dc9SGrygorii Strashko 37568a0b6dc9SGrygorii Strashko ret = pm_runtime_get_sync(&pdev->dev); 37578a0b6dc9SGrygorii Strashko if (ret < 0) { 37588a0b6dc9SGrygorii Strashko pm_runtime_put_noidle(&pdev->dev); 37598a0b6dc9SGrygorii Strashko return ret; 37608a0b6dc9SGrygorii Strashko } 3761df828598SMugunthan V N 3762606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3763606f3993SIvan Khoronzhuk unregister_netdev(cpsw->slaves[1].ndev); 3764d1bd9acfSSebastian Siewior unregister_netdev(ndev); 3765df828598SMugunthan V N 37668a2c9a5aSGrygorii Strashko cpts_release(cpsw->cpts); 37672c836bd9SIvan Khoronzhuk cpdma_ctlr_destroy(cpsw->dma); 3768a4e32b0dSJohan Hovold cpsw_remove_dt(pdev); 37698a0b6dc9SGrygorii Strashko pm_runtime_put_sync(&pdev->dev); 37708a0b6dc9SGrygorii Strashko pm_runtime_disable(&pdev->dev); 3771606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) 3772606f3993SIvan Khoronzhuk free_netdev(cpsw->slaves[1].ndev); 3773df828598SMugunthan V N free_netdev(ndev); 3774df828598SMugunthan V N return 0; 3775df828598SMugunthan V N } 3776df828598SMugunthan V N 37778963a504SGrygorii Strashko #ifdef CONFIG_PM_SLEEP 3778df828598SMugunthan V N static int cpsw_suspend(struct device *dev) 3779df828598SMugunthan V N { 37804e13c252SWolfram Sang struct net_device *ndev = dev_get_drvdata(dev); 3781606f3993SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3782df828598SMugunthan V N 3783606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3784618073e3SMugunthan V N int i; 3785618073e3SMugunthan V N 3786606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3787606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3788606f3993SIvan Khoronzhuk cpsw_ndo_stop(cpsw->slaves[i].ndev); 3789618073e3SMugunthan V N } 3790618073e3SMugunthan V N } else { 3791df828598SMugunthan V N if (netif_running(ndev)) 3792df828598SMugunthan V N cpsw_ndo_stop(ndev); 3793618073e3SMugunthan V N } 37941e7a2e21SDaniel Mack 3795739683b4SMugunthan V N /* Select sleep pin state */ 379656e31bd8SIvan Khoronzhuk pinctrl_pm_select_sleep_state(dev); 3797739683b4SMugunthan V N 3798df828598SMugunthan V N return 0; 3799df828598SMugunthan V N } 3800df828598SMugunthan V N 3801df828598SMugunthan V N static int cpsw_resume(struct device *dev) 3802df828598SMugunthan V N { 38034e13c252SWolfram Sang struct net_device *ndev = dev_get_drvdata(dev); 3804a60ced99SIvan Khoronzhuk struct cpsw_common *cpsw = ndev_to_cpsw(ndev); 3805df828598SMugunthan V N 3806739683b4SMugunthan V N /* Select default pin state */ 380756e31bd8SIvan Khoronzhuk pinctrl_pm_select_default_state(dev); 3808739683b4SMugunthan V N 38094ccfd638SGrygorii Strashko /* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */ 38104ccfd638SGrygorii Strashko rtnl_lock(); 3811606f3993SIvan Khoronzhuk if (cpsw->data.dual_emac) { 3812618073e3SMugunthan V N int i; 3813618073e3SMugunthan V N 3814606f3993SIvan Khoronzhuk for (i = 0; i < cpsw->data.slaves; i++) { 3815606f3993SIvan Khoronzhuk if (netif_running(cpsw->slaves[i].ndev)) 3816606f3993SIvan Khoronzhuk cpsw_ndo_open(cpsw->slaves[i].ndev); 3817618073e3SMugunthan V N } 3818618073e3SMugunthan V N } else { 3819df828598SMugunthan V N if (netif_running(ndev)) 3820df828598SMugunthan V N cpsw_ndo_open(ndev); 3821618073e3SMugunthan V N } 38224ccfd638SGrygorii Strashko rtnl_unlock(); 38234ccfd638SGrygorii Strashko 3824df828598SMugunthan V N return 0; 3825df828598SMugunthan V N } 38268963a504SGrygorii Strashko #endif 3827df828598SMugunthan V N 38288963a504SGrygorii Strashko static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume); 3829df828598SMugunthan V N 3830df828598SMugunthan V N static struct platform_driver cpsw_driver = { 3831df828598SMugunthan V N .driver = { 3832df828598SMugunthan V N .name = "cpsw", 3833df828598SMugunthan V N .pm = &cpsw_pm_ops, 38341e5c76d4SSachin Kamat .of_match_table = cpsw_of_mtable, 3835df828598SMugunthan V N }, 3836df828598SMugunthan V N .probe = cpsw_probe, 3837663e12e6SBill Pemberton .remove = cpsw_remove, 3838df828598SMugunthan V N }; 3839df828598SMugunthan V N 38406fb3b6b5SGrygorii Strashko module_platform_driver(cpsw_driver); 3841df828598SMugunthan V N 3842df828598SMugunthan V N MODULE_LICENSE("GPL"); 3843df828598SMugunthan V N MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); 3844df828598SMugunthan V N MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); 3845df828598SMugunthan V N MODULE_DESCRIPTION("TI CPSW Ethernet driver"); 3846