1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  */
5 
6 #ifndef AM65_CPSW_NUSS_H_
7 #define AM65_CPSW_NUSS_H_
8 
9 #include <linux/if_ether.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/netdevice.h>
13 #include <linux/phylink.h>
14 #include <linux/platform_device.h>
15 #include <linux/soc/ti/k3-ringacc.h>
16 #include <net/devlink.h>
17 #include "am65-cpsw-qos.h"
18 
19 struct am65_cpts;
20 
21 #define HOST_PORT_NUM		0
22 
23 #define AM65_CPSW_MAX_TX_QUEUES	8
24 #define AM65_CPSW_MAX_RX_QUEUES	1
25 #define AM65_CPSW_MAX_RX_FLOWS	1
26 
27 #define AM65_CPSW_PORT_VLAN_REG_OFFSET	0x014
28 
29 struct am65_cpsw_slave_data {
30 	bool				mac_only;
31 	struct cpsw_sl			*mac_sl;
32 	struct device_node		*phy_node;
33 	phy_interface_t			phy_if;
34 	struct phy			*ifphy;
35 	bool				rx_pause;
36 	bool				tx_pause;
37 	u8				mac_addr[ETH_ALEN];
38 	int				port_vlan;
39 	struct phylink			*phylink;
40 	struct phylink_config		phylink_config;
41 };
42 
43 struct am65_cpsw_port {
44 	struct am65_cpsw_common		*common;
45 	struct net_device		*ndev;
46 	const char			*name;
47 	u32				port_id;
48 	void __iomem			*port_base;
49 	void __iomem			*sgmii_base;
50 	void __iomem			*stat_base;
51 	void __iomem			*fetch_ram_base;
52 	bool				disabled;
53 	struct am65_cpsw_slave_data	slave;
54 	bool				tx_ts_enabled;
55 	bool				rx_ts_enabled;
56 	struct am65_cpsw_qos		qos;
57 	struct devlink_port		devlink_port;
58 	/* Only for suspend resume context */
59 	u32				vid_context;
60 };
61 
62 struct am65_cpsw_host {
63 	struct am65_cpsw_common		*common;
64 	void __iomem			*port_base;
65 	void __iomem			*stat_base;
66 	/* Only for suspend resume context */
67 	u32				vid_context;
68 };
69 
70 struct am65_cpsw_tx_chn {
71 	struct device *dma_dev;
72 	struct napi_struct napi_tx;
73 	struct am65_cpsw_common	*common;
74 	struct k3_cppi_desc_pool *desc_pool;
75 	struct k3_udma_glue_tx_channel *tx_chn;
76 	spinlock_t lock; /* protect TX rings in multi-port mode */
77 	int irq;
78 	u32 id;
79 	u32 descs_num;
80 	char tx_chn_name[128];
81 };
82 
83 struct am65_cpsw_rx_chn {
84 	struct device *dev;
85 	struct device *dma_dev;
86 	struct k3_cppi_desc_pool *desc_pool;
87 	struct k3_udma_glue_rx_channel *rx_chn;
88 	u32 descs_num;
89 	int irq;
90 };
91 
92 #define AM65_CPSW_QUIRK_I2027_NO_TX_CSUM BIT(0)
93 
94 struct am65_cpsw_pdata {
95 	u32	quirks;
96 	u64	extra_modes;
97 	enum k3_ring_mode fdqring_mode;
98 	const char	*ale_dev_id;
99 };
100 
101 enum cpsw_devlink_param_id {
102 	AM65_CPSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
103 	AM65_CPSW_DL_PARAM_SWITCH_MODE,
104 };
105 
106 struct am65_cpsw_devlink {
107 	struct am65_cpsw_common *common;
108 };
109 
110 struct am65_cpsw_common {
111 	struct device		*dev;
112 	struct device		*mdio_dev;
113 	struct am65_cpsw_pdata	pdata;
114 
115 	void __iomem		*ss_base;
116 	void __iomem		*cpsw_base;
117 
118 	u32			port_num;
119 	struct am65_cpsw_host   host;
120 	struct am65_cpsw_port	*ports;
121 	u32			disabled_ports_mask;
122 	struct net_device	*dma_ndev;
123 
124 	int			usage_count; /* number of opened ports */
125 	struct cpsw_ale		*ale;
126 	int			tx_ch_num;
127 	u32			rx_flow_id_base;
128 
129 	struct am65_cpsw_tx_chn	tx_chns[AM65_CPSW_MAX_TX_QUEUES];
130 	struct completion	tdown_complete;
131 	atomic_t		tdown_cnt;
132 
133 	struct am65_cpsw_rx_chn	rx_chns;
134 	struct napi_struct	napi_rx;
135 
136 	bool			rx_irq_disabled;
137 
138 	u32			nuss_ver;
139 	u32			cpsw_ver;
140 	unsigned long		bus_freq;
141 	bool			pf_p0_rx_ptype_rrobin;
142 	struct am65_cpts	*cpts;
143 	int			est_enabled;
144 
145 	bool		is_emac_mode;
146 	u16			br_members;
147 	int			default_vlan;
148 	struct devlink *devlink;
149 	struct net_device *hw_bridge_dev;
150 	struct notifier_block am65_cpsw_netdevice_nb;
151 	unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN];
152 	/* only for suspend/resume context restore */
153 	u32			*ale_context;
154 };
155 
156 struct am65_cpsw_ndev_stats {
157 	u64 tx_packets;
158 	u64 tx_bytes;
159 	u64 rx_packets;
160 	u64 rx_bytes;
161 	struct u64_stats_sync syncp;
162 };
163 
164 struct am65_cpsw_ndev_priv {
165 	u32			msg_enable;
166 	struct am65_cpsw_port	*port;
167 	struct am65_cpsw_ndev_stats __percpu *stats;
168 	bool offload_fwd_mark;
169 };
170 
171 #define am65_ndev_to_priv(ndev) \
172 	((struct am65_cpsw_ndev_priv *)netdev_priv(ndev))
173 #define am65_ndev_to_port(ndev) (am65_ndev_to_priv(ndev)->port)
174 #define am65_ndev_to_common(ndev) (am65_ndev_to_port(ndev)->common)
175 #define am65_ndev_to_slave(ndev) (&am65_ndev_to_port(ndev)->slave)
176 
177 #define am65_common_get_host(common) (&(common)->host)
178 #define am65_common_get_port(common, id) (&(common)->ports[(id) - 1])
179 
180 #define am65_cpsw_napi_to_common(pnapi) \
181 	container_of(pnapi, struct am65_cpsw_common, napi_rx)
182 #define am65_cpsw_napi_to_tx_chn(pnapi) \
183 	container_of(pnapi, struct am65_cpsw_tx_chn, napi_tx)
184 
185 #define AM65_CPSW_DRV_NAME "am65-cpsw-nuss"
186 
187 #define AM65_CPSW_IS_CPSW2G(common) ((common)->port_num == 1)
188 
189 extern const struct ethtool_ops am65_cpsw_ethtool_ops_slave;
190 
191 void am65_cpsw_nuss_adjust_link(struct net_device *ndev);
192 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common);
193 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common);
194 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx);
195 
196 bool am65_cpsw_port_dev_check(const struct net_device *dev);
197 
198 #endif /* AM65_CPSW_NUSS_H_ */
199