1 // SPDX-License-Identifier: GPL-2.0 2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver 3 * 4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 */ 7 8 #include <linux/etherdevice.h> 9 #include <linux/if_vlan.h> 10 #include <linux/interrupt.h> 11 #include <linux/kernel.h> 12 #include <linux/kmemleak.h> 13 #include <linux/module.h> 14 #include <linux/netdevice.h> 15 #include <linux/net_tstamp.h> 16 #include <linux/of.h> 17 #include <linux/of_mdio.h> 18 #include <linux/of_net.h> 19 #include <linux/of_device.h> 20 #include <linux/phy.h> 21 #include <linux/phy/phy.h> 22 #include <linux/platform_device.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/regmap.h> 25 #include <linux/mfd/syscon.h> 26 #include <linux/sys_soc.h> 27 #include <linux/dma/ti-cppi5.h> 28 #include <linux/dma/k3-udma-glue.h> 29 30 #include "cpsw_ale.h" 31 #include "cpsw_sl.h" 32 #include "am65-cpsw-nuss.h" 33 #include "k3-cppi-desc-pool.h" 34 #include "am65-cpts.h" 35 36 #define AM65_CPSW_SS_BASE 0x0 37 #define AM65_CPSW_SGMII_BASE 0x100 38 #define AM65_CPSW_XGMII_BASE 0x2100 39 #define AM65_CPSW_CPSW_NU_BASE 0x20000 40 #define AM65_CPSW_NU_PORTS_BASE 0x1000 41 #define AM65_CPSW_NU_FRAM_BASE 0x12000 42 #define AM65_CPSW_NU_STATS_BASE 0x1a000 43 #define AM65_CPSW_NU_ALE_BASE 0x1e000 44 #define AM65_CPSW_NU_CPTS_BASE 0x1d000 45 46 #define AM65_CPSW_NU_PORTS_OFFSET 0x1000 47 #define AM65_CPSW_NU_STATS_PORT_OFFSET 0x200 48 #define AM65_CPSW_NU_FRAM_PORT_OFFSET 0x200 49 50 #define AM65_CPSW_MAX_PORTS 8 51 52 #define AM65_CPSW_MIN_PACKET_SIZE VLAN_ETH_ZLEN 53 #define AM65_CPSW_MAX_PACKET_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) 54 55 #define AM65_CPSW_REG_CTL 0x004 56 #define AM65_CPSW_REG_STAT_PORT_EN 0x014 57 #define AM65_CPSW_REG_PTYPE 0x018 58 59 #define AM65_CPSW_P0_REG_CTL 0x004 60 #define AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET 0x008 61 62 #define AM65_CPSW_PORT_REG_PRI_CTL 0x01c 63 #define AM65_CPSW_PORT_REG_RX_PRI_MAP 0x020 64 #define AM65_CPSW_PORT_REG_RX_MAXLEN 0x024 65 66 #define AM65_CPSW_PORTN_REG_SA_L 0x308 67 #define AM65_CPSW_PORTN_REG_SA_H 0x30c 68 #define AM65_CPSW_PORTN_REG_TS_CTL 0x310 69 #define AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG 0x314 70 #define AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG 0x318 71 #define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 0x31C 72 73 #define AM65_CPSW_CTL_VLAN_AWARE BIT(1) 74 #define AM65_CPSW_CTL_P0_ENABLE BIT(2) 75 #define AM65_CPSW_CTL_P0_TX_CRC_REMOVE BIT(13) 76 #define AM65_CPSW_CTL_P0_RX_PAD BIT(14) 77 78 /* AM65_CPSW_P0_REG_CTL */ 79 #define AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN BIT(0) 80 81 /* AM65_CPSW_PORT_REG_PRI_CTL */ 82 #define AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN BIT(8) 83 84 /* AM65_CPSW_PN_TS_CTL register fields */ 85 #define AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN BIT(4) 86 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN BIT(5) 87 #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT2_EN BIT(6) 88 #define AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN BIT(7) 89 #define AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN BIT(10) 90 #define AM65_CPSW_PN_TS_CTL_TX_HOST_TS_EN BIT(11) 91 #define AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT 16 92 93 /* AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG register fields */ 94 #define AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT 16 95 96 /* AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 */ 97 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 BIT(16) 98 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 BIT(17) 99 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 BIT(18) 100 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 BIT(19) 101 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 BIT(20) 102 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 BIT(21) 103 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 BIT(22) 104 #define AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO BIT(23) 105 106 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ 107 #define AM65_CPSW_TS_EVENT_MSG_TYPE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3)) 108 109 #define AM65_CPSW_TS_SEQ_ID_OFFSET (0x1e) 110 111 #define AM65_CPSW_TS_TX_ANX_ALL_EN \ 112 (AM65_CPSW_PN_TS_CTL_TX_ANX_D_EN | \ 113 AM65_CPSW_PN_TS_CTL_TX_ANX_E_EN | \ 114 AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN) 115 116 #define AM65_CPSW_ALE_AGEOUT_DEFAULT 30 117 /* Number of TX/RX descriptors */ 118 #define AM65_CPSW_MAX_TX_DESC 500 119 #define AM65_CPSW_MAX_RX_DESC 500 120 121 #define AM65_CPSW_NAV_PS_DATA_SIZE 16 122 #define AM65_CPSW_NAV_SW_DATA_SIZE 16 123 124 #define AM65_CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK | \ 125 NETIF_MSG_IFUP | NETIF_MSG_PROBE | NETIF_MSG_IFDOWN | \ 126 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR) 127 128 static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave, 129 const u8 *dev_addr) 130 { 131 u32 mac_hi = (dev_addr[0] << 0) | (dev_addr[1] << 8) | 132 (dev_addr[2] << 16) | (dev_addr[3] << 24); 133 u32 mac_lo = (dev_addr[4] << 0) | (dev_addr[5] << 8); 134 135 writel(mac_hi, slave->port_base + AM65_CPSW_PORTN_REG_SA_H); 136 writel(mac_lo, slave->port_base + AM65_CPSW_PORTN_REG_SA_L); 137 } 138 139 static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port) 140 { 141 cpsw_sl_reset(port->slave.mac_sl, 100); 142 /* Max length register has to be restored after MAC SL reset */ 143 writel(AM65_CPSW_MAX_PACKET_SIZE, 144 port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); 145 } 146 147 static void am65_cpsw_nuss_get_ver(struct am65_cpsw_common *common) 148 { 149 common->nuss_ver = readl(common->ss_base); 150 common->cpsw_ver = readl(common->cpsw_base); 151 dev_info(common->dev, 152 "initializing am65 cpsw nuss version 0x%08X, cpsw version 0x%08X Ports: %u quirks:%08x\n", 153 common->nuss_ver, 154 common->cpsw_ver, 155 common->port_num + 1, 156 common->pdata.quirks); 157 } 158 159 void am65_cpsw_nuss_adjust_link(struct net_device *ndev) 160 { 161 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 162 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 163 struct phy_device *phy = port->slave.phy; 164 u32 mac_control = 0; 165 166 if (!phy) 167 return; 168 169 if (phy->link) { 170 mac_control = CPSW_SL_CTL_GMII_EN; 171 172 if (phy->speed == 1000) 173 mac_control |= CPSW_SL_CTL_GIG; 174 if (phy->speed == 10 && phy_interface_is_rgmii(phy)) 175 /* Can be used with in band mode only */ 176 mac_control |= CPSW_SL_CTL_EXT_EN; 177 if (phy->duplex) 178 mac_control |= CPSW_SL_CTL_FULLDUPLEX; 179 180 /* RGMII speed is 100M if !CPSW_SL_CTL_GIG*/ 181 182 /* rx_pause/tx_pause */ 183 if (port->slave.rx_pause) 184 mac_control |= CPSW_SL_CTL_RX_FLOW_EN; 185 186 if (port->slave.tx_pause) 187 mac_control |= CPSW_SL_CTL_TX_FLOW_EN; 188 189 cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); 190 191 /* enable forwarding */ 192 cpsw_ale_control_set(common->ale, port->port_id, 193 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 194 195 am65_cpsw_qos_link_up(ndev, phy->speed); 196 netif_tx_wake_all_queues(ndev); 197 } else { 198 int tmo; 199 200 /* disable forwarding */ 201 cpsw_ale_control_set(common->ale, port->port_id, 202 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 203 204 cpsw_sl_ctl_set(port->slave.mac_sl, CPSW_SL_CTL_CMD_IDLE); 205 206 tmo = cpsw_sl_wait_for_idle(port->slave.mac_sl, 100); 207 dev_dbg(common->dev, "donw msc_sl %08x tmo %d\n", 208 cpsw_sl_reg_read(port->slave.mac_sl, CPSW_SL_MACSTATUS), 209 tmo); 210 211 cpsw_sl_ctl_reset(port->slave.mac_sl); 212 213 am65_cpsw_qos_link_down(ndev); 214 netif_tx_stop_all_queues(ndev); 215 } 216 217 phy_print_status(phy); 218 } 219 220 static int am65_cpsw_nuss_ndo_slave_add_vid(struct net_device *ndev, 221 __be16 proto, u16 vid) 222 { 223 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 224 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 225 u32 port_mask, unreg_mcast = 0; 226 int ret; 227 228 if (!netif_running(ndev) || !vid) 229 return 0; 230 231 ret = pm_runtime_get_sync(common->dev); 232 if (ret < 0) { 233 pm_runtime_put_noidle(common->dev); 234 return ret; 235 } 236 237 port_mask = BIT(port->port_id) | ALE_PORT_HOST; 238 if (!vid) 239 unreg_mcast = port_mask; 240 dev_info(common->dev, "Adding vlan %d to vlan filter\n", vid); 241 ret = cpsw_ale_add_vlan(common->ale, vid, port_mask, 242 unreg_mcast, port_mask, 0); 243 244 pm_runtime_put(common->dev); 245 return ret; 246 } 247 248 static int am65_cpsw_nuss_ndo_slave_kill_vid(struct net_device *ndev, 249 __be16 proto, u16 vid) 250 { 251 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 252 int ret; 253 254 if (!netif_running(ndev) || !vid) 255 return 0; 256 257 ret = pm_runtime_get_sync(common->dev); 258 if (ret < 0) { 259 pm_runtime_put_noidle(common->dev); 260 return ret; 261 } 262 263 dev_info(common->dev, "Removing vlan %d from vlan filter\n", vid); 264 ret = cpsw_ale_del_vlan(common->ale, vid, 0); 265 266 pm_runtime_put(common->dev); 267 return ret; 268 } 269 270 static void am65_cpsw_slave_set_promisc_2g(struct am65_cpsw_port *port, 271 bool promisc) 272 { 273 struct am65_cpsw_common *common = port->common; 274 275 if (promisc) { 276 /* Enable promiscuous mode */ 277 cpsw_ale_control_set(common->ale, port->port_id, 278 ALE_PORT_MACONLY_CAF, 1); 279 dev_dbg(common->dev, "promisc enabled\n"); 280 } else { 281 /* Disable promiscuous mode */ 282 cpsw_ale_control_set(common->ale, port->port_id, 283 ALE_PORT_MACONLY_CAF, 0); 284 dev_dbg(common->dev, "promisc disabled\n"); 285 } 286 } 287 288 static void am65_cpsw_nuss_ndo_slave_set_rx_mode(struct net_device *ndev) 289 { 290 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 291 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 292 u32 port_mask; 293 bool promisc; 294 295 promisc = !!(ndev->flags & IFF_PROMISC); 296 am65_cpsw_slave_set_promisc_2g(port, promisc); 297 298 if (promisc) 299 return; 300 301 /* Restore allmulti on vlans if necessary */ 302 cpsw_ale_set_allmulti(common->ale, 303 ndev->flags & IFF_ALLMULTI, port->port_id); 304 305 port_mask = ALE_PORT_HOST; 306 /* Clear all mcast from ALE */ 307 cpsw_ale_flush_multicast(common->ale, port_mask, -1); 308 309 if (!netdev_mc_empty(ndev)) { 310 struct netdev_hw_addr *ha; 311 312 /* program multicast address list into ALE register */ 313 netdev_for_each_mc_addr(ha, ndev) { 314 cpsw_ale_add_mcast(common->ale, ha->addr, 315 port_mask, 0, 0, 0); 316 } 317 } 318 } 319 320 static void am65_cpsw_nuss_ndo_host_tx_timeout(struct net_device *ndev, 321 unsigned int txqueue) 322 { 323 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 324 struct am65_cpsw_tx_chn *tx_chn; 325 struct netdev_queue *netif_txq; 326 unsigned long trans_start; 327 328 netif_txq = netdev_get_tx_queue(ndev, txqueue); 329 tx_chn = &common->tx_chns[txqueue]; 330 trans_start = netif_txq->trans_start; 331 332 netdev_err(ndev, "txq:%d DRV_XOFF:%d tmo:%u dql_avail:%d free_desc:%zu\n", 333 txqueue, 334 netif_tx_queue_stopped(netif_txq), 335 jiffies_to_msecs(jiffies - trans_start), 336 dql_avail(&netif_txq->dql), 337 k3_cppi_desc_pool_avail(tx_chn->desc_pool)); 338 339 if (netif_tx_queue_stopped(netif_txq)) { 340 /* try recover if stopped by us */ 341 txq_trans_update(netif_txq); 342 netif_tx_wake_queue(netif_txq); 343 } 344 } 345 346 static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common, 347 struct sk_buff *skb) 348 { 349 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns; 350 struct cppi5_host_desc_t *desc_rx; 351 struct device *dev = common->dev; 352 u32 pkt_len = skb_tailroom(skb); 353 dma_addr_t desc_dma; 354 dma_addr_t buf_dma; 355 void *swdata; 356 357 desc_rx = k3_cppi_desc_pool_alloc(rx_chn->desc_pool); 358 if (!desc_rx) { 359 dev_err(dev, "Failed to allocate RXFDQ descriptor\n"); 360 return -ENOMEM; 361 } 362 desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn->desc_pool, desc_rx); 363 364 buf_dma = dma_map_single(dev, skb->data, pkt_len, DMA_FROM_DEVICE); 365 if (unlikely(dma_mapping_error(dev, buf_dma))) { 366 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx); 367 dev_err(dev, "Failed to map rx skb buffer\n"); 368 return -EINVAL; 369 } 370 371 cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT, 372 AM65_CPSW_NAV_PS_DATA_SIZE); 373 cppi5_hdesc_attach_buf(desc_rx, 0, 0, buf_dma, skb_tailroom(skb)); 374 swdata = cppi5_hdesc_get_swdata(desc_rx); 375 *((void **)swdata) = skb; 376 377 return k3_udma_glue_push_rx_chn(rx_chn->rx_chn, 0, desc_rx, desc_dma); 378 } 379 380 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common) 381 { 382 struct am65_cpsw_host *host_p = am65_common_get_host(common); 383 u32 val, pri_map; 384 385 /* P0 set Receive Priority Type */ 386 val = readl(host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL); 387 388 if (common->pf_p0_rx_ptype_rrobin) { 389 val |= AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN; 390 /* Enet Ports fifos works in fixed priority mode only, so 391 * reset P0_Rx_Pri_Map so all packet will go in Enet fifo 0 392 */ 393 pri_map = 0x0; 394 } else { 395 val &= ~AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN; 396 /* restore P0_Rx_Pri_Map */ 397 pri_map = 0x76543210; 398 } 399 400 writel(pri_map, host_p->port_base + AM65_CPSW_PORT_REG_RX_PRI_MAP); 401 writel(val, host_p->port_base + AM65_CPSW_PORT_REG_PRI_CTL); 402 } 403 404 static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common, 405 netdev_features_t features) 406 { 407 struct am65_cpsw_host *host_p = am65_common_get_host(common); 408 int port_idx, i, ret; 409 struct sk_buff *skb; 410 u32 val, port_mask; 411 412 if (common->usage_count) 413 return 0; 414 415 /* Control register */ 416 writel(AM65_CPSW_CTL_P0_ENABLE | AM65_CPSW_CTL_P0_TX_CRC_REMOVE | 417 AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD, 418 common->cpsw_base + AM65_CPSW_REG_CTL); 419 /* Max length register */ 420 writel(AM65_CPSW_MAX_PACKET_SIZE, 421 host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); 422 /* set base flow_id */ 423 writel(common->rx_flow_id_base, 424 host_p->port_base + AM65_CPSW_PORT0_REG_FLOW_ID_OFFSET); 425 /* en tx crc offload */ 426 if (features & NETIF_F_HW_CSUM) 427 writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN, 428 host_p->port_base + AM65_CPSW_P0_REG_CTL); 429 430 am65_cpsw_nuss_set_p0_ptype(common); 431 432 /* enable statistic */ 433 val = BIT(HOST_PORT_NUM); 434 for (port_idx = 0; port_idx < common->port_num; port_idx++) { 435 struct am65_cpsw_port *port = &common->ports[port_idx]; 436 437 if (!port->disabled) 438 val |= BIT(port->port_id); 439 } 440 writel(val, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN); 441 442 /* disable priority elevation */ 443 writel(0, common->cpsw_base + AM65_CPSW_REG_PTYPE); 444 445 cpsw_ale_start(common->ale); 446 447 /* limit to one RX flow only */ 448 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, 449 ALE_DEFAULT_THREAD_ID, 0); 450 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, 451 ALE_DEFAULT_THREAD_ENABLE, 1); 452 if (AM65_CPSW_IS_CPSW2G(common)) 453 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, 454 ALE_PORT_NOLEARN, 1); 455 /* switch to vlan unaware mode */ 456 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 1); 457 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, 458 ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); 459 460 /* default vlan cfg: create mask based on enabled ports */ 461 port_mask = GENMASK(common->port_num, 0) & 462 ~common->disabled_ports_mask; 463 464 cpsw_ale_add_vlan(common->ale, 0, port_mask, 465 port_mask, port_mask, 466 port_mask & ~ALE_PORT_HOST); 467 468 for (i = 0; i < common->rx_chns.descs_num; i++) { 469 skb = __netdev_alloc_skb_ip_align(NULL, 470 AM65_CPSW_MAX_PACKET_SIZE, 471 GFP_KERNEL); 472 if (!skb) { 473 dev_err(common->dev, "cannot allocate skb\n"); 474 return -ENOMEM; 475 } 476 477 ret = am65_cpsw_nuss_rx_push(common, skb); 478 if (ret < 0) { 479 dev_err(common->dev, 480 "cannot submit skb to channel rx, error %d\n", 481 ret); 482 kfree_skb(skb); 483 return ret; 484 } 485 kmemleak_not_leak(skb); 486 } 487 k3_udma_glue_enable_rx_chn(common->rx_chns.rx_chn); 488 489 for (i = 0; i < common->tx_ch_num; i++) { 490 ret = k3_udma_glue_enable_tx_chn(common->tx_chns[i].tx_chn); 491 if (ret) 492 return ret; 493 napi_enable(&common->tx_chns[i].napi_tx); 494 } 495 496 napi_enable(&common->napi_rx); 497 498 dev_dbg(common->dev, "cpsw_nuss started\n"); 499 return 0; 500 } 501 502 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma); 503 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma); 504 505 static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common) 506 { 507 int i; 508 509 if (common->usage_count != 1) 510 return 0; 511 512 cpsw_ale_control_set(common->ale, HOST_PORT_NUM, 513 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 514 515 /* shutdown tx channels */ 516 atomic_set(&common->tdown_cnt, common->tx_ch_num); 517 /* ensure new tdown_cnt value is visible */ 518 smp_mb__after_atomic(); 519 reinit_completion(&common->tdown_complete); 520 521 for (i = 0; i < common->tx_ch_num; i++) 522 k3_udma_glue_tdown_tx_chn(common->tx_chns[i].tx_chn, false); 523 524 i = wait_for_completion_timeout(&common->tdown_complete, 525 msecs_to_jiffies(1000)); 526 if (!i) 527 dev_err(common->dev, "tx timeout\n"); 528 for (i = 0; i < common->tx_ch_num; i++) 529 napi_disable(&common->tx_chns[i].napi_tx); 530 531 for (i = 0; i < common->tx_ch_num; i++) { 532 k3_udma_glue_reset_tx_chn(common->tx_chns[i].tx_chn, 533 &common->tx_chns[i], 534 am65_cpsw_nuss_tx_cleanup); 535 k3_udma_glue_disable_tx_chn(common->tx_chns[i].tx_chn); 536 } 537 538 k3_udma_glue_tdown_rx_chn(common->rx_chns.rx_chn, true); 539 napi_disable(&common->napi_rx); 540 541 for (i = 0; i < AM65_CPSW_MAX_RX_FLOWS; i++) 542 k3_udma_glue_reset_rx_chn(common->rx_chns.rx_chn, i, 543 &common->rx_chns, 544 am65_cpsw_nuss_rx_cleanup, !!i); 545 546 k3_udma_glue_disable_rx_chn(common->rx_chns.rx_chn); 547 548 cpsw_ale_stop(common->ale); 549 550 writel(0, common->cpsw_base + AM65_CPSW_REG_CTL); 551 writel(0, common->cpsw_base + AM65_CPSW_REG_STAT_PORT_EN); 552 553 dev_dbg(common->dev, "cpsw_nuss stopped\n"); 554 return 0; 555 } 556 557 static int am65_cpsw_nuss_ndo_slave_stop(struct net_device *ndev) 558 { 559 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 560 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 561 int ret; 562 563 if (port->slave.phy) 564 phy_stop(port->slave.phy); 565 566 netif_tx_stop_all_queues(ndev); 567 568 if (port->slave.phy) { 569 phy_disconnect(port->slave.phy); 570 port->slave.phy = NULL; 571 } 572 573 ret = am65_cpsw_nuss_common_stop(common); 574 if (ret) 575 return ret; 576 577 common->usage_count--; 578 pm_runtime_put(common->dev); 579 return 0; 580 } 581 582 static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg) 583 { 584 struct am65_cpsw_port *port = arg; 585 586 if (!vdev) 587 return 0; 588 589 return am65_cpsw_nuss_ndo_slave_add_vid(port->ndev, 0, vid); 590 } 591 592 static int am65_cpsw_nuss_ndo_slave_open(struct net_device *ndev) 593 { 594 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 595 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 596 u32 port_mask; 597 int ret, i; 598 599 ret = pm_runtime_get_sync(common->dev); 600 if (ret < 0) { 601 pm_runtime_put_noidle(common->dev); 602 return ret; 603 } 604 605 /* Notify the stack of the actual queue counts. */ 606 ret = netif_set_real_num_tx_queues(ndev, common->tx_ch_num); 607 if (ret) { 608 dev_err(common->dev, "cannot set real number of tx queues\n"); 609 return ret; 610 } 611 612 ret = netif_set_real_num_rx_queues(ndev, AM65_CPSW_MAX_RX_QUEUES); 613 if (ret) { 614 dev_err(common->dev, "cannot set real number of rx queues\n"); 615 return ret; 616 } 617 618 for (i = 0; i < common->tx_ch_num; i++) 619 netdev_tx_reset_queue(netdev_get_tx_queue(ndev, i)); 620 621 ret = am65_cpsw_nuss_common_open(common, ndev->features); 622 if (ret) 623 return ret; 624 625 common->usage_count++; 626 627 am65_cpsw_port_set_sl_mac(port, ndev->dev_addr); 628 629 if (port->slave.mac_only) 630 /* enable mac-only mode on port */ 631 cpsw_ale_control_set(common->ale, port->port_id, 632 ALE_PORT_MACONLY, 1); 633 if (AM65_CPSW_IS_CPSW2G(common)) 634 cpsw_ale_control_set(common->ale, port->port_id, 635 ALE_PORT_NOLEARN, 1); 636 637 port_mask = BIT(port->port_id) | ALE_PORT_HOST; 638 cpsw_ale_add_ucast(common->ale, ndev->dev_addr, 639 HOST_PORT_NUM, ALE_SECURE, 0); 640 cpsw_ale_add_mcast(common->ale, ndev->broadcast, 641 port_mask, 0, 0, ALE_MCAST_FWD_2); 642 643 /* mac_sl should be configured via phy-link interface */ 644 am65_cpsw_sl_ctl_reset(port); 645 646 ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET, 647 port->slave.phy_if); 648 if (ret) 649 goto error_cleanup; 650 651 if (port->slave.phy_node) { 652 port->slave.phy = of_phy_connect(ndev, 653 port->slave.phy_node, 654 &am65_cpsw_nuss_adjust_link, 655 0, port->slave.phy_if); 656 if (!port->slave.phy) { 657 dev_err(common->dev, "phy %pOF not found on slave %d\n", 658 port->slave.phy_node, 659 port->port_id); 660 ret = -ENODEV; 661 goto error_cleanup; 662 } 663 } 664 665 /* restore vlan configurations */ 666 vlan_for_each(ndev, cpsw_restore_vlans, port); 667 668 phy_attached_info(port->slave.phy); 669 phy_start(port->slave.phy); 670 671 return 0; 672 673 error_cleanup: 674 am65_cpsw_nuss_ndo_slave_stop(ndev); 675 return ret; 676 } 677 678 static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma) 679 { 680 struct am65_cpsw_rx_chn *rx_chn = data; 681 struct cppi5_host_desc_t *desc_rx; 682 struct sk_buff *skb; 683 dma_addr_t buf_dma; 684 u32 buf_dma_len; 685 void **swdata; 686 687 desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma); 688 swdata = cppi5_hdesc_get_swdata(desc_rx); 689 skb = *swdata; 690 cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len); 691 692 dma_unmap_single(rx_chn->dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE); 693 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx); 694 695 dev_kfree_skb_any(skb); 696 } 697 698 static void am65_cpsw_nuss_rx_ts(struct sk_buff *skb, u32 *psdata) 699 { 700 struct skb_shared_hwtstamps *ssh; 701 u64 ns; 702 703 ns = ((u64)psdata[1] << 32) | psdata[0]; 704 705 ssh = skb_hwtstamps(skb); 706 memset(ssh, 0, sizeof(*ssh)); 707 ssh->hwtstamp = ns_to_ktime(ns); 708 } 709 710 /* RX psdata[2] word format - checksum information */ 711 #define AM65_CPSW_RX_PSD_CSUM_ADD GENMASK(15, 0) 712 #define AM65_CPSW_RX_PSD_CSUM_ERR BIT(16) 713 #define AM65_CPSW_RX_PSD_IS_FRAGMENT BIT(17) 714 #define AM65_CPSW_RX_PSD_IS_TCP BIT(18) 715 #define AM65_CPSW_RX_PSD_IPV6_VALID BIT(19) 716 #define AM65_CPSW_RX_PSD_IPV4_VALID BIT(20) 717 718 static void am65_cpsw_nuss_rx_csum(struct sk_buff *skb, u32 csum_info) 719 { 720 /* HW can verify IPv4/IPv6 TCP/UDP packets checksum 721 * csum information provides in psdata[2] word: 722 * AM65_CPSW_RX_PSD_CSUM_ERR bit - indicates csum error 723 * AM65_CPSW_RX_PSD_IPV6_VALID and AM65_CPSW_RX_PSD_IPV4_VALID 724 * bits - indicates IPv4/IPv6 packet 725 * AM65_CPSW_RX_PSD_IS_FRAGMENT bit - indicates fragmented packet 726 * AM65_CPSW_RX_PSD_CSUM_ADD has value 0xFFFF for non fragmented packets 727 * or csum value for fragmented packets if !AM65_CPSW_RX_PSD_CSUM_ERR 728 */ 729 skb_checksum_none_assert(skb); 730 731 if (unlikely(!(skb->dev->features & NETIF_F_RXCSUM))) 732 return; 733 734 if ((csum_info & (AM65_CPSW_RX_PSD_IPV6_VALID | 735 AM65_CPSW_RX_PSD_IPV4_VALID)) && 736 !(csum_info & AM65_CPSW_RX_PSD_CSUM_ERR)) { 737 /* csum for fragmented packets is unsupported */ 738 if (!(csum_info & AM65_CPSW_RX_PSD_IS_FRAGMENT)) 739 skb->ip_summed = CHECKSUM_UNNECESSARY; 740 } 741 } 742 743 static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_common *common, 744 u32 flow_idx) 745 { 746 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns; 747 u32 buf_dma_len, pkt_len, port_id = 0, csum_info; 748 struct am65_cpsw_ndev_priv *ndev_priv; 749 struct am65_cpsw_ndev_stats *stats; 750 struct cppi5_host_desc_t *desc_rx; 751 struct device *dev = common->dev; 752 struct sk_buff *skb, *new_skb; 753 dma_addr_t desc_dma, buf_dma; 754 struct am65_cpsw_port *port; 755 struct net_device *ndev; 756 void **swdata; 757 u32 *psdata; 758 int ret = 0; 759 760 ret = k3_udma_glue_pop_rx_chn(rx_chn->rx_chn, flow_idx, &desc_dma); 761 if (ret) { 762 if (ret != -ENODATA) 763 dev_err(dev, "RX: pop chn fail %d\n", ret); 764 return ret; 765 } 766 767 if (desc_dma & 0x1) { 768 dev_dbg(dev, "%s RX tdown flow: %u\n", __func__, flow_idx); 769 return 0; 770 } 771 772 desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn->desc_pool, desc_dma); 773 dev_dbg(dev, "%s flow_idx: %u desc %pad\n", 774 __func__, flow_idx, &desc_dma); 775 776 swdata = cppi5_hdesc_get_swdata(desc_rx); 777 skb = *swdata; 778 cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len); 779 pkt_len = cppi5_hdesc_get_pktlen(desc_rx); 780 cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL); 781 dev_dbg(dev, "%s rx port_id:%d\n", __func__, port_id); 782 port = am65_common_get_port(common, port_id); 783 ndev = port->ndev; 784 skb->dev = ndev; 785 786 psdata = cppi5_hdesc_get_psdata(desc_rx); 787 /* add RX timestamp */ 788 if (port->rx_ts_enabled) 789 am65_cpsw_nuss_rx_ts(skb, psdata); 790 csum_info = psdata[2]; 791 dev_dbg(dev, "%s rx csum_info:%#x\n", __func__, csum_info); 792 793 dma_unmap_single(dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE); 794 795 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx); 796 797 new_skb = netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE); 798 if (new_skb) { 799 skb_put(skb, pkt_len); 800 skb->protocol = eth_type_trans(skb, ndev); 801 am65_cpsw_nuss_rx_csum(skb, csum_info); 802 napi_gro_receive(&common->napi_rx, skb); 803 804 ndev_priv = netdev_priv(ndev); 805 stats = this_cpu_ptr(ndev_priv->stats); 806 807 u64_stats_update_begin(&stats->syncp); 808 stats->rx_packets++; 809 stats->rx_bytes += pkt_len; 810 u64_stats_update_end(&stats->syncp); 811 kmemleak_not_leak(new_skb); 812 } else { 813 ndev->stats.rx_dropped++; 814 new_skb = skb; 815 } 816 817 if (netif_dormant(ndev)) { 818 dev_kfree_skb_any(new_skb); 819 ndev->stats.rx_dropped++; 820 return 0; 821 } 822 823 ret = am65_cpsw_nuss_rx_push(common, new_skb); 824 if (WARN_ON(ret < 0)) { 825 dev_kfree_skb_any(new_skb); 826 ndev->stats.rx_errors++; 827 ndev->stats.rx_dropped++; 828 } 829 830 return ret; 831 } 832 833 static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget) 834 { 835 struct am65_cpsw_common *common = am65_cpsw_napi_to_common(napi_rx); 836 int flow = AM65_CPSW_MAX_RX_FLOWS; 837 int cur_budget, ret; 838 int num_rx = 0; 839 840 /* process every flow */ 841 while (flow--) { 842 cur_budget = budget - num_rx; 843 844 while (cur_budget--) { 845 ret = am65_cpsw_nuss_rx_packets(common, flow); 846 if (ret) 847 break; 848 num_rx++; 849 } 850 851 if (num_rx >= budget) 852 break; 853 } 854 855 dev_dbg(common->dev, "%s num_rx:%d %d\n", __func__, num_rx, budget); 856 857 if (num_rx < budget && napi_complete_done(napi_rx, num_rx)) 858 enable_irq(common->rx_chns.irq); 859 860 return num_rx; 861 } 862 863 static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn, 864 struct device *dev, 865 struct cppi5_host_desc_t *desc) 866 { 867 struct cppi5_host_desc_t *first_desc, *next_desc; 868 dma_addr_t buf_dma, next_desc_dma; 869 u32 buf_dma_len; 870 871 first_desc = desc; 872 next_desc = first_desc; 873 874 cppi5_hdesc_get_obuf(first_desc, &buf_dma, &buf_dma_len); 875 876 dma_unmap_single(dev, buf_dma, buf_dma_len, 877 DMA_TO_DEVICE); 878 879 next_desc_dma = cppi5_hdesc_get_next_hbdesc(first_desc); 880 while (next_desc_dma) { 881 next_desc = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, 882 next_desc_dma); 883 cppi5_hdesc_get_obuf(next_desc, &buf_dma, &buf_dma_len); 884 885 dma_unmap_page(dev, buf_dma, buf_dma_len, 886 DMA_TO_DEVICE); 887 888 next_desc_dma = cppi5_hdesc_get_next_hbdesc(next_desc); 889 890 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc); 891 } 892 893 k3_cppi_desc_pool_free(tx_chn->desc_pool, first_desc); 894 } 895 896 static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma) 897 { 898 struct am65_cpsw_tx_chn *tx_chn = data; 899 struct cppi5_host_desc_t *desc_tx; 900 struct sk_buff *skb; 901 void **swdata; 902 903 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, desc_dma); 904 swdata = cppi5_hdesc_get_swdata(desc_tx); 905 skb = *(swdata); 906 am65_cpsw_nuss_xmit_free(tx_chn, tx_chn->common->dev, desc_tx); 907 908 dev_kfree_skb_any(skb); 909 } 910 911 static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common, 912 int chn, unsigned int budget) 913 { 914 struct cppi5_host_desc_t *desc_tx; 915 struct device *dev = common->dev; 916 struct am65_cpsw_tx_chn *tx_chn; 917 struct netdev_queue *netif_txq; 918 unsigned int total_bytes = 0; 919 struct net_device *ndev; 920 struct sk_buff *skb; 921 dma_addr_t desc_dma; 922 int res, num_tx = 0; 923 void **swdata; 924 925 tx_chn = &common->tx_chns[chn]; 926 927 while (true) { 928 struct am65_cpsw_ndev_priv *ndev_priv; 929 struct am65_cpsw_ndev_stats *stats; 930 931 res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma); 932 if (res == -ENODATA) 933 break; 934 935 if (desc_dma & 0x1) { 936 if (atomic_dec_and_test(&common->tdown_cnt)) 937 complete(&common->tdown_complete); 938 break; 939 } 940 941 desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool, 942 desc_dma); 943 swdata = cppi5_hdesc_get_swdata(desc_tx); 944 skb = *(swdata); 945 am65_cpsw_nuss_xmit_free(tx_chn, dev, desc_tx); 946 947 ndev = skb->dev; 948 949 am65_cpts_tx_timestamp(common->cpts, skb); 950 951 ndev_priv = netdev_priv(ndev); 952 stats = this_cpu_ptr(ndev_priv->stats); 953 u64_stats_update_begin(&stats->syncp); 954 stats->tx_packets++; 955 stats->tx_bytes += skb->len; 956 u64_stats_update_end(&stats->syncp); 957 958 total_bytes += skb->len; 959 napi_consume_skb(skb, budget); 960 num_tx++; 961 } 962 963 if (!num_tx) 964 return 0; 965 966 netif_txq = netdev_get_tx_queue(ndev, chn); 967 968 netdev_tx_completed_queue(netif_txq, num_tx, total_bytes); 969 970 if (netif_tx_queue_stopped(netif_txq)) { 971 /* Check whether the queue is stopped due to stalled tx dma, 972 * if the queue is stopped then wake the queue as 973 * we have free desc for tx 974 */ 975 __netif_tx_lock(netif_txq, smp_processor_id()); 976 if (netif_running(ndev) && 977 (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >= 978 MAX_SKB_FRAGS)) 979 netif_tx_wake_queue(netif_txq); 980 981 __netif_tx_unlock(netif_txq); 982 } 983 dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx); 984 985 return num_tx; 986 } 987 988 static int am65_cpsw_nuss_tx_poll(struct napi_struct *napi_tx, int budget) 989 { 990 struct am65_cpsw_tx_chn *tx_chn = am65_cpsw_napi_to_tx_chn(napi_tx); 991 int num_tx; 992 993 num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn->common, tx_chn->id, 994 budget); 995 num_tx = min(num_tx, budget); 996 if (num_tx < budget) { 997 napi_complete(napi_tx); 998 enable_irq(tx_chn->irq); 999 } 1000 1001 return num_tx; 1002 } 1003 1004 static irqreturn_t am65_cpsw_nuss_rx_irq(int irq, void *dev_id) 1005 { 1006 struct am65_cpsw_common *common = dev_id; 1007 1008 disable_irq_nosync(irq); 1009 napi_schedule(&common->napi_rx); 1010 1011 return IRQ_HANDLED; 1012 } 1013 1014 static irqreturn_t am65_cpsw_nuss_tx_irq(int irq, void *dev_id) 1015 { 1016 struct am65_cpsw_tx_chn *tx_chn = dev_id; 1017 1018 disable_irq_nosync(irq); 1019 napi_schedule(&tx_chn->napi_tx); 1020 1021 return IRQ_HANDLED; 1022 } 1023 1024 static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb, 1025 struct net_device *ndev) 1026 { 1027 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 1028 struct cppi5_host_desc_t *first_desc, *next_desc, *cur_desc; 1029 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 1030 struct device *dev = common->dev; 1031 struct am65_cpsw_tx_chn *tx_chn; 1032 struct netdev_queue *netif_txq; 1033 dma_addr_t desc_dma, buf_dma; 1034 int ret, q_idx, i; 1035 void **swdata; 1036 u32 *psdata; 1037 u32 pkt_len; 1038 1039 /* padding enabled in hw */ 1040 pkt_len = skb_headlen(skb); 1041 1042 /* SKB TX timestamp */ 1043 if (port->tx_ts_enabled) 1044 am65_cpts_prep_tx_timestamp(common->cpts, skb); 1045 1046 q_idx = skb_get_queue_mapping(skb); 1047 dev_dbg(dev, "%s skb_queue:%d\n", __func__, q_idx); 1048 1049 tx_chn = &common->tx_chns[q_idx]; 1050 netif_txq = netdev_get_tx_queue(ndev, q_idx); 1051 1052 /* Map the linear buffer */ 1053 buf_dma = dma_map_single(dev, skb->data, pkt_len, 1054 DMA_TO_DEVICE); 1055 if (unlikely(dma_mapping_error(dev, buf_dma))) { 1056 dev_err(dev, "Failed to map tx skb buffer\n"); 1057 ndev->stats.tx_errors++; 1058 goto err_free_skb; 1059 } 1060 1061 first_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool); 1062 if (!first_desc) { 1063 dev_dbg(dev, "Failed to allocate descriptor\n"); 1064 dma_unmap_single(dev, buf_dma, pkt_len, DMA_TO_DEVICE); 1065 goto busy_stop_q; 1066 } 1067 1068 cppi5_hdesc_init(first_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT, 1069 AM65_CPSW_NAV_PS_DATA_SIZE); 1070 cppi5_desc_set_pktids(&first_desc->hdr, 0, 0x3FFF); 1071 cppi5_hdesc_set_pkttype(first_desc, 0x7); 1072 cppi5_desc_set_tags_ids(&first_desc->hdr, 0, port->port_id); 1073 1074 cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len); 1075 swdata = cppi5_hdesc_get_swdata(first_desc); 1076 *(swdata) = skb; 1077 psdata = cppi5_hdesc_get_psdata(first_desc); 1078 1079 /* HW csum offload if enabled */ 1080 psdata[2] = 0; 1081 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1082 unsigned int cs_start, cs_offset; 1083 1084 cs_start = skb_transport_offset(skb); 1085 cs_offset = cs_start + skb->csum_offset; 1086 /* HW numerates bytes starting from 1 */ 1087 psdata[2] = ((cs_offset + 1) << 24) | 1088 ((cs_start + 1) << 16) | (skb->len - cs_start); 1089 dev_dbg(dev, "%s tx psdata:%#x\n", __func__, psdata[2]); 1090 } 1091 1092 if (!skb_is_nonlinear(skb)) 1093 goto done_tx; 1094 1095 dev_dbg(dev, "fragmented SKB\n"); 1096 1097 /* Handle the case where skb is fragmented in pages */ 1098 cur_desc = first_desc; 1099 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1100 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 1101 u32 frag_size = skb_frag_size(frag); 1102 1103 next_desc = k3_cppi_desc_pool_alloc(tx_chn->desc_pool); 1104 if (!next_desc) { 1105 dev_err(dev, "Failed to allocate descriptor\n"); 1106 goto busy_free_descs; 1107 } 1108 1109 buf_dma = skb_frag_dma_map(dev, frag, 0, frag_size, 1110 DMA_TO_DEVICE); 1111 if (unlikely(dma_mapping_error(dev, buf_dma))) { 1112 dev_err(dev, "Failed to map tx skb page\n"); 1113 k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc); 1114 ndev->stats.tx_errors++; 1115 goto err_free_descs; 1116 } 1117 1118 cppi5_hdesc_reset_hbdesc(next_desc); 1119 cppi5_hdesc_attach_buf(next_desc, 1120 buf_dma, frag_size, buf_dma, frag_size); 1121 1122 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool, 1123 next_desc); 1124 cppi5_hdesc_link_hbdesc(cur_desc, desc_dma); 1125 1126 pkt_len += frag_size; 1127 cur_desc = next_desc; 1128 } 1129 WARN_ON(pkt_len != skb->len); 1130 1131 done_tx: 1132 skb_tx_timestamp(skb); 1133 1134 /* report bql before sending packet */ 1135 netdev_tx_sent_queue(netif_txq, pkt_len); 1136 1137 cppi5_hdesc_set_pktlen(first_desc, pkt_len); 1138 desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn->desc_pool, first_desc); 1139 ret = k3_udma_glue_push_tx_chn(tx_chn->tx_chn, first_desc, desc_dma); 1140 if (ret) { 1141 dev_err(dev, "can't push desc %d\n", ret); 1142 /* inform bql */ 1143 netdev_tx_completed_queue(netif_txq, 1, pkt_len); 1144 ndev->stats.tx_errors++; 1145 goto err_free_descs; 1146 } 1147 1148 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) < MAX_SKB_FRAGS) { 1149 netif_tx_stop_queue(netif_txq); 1150 /* Barrier, so that stop_queue visible to other cpus */ 1151 smp_mb__after_atomic(); 1152 dev_dbg(dev, "netif_tx_stop_queue %d\n", q_idx); 1153 1154 /* re-check for smp */ 1155 if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) >= 1156 MAX_SKB_FRAGS) { 1157 netif_tx_wake_queue(netif_txq); 1158 dev_dbg(dev, "netif_tx_wake_queue %d\n", q_idx); 1159 } 1160 } 1161 1162 return NETDEV_TX_OK; 1163 1164 err_free_descs: 1165 am65_cpsw_nuss_xmit_free(tx_chn, dev, first_desc); 1166 err_free_skb: 1167 ndev->stats.tx_dropped++; 1168 dev_kfree_skb_any(skb); 1169 return NETDEV_TX_OK; 1170 1171 busy_free_descs: 1172 am65_cpsw_nuss_xmit_free(tx_chn, dev, first_desc); 1173 busy_stop_q: 1174 netif_tx_stop_queue(netif_txq); 1175 return NETDEV_TX_BUSY; 1176 } 1177 1178 static int am65_cpsw_nuss_ndo_slave_set_mac_address(struct net_device *ndev, 1179 void *addr) 1180 { 1181 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 1182 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 1183 struct sockaddr *sockaddr = (struct sockaddr *)addr; 1184 int ret; 1185 1186 ret = eth_prepare_mac_addr_change(ndev, addr); 1187 if (ret < 0) 1188 return ret; 1189 1190 ret = pm_runtime_get_sync(common->dev); 1191 if (ret < 0) { 1192 pm_runtime_put_noidle(common->dev); 1193 return ret; 1194 } 1195 1196 cpsw_ale_del_ucast(common->ale, ndev->dev_addr, 1197 HOST_PORT_NUM, 0, 0); 1198 cpsw_ale_add_ucast(common->ale, sockaddr->sa_data, 1199 HOST_PORT_NUM, ALE_SECURE, 0); 1200 1201 am65_cpsw_port_set_sl_mac(port, addr); 1202 eth_commit_mac_addr_change(ndev, sockaddr); 1203 1204 pm_runtime_put(common->dev); 1205 1206 return 0; 1207 } 1208 1209 static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev, 1210 struct ifreq *ifr) 1211 { 1212 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 1213 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 1214 u32 ts_ctrl, seq_id, ts_ctrl_ltype2, ts_vlan_ltype; 1215 struct hwtstamp_config cfg; 1216 1217 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS)) 1218 return -EOPNOTSUPP; 1219 1220 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) 1221 return -EFAULT; 1222 1223 /* TX HW timestamp */ 1224 switch (cfg.tx_type) { 1225 case HWTSTAMP_TX_OFF: 1226 case HWTSTAMP_TX_ON: 1227 break; 1228 default: 1229 return -ERANGE; 1230 } 1231 1232 switch (cfg.rx_filter) { 1233 case HWTSTAMP_FILTER_NONE: 1234 port->rx_ts_enabled = false; 1235 break; 1236 case HWTSTAMP_FILTER_ALL: 1237 case HWTSTAMP_FILTER_SOME: 1238 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 1239 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 1240 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 1241 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 1242 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 1243 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 1244 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 1245 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 1246 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 1247 case HWTSTAMP_FILTER_PTP_V2_EVENT: 1248 case HWTSTAMP_FILTER_PTP_V2_SYNC: 1249 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1250 case HWTSTAMP_FILTER_NTP_ALL: 1251 port->rx_ts_enabled = true; 1252 cfg.rx_filter = HWTSTAMP_FILTER_ALL; 1253 break; 1254 default: 1255 return -ERANGE; 1256 } 1257 1258 port->tx_ts_enabled = (cfg.tx_type == HWTSTAMP_TX_ON); 1259 1260 /* cfg TX timestamp */ 1261 seq_id = (AM65_CPSW_TS_SEQ_ID_OFFSET << 1262 AM65_CPSW_PN_TS_SEQ_ID_OFFSET_SHIFT) | ETH_P_1588; 1263 1264 ts_vlan_ltype = ETH_P_8021Q; 1265 1266 ts_ctrl_ltype2 = ETH_P_1588 | 1267 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_107 | 1268 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_129 | 1269 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_130 | 1270 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_131 | 1271 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_132 | 1272 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_319 | 1273 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_320 | 1274 AM65_CPSW_PN_TS_CTL_LTYPE2_TS_TTL_NONZERO; 1275 1276 ts_ctrl = AM65_CPSW_TS_EVENT_MSG_TYPE_BITS << 1277 AM65_CPSW_PN_TS_CTL_MSG_TYPE_EN_SHIFT; 1278 1279 if (port->tx_ts_enabled) 1280 ts_ctrl |= AM65_CPSW_TS_TX_ANX_ALL_EN | 1281 AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN; 1282 1283 writel(seq_id, port->port_base + AM65_CPSW_PORTN_REG_TS_SEQ_LTYPE_REG); 1284 writel(ts_vlan_ltype, port->port_base + 1285 AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG); 1286 writel(ts_ctrl_ltype2, port->port_base + 1287 AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2); 1288 writel(ts_ctrl, port->port_base + AM65_CPSW_PORTN_REG_TS_CTL); 1289 1290 /* en/dis RX timestamp */ 1291 am65_cpts_rx_enable(common->cpts, port->rx_ts_enabled); 1292 1293 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 1294 } 1295 1296 static int am65_cpsw_nuss_hwtstamp_get(struct net_device *ndev, 1297 struct ifreq *ifr) 1298 { 1299 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 1300 struct hwtstamp_config cfg; 1301 1302 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS)) 1303 return -EOPNOTSUPP; 1304 1305 cfg.flags = 0; 1306 cfg.tx_type = port->tx_ts_enabled ? 1307 HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; 1308 cfg.rx_filter = port->rx_ts_enabled ? 1309 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE; 1310 1311 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; 1312 } 1313 1314 static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev, 1315 struct ifreq *req, int cmd) 1316 { 1317 struct am65_cpsw_port *port = am65_ndev_to_port(ndev); 1318 1319 if (!netif_running(ndev)) 1320 return -EINVAL; 1321 1322 switch (cmd) { 1323 case SIOCSHWTSTAMP: 1324 return am65_cpsw_nuss_hwtstamp_set(ndev, req); 1325 case SIOCGHWTSTAMP: 1326 return am65_cpsw_nuss_hwtstamp_get(ndev, req); 1327 } 1328 1329 if (!port->slave.phy) 1330 return -EOPNOTSUPP; 1331 1332 return phy_mii_ioctl(port->slave.phy, req, cmd); 1333 } 1334 1335 static void am65_cpsw_nuss_ndo_get_stats(struct net_device *dev, 1336 struct rtnl_link_stats64 *stats) 1337 { 1338 struct am65_cpsw_ndev_priv *ndev_priv = netdev_priv(dev); 1339 unsigned int start; 1340 int cpu; 1341 1342 for_each_possible_cpu(cpu) { 1343 struct am65_cpsw_ndev_stats *cpu_stats; 1344 u64 rx_packets; 1345 u64 rx_bytes; 1346 u64 tx_packets; 1347 u64 tx_bytes; 1348 1349 cpu_stats = per_cpu_ptr(ndev_priv->stats, cpu); 1350 do { 1351 start = u64_stats_fetch_begin_irq(&cpu_stats->syncp); 1352 rx_packets = cpu_stats->rx_packets; 1353 rx_bytes = cpu_stats->rx_bytes; 1354 tx_packets = cpu_stats->tx_packets; 1355 tx_bytes = cpu_stats->tx_bytes; 1356 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start)); 1357 1358 stats->rx_packets += rx_packets; 1359 stats->rx_bytes += rx_bytes; 1360 stats->tx_packets += tx_packets; 1361 stats->tx_bytes += tx_bytes; 1362 } 1363 1364 stats->rx_errors = dev->stats.rx_errors; 1365 stats->rx_dropped = dev->stats.rx_dropped; 1366 stats->tx_dropped = dev->stats.tx_dropped; 1367 } 1368 1369 static int am65_cpsw_nuss_ndo_slave_set_features(struct net_device *ndev, 1370 netdev_features_t features) 1371 { 1372 struct am65_cpsw_common *common = am65_ndev_to_common(ndev); 1373 netdev_features_t changes = features ^ ndev->features; 1374 struct am65_cpsw_host *host_p; 1375 1376 host_p = am65_common_get_host(common); 1377 1378 if (changes & NETIF_F_HW_CSUM) { 1379 bool enable = !!(features & NETIF_F_HW_CSUM); 1380 1381 dev_info(common->dev, "Turn %s tx-checksum-ip-generic\n", 1382 enable ? "ON" : "OFF"); 1383 if (enable) 1384 writel(AM65_CPSW_P0_REG_CTL_RX_CHECKSUM_EN, 1385 host_p->port_base + AM65_CPSW_P0_REG_CTL); 1386 else 1387 writel(0, 1388 host_p->port_base + AM65_CPSW_P0_REG_CTL); 1389 } 1390 1391 return 0; 1392 } 1393 1394 static const struct net_device_ops am65_cpsw_nuss_netdev_ops_2g = { 1395 .ndo_open = am65_cpsw_nuss_ndo_slave_open, 1396 .ndo_stop = am65_cpsw_nuss_ndo_slave_stop, 1397 .ndo_start_xmit = am65_cpsw_nuss_ndo_slave_xmit, 1398 .ndo_set_rx_mode = am65_cpsw_nuss_ndo_slave_set_rx_mode, 1399 .ndo_get_stats64 = am65_cpsw_nuss_ndo_get_stats, 1400 .ndo_validate_addr = eth_validate_addr, 1401 .ndo_set_mac_address = am65_cpsw_nuss_ndo_slave_set_mac_address, 1402 .ndo_tx_timeout = am65_cpsw_nuss_ndo_host_tx_timeout, 1403 .ndo_vlan_rx_add_vid = am65_cpsw_nuss_ndo_slave_add_vid, 1404 .ndo_vlan_rx_kill_vid = am65_cpsw_nuss_ndo_slave_kill_vid, 1405 .ndo_do_ioctl = am65_cpsw_nuss_ndo_slave_ioctl, 1406 .ndo_set_features = am65_cpsw_nuss_ndo_slave_set_features, 1407 .ndo_setup_tc = am65_cpsw_qos_ndo_setup_tc, 1408 }; 1409 1410 static void am65_cpsw_nuss_slave_disable_unused(struct am65_cpsw_port *port) 1411 { 1412 struct am65_cpsw_common *common = port->common; 1413 1414 if (!port->disabled) 1415 return; 1416 1417 common->disabled_ports_mask |= BIT(port->port_id); 1418 cpsw_ale_control_set(common->ale, port->port_id, 1419 ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); 1420 1421 cpsw_sl_reset(port->slave.mac_sl, 100); 1422 cpsw_sl_ctl_reset(port->slave.mac_sl); 1423 } 1424 1425 static void am65_cpsw_nuss_free_tx_chns(void *data) 1426 { 1427 struct am65_cpsw_common *common = data; 1428 int i; 1429 1430 for (i = 0; i < common->tx_ch_num; i++) { 1431 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i]; 1432 1433 if (!IS_ERR_OR_NULL(tx_chn->tx_chn)) 1434 k3_udma_glue_release_tx_chn(tx_chn->tx_chn); 1435 1436 if (!IS_ERR_OR_NULL(tx_chn->desc_pool)) 1437 k3_cppi_desc_pool_destroy(tx_chn->desc_pool); 1438 1439 memset(tx_chn, 0, sizeof(*tx_chn)); 1440 } 1441 } 1442 1443 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common) 1444 { 1445 struct device *dev = common->dev; 1446 int i; 1447 1448 devm_remove_action(dev, am65_cpsw_nuss_free_tx_chns, common); 1449 1450 for (i = 0; i < common->tx_ch_num; i++) { 1451 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i]; 1452 1453 if (tx_chn->irq) 1454 devm_free_irq(dev, tx_chn->irq, tx_chn); 1455 1456 netif_napi_del(&tx_chn->napi_tx); 1457 1458 if (!IS_ERR_OR_NULL(tx_chn->tx_chn)) 1459 k3_udma_glue_release_tx_chn(tx_chn->tx_chn); 1460 1461 if (!IS_ERR_OR_NULL(tx_chn->desc_pool)) 1462 k3_cppi_desc_pool_destroy(tx_chn->desc_pool); 1463 1464 memset(tx_chn, 0, sizeof(*tx_chn)); 1465 } 1466 } 1467 1468 static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common) 1469 { 1470 u32 max_desc_num = ALIGN(AM65_CPSW_MAX_TX_DESC, MAX_SKB_FRAGS); 1471 struct k3_udma_glue_tx_channel_cfg tx_cfg = { 0 }; 1472 struct device *dev = common->dev; 1473 struct k3_ring_cfg ring_cfg = { 1474 .elm_size = K3_RINGACC_RING_ELSIZE_8, 1475 .mode = K3_RINGACC_RING_MODE_RING, 1476 .flags = 0 1477 }; 1478 u32 hdesc_size; 1479 int i, ret = 0; 1480 1481 hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE, 1482 AM65_CPSW_NAV_SW_DATA_SIZE); 1483 1484 tx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE; 1485 tx_cfg.tx_cfg = ring_cfg; 1486 tx_cfg.txcq_cfg = ring_cfg; 1487 tx_cfg.tx_cfg.size = max_desc_num; 1488 tx_cfg.txcq_cfg.size = max_desc_num; 1489 1490 for (i = 0; i < common->tx_ch_num; i++) { 1491 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i]; 1492 1493 snprintf(tx_chn->tx_chn_name, 1494 sizeof(tx_chn->tx_chn_name), "tx%d", i); 1495 1496 tx_chn->common = common; 1497 tx_chn->id = i; 1498 tx_chn->descs_num = max_desc_num; 1499 tx_chn->desc_pool = 1500 k3_cppi_desc_pool_create_name(dev, 1501 tx_chn->descs_num, 1502 hdesc_size, 1503 tx_chn->tx_chn_name); 1504 if (IS_ERR(tx_chn->desc_pool)) { 1505 ret = PTR_ERR(tx_chn->desc_pool); 1506 dev_err(dev, "Failed to create poll %d\n", ret); 1507 goto err; 1508 } 1509 1510 tx_chn->tx_chn = 1511 k3_udma_glue_request_tx_chn(dev, 1512 tx_chn->tx_chn_name, 1513 &tx_cfg); 1514 if (IS_ERR(tx_chn->tx_chn)) { 1515 ret = PTR_ERR(tx_chn->tx_chn); 1516 dev_err(dev, "Failed to request tx dma channel %d\n", 1517 ret); 1518 goto err; 1519 } 1520 1521 tx_chn->irq = k3_udma_glue_tx_get_irq(tx_chn->tx_chn); 1522 if (tx_chn->irq <= 0) { 1523 dev_err(dev, "Failed to get tx dma irq %d\n", 1524 tx_chn->irq); 1525 goto err; 1526 } 1527 1528 snprintf(tx_chn->tx_chn_name, 1529 sizeof(tx_chn->tx_chn_name), "%s-tx%d", 1530 dev_name(dev), tx_chn->id); 1531 } 1532 1533 err: 1534 i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common); 1535 if (i) { 1536 dev_err(dev, "Failed to add free_tx_chns action %d\n", i); 1537 return i; 1538 } 1539 1540 return ret; 1541 } 1542 1543 static void am65_cpsw_nuss_free_rx_chns(void *data) 1544 { 1545 struct am65_cpsw_common *common = data; 1546 struct am65_cpsw_rx_chn *rx_chn; 1547 1548 rx_chn = &common->rx_chns; 1549 1550 if (!IS_ERR_OR_NULL(rx_chn->rx_chn)) 1551 k3_udma_glue_release_rx_chn(rx_chn->rx_chn); 1552 1553 if (!IS_ERR_OR_NULL(rx_chn->desc_pool)) 1554 k3_cppi_desc_pool_destroy(rx_chn->desc_pool); 1555 } 1556 1557 static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common) 1558 { 1559 struct am65_cpsw_rx_chn *rx_chn = &common->rx_chns; 1560 struct k3_udma_glue_rx_channel_cfg rx_cfg = { 0 }; 1561 u32 max_desc_num = AM65_CPSW_MAX_RX_DESC; 1562 struct device *dev = common->dev; 1563 u32 hdesc_size; 1564 u32 fdqring_id; 1565 int i, ret = 0; 1566 1567 hdesc_size = cppi5_hdesc_calc_size(true, AM65_CPSW_NAV_PS_DATA_SIZE, 1568 AM65_CPSW_NAV_SW_DATA_SIZE); 1569 1570 rx_cfg.swdata_size = AM65_CPSW_NAV_SW_DATA_SIZE; 1571 rx_cfg.flow_id_num = AM65_CPSW_MAX_RX_FLOWS; 1572 rx_cfg.flow_id_base = common->rx_flow_id_base; 1573 1574 /* init all flows */ 1575 rx_chn->dev = dev; 1576 rx_chn->descs_num = max_desc_num; 1577 rx_chn->desc_pool = k3_cppi_desc_pool_create_name(dev, 1578 rx_chn->descs_num, 1579 hdesc_size, "rx"); 1580 if (IS_ERR(rx_chn->desc_pool)) { 1581 ret = PTR_ERR(rx_chn->desc_pool); 1582 dev_err(dev, "Failed to create rx poll %d\n", ret); 1583 goto err; 1584 } 1585 1586 rx_chn->rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &rx_cfg); 1587 if (IS_ERR(rx_chn->rx_chn)) { 1588 ret = PTR_ERR(rx_chn->rx_chn); 1589 dev_err(dev, "Failed to request rx dma channel %d\n", ret); 1590 goto err; 1591 } 1592 1593 common->rx_flow_id_base = 1594 k3_udma_glue_rx_get_flow_id_base(rx_chn->rx_chn); 1595 dev_info(dev, "set new flow-id-base %u\n", common->rx_flow_id_base); 1596 1597 fdqring_id = K3_RINGACC_RING_ID_ANY; 1598 for (i = 0; i < rx_cfg.flow_id_num; i++) { 1599 struct k3_ring_cfg rxring_cfg = { 1600 .elm_size = K3_RINGACC_RING_ELSIZE_8, 1601 .mode = K3_RINGACC_RING_MODE_RING, 1602 .flags = 0, 1603 }; 1604 struct k3_ring_cfg fdqring_cfg = { 1605 .elm_size = K3_RINGACC_RING_ELSIZE_8, 1606 .mode = K3_RINGACC_RING_MODE_MESSAGE, 1607 .flags = K3_RINGACC_RING_SHARED, 1608 }; 1609 struct k3_udma_glue_rx_flow_cfg rx_flow_cfg = { 1610 .rx_cfg = rxring_cfg, 1611 .rxfdq_cfg = fdqring_cfg, 1612 .ring_rxq_id = K3_RINGACC_RING_ID_ANY, 1613 .src_tag_lo_sel = 1614 K3_UDMA_GLUE_SRC_TAG_LO_USE_REMOTE_SRC_TAG, 1615 }; 1616 1617 rx_flow_cfg.ring_rxfdq0_id = fdqring_id; 1618 rx_flow_cfg.rx_cfg.size = max_desc_num; 1619 rx_flow_cfg.rxfdq_cfg.size = max_desc_num; 1620 1621 ret = k3_udma_glue_rx_flow_init(rx_chn->rx_chn, 1622 i, &rx_flow_cfg); 1623 if (ret) { 1624 dev_err(dev, "Failed to init rx flow%d %d\n", i, ret); 1625 goto err; 1626 } 1627 if (!i) 1628 fdqring_id = 1629 k3_udma_glue_rx_flow_get_fdq_id(rx_chn->rx_chn, 1630 i); 1631 1632 rx_chn->irq = k3_udma_glue_rx_get_irq(rx_chn->rx_chn, i); 1633 1634 if (rx_chn->irq <= 0) { 1635 dev_err(dev, "Failed to get rx dma irq %d\n", 1636 rx_chn->irq); 1637 ret = -ENXIO; 1638 goto err; 1639 } 1640 } 1641 1642 err: 1643 i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common); 1644 if (i) { 1645 dev_err(dev, "Failed to add free_rx_chns action %d\n", i); 1646 return i; 1647 } 1648 1649 return ret; 1650 } 1651 1652 static int am65_cpsw_nuss_init_host_p(struct am65_cpsw_common *common) 1653 { 1654 struct am65_cpsw_host *host_p = am65_common_get_host(common); 1655 1656 host_p->common = common; 1657 host_p->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE; 1658 host_p->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE; 1659 1660 return 0; 1661 } 1662 1663 static int am65_cpsw_am654_get_efuse_macid(struct device_node *of_node, 1664 int slave, u8 *mac_addr) 1665 { 1666 u32 mac_lo, mac_hi, offset; 1667 struct regmap *syscon; 1668 int ret; 1669 1670 syscon = syscon_regmap_lookup_by_phandle(of_node, "ti,syscon-efuse"); 1671 if (IS_ERR(syscon)) { 1672 if (PTR_ERR(syscon) == -ENODEV) 1673 return 0; 1674 return PTR_ERR(syscon); 1675 } 1676 1677 ret = of_property_read_u32_index(of_node, "ti,syscon-efuse", 1, 1678 &offset); 1679 if (ret) 1680 return ret; 1681 1682 regmap_read(syscon, offset, &mac_lo); 1683 regmap_read(syscon, offset + 4, &mac_hi); 1684 1685 mac_addr[0] = (mac_hi >> 8) & 0xff; 1686 mac_addr[1] = mac_hi & 0xff; 1687 mac_addr[2] = (mac_lo >> 24) & 0xff; 1688 mac_addr[3] = (mac_lo >> 16) & 0xff; 1689 mac_addr[4] = (mac_lo >> 8) & 0xff; 1690 mac_addr[5] = mac_lo & 0xff; 1691 1692 return 0; 1693 } 1694 1695 static int am65_cpsw_init_cpts(struct am65_cpsw_common *common) 1696 { 1697 struct device *dev = common->dev; 1698 struct device_node *node; 1699 struct am65_cpts *cpts; 1700 void __iomem *reg_base; 1701 1702 if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS)) 1703 return 0; 1704 1705 node = of_get_child_by_name(dev->of_node, "cpts"); 1706 if (!node) { 1707 dev_err(dev, "%s cpts not found\n", __func__); 1708 return -ENOENT; 1709 } 1710 1711 reg_base = common->cpsw_base + AM65_CPSW_NU_CPTS_BASE; 1712 cpts = am65_cpts_create(dev, reg_base, node); 1713 if (IS_ERR(cpts)) { 1714 int ret = PTR_ERR(cpts); 1715 1716 if (ret == -EOPNOTSUPP) { 1717 dev_info(dev, "cpts disabled\n"); 1718 return 0; 1719 } 1720 1721 dev_err(dev, "cpts create err %d\n", ret); 1722 return ret; 1723 } 1724 common->cpts = cpts; 1725 1726 return 0; 1727 } 1728 1729 static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common) 1730 { 1731 struct device_node *node, *port_np; 1732 struct device *dev = common->dev; 1733 int ret; 1734 1735 node = of_get_child_by_name(dev->of_node, "ethernet-ports"); 1736 if (!node) 1737 return -ENOENT; 1738 1739 for_each_child_of_node(node, port_np) { 1740 struct am65_cpsw_port *port; 1741 const void *mac_addr; 1742 u32 port_id; 1743 1744 /* it is not a slave port node, continue */ 1745 if (strcmp(port_np->name, "port")) 1746 continue; 1747 1748 ret = of_property_read_u32(port_np, "reg", &port_id); 1749 if (ret < 0) { 1750 dev_err(dev, "%pOF error reading port_id %d\n", 1751 port_np, ret); 1752 return ret; 1753 } 1754 1755 if (!port_id || port_id > common->port_num) { 1756 dev_err(dev, "%pOF has invalid port_id %u %s\n", 1757 port_np, port_id, port_np->name); 1758 return -EINVAL; 1759 } 1760 1761 port = am65_common_get_port(common, port_id); 1762 port->port_id = port_id; 1763 port->common = common; 1764 port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE + 1765 AM65_CPSW_NU_PORTS_OFFSET * (port_id); 1766 port->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE + 1767 (AM65_CPSW_NU_STATS_PORT_OFFSET * port_id); 1768 port->name = of_get_property(port_np, "label", NULL); 1769 port->fetch_ram_base = 1770 common->cpsw_base + AM65_CPSW_NU_FRAM_BASE + 1771 (AM65_CPSW_NU_FRAM_PORT_OFFSET * (port_id - 1)); 1772 1773 port->slave.mac_sl = cpsw_sl_get("am65", dev, port->port_base); 1774 if (IS_ERR(port->slave.mac_sl)) 1775 return PTR_ERR(port->slave.mac_sl); 1776 1777 port->disabled = !of_device_is_available(port_np); 1778 if (port->disabled) 1779 continue; 1780 1781 port->slave.ifphy = devm_of_phy_get(dev, port_np, NULL); 1782 if (IS_ERR(port->slave.ifphy)) { 1783 ret = PTR_ERR(port->slave.ifphy); 1784 dev_err(dev, "%pOF error retrieving port phy: %d\n", 1785 port_np, ret); 1786 return ret; 1787 } 1788 1789 port->slave.mac_only = 1790 of_property_read_bool(port_np, "ti,mac-only"); 1791 1792 /* get phy/link info */ 1793 if (of_phy_is_fixed_link(port_np)) { 1794 ret = of_phy_register_fixed_link(port_np); 1795 if (ret) { 1796 if (ret != -EPROBE_DEFER) 1797 dev_err(dev, "%pOF failed to register fixed-link phy: %d\n", 1798 port_np, ret); 1799 return ret; 1800 } 1801 port->slave.phy_node = of_node_get(port_np); 1802 } else { 1803 port->slave.phy_node = 1804 of_parse_phandle(port_np, "phy-handle", 0); 1805 } 1806 1807 if (!port->slave.phy_node) { 1808 dev_err(dev, 1809 "slave[%d] no phy found\n", port_id); 1810 return -ENODEV; 1811 } 1812 1813 ret = of_get_phy_mode(port_np, &port->slave.phy_if); 1814 if (ret) { 1815 dev_err(dev, "%pOF read phy-mode err %d\n", 1816 port_np, ret); 1817 return ret; 1818 } 1819 1820 mac_addr = of_get_mac_address(port_np); 1821 if (!IS_ERR(mac_addr)) { 1822 ether_addr_copy(port->slave.mac_addr, mac_addr); 1823 } else if (am65_cpsw_am654_get_efuse_macid(port_np, 1824 port->port_id, 1825 port->slave.mac_addr) || 1826 !is_valid_ether_addr(port->slave.mac_addr)) { 1827 random_ether_addr(port->slave.mac_addr); 1828 dev_err(dev, "Use random MAC address\n"); 1829 } 1830 } 1831 of_node_put(node); 1832 1833 return 0; 1834 } 1835 1836 static void am65_cpsw_pcpu_stats_free(void *data) 1837 { 1838 struct am65_cpsw_ndev_stats __percpu *stats = data; 1839 1840 free_percpu(stats); 1841 } 1842 1843 static int am65_cpsw_nuss_init_ndev_2g(struct am65_cpsw_common *common) 1844 { 1845 struct am65_cpsw_ndev_priv *ndev_priv; 1846 struct device *dev = common->dev; 1847 struct am65_cpsw_port *port; 1848 int ret; 1849 1850 port = am65_common_get_port(common, 1); 1851 1852 /* alloc netdev */ 1853 port->ndev = devm_alloc_etherdev_mqs(common->dev, 1854 sizeof(struct am65_cpsw_ndev_priv), 1855 AM65_CPSW_MAX_TX_QUEUES, 1856 AM65_CPSW_MAX_RX_QUEUES); 1857 if (!port->ndev) { 1858 dev_err(dev, "error allocating slave net_device %u\n", 1859 port->port_id); 1860 return -ENOMEM; 1861 } 1862 1863 ndev_priv = netdev_priv(port->ndev); 1864 ndev_priv->port = port; 1865 ndev_priv->msg_enable = AM65_CPSW_DEBUG; 1866 SET_NETDEV_DEV(port->ndev, dev); 1867 1868 ether_addr_copy(port->ndev->dev_addr, port->slave.mac_addr); 1869 1870 port->ndev->min_mtu = AM65_CPSW_MIN_PACKET_SIZE; 1871 port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE; 1872 port->ndev->hw_features = NETIF_F_SG | 1873 NETIF_F_RXCSUM | 1874 NETIF_F_HW_CSUM | 1875 NETIF_F_HW_TC; 1876 port->ndev->features = port->ndev->hw_features | 1877 NETIF_F_HW_VLAN_CTAG_FILTER; 1878 port->ndev->vlan_features |= NETIF_F_SG; 1879 port->ndev->netdev_ops = &am65_cpsw_nuss_netdev_ops_2g; 1880 port->ndev->ethtool_ops = &am65_cpsw_ethtool_ops_slave; 1881 1882 /* Disable TX checksum offload by default due to HW bug */ 1883 if (common->pdata.quirks & AM65_CPSW_QUIRK_I2027_NO_TX_CSUM) 1884 port->ndev->features &= ~NETIF_F_HW_CSUM; 1885 1886 ndev_priv->stats = netdev_alloc_pcpu_stats(struct am65_cpsw_ndev_stats); 1887 if (!ndev_priv->stats) 1888 return -ENOMEM; 1889 1890 ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free, 1891 ndev_priv->stats); 1892 if (ret) { 1893 dev_err(dev, "Failed to add percpu stat free action %d\n", ret); 1894 return ret; 1895 } 1896 1897 netif_napi_add(port->ndev, &common->napi_rx, 1898 am65_cpsw_nuss_rx_poll, NAPI_POLL_WEIGHT); 1899 1900 return ret; 1901 } 1902 1903 static int am65_cpsw_nuss_ndev_add_napi_2g(struct am65_cpsw_common *common) 1904 { 1905 struct device *dev = common->dev; 1906 struct am65_cpsw_port *port; 1907 int i, ret = 0; 1908 1909 port = am65_common_get_port(common, 1); 1910 1911 for (i = 0; i < common->tx_ch_num; i++) { 1912 struct am65_cpsw_tx_chn *tx_chn = &common->tx_chns[i]; 1913 1914 netif_tx_napi_add(port->ndev, &tx_chn->napi_tx, 1915 am65_cpsw_nuss_tx_poll, NAPI_POLL_WEIGHT); 1916 1917 ret = devm_request_irq(dev, tx_chn->irq, 1918 am65_cpsw_nuss_tx_irq, 1919 IRQF_TRIGGER_HIGH, 1920 tx_chn->tx_chn_name, tx_chn); 1921 if (ret) { 1922 dev_err(dev, "failure requesting tx%u irq %u, %d\n", 1923 tx_chn->id, tx_chn->irq, ret); 1924 goto err; 1925 } 1926 } 1927 1928 err: 1929 return ret; 1930 } 1931 1932 static int am65_cpsw_nuss_ndev_reg_2g(struct am65_cpsw_common *common) 1933 { 1934 struct device *dev = common->dev; 1935 struct am65_cpsw_port *port; 1936 int ret = 0; 1937 1938 port = am65_common_get_port(common, 1); 1939 ret = am65_cpsw_nuss_ndev_add_napi_2g(common); 1940 if (ret) 1941 goto err; 1942 1943 ret = devm_request_irq(dev, common->rx_chns.irq, 1944 am65_cpsw_nuss_rx_irq, 1945 IRQF_TRIGGER_HIGH, dev_name(dev), common); 1946 if (ret) { 1947 dev_err(dev, "failure requesting rx irq %u, %d\n", 1948 common->rx_chns.irq, ret); 1949 goto err; 1950 } 1951 1952 ret = register_netdev(port->ndev); 1953 if (ret) 1954 dev_err(dev, "error registering slave net device %d\n", ret); 1955 1956 /* can't auto unregister ndev using devm_add_action() due to 1957 * devres release sequence in DD core for DMA 1958 */ 1959 err: 1960 return ret; 1961 } 1962 1963 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx) 1964 { 1965 int ret; 1966 1967 common->tx_ch_num = num_tx; 1968 ret = am65_cpsw_nuss_init_tx_chns(common); 1969 if (ret) 1970 return ret; 1971 1972 return am65_cpsw_nuss_ndev_add_napi_2g(common); 1973 } 1974 1975 static void am65_cpsw_nuss_cleanup_ndev(struct am65_cpsw_common *common) 1976 { 1977 struct am65_cpsw_port *port; 1978 int i; 1979 1980 for (i = 0; i < common->port_num; i++) { 1981 port = &common->ports[i]; 1982 if (port->ndev) 1983 unregister_netdev(port->ndev); 1984 } 1985 } 1986 1987 struct am65_cpsw_soc_pdata { 1988 u32 quirks_dis; 1989 }; 1990 1991 static const struct am65_cpsw_soc_pdata am65x_soc_sr2_0 = { 1992 .quirks_dis = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM, 1993 }; 1994 1995 static const struct soc_device_attribute am65_cpsw_socinfo[] = { 1996 { .family = "AM65X", 1997 .revision = "SR2.0", 1998 .data = &am65x_soc_sr2_0 1999 }, 2000 {/* sentinel */} 2001 }; 2002 2003 static const struct am65_cpsw_pdata am65x_sr1_0 = { 2004 .quirks = AM65_CPSW_QUIRK_I2027_NO_TX_CSUM, 2005 }; 2006 2007 static const struct am65_cpsw_pdata j721e_pdata = { 2008 .quirks = 0, 2009 }; 2010 2011 static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { 2012 { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0}, 2013 { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata}, 2014 { /* sentinel */ }, 2015 }; 2016 MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable); 2017 2018 static void am65_cpsw_nuss_apply_socinfo(struct am65_cpsw_common *common) 2019 { 2020 const struct soc_device_attribute *soc; 2021 2022 soc = soc_device_match(am65_cpsw_socinfo); 2023 if (soc && soc->data) { 2024 const struct am65_cpsw_soc_pdata *socdata = soc->data; 2025 2026 /* disable quirks */ 2027 common->pdata.quirks &= ~socdata->quirks_dis; 2028 } 2029 } 2030 2031 static int am65_cpsw_nuss_probe(struct platform_device *pdev) 2032 { 2033 struct cpsw_ale_params ale_params = { 0 }; 2034 const struct of_device_id *of_id; 2035 struct device *dev = &pdev->dev; 2036 struct am65_cpsw_common *common; 2037 struct device_node *node; 2038 struct resource *res; 2039 int ret, i; 2040 2041 common = devm_kzalloc(dev, sizeof(struct am65_cpsw_common), GFP_KERNEL); 2042 if (!common) 2043 return -ENOMEM; 2044 common->dev = dev; 2045 2046 of_id = of_match_device(am65_cpsw_nuss_of_mtable, dev); 2047 if (!of_id) 2048 return -EINVAL; 2049 common->pdata = *(const struct am65_cpsw_pdata *)of_id->data; 2050 2051 am65_cpsw_nuss_apply_socinfo(common); 2052 2053 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cpsw_nuss"); 2054 common->ss_base = devm_ioremap_resource(&pdev->dev, res); 2055 if (IS_ERR(common->ss_base)) 2056 return PTR_ERR(common->ss_base); 2057 common->cpsw_base = common->ss_base + AM65_CPSW_CPSW_NU_BASE; 2058 2059 node = of_get_child_by_name(dev->of_node, "ethernet-ports"); 2060 if (!node) 2061 return -ENOENT; 2062 common->port_num = of_get_child_count(node); 2063 if (common->port_num < 1 || common->port_num > AM65_CPSW_MAX_PORTS) 2064 return -ENOENT; 2065 of_node_put(node); 2066 2067 if (common->port_num != 1) 2068 return -EOPNOTSUPP; 2069 2070 common->rx_flow_id_base = -1; 2071 init_completion(&common->tdown_complete); 2072 common->tx_ch_num = 1; 2073 common->pf_p0_rx_ptype_rrobin = false; 2074 2075 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(48)); 2076 if (ret) { 2077 dev_err(dev, "error setting dma mask: %d\n", ret); 2078 return ret; 2079 } 2080 2081 common->ports = devm_kcalloc(dev, common->port_num, 2082 sizeof(*common->ports), 2083 GFP_KERNEL); 2084 if (!common->ports) 2085 return -ENOMEM; 2086 2087 pm_runtime_enable(dev); 2088 ret = pm_runtime_get_sync(dev); 2089 if (ret < 0) { 2090 pm_runtime_put_noidle(dev); 2091 pm_runtime_disable(dev); 2092 return ret; 2093 } 2094 2095 node = of_get_child_by_name(dev->of_node, "mdio"); 2096 if (!node) { 2097 dev_warn(dev, "MDIO node not found\n"); 2098 } else if (of_device_is_available(node)) { 2099 struct platform_device *mdio_pdev; 2100 2101 mdio_pdev = of_platform_device_create(node, NULL, dev); 2102 if (!mdio_pdev) { 2103 ret = -ENODEV; 2104 goto err_pm_clear; 2105 } 2106 2107 common->mdio_dev = &mdio_pdev->dev; 2108 } 2109 of_node_put(node); 2110 2111 am65_cpsw_nuss_get_ver(common); 2112 2113 /* init tx channels */ 2114 ret = am65_cpsw_nuss_init_tx_chns(common); 2115 if (ret) 2116 goto err_of_clear; 2117 ret = am65_cpsw_nuss_init_rx_chns(common); 2118 if (ret) 2119 goto err_of_clear; 2120 2121 ret = am65_cpsw_nuss_init_host_p(common); 2122 if (ret) 2123 goto err_of_clear; 2124 2125 ret = am65_cpsw_nuss_init_slave_ports(common); 2126 if (ret) 2127 goto err_of_clear; 2128 2129 /* init common data */ 2130 ale_params.dev = dev; 2131 ale_params.ale_ageout = AM65_CPSW_ALE_AGEOUT_DEFAULT; 2132 ale_params.ale_entries = 0; 2133 ale_params.ale_ports = common->port_num + 1; 2134 ale_params.ale_regs = common->cpsw_base + AM65_CPSW_NU_ALE_BASE; 2135 ale_params.nu_switch_ale = true; 2136 2137 common->ale = cpsw_ale_create(&ale_params); 2138 if (IS_ERR(common->ale)) { 2139 dev_err(dev, "error initializing ale engine\n"); 2140 ret = PTR_ERR(common->ale); 2141 goto err_of_clear; 2142 } 2143 2144 ret = am65_cpsw_init_cpts(common); 2145 if (ret) 2146 goto err_of_clear; 2147 2148 /* init ports */ 2149 for (i = 0; i < common->port_num; i++) 2150 am65_cpsw_nuss_slave_disable_unused(&common->ports[i]); 2151 2152 dev_set_drvdata(dev, common); 2153 2154 ret = am65_cpsw_nuss_init_ndev_2g(common); 2155 if (ret) 2156 goto err_of_clear; 2157 2158 ret = am65_cpsw_nuss_ndev_reg_2g(common); 2159 if (ret) 2160 goto err_of_clear; 2161 2162 pm_runtime_put(dev); 2163 return 0; 2164 2165 err_of_clear: 2166 of_platform_device_destroy(common->mdio_dev, NULL); 2167 err_pm_clear: 2168 pm_runtime_put_sync(dev); 2169 pm_runtime_disable(dev); 2170 return ret; 2171 } 2172 2173 static int am65_cpsw_nuss_remove(struct platform_device *pdev) 2174 { 2175 struct device *dev = &pdev->dev; 2176 struct am65_cpsw_common *common; 2177 int ret; 2178 2179 common = dev_get_drvdata(dev); 2180 2181 ret = pm_runtime_get_sync(&pdev->dev); 2182 if (ret < 0) { 2183 pm_runtime_put_noidle(&pdev->dev); 2184 return ret; 2185 } 2186 2187 /* must unregister ndevs here because DD release_driver routine calls 2188 * dma_deconfigure(dev) before devres_release_all(dev) 2189 */ 2190 am65_cpsw_nuss_cleanup_ndev(common); 2191 2192 of_platform_device_destroy(common->mdio_dev, NULL); 2193 2194 pm_runtime_put_sync(&pdev->dev); 2195 pm_runtime_disable(&pdev->dev); 2196 return 0; 2197 } 2198 2199 static struct platform_driver am65_cpsw_nuss_driver = { 2200 .driver = { 2201 .name = AM65_CPSW_DRV_NAME, 2202 .of_match_table = am65_cpsw_nuss_of_mtable, 2203 }, 2204 .probe = am65_cpsw_nuss_probe, 2205 .remove = am65_cpsw_nuss_remove, 2206 }; 2207 2208 module_platform_driver(am65_cpsw_nuss_driver); 2209 2210 MODULE_LICENSE("GPL v2"); 2211 MODULE_AUTHOR("Grygorii Strashko <grygorii.strashko@ti.com>"); 2212 MODULE_DESCRIPTION("TI AM65 CPSW Ethernet driver"); 2213