1 /* Synopsys DesignWare Core Enterprise Ethernet (XLGMAC) Driver 2 * 3 * Copyright (c) 2017 Synopsys, Inc. (www.synopsys.com) 4 * 5 * This program is dual-licensed; you may select either version 2 of 6 * the GNU General Public License ("GPL") or BSD license ("BSD"). 7 * 8 * This Synopsys DWC XLGMAC software driver and associated documentation 9 * (hereinafter the "Software") is an unsupported proprietary work of 10 * Synopsys, Inc. unless otherwise expressly agreed to in writing between 11 * Synopsys and you. The Software IS NOT an item of Licensed Software or a 12 * Licensed Product under any End User Software License Agreement or 13 * Agreement for Licensed Products with Synopsys or any supplement thereto. 14 * Synopsys is a registered trademark of Synopsys, Inc. Other names included 15 * in the SOFTWARE may be the trademarks of their respective owners. 16 */ 17 18 #include <linux/netdevice.h> 19 #include <linux/tcp.h> 20 21 #include "dwc-xlgmac.h" 22 #include "dwc-xlgmac-reg.h" 23 24 static int xlgmac_one_poll(struct napi_struct *, int); 25 static int xlgmac_all_poll(struct napi_struct *, int); 26 27 static inline unsigned int xlgmac_tx_avail_desc(struct xlgmac_ring *ring) 28 { 29 return (ring->dma_desc_count - (ring->cur - ring->dirty)); 30 } 31 32 static inline unsigned int xlgmac_rx_dirty_desc(struct xlgmac_ring *ring) 33 { 34 return (ring->cur - ring->dirty); 35 } 36 37 static int xlgmac_maybe_stop_tx_queue( 38 struct xlgmac_channel *channel, 39 struct xlgmac_ring *ring, 40 unsigned int count) 41 { 42 struct xlgmac_pdata *pdata = channel->pdata; 43 44 if (count > xlgmac_tx_avail_desc(ring)) { 45 netif_info(pdata, drv, pdata->netdev, 46 "Tx queue stopped, not enough descriptors available\n"); 47 netif_stop_subqueue(pdata->netdev, channel->queue_index); 48 ring->tx.queue_stopped = 1; 49 50 /* If we haven't notified the hardware because of xmit_more 51 * support, tell it now 52 */ 53 if (ring->tx.xmit_more) 54 pdata->hw_ops.tx_start_xmit(channel, ring); 55 56 return NETDEV_TX_BUSY; 57 } 58 59 return 0; 60 } 61 62 static void xlgmac_prep_vlan(struct sk_buff *skb, 63 struct xlgmac_pkt_info *pkt_info) 64 { 65 if (skb_vlan_tag_present(skb)) 66 pkt_info->vlan_ctag = skb_vlan_tag_get(skb); 67 } 68 69 static int xlgmac_prep_tso(struct sk_buff *skb, 70 struct xlgmac_pkt_info *pkt_info) 71 { 72 int ret; 73 74 if (!XLGMAC_GET_REG_BITS(pkt_info->attributes, 75 TX_PACKET_ATTRIBUTES_TSO_ENABLE_POS, 76 TX_PACKET_ATTRIBUTES_TSO_ENABLE_LEN)) 77 return 0; 78 79 ret = skb_cow_head(skb, 0); 80 if (ret) 81 return ret; 82 83 pkt_info->header_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 84 pkt_info->tcp_header_len = tcp_hdrlen(skb); 85 pkt_info->tcp_payload_len = skb->len - pkt_info->header_len; 86 pkt_info->mss = skb_shinfo(skb)->gso_size; 87 88 XLGMAC_PR("header_len=%u\n", pkt_info->header_len); 89 XLGMAC_PR("tcp_header_len=%u, tcp_payload_len=%u\n", 90 pkt_info->tcp_header_len, pkt_info->tcp_payload_len); 91 XLGMAC_PR("mss=%u\n", pkt_info->mss); 92 93 /* Update the number of packets that will ultimately be transmitted 94 * along with the extra bytes for each extra packet 95 */ 96 pkt_info->tx_packets = skb_shinfo(skb)->gso_segs; 97 pkt_info->tx_bytes += (pkt_info->tx_packets - 1) * pkt_info->header_len; 98 99 return 0; 100 } 101 102 static int xlgmac_is_tso(struct sk_buff *skb) 103 { 104 if (skb->ip_summed != CHECKSUM_PARTIAL) 105 return 0; 106 107 if (!skb_is_gso(skb)) 108 return 0; 109 110 return 1; 111 } 112 113 static void xlgmac_prep_tx_pkt(struct xlgmac_pdata *pdata, 114 struct xlgmac_ring *ring, 115 struct sk_buff *skb, 116 struct xlgmac_pkt_info *pkt_info) 117 { 118 struct skb_frag_struct *frag; 119 unsigned int context_desc; 120 unsigned int len; 121 unsigned int i; 122 123 pkt_info->skb = skb; 124 125 context_desc = 0; 126 pkt_info->desc_count = 0; 127 128 pkt_info->tx_packets = 1; 129 pkt_info->tx_bytes = skb->len; 130 131 if (xlgmac_is_tso(skb)) { 132 /* TSO requires an extra descriptor if mss is different */ 133 if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) { 134 context_desc = 1; 135 pkt_info->desc_count++; 136 } 137 138 /* TSO requires an extra descriptor for TSO header */ 139 pkt_info->desc_count++; 140 141 pkt_info->attributes = XLGMAC_SET_REG_BITS( 142 pkt_info->attributes, 143 TX_PACKET_ATTRIBUTES_TSO_ENABLE_POS, 144 TX_PACKET_ATTRIBUTES_TSO_ENABLE_LEN, 145 1); 146 pkt_info->attributes = XLGMAC_SET_REG_BITS( 147 pkt_info->attributes, 148 TX_PACKET_ATTRIBUTES_CSUM_ENABLE_POS, 149 TX_PACKET_ATTRIBUTES_CSUM_ENABLE_LEN, 150 1); 151 } else if (skb->ip_summed == CHECKSUM_PARTIAL) 152 pkt_info->attributes = XLGMAC_SET_REG_BITS( 153 pkt_info->attributes, 154 TX_PACKET_ATTRIBUTES_CSUM_ENABLE_POS, 155 TX_PACKET_ATTRIBUTES_CSUM_ENABLE_LEN, 156 1); 157 158 if (skb_vlan_tag_present(skb)) { 159 /* VLAN requires an extra descriptor if tag is different */ 160 if (skb_vlan_tag_get(skb) != ring->tx.cur_vlan_ctag) 161 /* We can share with the TSO context descriptor */ 162 if (!context_desc) { 163 context_desc = 1; 164 pkt_info->desc_count++; 165 } 166 167 pkt_info->attributes = XLGMAC_SET_REG_BITS( 168 pkt_info->attributes, 169 TX_PACKET_ATTRIBUTES_VLAN_CTAG_POS, 170 TX_PACKET_ATTRIBUTES_VLAN_CTAG_LEN, 171 1); 172 } 173 174 for (len = skb_headlen(skb); len;) { 175 pkt_info->desc_count++; 176 len -= min_t(unsigned int, len, XLGMAC_TX_MAX_BUF_SIZE); 177 } 178 179 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 180 frag = &skb_shinfo(skb)->frags[i]; 181 for (len = skb_frag_size(frag); len; ) { 182 pkt_info->desc_count++; 183 len -= min_t(unsigned int, len, XLGMAC_TX_MAX_BUF_SIZE); 184 } 185 } 186 } 187 188 static int xlgmac_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu) 189 { 190 unsigned int rx_buf_size; 191 192 if (mtu > XLGMAC_JUMBO_PACKET_MTU) { 193 netdev_alert(netdev, "MTU exceeds maximum supported value\n"); 194 return -EINVAL; 195 } 196 197 rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 198 rx_buf_size = clamp_val(rx_buf_size, XLGMAC_RX_MIN_BUF_SIZE, PAGE_SIZE); 199 200 rx_buf_size = (rx_buf_size + XLGMAC_RX_BUF_ALIGN - 1) & 201 ~(XLGMAC_RX_BUF_ALIGN - 1); 202 203 return rx_buf_size; 204 } 205 206 static void xlgmac_enable_rx_tx_ints(struct xlgmac_pdata *pdata) 207 { 208 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 209 struct xlgmac_channel *channel; 210 enum xlgmac_int int_id; 211 unsigned int i; 212 213 channel = pdata->channel_head; 214 for (i = 0; i < pdata->channel_count; i++, channel++) { 215 if (channel->tx_ring && channel->rx_ring) 216 int_id = XLGMAC_INT_DMA_CH_SR_TI_RI; 217 else if (channel->tx_ring) 218 int_id = XLGMAC_INT_DMA_CH_SR_TI; 219 else if (channel->rx_ring) 220 int_id = XLGMAC_INT_DMA_CH_SR_RI; 221 else 222 continue; 223 224 hw_ops->enable_int(channel, int_id); 225 } 226 } 227 228 static void xlgmac_disable_rx_tx_ints(struct xlgmac_pdata *pdata) 229 { 230 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 231 struct xlgmac_channel *channel; 232 enum xlgmac_int int_id; 233 unsigned int i; 234 235 channel = pdata->channel_head; 236 for (i = 0; i < pdata->channel_count; i++, channel++) { 237 if (channel->tx_ring && channel->rx_ring) 238 int_id = XLGMAC_INT_DMA_CH_SR_TI_RI; 239 else if (channel->tx_ring) 240 int_id = XLGMAC_INT_DMA_CH_SR_TI; 241 else if (channel->rx_ring) 242 int_id = XLGMAC_INT_DMA_CH_SR_RI; 243 else 244 continue; 245 246 hw_ops->disable_int(channel, int_id); 247 } 248 } 249 250 static irqreturn_t xlgmac_isr(int irq, void *data) 251 { 252 unsigned int dma_isr, dma_ch_isr, mac_isr; 253 struct xlgmac_pdata *pdata = data; 254 struct xlgmac_channel *channel; 255 struct xlgmac_hw_ops *hw_ops; 256 unsigned int i, ti, ri; 257 258 hw_ops = &pdata->hw_ops; 259 260 /* The DMA interrupt status register also reports MAC and MTL 261 * interrupts. So for polling mode, we just need to check for 262 * this register to be non-zero 263 */ 264 dma_isr = readl(pdata->mac_regs + DMA_ISR); 265 if (!dma_isr) 266 return IRQ_HANDLED; 267 268 netif_dbg(pdata, intr, pdata->netdev, "DMA_ISR=%#010x\n", dma_isr); 269 270 for (i = 0; i < pdata->channel_count; i++) { 271 if (!(dma_isr & (1 << i))) 272 continue; 273 274 channel = pdata->channel_head + i; 275 276 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); 277 netif_dbg(pdata, intr, pdata->netdev, "DMA_CH%u_ISR=%#010x\n", 278 i, dma_ch_isr); 279 280 /* The TI or RI interrupt bits may still be set even if using 281 * per channel DMA interrupts. Check to be sure those are not 282 * enabled before using the private data napi structure. 283 */ 284 ti = XLGMAC_GET_REG_BITS(dma_ch_isr, DMA_CH_SR_TI_POS, 285 DMA_CH_SR_TI_LEN); 286 ri = XLGMAC_GET_REG_BITS(dma_ch_isr, DMA_CH_SR_RI_POS, 287 DMA_CH_SR_RI_LEN); 288 if (!pdata->per_channel_irq && (ti || ri)) { 289 if (napi_schedule_prep(&pdata->napi)) { 290 /* Disable Tx and Rx interrupts */ 291 xlgmac_disable_rx_tx_ints(pdata); 292 293 /* Turn on polling */ 294 __napi_schedule_irqoff(&pdata->napi); 295 } 296 } 297 298 if (XLGMAC_GET_REG_BITS(dma_ch_isr, DMA_CH_SR_RBU_POS, 299 DMA_CH_SR_RBU_LEN)) 300 pdata->stats.rx_buffer_unavailable++; 301 302 /* Restart the device on a Fatal Bus Error */ 303 if (XLGMAC_GET_REG_BITS(dma_ch_isr, DMA_CH_SR_FBE_POS, 304 DMA_CH_SR_FBE_LEN)) 305 schedule_work(&pdata->restart_work); 306 307 /* Clear all interrupt signals */ 308 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); 309 } 310 311 if (XLGMAC_GET_REG_BITS(dma_isr, DMA_ISR_MACIS_POS, 312 DMA_ISR_MACIS_LEN)) { 313 mac_isr = readl(pdata->mac_regs + MAC_ISR); 314 315 if (XLGMAC_GET_REG_BITS(mac_isr, MAC_ISR_MMCTXIS_POS, 316 MAC_ISR_MMCTXIS_LEN)) 317 hw_ops->tx_mmc_int(pdata); 318 319 if (XLGMAC_GET_REG_BITS(mac_isr, MAC_ISR_MMCRXIS_POS, 320 MAC_ISR_MMCRXIS_LEN)) 321 hw_ops->rx_mmc_int(pdata); 322 } 323 324 return IRQ_HANDLED; 325 } 326 327 static irqreturn_t xlgmac_dma_isr(int irq, void *data) 328 { 329 struct xlgmac_channel *channel = data; 330 331 /* Per channel DMA interrupts are enabled, so we use the per 332 * channel napi structure and not the private data napi structure 333 */ 334 if (napi_schedule_prep(&channel->napi)) { 335 /* Disable Tx and Rx interrupts */ 336 disable_irq_nosync(channel->dma_irq); 337 338 /* Turn on polling */ 339 __napi_schedule_irqoff(&channel->napi); 340 } 341 342 return IRQ_HANDLED; 343 } 344 345 static void xlgmac_tx_timer(unsigned long data) 346 { 347 struct xlgmac_channel *channel = (struct xlgmac_channel *)data; 348 struct xlgmac_pdata *pdata = channel->pdata; 349 struct napi_struct *napi; 350 351 napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi; 352 353 if (napi_schedule_prep(napi)) { 354 /* Disable Tx and Rx interrupts */ 355 if (pdata->per_channel_irq) 356 disable_irq_nosync(channel->dma_irq); 357 else 358 xlgmac_disable_rx_tx_ints(pdata); 359 360 /* Turn on polling */ 361 __napi_schedule(napi); 362 } 363 364 channel->tx_timer_active = 0; 365 } 366 367 static void xlgmac_init_timers(struct xlgmac_pdata *pdata) 368 { 369 struct xlgmac_channel *channel; 370 unsigned int i; 371 372 channel = pdata->channel_head; 373 for (i = 0; i < pdata->channel_count; i++, channel++) { 374 if (!channel->tx_ring) 375 break; 376 377 setup_timer(&channel->tx_timer, xlgmac_tx_timer, 378 (unsigned long)channel); 379 } 380 } 381 382 static void xlgmac_stop_timers(struct xlgmac_pdata *pdata) 383 { 384 struct xlgmac_channel *channel; 385 unsigned int i; 386 387 channel = pdata->channel_head; 388 for (i = 0; i < pdata->channel_count; i++, channel++) { 389 if (!channel->tx_ring) 390 break; 391 392 del_timer_sync(&channel->tx_timer); 393 } 394 } 395 396 static void xlgmac_napi_enable(struct xlgmac_pdata *pdata, unsigned int add) 397 { 398 struct xlgmac_channel *channel; 399 unsigned int i; 400 401 if (pdata->per_channel_irq) { 402 channel = pdata->channel_head; 403 for (i = 0; i < pdata->channel_count; i++, channel++) { 404 if (add) 405 netif_napi_add(pdata->netdev, &channel->napi, 406 xlgmac_one_poll, 407 NAPI_POLL_WEIGHT); 408 409 napi_enable(&channel->napi); 410 } 411 } else { 412 if (add) 413 netif_napi_add(pdata->netdev, &pdata->napi, 414 xlgmac_all_poll, NAPI_POLL_WEIGHT); 415 416 napi_enable(&pdata->napi); 417 } 418 } 419 420 static void xlgmac_napi_disable(struct xlgmac_pdata *pdata, unsigned int del) 421 { 422 struct xlgmac_channel *channel; 423 unsigned int i; 424 425 if (pdata->per_channel_irq) { 426 channel = pdata->channel_head; 427 for (i = 0; i < pdata->channel_count; i++, channel++) { 428 napi_disable(&channel->napi); 429 430 if (del) 431 netif_napi_del(&channel->napi); 432 } 433 } else { 434 napi_disable(&pdata->napi); 435 436 if (del) 437 netif_napi_del(&pdata->napi); 438 } 439 } 440 441 static int xlgmac_request_irqs(struct xlgmac_pdata *pdata) 442 { 443 struct net_device *netdev = pdata->netdev; 444 struct xlgmac_channel *channel; 445 unsigned int i; 446 int ret; 447 448 ret = devm_request_irq(pdata->dev, pdata->dev_irq, xlgmac_isr, 449 IRQF_SHARED, netdev->name, pdata); 450 if (ret) { 451 netdev_alert(netdev, "error requesting irq %d\n", 452 pdata->dev_irq); 453 return ret; 454 } 455 456 if (!pdata->per_channel_irq) 457 return 0; 458 459 channel = pdata->channel_head; 460 for (i = 0; i < pdata->channel_count; i++, channel++) { 461 snprintf(channel->dma_irq_name, 462 sizeof(channel->dma_irq_name) - 1, 463 "%s-TxRx-%u", netdev_name(netdev), 464 channel->queue_index); 465 466 ret = devm_request_irq(pdata->dev, channel->dma_irq, 467 xlgmac_dma_isr, 0, 468 channel->dma_irq_name, channel); 469 if (ret) { 470 netdev_alert(netdev, "error requesting irq %d\n", 471 channel->dma_irq); 472 goto err_irq; 473 } 474 } 475 476 return 0; 477 478 err_irq: 479 /* Using an unsigned int, 'i' will go to UINT_MAX and exit */ 480 for (i--, channel--; i < pdata->channel_count; i--, channel--) 481 devm_free_irq(pdata->dev, channel->dma_irq, channel); 482 483 devm_free_irq(pdata->dev, pdata->dev_irq, pdata); 484 485 return ret; 486 } 487 488 static void xlgmac_free_irqs(struct xlgmac_pdata *pdata) 489 { 490 struct xlgmac_channel *channel; 491 unsigned int i; 492 493 devm_free_irq(pdata->dev, pdata->dev_irq, pdata); 494 495 if (!pdata->per_channel_irq) 496 return; 497 498 channel = pdata->channel_head; 499 for (i = 0; i < pdata->channel_count; i++, channel++) 500 devm_free_irq(pdata->dev, channel->dma_irq, channel); 501 } 502 503 static void xlgmac_free_tx_data(struct xlgmac_pdata *pdata) 504 { 505 struct xlgmac_desc_ops *desc_ops = &pdata->desc_ops; 506 struct xlgmac_desc_data *desc_data; 507 struct xlgmac_channel *channel; 508 struct xlgmac_ring *ring; 509 unsigned int i, j; 510 511 channel = pdata->channel_head; 512 for (i = 0; i < pdata->channel_count; i++, channel++) { 513 ring = channel->tx_ring; 514 if (!ring) 515 break; 516 517 for (j = 0; j < ring->dma_desc_count; j++) { 518 desc_data = XLGMAC_GET_DESC_DATA(ring, j); 519 desc_ops->unmap_desc_data(pdata, desc_data); 520 } 521 } 522 } 523 524 static void xlgmac_free_rx_data(struct xlgmac_pdata *pdata) 525 { 526 struct xlgmac_desc_ops *desc_ops = &pdata->desc_ops; 527 struct xlgmac_desc_data *desc_data; 528 struct xlgmac_channel *channel; 529 struct xlgmac_ring *ring; 530 unsigned int i, j; 531 532 channel = pdata->channel_head; 533 for (i = 0; i < pdata->channel_count; i++, channel++) { 534 ring = channel->rx_ring; 535 if (!ring) 536 break; 537 538 for (j = 0; j < ring->dma_desc_count; j++) { 539 desc_data = XLGMAC_GET_DESC_DATA(ring, j); 540 desc_ops->unmap_desc_data(pdata, desc_data); 541 } 542 } 543 } 544 545 static int xlgmac_start(struct xlgmac_pdata *pdata) 546 { 547 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 548 struct net_device *netdev = pdata->netdev; 549 int ret; 550 551 hw_ops->init(pdata); 552 xlgmac_napi_enable(pdata, 1); 553 554 ret = xlgmac_request_irqs(pdata); 555 if (ret) 556 goto err_napi; 557 558 hw_ops->enable_tx(pdata); 559 hw_ops->enable_rx(pdata); 560 netif_tx_start_all_queues(netdev); 561 562 return 0; 563 564 err_napi: 565 xlgmac_napi_disable(pdata, 1); 566 hw_ops->exit(pdata); 567 568 return ret; 569 } 570 571 static void xlgmac_stop(struct xlgmac_pdata *pdata) 572 { 573 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 574 struct net_device *netdev = pdata->netdev; 575 struct xlgmac_channel *channel; 576 struct netdev_queue *txq; 577 unsigned int i; 578 579 netif_tx_stop_all_queues(netdev); 580 xlgmac_stop_timers(pdata); 581 hw_ops->disable_tx(pdata); 582 hw_ops->disable_rx(pdata); 583 xlgmac_free_irqs(pdata); 584 xlgmac_napi_disable(pdata, 1); 585 hw_ops->exit(pdata); 586 587 channel = pdata->channel_head; 588 for (i = 0; i < pdata->channel_count; i++, channel++) { 589 if (!channel->tx_ring) 590 continue; 591 592 txq = netdev_get_tx_queue(netdev, channel->queue_index); 593 netdev_tx_reset_queue(txq); 594 } 595 } 596 597 static void xlgmac_restart_dev(struct xlgmac_pdata *pdata) 598 { 599 /* If not running, "restart" will happen on open */ 600 if (!netif_running(pdata->netdev)) 601 return; 602 603 xlgmac_stop(pdata); 604 605 xlgmac_free_tx_data(pdata); 606 xlgmac_free_rx_data(pdata); 607 608 xlgmac_start(pdata); 609 } 610 611 static void xlgmac_restart(struct work_struct *work) 612 { 613 struct xlgmac_pdata *pdata = container_of(work, 614 struct xlgmac_pdata, 615 restart_work); 616 617 rtnl_lock(); 618 619 xlgmac_restart_dev(pdata); 620 621 rtnl_unlock(); 622 } 623 624 static int xlgmac_open(struct net_device *netdev) 625 { 626 struct xlgmac_pdata *pdata = netdev_priv(netdev); 627 struct xlgmac_desc_ops *desc_ops; 628 int ret; 629 630 desc_ops = &pdata->desc_ops; 631 632 /* TODO: Initialize the phy */ 633 634 /* Calculate the Rx buffer size before allocating rings */ 635 ret = xlgmac_calc_rx_buf_size(netdev, netdev->mtu); 636 if (ret < 0) 637 return ret; 638 pdata->rx_buf_size = ret; 639 640 /* Allocate the channels and rings */ 641 ret = desc_ops->alloc_channles_and_rings(pdata); 642 if (ret) 643 return ret; 644 645 INIT_WORK(&pdata->restart_work, xlgmac_restart); 646 xlgmac_init_timers(pdata); 647 648 ret = xlgmac_start(pdata); 649 if (ret) 650 goto err_channels_and_rings; 651 652 return 0; 653 654 err_channels_and_rings: 655 desc_ops->free_channels_and_rings(pdata); 656 657 return ret; 658 } 659 660 static int xlgmac_close(struct net_device *netdev) 661 { 662 struct xlgmac_pdata *pdata = netdev_priv(netdev); 663 struct xlgmac_desc_ops *desc_ops; 664 665 desc_ops = &pdata->desc_ops; 666 667 /* Stop the device */ 668 xlgmac_stop(pdata); 669 670 /* Free the channels and rings */ 671 desc_ops->free_channels_and_rings(pdata); 672 673 return 0; 674 } 675 676 static void xlgmac_tx_timeout(struct net_device *netdev) 677 { 678 struct xlgmac_pdata *pdata = netdev_priv(netdev); 679 680 netdev_warn(netdev, "tx timeout, device restarting\n"); 681 schedule_work(&pdata->restart_work); 682 } 683 684 static int xlgmac_xmit(struct sk_buff *skb, struct net_device *netdev) 685 { 686 struct xlgmac_pdata *pdata = netdev_priv(netdev); 687 struct xlgmac_pkt_info *tx_pkt_info; 688 struct xlgmac_desc_ops *desc_ops; 689 struct xlgmac_channel *channel; 690 struct xlgmac_hw_ops *hw_ops; 691 struct netdev_queue *txq; 692 struct xlgmac_ring *ring; 693 int ret; 694 695 desc_ops = &pdata->desc_ops; 696 hw_ops = &pdata->hw_ops; 697 698 XLGMAC_PR("skb->len = %d\n", skb->len); 699 700 channel = pdata->channel_head + skb->queue_mapping; 701 txq = netdev_get_tx_queue(netdev, channel->queue_index); 702 ring = channel->tx_ring; 703 tx_pkt_info = &ring->pkt_info; 704 705 if (skb->len == 0) { 706 netif_err(pdata, tx_err, netdev, 707 "empty skb received from stack\n"); 708 dev_kfree_skb_any(skb); 709 return NETDEV_TX_OK; 710 } 711 712 /* Prepare preliminary packet info for TX */ 713 memset(tx_pkt_info, 0, sizeof(*tx_pkt_info)); 714 xlgmac_prep_tx_pkt(pdata, ring, skb, tx_pkt_info); 715 716 /* Check that there are enough descriptors available */ 717 ret = xlgmac_maybe_stop_tx_queue(channel, ring, 718 tx_pkt_info->desc_count); 719 if (ret) 720 return ret; 721 722 ret = xlgmac_prep_tso(skb, tx_pkt_info); 723 if (ret) { 724 netif_err(pdata, tx_err, netdev, 725 "error processing TSO packet\n"); 726 dev_kfree_skb_any(skb); 727 return ret; 728 } 729 xlgmac_prep_vlan(skb, tx_pkt_info); 730 731 if (!desc_ops->map_tx_skb(channel, skb)) { 732 dev_kfree_skb_any(skb); 733 return NETDEV_TX_OK; 734 } 735 736 /* Report on the actual number of bytes (to be) sent */ 737 netdev_tx_sent_queue(txq, tx_pkt_info->tx_bytes); 738 739 /* Configure required descriptor fields for transmission */ 740 hw_ops->dev_xmit(channel); 741 742 if (netif_msg_pktdata(pdata)) 743 xlgmac_print_pkt(netdev, skb, true); 744 745 /* Stop the queue in advance if there may not be enough descriptors */ 746 xlgmac_maybe_stop_tx_queue(channel, ring, XLGMAC_TX_MAX_DESC_NR); 747 748 return NETDEV_TX_OK; 749 } 750 751 static void xlgmac_get_stats64(struct net_device *netdev, 752 struct rtnl_link_stats64 *s) 753 { 754 struct xlgmac_pdata *pdata = netdev_priv(netdev); 755 struct xlgmac_stats *pstats = &pdata->stats; 756 757 pdata->hw_ops.read_mmc_stats(pdata); 758 759 s->rx_packets = pstats->rxframecount_gb; 760 s->rx_bytes = pstats->rxoctetcount_gb; 761 s->rx_errors = pstats->rxframecount_gb - 762 pstats->rxbroadcastframes_g - 763 pstats->rxmulticastframes_g - 764 pstats->rxunicastframes_g; 765 s->multicast = pstats->rxmulticastframes_g; 766 s->rx_length_errors = pstats->rxlengtherror; 767 s->rx_crc_errors = pstats->rxcrcerror; 768 s->rx_fifo_errors = pstats->rxfifooverflow; 769 770 s->tx_packets = pstats->txframecount_gb; 771 s->tx_bytes = pstats->txoctetcount_gb; 772 s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g; 773 s->tx_dropped = netdev->stats.tx_dropped; 774 } 775 776 static int xlgmac_set_mac_address(struct net_device *netdev, void *addr) 777 { 778 struct xlgmac_pdata *pdata = netdev_priv(netdev); 779 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 780 struct sockaddr *saddr = addr; 781 782 if (!is_valid_ether_addr(saddr->sa_data)) 783 return -EADDRNOTAVAIL; 784 785 memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len); 786 787 hw_ops->set_mac_address(pdata, netdev->dev_addr); 788 789 return 0; 790 } 791 792 static int xlgmac_ioctl(struct net_device *netdev, 793 struct ifreq *ifreq, int cmd) 794 { 795 if (!netif_running(netdev)) 796 return -ENODEV; 797 798 return 0; 799 } 800 801 static int xlgmac_change_mtu(struct net_device *netdev, int mtu) 802 { 803 struct xlgmac_pdata *pdata = netdev_priv(netdev); 804 int ret; 805 806 ret = xlgmac_calc_rx_buf_size(netdev, mtu); 807 if (ret < 0) 808 return ret; 809 810 pdata->rx_buf_size = ret; 811 netdev->mtu = mtu; 812 813 xlgmac_restart_dev(pdata); 814 815 return 0; 816 } 817 818 static int xlgmac_vlan_rx_add_vid(struct net_device *netdev, 819 __be16 proto, 820 u16 vid) 821 { 822 struct xlgmac_pdata *pdata = netdev_priv(netdev); 823 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 824 825 set_bit(vid, pdata->active_vlans); 826 hw_ops->update_vlan_hash_table(pdata); 827 828 return 0; 829 } 830 831 static int xlgmac_vlan_rx_kill_vid(struct net_device *netdev, 832 __be16 proto, 833 u16 vid) 834 { 835 struct xlgmac_pdata *pdata = netdev_priv(netdev); 836 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 837 838 clear_bit(vid, pdata->active_vlans); 839 hw_ops->update_vlan_hash_table(pdata); 840 841 return 0; 842 } 843 844 #ifdef CONFIG_NET_POLL_CONTROLLER 845 static void xlgmac_poll_controller(struct net_device *netdev) 846 { 847 struct xlgmac_pdata *pdata = netdev_priv(netdev); 848 struct xlgmac_channel *channel; 849 unsigned int i; 850 851 if (pdata->per_channel_irq) { 852 channel = pdata->channel_head; 853 for (i = 0; i < pdata->channel_count; i++, channel++) 854 xlgmac_dma_isr(channel->dma_irq, channel); 855 } else { 856 disable_irq(pdata->dev_irq); 857 xlgmac_isr(pdata->dev_irq, pdata); 858 enable_irq(pdata->dev_irq); 859 } 860 } 861 #endif /* CONFIG_NET_POLL_CONTROLLER */ 862 863 static int xlgmac_set_features(struct net_device *netdev, 864 netdev_features_t features) 865 { 866 netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter; 867 struct xlgmac_pdata *pdata = netdev_priv(netdev); 868 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 869 int ret = 0; 870 871 rxhash = pdata->netdev_features & NETIF_F_RXHASH; 872 rxcsum = pdata->netdev_features & NETIF_F_RXCSUM; 873 rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX; 874 rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER; 875 876 if ((features & NETIF_F_RXHASH) && !rxhash) 877 ret = hw_ops->enable_rss(pdata); 878 else if (!(features & NETIF_F_RXHASH) && rxhash) 879 ret = hw_ops->disable_rss(pdata); 880 if (ret) 881 return ret; 882 883 if ((features & NETIF_F_RXCSUM) && !rxcsum) 884 hw_ops->enable_rx_csum(pdata); 885 else if (!(features & NETIF_F_RXCSUM) && rxcsum) 886 hw_ops->disable_rx_csum(pdata); 887 888 if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan) 889 hw_ops->enable_rx_vlan_stripping(pdata); 890 else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan) 891 hw_ops->disable_rx_vlan_stripping(pdata); 892 893 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter) 894 hw_ops->enable_rx_vlan_filtering(pdata); 895 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter) 896 hw_ops->disable_rx_vlan_filtering(pdata); 897 898 pdata->netdev_features = features; 899 900 return 0; 901 } 902 903 static void xlgmac_set_rx_mode(struct net_device *netdev) 904 { 905 struct xlgmac_pdata *pdata = netdev_priv(netdev); 906 struct xlgmac_hw_ops *hw_ops = &pdata->hw_ops; 907 908 hw_ops->config_rx_mode(pdata); 909 } 910 911 static const struct net_device_ops xlgmac_netdev_ops = { 912 .ndo_open = xlgmac_open, 913 .ndo_stop = xlgmac_close, 914 .ndo_start_xmit = xlgmac_xmit, 915 .ndo_tx_timeout = xlgmac_tx_timeout, 916 .ndo_get_stats64 = xlgmac_get_stats64, 917 .ndo_change_mtu = xlgmac_change_mtu, 918 .ndo_set_mac_address = xlgmac_set_mac_address, 919 .ndo_validate_addr = eth_validate_addr, 920 .ndo_do_ioctl = xlgmac_ioctl, 921 .ndo_vlan_rx_add_vid = xlgmac_vlan_rx_add_vid, 922 .ndo_vlan_rx_kill_vid = xlgmac_vlan_rx_kill_vid, 923 #ifdef CONFIG_NET_POLL_CONTROLLER 924 .ndo_poll_controller = xlgmac_poll_controller, 925 #endif 926 .ndo_set_features = xlgmac_set_features, 927 .ndo_set_rx_mode = xlgmac_set_rx_mode, 928 }; 929 930 const struct net_device_ops *xlgmac_get_netdev_ops(void) 931 { 932 return &xlgmac_netdev_ops; 933 } 934 935 static void xlgmac_rx_refresh(struct xlgmac_channel *channel) 936 { 937 struct xlgmac_pdata *pdata = channel->pdata; 938 struct xlgmac_ring *ring = channel->rx_ring; 939 struct xlgmac_desc_data *desc_data; 940 struct xlgmac_desc_ops *desc_ops; 941 struct xlgmac_hw_ops *hw_ops; 942 943 desc_ops = &pdata->desc_ops; 944 hw_ops = &pdata->hw_ops; 945 946 while (ring->dirty != ring->cur) { 947 desc_data = XLGMAC_GET_DESC_DATA(ring, ring->dirty); 948 949 /* Reset desc_data values */ 950 desc_ops->unmap_desc_data(pdata, desc_data); 951 952 if (desc_ops->map_rx_buffer(pdata, ring, desc_data)) 953 break; 954 955 hw_ops->rx_desc_reset(pdata, desc_data, ring->dirty); 956 957 ring->dirty++; 958 } 959 960 /* Make sure everything is written before the register write */ 961 wmb(); 962 963 /* Update the Rx Tail Pointer Register with address of 964 * the last cleaned entry 965 */ 966 desc_data = XLGMAC_GET_DESC_DATA(ring, ring->dirty - 1); 967 writel(lower_32_bits(desc_data->dma_desc_addr), 968 XLGMAC_DMA_REG(channel, DMA_CH_RDTR_LO)); 969 } 970 971 static struct sk_buff *xlgmac_create_skb(struct xlgmac_pdata *pdata, 972 struct napi_struct *napi, 973 struct xlgmac_desc_data *desc_data, 974 unsigned int len) 975 { 976 unsigned int copy_len; 977 struct sk_buff *skb; 978 u8 *packet; 979 980 skb = napi_alloc_skb(napi, desc_data->rx.hdr.dma_len); 981 if (!skb) 982 return NULL; 983 984 /* Start with the header buffer which may contain just the header 985 * or the header plus data 986 */ 987 dma_sync_single_range_for_cpu(pdata->dev, desc_data->rx.hdr.dma_base, 988 desc_data->rx.hdr.dma_off, 989 desc_data->rx.hdr.dma_len, 990 DMA_FROM_DEVICE); 991 992 packet = page_address(desc_data->rx.hdr.pa.pages) + 993 desc_data->rx.hdr.pa.pages_offset; 994 copy_len = (desc_data->rx.hdr_len) ? desc_data->rx.hdr_len : len; 995 copy_len = min(desc_data->rx.hdr.dma_len, copy_len); 996 skb_copy_to_linear_data(skb, packet, copy_len); 997 skb_put(skb, copy_len); 998 999 len -= copy_len; 1000 if (len) { 1001 /* Add the remaining data as a frag */ 1002 dma_sync_single_range_for_cpu(pdata->dev, 1003 desc_data->rx.buf.dma_base, 1004 desc_data->rx.buf.dma_off, 1005 desc_data->rx.buf.dma_len, 1006 DMA_FROM_DEVICE); 1007 1008 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, 1009 desc_data->rx.buf.pa.pages, 1010 desc_data->rx.buf.pa.pages_offset, 1011 len, desc_data->rx.buf.dma_len); 1012 desc_data->rx.buf.pa.pages = NULL; 1013 } 1014 1015 return skb; 1016 } 1017 1018 static int xlgmac_tx_poll(struct xlgmac_channel *channel) 1019 { 1020 struct xlgmac_pdata *pdata = channel->pdata; 1021 struct xlgmac_ring *ring = channel->tx_ring; 1022 struct net_device *netdev = pdata->netdev; 1023 unsigned int tx_packets = 0, tx_bytes = 0; 1024 struct xlgmac_desc_data *desc_data; 1025 struct xlgmac_dma_desc *dma_desc; 1026 struct xlgmac_desc_ops *desc_ops; 1027 struct xlgmac_hw_ops *hw_ops; 1028 struct netdev_queue *txq; 1029 int processed = 0; 1030 unsigned int cur; 1031 1032 desc_ops = &pdata->desc_ops; 1033 hw_ops = &pdata->hw_ops; 1034 1035 /* Nothing to do if there isn't a Tx ring for this channel */ 1036 if (!ring) 1037 return 0; 1038 1039 cur = ring->cur; 1040 1041 /* Be sure we get ring->cur before accessing descriptor data */ 1042 smp_rmb(); 1043 1044 txq = netdev_get_tx_queue(netdev, channel->queue_index); 1045 1046 while ((processed < XLGMAC_TX_DESC_MAX_PROC) && 1047 (ring->dirty != cur)) { 1048 desc_data = XLGMAC_GET_DESC_DATA(ring, ring->dirty); 1049 dma_desc = desc_data->dma_desc; 1050 1051 if (!hw_ops->tx_complete(dma_desc)) 1052 break; 1053 1054 /* Make sure descriptor fields are read after reading 1055 * the OWN bit 1056 */ 1057 dma_rmb(); 1058 1059 if (netif_msg_tx_done(pdata)) 1060 xlgmac_dump_tx_desc(pdata, ring, ring->dirty, 1, 0); 1061 1062 if (hw_ops->is_last_desc(dma_desc)) { 1063 tx_packets += desc_data->tx.packets; 1064 tx_bytes += desc_data->tx.bytes; 1065 } 1066 1067 /* Free the SKB and reset the descriptor for re-use */ 1068 desc_ops->unmap_desc_data(pdata, desc_data); 1069 hw_ops->tx_desc_reset(desc_data); 1070 1071 processed++; 1072 ring->dirty++; 1073 } 1074 1075 if (!processed) 1076 return 0; 1077 1078 netdev_tx_completed_queue(txq, tx_packets, tx_bytes); 1079 1080 if ((ring->tx.queue_stopped == 1) && 1081 (xlgmac_tx_avail_desc(ring) > XLGMAC_TX_DESC_MIN_FREE)) { 1082 ring->tx.queue_stopped = 0; 1083 netif_tx_wake_queue(txq); 1084 } 1085 1086 XLGMAC_PR("processed=%d\n", processed); 1087 1088 return processed; 1089 } 1090 1091 static int xlgmac_rx_poll(struct xlgmac_channel *channel, int budget) 1092 { 1093 struct xlgmac_pdata *pdata = channel->pdata; 1094 struct xlgmac_ring *ring = channel->rx_ring; 1095 struct net_device *netdev = pdata->netdev; 1096 unsigned int len, dma_desc_len, max_len; 1097 unsigned int context_next, context; 1098 struct xlgmac_desc_data *desc_data; 1099 struct xlgmac_pkt_info *pkt_info; 1100 unsigned int incomplete, error; 1101 struct xlgmac_hw_ops *hw_ops; 1102 unsigned int received = 0; 1103 struct napi_struct *napi; 1104 struct sk_buff *skb; 1105 int packet_count = 0; 1106 1107 hw_ops = &pdata->hw_ops; 1108 1109 /* Nothing to do if there isn't a Rx ring for this channel */ 1110 if (!ring) 1111 return 0; 1112 1113 incomplete = 0; 1114 context_next = 0; 1115 1116 napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi; 1117 1118 desc_data = XLGMAC_GET_DESC_DATA(ring, ring->cur); 1119 pkt_info = &ring->pkt_info; 1120 while (packet_count < budget) { 1121 /* First time in loop see if we need to restore state */ 1122 if (!received && desc_data->state_saved) { 1123 skb = desc_data->state.skb; 1124 error = desc_data->state.error; 1125 len = desc_data->state.len; 1126 } else { 1127 memset(pkt_info, 0, sizeof(*pkt_info)); 1128 skb = NULL; 1129 error = 0; 1130 len = 0; 1131 } 1132 1133 read_again: 1134 desc_data = XLGMAC_GET_DESC_DATA(ring, ring->cur); 1135 1136 if (xlgmac_rx_dirty_desc(ring) > XLGMAC_RX_DESC_MAX_DIRTY) 1137 xlgmac_rx_refresh(channel); 1138 1139 if (hw_ops->dev_read(channel)) 1140 break; 1141 1142 received++; 1143 ring->cur++; 1144 1145 incomplete = XLGMAC_GET_REG_BITS( 1146 pkt_info->attributes, 1147 RX_PACKET_ATTRIBUTES_INCOMPLETE_POS, 1148 RX_PACKET_ATTRIBUTES_INCOMPLETE_LEN); 1149 context_next = XLGMAC_GET_REG_BITS( 1150 pkt_info->attributes, 1151 RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_POS, 1152 RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_LEN); 1153 context = XLGMAC_GET_REG_BITS( 1154 pkt_info->attributes, 1155 RX_PACKET_ATTRIBUTES_CONTEXT_POS, 1156 RX_PACKET_ATTRIBUTES_CONTEXT_LEN); 1157 1158 /* Earlier error, just drain the remaining data */ 1159 if ((incomplete || context_next) && error) 1160 goto read_again; 1161 1162 if (error || pkt_info->errors) { 1163 if (pkt_info->errors) 1164 netif_err(pdata, rx_err, netdev, 1165 "error in received packet\n"); 1166 dev_kfree_skb(skb); 1167 goto next_packet; 1168 } 1169 1170 if (!context) { 1171 /* Length is cumulative, get this descriptor's length */ 1172 dma_desc_len = desc_data->rx.len - len; 1173 len += dma_desc_len; 1174 1175 if (dma_desc_len && !skb) { 1176 skb = xlgmac_create_skb(pdata, napi, desc_data, 1177 dma_desc_len); 1178 if (!skb) 1179 error = 1; 1180 } else if (dma_desc_len) { 1181 dma_sync_single_range_for_cpu( 1182 pdata->dev, 1183 desc_data->rx.buf.dma_base, 1184 desc_data->rx.buf.dma_off, 1185 desc_data->rx.buf.dma_len, 1186 DMA_FROM_DEVICE); 1187 1188 skb_add_rx_frag( 1189 skb, skb_shinfo(skb)->nr_frags, 1190 desc_data->rx.buf.pa.pages, 1191 desc_data->rx.buf.pa.pages_offset, 1192 dma_desc_len, 1193 desc_data->rx.buf.dma_len); 1194 desc_data->rx.buf.pa.pages = NULL; 1195 } 1196 } 1197 1198 if (incomplete || context_next) 1199 goto read_again; 1200 1201 if (!skb) 1202 goto next_packet; 1203 1204 /* Be sure we don't exceed the configured MTU */ 1205 max_len = netdev->mtu + ETH_HLEN; 1206 if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && 1207 (skb->protocol == htons(ETH_P_8021Q))) 1208 max_len += VLAN_HLEN; 1209 1210 if (skb->len > max_len) { 1211 netif_err(pdata, rx_err, netdev, 1212 "packet length exceeds configured MTU\n"); 1213 dev_kfree_skb(skb); 1214 goto next_packet; 1215 } 1216 1217 if (netif_msg_pktdata(pdata)) 1218 xlgmac_print_pkt(netdev, skb, false); 1219 1220 skb_checksum_none_assert(skb); 1221 if (XLGMAC_GET_REG_BITS(pkt_info->attributes, 1222 RX_PACKET_ATTRIBUTES_CSUM_DONE_POS, 1223 RX_PACKET_ATTRIBUTES_CSUM_DONE_LEN)) 1224 skb->ip_summed = CHECKSUM_UNNECESSARY; 1225 1226 if (XLGMAC_GET_REG_BITS(pkt_info->attributes, 1227 RX_PACKET_ATTRIBUTES_VLAN_CTAG_POS, 1228 RX_PACKET_ATTRIBUTES_VLAN_CTAG_LEN)) 1229 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 1230 pkt_info->vlan_ctag); 1231 1232 if (XLGMAC_GET_REG_BITS(pkt_info->attributes, 1233 RX_PACKET_ATTRIBUTES_RSS_HASH_POS, 1234 RX_PACKET_ATTRIBUTES_RSS_HASH_LEN)) 1235 skb_set_hash(skb, pkt_info->rss_hash, 1236 pkt_info->rss_hash_type); 1237 1238 skb->dev = netdev; 1239 skb->protocol = eth_type_trans(skb, netdev); 1240 skb_record_rx_queue(skb, channel->queue_index); 1241 1242 napi_gro_receive(napi, skb); 1243 1244 next_packet: 1245 packet_count++; 1246 } 1247 1248 /* Check if we need to save state before leaving */ 1249 if (received && (incomplete || context_next)) { 1250 desc_data = XLGMAC_GET_DESC_DATA(ring, ring->cur); 1251 desc_data->state_saved = 1; 1252 desc_data->state.skb = skb; 1253 desc_data->state.len = len; 1254 desc_data->state.error = error; 1255 } 1256 1257 XLGMAC_PR("packet_count = %d\n", packet_count); 1258 1259 return packet_count; 1260 } 1261 1262 static int xlgmac_one_poll(struct napi_struct *napi, int budget) 1263 { 1264 struct xlgmac_channel *channel = container_of(napi, 1265 struct xlgmac_channel, 1266 napi); 1267 int processed = 0; 1268 1269 XLGMAC_PR("budget=%d\n", budget); 1270 1271 /* Cleanup Tx ring first */ 1272 xlgmac_tx_poll(channel); 1273 1274 /* Process Rx ring next */ 1275 processed = xlgmac_rx_poll(channel, budget); 1276 1277 /* If we processed everything, we are done */ 1278 if (processed < budget) { 1279 /* Turn off polling */ 1280 napi_complete_done(napi, processed); 1281 1282 /* Enable Tx and Rx interrupts */ 1283 enable_irq(channel->dma_irq); 1284 } 1285 1286 XLGMAC_PR("received = %d\n", processed); 1287 1288 return processed; 1289 } 1290 1291 static int xlgmac_all_poll(struct napi_struct *napi, int budget) 1292 { 1293 struct xlgmac_pdata *pdata = container_of(napi, 1294 struct xlgmac_pdata, 1295 napi); 1296 struct xlgmac_channel *channel; 1297 int processed, last_processed; 1298 int ring_budget; 1299 unsigned int i; 1300 1301 XLGMAC_PR("budget=%d\n", budget); 1302 1303 processed = 0; 1304 ring_budget = budget / pdata->rx_ring_count; 1305 do { 1306 last_processed = processed; 1307 1308 channel = pdata->channel_head; 1309 for (i = 0; i < pdata->channel_count; i++, channel++) { 1310 /* Cleanup Tx ring first */ 1311 xlgmac_tx_poll(channel); 1312 1313 /* Process Rx ring next */ 1314 if (ring_budget > (budget - processed)) 1315 ring_budget = budget - processed; 1316 processed += xlgmac_rx_poll(channel, ring_budget); 1317 } 1318 } while ((processed < budget) && (processed != last_processed)); 1319 1320 /* If we processed everything, we are done */ 1321 if (processed < budget) { 1322 /* Turn off polling */ 1323 napi_complete_done(napi, processed); 1324 1325 /* Enable Tx and Rx interrupts */ 1326 xlgmac_enable_rx_tx_ints(pdata); 1327 } 1328 1329 XLGMAC_PR("received = %d\n", processed); 1330 1331 return processed; 1332 } 1333