1c861ef83SShannon Nelson // SPDX-License-Identifier: GPL-2.0 2e689cf4aSJeff Kirsher /* $Id: sungem.c,v 1.44.2.22 2002/03/13 01:18:12 davem Exp $ 3e689cf4aSJeff Kirsher * sungem.c: Sun GEM ethernet driver. 4e689cf4aSJeff Kirsher * 5e689cf4aSJeff Kirsher * Copyright (C) 2000, 2001, 2002, 2003 David S. Miller (davem@redhat.com) 6e689cf4aSJeff Kirsher * 7e689cf4aSJeff Kirsher * Support for Apple GMAC and assorted PHYs, WOL, Power Management 8e689cf4aSJeff Kirsher * (C) 2001,2002,2003 Benjamin Herrenscmidt (benh@kernel.crashing.org) 9e689cf4aSJeff Kirsher * (C) 2004,2005 Benjamin Herrenscmidt, IBM Corp. 10e689cf4aSJeff Kirsher * 11e689cf4aSJeff Kirsher * NAPI and NETPOLL support 12e689cf4aSJeff Kirsher * (C) 2004 by Eric Lemoine (eric.lemoine@gmail.com) 13e689cf4aSJeff Kirsher * 14e689cf4aSJeff Kirsher */ 15e689cf4aSJeff Kirsher 16e689cf4aSJeff Kirsher #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17e689cf4aSJeff Kirsher 18e689cf4aSJeff Kirsher #include <linux/module.h> 19e689cf4aSJeff Kirsher #include <linux/kernel.h> 20e689cf4aSJeff Kirsher #include <linux/types.h> 21e689cf4aSJeff Kirsher #include <linux/fcntl.h> 22e689cf4aSJeff Kirsher #include <linux/interrupt.h> 23e689cf4aSJeff Kirsher #include <linux/ioport.h> 24e689cf4aSJeff Kirsher #include <linux/in.h> 25e689cf4aSJeff Kirsher #include <linux/sched.h> 26e689cf4aSJeff Kirsher #include <linux/string.h> 27e689cf4aSJeff Kirsher #include <linux/delay.h> 28e689cf4aSJeff Kirsher #include <linux/errno.h> 29e689cf4aSJeff Kirsher #include <linux/pci.h> 30e689cf4aSJeff Kirsher #include <linux/dma-mapping.h> 31e689cf4aSJeff Kirsher #include <linux/netdevice.h> 32e689cf4aSJeff Kirsher #include <linux/etherdevice.h> 33e689cf4aSJeff Kirsher #include <linux/skbuff.h> 34e689cf4aSJeff Kirsher #include <linux/mii.h> 35e689cf4aSJeff Kirsher #include <linux/ethtool.h> 36e689cf4aSJeff Kirsher #include <linux/crc32.h> 37e689cf4aSJeff Kirsher #include <linux/random.h> 38e689cf4aSJeff Kirsher #include <linux/workqueue.h> 39e689cf4aSJeff Kirsher #include <linux/if_vlan.h> 40e689cf4aSJeff Kirsher #include <linux/bitops.h> 41e689cf4aSJeff Kirsher #include <linux/mm.h> 42e689cf4aSJeff Kirsher #include <linux/gfp.h> 43e689cf4aSJeff Kirsher 44e689cf4aSJeff Kirsher #include <asm/io.h> 45e689cf4aSJeff Kirsher #include <asm/byteorder.h> 467c0f6ba6SLinus Torvalds #include <linux/uaccess.h> 47e689cf4aSJeff Kirsher #include <asm/irq.h> 48e689cf4aSJeff Kirsher 49e689cf4aSJeff Kirsher #ifdef CONFIG_SPARC 50e689cf4aSJeff Kirsher #include <asm/idprom.h> 51e689cf4aSJeff Kirsher #include <asm/prom.h> 52e689cf4aSJeff Kirsher #endif 53e689cf4aSJeff Kirsher 54e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC 55e689cf4aSJeff Kirsher #include <asm/machdep.h> 56e689cf4aSJeff Kirsher #include <asm/pmac_feature.h> 57e689cf4aSJeff Kirsher #endif 58e689cf4aSJeff Kirsher 592bb69841SDavid S. Miller #include <linux/sungem_phy.h> 60e689cf4aSJeff Kirsher #include "sungem.h" 61e689cf4aSJeff Kirsher 6212b03558SEric Dumazet #define STRIP_FCS 63e689cf4aSJeff Kirsher 64e689cf4aSJeff Kirsher #define DEFAULT_MSG (NETIF_MSG_DRV | \ 65e689cf4aSJeff Kirsher NETIF_MSG_PROBE | \ 66e689cf4aSJeff Kirsher NETIF_MSG_LINK) 67e689cf4aSJeff Kirsher 68e689cf4aSJeff Kirsher #define ADVERTISE_MASK (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \ 69e689cf4aSJeff Kirsher SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \ 70e689cf4aSJeff Kirsher SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full | \ 71e689cf4aSJeff Kirsher SUPPORTED_Pause | SUPPORTED_Autoneg) 72e689cf4aSJeff Kirsher 73e689cf4aSJeff Kirsher #define DRV_NAME "sungem" 74e689cf4aSJeff Kirsher #define DRV_VERSION "1.0" 75e689cf4aSJeff Kirsher #define DRV_AUTHOR "David S. Miller <davem@redhat.com>" 76e689cf4aSJeff Kirsher 77f73d12bdSBill Pemberton static char version[] = 78e689cf4aSJeff Kirsher DRV_NAME ".c:v" DRV_VERSION " " DRV_AUTHOR "\n"; 79e689cf4aSJeff Kirsher 80e689cf4aSJeff Kirsher MODULE_AUTHOR(DRV_AUTHOR); 81e689cf4aSJeff Kirsher MODULE_DESCRIPTION("Sun GEM Gbit ethernet driver"); 82e689cf4aSJeff Kirsher MODULE_LICENSE("GPL"); 83e689cf4aSJeff Kirsher 84e689cf4aSJeff Kirsher #define GEM_MODULE_NAME "gem" 85e689cf4aSJeff Kirsher 869baa3c34SBenoit Taine static const struct pci_device_id gem_pci_tbl[] = { 87e689cf4aSJeff Kirsher { PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_GEM, 88e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 89e689cf4aSJeff Kirsher 90e689cf4aSJeff Kirsher /* These models only differ from the original GEM in 91e689cf4aSJeff Kirsher * that their tx/rx fifos are of a different size and 92e689cf4aSJeff Kirsher * they only support 10/100 speeds. -DaveM 93e689cf4aSJeff Kirsher * 94e689cf4aSJeff Kirsher * Apple's GMAC does support gigabit on machines with 95e689cf4aSJeff Kirsher * the BCM54xx PHYs. -BenH 96e689cf4aSJeff Kirsher */ 97e689cf4aSJeff Kirsher { PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_RIO_GEM, 98e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 99e689cf4aSJeff Kirsher { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_GMAC, 100e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 101e689cf4aSJeff Kirsher { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_GMACP, 102e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 103e689cf4aSJeff Kirsher { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_GMAC2, 104e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 105e689cf4aSJeff Kirsher { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_GMAC, 106e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 107e689cf4aSJeff Kirsher { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_SUNGEM, 108e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 109e689cf4aSJeff Kirsher { PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID2_GMAC, 110e689cf4aSJeff Kirsher PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 111e689cf4aSJeff Kirsher {0, } 112e689cf4aSJeff Kirsher }; 113e689cf4aSJeff Kirsher 114e689cf4aSJeff Kirsher MODULE_DEVICE_TABLE(pci, gem_pci_tbl); 115e689cf4aSJeff Kirsher 116abc4da45SDavid S. Miller static u16 __sungem_phy_read(struct gem *gp, int phy_addr, int reg) 117e689cf4aSJeff Kirsher { 118e689cf4aSJeff Kirsher u32 cmd; 119e689cf4aSJeff Kirsher int limit = 10000; 120e689cf4aSJeff Kirsher 121e689cf4aSJeff Kirsher cmd = (1 << 30); 122e689cf4aSJeff Kirsher cmd |= (2 << 28); 123e689cf4aSJeff Kirsher cmd |= (phy_addr << 23) & MIF_FRAME_PHYAD; 124e689cf4aSJeff Kirsher cmd |= (reg << 18) & MIF_FRAME_REGAD; 125e689cf4aSJeff Kirsher cmd |= (MIF_FRAME_TAMSB); 126e689cf4aSJeff Kirsher writel(cmd, gp->regs + MIF_FRAME); 127e689cf4aSJeff Kirsher 128e689cf4aSJeff Kirsher while (--limit) { 129e689cf4aSJeff Kirsher cmd = readl(gp->regs + MIF_FRAME); 130e689cf4aSJeff Kirsher if (cmd & MIF_FRAME_TALSB) 131e689cf4aSJeff Kirsher break; 132e689cf4aSJeff Kirsher 133e689cf4aSJeff Kirsher udelay(10); 134e689cf4aSJeff Kirsher } 135e689cf4aSJeff Kirsher 136e689cf4aSJeff Kirsher if (!limit) 137e689cf4aSJeff Kirsher cmd = 0xffff; 138e689cf4aSJeff Kirsher 139e689cf4aSJeff Kirsher return cmd & MIF_FRAME_DATA; 140e689cf4aSJeff Kirsher } 141e689cf4aSJeff Kirsher 142abc4da45SDavid S. Miller static inline int _sungem_phy_read(struct net_device *dev, int mii_id, int reg) 143e689cf4aSJeff Kirsher { 144e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 145abc4da45SDavid S. Miller return __sungem_phy_read(gp, mii_id, reg); 146e689cf4aSJeff Kirsher } 147e689cf4aSJeff Kirsher 148abc4da45SDavid S. Miller static inline u16 sungem_phy_read(struct gem *gp, int reg) 149e689cf4aSJeff Kirsher { 150abc4da45SDavid S. Miller return __sungem_phy_read(gp, gp->mii_phy_addr, reg); 151e689cf4aSJeff Kirsher } 152e689cf4aSJeff Kirsher 153abc4da45SDavid S. Miller static void __sungem_phy_write(struct gem *gp, int phy_addr, int reg, u16 val) 154e689cf4aSJeff Kirsher { 155e689cf4aSJeff Kirsher u32 cmd; 156e689cf4aSJeff Kirsher int limit = 10000; 157e689cf4aSJeff Kirsher 158e689cf4aSJeff Kirsher cmd = (1 << 30); 159e689cf4aSJeff Kirsher cmd |= (1 << 28); 160e689cf4aSJeff Kirsher cmd |= (phy_addr << 23) & MIF_FRAME_PHYAD; 161e689cf4aSJeff Kirsher cmd |= (reg << 18) & MIF_FRAME_REGAD; 162e689cf4aSJeff Kirsher cmd |= (MIF_FRAME_TAMSB); 163e689cf4aSJeff Kirsher cmd |= (val & MIF_FRAME_DATA); 164e689cf4aSJeff Kirsher writel(cmd, gp->regs + MIF_FRAME); 165e689cf4aSJeff Kirsher 166e689cf4aSJeff Kirsher while (limit--) { 167e689cf4aSJeff Kirsher cmd = readl(gp->regs + MIF_FRAME); 168e689cf4aSJeff Kirsher if (cmd & MIF_FRAME_TALSB) 169e689cf4aSJeff Kirsher break; 170e689cf4aSJeff Kirsher 171e689cf4aSJeff Kirsher udelay(10); 172e689cf4aSJeff Kirsher } 173e689cf4aSJeff Kirsher } 174e689cf4aSJeff Kirsher 175abc4da45SDavid S. Miller static inline void _sungem_phy_write(struct net_device *dev, int mii_id, int reg, int val) 176e689cf4aSJeff Kirsher { 177e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 178abc4da45SDavid S. Miller __sungem_phy_write(gp, mii_id, reg, val & 0xffff); 179e689cf4aSJeff Kirsher } 180e689cf4aSJeff Kirsher 181abc4da45SDavid S. Miller static inline void sungem_phy_write(struct gem *gp, int reg, u16 val) 182e689cf4aSJeff Kirsher { 183abc4da45SDavid S. Miller __sungem_phy_write(gp, gp->mii_phy_addr, reg, val); 184e689cf4aSJeff Kirsher } 185e689cf4aSJeff Kirsher 186e689cf4aSJeff Kirsher static inline void gem_enable_ints(struct gem *gp) 187e689cf4aSJeff Kirsher { 188e689cf4aSJeff Kirsher /* Enable all interrupts but TXDONE */ 189e689cf4aSJeff Kirsher writel(GREG_STAT_TXDONE, gp->regs + GREG_IMASK); 190e689cf4aSJeff Kirsher } 191e689cf4aSJeff Kirsher 192e689cf4aSJeff Kirsher static inline void gem_disable_ints(struct gem *gp) 193e689cf4aSJeff Kirsher { 194e689cf4aSJeff Kirsher /* Disable all interrupts, including TXDONE */ 195e689cf4aSJeff Kirsher writel(GREG_STAT_NAPI | GREG_STAT_TXDONE, gp->regs + GREG_IMASK); 196e689cf4aSJeff Kirsher (void)readl(gp->regs + GREG_IMASK); /* write posting */ 197e689cf4aSJeff Kirsher } 198e689cf4aSJeff Kirsher 199e689cf4aSJeff Kirsher static void gem_get_cell(struct gem *gp) 200e689cf4aSJeff Kirsher { 201e689cf4aSJeff Kirsher BUG_ON(gp->cell_enabled < 0); 202e689cf4aSJeff Kirsher gp->cell_enabled++; 203e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC 204e689cf4aSJeff Kirsher if (gp->cell_enabled == 1) { 205e689cf4aSJeff Kirsher mb(); 206e689cf4aSJeff Kirsher pmac_call_feature(PMAC_FTR_GMAC_ENABLE, gp->of_node, 0, 1); 207e689cf4aSJeff Kirsher udelay(10); 208e689cf4aSJeff Kirsher } 209e689cf4aSJeff Kirsher #endif /* CONFIG_PPC_PMAC */ 210e689cf4aSJeff Kirsher } 211e689cf4aSJeff Kirsher 212e689cf4aSJeff Kirsher /* Turn off the chip's clock */ 213e689cf4aSJeff Kirsher static void gem_put_cell(struct gem *gp) 214e689cf4aSJeff Kirsher { 215e689cf4aSJeff Kirsher BUG_ON(gp->cell_enabled <= 0); 216e689cf4aSJeff Kirsher gp->cell_enabled--; 217e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC 218e689cf4aSJeff Kirsher if (gp->cell_enabled == 0) { 219e689cf4aSJeff Kirsher mb(); 220e689cf4aSJeff Kirsher pmac_call_feature(PMAC_FTR_GMAC_ENABLE, gp->of_node, 0, 0); 221e689cf4aSJeff Kirsher udelay(10); 222e689cf4aSJeff Kirsher } 223e689cf4aSJeff Kirsher #endif /* CONFIG_PPC_PMAC */ 224e689cf4aSJeff Kirsher } 225e689cf4aSJeff Kirsher 226e689cf4aSJeff Kirsher static inline void gem_netif_stop(struct gem *gp) 227e689cf4aSJeff Kirsher { 228860e9538SFlorian Westphal netif_trans_update(gp->dev); /* prevent tx timeout */ 229e689cf4aSJeff Kirsher napi_disable(&gp->napi); 230e689cf4aSJeff Kirsher netif_tx_disable(gp->dev); 231e689cf4aSJeff Kirsher } 232e689cf4aSJeff Kirsher 233e689cf4aSJeff Kirsher static inline void gem_netif_start(struct gem *gp) 234e689cf4aSJeff Kirsher { 235e689cf4aSJeff Kirsher /* NOTE: unconditional netif_wake_queue is only 236e689cf4aSJeff Kirsher * appropriate so long as all callers are assured to 237e689cf4aSJeff Kirsher * have free tx slots. 238e689cf4aSJeff Kirsher */ 239e689cf4aSJeff Kirsher netif_wake_queue(gp->dev); 240e689cf4aSJeff Kirsher napi_enable(&gp->napi); 241e689cf4aSJeff Kirsher } 242e689cf4aSJeff Kirsher 243e689cf4aSJeff Kirsher static void gem_schedule_reset(struct gem *gp) 244e689cf4aSJeff Kirsher { 245e689cf4aSJeff Kirsher gp->reset_task_pending = 1; 246e689cf4aSJeff Kirsher schedule_work(&gp->reset_task); 247e689cf4aSJeff Kirsher } 248e689cf4aSJeff Kirsher 249e689cf4aSJeff Kirsher static void gem_handle_mif_event(struct gem *gp, u32 reg_val, u32 changed_bits) 250e689cf4aSJeff Kirsher { 251e689cf4aSJeff Kirsher if (netif_msg_intr(gp)) 252e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: mif interrupt\n", gp->dev->name); 253e689cf4aSJeff Kirsher } 254e689cf4aSJeff Kirsher 255e689cf4aSJeff Kirsher static int gem_pcs_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) 256e689cf4aSJeff Kirsher { 257e689cf4aSJeff Kirsher u32 pcs_istat = readl(gp->regs + PCS_ISTAT); 258e689cf4aSJeff Kirsher u32 pcs_miistat; 259e689cf4aSJeff Kirsher 260e689cf4aSJeff Kirsher if (netif_msg_intr(gp)) 261e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: pcs interrupt, pcs_istat: 0x%x\n", 262e689cf4aSJeff Kirsher gp->dev->name, pcs_istat); 263e689cf4aSJeff Kirsher 264e689cf4aSJeff Kirsher if (!(pcs_istat & PCS_ISTAT_LSC)) { 265e689cf4aSJeff Kirsher netdev_err(dev, "PCS irq but no link status change???\n"); 266e689cf4aSJeff Kirsher return 0; 267e689cf4aSJeff Kirsher } 268e689cf4aSJeff Kirsher 269e689cf4aSJeff Kirsher /* The link status bit latches on zero, so you must 270e689cf4aSJeff Kirsher * read it twice in such a case to see a transition 271e689cf4aSJeff Kirsher * to the link being up. 272e689cf4aSJeff Kirsher */ 273e689cf4aSJeff Kirsher pcs_miistat = readl(gp->regs + PCS_MIISTAT); 274e689cf4aSJeff Kirsher if (!(pcs_miistat & PCS_MIISTAT_LS)) 275e689cf4aSJeff Kirsher pcs_miistat |= 276e689cf4aSJeff Kirsher (readl(gp->regs + PCS_MIISTAT) & 277e689cf4aSJeff Kirsher PCS_MIISTAT_LS); 278e689cf4aSJeff Kirsher 279e689cf4aSJeff Kirsher if (pcs_miistat & PCS_MIISTAT_ANC) { 280e689cf4aSJeff Kirsher /* The remote-fault indication is only valid 281e689cf4aSJeff Kirsher * when autoneg has completed. 282e689cf4aSJeff Kirsher */ 283e689cf4aSJeff Kirsher if (pcs_miistat & PCS_MIISTAT_RF) 284e689cf4aSJeff Kirsher netdev_info(dev, "PCS AutoNEG complete, RemoteFault\n"); 285e689cf4aSJeff Kirsher else 286e689cf4aSJeff Kirsher netdev_info(dev, "PCS AutoNEG complete\n"); 287e689cf4aSJeff Kirsher } 288e689cf4aSJeff Kirsher 289e689cf4aSJeff Kirsher if (pcs_miistat & PCS_MIISTAT_LS) { 290e689cf4aSJeff Kirsher netdev_info(dev, "PCS link is now up\n"); 291e689cf4aSJeff Kirsher netif_carrier_on(gp->dev); 292e689cf4aSJeff Kirsher } else { 293e689cf4aSJeff Kirsher netdev_info(dev, "PCS link is now down\n"); 294e689cf4aSJeff Kirsher netif_carrier_off(gp->dev); 295e689cf4aSJeff Kirsher /* If this happens and the link timer is not running, 296e689cf4aSJeff Kirsher * reset so we re-negotiate. 297e689cf4aSJeff Kirsher */ 298e689cf4aSJeff Kirsher if (!timer_pending(&gp->link_timer)) 299e689cf4aSJeff Kirsher return 1; 300e689cf4aSJeff Kirsher } 301e689cf4aSJeff Kirsher 302e689cf4aSJeff Kirsher return 0; 303e689cf4aSJeff Kirsher } 304e689cf4aSJeff Kirsher 305e689cf4aSJeff Kirsher static int gem_txmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) 306e689cf4aSJeff Kirsher { 307e689cf4aSJeff Kirsher u32 txmac_stat = readl(gp->regs + MAC_TXSTAT); 308e689cf4aSJeff Kirsher 309e689cf4aSJeff Kirsher if (netif_msg_intr(gp)) 310e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: txmac interrupt, txmac_stat: 0x%x\n", 311e689cf4aSJeff Kirsher gp->dev->name, txmac_stat); 312e689cf4aSJeff Kirsher 313e689cf4aSJeff Kirsher /* Defer timer expiration is quite normal, 314e689cf4aSJeff Kirsher * don't even log the event. 315e689cf4aSJeff Kirsher */ 316e689cf4aSJeff Kirsher if ((txmac_stat & MAC_TXSTAT_DTE) && 317e689cf4aSJeff Kirsher !(txmac_stat & ~MAC_TXSTAT_DTE)) 318e689cf4aSJeff Kirsher return 0; 319e689cf4aSJeff Kirsher 320e689cf4aSJeff Kirsher if (txmac_stat & MAC_TXSTAT_URUN) { 321e689cf4aSJeff Kirsher netdev_err(dev, "TX MAC xmit underrun\n"); 322e689cf4aSJeff Kirsher dev->stats.tx_fifo_errors++; 323e689cf4aSJeff Kirsher } 324e689cf4aSJeff Kirsher 325e689cf4aSJeff Kirsher if (txmac_stat & MAC_TXSTAT_MPE) { 326e689cf4aSJeff Kirsher netdev_err(dev, "TX MAC max packet size error\n"); 327e689cf4aSJeff Kirsher dev->stats.tx_errors++; 328e689cf4aSJeff Kirsher } 329e689cf4aSJeff Kirsher 330e689cf4aSJeff Kirsher /* The rest are all cases of one of the 16-bit TX 331e689cf4aSJeff Kirsher * counters expiring. 332e689cf4aSJeff Kirsher */ 333e689cf4aSJeff Kirsher if (txmac_stat & MAC_TXSTAT_NCE) 334e689cf4aSJeff Kirsher dev->stats.collisions += 0x10000; 335e689cf4aSJeff Kirsher 336e689cf4aSJeff Kirsher if (txmac_stat & MAC_TXSTAT_ECE) { 337e689cf4aSJeff Kirsher dev->stats.tx_aborted_errors += 0x10000; 338e689cf4aSJeff Kirsher dev->stats.collisions += 0x10000; 339e689cf4aSJeff Kirsher } 340e689cf4aSJeff Kirsher 341e689cf4aSJeff Kirsher if (txmac_stat & MAC_TXSTAT_LCE) { 342e689cf4aSJeff Kirsher dev->stats.tx_aborted_errors += 0x10000; 343e689cf4aSJeff Kirsher dev->stats.collisions += 0x10000; 344e689cf4aSJeff Kirsher } 345e689cf4aSJeff Kirsher 346e689cf4aSJeff Kirsher /* We do not keep track of MAC_TXSTAT_FCE and 347e689cf4aSJeff Kirsher * MAC_TXSTAT_PCE events. 348e689cf4aSJeff Kirsher */ 349e689cf4aSJeff Kirsher return 0; 350e689cf4aSJeff Kirsher } 351e689cf4aSJeff Kirsher 352e689cf4aSJeff Kirsher /* When we get a RX fifo overflow, the RX unit in GEM is probably hung 353e689cf4aSJeff Kirsher * so we do the following. 354e689cf4aSJeff Kirsher * 355e689cf4aSJeff Kirsher * If any part of the reset goes wrong, we return 1 and that causes the 356e689cf4aSJeff Kirsher * whole chip to be reset. 357e689cf4aSJeff Kirsher */ 358e689cf4aSJeff Kirsher static int gem_rxmac_reset(struct gem *gp) 359e689cf4aSJeff Kirsher { 360e689cf4aSJeff Kirsher struct net_device *dev = gp->dev; 361e689cf4aSJeff Kirsher int limit, i; 362e689cf4aSJeff Kirsher u64 desc_dma; 363e689cf4aSJeff Kirsher u32 val; 364e689cf4aSJeff Kirsher 365e689cf4aSJeff Kirsher /* First, reset & disable MAC RX. */ 366e689cf4aSJeff Kirsher writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST); 367e689cf4aSJeff Kirsher for (limit = 0; limit < 5000; limit++) { 368e689cf4aSJeff Kirsher if (!(readl(gp->regs + MAC_RXRST) & MAC_RXRST_CMD)) 369e689cf4aSJeff Kirsher break; 370e689cf4aSJeff Kirsher udelay(10); 371e689cf4aSJeff Kirsher } 372e689cf4aSJeff Kirsher if (limit == 5000) { 373e689cf4aSJeff Kirsher netdev_err(dev, "RX MAC will not reset, resetting whole chip\n"); 374e689cf4aSJeff Kirsher return 1; 375e689cf4aSJeff Kirsher } 376e689cf4aSJeff Kirsher 377e689cf4aSJeff Kirsher writel(gp->mac_rx_cfg & ~MAC_RXCFG_ENAB, 378e689cf4aSJeff Kirsher gp->regs + MAC_RXCFG); 379e689cf4aSJeff Kirsher for (limit = 0; limit < 5000; limit++) { 380e689cf4aSJeff Kirsher if (!(readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB)) 381e689cf4aSJeff Kirsher break; 382e689cf4aSJeff Kirsher udelay(10); 383e689cf4aSJeff Kirsher } 384e689cf4aSJeff Kirsher if (limit == 5000) { 385e689cf4aSJeff Kirsher netdev_err(dev, "RX MAC will not disable, resetting whole chip\n"); 386e689cf4aSJeff Kirsher return 1; 387e689cf4aSJeff Kirsher } 388e689cf4aSJeff Kirsher 389e689cf4aSJeff Kirsher /* Second, disable RX DMA. */ 390e689cf4aSJeff Kirsher writel(0, gp->regs + RXDMA_CFG); 391e689cf4aSJeff Kirsher for (limit = 0; limit < 5000; limit++) { 392e689cf4aSJeff Kirsher if (!(readl(gp->regs + RXDMA_CFG) & RXDMA_CFG_ENABLE)) 393e689cf4aSJeff Kirsher break; 394e689cf4aSJeff Kirsher udelay(10); 395e689cf4aSJeff Kirsher } 396e689cf4aSJeff Kirsher if (limit == 5000) { 397e689cf4aSJeff Kirsher netdev_err(dev, "RX DMA will not disable, resetting whole chip\n"); 398e689cf4aSJeff Kirsher return 1; 399e689cf4aSJeff Kirsher } 400e689cf4aSJeff Kirsher 4013a22d5d5SArnd Bergmann mdelay(5); 402e689cf4aSJeff Kirsher 403e689cf4aSJeff Kirsher /* Execute RX reset command. */ 404e689cf4aSJeff Kirsher writel(gp->swrst_base | GREG_SWRST_RXRST, 405e689cf4aSJeff Kirsher gp->regs + GREG_SWRST); 406e689cf4aSJeff Kirsher for (limit = 0; limit < 5000; limit++) { 407e689cf4aSJeff Kirsher if (!(readl(gp->regs + GREG_SWRST) & GREG_SWRST_RXRST)) 408e689cf4aSJeff Kirsher break; 409e689cf4aSJeff Kirsher udelay(10); 410e689cf4aSJeff Kirsher } 411e689cf4aSJeff Kirsher if (limit == 5000) { 412e689cf4aSJeff Kirsher netdev_err(dev, "RX reset command will not execute, resetting whole chip\n"); 413e689cf4aSJeff Kirsher return 1; 414e689cf4aSJeff Kirsher } 415e689cf4aSJeff Kirsher 416e689cf4aSJeff Kirsher /* Refresh the RX ring. */ 417e689cf4aSJeff Kirsher for (i = 0; i < RX_RING_SIZE; i++) { 418e689cf4aSJeff Kirsher struct gem_rxd *rxd = &gp->init_block->rxd[i]; 419e689cf4aSJeff Kirsher 420e689cf4aSJeff Kirsher if (gp->rx_skbs[i] == NULL) { 421e689cf4aSJeff Kirsher netdev_err(dev, "Parts of RX ring empty, resetting whole chip\n"); 422e689cf4aSJeff Kirsher return 1; 423e689cf4aSJeff Kirsher } 424e689cf4aSJeff Kirsher 425e689cf4aSJeff Kirsher rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp)); 426e689cf4aSJeff Kirsher } 427e689cf4aSJeff Kirsher gp->rx_new = gp->rx_old = 0; 428e689cf4aSJeff Kirsher 429e689cf4aSJeff Kirsher /* Now we must reprogram the rest of RX unit. */ 430e689cf4aSJeff Kirsher desc_dma = (u64) gp->gblock_dvma; 431e689cf4aSJeff Kirsher desc_dma += (INIT_BLOCK_TX_RING_SIZE * sizeof(struct gem_txd)); 432e689cf4aSJeff Kirsher writel(desc_dma >> 32, gp->regs + RXDMA_DBHI); 433e689cf4aSJeff Kirsher writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW); 434e689cf4aSJeff Kirsher writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK); 435e689cf4aSJeff Kirsher val = (RXDMA_CFG_BASE | (RX_OFFSET << 10) | 43612b03558SEric Dumazet (ETH_HLEN << 13) | RXDMA_CFG_FTHRESH_128); 437e689cf4aSJeff Kirsher writel(val, gp->regs + RXDMA_CFG); 438e689cf4aSJeff Kirsher if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN) 439e689cf4aSJeff Kirsher writel(((5 & RXDMA_BLANK_IPKTS) | 440e689cf4aSJeff Kirsher ((8 << 12) & RXDMA_BLANK_ITIME)), 441e689cf4aSJeff Kirsher gp->regs + RXDMA_BLANK); 442e689cf4aSJeff Kirsher else 443e689cf4aSJeff Kirsher writel(((5 & RXDMA_BLANK_IPKTS) | 444e689cf4aSJeff Kirsher ((4 << 12) & RXDMA_BLANK_ITIME)), 445e689cf4aSJeff Kirsher gp->regs + RXDMA_BLANK); 446e689cf4aSJeff Kirsher val = (((gp->rx_pause_off / 64) << 0) & RXDMA_PTHRESH_OFF); 447e689cf4aSJeff Kirsher val |= (((gp->rx_pause_on / 64) << 12) & RXDMA_PTHRESH_ON); 448e689cf4aSJeff Kirsher writel(val, gp->regs + RXDMA_PTHRESH); 449e689cf4aSJeff Kirsher val = readl(gp->regs + RXDMA_CFG); 450e689cf4aSJeff Kirsher writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG); 451e689cf4aSJeff Kirsher writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK); 452e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_RXCFG); 453e689cf4aSJeff Kirsher writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); 454e689cf4aSJeff Kirsher 455e689cf4aSJeff Kirsher return 0; 456e689cf4aSJeff Kirsher } 457e689cf4aSJeff Kirsher 458e689cf4aSJeff Kirsher static int gem_rxmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) 459e689cf4aSJeff Kirsher { 460e689cf4aSJeff Kirsher u32 rxmac_stat = readl(gp->regs + MAC_RXSTAT); 461e689cf4aSJeff Kirsher int ret = 0; 462e689cf4aSJeff Kirsher 463e689cf4aSJeff Kirsher if (netif_msg_intr(gp)) 464e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: rxmac interrupt, rxmac_stat: 0x%x\n", 465e689cf4aSJeff Kirsher gp->dev->name, rxmac_stat); 466e689cf4aSJeff Kirsher 467e689cf4aSJeff Kirsher if (rxmac_stat & MAC_RXSTAT_OFLW) { 468e689cf4aSJeff Kirsher u32 smac = readl(gp->regs + MAC_SMACHINE); 469e689cf4aSJeff Kirsher 470e689cf4aSJeff Kirsher netdev_err(dev, "RX MAC fifo overflow smac[%08x]\n", smac); 471e689cf4aSJeff Kirsher dev->stats.rx_over_errors++; 472e689cf4aSJeff Kirsher dev->stats.rx_fifo_errors++; 473e689cf4aSJeff Kirsher 474e689cf4aSJeff Kirsher ret = gem_rxmac_reset(gp); 475e689cf4aSJeff Kirsher } 476e689cf4aSJeff Kirsher 477e689cf4aSJeff Kirsher if (rxmac_stat & MAC_RXSTAT_ACE) 478e689cf4aSJeff Kirsher dev->stats.rx_frame_errors += 0x10000; 479e689cf4aSJeff Kirsher 480e689cf4aSJeff Kirsher if (rxmac_stat & MAC_RXSTAT_CCE) 481e689cf4aSJeff Kirsher dev->stats.rx_crc_errors += 0x10000; 482e689cf4aSJeff Kirsher 483e689cf4aSJeff Kirsher if (rxmac_stat & MAC_RXSTAT_LCE) 484e689cf4aSJeff Kirsher dev->stats.rx_length_errors += 0x10000; 485e689cf4aSJeff Kirsher 486e689cf4aSJeff Kirsher /* We do not track MAC_RXSTAT_FCE and MAC_RXSTAT_VCE 487e689cf4aSJeff Kirsher * events. 488e689cf4aSJeff Kirsher */ 489e689cf4aSJeff Kirsher return ret; 490e689cf4aSJeff Kirsher } 491e689cf4aSJeff Kirsher 492e689cf4aSJeff Kirsher static int gem_mac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) 493e689cf4aSJeff Kirsher { 494e689cf4aSJeff Kirsher u32 mac_cstat = readl(gp->regs + MAC_CSTAT); 495e689cf4aSJeff Kirsher 496e689cf4aSJeff Kirsher if (netif_msg_intr(gp)) 497e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: mac interrupt, mac_cstat: 0x%x\n", 498e689cf4aSJeff Kirsher gp->dev->name, mac_cstat); 499e689cf4aSJeff Kirsher 500e689cf4aSJeff Kirsher /* This interrupt is just for pause frame and pause 501e689cf4aSJeff Kirsher * tracking. It is useful for diagnostics and debug 502e689cf4aSJeff Kirsher * but probably by default we will mask these events. 503e689cf4aSJeff Kirsher */ 504e689cf4aSJeff Kirsher if (mac_cstat & MAC_CSTAT_PS) 505e689cf4aSJeff Kirsher gp->pause_entered++; 506e689cf4aSJeff Kirsher 507e689cf4aSJeff Kirsher if (mac_cstat & MAC_CSTAT_PRCV) 508e689cf4aSJeff Kirsher gp->pause_last_time_recvd = (mac_cstat >> 16); 509e689cf4aSJeff Kirsher 510e689cf4aSJeff Kirsher return 0; 511e689cf4aSJeff Kirsher } 512e689cf4aSJeff Kirsher 513e689cf4aSJeff Kirsher static int gem_mif_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) 514e689cf4aSJeff Kirsher { 515e689cf4aSJeff Kirsher u32 mif_status = readl(gp->regs + MIF_STATUS); 516e689cf4aSJeff Kirsher u32 reg_val, changed_bits; 517e689cf4aSJeff Kirsher 518e689cf4aSJeff Kirsher reg_val = (mif_status & MIF_STATUS_DATA) >> 16; 519e689cf4aSJeff Kirsher changed_bits = (mif_status & MIF_STATUS_STAT); 520e689cf4aSJeff Kirsher 521e689cf4aSJeff Kirsher gem_handle_mif_event(gp, reg_val, changed_bits); 522e689cf4aSJeff Kirsher 523e689cf4aSJeff Kirsher return 0; 524e689cf4aSJeff Kirsher } 525e689cf4aSJeff Kirsher 526e689cf4aSJeff Kirsher static int gem_pci_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status) 527e689cf4aSJeff Kirsher { 528e689cf4aSJeff Kirsher u32 pci_estat = readl(gp->regs + GREG_PCIESTAT); 529e689cf4aSJeff Kirsher 530e689cf4aSJeff Kirsher if (gp->pdev->vendor == PCI_VENDOR_ID_SUN && 531e689cf4aSJeff Kirsher gp->pdev->device == PCI_DEVICE_ID_SUN_GEM) { 532e689cf4aSJeff Kirsher netdev_err(dev, "PCI error [%04x]", pci_estat); 533e689cf4aSJeff Kirsher 534e689cf4aSJeff Kirsher if (pci_estat & GREG_PCIESTAT_BADACK) 535e689cf4aSJeff Kirsher pr_cont(" <No ACK64# during ABS64 cycle>"); 536e689cf4aSJeff Kirsher if (pci_estat & GREG_PCIESTAT_DTRTO) 537e689cf4aSJeff Kirsher pr_cont(" <Delayed transaction timeout>"); 538e689cf4aSJeff Kirsher if (pci_estat & GREG_PCIESTAT_OTHER) 539e689cf4aSJeff Kirsher pr_cont(" <other>"); 540e689cf4aSJeff Kirsher pr_cont("\n"); 541e689cf4aSJeff Kirsher } else { 542e689cf4aSJeff Kirsher pci_estat |= GREG_PCIESTAT_OTHER; 543e689cf4aSJeff Kirsher netdev_err(dev, "PCI error\n"); 544e689cf4aSJeff Kirsher } 545e689cf4aSJeff Kirsher 546e689cf4aSJeff Kirsher if (pci_estat & GREG_PCIESTAT_OTHER) { 5470800d88eSHeiner Kallweit int pci_errs; 548e689cf4aSJeff Kirsher 549e689cf4aSJeff Kirsher /* Interrogate PCI config space for the 550e689cf4aSJeff Kirsher * true cause. 551e689cf4aSJeff Kirsher */ 5520800d88eSHeiner Kallweit pci_errs = pci_status_get_and_clear_errors(gp->pdev); 5530800d88eSHeiner Kallweit netdev_err(dev, "PCI status errors[%04x]\n", pci_errs); 5540800d88eSHeiner Kallweit if (pci_errs & PCI_STATUS_PARITY) 555e689cf4aSJeff Kirsher netdev_err(dev, "PCI parity error detected\n"); 5560800d88eSHeiner Kallweit if (pci_errs & PCI_STATUS_SIG_TARGET_ABORT) 557e689cf4aSJeff Kirsher netdev_err(dev, "PCI target abort\n"); 5580800d88eSHeiner Kallweit if (pci_errs & PCI_STATUS_REC_TARGET_ABORT) 559e689cf4aSJeff Kirsher netdev_err(dev, "PCI master acks target abort\n"); 5600800d88eSHeiner Kallweit if (pci_errs & PCI_STATUS_REC_MASTER_ABORT) 561e689cf4aSJeff Kirsher netdev_err(dev, "PCI master abort\n"); 5620800d88eSHeiner Kallweit if (pci_errs & PCI_STATUS_SIG_SYSTEM_ERROR) 563e689cf4aSJeff Kirsher netdev_err(dev, "PCI system error SERR#\n"); 5640800d88eSHeiner Kallweit if (pci_errs & PCI_STATUS_DETECTED_PARITY) 565e689cf4aSJeff Kirsher netdev_err(dev, "PCI parity error\n"); 566e689cf4aSJeff Kirsher } 567e689cf4aSJeff Kirsher 568e689cf4aSJeff Kirsher /* For all PCI errors, we should reset the chip. */ 569e689cf4aSJeff Kirsher return 1; 570e689cf4aSJeff Kirsher } 571e689cf4aSJeff Kirsher 572e689cf4aSJeff Kirsher /* All non-normal interrupt conditions get serviced here. 573e689cf4aSJeff Kirsher * Returns non-zero if we should just exit the interrupt 574e689cf4aSJeff Kirsher * handler right now (ie. if we reset the card which invalidates 575e689cf4aSJeff Kirsher * all of the other original irq status bits). 576e689cf4aSJeff Kirsher */ 577e689cf4aSJeff Kirsher static int gem_abnormal_irq(struct net_device *dev, struct gem *gp, u32 gem_status) 578e689cf4aSJeff Kirsher { 579e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_RXNOBUF) { 580e689cf4aSJeff Kirsher /* Frame arrived, no free RX buffers available. */ 581e689cf4aSJeff Kirsher if (netif_msg_rx_err(gp)) 582e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: no buffer for rx frame\n", 583e689cf4aSJeff Kirsher gp->dev->name); 584e689cf4aSJeff Kirsher dev->stats.rx_dropped++; 585e689cf4aSJeff Kirsher } 586e689cf4aSJeff Kirsher 587e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_RXTAGERR) { 588e689cf4aSJeff Kirsher /* corrupt RX tag framing */ 589e689cf4aSJeff Kirsher if (netif_msg_rx_err(gp)) 590e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: corrupt rx tag framing\n", 591e689cf4aSJeff Kirsher gp->dev->name); 592e689cf4aSJeff Kirsher dev->stats.rx_errors++; 593e689cf4aSJeff Kirsher 594e689cf4aSJeff Kirsher return 1; 595e689cf4aSJeff Kirsher } 596e689cf4aSJeff Kirsher 597e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_PCS) { 598e689cf4aSJeff Kirsher if (gem_pcs_interrupt(dev, gp, gem_status)) 599e689cf4aSJeff Kirsher return 1; 600e689cf4aSJeff Kirsher } 601e689cf4aSJeff Kirsher 602e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_TXMAC) { 603e689cf4aSJeff Kirsher if (gem_txmac_interrupt(dev, gp, gem_status)) 604e689cf4aSJeff Kirsher return 1; 605e689cf4aSJeff Kirsher } 606e689cf4aSJeff Kirsher 607e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_RXMAC) { 608e689cf4aSJeff Kirsher if (gem_rxmac_interrupt(dev, gp, gem_status)) 609e689cf4aSJeff Kirsher return 1; 610e689cf4aSJeff Kirsher } 611e689cf4aSJeff Kirsher 612e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_MAC) { 613e689cf4aSJeff Kirsher if (gem_mac_interrupt(dev, gp, gem_status)) 614e689cf4aSJeff Kirsher return 1; 615e689cf4aSJeff Kirsher } 616e689cf4aSJeff Kirsher 617e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_MIF) { 618e689cf4aSJeff Kirsher if (gem_mif_interrupt(dev, gp, gem_status)) 619e689cf4aSJeff Kirsher return 1; 620e689cf4aSJeff Kirsher } 621e689cf4aSJeff Kirsher 622e689cf4aSJeff Kirsher if (gem_status & GREG_STAT_PCIERR) { 623e689cf4aSJeff Kirsher if (gem_pci_interrupt(dev, gp, gem_status)) 624e689cf4aSJeff Kirsher return 1; 625e689cf4aSJeff Kirsher } 626e689cf4aSJeff Kirsher 627e689cf4aSJeff Kirsher return 0; 628e689cf4aSJeff Kirsher } 629e689cf4aSJeff Kirsher 630e689cf4aSJeff Kirsher static __inline__ void gem_tx(struct net_device *dev, struct gem *gp, u32 gem_status) 631e689cf4aSJeff Kirsher { 632e689cf4aSJeff Kirsher int entry, limit; 633e689cf4aSJeff Kirsher 634e689cf4aSJeff Kirsher entry = gp->tx_old; 635e689cf4aSJeff Kirsher limit = ((gem_status & GREG_STAT_TXNR) >> GREG_STAT_TXNR_SHIFT); 636e689cf4aSJeff Kirsher while (entry != limit) { 637e689cf4aSJeff Kirsher struct sk_buff *skb; 638e689cf4aSJeff Kirsher struct gem_txd *txd; 639e689cf4aSJeff Kirsher dma_addr_t dma_addr; 640e689cf4aSJeff Kirsher u32 dma_len; 641e689cf4aSJeff Kirsher int frag; 642e689cf4aSJeff Kirsher 643e689cf4aSJeff Kirsher if (netif_msg_tx_done(gp)) 644e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: tx done, slot %d\n", 645e689cf4aSJeff Kirsher gp->dev->name, entry); 646e689cf4aSJeff Kirsher skb = gp->tx_skbs[entry]; 647e689cf4aSJeff Kirsher if (skb_shinfo(skb)->nr_frags) { 648e689cf4aSJeff Kirsher int last = entry + skb_shinfo(skb)->nr_frags; 649e689cf4aSJeff Kirsher int walk = entry; 650e689cf4aSJeff Kirsher int incomplete = 0; 651e689cf4aSJeff Kirsher 652e689cf4aSJeff Kirsher last &= (TX_RING_SIZE - 1); 653e689cf4aSJeff Kirsher for (;;) { 654e689cf4aSJeff Kirsher walk = NEXT_TX(walk); 655e689cf4aSJeff Kirsher if (walk == limit) 656e689cf4aSJeff Kirsher incomplete = 1; 657e689cf4aSJeff Kirsher if (walk == last) 658e689cf4aSJeff Kirsher break; 659e689cf4aSJeff Kirsher } 660e689cf4aSJeff Kirsher if (incomplete) 661e689cf4aSJeff Kirsher break; 662e689cf4aSJeff Kirsher } 663e689cf4aSJeff Kirsher gp->tx_skbs[entry] = NULL; 664e689cf4aSJeff Kirsher dev->stats.tx_bytes += skb->len; 665e689cf4aSJeff Kirsher 666e689cf4aSJeff Kirsher for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { 667e689cf4aSJeff Kirsher txd = &gp->init_block->txd[entry]; 668e689cf4aSJeff Kirsher 669e689cf4aSJeff Kirsher dma_addr = le64_to_cpu(txd->buffer); 670e689cf4aSJeff Kirsher dma_len = le64_to_cpu(txd->control_word) & TXDCTRL_BUFSZ; 671e689cf4aSJeff Kirsher 6728d4f62caSChristophe JAILLET dma_unmap_page(&gp->pdev->dev, dma_addr, dma_len, 6738d4f62caSChristophe JAILLET DMA_TO_DEVICE); 674e689cf4aSJeff Kirsher entry = NEXT_TX(entry); 675e689cf4aSJeff Kirsher } 676e689cf4aSJeff Kirsher 677e689cf4aSJeff Kirsher dev->stats.tx_packets++; 678241198acSEric W. Biederman dev_consume_skb_any(skb); 679e689cf4aSJeff Kirsher } 680e689cf4aSJeff Kirsher gp->tx_old = entry; 681e689cf4aSJeff Kirsher 682e689cf4aSJeff Kirsher /* Need to make the tx_old update visible to gem_start_xmit() 683e689cf4aSJeff Kirsher * before checking for netif_queue_stopped(). Without the 684e689cf4aSJeff Kirsher * memory barrier, there is a small possibility that gem_start_xmit() 685e689cf4aSJeff Kirsher * will miss it and cause the queue to be stopped forever. 686e689cf4aSJeff Kirsher */ 687e689cf4aSJeff Kirsher smp_mb(); 688e689cf4aSJeff Kirsher 689e689cf4aSJeff Kirsher if (unlikely(netif_queue_stopped(dev) && 690e689cf4aSJeff Kirsher TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1))) { 691e689cf4aSJeff Kirsher struct netdev_queue *txq = netdev_get_tx_queue(dev, 0); 692e689cf4aSJeff Kirsher 693e689cf4aSJeff Kirsher __netif_tx_lock(txq, smp_processor_id()); 694e689cf4aSJeff Kirsher if (netif_queue_stopped(dev) && 695e689cf4aSJeff Kirsher TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1)) 696e689cf4aSJeff Kirsher netif_wake_queue(dev); 697e689cf4aSJeff Kirsher __netif_tx_unlock(txq); 698e689cf4aSJeff Kirsher } 699e689cf4aSJeff Kirsher } 700e689cf4aSJeff Kirsher 701e689cf4aSJeff Kirsher static __inline__ void gem_post_rxds(struct gem *gp, int limit) 702e689cf4aSJeff Kirsher { 703e689cf4aSJeff Kirsher int cluster_start, curr, count, kick; 704e689cf4aSJeff Kirsher 705e689cf4aSJeff Kirsher cluster_start = curr = (gp->rx_new & ~(4 - 1)); 706e689cf4aSJeff Kirsher count = 0; 707e689cf4aSJeff Kirsher kick = -1; 708b4468cc6SAlexander Duyck dma_wmb(); 709e689cf4aSJeff Kirsher while (curr != limit) { 710e689cf4aSJeff Kirsher curr = NEXT_RX(curr); 711e689cf4aSJeff Kirsher if (++count == 4) { 712e689cf4aSJeff Kirsher struct gem_rxd *rxd = 713e689cf4aSJeff Kirsher &gp->init_block->rxd[cluster_start]; 714e689cf4aSJeff Kirsher for (;;) { 715e689cf4aSJeff Kirsher rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp)); 716e689cf4aSJeff Kirsher rxd++; 717e689cf4aSJeff Kirsher cluster_start = NEXT_RX(cluster_start); 718e689cf4aSJeff Kirsher if (cluster_start == curr) 719e689cf4aSJeff Kirsher break; 720e689cf4aSJeff Kirsher } 721e689cf4aSJeff Kirsher kick = curr; 722e689cf4aSJeff Kirsher count = 0; 723e689cf4aSJeff Kirsher } 724e689cf4aSJeff Kirsher } 725e689cf4aSJeff Kirsher if (kick >= 0) { 726e689cf4aSJeff Kirsher mb(); 727e689cf4aSJeff Kirsher writel(kick, gp->regs + RXDMA_KICK); 728e689cf4aSJeff Kirsher } 729e689cf4aSJeff Kirsher } 730e689cf4aSJeff Kirsher 731e689cf4aSJeff Kirsher #define ALIGNED_RX_SKB_ADDR(addr) \ 732e689cf4aSJeff Kirsher ((((unsigned long)(addr) + (64UL - 1UL)) & ~(64UL - 1UL)) - (unsigned long)(addr)) 733e689cf4aSJeff Kirsher static __inline__ struct sk_buff *gem_alloc_skb(struct net_device *dev, int size, 734e689cf4aSJeff Kirsher gfp_t gfp_flags) 735e689cf4aSJeff Kirsher { 736e689cf4aSJeff Kirsher struct sk_buff *skb = alloc_skb(size + 64, gfp_flags); 737e689cf4aSJeff Kirsher 738e689cf4aSJeff Kirsher if (likely(skb)) { 739e689cf4aSJeff Kirsher unsigned long offset = ALIGNED_RX_SKB_ADDR(skb->data); 740e689cf4aSJeff Kirsher skb_reserve(skb, offset); 741e689cf4aSJeff Kirsher } 742e689cf4aSJeff Kirsher return skb; 743e689cf4aSJeff Kirsher } 744e689cf4aSJeff Kirsher 745e689cf4aSJeff Kirsher static int gem_rx(struct gem *gp, int work_to_do) 746e689cf4aSJeff Kirsher { 747e689cf4aSJeff Kirsher struct net_device *dev = gp->dev; 748e689cf4aSJeff Kirsher int entry, drops, work_done = 0; 749e689cf4aSJeff Kirsher u32 done; 750e689cf4aSJeff Kirsher 751e689cf4aSJeff Kirsher if (netif_msg_rx_status(gp)) 752e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: rx interrupt, done: %d, rx_new: %d\n", 753e689cf4aSJeff Kirsher gp->dev->name, readl(gp->regs + RXDMA_DONE), gp->rx_new); 754e689cf4aSJeff Kirsher 755e689cf4aSJeff Kirsher entry = gp->rx_new; 756e689cf4aSJeff Kirsher drops = 0; 757e689cf4aSJeff Kirsher done = readl(gp->regs + RXDMA_DONE); 758e689cf4aSJeff Kirsher for (;;) { 759e689cf4aSJeff Kirsher struct gem_rxd *rxd = &gp->init_block->rxd[entry]; 760e689cf4aSJeff Kirsher struct sk_buff *skb; 761e689cf4aSJeff Kirsher u64 status = le64_to_cpu(rxd->status_word); 762e689cf4aSJeff Kirsher dma_addr_t dma_addr; 763e689cf4aSJeff Kirsher int len; 764e689cf4aSJeff Kirsher 765e689cf4aSJeff Kirsher if ((status & RXDCTRL_OWN) != 0) 766e689cf4aSJeff Kirsher break; 767e689cf4aSJeff Kirsher 768e689cf4aSJeff Kirsher if (work_done >= RX_RING_SIZE || work_done >= work_to_do) 769e689cf4aSJeff Kirsher break; 770e689cf4aSJeff Kirsher 771e689cf4aSJeff Kirsher /* When writing back RX descriptor, GEM writes status 772e689cf4aSJeff Kirsher * then buffer address, possibly in separate transactions. 773e689cf4aSJeff Kirsher * If we don't wait for the chip to write both, we could 774e689cf4aSJeff Kirsher * post a new buffer to this descriptor then have GEM spam 775e689cf4aSJeff Kirsher * on the buffer address. We sync on the RX completion 776e689cf4aSJeff Kirsher * register to prevent this from happening. 777e689cf4aSJeff Kirsher */ 778e689cf4aSJeff Kirsher if (entry == done) { 779e689cf4aSJeff Kirsher done = readl(gp->regs + RXDMA_DONE); 780e689cf4aSJeff Kirsher if (entry == done) 781e689cf4aSJeff Kirsher break; 782e689cf4aSJeff Kirsher } 783e689cf4aSJeff Kirsher 784e689cf4aSJeff Kirsher /* We can now account for the work we're about to do */ 785e689cf4aSJeff Kirsher work_done++; 786e689cf4aSJeff Kirsher 787e689cf4aSJeff Kirsher skb = gp->rx_skbs[entry]; 788e689cf4aSJeff Kirsher 789e689cf4aSJeff Kirsher len = (status & RXDCTRL_BUFSZ) >> 16; 790e689cf4aSJeff Kirsher if ((len < ETH_ZLEN) || (status & RXDCTRL_BAD)) { 791e689cf4aSJeff Kirsher dev->stats.rx_errors++; 792e689cf4aSJeff Kirsher if (len < ETH_ZLEN) 793e689cf4aSJeff Kirsher dev->stats.rx_length_errors++; 794e689cf4aSJeff Kirsher if (len & RXDCTRL_BAD) 795e689cf4aSJeff Kirsher dev->stats.rx_crc_errors++; 796e689cf4aSJeff Kirsher 797e689cf4aSJeff Kirsher /* We'll just return it to GEM. */ 798e689cf4aSJeff Kirsher drop_it: 799e689cf4aSJeff Kirsher dev->stats.rx_dropped++; 800e689cf4aSJeff Kirsher goto next; 801e689cf4aSJeff Kirsher } 802e689cf4aSJeff Kirsher 803e689cf4aSJeff Kirsher dma_addr = le64_to_cpu(rxd->buffer); 804e689cf4aSJeff Kirsher if (len > RX_COPY_THRESHOLD) { 805e689cf4aSJeff Kirsher struct sk_buff *new_skb; 806e689cf4aSJeff Kirsher 807e689cf4aSJeff Kirsher new_skb = gem_alloc_skb(dev, RX_BUF_ALLOC_SIZE(gp), GFP_ATOMIC); 808e689cf4aSJeff Kirsher if (new_skb == NULL) { 809e689cf4aSJeff Kirsher drops++; 810e689cf4aSJeff Kirsher goto drop_it; 811e689cf4aSJeff Kirsher } 8128d4f62caSChristophe JAILLET dma_unmap_page(&gp->pdev->dev, dma_addr, 8138d4f62caSChristophe JAILLET RX_BUF_ALLOC_SIZE(gp), DMA_FROM_DEVICE); 814e689cf4aSJeff Kirsher gp->rx_skbs[entry] = new_skb; 815e689cf4aSJeff Kirsher skb_put(new_skb, (gp->rx_buf_sz + RX_OFFSET)); 8168d4f62caSChristophe JAILLET rxd->buffer = cpu_to_le64(dma_map_page(&gp->pdev->dev, 817e689cf4aSJeff Kirsher virt_to_page(new_skb->data), 818e689cf4aSJeff Kirsher offset_in_page(new_skb->data), 819e689cf4aSJeff Kirsher RX_BUF_ALLOC_SIZE(gp), 8208d4f62caSChristophe JAILLET DMA_FROM_DEVICE)); 821e689cf4aSJeff Kirsher skb_reserve(new_skb, RX_OFFSET); 822e689cf4aSJeff Kirsher 823e689cf4aSJeff Kirsher /* Trim the original skb for the netif. */ 824e689cf4aSJeff Kirsher skb_trim(skb, len); 825e689cf4aSJeff Kirsher } else { 826e689cf4aSJeff Kirsher struct sk_buff *copy_skb = netdev_alloc_skb(dev, len + 2); 827e689cf4aSJeff Kirsher 828e689cf4aSJeff Kirsher if (copy_skb == NULL) { 829e689cf4aSJeff Kirsher drops++; 830e689cf4aSJeff Kirsher goto drop_it; 831e689cf4aSJeff Kirsher } 832e689cf4aSJeff Kirsher 833e689cf4aSJeff Kirsher skb_reserve(copy_skb, 2); 834e689cf4aSJeff Kirsher skb_put(copy_skb, len); 8358d4f62caSChristophe JAILLET dma_sync_single_for_cpu(&gp->pdev->dev, dma_addr, len, 8368d4f62caSChristophe JAILLET DMA_FROM_DEVICE); 837e689cf4aSJeff Kirsher skb_copy_from_linear_data(skb, copy_skb->data, len); 8388d4f62caSChristophe JAILLET dma_sync_single_for_device(&gp->pdev->dev, dma_addr, 8398d4f62caSChristophe JAILLET len, DMA_FROM_DEVICE); 840e689cf4aSJeff Kirsher 841e689cf4aSJeff Kirsher /* We'll reuse the original ring buffer. */ 842e689cf4aSJeff Kirsher skb = copy_skb; 843e689cf4aSJeff Kirsher } 844e689cf4aSJeff Kirsher 84512b03558SEric Dumazet if (likely(dev->features & NETIF_F_RXCSUM)) { 84612b03558SEric Dumazet __sum16 csum; 84712b03558SEric Dumazet 848e689cf4aSJeff Kirsher csum = (__force __sum16)htons((status & RXDCTRL_TCPCSUM) ^ 0xffff); 849e689cf4aSJeff Kirsher skb->csum = csum_unfold(csum); 850e689cf4aSJeff Kirsher skb->ip_summed = CHECKSUM_COMPLETE; 85112b03558SEric Dumazet } 852e689cf4aSJeff Kirsher skb->protocol = eth_type_trans(skb, gp->dev); 853e689cf4aSJeff Kirsher 854e689cf4aSJeff Kirsher napi_gro_receive(&gp->napi, skb); 855e689cf4aSJeff Kirsher 856e689cf4aSJeff Kirsher dev->stats.rx_packets++; 857e689cf4aSJeff Kirsher dev->stats.rx_bytes += len; 858e689cf4aSJeff Kirsher 859e689cf4aSJeff Kirsher next: 860e689cf4aSJeff Kirsher entry = NEXT_RX(entry); 861e689cf4aSJeff Kirsher } 862e689cf4aSJeff Kirsher 863e689cf4aSJeff Kirsher gem_post_rxds(gp, entry); 864e689cf4aSJeff Kirsher 865e689cf4aSJeff Kirsher gp->rx_new = entry; 866e689cf4aSJeff Kirsher 867e689cf4aSJeff Kirsher if (drops) 868e689cf4aSJeff Kirsher netdev_info(gp->dev, "Memory squeeze, deferring packet\n"); 869e689cf4aSJeff Kirsher 870e689cf4aSJeff Kirsher return work_done; 871e689cf4aSJeff Kirsher } 872e689cf4aSJeff Kirsher 873e689cf4aSJeff Kirsher static int gem_poll(struct napi_struct *napi, int budget) 874e689cf4aSJeff Kirsher { 875e689cf4aSJeff Kirsher struct gem *gp = container_of(napi, struct gem, napi); 876e689cf4aSJeff Kirsher struct net_device *dev = gp->dev; 877e689cf4aSJeff Kirsher int work_done; 878e689cf4aSJeff Kirsher 879e689cf4aSJeff Kirsher work_done = 0; 880e689cf4aSJeff Kirsher do { 881e689cf4aSJeff Kirsher /* Handle anomalies */ 882e689cf4aSJeff Kirsher if (unlikely(gp->status & GREG_STAT_ABNORMAL)) { 883e689cf4aSJeff Kirsher struct netdev_queue *txq = netdev_get_tx_queue(dev, 0); 884e689cf4aSJeff Kirsher int reset; 885e689cf4aSJeff Kirsher 886e689cf4aSJeff Kirsher /* We run the abnormal interrupt handling code with 887e689cf4aSJeff Kirsher * the Tx lock. It only resets the Rx portion of the 888e689cf4aSJeff Kirsher * chip, but we need to guard it against DMA being 889e689cf4aSJeff Kirsher * restarted by the link poll timer 890e689cf4aSJeff Kirsher */ 891e689cf4aSJeff Kirsher __netif_tx_lock(txq, smp_processor_id()); 892e689cf4aSJeff Kirsher reset = gem_abnormal_irq(dev, gp, gp->status); 893e689cf4aSJeff Kirsher __netif_tx_unlock(txq); 894e689cf4aSJeff Kirsher if (reset) { 895e689cf4aSJeff Kirsher gem_schedule_reset(gp); 896e689cf4aSJeff Kirsher napi_complete(napi); 897e689cf4aSJeff Kirsher return work_done; 898e689cf4aSJeff Kirsher } 899e689cf4aSJeff Kirsher } 900e689cf4aSJeff Kirsher 901e689cf4aSJeff Kirsher /* Run TX completion thread */ 902e689cf4aSJeff Kirsher gem_tx(dev, gp, gp->status); 903e689cf4aSJeff Kirsher 904e689cf4aSJeff Kirsher /* Run RX thread. We don't use any locking here, 905e689cf4aSJeff Kirsher * code willing to do bad things - like cleaning the 906e689cf4aSJeff Kirsher * rx ring - must call napi_disable(), which 907e689cf4aSJeff Kirsher * schedule_timeout()'s if polling is already disabled. 908e689cf4aSJeff Kirsher */ 909e689cf4aSJeff Kirsher work_done += gem_rx(gp, budget - work_done); 910e689cf4aSJeff Kirsher 911e689cf4aSJeff Kirsher if (work_done >= budget) 912e689cf4aSJeff Kirsher return work_done; 913e689cf4aSJeff Kirsher 914e689cf4aSJeff Kirsher gp->status = readl(gp->regs + GREG_STAT); 915e689cf4aSJeff Kirsher } while (gp->status & GREG_STAT_NAPI); 916e689cf4aSJeff Kirsher 9176ad20165SEric Dumazet napi_complete_done(napi, work_done); 918e689cf4aSJeff Kirsher gem_enable_ints(gp); 919e689cf4aSJeff Kirsher 920e689cf4aSJeff Kirsher return work_done; 921e689cf4aSJeff Kirsher } 922e689cf4aSJeff Kirsher 923e689cf4aSJeff Kirsher static irqreturn_t gem_interrupt(int irq, void *dev_id) 924e689cf4aSJeff Kirsher { 925e689cf4aSJeff Kirsher struct net_device *dev = dev_id; 926e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 927e689cf4aSJeff Kirsher 928e689cf4aSJeff Kirsher if (napi_schedule_prep(&gp->napi)) { 929e689cf4aSJeff Kirsher u32 gem_status = readl(gp->regs + GREG_STAT); 930e689cf4aSJeff Kirsher 931e689cf4aSJeff Kirsher if (unlikely(gem_status == 0)) { 932e689cf4aSJeff Kirsher napi_enable(&gp->napi); 933e689cf4aSJeff Kirsher return IRQ_NONE; 934e689cf4aSJeff Kirsher } 935e689cf4aSJeff Kirsher if (netif_msg_intr(gp)) 936e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: gem_interrupt() gem_status: 0x%x\n", 937e689cf4aSJeff Kirsher gp->dev->name, gem_status); 938e689cf4aSJeff Kirsher 939e689cf4aSJeff Kirsher gp->status = gem_status; 940e689cf4aSJeff Kirsher gem_disable_ints(gp); 941e689cf4aSJeff Kirsher __napi_schedule(&gp->napi); 942e689cf4aSJeff Kirsher } 943e689cf4aSJeff Kirsher 944e689cf4aSJeff Kirsher /* If polling was disabled at the time we received that 945e689cf4aSJeff Kirsher * interrupt, we may return IRQ_HANDLED here while we 946e689cf4aSJeff Kirsher * should return IRQ_NONE. No big deal... 947e689cf4aSJeff Kirsher */ 948e689cf4aSJeff Kirsher return IRQ_HANDLED; 949e689cf4aSJeff Kirsher } 950e689cf4aSJeff Kirsher 951e689cf4aSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER 952e689cf4aSJeff Kirsher static void gem_poll_controller(struct net_device *dev) 953e689cf4aSJeff Kirsher { 954e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 955e689cf4aSJeff Kirsher 956e689cf4aSJeff Kirsher disable_irq(gp->pdev->irq); 957e689cf4aSJeff Kirsher gem_interrupt(gp->pdev->irq, dev); 958e689cf4aSJeff Kirsher enable_irq(gp->pdev->irq); 959e689cf4aSJeff Kirsher } 960e689cf4aSJeff Kirsher #endif 961e689cf4aSJeff Kirsher 9620290bd29SMichael S. Tsirkin static void gem_tx_timeout(struct net_device *dev, unsigned int txqueue) 963e689cf4aSJeff Kirsher { 964e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 965e689cf4aSJeff Kirsher 966e689cf4aSJeff Kirsher netdev_err(dev, "transmit timed out, resetting\n"); 967e689cf4aSJeff Kirsher 968e689cf4aSJeff Kirsher netdev_err(dev, "TX_STATE[%08x:%08x:%08x]\n", 969e689cf4aSJeff Kirsher readl(gp->regs + TXDMA_CFG), 970e689cf4aSJeff Kirsher readl(gp->regs + MAC_TXSTAT), 971e689cf4aSJeff Kirsher readl(gp->regs + MAC_TXCFG)); 972e689cf4aSJeff Kirsher netdev_err(dev, "RX_STATE[%08x:%08x:%08x]\n", 973e689cf4aSJeff Kirsher readl(gp->regs + RXDMA_CFG), 974e689cf4aSJeff Kirsher readl(gp->regs + MAC_RXSTAT), 975e689cf4aSJeff Kirsher readl(gp->regs + MAC_RXCFG)); 976e689cf4aSJeff Kirsher 977e689cf4aSJeff Kirsher gem_schedule_reset(gp); 978e689cf4aSJeff Kirsher } 979e689cf4aSJeff Kirsher 980e689cf4aSJeff Kirsher static __inline__ int gem_intme(int entry) 981e689cf4aSJeff Kirsher { 982e689cf4aSJeff Kirsher /* Algorithm: IRQ every 1/2 of descriptors. */ 983e689cf4aSJeff Kirsher if (!(entry & ((TX_RING_SIZE>>1)-1))) 984e689cf4aSJeff Kirsher return 1; 985e689cf4aSJeff Kirsher 986e689cf4aSJeff Kirsher return 0; 987e689cf4aSJeff Kirsher } 988e689cf4aSJeff Kirsher 989e689cf4aSJeff Kirsher static netdev_tx_t gem_start_xmit(struct sk_buff *skb, 990e689cf4aSJeff Kirsher struct net_device *dev) 991e689cf4aSJeff Kirsher { 992e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 993e689cf4aSJeff Kirsher int entry; 994e689cf4aSJeff Kirsher u64 ctrl; 995e689cf4aSJeff Kirsher 996e689cf4aSJeff Kirsher ctrl = 0; 997e689cf4aSJeff Kirsher if (skb->ip_summed == CHECKSUM_PARTIAL) { 998e689cf4aSJeff Kirsher const u64 csum_start_off = skb_checksum_start_offset(skb); 999e689cf4aSJeff Kirsher const u64 csum_stuff_off = csum_start_off + skb->csum_offset; 1000e689cf4aSJeff Kirsher 1001e689cf4aSJeff Kirsher ctrl = (TXDCTRL_CENAB | 1002e689cf4aSJeff Kirsher (csum_start_off << 15) | 1003e689cf4aSJeff Kirsher (csum_stuff_off << 21)); 1004e689cf4aSJeff Kirsher } 1005e689cf4aSJeff Kirsher 1006e689cf4aSJeff Kirsher if (unlikely(TX_BUFFS_AVAIL(gp) <= (skb_shinfo(skb)->nr_frags + 1))) { 1007e689cf4aSJeff Kirsher /* This is a hard error, log it. */ 1008e689cf4aSJeff Kirsher if (!netif_queue_stopped(dev)) { 1009e689cf4aSJeff Kirsher netif_stop_queue(dev); 1010e689cf4aSJeff Kirsher netdev_err(dev, "BUG! Tx Ring full when queue awake!\n"); 1011e689cf4aSJeff Kirsher } 1012e689cf4aSJeff Kirsher return NETDEV_TX_BUSY; 1013e689cf4aSJeff Kirsher } 1014e689cf4aSJeff Kirsher 1015e689cf4aSJeff Kirsher entry = gp->tx_new; 1016e689cf4aSJeff Kirsher gp->tx_skbs[entry] = skb; 1017e689cf4aSJeff Kirsher 1018e689cf4aSJeff Kirsher if (skb_shinfo(skb)->nr_frags == 0) { 1019e689cf4aSJeff Kirsher struct gem_txd *txd = &gp->init_block->txd[entry]; 1020e689cf4aSJeff Kirsher dma_addr_t mapping; 1021e689cf4aSJeff Kirsher u32 len; 1022e689cf4aSJeff Kirsher 1023e689cf4aSJeff Kirsher len = skb->len; 10248d4f62caSChristophe JAILLET mapping = dma_map_page(&gp->pdev->dev, 1025e689cf4aSJeff Kirsher virt_to_page(skb->data), 1026e689cf4aSJeff Kirsher offset_in_page(skb->data), 10278d4f62caSChristophe JAILLET len, DMA_TO_DEVICE); 1028e689cf4aSJeff Kirsher ctrl |= TXDCTRL_SOF | TXDCTRL_EOF | len; 1029e689cf4aSJeff Kirsher if (gem_intme(entry)) 1030e689cf4aSJeff Kirsher ctrl |= TXDCTRL_INTME; 1031e689cf4aSJeff Kirsher txd->buffer = cpu_to_le64(mapping); 1032b4468cc6SAlexander Duyck dma_wmb(); 1033e689cf4aSJeff Kirsher txd->control_word = cpu_to_le64(ctrl); 1034e689cf4aSJeff Kirsher entry = NEXT_TX(entry); 1035e689cf4aSJeff Kirsher } else { 1036e689cf4aSJeff Kirsher struct gem_txd *txd; 1037e689cf4aSJeff Kirsher u32 first_len; 1038e689cf4aSJeff Kirsher u64 intme; 1039e689cf4aSJeff Kirsher dma_addr_t first_mapping; 1040e689cf4aSJeff Kirsher int frag, first_entry = entry; 1041e689cf4aSJeff Kirsher 1042e689cf4aSJeff Kirsher intme = 0; 1043e689cf4aSJeff Kirsher if (gem_intme(entry)) 1044e689cf4aSJeff Kirsher intme |= TXDCTRL_INTME; 1045e689cf4aSJeff Kirsher 1046e689cf4aSJeff Kirsher /* We must give this initial chunk to the device last. 1047e689cf4aSJeff Kirsher * Otherwise we could race with the device. 1048e689cf4aSJeff Kirsher */ 1049e689cf4aSJeff Kirsher first_len = skb_headlen(skb); 10508d4f62caSChristophe JAILLET first_mapping = dma_map_page(&gp->pdev->dev, 10518d4f62caSChristophe JAILLET virt_to_page(skb->data), 1052e689cf4aSJeff Kirsher offset_in_page(skb->data), 10538d4f62caSChristophe JAILLET first_len, DMA_TO_DEVICE); 1054e689cf4aSJeff Kirsher entry = NEXT_TX(entry); 1055e689cf4aSJeff Kirsher 1056e689cf4aSJeff Kirsher for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { 10579e903e08SEric Dumazet const skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag]; 1058e689cf4aSJeff Kirsher u32 len; 1059e689cf4aSJeff Kirsher dma_addr_t mapping; 1060e689cf4aSJeff Kirsher u64 this_ctrl; 1061e689cf4aSJeff Kirsher 10629e903e08SEric Dumazet len = skb_frag_size(this_frag); 10634fee78b4SIan Campbell mapping = skb_frag_dma_map(&gp->pdev->dev, this_frag, 10645d6bcdfeSIan Campbell 0, len, DMA_TO_DEVICE); 1065e689cf4aSJeff Kirsher this_ctrl = ctrl; 1066e689cf4aSJeff Kirsher if (frag == skb_shinfo(skb)->nr_frags - 1) 1067e689cf4aSJeff Kirsher this_ctrl |= TXDCTRL_EOF; 1068e689cf4aSJeff Kirsher 1069e689cf4aSJeff Kirsher txd = &gp->init_block->txd[entry]; 1070e689cf4aSJeff Kirsher txd->buffer = cpu_to_le64(mapping); 1071b4468cc6SAlexander Duyck dma_wmb(); 1072e689cf4aSJeff Kirsher txd->control_word = cpu_to_le64(this_ctrl | len); 1073e689cf4aSJeff Kirsher 1074e689cf4aSJeff Kirsher if (gem_intme(entry)) 1075e689cf4aSJeff Kirsher intme |= TXDCTRL_INTME; 1076e689cf4aSJeff Kirsher 1077e689cf4aSJeff Kirsher entry = NEXT_TX(entry); 1078e689cf4aSJeff Kirsher } 1079e689cf4aSJeff Kirsher txd = &gp->init_block->txd[first_entry]; 1080e689cf4aSJeff Kirsher txd->buffer = cpu_to_le64(first_mapping); 1081b4468cc6SAlexander Duyck dma_wmb(); 1082e689cf4aSJeff Kirsher txd->control_word = 1083e689cf4aSJeff Kirsher cpu_to_le64(ctrl | TXDCTRL_SOF | intme | first_len); 1084e689cf4aSJeff Kirsher } 1085e689cf4aSJeff Kirsher 1086e689cf4aSJeff Kirsher gp->tx_new = entry; 1087e689cf4aSJeff Kirsher if (unlikely(TX_BUFFS_AVAIL(gp) <= (MAX_SKB_FRAGS + 1))) { 1088e689cf4aSJeff Kirsher netif_stop_queue(dev); 1089e689cf4aSJeff Kirsher 1090e689cf4aSJeff Kirsher /* netif_stop_queue() must be done before checking 1091c3178883SJilin Yuan * tx index in TX_BUFFS_AVAIL() below, because 1092e689cf4aSJeff Kirsher * in gem_tx(), we update tx_old before checking for 1093e689cf4aSJeff Kirsher * netif_queue_stopped(). 1094e689cf4aSJeff Kirsher */ 1095e689cf4aSJeff Kirsher smp_mb(); 1096e689cf4aSJeff Kirsher if (TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1)) 1097e689cf4aSJeff Kirsher netif_wake_queue(dev); 1098e689cf4aSJeff Kirsher } 1099e689cf4aSJeff Kirsher if (netif_msg_tx_queued(gp)) 1100e689cf4aSJeff Kirsher printk(KERN_DEBUG "%s: tx queued, slot %d, skblen %d\n", 1101e689cf4aSJeff Kirsher dev->name, entry, skb->len); 1102e689cf4aSJeff Kirsher mb(); 1103e689cf4aSJeff Kirsher writel(gp->tx_new, gp->regs + TXDMA_KICK); 1104e689cf4aSJeff Kirsher 1105e689cf4aSJeff Kirsher return NETDEV_TX_OK; 1106e689cf4aSJeff Kirsher } 1107e689cf4aSJeff Kirsher 1108e689cf4aSJeff Kirsher static void gem_pcs_reset(struct gem *gp) 1109e689cf4aSJeff Kirsher { 1110e689cf4aSJeff Kirsher int limit; 1111e689cf4aSJeff Kirsher u32 val; 1112e689cf4aSJeff Kirsher 1113e689cf4aSJeff Kirsher /* Reset PCS unit. */ 1114e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_MIICTRL); 1115e689cf4aSJeff Kirsher val |= PCS_MIICTRL_RST; 1116e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_MIICTRL); 1117e689cf4aSJeff Kirsher 1118e689cf4aSJeff Kirsher limit = 32; 1119e689cf4aSJeff Kirsher while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) { 1120e689cf4aSJeff Kirsher udelay(100); 1121e689cf4aSJeff Kirsher if (limit-- <= 0) 1122e689cf4aSJeff Kirsher break; 1123e689cf4aSJeff Kirsher } 1124e689cf4aSJeff Kirsher if (limit < 0) 1125e689cf4aSJeff Kirsher netdev_warn(gp->dev, "PCS reset bit would not clear\n"); 1126e689cf4aSJeff Kirsher } 1127e689cf4aSJeff Kirsher 1128e689cf4aSJeff Kirsher static void gem_pcs_reinit_adv(struct gem *gp) 1129e689cf4aSJeff Kirsher { 1130e689cf4aSJeff Kirsher u32 val; 1131e689cf4aSJeff Kirsher 1132e689cf4aSJeff Kirsher /* Make sure PCS is disabled while changing advertisement 1133e689cf4aSJeff Kirsher * configuration. 1134e689cf4aSJeff Kirsher */ 1135e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_CFG); 1136e689cf4aSJeff Kirsher val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO); 1137e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_CFG); 1138e689cf4aSJeff Kirsher 1139e689cf4aSJeff Kirsher /* Advertise all capabilities except asymmetric 1140e689cf4aSJeff Kirsher * pause. 1141e689cf4aSJeff Kirsher */ 1142e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_MIIADV); 1143e689cf4aSJeff Kirsher val |= (PCS_MIIADV_FD | PCS_MIIADV_HD | 1144e689cf4aSJeff Kirsher PCS_MIIADV_SP | PCS_MIIADV_AP); 1145e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_MIIADV); 1146e689cf4aSJeff Kirsher 1147e689cf4aSJeff Kirsher /* Enable and restart auto-negotiation, disable wrapback/loopback, 1148e689cf4aSJeff Kirsher * and re-enable PCS. 1149e689cf4aSJeff Kirsher */ 1150e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_MIICTRL); 1151e689cf4aSJeff Kirsher val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE); 1152e689cf4aSJeff Kirsher val &= ~PCS_MIICTRL_WB; 1153e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_MIICTRL); 1154e689cf4aSJeff Kirsher 1155e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_CFG); 1156e689cf4aSJeff Kirsher val |= PCS_CFG_ENABLE; 1157e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_CFG); 1158e689cf4aSJeff Kirsher 1159e689cf4aSJeff Kirsher /* Make sure serialink loopback is off. The meaning 1160e689cf4aSJeff Kirsher * of this bit is logically inverted based upon whether 1161e689cf4aSJeff Kirsher * you are in Serialink or SERDES mode. 1162e689cf4aSJeff Kirsher */ 1163e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_SCTRL); 1164e689cf4aSJeff Kirsher if (gp->phy_type == phy_serialink) 1165e689cf4aSJeff Kirsher val &= ~PCS_SCTRL_LOOP; 1166e689cf4aSJeff Kirsher else 1167e689cf4aSJeff Kirsher val |= PCS_SCTRL_LOOP; 1168e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_SCTRL); 1169e689cf4aSJeff Kirsher } 1170e689cf4aSJeff Kirsher 1171e689cf4aSJeff Kirsher #define STOP_TRIES 32 1172e689cf4aSJeff Kirsher 1173e689cf4aSJeff Kirsher static void gem_reset(struct gem *gp) 1174e689cf4aSJeff Kirsher { 1175e689cf4aSJeff Kirsher int limit; 1176e689cf4aSJeff Kirsher u32 val; 1177e689cf4aSJeff Kirsher 1178e689cf4aSJeff Kirsher /* Make sure we won't get any more interrupts */ 1179e689cf4aSJeff Kirsher writel(0xffffffff, gp->regs + GREG_IMASK); 1180e689cf4aSJeff Kirsher 1181e689cf4aSJeff Kirsher /* Reset the chip */ 1182e689cf4aSJeff Kirsher writel(gp->swrst_base | GREG_SWRST_TXRST | GREG_SWRST_RXRST, 1183e689cf4aSJeff Kirsher gp->regs + GREG_SWRST); 1184e689cf4aSJeff Kirsher 1185e689cf4aSJeff Kirsher limit = STOP_TRIES; 1186e689cf4aSJeff Kirsher 1187e689cf4aSJeff Kirsher do { 1188e689cf4aSJeff Kirsher udelay(20); 1189e689cf4aSJeff Kirsher val = readl(gp->regs + GREG_SWRST); 1190e689cf4aSJeff Kirsher if (limit-- <= 0) 1191e689cf4aSJeff Kirsher break; 1192e689cf4aSJeff Kirsher } while (val & (GREG_SWRST_TXRST | GREG_SWRST_RXRST)); 1193e689cf4aSJeff Kirsher 1194e689cf4aSJeff Kirsher if (limit < 0) 1195e689cf4aSJeff Kirsher netdev_err(gp->dev, "SW reset is ghetto\n"); 1196e689cf4aSJeff Kirsher 1197e689cf4aSJeff Kirsher if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes) 1198e689cf4aSJeff Kirsher gem_pcs_reinit_adv(gp); 1199e689cf4aSJeff Kirsher } 1200e689cf4aSJeff Kirsher 1201e689cf4aSJeff Kirsher static void gem_start_dma(struct gem *gp) 1202e689cf4aSJeff Kirsher { 1203e689cf4aSJeff Kirsher u32 val; 1204e689cf4aSJeff Kirsher 1205e689cf4aSJeff Kirsher /* We are ready to rock, turn everything on. */ 1206e689cf4aSJeff Kirsher val = readl(gp->regs + TXDMA_CFG); 1207e689cf4aSJeff Kirsher writel(val | TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG); 1208e689cf4aSJeff Kirsher val = readl(gp->regs + RXDMA_CFG); 1209e689cf4aSJeff Kirsher writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG); 1210e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_TXCFG); 1211e689cf4aSJeff Kirsher writel(val | MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG); 1212e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_RXCFG); 1213e689cf4aSJeff Kirsher writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); 1214e689cf4aSJeff Kirsher 1215e689cf4aSJeff Kirsher (void) readl(gp->regs + MAC_RXCFG); 1216e689cf4aSJeff Kirsher udelay(100); 1217e689cf4aSJeff Kirsher 1218e689cf4aSJeff Kirsher gem_enable_ints(gp); 1219e689cf4aSJeff Kirsher 1220e689cf4aSJeff Kirsher writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK); 1221e689cf4aSJeff Kirsher } 1222e689cf4aSJeff Kirsher 1223e689cf4aSJeff Kirsher /* DMA won't be actually stopped before about 4ms tho ... 1224e689cf4aSJeff Kirsher */ 1225e689cf4aSJeff Kirsher static void gem_stop_dma(struct gem *gp) 1226e689cf4aSJeff Kirsher { 1227e689cf4aSJeff Kirsher u32 val; 1228e689cf4aSJeff Kirsher 1229e689cf4aSJeff Kirsher /* We are done rocking, turn everything off. */ 1230e689cf4aSJeff Kirsher val = readl(gp->regs + TXDMA_CFG); 1231e689cf4aSJeff Kirsher writel(val & ~TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG); 1232e689cf4aSJeff Kirsher val = readl(gp->regs + RXDMA_CFG); 1233e689cf4aSJeff Kirsher writel(val & ~RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG); 1234e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_TXCFG); 1235e689cf4aSJeff Kirsher writel(val & ~MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG); 1236e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_RXCFG); 1237e689cf4aSJeff Kirsher writel(val & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); 1238e689cf4aSJeff Kirsher 1239e689cf4aSJeff Kirsher (void) readl(gp->regs + MAC_RXCFG); 1240e689cf4aSJeff Kirsher 1241e689cf4aSJeff Kirsher /* Need to wait a bit ... done by the caller */ 1242e689cf4aSJeff Kirsher } 1243e689cf4aSJeff Kirsher 1244e689cf4aSJeff Kirsher 1245e689cf4aSJeff Kirsher // XXX dbl check what that function should do when called on PCS PHY 124692552fddSPhilippe Reynes static void gem_begin_auto_negotiation(struct gem *gp, 124792552fddSPhilippe Reynes const struct ethtool_link_ksettings *ep) 1248e689cf4aSJeff Kirsher { 1249e689cf4aSJeff Kirsher u32 advertise, features; 1250e689cf4aSJeff Kirsher int autoneg; 1251e689cf4aSJeff Kirsher int speed; 1252e689cf4aSJeff Kirsher int duplex; 125392552fddSPhilippe Reynes u32 advertising; 125492552fddSPhilippe Reynes 1255e74bad6bSPhilippe Reynes if (ep) 1256e74bad6bSPhilippe Reynes ethtool_convert_link_mode_to_legacy_u32( 1257e74bad6bSPhilippe Reynes &advertising, ep->link_modes.advertising); 1258e689cf4aSJeff Kirsher 1259e689cf4aSJeff Kirsher if (gp->phy_type != phy_mii_mdio0 && 1260e689cf4aSJeff Kirsher gp->phy_type != phy_mii_mdio1) 1261e689cf4aSJeff Kirsher goto non_mii; 1262e689cf4aSJeff Kirsher 1263e689cf4aSJeff Kirsher /* Setup advertise */ 1264e689cf4aSJeff Kirsher if (found_mii_phy(gp)) 1265e689cf4aSJeff Kirsher features = gp->phy_mii.def->features; 1266e689cf4aSJeff Kirsher else 1267e689cf4aSJeff Kirsher features = 0; 1268e689cf4aSJeff Kirsher 1269e689cf4aSJeff Kirsher advertise = features & ADVERTISE_MASK; 1270e689cf4aSJeff Kirsher if (gp->phy_mii.advertising != 0) 1271e689cf4aSJeff Kirsher advertise &= gp->phy_mii.advertising; 1272e689cf4aSJeff Kirsher 1273e689cf4aSJeff Kirsher autoneg = gp->want_autoneg; 1274e689cf4aSJeff Kirsher speed = gp->phy_mii.speed; 1275e689cf4aSJeff Kirsher duplex = gp->phy_mii.duplex; 1276e689cf4aSJeff Kirsher 1277e689cf4aSJeff Kirsher /* Setup link parameters */ 1278e689cf4aSJeff Kirsher if (!ep) 1279e689cf4aSJeff Kirsher goto start_aneg; 128092552fddSPhilippe Reynes if (ep->base.autoneg == AUTONEG_ENABLE) { 128192552fddSPhilippe Reynes advertise = advertising; 1282e689cf4aSJeff Kirsher autoneg = 1; 1283e689cf4aSJeff Kirsher } else { 1284e689cf4aSJeff Kirsher autoneg = 0; 128592552fddSPhilippe Reynes speed = ep->base.speed; 128692552fddSPhilippe Reynes duplex = ep->base.duplex; 1287e689cf4aSJeff Kirsher } 1288e689cf4aSJeff Kirsher 1289e689cf4aSJeff Kirsher start_aneg: 1290e689cf4aSJeff Kirsher /* Sanitize settings based on PHY capabilities */ 1291e689cf4aSJeff Kirsher if ((features & SUPPORTED_Autoneg) == 0) 1292e689cf4aSJeff Kirsher autoneg = 0; 1293e689cf4aSJeff Kirsher if (speed == SPEED_1000 && 1294e689cf4aSJeff Kirsher !(features & (SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full))) 1295e689cf4aSJeff Kirsher speed = SPEED_100; 1296e689cf4aSJeff Kirsher if (speed == SPEED_100 && 1297e689cf4aSJeff Kirsher !(features & (SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full))) 1298e689cf4aSJeff Kirsher speed = SPEED_10; 1299e689cf4aSJeff Kirsher if (duplex == DUPLEX_FULL && 1300e689cf4aSJeff Kirsher !(features & (SUPPORTED_1000baseT_Full | 1301e689cf4aSJeff Kirsher SUPPORTED_100baseT_Full | 1302e689cf4aSJeff Kirsher SUPPORTED_10baseT_Full))) 1303e689cf4aSJeff Kirsher duplex = DUPLEX_HALF; 1304e689cf4aSJeff Kirsher if (speed == 0) 1305e689cf4aSJeff Kirsher speed = SPEED_10; 1306e689cf4aSJeff Kirsher 1307e689cf4aSJeff Kirsher /* If we are asleep, we don't try to actually setup the PHY, we 1308e689cf4aSJeff Kirsher * just store the settings 1309e689cf4aSJeff Kirsher */ 1310e689cf4aSJeff Kirsher if (!netif_device_present(gp->dev)) { 1311e689cf4aSJeff Kirsher gp->phy_mii.autoneg = gp->want_autoneg = autoneg; 1312e689cf4aSJeff Kirsher gp->phy_mii.speed = speed; 1313e689cf4aSJeff Kirsher gp->phy_mii.duplex = duplex; 1314e689cf4aSJeff Kirsher return; 1315e689cf4aSJeff Kirsher } 1316e689cf4aSJeff Kirsher 1317e689cf4aSJeff Kirsher /* Configure PHY & start aneg */ 1318e689cf4aSJeff Kirsher gp->want_autoneg = autoneg; 1319e689cf4aSJeff Kirsher if (autoneg) { 1320e689cf4aSJeff Kirsher if (found_mii_phy(gp)) 1321e689cf4aSJeff Kirsher gp->phy_mii.def->ops->setup_aneg(&gp->phy_mii, advertise); 1322e689cf4aSJeff Kirsher gp->lstate = link_aneg; 1323e689cf4aSJeff Kirsher } else { 1324e689cf4aSJeff Kirsher if (found_mii_phy(gp)) 1325e689cf4aSJeff Kirsher gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, speed, duplex); 1326e689cf4aSJeff Kirsher gp->lstate = link_force_ok; 1327e689cf4aSJeff Kirsher } 1328e689cf4aSJeff Kirsher 1329e689cf4aSJeff Kirsher non_mii: 1330e689cf4aSJeff Kirsher gp->timer_ticks = 0; 1331e689cf4aSJeff Kirsher mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10)); 1332e689cf4aSJeff Kirsher } 1333e689cf4aSJeff Kirsher 1334e689cf4aSJeff Kirsher /* A link-up condition has occurred, initialize and enable the 1335e689cf4aSJeff Kirsher * rest of the chip. 1336e689cf4aSJeff Kirsher */ 1337e689cf4aSJeff Kirsher static int gem_set_link_modes(struct gem *gp) 1338e689cf4aSJeff Kirsher { 1339e689cf4aSJeff Kirsher struct netdev_queue *txq = netdev_get_tx_queue(gp->dev, 0); 1340e689cf4aSJeff Kirsher int full_duplex, speed, pause; 1341e689cf4aSJeff Kirsher u32 val; 1342e689cf4aSJeff Kirsher 1343e689cf4aSJeff Kirsher full_duplex = 0; 1344e689cf4aSJeff Kirsher speed = SPEED_10; 1345e689cf4aSJeff Kirsher pause = 0; 1346e689cf4aSJeff Kirsher 1347e689cf4aSJeff Kirsher if (found_mii_phy(gp)) { 1348e689cf4aSJeff Kirsher if (gp->phy_mii.def->ops->read_link(&gp->phy_mii)) 1349e689cf4aSJeff Kirsher return 1; 1350e689cf4aSJeff Kirsher full_duplex = (gp->phy_mii.duplex == DUPLEX_FULL); 1351e689cf4aSJeff Kirsher speed = gp->phy_mii.speed; 1352e689cf4aSJeff Kirsher pause = gp->phy_mii.pause; 1353e689cf4aSJeff Kirsher } else if (gp->phy_type == phy_serialink || 1354e689cf4aSJeff Kirsher gp->phy_type == phy_serdes) { 1355e689cf4aSJeff Kirsher u32 pcs_lpa = readl(gp->regs + PCS_MIILP); 1356e689cf4aSJeff Kirsher 1357e689cf4aSJeff Kirsher if ((pcs_lpa & PCS_MIIADV_FD) || gp->phy_type == phy_serdes) 1358e689cf4aSJeff Kirsher full_duplex = 1; 1359e689cf4aSJeff Kirsher speed = SPEED_1000; 1360e689cf4aSJeff Kirsher } 1361e689cf4aSJeff Kirsher 1362e689cf4aSJeff Kirsher netif_info(gp, link, gp->dev, "Link is up at %d Mbps, %s-duplex\n", 1363e689cf4aSJeff Kirsher speed, (full_duplex ? "full" : "half")); 1364e689cf4aSJeff Kirsher 1365e689cf4aSJeff Kirsher 1366e689cf4aSJeff Kirsher /* We take the tx queue lock to avoid collisions between 1367e689cf4aSJeff Kirsher * this code, the tx path and the NAPI-driven error path 1368e689cf4aSJeff Kirsher */ 1369e689cf4aSJeff Kirsher __netif_tx_lock(txq, smp_processor_id()); 1370e689cf4aSJeff Kirsher 1371e689cf4aSJeff Kirsher val = (MAC_TXCFG_EIPG0 | MAC_TXCFG_NGU); 1372e689cf4aSJeff Kirsher if (full_duplex) { 1373e689cf4aSJeff Kirsher val |= (MAC_TXCFG_ICS | MAC_TXCFG_ICOLL); 1374e689cf4aSJeff Kirsher } else { 1375e689cf4aSJeff Kirsher /* MAC_TXCFG_NBO must be zero. */ 1376e689cf4aSJeff Kirsher } 1377e689cf4aSJeff Kirsher writel(val, gp->regs + MAC_TXCFG); 1378e689cf4aSJeff Kirsher 1379e689cf4aSJeff Kirsher val = (MAC_XIFCFG_OE | MAC_XIFCFG_LLED); 1380e689cf4aSJeff Kirsher if (!full_duplex && 1381e689cf4aSJeff Kirsher (gp->phy_type == phy_mii_mdio0 || 1382e689cf4aSJeff Kirsher gp->phy_type == phy_mii_mdio1)) { 1383e689cf4aSJeff Kirsher val |= MAC_XIFCFG_DISE; 1384e689cf4aSJeff Kirsher } else if (full_duplex) { 1385e689cf4aSJeff Kirsher val |= MAC_XIFCFG_FLED; 1386e689cf4aSJeff Kirsher } 1387e689cf4aSJeff Kirsher 1388e689cf4aSJeff Kirsher if (speed == SPEED_1000) 1389e689cf4aSJeff Kirsher val |= (MAC_XIFCFG_GMII); 1390e689cf4aSJeff Kirsher 1391e689cf4aSJeff Kirsher writel(val, gp->regs + MAC_XIFCFG); 1392e689cf4aSJeff Kirsher 1393e689cf4aSJeff Kirsher /* If gigabit and half-duplex, enable carrier extension 1394e689cf4aSJeff Kirsher * mode. Else, disable it. 1395e689cf4aSJeff Kirsher */ 1396e689cf4aSJeff Kirsher if (speed == SPEED_1000 && !full_duplex) { 1397e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_TXCFG); 1398e689cf4aSJeff Kirsher writel(val | MAC_TXCFG_TCE, gp->regs + MAC_TXCFG); 1399e689cf4aSJeff Kirsher 1400e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_RXCFG); 1401e689cf4aSJeff Kirsher writel(val | MAC_RXCFG_RCE, gp->regs + MAC_RXCFG); 1402e689cf4aSJeff Kirsher } else { 1403e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_TXCFG); 1404e689cf4aSJeff Kirsher writel(val & ~MAC_TXCFG_TCE, gp->regs + MAC_TXCFG); 1405e689cf4aSJeff Kirsher 1406e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_RXCFG); 1407e689cf4aSJeff Kirsher writel(val & ~MAC_RXCFG_RCE, gp->regs + MAC_RXCFG); 1408e689cf4aSJeff Kirsher } 1409e689cf4aSJeff Kirsher 1410e689cf4aSJeff Kirsher if (gp->phy_type == phy_serialink || 1411e689cf4aSJeff Kirsher gp->phy_type == phy_serdes) { 1412e689cf4aSJeff Kirsher u32 pcs_lpa = readl(gp->regs + PCS_MIILP); 1413e689cf4aSJeff Kirsher 1414e689cf4aSJeff Kirsher if (pcs_lpa & (PCS_MIIADV_SP | PCS_MIIADV_AP)) 1415e689cf4aSJeff Kirsher pause = 1; 1416e689cf4aSJeff Kirsher } 1417e689cf4aSJeff Kirsher 1418e689cf4aSJeff Kirsher if (!full_duplex) 1419e689cf4aSJeff Kirsher writel(512, gp->regs + MAC_STIME); 1420e689cf4aSJeff Kirsher else 1421e689cf4aSJeff Kirsher writel(64, gp->regs + MAC_STIME); 1422e689cf4aSJeff Kirsher val = readl(gp->regs + MAC_MCCFG); 1423e689cf4aSJeff Kirsher if (pause) 1424e689cf4aSJeff Kirsher val |= (MAC_MCCFG_SPE | MAC_MCCFG_RPE); 1425e689cf4aSJeff Kirsher else 1426e689cf4aSJeff Kirsher val &= ~(MAC_MCCFG_SPE | MAC_MCCFG_RPE); 1427e689cf4aSJeff Kirsher writel(val, gp->regs + MAC_MCCFG); 1428e689cf4aSJeff Kirsher 1429e689cf4aSJeff Kirsher gem_start_dma(gp); 1430e689cf4aSJeff Kirsher 1431e689cf4aSJeff Kirsher __netif_tx_unlock(txq); 1432e689cf4aSJeff Kirsher 1433e689cf4aSJeff Kirsher if (netif_msg_link(gp)) { 1434e689cf4aSJeff Kirsher if (pause) { 1435e689cf4aSJeff Kirsher netdev_info(gp->dev, 1436e689cf4aSJeff Kirsher "Pause is enabled (rxfifo: %d off: %d on: %d)\n", 1437e689cf4aSJeff Kirsher gp->rx_fifo_sz, 1438e689cf4aSJeff Kirsher gp->rx_pause_off, 1439e689cf4aSJeff Kirsher gp->rx_pause_on); 1440e689cf4aSJeff Kirsher } else { 1441e689cf4aSJeff Kirsher netdev_info(gp->dev, "Pause is disabled\n"); 1442e689cf4aSJeff Kirsher } 1443e689cf4aSJeff Kirsher } 1444e689cf4aSJeff Kirsher 1445e689cf4aSJeff Kirsher return 0; 1446e689cf4aSJeff Kirsher } 1447e689cf4aSJeff Kirsher 1448e689cf4aSJeff Kirsher static int gem_mdio_link_not_up(struct gem *gp) 1449e689cf4aSJeff Kirsher { 1450e689cf4aSJeff Kirsher switch (gp->lstate) { 1451e689cf4aSJeff Kirsher case link_force_ret: 1452e689cf4aSJeff Kirsher netif_info(gp, link, gp->dev, 1453e689cf4aSJeff Kirsher "Autoneg failed again, keeping forced mode\n"); 1454e689cf4aSJeff Kirsher gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, 1455e689cf4aSJeff Kirsher gp->last_forced_speed, DUPLEX_HALF); 1456e689cf4aSJeff Kirsher gp->timer_ticks = 5; 1457e689cf4aSJeff Kirsher gp->lstate = link_force_ok; 1458e689cf4aSJeff Kirsher return 0; 1459e689cf4aSJeff Kirsher case link_aneg: 1460e689cf4aSJeff Kirsher /* We try forced modes after a failed aneg only on PHYs that don't 1461e689cf4aSJeff Kirsher * have "magic_aneg" bit set, which means they internally do the 1462e689cf4aSJeff Kirsher * while forced-mode thingy. On these, we just restart aneg 1463e689cf4aSJeff Kirsher */ 1464e689cf4aSJeff Kirsher if (gp->phy_mii.def->magic_aneg) 1465e689cf4aSJeff Kirsher return 1; 1466e689cf4aSJeff Kirsher netif_info(gp, link, gp->dev, "switching to forced 100bt\n"); 1467e689cf4aSJeff Kirsher /* Try forced modes. */ 1468e689cf4aSJeff Kirsher gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, SPEED_100, 1469e689cf4aSJeff Kirsher DUPLEX_HALF); 1470e689cf4aSJeff Kirsher gp->timer_ticks = 5; 1471e689cf4aSJeff Kirsher gp->lstate = link_force_try; 1472e689cf4aSJeff Kirsher return 0; 1473e689cf4aSJeff Kirsher case link_force_try: 1474e689cf4aSJeff Kirsher /* Downgrade from 100 to 10 Mbps if necessary. 1475e689cf4aSJeff Kirsher * If already at 10Mbps, warn user about the 1476e689cf4aSJeff Kirsher * situation every 10 ticks. 1477e689cf4aSJeff Kirsher */ 1478e689cf4aSJeff Kirsher if (gp->phy_mii.speed == SPEED_100) { 1479e689cf4aSJeff Kirsher gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, SPEED_10, 1480e689cf4aSJeff Kirsher DUPLEX_HALF); 1481e689cf4aSJeff Kirsher gp->timer_ticks = 5; 1482e689cf4aSJeff Kirsher netif_info(gp, link, gp->dev, 1483e689cf4aSJeff Kirsher "switching to forced 10bt\n"); 1484e689cf4aSJeff Kirsher return 0; 1485e689cf4aSJeff Kirsher } else 1486e689cf4aSJeff Kirsher return 1; 1487e689cf4aSJeff Kirsher default: 1488e689cf4aSJeff Kirsher return 0; 1489e689cf4aSJeff Kirsher } 1490e689cf4aSJeff Kirsher } 1491e689cf4aSJeff Kirsher 14920822c5d9SKees Cook static void gem_link_timer(struct timer_list *t) 1493e689cf4aSJeff Kirsher { 14940822c5d9SKees Cook struct gem *gp = from_timer(gp, t, link_timer); 1495e689cf4aSJeff Kirsher struct net_device *dev = gp->dev; 1496e689cf4aSJeff Kirsher int restart_aneg = 0; 1497e689cf4aSJeff Kirsher 1498e689cf4aSJeff Kirsher /* There's no point doing anything if we're going to be reset */ 1499e689cf4aSJeff Kirsher if (gp->reset_task_pending) 1500e689cf4aSJeff Kirsher return; 1501e689cf4aSJeff Kirsher 1502e689cf4aSJeff Kirsher if (gp->phy_type == phy_serialink || 1503e689cf4aSJeff Kirsher gp->phy_type == phy_serdes) { 1504e689cf4aSJeff Kirsher u32 val = readl(gp->regs + PCS_MIISTAT); 1505e689cf4aSJeff Kirsher 1506e689cf4aSJeff Kirsher if (!(val & PCS_MIISTAT_LS)) 1507e689cf4aSJeff Kirsher val = readl(gp->regs + PCS_MIISTAT); 1508e689cf4aSJeff Kirsher 1509e689cf4aSJeff Kirsher if ((val & PCS_MIISTAT_LS) != 0) { 1510e689cf4aSJeff Kirsher if (gp->lstate == link_up) 1511e689cf4aSJeff Kirsher goto restart; 1512e689cf4aSJeff Kirsher 1513e689cf4aSJeff Kirsher gp->lstate = link_up; 1514e689cf4aSJeff Kirsher netif_carrier_on(dev); 1515e689cf4aSJeff Kirsher (void)gem_set_link_modes(gp); 1516e689cf4aSJeff Kirsher } 1517e689cf4aSJeff Kirsher goto restart; 1518e689cf4aSJeff Kirsher } 1519e689cf4aSJeff Kirsher if (found_mii_phy(gp) && gp->phy_mii.def->ops->poll_link(&gp->phy_mii)) { 1520e689cf4aSJeff Kirsher /* Ok, here we got a link. If we had it due to a forced 1521e689cf4aSJeff Kirsher * fallback, and we were configured for autoneg, we do 1522e689cf4aSJeff Kirsher * retry a short autoneg pass. If you know your hub is 1523e689cf4aSJeff Kirsher * broken, use ethtool ;) 1524e689cf4aSJeff Kirsher */ 1525e689cf4aSJeff Kirsher if (gp->lstate == link_force_try && gp->want_autoneg) { 1526e689cf4aSJeff Kirsher gp->lstate = link_force_ret; 1527e689cf4aSJeff Kirsher gp->last_forced_speed = gp->phy_mii.speed; 1528e689cf4aSJeff Kirsher gp->timer_ticks = 5; 1529e689cf4aSJeff Kirsher if (netif_msg_link(gp)) 1530e689cf4aSJeff Kirsher netdev_info(dev, 1531e689cf4aSJeff Kirsher "Got link after fallback, retrying autoneg once...\n"); 1532e689cf4aSJeff Kirsher gp->phy_mii.def->ops->setup_aneg(&gp->phy_mii, gp->phy_mii.advertising); 1533e689cf4aSJeff Kirsher } else if (gp->lstate != link_up) { 1534e689cf4aSJeff Kirsher gp->lstate = link_up; 1535e689cf4aSJeff Kirsher netif_carrier_on(dev); 1536e689cf4aSJeff Kirsher if (gem_set_link_modes(gp)) 1537e689cf4aSJeff Kirsher restart_aneg = 1; 1538e689cf4aSJeff Kirsher } 1539e689cf4aSJeff Kirsher } else { 1540e689cf4aSJeff Kirsher /* If the link was previously up, we restart the 1541e689cf4aSJeff Kirsher * whole process 1542e689cf4aSJeff Kirsher */ 1543e689cf4aSJeff Kirsher if (gp->lstate == link_up) { 1544e689cf4aSJeff Kirsher gp->lstate = link_down; 1545e689cf4aSJeff Kirsher netif_info(gp, link, dev, "Link down\n"); 1546e689cf4aSJeff Kirsher netif_carrier_off(dev); 1547e689cf4aSJeff Kirsher gem_schedule_reset(gp); 1548e689cf4aSJeff Kirsher /* The reset task will restart the timer */ 1549e689cf4aSJeff Kirsher return; 1550e689cf4aSJeff Kirsher } else if (++gp->timer_ticks > 10) { 1551e689cf4aSJeff Kirsher if (found_mii_phy(gp)) 1552e689cf4aSJeff Kirsher restart_aneg = gem_mdio_link_not_up(gp); 1553e689cf4aSJeff Kirsher else 1554e689cf4aSJeff Kirsher restart_aneg = 1; 1555e689cf4aSJeff Kirsher } 1556e689cf4aSJeff Kirsher } 1557e689cf4aSJeff Kirsher if (restart_aneg) { 1558e689cf4aSJeff Kirsher gem_begin_auto_negotiation(gp, NULL); 1559e689cf4aSJeff Kirsher return; 1560e689cf4aSJeff Kirsher } 1561e689cf4aSJeff Kirsher restart: 1562e689cf4aSJeff Kirsher mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10)); 1563e689cf4aSJeff Kirsher } 1564e689cf4aSJeff Kirsher 1565e689cf4aSJeff Kirsher static void gem_clean_rings(struct gem *gp) 1566e689cf4aSJeff Kirsher { 1567e689cf4aSJeff Kirsher struct gem_init_block *gb = gp->init_block; 1568e689cf4aSJeff Kirsher struct sk_buff *skb; 1569e689cf4aSJeff Kirsher int i; 1570e689cf4aSJeff Kirsher dma_addr_t dma_addr; 1571e689cf4aSJeff Kirsher 1572e689cf4aSJeff Kirsher for (i = 0; i < RX_RING_SIZE; i++) { 1573e689cf4aSJeff Kirsher struct gem_rxd *rxd; 1574e689cf4aSJeff Kirsher 1575e689cf4aSJeff Kirsher rxd = &gb->rxd[i]; 1576e689cf4aSJeff Kirsher if (gp->rx_skbs[i] != NULL) { 1577e689cf4aSJeff Kirsher skb = gp->rx_skbs[i]; 1578e689cf4aSJeff Kirsher dma_addr = le64_to_cpu(rxd->buffer); 15798d4f62caSChristophe JAILLET dma_unmap_page(&gp->pdev->dev, dma_addr, 1580e689cf4aSJeff Kirsher RX_BUF_ALLOC_SIZE(gp), 15818d4f62caSChristophe JAILLET DMA_FROM_DEVICE); 1582e689cf4aSJeff Kirsher dev_kfree_skb_any(skb); 1583e689cf4aSJeff Kirsher gp->rx_skbs[i] = NULL; 1584e689cf4aSJeff Kirsher } 1585e689cf4aSJeff Kirsher rxd->status_word = 0; 1586b4468cc6SAlexander Duyck dma_wmb(); 1587e689cf4aSJeff Kirsher rxd->buffer = 0; 1588e689cf4aSJeff Kirsher } 1589e689cf4aSJeff Kirsher 1590e689cf4aSJeff Kirsher for (i = 0; i < TX_RING_SIZE; i++) { 1591e689cf4aSJeff Kirsher if (gp->tx_skbs[i] != NULL) { 1592e689cf4aSJeff Kirsher struct gem_txd *txd; 1593e689cf4aSJeff Kirsher int frag; 1594e689cf4aSJeff Kirsher 1595e689cf4aSJeff Kirsher skb = gp->tx_skbs[i]; 1596e689cf4aSJeff Kirsher gp->tx_skbs[i] = NULL; 1597e689cf4aSJeff Kirsher 1598e689cf4aSJeff Kirsher for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { 1599e689cf4aSJeff Kirsher int ent = i & (TX_RING_SIZE - 1); 1600e689cf4aSJeff Kirsher 1601e689cf4aSJeff Kirsher txd = &gb->txd[ent]; 1602e689cf4aSJeff Kirsher dma_addr = le64_to_cpu(txd->buffer); 16038d4f62caSChristophe JAILLET dma_unmap_page(&gp->pdev->dev, dma_addr, 1604e689cf4aSJeff Kirsher le64_to_cpu(txd->control_word) & 16058d4f62caSChristophe JAILLET TXDCTRL_BUFSZ, DMA_TO_DEVICE); 1606e689cf4aSJeff Kirsher 1607e689cf4aSJeff Kirsher if (frag != skb_shinfo(skb)->nr_frags) 1608e689cf4aSJeff Kirsher i++; 1609e689cf4aSJeff Kirsher } 1610e689cf4aSJeff Kirsher dev_kfree_skb_any(skb); 1611e689cf4aSJeff Kirsher } 1612e689cf4aSJeff Kirsher } 1613e689cf4aSJeff Kirsher } 1614e689cf4aSJeff Kirsher 1615e689cf4aSJeff Kirsher static void gem_init_rings(struct gem *gp) 1616e689cf4aSJeff Kirsher { 1617e689cf4aSJeff Kirsher struct gem_init_block *gb = gp->init_block; 1618e689cf4aSJeff Kirsher struct net_device *dev = gp->dev; 1619e689cf4aSJeff Kirsher int i; 1620e689cf4aSJeff Kirsher dma_addr_t dma_addr; 1621e689cf4aSJeff Kirsher 1622e689cf4aSJeff Kirsher gp->rx_new = gp->rx_old = gp->tx_new = gp->tx_old = 0; 1623e689cf4aSJeff Kirsher 1624e689cf4aSJeff Kirsher gem_clean_rings(gp); 1625e689cf4aSJeff Kirsher 1626e689cf4aSJeff Kirsher gp->rx_buf_sz = max(dev->mtu + ETH_HLEN + VLAN_HLEN, 1627e689cf4aSJeff Kirsher (unsigned)VLAN_ETH_FRAME_LEN); 1628e689cf4aSJeff Kirsher 1629e689cf4aSJeff Kirsher for (i = 0; i < RX_RING_SIZE; i++) { 1630e689cf4aSJeff Kirsher struct sk_buff *skb; 1631e689cf4aSJeff Kirsher struct gem_rxd *rxd = &gb->rxd[i]; 1632e689cf4aSJeff Kirsher 1633e689cf4aSJeff Kirsher skb = gem_alloc_skb(dev, RX_BUF_ALLOC_SIZE(gp), GFP_KERNEL); 1634e689cf4aSJeff Kirsher if (!skb) { 1635e689cf4aSJeff Kirsher rxd->buffer = 0; 1636e689cf4aSJeff Kirsher rxd->status_word = 0; 1637e689cf4aSJeff Kirsher continue; 1638e689cf4aSJeff Kirsher } 1639e689cf4aSJeff Kirsher 1640e689cf4aSJeff Kirsher gp->rx_skbs[i] = skb; 1641e689cf4aSJeff Kirsher skb_put(skb, (gp->rx_buf_sz + RX_OFFSET)); 16428d4f62caSChristophe JAILLET dma_addr = dma_map_page(&gp->pdev->dev, 1643e689cf4aSJeff Kirsher virt_to_page(skb->data), 1644e689cf4aSJeff Kirsher offset_in_page(skb->data), 1645e689cf4aSJeff Kirsher RX_BUF_ALLOC_SIZE(gp), 16468d4f62caSChristophe JAILLET DMA_FROM_DEVICE); 1647e689cf4aSJeff Kirsher rxd->buffer = cpu_to_le64(dma_addr); 1648b4468cc6SAlexander Duyck dma_wmb(); 1649e689cf4aSJeff Kirsher rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp)); 1650e689cf4aSJeff Kirsher skb_reserve(skb, RX_OFFSET); 1651e689cf4aSJeff Kirsher } 1652e689cf4aSJeff Kirsher 1653e689cf4aSJeff Kirsher for (i = 0; i < TX_RING_SIZE; i++) { 1654e689cf4aSJeff Kirsher struct gem_txd *txd = &gb->txd[i]; 1655e689cf4aSJeff Kirsher 1656e689cf4aSJeff Kirsher txd->control_word = 0; 1657b4468cc6SAlexander Duyck dma_wmb(); 1658e689cf4aSJeff Kirsher txd->buffer = 0; 1659e689cf4aSJeff Kirsher } 1660e689cf4aSJeff Kirsher wmb(); 1661e689cf4aSJeff Kirsher } 1662e689cf4aSJeff Kirsher 1663e689cf4aSJeff Kirsher /* Init PHY interface and start link poll state machine */ 1664e689cf4aSJeff Kirsher static void gem_init_phy(struct gem *gp) 1665e689cf4aSJeff Kirsher { 1666e689cf4aSJeff Kirsher u32 mifcfg; 1667e689cf4aSJeff Kirsher 1668e689cf4aSJeff Kirsher /* Revert MIF CFG setting done on stop_phy */ 1669e689cf4aSJeff Kirsher mifcfg = readl(gp->regs + MIF_CFG); 1670e689cf4aSJeff Kirsher mifcfg &= ~MIF_CFG_BBMODE; 1671e689cf4aSJeff Kirsher writel(mifcfg, gp->regs + MIF_CFG); 1672e689cf4aSJeff Kirsher 1673e689cf4aSJeff Kirsher if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) { 1674e689cf4aSJeff Kirsher int i; 1675e689cf4aSJeff Kirsher 16761816bf1fSBhaskar Chowdhury /* Those delays sucks, the HW seems to love them though, I'll 16771816bf1fSBhaskar Chowdhury * seriously consider breaking some locks here to be able 1678e689cf4aSJeff Kirsher * to schedule instead 1679e689cf4aSJeff Kirsher */ 1680e689cf4aSJeff Kirsher for (i = 0; i < 3; i++) { 1681e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC 1682e689cf4aSJeff Kirsher pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0); 1683e689cf4aSJeff Kirsher msleep(20); 1684e689cf4aSJeff Kirsher #endif 1685e689cf4aSJeff Kirsher /* Some PHYs used by apple have problem getting back to us, 1686e689cf4aSJeff Kirsher * we do an additional reset here 1687e689cf4aSJeff Kirsher */ 1688abc4da45SDavid S. Miller sungem_phy_write(gp, MII_BMCR, BMCR_RESET); 1689e689cf4aSJeff Kirsher msleep(20); 1690abc4da45SDavid S. Miller if (sungem_phy_read(gp, MII_BMCR) != 0xffff) 1691e689cf4aSJeff Kirsher break; 1692e689cf4aSJeff Kirsher if (i == 2) 1693e689cf4aSJeff Kirsher netdev_warn(gp->dev, "GMAC PHY not responding !\n"); 1694e689cf4aSJeff Kirsher } 1695e689cf4aSJeff Kirsher } 1696e689cf4aSJeff Kirsher 1697e689cf4aSJeff Kirsher if (gp->pdev->vendor == PCI_VENDOR_ID_SUN && 1698e689cf4aSJeff Kirsher gp->pdev->device == PCI_DEVICE_ID_SUN_GEM) { 1699e689cf4aSJeff Kirsher u32 val; 1700e689cf4aSJeff Kirsher 1701e689cf4aSJeff Kirsher /* Init datapath mode register. */ 1702e689cf4aSJeff Kirsher if (gp->phy_type == phy_mii_mdio0 || 1703e689cf4aSJeff Kirsher gp->phy_type == phy_mii_mdio1) { 1704e689cf4aSJeff Kirsher val = PCS_DMODE_MGM; 1705e689cf4aSJeff Kirsher } else if (gp->phy_type == phy_serialink) { 1706e689cf4aSJeff Kirsher val = PCS_DMODE_SM | PCS_DMODE_GMOE; 1707e689cf4aSJeff Kirsher } else { 1708e689cf4aSJeff Kirsher val = PCS_DMODE_ESM; 1709e689cf4aSJeff Kirsher } 1710e689cf4aSJeff Kirsher 1711e689cf4aSJeff Kirsher writel(val, gp->regs + PCS_DMODE); 1712e689cf4aSJeff Kirsher } 1713e689cf4aSJeff Kirsher 1714e689cf4aSJeff Kirsher if (gp->phy_type == phy_mii_mdio0 || 1715e689cf4aSJeff Kirsher gp->phy_type == phy_mii_mdio1) { 1716e689cf4aSJeff Kirsher /* Reset and detect MII PHY */ 171719e2f6feSDavid S. Miller sungem_phy_probe(&gp->phy_mii, gp->mii_phy_addr); 1718e689cf4aSJeff Kirsher 1719e689cf4aSJeff Kirsher /* Init PHY */ 1720e689cf4aSJeff Kirsher if (gp->phy_mii.def && gp->phy_mii.def->ops->init) 1721e689cf4aSJeff Kirsher gp->phy_mii.def->ops->init(&gp->phy_mii); 1722e689cf4aSJeff Kirsher } else { 1723e689cf4aSJeff Kirsher gem_pcs_reset(gp); 1724e689cf4aSJeff Kirsher gem_pcs_reinit_adv(gp); 1725e689cf4aSJeff Kirsher } 1726e689cf4aSJeff Kirsher 1727e689cf4aSJeff Kirsher /* Default aneg parameters */ 1728e689cf4aSJeff Kirsher gp->timer_ticks = 0; 1729e689cf4aSJeff Kirsher gp->lstate = link_down; 1730e689cf4aSJeff Kirsher netif_carrier_off(gp->dev); 1731e689cf4aSJeff Kirsher 1732e689cf4aSJeff Kirsher /* Print things out */ 1733e689cf4aSJeff Kirsher if (gp->phy_type == phy_mii_mdio0 || 1734e689cf4aSJeff Kirsher gp->phy_type == phy_mii_mdio1) 1735e689cf4aSJeff Kirsher netdev_info(gp->dev, "Found %s PHY\n", 1736e689cf4aSJeff Kirsher gp->phy_mii.def ? gp->phy_mii.def->name : "no"); 1737e689cf4aSJeff Kirsher 1738e689cf4aSJeff Kirsher gem_begin_auto_negotiation(gp, NULL); 1739e689cf4aSJeff Kirsher } 1740e689cf4aSJeff Kirsher 1741e689cf4aSJeff Kirsher static void gem_init_dma(struct gem *gp) 1742e689cf4aSJeff Kirsher { 1743e689cf4aSJeff Kirsher u64 desc_dma = (u64) gp->gblock_dvma; 1744e689cf4aSJeff Kirsher u32 val; 1745e689cf4aSJeff Kirsher 1746e689cf4aSJeff Kirsher val = (TXDMA_CFG_BASE | (0x7ff << 10) | TXDMA_CFG_PMODE); 1747e689cf4aSJeff Kirsher writel(val, gp->regs + TXDMA_CFG); 1748e689cf4aSJeff Kirsher 1749e689cf4aSJeff Kirsher writel(desc_dma >> 32, gp->regs + TXDMA_DBHI); 1750e689cf4aSJeff Kirsher writel(desc_dma & 0xffffffff, gp->regs + TXDMA_DBLOW); 1751e689cf4aSJeff Kirsher desc_dma += (INIT_BLOCK_TX_RING_SIZE * sizeof(struct gem_txd)); 1752e689cf4aSJeff Kirsher 1753e689cf4aSJeff Kirsher writel(0, gp->regs + TXDMA_KICK); 1754e689cf4aSJeff Kirsher 1755e689cf4aSJeff Kirsher val = (RXDMA_CFG_BASE | (RX_OFFSET << 10) | 175612b03558SEric Dumazet (ETH_HLEN << 13) | RXDMA_CFG_FTHRESH_128); 1757e689cf4aSJeff Kirsher writel(val, gp->regs + RXDMA_CFG); 1758e689cf4aSJeff Kirsher 1759e689cf4aSJeff Kirsher writel(desc_dma >> 32, gp->regs + RXDMA_DBHI); 1760e689cf4aSJeff Kirsher writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW); 1761e689cf4aSJeff Kirsher 1762e689cf4aSJeff Kirsher writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK); 1763e689cf4aSJeff Kirsher 1764e689cf4aSJeff Kirsher val = (((gp->rx_pause_off / 64) << 0) & RXDMA_PTHRESH_OFF); 1765e689cf4aSJeff Kirsher val |= (((gp->rx_pause_on / 64) << 12) & RXDMA_PTHRESH_ON); 1766e689cf4aSJeff Kirsher writel(val, gp->regs + RXDMA_PTHRESH); 1767e689cf4aSJeff Kirsher 1768e689cf4aSJeff Kirsher if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN) 1769e689cf4aSJeff Kirsher writel(((5 & RXDMA_BLANK_IPKTS) | 1770e689cf4aSJeff Kirsher ((8 << 12) & RXDMA_BLANK_ITIME)), 1771e689cf4aSJeff Kirsher gp->regs + RXDMA_BLANK); 1772e689cf4aSJeff Kirsher else 1773e689cf4aSJeff Kirsher writel(((5 & RXDMA_BLANK_IPKTS) | 1774e689cf4aSJeff Kirsher ((4 << 12) & RXDMA_BLANK_ITIME)), 1775e689cf4aSJeff Kirsher gp->regs + RXDMA_BLANK); 1776e689cf4aSJeff Kirsher } 1777e689cf4aSJeff Kirsher 1778e689cf4aSJeff Kirsher static u32 gem_setup_multicast(struct gem *gp) 1779e689cf4aSJeff Kirsher { 1780e689cf4aSJeff Kirsher u32 rxcfg = 0; 1781e689cf4aSJeff Kirsher int i; 1782e689cf4aSJeff Kirsher 1783e689cf4aSJeff Kirsher if ((gp->dev->flags & IFF_ALLMULTI) || 1784e689cf4aSJeff Kirsher (netdev_mc_count(gp->dev) > 256)) { 1785e689cf4aSJeff Kirsher for (i=0; i<16; i++) 1786e689cf4aSJeff Kirsher writel(0xffff, gp->regs + MAC_HASH0 + (i << 2)); 1787e689cf4aSJeff Kirsher rxcfg |= MAC_RXCFG_HFE; 1788e689cf4aSJeff Kirsher } else if (gp->dev->flags & IFF_PROMISC) { 1789e689cf4aSJeff Kirsher rxcfg |= MAC_RXCFG_PROM; 1790e689cf4aSJeff Kirsher } else { 1791e689cf4aSJeff Kirsher u16 hash_table[16]; 1792e689cf4aSJeff Kirsher u32 crc; 1793e689cf4aSJeff Kirsher struct netdev_hw_addr *ha; 1794e689cf4aSJeff Kirsher int i; 1795e689cf4aSJeff Kirsher 1796e689cf4aSJeff Kirsher memset(hash_table, 0, sizeof(hash_table)); 1797e689cf4aSJeff Kirsher netdev_for_each_mc_addr(ha, gp->dev) { 1798e689cf4aSJeff Kirsher crc = ether_crc_le(6, ha->addr); 1799e689cf4aSJeff Kirsher crc >>= 24; 1800e689cf4aSJeff Kirsher hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf)); 1801e689cf4aSJeff Kirsher } 1802e689cf4aSJeff Kirsher for (i=0; i<16; i++) 1803e689cf4aSJeff Kirsher writel(hash_table[i], gp->regs + MAC_HASH0 + (i << 2)); 1804e689cf4aSJeff Kirsher rxcfg |= MAC_RXCFG_HFE; 1805e689cf4aSJeff Kirsher } 1806e689cf4aSJeff Kirsher 1807e689cf4aSJeff Kirsher return rxcfg; 1808e689cf4aSJeff Kirsher } 1809e689cf4aSJeff Kirsher 1810e689cf4aSJeff Kirsher static void gem_init_mac(struct gem *gp) 1811e689cf4aSJeff Kirsher { 1812a7639279SJakub Kicinski const unsigned char *e = &gp->dev->dev_addr[0]; 1813e689cf4aSJeff Kirsher 1814e689cf4aSJeff Kirsher writel(0x1bf0, gp->regs + MAC_SNDPAUSE); 1815e689cf4aSJeff Kirsher 1816e689cf4aSJeff Kirsher writel(0x00, gp->regs + MAC_IPG0); 1817e689cf4aSJeff Kirsher writel(0x08, gp->regs + MAC_IPG1); 1818e689cf4aSJeff Kirsher writel(0x04, gp->regs + MAC_IPG2); 1819e689cf4aSJeff Kirsher writel(0x40, gp->regs + MAC_STIME); 1820e689cf4aSJeff Kirsher writel(0x40, gp->regs + MAC_MINFSZ); 1821e689cf4aSJeff Kirsher 1822e689cf4aSJeff Kirsher /* Ethernet payload + header + FCS + optional VLAN tag. */ 1823e689cf4aSJeff Kirsher writel(0x20000000 | (gp->rx_buf_sz + 4), gp->regs + MAC_MAXFSZ); 1824e689cf4aSJeff Kirsher 1825e689cf4aSJeff Kirsher writel(0x07, gp->regs + MAC_PASIZE); 1826e689cf4aSJeff Kirsher writel(0x04, gp->regs + MAC_JAMSIZE); 1827e689cf4aSJeff Kirsher writel(0x10, gp->regs + MAC_ATTLIM); 1828e689cf4aSJeff Kirsher writel(0x8808, gp->regs + MAC_MCTYPE); 1829e689cf4aSJeff Kirsher 1830e689cf4aSJeff Kirsher writel((e[5] | (e[4] << 8)) & 0x3ff, gp->regs + MAC_RANDSEED); 1831e689cf4aSJeff Kirsher 1832e689cf4aSJeff Kirsher writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0); 1833e689cf4aSJeff Kirsher writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1); 1834e689cf4aSJeff Kirsher writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2); 1835e689cf4aSJeff Kirsher 1836e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_ADDR3); 1837e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_ADDR4); 1838e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_ADDR5); 1839e689cf4aSJeff Kirsher 1840e689cf4aSJeff Kirsher writel(0x0001, gp->regs + MAC_ADDR6); 1841e689cf4aSJeff Kirsher writel(0xc200, gp->regs + MAC_ADDR7); 1842e689cf4aSJeff Kirsher writel(0x0180, gp->regs + MAC_ADDR8); 1843e689cf4aSJeff Kirsher 1844e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AFILT0); 1845e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AFILT1); 1846e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AFILT2); 1847e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AF21MSK); 1848e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AF0MSK); 1849e689cf4aSJeff Kirsher 1850e689cf4aSJeff Kirsher gp->mac_rx_cfg = gem_setup_multicast(gp); 1851e689cf4aSJeff Kirsher #ifdef STRIP_FCS 1852e689cf4aSJeff Kirsher gp->mac_rx_cfg |= MAC_RXCFG_SFCS; 1853e689cf4aSJeff Kirsher #endif 1854e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_NCOLL); 1855e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_FASUCC); 1856e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_ECOLL); 1857e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_LCOLL); 1858e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_DTIMER); 1859e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_PATMPS); 1860e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_RFCTR); 1861e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_LERR); 1862e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AERR); 1863e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_FCSERR); 1864e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_RXCVERR); 1865e689cf4aSJeff Kirsher 1866e689cf4aSJeff Kirsher /* Clear RX/TX/MAC/XIF config, we will set these up and enable 1867e689cf4aSJeff Kirsher * them once a link is established. 1868e689cf4aSJeff Kirsher */ 1869e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_TXCFG); 1870e689cf4aSJeff Kirsher writel(gp->mac_rx_cfg, gp->regs + MAC_RXCFG); 1871e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_MCCFG); 1872e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_XIFCFG); 1873e689cf4aSJeff Kirsher 1874e689cf4aSJeff Kirsher /* Setup MAC interrupts. We want to get all of the interesting 1875e689cf4aSJeff Kirsher * counter expiration events, but we do not want to hear about 1876e689cf4aSJeff Kirsher * normal rx/tx as the DMA engine tells us that. 1877e689cf4aSJeff Kirsher */ 1878e689cf4aSJeff Kirsher writel(MAC_TXSTAT_XMIT, gp->regs + MAC_TXMASK); 1879e689cf4aSJeff Kirsher writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK); 1880e689cf4aSJeff Kirsher 1881e689cf4aSJeff Kirsher /* Don't enable even the PAUSE interrupts for now, we 1882e689cf4aSJeff Kirsher * make no use of those events other than to record them. 1883e689cf4aSJeff Kirsher */ 1884e689cf4aSJeff Kirsher writel(0xffffffff, gp->regs + MAC_MCMASK); 1885e689cf4aSJeff Kirsher 1886e689cf4aSJeff Kirsher /* Don't enable GEM's WOL in normal operations 1887e689cf4aSJeff Kirsher */ 1888e689cf4aSJeff Kirsher if (gp->has_wol) 1889e689cf4aSJeff Kirsher writel(0, gp->regs + WOL_WAKECSR); 1890e689cf4aSJeff Kirsher } 1891e689cf4aSJeff Kirsher 1892e689cf4aSJeff Kirsher static void gem_init_pause_thresholds(struct gem *gp) 1893e689cf4aSJeff Kirsher { 1894e689cf4aSJeff Kirsher u32 cfg; 1895e689cf4aSJeff Kirsher 1896e689cf4aSJeff Kirsher /* Calculate pause thresholds. Setting the OFF threshold to the 1897e689cf4aSJeff Kirsher * full RX fifo size effectively disables PAUSE generation which 1898e689cf4aSJeff Kirsher * is what we do for 10/100 only GEMs which have FIFOs too small 1899e689cf4aSJeff Kirsher * to make real gains from PAUSE. 1900e689cf4aSJeff Kirsher */ 1901e689cf4aSJeff Kirsher if (gp->rx_fifo_sz <= (2 * 1024)) { 1902e689cf4aSJeff Kirsher gp->rx_pause_off = gp->rx_pause_on = gp->rx_fifo_sz; 1903e689cf4aSJeff Kirsher } else { 1904e689cf4aSJeff Kirsher int max_frame = (gp->rx_buf_sz + 4 + 64) & ~63; 1905e689cf4aSJeff Kirsher int off = (gp->rx_fifo_sz - (max_frame * 2)); 1906e689cf4aSJeff Kirsher int on = off - max_frame; 1907e689cf4aSJeff Kirsher 1908e689cf4aSJeff Kirsher gp->rx_pause_off = off; 1909e689cf4aSJeff Kirsher gp->rx_pause_on = on; 1910e689cf4aSJeff Kirsher } 1911e689cf4aSJeff Kirsher 1912e689cf4aSJeff Kirsher 1913e689cf4aSJeff Kirsher /* Configure the chip "burst" DMA mode & enable some 1914e689cf4aSJeff Kirsher * HW bug fixes on Apple version 1915e689cf4aSJeff Kirsher */ 1916e689cf4aSJeff Kirsher cfg = 0; 1917e689cf4aSJeff Kirsher if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) 1918e689cf4aSJeff Kirsher cfg |= GREG_CFG_RONPAULBIT | GREG_CFG_ENBUG2FIX; 1919e689cf4aSJeff Kirsher #if !defined(CONFIG_SPARC64) && !defined(CONFIG_ALPHA) 1920e689cf4aSJeff Kirsher cfg |= GREG_CFG_IBURST; 1921e689cf4aSJeff Kirsher #endif 1922e689cf4aSJeff Kirsher cfg |= ((31 << 1) & GREG_CFG_TXDMALIM); 1923e689cf4aSJeff Kirsher cfg |= ((31 << 6) & GREG_CFG_RXDMALIM); 1924e689cf4aSJeff Kirsher writel(cfg, gp->regs + GREG_CFG); 1925e689cf4aSJeff Kirsher 1926e689cf4aSJeff Kirsher /* If Infinite Burst didn't stick, then use different 1927e689cf4aSJeff Kirsher * thresholds (and Apple bug fixes don't exist) 1928e689cf4aSJeff Kirsher */ 1929e689cf4aSJeff Kirsher if (!(readl(gp->regs + GREG_CFG) & GREG_CFG_IBURST)) { 1930e689cf4aSJeff Kirsher cfg = ((2 << 1) & GREG_CFG_TXDMALIM); 1931e689cf4aSJeff Kirsher cfg |= ((8 << 6) & GREG_CFG_RXDMALIM); 1932e689cf4aSJeff Kirsher writel(cfg, gp->regs + GREG_CFG); 1933e689cf4aSJeff Kirsher } 1934e689cf4aSJeff Kirsher } 1935e689cf4aSJeff Kirsher 1936e689cf4aSJeff Kirsher static int gem_check_invariants(struct gem *gp) 1937e689cf4aSJeff Kirsher { 1938e689cf4aSJeff Kirsher struct pci_dev *pdev = gp->pdev; 1939e689cf4aSJeff Kirsher u32 mif_cfg; 1940e689cf4aSJeff Kirsher 1941e689cf4aSJeff Kirsher /* On Apple's sungem, we can't rely on registers as the chip 1942e689cf4aSJeff Kirsher * was been powered down by the firmware. The PHY is looked 1943e689cf4aSJeff Kirsher * up later on. 1944e689cf4aSJeff Kirsher */ 1945e689cf4aSJeff Kirsher if (pdev->vendor == PCI_VENDOR_ID_APPLE) { 1946e689cf4aSJeff Kirsher gp->phy_type = phy_mii_mdio0; 1947e689cf4aSJeff Kirsher gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64; 1948e689cf4aSJeff Kirsher gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64; 1949e689cf4aSJeff Kirsher gp->swrst_base = 0; 1950e689cf4aSJeff Kirsher 1951e689cf4aSJeff Kirsher mif_cfg = readl(gp->regs + MIF_CFG); 1952e689cf4aSJeff Kirsher mif_cfg &= ~(MIF_CFG_PSELECT|MIF_CFG_POLL|MIF_CFG_BBMODE|MIF_CFG_MDI1); 1953e689cf4aSJeff Kirsher mif_cfg |= MIF_CFG_MDI0; 1954e689cf4aSJeff Kirsher writel(mif_cfg, gp->regs + MIF_CFG); 1955e689cf4aSJeff Kirsher writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE); 1956e689cf4aSJeff Kirsher writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG); 1957e689cf4aSJeff Kirsher 1958e689cf4aSJeff Kirsher /* We hard-code the PHY address so we can properly bring it out of 1959e689cf4aSJeff Kirsher * reset later on, we can't really probe it at this point, though 1960e689cf4aSJeff Kirsher * that isn't an issue. 1961e689cf4aSJeff Kirsher */ 1962e689cf4aSJeff Kirsher if (gp->pdev->device == PCI_DEVICE_ID_APPLE_K2_GMAC) 1963e689cf4aSJeff Kirsher gp->mii_phy_addr = 1; 1964e689cf4aSJeff Kirsher else 1965e689cf4aSJeff Kirsher gp->mii_phy_addr = 0; 1966e689cf4aSJeff Kirsher 1967e689cf4aSJeff Kirsher return 0; 1968e689cf4aSJeff Kirsher } 1969e689cf4aSJeff Kirsher 1970e689cf4aSJeff Kirsher mif_cfg = readl(gp->regs + MIF_CFG); 1971e689cf4aSJeff Kirsher 1972e689cf4aSJeff Kirsher if (pdev->vendor == PCI_VENDOR_ID_SUN && 1973e689cf4aSJeff Kirsher pdev->device == PCI_DEVICE_ID_SUN_RIO_GEM) { 1974e689cf4aSJeff Kirsher /* One of the MII PHYs _must_ be present 1975e689cf4aSJeff Kirsher * as this chip has no gigabit PHY. 1976e689cf4aSJeff Kirsher */ 1977e689cf4aSJeff Kirsher if ((mif_cfg & (MIF_CFG_MDI0 | MIF_CFG_MDI1)) == 0) { 1978e689cf4aSJeff Kirsher pr_err("RIO GEM lacks MII phy, mif_cfg[%08x]\n", 1979e689cf4aSJeff Kirsher mif_cfg); 1980e689cf4aSJeff Kirsher return -1; 1981e689cf4aSJeff Kirsher } 1982e689cf4aSJeff Kirsher } 1983e689cf4aSJeff Kirsher 1984e689cf4aSJeff Kirsher /* Determine initial PHY interface type guess. MDIO1 is the 1985e689cf4aSJeff Kirsher * external PHY and thus takes precedence over MDIO0. 1986e689cf4aSJeff Kirsher */ 1987e689cf4aSJeff Kirsher 1988e689cf4aSJeff Kirsher if (mif_cfg & MIF_CFG_MDI1) { 1989e689cf4aSJeff Kirsher gp->phy_type = phy_mii_mdio1; 1990e689cf4aSJeff Kirsher mif_cfg |= MIF_CFG_PSELECT; 1991e689cf4aSJeff Kirsher writel(mif_cfg, gp->regs + MIF_CFG); 1992e689cf4aSJeff Kirsher } else if (mif_cfg & MIF_CFG_MDI0) { 1993e689cf4aSJeff Kirsher gp->phy_type = phy_mii_mdio0; 1994e689cf4aSJeff Kirsher mif_cfg &= ~MIF_CFG_PSELECT; 1995e689cf4aSJeff Kirsher writel(mif_cfg, gp->regs + MIF_CFG); 1996e689cf4aSJeff Kirsher } else { 1997e689cf4aSJeff Kirsher #ifdef CONFIG_SPARC 1998e689cf4aSJeff Kirsher const char *p; 1999e689cf4aSJeff Kirsher 2000e689cf4aSJeff Kirsher p = of_get_property(gp->of_node, "shared-pins", NULL); 2001e689cf4aSJeff Kirsher if (p && !strcmp(p, "serdes")) 2002e689cf4aSJeff Kirsher gp->phy_type = phy_serdes; 2003e689cf4aSJeff Kirsher else 2004e689cf4aSJeff Kirsher #endif 2005e689cf4aSJeff Kirsher gp->phy_type = phy_serialink; 2006e689cf4aSJeff Kirsher } 2007e689cf4aSJeff Kirsher if (gp->phy_type == phy_mii_mdio1 || 2008e689cf4aSJeff Kirsher gp->phy_type == phy_mii_mdio0) { 2009e689cf4aSJeff Kirsher int i; 2010e689cf4aSJeff Kirsher 2011e689cf4aSJeff Kirsher for (i = 0; i < 32; i++) { 2012e689cf4aSJeff Kirsher gp->mii_phy_addr = i; 2013abc4da45SDavid S. Miller if (sungem_phy_read(gp, MII_BMCR) != 0xffff) 2014e689cf4aSJeff Kirsher break; 2015e689cf4aSJeff Kirsher } 2016e689cf4aSJeff Kirsher if (i == 32) { 2017e689cf4aSJeff Kirsher if (pdev->device != PCI_DEVICE_ID_SUN_GEM) { 2018e689cf4aSJeff Kirsher pr_err("RIO MII phy will not respond\n"); 2019e689cf4aSJeff Kirsher return -1; 2020e689cf4aSJeff Kirsher } 2021e689cf4aSJeff Kirsher gp->phy_type = phy_serdes; 2022e689cf4aSJeff Kirsher } 2023e689cf4aSJeff Kirsher } 2024e689cf4aSJeff Kirsher 2025e689cf4aSJeff Kirsher /* Fetch the FIFO configurations now too. */ 2026e689cf4aSJeff Kirsher gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64; 2027e689cf4aSJeff Kirsher gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64; 2028e689cf4aSJeff Kirsher 2029e689cf4aSJeff Kirsher if (pdev->vendor == PCI_VENDOR_ID_SUN) { 2030e689cf4aSJeff Kirsher if (pdev->device == PCI_DEVICE_ID_SUN_GEM) { 2031e689cf4aSJeff Kirsher if (gp->tx_fifo_sz != (9 * 1024) || 2032e689cf4aSJeff Kirsher gp->rx_fifo_sz != (20 * 1024)) { 2033e689cf4aSJeff Kirsher pr_err("GEM has bogus fifo sizes tx(%d) rx(%d)\n", 2034e689cf4aSJeff Kirsher gp->tx_fifo_sz, gp->rx_fifo_sz); 2035e689cf4aSJeff Kirsher return -1; 2036e689cf4aSJeff Kirsher } 2037e689cf4aSJeff Kirsher gp->swrst_base = 0; 2038e689cf4aSJeff Kirsher } else { 2039e689cf4aSJeff Kirsher if (gp->tx_fifo_sz != (2 * 1024) || 2040e689cf4aSJeff Kirsher gp->rx_fifo_sz != (2 * 1024)) { 2041e689cf4aSJeff Kirsher pr_err("RIO GEM has bogus fifo sizes tx(%d) rx(%d)\n", 2042e689cf4aSJeff Kirsher gp->tx_fifo_sz, gp->rx_fifo_sz); 2043e689cf4aSJeff Kirsher return -1; 2044e689cf4aSJeff Kirsher } 2045e689cf4aSJeff Kirsher gp->swrst_base = (64 / 4) << GREG_SWRST_CACHE_SHIFT; 2046e689cf4aSJeff Kirsher } 2047e689cf4aSJeff Kirsher } 2048e689cf4aSJeff Kirsher 2049e689cf4aSJeff Kirsher return 0; 2050e689cf4aSJeff Kirsher } 2051e689cf4aSJeff Kirsher 2052e689cf4aSJeff Kirsher static void gem_reinit_chip(struct gem *gp) 2053e689cf4aSJeff Kirsher { 2054e689cf4aSJeff Kirsher /* Reset the chip */ 2055e689cf4aSJeff Kirsher gem_reset(gp); 2056e689cf4aSJeff Kirsher 2057e689cf4aSJeff Kirsher /* Make sure ints are disabled */ 2058e689cf4aSJeff Kirsher gem_disable_ints(gp); 2059e689cf4aSJeff Kirsher 2060e689cf4aSJeff Kirsher /* Allocate & setup ring buffers */ 2061e689cf4aSJeff Kirsher gem_init_rings(gp); 2062e689cf4aSJeff Kirsher 2063e689cf4aSJeff Kirsher /* Configure pause thresholds */ 2064e689cf4aSJeff Kirsher gem_init_pause_thresholds(gp); 2065e689cf4aSJeff Kirsher 2066e689cf4aSJeff Kirsher /* Init DMA & MAC engines */ 2067e689cf4aSJeff Kirsher gem_init_dma(gp); 2068e689cf4aSJeff Kirsher gem_init_mac(gp); 2069e689cf4aSJeff Kirsher } 2070e689cf4aSJeff Kirsher 2071e689cf4aSJeff Kirsher 2072e689cf4aSJeff Kirsher static void gem_stop_phy(struct gem *gp, int wol) 2073e689cf4aSJeff Kirsher { 2074e689cf4aSJeff Kirsher u32 mifcfg; 2075e689cf4aSJeff Kirsher 2076e689cf4aSJeff Kirsher /* Let the chip settle down a bit, it seems that helps 2077e689cf4aSJeff Kirsher * for sleep mode on some models 2078e689cf4aSJeff Kirsher */ 2079e689cf4aSJeff Kirsher msleep(10); 2080e689cf4aSJeff Kirsher 2081e689cf4aSJeff Kirsher /* Make sure we aren't polling PHY status change. We 2082e689cf4aSJeff Kirsher * don't currently use that feature though 2083e689cf4aSJeff Kirsher */ 2084e689cf4aSJeff Kirsher mifcfg = readl(gp->regs + MIF_CFG); 2085e689cf4aSJeff Kirsher mifcfg &= ~MIF_CFG_POLL; 2086e689cf4aSJeff Kirsher writel(mifcfg, gp->regs + MIF_CFG); 2087e689cf4aSJeff Kirsher 2088e689cf4aSJeff Kirsher if (wol && gp->has_wol) { 2089a7639279SJakub Kicinski const unsigned char *e = &gp->dev->dev_addr[0]; 2090e689cf4aSJeff Kirsher u32 csr; 2091e689cf4aSJeff Kirsher 2092e689cf4aSJeff Kirsher /* Setup wake-on-lan for MAGIC packet */ 2093e689cf4aSJeff Kirsher writel(MAC_RXCFG_HFE | MAC_RXCFG_SFCS | MAC_RXCFG_ENAB, 2094e689cf4aSJeff Kirsher gp->regs + MAC_RXCFG); 2095e689cf4aSJeff Kirsher writel((e[4] << 8) | e[5], gp->regs + WOL_MATCH0); 2096e689cf4aSJeff Kirsher writel((e[2] << 8) | e[3], gp->regs + WOL_MATCH1); 2097e689cf4aSJeff Kirsher writel((e[0] << 8) | e[1], gp->regs + WOL_MATCH2); 2098e689cf4aSJeff Kirsher 2099e689cf4aSJeff Kirsher writel(WOL_MCOUNT_N | WOL_MCOUNT_M, gp->regs + WOL_MCOUNT); 2100e689cf4aSJeff Kirsher csr = WOL_WAKECSR_ENABLE; 2101e689cf4aSJeff Kirsher if ((readl(gp->regs + MAC_XIFCFG) & MAC_XIFCFG_GMII) == 0) 2102e689cf4aSJeff Kirsher csr |= WOL_WAKECSR_MII; 2103e689cf4aSJeff Kirsher writel(csr, gp->regs + WOL_WAKECSR); 2104e689cf4aSJeff Kirsher } else { 2105e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_RXCFG); 2106e689cf4aSJeff Kirsher (void)readl(gp->regs + MAC_RXCFG); 2107e689cf4aSJeff Kirsher /* Machine sleep will die in strange ways if we 2108e689cf4aSJeff Kirsher * dont wait a bit here, looks like the chip takes 2109e689cf4aSJeff Kirsher * some time to really shut down 2110e689cf4aSJeff Kirsher */ 2111e689cf4aSJeff Kirsher msleep(10); 2112e689cf4aSJeff Kirsher } 2113e689cf4aSJeff Kirsher 2114e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_TXCFG); 2115e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_XIFCFG); 2116e689cf4aSJeff Kirsher writel(0, gp->regs + TXDMA_CFG); 2117e689cf4aSJeff Kirsher writel(0, gp->regs + RXDMA_CFG); 2118e689cf4aSJeff Kirsher 2119e689cf4aSJeff Kirsher if (!wol) { 2120e689cf4aSJeff Kirsher gem_reset(gp); 2121e689cf4aSJeff Kirsher writel(MAC_TXRST_CMD, gp->regs + MAC_TXRST); 2122e689cf4aSJeff Kirsher writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST); 2123e689cf4aSJeff Kirsher 2124e689cf4aSJeff Kirsher if (found_mii_phy(gp) && gp->phy_mii.def->ops->suspend) 2125e689cf4aSJeff Kirsher gp->phy_mii.def->ops->suspend(&gp->phy_mii); 2126e689cf4aSJeff Kirsher 2127e689cf4aSJeff Kirsher /* According to Apple, we must set the MDIO pins to this begnign 2128e689cf4aSJeff Kirsher * state or we may 1) eat more current, 2) damage some PHYs 2129e689cf4aSJeff Kirsher */ 2130e689cf4aSJeff Kirsher writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG); 2131e689cf4aSJeff Kirsher writel(0, gp->regs + MIF_BBCLK); 2132e689cf4aSJeff Kirsher writel(0, gp->regs + MIF_BBDATA); 2133e689cf4aSJeff Kirsher writel(0, gp->regs + MIF_BBOENAB); 2134e689cf4aSJeff Kirsher writel(MAC_XIFCFG_GMII | MAC_XIFCFG_LBCK, gp->regs + MAC_XIFCFG); 2135e689cf4aSJeff Kirsher (void) readl(gp->regs + MAC_XIFCFG); 2136e689cf4aSJeff Kirsher } 2137e689cf4aSJeff Kirsher } 2138e689cf4aSJeff Kirsher 2139e689cf4aSJeff Kirsher static int gem_do_start(struct net_device *dev) 2140e689cf4aSJeff Kirsher { 2141e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2142e689cf4aSJeff Kirsher int rc; 2143e689cf4aSJeff Kirsher 2144e689cf4aSJeff Kirsher pci_set_master(gp->pdev); 2145e689cf4aSJeff Kirsher 2146e689cf4aSJeff Kirsher /* Init & setup chip hardware */ 2147e689cf4aSJeff Kirsher gem_reinit_chip(gp); 2148e689cf4aSJeff Kirsher 2149e689cf4aSJeff Kirsher /* An interrupt might come in handy */ 2150e689cf4aSJeff Kirsher rc = request_irq(gp->pdev->irq, gem_interrupt, 2151e689cf4aSJeff Kirsher IRQF_SHARED, dev->name, (void *)dev); 2152e689cf4aSJeff Kirsher if (rc) { 2153e689cf4aSJeff Kirsher netdev_err(dev, "failed to request irq !\n"); 2154e689cf4aSJeff Kirsher 2155e689cf4aSJeff Kirsher gem_reset(gp); 2156e689cf4aSJeff Kirsher gem_clean_rings(gp); 2157e689cf4aSJeff Kirsher gem_put_cell(gp); 2158e689cf4aSJeff Kirsher return rc; 2159e689cf4aSJeff Kirsher } 2160e689cf4aSJeff Kirsher 2161e689cf4aSJeff Kirsher /* Mark us as attached again if we come from resume(), this has 2162dbedd44eSJoe Perches * no effect if we weren't detached and needs to be done now. 2163e689cf4aSJeff Kirsher */ 2164e689cf4aSJeff Kirsher netif_device_attach(dev); 2165e689cf4aSJeff Kirsher 2166e689cf4aSJeff Kirsher /* Restart NAPI & queues */ 2167e689cf4aSJeff Kirsher gem_netif_start(gp); 2168e689cf4aSJeff Kirsher 2169e689cf4aSJeff Kirsher /* Detect & init PHY, start autoneg etc... this will 2170e689cf4aSJeff Kirsher * eventually result in starting DMA operations when 2171e689cf4aSJeff Kirsher * the link is up 2172e689cf4aSJeff Kirsher */ 2173e689cf4aSJeff Kirsher gem_init_phy(gp); 2174e689cf4aSJeff Kirsher 2175e689cf4aSJeff Kirsher return 0; 2176e689cf4aSJeff Kirsher } 2177e689cf4aSJeff Kirsher 2178e689cf4aSJeff Kirsher static void gem_do_stop(struct net_device *dev, int wol) 2179e689cf4aSJeff Kirsher { 2180e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2181e689cf4aSJeff Kirsher 2182e689cf4aSJeff Kirsher /* Stop NAPI and stop tx queue */ 2183e689cf4aSJeff Kirsher gem_netif_stop(gp); 2184e689cf4aSJeff Kirsher 2185e689cf4aSJeff Kirsher /* Make sure ints are disabled. We don't care about 2186e689cf4aSJeff Kirsher * synchronizing as NAPI is disabled, thus a stray 2187e689cf4aSJeff Kirsher * interrupt will do nothing bad (our irq handler 2188e689cf4aSJeff Kirsher * just schedules NAPI) 2189e689cf4aSJeff Kirsher */ 2190e689cf4aSJeff Kirsher gem_disable_ints(gp); 2191e689cf4aSJeff Kirsher 2192e689cf4aSJeff Kirsher /* Stop the link timer */ 2193e689cf4aSJeff Kirsher del_timer_sync(&gp->link_timer); 2194e689cf4aSJeff Kirsher 2195e689cf4aSJeff Kirsher /* We cannot cancel the reset task while holding the 2196e689cf4aSJeff Kirsher * rtnl lock, we'd get an A->B / B->A deadlock stituation 2197e689cf4aSJeff Kirsher * if we did. This is not an issue however as the reset 2198e689cf4aSJeff Kirsher * task is synchronized vs. us (rtnl_lock) and will do 2199e689cf4aSJeff Kirsher * nothing if the device is down or suspended. We do 2200e689cf4aSJeff Kirsher * still clear reset_task_pending to avoid a spurrious 2201e689cf4aSJeff Kirsher * reset later on in case we do resume before it gets 2202e689cf4aSJeff Kirsher * scheduled. 2203e689cf4aSJeff Kirsher */ 2204e689cf4aSJeff Kirsher gp->reset_task_pending = 0; 2205e689cf4aSJeff Kirsher 2206e689cf4aSJeff Kirsher /* If we are going to sleep with WOL */ 2207e689cf4aSJeff Kirsher gem_stop_dma(gp); 2208e689cf4aSJeff Kirsher msleep(10); 2209e689cf4aSJeff Kirsher if (!wol) 2210e689cf4aSJeff Kirsher gem_reset(gp); 2211e689cf4aSJeff Kirsher msleep(10); 2212e689cf4aSJeff Kirsher 2213e689cf4aSJeff Kirsher /* Get rid of rings */ 2214e689cf4aSJeff Kirsher gem_clean_rings(gp); 2215e689cf4aSJeff Kirsher 2216e689cf4aSJeff Kirsher /* No irq needed anymore */ 2217e689cf4aSJeff Kirsher free_irq(gp->pdev->irq, (void *) dev); 2218e689cf4aSJeff Kirsher 2219e689cf4aSJeff Kirsher /* Shut the PHY down eventually and setup WOL */ 2220e689cf4aSJeff Kirsher gem_stop_phy(gp, wol); 2221e689cf4aSJeff Kirsher } 2222e689cf4aSJeff Kirsher 2223e689cf4aSJeff Kirsher static void gem_reset_task(struct work_struct *work) 2224e689cf4aSJeff Kirsher { 2225e689cf4aSJeff Kirsher struct gem *gp = container_of(work, struct gem, reset_task); 2226e689cf4aSJeff Kirsher 2227e689cf4aSJeff Kirsher /* Lock out the network stack (essentially shield ourselves 2228e689cf4aSJeff Kirsher * against a racing open, close, control call, or suspend 2229e689cf4aSJeff Kirsher */ 2230e689cf4aSJeff Kirsher rtnl_lock(); 2231e689cf4aSJeff Kirsher 2232e689cf4aSJeff Kirsher /* Skip the reset task if suspended or closed, or if it's 2233e689cf4aSJeff Kirsher * been cancelled by gem_do_stop (see comment there) 2234e689cf4aSJeff Kirsher */ 2235e689cf4aSJeff Kirsher if (!netif_device_present(gp->dev) || 2236e689cf4aSJeff Kirsher !netif_running(gp->dev) || 2237e689cf4aSJeff Kirsher !gp->reset_task_pending) { 2238e689cf4aSJeff Kirsher rtnl_unlock(); 2239e689cf4aSJeff Kirsher return; 2240e689cf4aSJeff Kirsher } 2241e689cf4aSJeff Kirsher 2242e689cf4aSJeff Kirsher /* Stop the link timer */ 2243e689cf4aSJeff Kirsher del_timer_sync(&gp->link_timer); 2244e689cf4aSJeff Kirsher 2245e689cf4aSJeff Kirsher /* Stop NAPI and tx */ 2246e689cf4aSJeff Kirsher gem_netif_stop(gp); 2247e689cf4aSJeff Kirsher 2248e689cf4aSJeff Kirsher /* Reset the chip & rings */ 2249e689cf4aSJeff Kirsher gem_reinit_chip(gp); 2250e689cf4aSJeff Kirsher if (gp->lstate == link_up) 2251e689cf4aSJeff Kirsher gem_set_link_modes(gp); 2252e689cf4aSJeff Kirsher 2253e689cf4aSJeff Kirsher /* Restart NAPI and Tx */ 2254e689cf4aSJeff Kirsher gem_netif_start(gp); 2255e689cf4aSJeff Kirsher 2256e689cf4aSJeff Kirsher /* We are back ! */ 2257e689cf4aSJeff Kirsher gp->reset_task_pending = 0; 2258e689cf4aSJeff Kirsher 2259e689cf4aSJeff Kirsher /* If the link is not up, restart autoneg, else restart the 2260e689cf4aSJeff Kirsher * polling timer 2261e689cf4aSJeff Kirsher */ 2262e689cf4aSJeff Kirsher if (gp->lstate != link_up) 2263e689cf4aSJeff Kirsher gem_begin_auto_negotiation(gp, NULL); 2264e689cf4aSJeff Kirsher else 2265e689cf4aSJeff Kirsher mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10)); 2266e689cf4aSJeff Kirsher 2267e689cf4aSJeff Kirsher rtnl_unlock(); 2268e689cf4aSJeff Kirsher } 2269e689cf4aSJeff Kirsher 2270e689cf4aSJeff Kirsher static int gem_open(struct net_device *dev) 2271e689cf4aSJeff Kirsher { 2272d4ce70b3SVaibhav Gupta struct gem *gp = netdev_priv(dev); 2273d4ce70b3SVaibhav Gupta int rc; 2274d4ce70b3SVaibhav Gupta 2275e689cf4aSJeff Kirsher /* We allow open while suspended, we just do nothing, 2276e689cf4aSJeff Kirsher * the chip will be initialized in resume() 2277e689cf4aSJeff Kirsher */ 2278d4ce70b3SVaibhav Gupta if (netif_device_present(dev)) { 2279d4ce70b3SVaibhav Gupta /* Enable the cell */ 2280d4ce70b3SVaibhav Gupta gem_get_cell(gp); 2281d4ce70b3SVaibhav Gupta 2282d4ce70b3SVaibhav Gupta /* Make sure PCI access and bus master are enabled */ 2283d4ce70b3SVaibhav Gupta rc = pci_enable_device(gp->pdev); 2284d4ce70b3SVaibhav Gupta if (rc) { 2285d4ce70b3SVaibhav Gupta netdev_err(dev, "Failed to enable chip on PCI bus !\n"); 2286d4ce70b3SVaibhav Gupta 2287d4ce70b3SVaibhav Gupta /* Put cell and forget it for now, it will be considered 2288d4ce70b3SVaibhav Gupta *as still asleep, a new sleep cycle may bring it back 2289d4ce70b3SVaibhav Gupta */ 2290d4ce70b3SVaibhav Gupta gem_put_cell(gp); 2291d4ce70b3SVaibhav Gupta return -ENXIO; 2292d4ce70b3SVaibhav Gupta } 2293e689cf4aSJeff Kirsher return gem_do_start(dev); 2294d4ce70b3SVaibhav Gupta } 2295d4ce70b3SVaibhav Gupta 2296e689cf4aSJeff Kirsher return 0; 2297e689cf4aSJeff Kirsher } 2298e689cf4aSJeff Kirsher 2299e689cf4aSJeff Kirsher static int gem_close(struct net_device *dev) 2300e689cf4aSJeff Kirsher { 2301d4ce70b3SVaibhav Gupta struct gem *gp = netdev_priv(dev); 2302d4ce70b3SVaibhav Gupta 2303d4ce70b3SVaibhav Gupta if (netif_device_present(dev)) { 2304e689cf4aSJeff Kirsher gem_do_stop(dev, 0); 2305e689cf4aSJeff Kirsher 2306d4ce70b3SVaibhav Gupta /* Make sure bus master is disabled */ 2307d4ce70b3SVaibhav Gupta pci_disable_device(gp->pdev); 2308d4ce70b3SVaibhav Gupta 2309d4ce70b3SVaibhav Gupta /* Cell not needed neither if no WOL */ 2310d4ce70b3SVaibhav Gupta if (!gp->asleep_wol) 2311d4ce70b3SVaibhav Gupta gem_put_cell(gp); 2312d4ce70b3SVaibhav Gupta } 2313e689cf4aSJeff Kirsher return 0; 2314e689cf4aSJeff Kirsher } 2315e689cf4aSJeff Kirsher 2316d4ce70b3SVaibhav Gupta static int __maybe_unused gem_suspend(struct device *dev_d) 2317e689cf4aSJeff Kirsher { 2318d4ce70b3SVaibhav Gupta struct net_device *dev = dev_get_drvdata(dev_d); 2319e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2320e689cf4aSJeff Kirsher 2321e689cf4aSJeff Kirsher /* Lock the network stack first to avoid racing with open/close, 2322e689cf4aSJeff Kirsher * reset task and setting calls 2323e689cf4aSJeff Kirsher */ 2324e689cf4aSJeff Kirsher rtnl_lock(); 2325e689cf4aSJeff Kirsher 2326e689cf4aSJeff Kirsher /* Not running, mark ourselves non-present, no need for 2327e689cf4aSJeff Kirsher * a lock here 2328e689cf4aSJeff Kirsher */ 2329e689cf4aSJeff Kirsher if (!netif_running(dev)) { 2330e689cf4aSJeff Kirsher netif_device_detach(dev); 2331e689cf4aSJeff Kirsher rtnl_unlock(); 2332e689cf4aSJeff Kirsher return 0; 2333e689cf4aSJeff Kirsher } 2334e689cf4aSJeff Kirsher netdev_info(dev, "suspending, WakeOnLan %s\n", 2335e689cf4aSJeff Kirsher (gp->wake_on_lan && netif_running(dev)) ? 2336e689cf4aSJeff Kirsher "enabled" : "disabled"); 2337e689cf4aSJeff Kirsher 2338e689cf4aSJeff Kirsher /* Tell the network stack we're gone. gem_do_stop() below will 2339e689cf4aSJeff Kirsher * synchronize with TX, stop NAPI etc... 2340e689cf4aSJeff Kirsher */ 2341e689cf4aSJeff Kirsher netif_device_detach(dev); 2342e689cf4aSJeff Kirsher 2343e689cf4aSJeff Kirsher /* Switch off chip, remember WOL setting */ 23445a8887d3SGerard Lledo gp->asleep_wol = !!gp->wake_on_lan; 2345e689cf4aSJeff Kirsher gem_do_stop(dev, gp->asleep_wol); 2346e689cf4aSJeff Kirsher 2347d4ce70b3SVaibhav Gupta /* Cell not needed neither if no WOL */ 2348d4ce70b3SVaibhav Gupta if (!gp->asleep_wol) 2349d4ce70b3SVaibhav Gupta gem_put_cell(gp); 2350d4ce70b3SVaibhav Gupta 2351e689cf4aSJeff Kirsher /* Unlock the network stack */ 2352e689cf4aSJeff Kirsher rtnl_unlock(); 2353e689cf4aSJeff Kirsher 2354e689cf4aSJeff Kirsher return 0; 2355e689cf4aSJeff Kirsher } 2356e689cf4aSJeff Kirsher 2357d4ce70b3SVaibhav Gupta static int __maybe_unused gem_resume(struct device *dev_d) 2358e689cf4aSJeff Kirsher { 2359d4ce70b3SVaibhav Gupta struct net_device *dev = dev_get_drvdata(dev_d); 2360e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2361e689cf4aSJeff Kirsher 2362e689cf4aSJeff Kirsher /* See locking comment in gem_suspend */ 2363e689cf4aSJeff Kirsher rtnl_lock(); 2364e689cf4aSJeff Kirsher 2365e689cf4aSJeff Kirsher /* Not running, mark ourselves present, no need for 2366e689cf4aSJeff Kirsher * a lock here 2367e689cf4aSJeff Kirsher */ 2368e689cf4aSJeff Kirsher if (!netif_running(dev)) { 2369e689cf4aSJeff Kirsher netif_device_attach(dev); 2370e689cf4aSJeff Kirsher rtnl_unlock(); 2371e689cf4aSJeff Kirsher return 0; 2372e689cf4aSJeff Kirsher } 2373e689cf4aSJeff Kirsher 2374d4ce70b3SVaibhav Gupta /* Enable the cell */ 2375d4ce70b3SVaibhav Gupta gem_get_cell(gp); 2376d4ce70b3SVaibhav Gupta 2377e689cf4aSJeff Kirsher /* Restart chip. If that fails there isn't much we can do, we 2378e689cf4aSJeff Kirsher * leave things stopped. 2379e689cf4aSJeff Kirsher */ 2380e689cf4aSJeff Kirsher gem_do_start(dev); 2381e689cf4aSJeff Kirsher 2382e689cf4aSJeff Kirsher /* If we had WOL enabled, the cell clock was never turned off during 2383e689cf4aSJeff Kirsher * sleep, so we end up beeing unbalanced. Fix that here 2384e689cf4aSJeff Kirsher */ 2385e689cf4aSJeff Kirsher if (gp->asleep_wol) 2386e689cf4aSJeff Kirsher gem_put_cell(gp); 2387e689cf4aSJeff Kirsher 2388e689cf4aSJeff Kirsher /* Unlock the network stack */ 2389e689cf4aSJeff Kirsher rtnl_unlock(); 2390e689cf4aSJeff Kirsher 2391e689cf4aSJeff Kirsher return 0; 2392e689cf4aSJeff Kirsher } 2393e689cf4aSJeff Kirsher 2394e689cf4aSJeff Kirsher static struct net_device_stats *gem_get_stats(struct net_device *dev) 2395e689cf4aSJeff Kirsher { 2396e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2397e689cf4aSJeff Kirsher 2398e689cf4aSJeff Kirsher /* I have seen this being called while the PM was in progress, 2399e689cf4aSJeff Kirsher * so we shield against this. Let's also not poke at registers 2400e689cf4aSJeff Kirsher * while the reset task is going on. 2401e689cf4aSJeff Kirsher * 2402e689cf4aSJeff Kirsher * TODO: Move stats collection elsewhere (link timer ?) and 2403e689cf4aSJeff Kirsher * make this a nop to avoid all those synchro issues 2404e689cf4aSJeff Kirsher */ 2405e689cf4aSJeff Kirsher if (!netif_device_present(dev) || !netif_running(dev)) 2406e689cf4aSJeff Kirsher goto bail; 2407e689cf4aSJeff Kirsher 2408e689cf4aSJeff Kirsher /* Better safe than sorry... */ 2409e689cf4aSJeff Kirsher if (WARN_ON(!gp->cell_enabled)) 2410e689cf4aSJeff Kirsher goto bail; 2411e689cf4aSJeff Kirsher 2412e689cf4aSJeff Kirsher dev->stats.rx_crc_errors += readl(gp->regs + MAC_FCSERR); 2413e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_FCSERR); 2414e689cf4aSJeff Kirsher 2415e689cf4aSJeff Kirsher dev->stats.rx_frame_errors += readl(gp->regs + MAC_AERR); 2416e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_AERR); 2417e689cf4aSJeff Kirsher 2418e689cf4aSJeff Kirsher dev->stats.rx_length_errors += readl(gp->regs + MAC_LERR); 2419e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_LERR); 2420e689cf4aSJeff Kirsher 2421e689cf4aSJeff Kirsher dev->stats.tx_aborted_errors += readl(gp->regs + MAC_ECOLL); 2422e689cf4aSJeff Kirsher dev->stats.collisions += 2423e689cf4aSJeff Kirsher (readl(gp->regs + MAC_ECOLL) + readl(gp->regs + MAC_LCOLL)); 2424e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_ECOLL); 2425e689cf4aSJeff Kirsher writel(0, gp->regs + MAC_LCOLL); 2426e689cf4aSJeff Kirsher bail: 2427e689cf4aSJeff Kirsher return &dev->stats; 2428e689cf4aSJeff Kirsher } 2429e689cf4aSJeff Kirsher 2430e689cf4aSJeff Kirsher static int gem_set_mac_address(struct net_device *dev, void *addr) 2431e689cf4aSJeff Kirsher { 2432e689cf4aSJeff Kirsher struct sockaddr *macaddr = (struct sockaddr *) addr; 2433a7639279SJakub Kicinski const unsigned char *e = &dev->dev_addr[0]; 2434e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2435e689cf4aSJeff Kirsher 2436e689cf4aSJeff Kirsher if (!is_valid_ether_addr(macaddr->sa_data)) 2437e689cf4aSJeff Kirsher return -EADDRNOTAVAIL; 2438e689cf4aSJeff Kirsher 2439a05e4c0aSJakub Kicinski eth_hw_addr_set(dev, macaddr->sa_data); 2440e689cf4aSJeff Kirsher 2441e689cf4aSJeff Kirsher /* We'll just catch it later when the device is up'd or resumed */ 2442e689cf4aSJeff Kirsher if (!netif_running(dev) || !netif_device_present(dev)) 2443e689cf4aSJeff Kirsher return 0; 2444e689cf4aSJeff Kirsher 2445e689cf4aSJeff Kirsher /* Better safe than sorry... */ 2446e689cf4aSJeff Kirsher if (WARN_ON(!gp->cell_enabled)) 2447e689cf4aSJeff Kirsher return 0; 2448e689cf4aSJeff Kirsher 2449e689cf4aSJeff Kirsher writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0); 2450e689cf4aSJeff Kirsher writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1); 2451e689cf4aSJeff Kirsher writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2); 2452e689cf4aSJeff Kirsher 2453e689cf4aSJeff Kirsher return 0; 2454e689cf4aSJeff Kirsher } 2455e689cf4aSJeff Kirsher 2456e689cf4aSJeff Kirsher static void gem_set_multicast(struct net_device *dev) 2457e689cf4aSJeff Kirsher { 2458e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2459e689cf4aSJeff Kirsher u32 rxcfg, rxcfg_new; 2460e689cf4aSJeff Kirsher int limit = 10000; 2461e689cf4aSJeff Kirsher 2462e689cf4aSJeff Kirsher if (!netif_running(dev) || !netif_device_present(dev)) 2463e689cf4aSJeff Kirsher return; 2464e689cf4aSJeff Kirsher 2465e689cf4aSJeff Kirsher /* Better safe than sorry... */ 2466e689cf4aSJeff Kirsher if (gp->reset_task_pending || WARN_ON(!gp->cell_enabled)) 2467e689cf4aSJeff Kirsher return; 2468e689cf4aSJeff Kirsher 2469e689cf4aSJeff Kirsher rxcfg = readl(gp->regs + MAC_RXCFG); 2470e689cf4aSJeff Kirsher rxcfg_new = gem_setup_multicast(gp); 2471e689cf4aSJeff Kirsher #ifdef STRIP_FCS 2472e689cf4aSJeff Kirsher rxcfg_new |= MAC_RXCFG_SFCS; 2473e689cf4aSJeff Kirsher #endif 2474e689cf4aSJeff Kirsher gp->mac_rx_cfg = rxcfg_new; 2475e689cf4aSJeff Kirsher 2476e689cf4aSJeff Kirsher writel(rxcfg & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG); 2477e689cf4aSJeff Kirsher while (readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB) { 2478e689cf4aSJeff Kirsher if (!limit--) 2479e689cf4aSJeff Kirsher break; 2480e689cf4aSJeff Kirsher udelay(10); 2481e689cf4aSJeff Kirsher } 2482e689cf4aSJeff Kirsher 2483e689cf4aSJeff Kirsher rxcfg &= ~(MAC_RXCFG_PROM | MAC_RXCFG_HFE); 2484e689cf4aSJeff Kirsher rxcfg |= rxcfg_new; 2485e689cf4aSJeff Kirsher 2486e689cf4aSJeff Kirsher writel(rxcfg, gp->regs + MAC_RXCFG); 2487e689cf4aSJeff Kirsher } 2488e689cf4aSJeff Kirsher 2489e689cf4aSJeff Kirsher /* Jumbo-grams don't seem to work :-( */ 2490540bfe30SJarod Wilson #define GEM_MIN_MTU ETH_MIN_MTU 2491e689cf4aSJeff Kirsher #if 1 2492540bfe30SJarod Wilson #define GEM_MAX_MTU ETH_DATA_LEN 2493e689cf4aSJeff Kirsher #else 2494e689cf4aSJeff Kirsher #define GEM_MAX_MTU 9000 2495e689cf4aSJeff Kirsher #endif 2496e689cf4aSJeff Kirsher 2497e689cf4aSJeff Kirsher static int gem_change_mtu(struct net_device *dev, int new_mtu) 2498e689cf4aSJeff Kirsher { 2499e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2500e689cf4aSJeff Kirsher 2501e689cf4aSJeff Kirsher dev->mtu = new_mtu; 2502e689cf4aSJeff Kirsher 2503e689cf4aSJeff Kirsher /* We'll just catch it later when the device is up'd or resumed */ 2504e689cf4aSJeff Kirsher if (!netif_running(dev) || !netif_device_present(dev)) 2505e689cf4aSJeff Kirsher return 0; 2506e689cf4aSJeff Kirsher 2507e689cf4aSJeff Kirsher /* Better safe than sorry... */ 2508e689cf4aSJeff Kirsher if (WARN_ON(!gp->cell_enabled)) 2509e689cf4aSJeff Kirsher return 0; 2510e689cf4aSJeff Kirsher 2511e689cf4aSJeff Kirsher gem_netif_stop(gp); 2512e689cf4aSJeff Kirsher gem_reinit_chip(gp); 2513e689cf4aSJeff Kirsher if (gp->lstate == link_up) 2514e689cf4aSJeff Kirsher gem_set_link_modes(gp); 2515e689cf4aSJeff Kirsher gem_netif_start(gp); 2516e689cf4aSJeff Kirsher 2517e689cf4aSJeff Kirsher return 0; 2518e689cf4aSJeff Kirsher } 2519e689cf4aSJeff Kirsher 2520e689cf4aSJeff Kirsher static void gem_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 2521e689cf4aSJeff Kirsher { 2522e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2523e689cf4aSJeff Kirsher 2524f029c781SWolfram Sang strscpy(info->driver, DRV_NAME, sizeof(info->driver)); 2525f029c781SWolfram Sang strscpy(info->version, DRV_VERSION, sizeof(info->version)); 2526f029c781SWolfram Sang strscpy(info->bus_info, pci_name(gp->pdev), sizeof(info->bus_info)); 2527e689cf4aSJeff Kirsher } 2528e689cf4aSJeff Kirsher 252992552fddSPhilippe Reynes static int gem_get_link_ksettings(struct net_device *dev, 253092552fddSPhilippe Reynes struct ethtool_link_ksettings *cmd) 2531e689cf4aSJeff Kirsher { 2532e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 253392552fddSPhilippe Reynes u32 supported, advertising; 2534e689cf4aSJeff Kirsher 2535e689cf4aSJeff Kirsher if (gp->phy_type == phy_mii_mdio0 || 2536e689cf4aSJeff Kirsher gp->phy_type == phy_mii_mdio1) { 2537e689cf4aSJeff Kirsher if (gp->phy_mii.def) 253892552fddSPhilippe Reynes supported = gp->phy_mii.def->features; 2539e689cf4aSJeff Kirsher else 254092552fddSPhilippe Reynes supported = (SUPPORTED_10baseT_Half | 2541e689cf4aSJeff Kirsher SUPPORTED_10baseT_Full); 2542e689cf4aSJeff Kirsher 2543e689cf4aSJeff Kirsher /* XXX hardcoded stuff for now */ 254492552fddSPhilippe Reynes cmd->base.port = PORT_MII; 254592552fddSPhilippe Reynes cmd->base.phy_address = 0; /* XXX fixed PHYAD */ 2546e689cf4aSJeff Kirsher 2547e689cf4aSJeff Kirsher /* Return current PHY settings */ 254892552fddSPhilippe Reynes cmd->base.autoneg = gp->want_autoneg; 254992552fddSPhilippe Reynes cmd->base.speed = gp->phy_mii.speed; 255092552fddSPhilippe Reynes cmd->base.duplex = gp->phy_mii.duplex; 255192552fddSPhilippe Reynes advertising = gp->phy_mii.advertising; 2552e689cf4aSJeff Kirsher 2553e689cf4aSJeff Kirsher /* If we started with a forced mode, we don't have a default 2554e689cf4aSJeff Kirsher * advertise set, we need to return something sensible so 2555e689cf4aSJeff Kirsher * userland can re-enable autoneg properly. 2556e689cf4aSJeff Kirsher */ 255792552fddSPhilippe Reynes if (advertising == 0) 255892552fddSPhilippe Reynes advertising = supported; 2559e689cf4aSJeff Kirsher } else { // XXX PCS ? 256092552fddSPhilippe Reynes supported = 2561e689cf4aSJeff Kirsher (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | 2562e689cf4aSJeff Kirsher SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | 2563e689cf4aSJeff Kirsher SUPPORTED_Autoneg); 256492552fddSPhilippe Reynes advertising = supported; 256592552fddSPhilippe Reynes cmd->base.speed = 0; 256692552fddSPhilippe Reynes cmd->base.duplex = 0; 256792552fddSPhilippe Reynes cmd->base.port = 0; 256892552fddSPhilippe Reynes cmd->base.phy_address = 0; 256992552fddSPhilippe Reynes cmd->base.autoneg = 0; 2570e689cf4aSJeff Kirsher 2571e689cf4aSJeff Kirsher /* serdes means usually a Fibre connector, with most fixed */ 2572e689cf4aSJeff Kirsher if (gp->phy_type == phy_serdes) { 257392552fddSPhilippe Reynes cmd->base.port = PORT_FIBRE; 257492552fddSPhilippe Reynes supported = (SUPPORTED_1000baseT_Half | 2575e689cf4aSJeff Kirsher SUPPORTED_1000baseT_Full | 2576e689cf4aSJeff Kirsher SUPPORTED_FIBRE | SUPPORTED_Autoneg | 2577e689cf4aSJeff Kirsher SUPPORTED_Pause | SUPPORTED_Asym_Pause); 257892552fddSPhilippe Reynes advertising = supported; 2579e689cf4aSJeff Kirsher if (gp->lstate == link_up) 258092552fddSPhilippe Reynes cmd->base.speed = SPEED_1000; 258192552fddSPhilippe Reynes cmd->base.duplex = DUPLEX_FULL; 258292552fddSPhilippe Reynes cmd->base.autoneg = 1; 2583e689cf4aSJeff Kirsher } 2584e689cf4aSJeff Kirsher } 258592552fddSPhilippe Reynes 258692552fddSPhilippe Reynes ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 258792552fddSPhilippe Reynes supported); 258892552fddSPhilippe Reynes ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 258992552fddSPhilippe Reynes advertising); 2590e689cf4aSJeff Kirsher 2591e689cf4aSJeff Kirsher return 0; 2592e689cf4aSJeff Kirsher } 2593e689cf4aSJeff Kirsher 259492552fddSPhilippe Reynes static int gem_set_link_ksettings(struct net_device *dev, 259592552fddSPhilippe Reynes const struct ethtool_link_ksettings *cmd) 2596e689cf4aSJeff Kirsher { 2597e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 259892552fddSPhilippe Reynes u32 speed = cmd->base.speed; 259992552fddSPhilippe Reynes u32 advertising; 260092552fddSPhilippe Reynes 260192552fddSPhilippe Reynes ethtool_convert_link_mode_to_legacy_u32(&advertising, 260292552fddSPhilippe Reynes cmd->link_modes.advertising); 2603e689cf4aSJeff Kirsher 2604e689cf4aSJeff Kirsher /* Verify the settings we care about. */ 260592552fddSPhilippe Reynes if (cmd->base.autoneg != AUTONEG_ENABLE && 260692552fddSPhilippe Reynes cmd->base.autoneg != AUTONEG_DISABLE) 2607e689cf4aSJeff Kirsher return -EINVAL; 2608e689cf4aSJeff Kirsher 260992552fddSPhilippe Reynes if (cmd->base.autoneg == AUTONEG_ENABLE && 261092552fddSPhilippe Reynes advertising == 0) 2611e689cf4aSJeff Kirsher return -EINVAL; 2612e689cf4aSJeff Kirsher 261392552fddSPhilippe Reynes if (cmd->base.autoneg == AUTONEG_DISABLE && 2614e689cf4aSJeff Kirsher ((speed != SPEED_1000 && 2615e689cf4aSJeff Kirsher speed != SPEED_100 && 2616e689cf4aSJeff Kirsher speed != SPEED_10) || 261792552fddSPhilippe Reynes (cmd->base.duplex != DUPLEX_HALF && 261892552fddSPhilippe Reynes cmd->base.duplex != DUPLEX_FULL))) 2619e689cf4aSJeff Kirsher return -EINVAL; 2620e689cf4aSJeff Kirsher 2621e689cf4aSJeff Kirsher /* Apply settings and restart link process. */ 2622e689cf4aSJeff Kirsher if (netif_device_present(gp->dev)) { 2623e689cf4aSJeff Kirsher del_timer_sync(&gp->link_timer); 2624e689cf4aSJeff Kirsher gem_begin_auto_negotiation(gp, cmd); 2625e689cf4aSJeff Kirsher } 2626e689cf4aSJeff Kirsher 2627e689cf4aSJeff Kirsher return 0; 2628e689cf4aSJeff Kirsher } 2629e689cf4aSJeff Kirsher 2630e689cf4aSJeff Kirsher static int gem_nway_reset(struct net_device *dev) 2631e689cf4aSJeff Kirsher { 2632e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2633e689cf4aSJeff Kirsher 2634e689cf4aSJeff Kirsher if (!gp->want_autoneg) 2635e689cf4aSJeff Kirsher return -EINVAL; 2636e689cf4aSJeff Kirsher 2637e689cf4aSJeff Kirsher /* Restart link process */ 2638e689cf4aSJeff Kirsher if (netif_device_present(gp->dev)) { 2639e689cf4aSJeff Kirsher del_timer_sync(&gp->link_timer); 2640e689cf4aSJeff Kirsher gem_begin_auto_negotiation(gp, NULL); 2641e689cf4aSJeff Kirsher } 2642e689cf4aSJeff Kirsher 2643e689cf4aSJeff Kirsher return 0; 2644e689cf4aSJeff Kirsher } 2645e689cf4aSJeff Kirsher 2646e689cf4aSJeff Kirsher static u32 gem_get_msglevel(struct net_device *dev) 2647e689cf4aSJeff Kirsher { 2648e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2649e689cf4aSJeff Kirsher return gp->msg_enable; 2650e689cf4aSJeff Kirsher } 2651e689cf4aSJeff Kirsher 2652e689cf4aSJeff Kirsher static void gem_set_msglevel(struct net_device *dev, u32 value) 2653e689cf4aSJeff Kirsher { 2654e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2655e689cf4aSJeff Kirsher gp->msg_enable = value; 2656e689cf4aSJeff Kirsher } 2657e689cf4aSJeff Kirsher 2658e689cf4aSJeff Kirsher 2659e689cf4aSJeff Kirsher /* Add more when I understand how to program the chip */ 2660e689cf4aSJeff Kirsher /* like WAKE_UCAST | WAKE_MCAST | WAKE_BCAST */ 2661e689cf4aSJeff Kirsher 2662e689cf4aSJeff Kirsher #define WOL_SUPPORTED_MASK (WAKE_MAGIC) 2663e689cf4aSJeff Kirsher 2664e689cf4aSJeff Kirsher static void gem_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 2665e689cf4aSJeff Kirsher { 2666e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2667e689cf4aSJeff Kirsher 2668e689cf4aSJeff Kirsher /* Add more when I understand how to program the chip */ 2669e689cf4aSJeff Kirsher if (gp->has_wol) { 2670e689cf4aSJeff Kirsher wol->supported = WOL_SUPPORTED_MASK; 2671e689cf4aSJeff Kirsher wol->wolopts = gp->wake_on_lan; 2672e689cf4aSJeff Kirsher } else { 2673e689cf4aSJeff Kirsher wol->supported = 0; 2674e689cf4aSJeff Kirsher wol->wolopts = 0; 2675e689cf4aSJeff Kirsher } 2676e689cf4aSJeff Kirsher } 2677e689cf4aSJeff Kirsher 2678e689cf4aSJeff Kirsher static int gem_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 2679e689cf4aSJeff Kirsher { 2680e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2681e689cf4aSJeff Kirsher 2682e689cf4aSJeff Kirsher if (!gp->has_wol) 2683e689cf4aSJeff Kirsher return -EOPNOTSUPP; 2684e689cf4aSJeff Kirsher gp->wake_on_lan = wol->wolopts & WOL_SUPPORTED_MASK; 2685e689cf4aSJeff Kirsher return 0; 2686e689cf4aSJeff Kirsher } 2687e689cf4aSJeff Kirsher 2688e689cf4aSJeff Kirsher static const struct ethtool_ops gem_ethtool_ops = { 2689e689cf4aSJeff Kirsher .get_drvinfo = gem_get_drvinfo, 2690e689cf4aSJeff Kirsher .get_link = ethtool_op_get_link, 2691e689cf4aSJeff Kirsher .nway_reset = gem_nway_reset, 2692e689cf4aSJeff Kirsher .get_msglevel = gem_get_msglevel, 2693e689cf4aSJeff Kirsher .set_msglevel = gem_set_msglevel, 2694e689cf4aSJeff Kirsher .get_wol = gem_get_wol, 2695e689cf4aSJeff Kirsher .set_wol = gem_set_wol, 269692552fddSPhilippe Reynes .get_link_ksettings = gem_get_link_ksettings, 269792552fddSPhilippe Reynes .set_link_ksettings = gem_set_link_ksettings, 2698e689cf4aSJeff Kirsher }; 2699e689cf4aSJeff Kirsher 2700e689cf4aSJeff Kirsher static int gem_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 2701e689cf4aSJeff Kirsher { 2702e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2703e689cf4aSJeff Kirsher struct mii_ioctl_data *data = if_mii(ifr); 2704e689cf4aSJeff Kirsher int rc = -EOPNOTSUPP; 2705e689cf4aSJeff Kirsher 2706e689cf4aSJeff Kirsher /* For SIOCGMIIREG and SIOCSMIIREG the core checks for us that 2707e689cf4aSJeff Kirsher * netif_device_present() is true and holds rtnl_lock for us 2708e689cf4aSJeff Kirsher * so we have nothing to worry about 2709e689cf4aSJeff Kirsher */ 2710e689cf4aSJeff Kirsher 2711e689cf4aSJeff Kirsher switch (cmd) { 2712e689cf4aSJeff Kirsher case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2713e689cf4aSJeff Kirsher data->phy_id = gp->mii_phy_addr; 2714df561f66SGustavo A. R. Silva fallthrough; 2715e689cf4aSJeff Kirsher 2716e689cf4aSJeff Kirsher case SIOCGMIIREG: /* Read MII PHY register. */ 2717abc4da45SDavid S. Miller data->val_out = __sungem_phy_read(gp, data->phy_id & 0x1f, 2718e689cf4aSJeff Kirsher data->reg_num & 0x1f); 2719e689cf4aSJeff Kirsher rc = 0; 2720e689cf4aSJeff Kirsher break; 2721e689cf4aSJeff Kirsher 2722e689cf4aSJeff Kirsher case SIOCSMIIREG: /* Write MII PHY register. */ 2723abc4da45SDavid S. Miller __sungem_phy_write(gp, data->phy_id & 0x1f, data->reg_num & 0x1f, 2724e689cf4aSJeff Kirsher data->val_in); 2725e689cf4aSJeff Kirsher rc = 0; 2726e689cf4aSJeff Kirsher break; 2727e689cf4aSJeff Kirsher } 2728e689cf4aSJeff Kirsher return rc; 2729e689cf4aSJeff Kirsher } 2730e689cf4aSJeff Kirsher 2731e689cf4aSJeff Kirsher #if (!defined(CONFIG_SPARC) && !defined(CONFIG_PPC_PMAC)) 2732e689cf4aSJeff Kirsher /* Fetch MAC address from vital product data of PCI ROM. */ 2733e689cf4aSJeff Kirsher static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, unsigned char *dev_addr) 2734e689cf4aSJeff Kirsher { 2735e689cf4aSJeff Kirsher int this_offset; 2736e689cf4aSJeff Kirsher 2737e689cf4aSJeff Kirsher for (this_offset = 0x20; this_offset < len; this_offset++) { 2738e689cf4aSJeff Kirsher void __iomem *p = rom_base + this_offset; 2739e689cf4aSJeff Kirsher int i; 2740e689cf4aSJeff Kirsher 2741e689cf4aSJeff Kirsher if (readb(p + 0) != 0x90 || 2742e689cf4aSJeff Kirsher readb(p + 1) != 0x00 || 2743e689cf4aSJeff Kirsher readb(p + 2) != 0x09 || 2744e689cf4aSJeff Kirsher readb(p + 3) != 0x4e || 2745e689cf4aSJeff Kirsher readb(p + 4) != 0x41 || 2746e689cf4aSJeff Kirsher readb(p + 5) != 0x06) 2747e689cf4aSJeff Kirsher continue; 2748e689cf4aSJeff Kirsher 2749e689cf4aSJeff Kirsher this_offset += 6; 2750e689cf4aSJeff Kirsher p += 6; 2751e689cf4aSJeff Kirsher 2752e689cf4aSJeff Kirsher for (i = 0; i < 6; i++) 2753e689cf4aSJeff Kirsher dev_addr[i] = readb(p + i); 2754e689cf4aSJeff Kirsher return 1; 2755e689cf4aSJeff Kirsher } 2756e689cf4aSJeff Kirsher return 0; 2757e689cf4aSJeff Kirsher } 2758e689cf4aSJeff Kirsher 2759e689cf4aSJeff Kirsher static void get_gem_mac_nonobp(struct pci_dev *pdev, unsigned char *dev_addr) 2760e689cf4aSJeff Kirsher { 2761e689cf4aSJeff Kirsher size_t size; 2762e689cf4aSJeff Kirsher void __iomem *p = pci_map_rom(pdev, &size); 2763e689cf4aSJeff Kirsher 2764e689cf4aSJeff Kirsher if (p) { 2765e689cf4aSJeff Kirsher int found; 2766e689cf4aSJeff Kirsher 2767e689cf4aSJeff Kirsher found = readb(p) == 0x55 && 2768e689cf4aSJeff Kirsher readb(p + 1) == 0xaa && 2769e689cf4aSJeff Kirsher find_eth_addr_in_vpd(p, (64 * 1024), dev_addr); 2770e689cf4aSJeff Kirsher pci_unmap_rom(pdev, p); 2771e689cf4aSJeff Kirsher if (found) 2772e689cf4aSJeff Kirsher return; 2773e689cf4aSJeff Kirsher } 2774e689cf4aSJeff Kirsher 2775e689cf4aSJeff Kirsher /* Sun MAC prefix then 3 random bytes. */ 2776e689cf4aSJeff Kirsher dev_addr[0] = 0x08; 2777e689cf4aSJeff Kirsher dev_addr[1] = 0x00; 2778e689cf4aSJeff Kirsher dev_addr[2] = 0x20; 2779e689cf4aSJeff Kirsher get_random_bytes(dev_addr + 3, 3); 2780e689cf4aSJeff Kirsher } 2781e689cf4aSJeff Kirsher #endif /* not Sparc and not PPC */ 2782e689cf4aSJeff Kirsher 2783f73d12bdSBill Pemberton static int gem_get_device_address(struct gem *gp) 2784e689cf4aSJeff Kirsher { 2785e689cf4aSJeff Kirsher #if defined(CONFIG_SPARC) || defined(CONFIG_PPC_PMAC) 2786e689cf4aSJeff Kirsher struct net_device *dev = gp->dev; 2787e689cf4aSJeff Kirsher const unsigned char *addr; 2788e689cf4aSJeff Kirsher 2789e689cf4aSJeff Kirsher addr = of_get_property(gp->of_node, "local-mac-address", NULL); 2790e689cf4aSJeff Kirsher if (addr == NULL) { 2791e689cf4aSJeff Kirsher #ifdef CONFIG_SPARC 2792e689cf4aSJeff Kirsher addr = idprom->id_ethaddr; 2793e689cf4aSJeff Kirsher #else 2794e689cf4aSJeff Kirsher printk("\n"); 2795e689cf4aSJeff Kirsher pr_err("%s: can't get mac-address\n", dev->name); 2796e689cf4aSJeff Kirsher return -1; 2797e689cf4aSJeff Kirsher #endif 2798e689cf4aSJeff Kirsher } 2799a96d317fSJakub Kicinski eth_hw_addr_set(dev, addr); 2800e689cf4aSJeff Kirsher #else 2801a7639279SJakub Kicinski u8 addr[ETH_ALEN]; 2802a7639279SJakub Kicinski 2803a7639279SJakub Kicinski get_gem_mac_nonobp(gp->pdev, addr); 2804a7639279SJakub Kicinski eth_hw_addr_set(gp->dev, addr); 2805e689cf4aSJeff Kirsher #endif 2806e689cf4aSJeff Kirsher return 0; 2807e689cf4aSJeff Kirsher } 2808e689cf4aSJeff Kirsher 2809e689cf4aSJeff Kirsher static void gem_remove_one(struct pci_dev *pdev) 2810e689cf4aSJeff Kirsher { 2811e689cf4aSJeff Kirsher struct net_device *dev = pci_get_drvdata(pdev); 2812e689cf4aSJeff Kirsher 2813e689cf4aSJeff Kirsher if (dev) { 2814e689cf4aSJeff Kirsher struct gem *gp = netdev_priv(dev); 2815e689cf4aSJeff Kirsher 2816e689cf4aSJeff Kirsher unregister_netdev(dev); 2817e689cf4aSJeff Kirsher 2818dbedd44eSJoe Perches /* Ensure reset task is truly gone */ 2819e689cf4aSJeff Kirsher cancel_work_sync(&gp->reset_task); 2820e689cf4aSJeff Kirsher 2821e689cf4aSJeff Kirsher /* Free resources */ 28228d4f62caSChristophe JAILLET dma_free_coherent(&pdev->dev, sizeof(struct gem_init_block), 28238d4f62caSChristophe JAILLET gp->init_block, gp->gblock_dvma); 2824e689cf4aSJeff Kirsher iounmap(gp->regs); 2825e689cf4aSJeff Kirsher pci_release_regions(pdev); 2826e689cf4aSJeff Kirsher free_netdev(dev); 2827e689cf4aSJeff Kirsher } 2828e689cf4aSJeff Kirsher } 2829e689cf4aSJeff Kirsher 2830e689cf4aSJeff Kirsher static const struct net_device_ops gem_netdev_ops = { 2831e689cf4aSJeff Kirsher .ndo_open = gem_open, 2832e689cf4aSJeff Kirsher .ndo_stop = gem_close, 2833e689cf4aSJeff Kirsher .ndo_start_xmit = gem_start_xmit, 2834e689cf4aSJeff Kirsher .ndo_get_stats = gem_get_stats, 2835afc4b13dSJiri Pirko .ndo_set_rx_mode = gem_set_multicast, 2836a7605370SArnd Bergmann .ndo_eth_ioctl = gem_ioctl, 2837e689cf4aSJeff Kirsher .ndo_tx_timeout = gem_tx_timeout, 2838e689cf4aSJeff Kirsher .ndo_change_mtu = gem_change_mtu, 2839e689cf4aSJeff Kirsher .ndo_validate_addr = eth_validate_addr, 2840e689cf4aSJeff Kirsher .ndo_set_mac_address = gem_set_mac_address, 2841e689cf4aSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER 2842e689cf4aSJeff Kirsher .ndo_poll_controller = gem_poll_controller, 2843e689cf4aSJeff Kirsher #endif 2844e689cf4aSJeff Kirsher }; 2845e689cf4aSJeff Kirsher 28461dd06ae8SGreg Kroah-Hartman static int gem_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 2847e689cf4aSJeff Kirsher { 2848e689cf4aSJeff Kirsher unsigned long gemreg_base, gemreg_len; 2849e689cf4aSJeff Kirsher struct net_device *dev; 2850e689cf4aSJeff Kirsher struct gem *gp; 2851e689cf4aSJeff Kirsher int err, pci_using_dac; 2852e689cf4aSJeff Kirsher 2853e689cf4aSJeff Kirsher printk_once(KERN_INFO "%s", version); 2854e689cf4aSJeff Kirsher 2855e689cf4aSJeff Kirsher /* Apple gmac note: during probe, the chip is powered up by 2856e689cf4aSJeff Kirsher * the arch code to allow the code below to work (and to let 2857e689cf4aSJeff Kirsher * the chip be probed on the config space. It won't stay powered 2858e689cf4aSJeff Kirsher * up until the interface is brought up however, so we can't rely 2859e689cf4aSJeff Kirsher * on register configuration done at this point. 2860e689cf4aSJeff Kirsher */ 2861e689cf4aSJeff Kirsher err = pci_enable_device(pdev); 2862e689cf4aSJeff Kirsher if (err) { 2863e689cf4aSJeff Kirsher pr_err("Cannot enable MMIO operation, aborting\n"); 2864e689cf4aSJeff Kirsher return err; 2865e689cf4aSJeff Kirsher } 2866e689cf4aSJeff Kirsher pci_set_master(pdev); 2867e689cf4aSJeff Kirsher 2868e689cf4aSJeff Kirsher /* Configure DMA attributes. */ 2869e689cf4aSJeff Kirsher 2870e689cf4aSJeff Kirsher /* All of the GEM documentation states that 64-bit DMA addressing 2871e689cf4aSJeff Kirsher * is fully supported and should work just fine. However the 2872e689cf4aSJeff Kirsher * front end for RIO based GEMs is different and only supports 2873e689cf4aSJeff Kirsher * 32-bit addressing. 2874e689cf4aSJeff Kirsher * 2875e689cf4aSJeff Kirsher * For now we assume the various PPC GEMs are 32-bit only as well. 2876e689cf4aSJeff Kirsher */ 2877e689cf4aSJeff Kirsher if (pdev->vendor == PCI_VENDOR_ID_SUN && 2878e689cf4aSJeff Kirsher pdev->device == PCI_DEVICE_ID_SUN_GEM && 28798d4f62caSChristophe JAILLET !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { 2880e689cf4aSJeff Kirsher pci_using_dac = 1; 2881e689cf4aSJeff Kirsher } else { 28828d4f62caSChristophe JAILLET err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 2883e689cf4aSJeff Kirsher if (err) { 2884e689cf4aSJeff Kirsher pr_err("No usable DMA configuration, aborting\n"); 2885e689cf4aSJeff Kirsher goto err_disable_device; 2886e689cf4aSJeff Kirsher } 2887e689cf4aSJeff Kirsher pci_using_dac = 0; 2888e689cf4aSJeff Kirsher } 2889e689cf4aSJeff Kirsher 2890e689cf4aSJeff Kirsher gemreg_base = pci_resource_start(pdev, 0); 2891e689cf4aSJeff Kirsher gemreg_len = pci_resource_len(pdev, 0); 2892e689cf4aSJeff Kirsher 2893e689cf4aSJeff Kirsher if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) { 2894e689cf4aSJeff Kirsher pr_err("Cannot find proper PCI device base address, aborting\n"); 2895e689cf4aSJeff Kirsher err = -ENODEV; 2896e689cf4aSJeff Kirsher goto err_disable_device; 2897e689cf4aSJeff Kirsher } 2898e689cf4aSJeff Kirsher 2899e689cf4aSJeff Kirsher dev = alloc_etherdev(sizeof(*gp)); 2900e689cf4aSJeff Kirsher if (!dev) { 2901e689cf4aSJeff Kirsher err = -ENOMEM; 2902e689cf4aSJeff Kirsher goto err_disable_device; 2903e689cf4aSJeff Kirsher } 2904e689cf4aSJeff Kirsher SET_NETDEV_DEV(dev, &pdev->dev); 2905e689cf4aSJeff Kirsher 2906e689cf4aSJeff Kirsher gp = netdev_priv(dev); 2907e689cf4aSJeff Kirsher 2908e689cf4aSJeff Kirsher err = pci_request_regions(pdev, DRV_NAME); 2909e689cf4aSJeff Kirsher if (err) { 2910e689cf4aSJeff Kirsher pr_err("Cannot obtain PCI resources, aborting\n"); 2911e689cf4aSJeff Kirsher goto err_out_free_netdev; 2912e689cf4aSJeff Kirsher } 2913e689cf4aSJeff Kirsher 2914e689cf4aSJeff Kirsher gp->pdev = pdev; 2915e689cf4aSJeff Kirsher gp->dev = dev; 2916e689cf4aSJeff Kirsher 2917e689cf4aSJeff Kirsher gp->msg_enable = DEFAULT_MSG; 2918e689cf4aSJeff Kirsher 29190822c5d9SKees Cook timer_setup(&gp->link_timer, gem_link_timer, 0); 2920e689cf4aSJeff Kirsher 2921e689cf4aSJeff Kirsher INIT_WORK(&gp->reset_task, gem_reset_task); 2922e689cf4aSJeff Kirsher 2923e689cf4aSJeff Kirsher gp->lstate = link_down; 2924e689cf4aSJeff Kirsher gp->timer_ticks = 0; 2925e689cf4aSJeff Kirsher netif_carrier_off(dev); 2926e689cf4aSJeff Kirsher 2927e689cf4aSJeff Kirsher gp->regs = ioremap(gemreg_base, gemreg_len); 2928e689cf4aSJeff Kirsher if (!gp->regs) { 2929e689cf4aSJeff Kirsher pr_err("Cannot map device registers, aborting\n"); 2930e689cf4aSJeff Kirsher err = -EIO; 2931e689cf4aSJeff Kirsher goto err_out_free_res; 2932e689cf4aSJeff Kirsher } 2933e689cf4aSJeff Kirsher 2934e689cf4aSJeff Kirsher /* On Apple, we want a reference to the Open Firmware device-tree 2935e689cf4aSJeff Kirsher * node. We use it for clock control. 2936e689cf4aSJeff Kirsher */ 2937e689cf4aSJeff Kirsher #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC) 2938e689cf4aSJeff Kirsher gp->of_node = pci_device_to_OF_node(pdev); 2939e689cf4aSJeff Kirsher #endif 2940e689cf4aSJeff Kirsher 2941e689cf4aSJeff Kirsher /* Only Apple version supports WOL afaik */ 2942e689cf4aSJeff Kirsher if (pdev->vendor == PCI_VENDOR_ID_APPLE) 2943e689cf4aSJeff Kirsher gp->has_wol = 1; 2944e689cf4aSJeff Kirsher 2945e689cf4aSJeff Kirsher /* Make sure cell is enabled */ 2946e689cf4aSJeff Kirsher gem_get_cell(gp); 2947e689cf4aSJeff Kirsher 2948e689cf4aSJeff Kirsher /* Make sure everything is stopped and in init state */ 2949e689cf4aSJeff Kirsher gem_reset(gp); 2950e689cf4aSJeff Kirsher 2951e689cf4aSJeff Kirsher /* Fill up the mii_phy structure (even if we won't use it) */ 2952e689cf4aSJeff Kirsher gp->phy_mii.dev = dev; 2953abc4da45SDavid S. Miller gp->phy_mii.mdio_read = _sungem_phy_read; 2954abc4da45SDavid S. Miller gp->phy_mii.mdio_write = _sungem_phy_write; 2955e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC 2956e689cf4aSJeff Kirsher gp->phy_mii.platform_data = gp->of_node; 2957e689cf4aSJeff Kirsher #endif 2958e689cf4aSJeff Kirsher /* By default, we start with autoneg */ 2959e689cf4aSJeff Kirsher gp->want_autoneg = 1; 2960e689cf4aSJeff Kirsher 2961e689cf4aSJeff Kirsher /* Check fifo sizes, PHY type, etc... */ 2962e689cf4aSJeff Kirsher if (gem_check_invariants(gp)) { 2963e689cf4aSJeff Kirsher err = -ENODEV; 2964e689cf4aSJeff Kirsher goto err_out_iounmap; 2965e689cf4aSJeff Kirsher } 2966e689cf4aSJeff Kirsher 2967e689cf4aSJeff Kirsher /* It is guaranteed that the returned buffer will be at least 2968e689cf4aSJeff Kirsher * PAGE_SIZE aligned. 2969e689cf4aSJeff Kirsher */ 29701bac035cSYueHaibing gp->init_block = dma_alloc_coherent(&pdev->dev, sizeof(struct gem_init_block), 29718d4f62caSChristophe JAILLET &gp->gblock_dvma, GFP_KERNEL); 2972e689cf4aSJeff Kirsher if (!gp->init_block) { 2973e689cf4aSJeff Kirsher pr_err("Cannot allocate init block, aborting\n"); 2974e689cf4aSJeff Kirsher err = -ENOMEM; 2975e689cf4aSJeff Kirsher goto err_out_iounmap; 2976e689cf4aSJeff Kirsher } 2977e689cf4aSJeff Kirsher 29784df12834SPeter Senna Tschudin err = gem_get_device_address(gp); 29794df12834SPeter Senna Tschudin if (err) 2980e689cf4aSJeff Kirsher goto err_out_free_consistent; 2981e689cf4aSJeff Kirsher 2982e689cf4aSJeff Kirsher dev->netdev_ops = &gem_netdev_ops; 2983*b48b89f9SJakub Kicinski netif_napi_add(dev, &gp->napi, gem_poll); 2984e689cf4aSJeff Kirsher dev->ethtool_ops = &gem_ethtool_ops; 2985e689cf4aSJeff Kirsher dev->watchdog_timeo = 5 * HZ; 2986e689cf4aSJeff Kirsher dev->dma = 0; 2987e689cf4aSJeff Kirsher 2988e689cf4aSJeff Kirsher /* Set that now, in case PM kicks in now */ 2989e689cf4aSJeff Kirsher pci_set_drvdata(pdev, dev); 2990e689cf4aSJeff Kirsher 2991e689cf4aSJeff Kirsher /* We can do scatter/gather and HW checksum */ 299212b03558SEric Dumazet dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 299312b03558SEric Dumazet dev->features = dev->hw_features; 2994e689cf4aSJeff Kirsher if (pci_using_dac) 2995e689cf4aSJeff Kirsher dev->features |= NETIF_F_HIGHDMA; 2996e689cf4aSJeff Kirsher 2997540bfe30SJarod Wilson /* MTU range: 68 - 1500 (Jumbo mode is broken) */ 2998540bfe30SJarod Wilson dev->min_mtu = GEM_MIN_MTU; 2999540bfe30SJarod Wilson dev->max_mtu = GEM_MAX_MTU; 3000540bfe30SJarod Wilson 3001e689cf4aSJeff Kirsher /* Register with kernel */ 3002e689cf4aSJeff Kirsher if (register_netdev(dev)) { 3003e689cf4aSJeff Kirsher pr_err("Cannot register net device, aborting\n"); 3004e689cf4aSJeff Kirsher err = -ENOMEM; 3005e689cf4aSJeff Kirsher goto err_out_free_consistent; 3006e689cf4aSJeff Kirsher } 3007e689cf4aSJeff Kirsher 3008e689cf4aSJeff Kirsher /* Undo the get_cell with appropriate locking (we could use 3009e689cf4aSJeff Kirsher * ndo_init/uninit but that would be even more clumsy imho) 3010e689cf4aSJeff Kirsher */ 3011e689cf4aSJeff Kirsher rtnl_lock(); 3012e689cf4aSJeff Kirsher gem_put_cell(gp); 3013e689cf4aSJeff Kirsher rtnl_unlock(); 3014e689cf4aSJeff Kirsher 3015e689cf4aSJeff Kirsher netdev_info(dev, "Sun GEM (PCI) 10/100/1000BaseT Ethernet %pM\n", 3016e689cf4aSJeff Kirsher dev->dev_addr); 3017e689cf4aSJeff Kirsher return 0; 3018e689cf4aSJeff Kirsher 3019e689cf4aSJeff Kirsher err_out_free_consistent: 3020e689cf4aSJeff Kirsher gem_remove_one(pdev); 3021e689cf4aSJeff Kirsher err_out_iounmap: 3022e689cf4aSJeff Kirsher gem_put_cell(gp); 3023e689cf4aSJeff Kirsher iounmap(gp->regs); 3024e689cf4aSJeff Kirsher 3025e689cf4aSJeff Kirsher err_out_free_res: 3026e689cf4aSJeff Kirsher pci_release_regions(pdev); 3027e689cf4aSJeff Kirsher 3028e689cf4aSJeff Kirsher err_out_free_netdev: 3029e689cf4aSJeff Kirsher free_netdev(dev); 3030e689cf4aSJeff Kirsher err_disable_device: 3031e689cf4aSJeff Kirsher pci_disable_device(pdev); 3032e689cf4aSJeff Kirsher return err; 3033e689cf4aSJeff Kirsher 3034e689cf4aSJeff Kirsher } 3035e689cf4aSJeff Kirsher 3036d4ce70b3SVaibhav Gupta static SIMPLE_DEV_PM_OPS(gem_pm_ops, gem_suspend, gem_resume); 3037e689cf4aSJeff Kirsher 3038e689cf4aSJeff Kirsher static struct pci_driver gem_driver = { 3039e689cf4aSJeff Kirsher .name = GEM_MODULE_NAME, 3040e689cf4aSJeff Kirsher .id_table = gem_pci_tbl, 3041e689cf4aSJeff Kirsher .probe = gem_init_one, 3042e689cf4aSJeff Kirsher .remove = gem_remove_one, 3043d4ce70b3SVaibhav Gupta .driver.pm = &gem_pm_ops, 3044e689cf4aSJeff Kirsher }; 3045e689cf4aSJeff Kirsher 30465119ad0bSPeter Hüwe module_pci_driver(gem_driver); 3047