xref: /openbmc/linux/drivers/net/ethernet/sun/sungem.c (revision 0800d88e)
1c861ef83SShannon Nelson // SPDX-License-Identifier: GPL-2.0
2e689cf4aSJeff Kirsher /* $Id: sungem.c,v 1.44.2.22 2002/03/13 01:18:12 davem Exp $
3e689cf4aSJeff Kirsher  * sungem.c: Sun GEM ethernet driver.
4e689cf4aSJeff Kirsher  *
5e689cf4aSJeff Kirsher  * Copyright (C) 2000, 2001, 2002, 2003 David S. Miller (davem@redhat.com)
6e689cf4aSJeff Kirsher  *
7e689cf4aSJeff Kirsher  * Support for Apple GMAC and assorted PHYs, WOL, Power Management
8e689cf4aSJeff Kirsher  * (C) 2001,2002,2003 Benjamin Herrenscmidt (benh@kernel.crashing.org)
9e689cf4aSJeff Kirsher  * (C) 2004,2005 Benjamin Herrenscmidt, IBM Corp.
10e689cf4aSJeff Kirsher  *
11e689cf4aSJeff Kirsher  * NAPI and NETPOLL support
12e689cf4aSJeff Kirsher  * (C) 2004 by Eric Lemoine (eric.lemoine@gmail.com)
13e689cf4aSJeff Kirsher  *
14e689cf4aSJeff Kirsher  */
15e689cf4aSJeff Kirsher 
16e689cf4aSJeff Kirsher #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17e689cf4aSJeff Kirsher 
18e689cf4aSJeff Kirsher #include <linux/module.h>
19e689cf4aSJeff Kirsher #include <linux/kernel.h>
20e689cf4aSJeff Kirsher #include <linux/types.h>
21e689cf4aSJeff Kirsher #include <linux/fcntl.h>
22e689cf4aSJeff Kirsher #include <linux/interrupt.h>
23e689cf4aSJeff Kirsher #include <linux/ioport.h>
24e689cf4aSJeff Kirsher #include <linux/in.h>
25e689cf4aSJeff Kirsher #include <linux/sched.h>
26e689cf4aSJeff Kirsher #include <linux/string.h>
27e689cf4aSJeff Kirsher #include <linux/delay.h>
28e689cf4aSJeff Kirsher #include <linux/errno.h>
29e689cf4aSJeff Kirsher #include <linux/pci.h>
30e689cf4aSJeff Kirsher #include <linux/dma-mapping.h>
31e689cf4aSJeff Kirsher #include <linux/netdevice.h>
32e689cf4aSJeff Kirsher #include <linux/etherdevice.h>
33e689cf4aSJeff Kirsher #include <linux/skbuff.h>
34e689cf4aSJeff Kirsher #include <linux/mii.h>
35e689cf4aSJeff Kirsher #include <linux/ethtool.h>
36e689cf4aSJeff Kirsher #include <linux/crc32.h>
37e689cf4aSJeff Kirsher #include <linux/random.h>
38e689cf4aSJeff Kirsher #include <linux/workqueue.h>
39e689cf4aSJeff Kirsher #include <linux/if_vlan.h>
40e689cf4aSJeff Kirsher #include <linux/bitops.h>
41e689cf4aSJeff Kirsher #include <linux/mm.h>
42e689cf4aSJeff Kirsher #include <linux/gfp.h>
43e689cf4aSJeff Kirsher 
44e689cf4aSJeff Kirsher #include <asm/io.h>
45e689cf4aSJeff Kirsher #include <asm/byteorder.h>
467c0f6ba6SLinus Torvalds #include <linux/uaccess.h>
47e689cf4aSJeff Kirsher #include <asm/irq.h>
48e689cf4aSJeff Kirsher 
49e689cf4aSJeff Kirsher #ifdef CONFIG_SPARC
50e689cf4aSJeff Kirsher #include <asm/idprom.h>
51e689cf4aSJeff Kirsher #include <asm/prom.h>
52e689cf4aSJeff Kirsher #endif
53e689cf4aSJeff Kirsher 
54e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC
55e689cf4aSJeff Kirsher #include <asm/prom.h>
56e689cf4aSJeff Kirsher #include <asm/machdep.h>
57e689cf4aSJeff Kirsher #include <asm/pmac_feature.h>
58e689cf4aSJeff Kirsher #endif
59e689cf4aSJeff Kirsher 
602bb69841SDavid S. Miller #include <linux/sungem_phy.h>
61e689cf4aSJeff Kirsher #include "sungem.h"
62e689cf4aSJeff Kirsher 
6312b03558SEric Dumazet #define STRIP_FCS
64e689cf4aSJeff Kirsher 
65e689cf4aSJeff Kirsher #define DEFAULT_MSG	(NETIF_MSG_DRV		| \
66e689cf4aSJeff Kirsher 			 NETIF_MSG_PROBE	| \
67e689cf4aSJeff Kirsher 			 NETIF_MSG_LINK)
68e689cf4aSJeff Kirsher 
69e689cf4aSJeff Kirsher #define ADVERTISE_MASK	(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \
70e689cf4aSJeff Kirsher 			 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
71e689cf4aSJeff Kirsher 			 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full | \
72e689cf4aSJeff Kirsher 			 SUPPORTED_Pause | SUPPORTED_Autoneg)
73e689cf4aSJeff Kirsher 
74e689cf4aSJeff Kirsher #define DRV_NAME	"sungem"
75e689cf4aSJeff Kirsher #define DRV_VERSION	"1.0"
76e689cf4aSJeff Kirsher #define DRV_AUTHOR	"David S. Miller <davem@redhat.com>"
77e689cf4aSJeff Kirsher 
78f73d12bdSBill Pemberton static char version[] =
79e689cf4aSJeff Kirsher         DRV_NAME ".c:v" DRV_VERSION " " DRV_AUTHOR "\n";
80e689cf4aSJeff Kirsher 
81e689cf4aSJeff Kirsher MODULE_AUTHOR(DRV_AUTHOR);
82e689cf4aSJeff Kirsher MODULE_DESCRIPTION("Sun GEM Gbit ethernet driver");
83e689cf4aSJeff Kirsher MODULE_LICENSE("GPL");
84e689cf4aSJeff Kirsher 
85e689cf4aSJeff Kirsher #define GEM_MODULE_NAME	"gem"
86e689cf4aSJeff Kirsher 
879baa3c34SBenoit Taine static const struct pci_device_id gem_pci_tbl[] = {
88e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_GEM,
89e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
90e689cf4aSJeff Kirsher 
91e689cf4aSJeff Kirsher 	/* These models only differ from the original GEM in
92e689cf4aSJeff Kirsher 	 * that their tx/rx fifos are of a different size and
93e689cf4aSJeff Kirsher 	 * they only support 10/100 speeds. -DaveM
94e689cf4aSJeff Kirsher 	 *
95e689cf4aSJeff Kirsher 	 * Apple's GMAC does support gigabit on machines with
96e689cf4aSJeff Kirsher 	 * the BCM54xx PHYs. -BenH
97e689cf4aSJeff Kirsher 	 */
98e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_RIO_GEM,
99e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
100e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_GMAC,
101e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
102e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_GMACP,
103e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
104e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_GMAC2,
105e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
106e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_GMAC,
107e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
108e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_SUNGEM,
109e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
110e689cf4aSJeff Kirsher 	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID2_GMAC,
111e689cf4aSJeff Kirsher 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
112e689cf4aSJeff Kirsher 	{0, }
113e689cf4aSJeff Kirsher };
114e689cf4aSJeff Kirsher 
115e689cf4aSJeff Kirsher MODULE_DEVICE_TABLE(pci, gem_pci_tbl);
116e689cf4aSJeff Kirsher 
117abc4da45SDavid S. Miller static u16 __sungem_phy_read(struct gem *gp, int phy_addr, int reg)
118e689cf4aSJeff Kirsher {
119e689cf4aSJeff Kirsher 	u32 cmd;
120e689cf4aSJeff Kirsher 	int limit = 10000;
121e689cf4aSJeff Kirsher 
122e689cf4aSJeff Kirsher 	cmd  = (1 << 30);
123e689cf4aSJeff Kirsher 	cmd |= (2 << 28);
124e689cf4aSJeff Kirsher 	cmd |= (phy_addr << 23) & MIF_FRAME_PHYAD;
125e689cf4aSJeff Kirsher 	cmd |= (reg << 18) & MIF_FRAME_REGAD;
126e689cf4aSJeff Kirsher 	cmd |= (MIF_FRAME_TAMSB);
127e689cf4aSJeff Kirsher 	writel(cmd, gp->regs + MIF_FRAME);
128e689cf4aSJeff Kirsher 
129e689cf4aSJeff Kirsher 	while (--limit) {
130e689cf4aSJeff Kirsher 		cmd = readl(gp->regs + MIF_FRAME);
131e689cf4aSJeff Kirsher 		if (cmd & MIF_FRAME_TALSB)
132e689cf4aSJeff Kirsher 			break;
133e689cf4aSJeff Kirsher 
134e689cf4aSJeff Kirsher 		udelay(10);
135e689cf4aSJeff Kirsher 	}
136e689cf4aSJeff Kirsher 
137e689cf4aSJeff Kirsher 	if (!limit)
138e689cf4aSJeff Kirsher 		cmd = 0xffff;
139e689cf4aSJeff Kirsher 
140e689cf4aSJeff Kirsher 	return cmd & MIF_FRAME_DATA;
141e689cf4aSJeff Kirsher }
142e689cf4aSJeff Kirsher 
143abc4da45SDavid S. Miller static inline int _sungem_phy_read(struct net_device *dev, int mii_id, int reg)
144e689cf4aSJeff Kirsher {
145e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
146abc4da45SDavid S. Miller 	return __sungem_phy_read(gp, mii_id, reg);
147e689cf4aSJeff Kirsher }
148e689cf4aSJeff Kirsher 
149abc4da45SDavid S. Miller static inline u16 sungem_phy_read(struct gem *gp, int reg)
150e689cf4aSJeff Kirsher {
151abc4da45SDavid S. Miller 	return __sungem_phy_read(gp, gp->mii_phy_addr, reg);
152e689cf4aSJeff Kirsher }
153e689cf4aSJeff Kirsher 
154abc4da45SDavid S. Miller static void __sungem_phy_write(struct gem *gp, int phy_addr, int reg, u16 val)
155e689cf4aSJeff Kirsher {
156e689cf4aSJeff Kirsher 	u32 cmd;
157e689cf4aSJeff Kirsher 	int limit = 10000;
158e689cf4aSJeff Kirsher 
159e689cf4aSJeff Kirsher 	cmd  = (1 << 30);
160e689cf4aSJeff Kirsher 	cmd |= (1 << 28);
161e689cf4aSJeff Kirsher 	cmd |= (phy_addr << 23) & MIF_FRAME_PHYAD;
162e689cf4aSJeff Kirsher 	cmd |= (reg << 18) & MIF_FRAME_REGAD;
163e689cf4aSJeff Kirsher 	cmd |= (MIF_FRAME_TAMSB);
164e689cf4aSJeff Kirsher 	cmd |= (val & MIF_FRAME_DATA);
165e689cf4aSJeff Kirsher 	writel(cmd, gp->regs + MIF_FRAME);
166e689cf4aSJeff Kirsher 
167e689cf4aSJeff Kirsher 	while (limit--) {
168e689cf4aSJeff Kirsher 		cmd = readl(gp->regs + MIF_FRAME);
169e689cf4aSJeff Kirsher 		if (cmd & MIF_FRAME_TALSB)
170e689cf4aSJeff Kirsher 			break;
171e689cf4aSJeff Kirsher 
172e689cf4aSJeff Kirsher 		udelay(10);
173e689cf4aSJeff Kirsher 	}
174e689cf4aSJeff Kirsher }
175e689cf4aSJeff Kirsher 
176abc4da45SDavid S. Miller static inline void _sungem_phy_write(struct net_device *dev, int mii_id, int reg, int val)
177e689cf4aSJeff Kirsher {
178e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
179abc4da45SDavid S. Miller 	__sungem_phy_write(gp, mii_id, reg, val & 0xffff);
180e689cf4aSJeff Kirsher }
181e689cf4aSJeff Kirsher 
182abc4da45SDavid S. Miller static inline void sungem_phy_write(struct gem *gp, int reg, u16 val)
183e689cf4aSJeff Kirsher {
184abc4da45SDavid S. Miller 	__sungem_phy_write(gp, gp->mii_phy_addr, reg, val);
185e689cf4aSJeff Kirsher }
186e689cf4aSJeff Kirsher 
187e689cf4aSJeff Kirsher static inline void gem_enable_ints(struct gem *gp)
188e689cf4aSJeff Kirsher {
189e689cf4aSJeff Kirsher 	/* Enable all interrupts but TXDONE */
190e689cf4aSJeff Kirsher 	writel(GREG_STAT_TXDONE, gp->regs + GREG_IMASK);
191e689cf4aSJeff Kirsher }
192e689cf4aSJeff Kirsher 
193e689cf4aSJeff Kirsher static inline void gem_disable_ints(struct gem *gp)
194e689cf4aSJeff Kirsher {
195e689cf4aSJeff Kirsher 	/* Disable all interrupts, including TXDONE */
196e689cf4aSJeff Kirsher 	writel(GREG_STAT_NAPI | GREG_STAT_TXDONE, gp->regs + GREG_IMASK);
197e689cf4aSJeff Kirsher 	(void)readl(gp->regs + GREG_IMASK); /* write posting */
198e689cf4aSJeff Kirsher }
199e689cf4aSJeff Kirsher 
200e689cf4aSJeff Kirsher static void gem_get_cell(struct gem *gp)
201e689cf4aSJeff Kirsher {
202e689cf4aSJeff Kirsher 	BUG_ON(gp->cell_enabled < 0);
203e689cf4aSJeff Kirsher 	gp->cell_enabled++;
204e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC
205e689cf4aSJeff Kirsher 	if (gp->cell_enabled == 1) {
206e689cf4aSJeff Kirsher 		mb();
207e689cf4aSJeff Kirsher 		pmac_call_feature(PMAC_FTR_GMAC_ENABLE, gp->of_node, 0, 1);
208e689cf4aSJeff Kirsher 		udelay(10);
209e689cf4aSJeff Kirsher 	}
210e689cf4aSJeff Kirsher #endif /* CONFIG_PPC_PMAC */
211e689cf4aSJeff Kirsher }
212e689cf4aSJeff Kirsher 
213e689cf4aSJeff Kirsher /* Turn off the chip's clock */
214e689cf4aSJeff Kirsher static void gem_put_cell(struct gem *gp)
215e689cf4aSJeff Kirsher {
216e689cf4aSJeff Kirsher 	BUG_ON(gp->cell_enabled <= 0);
217e689cf4aSJeff Kirsher 	gp->cell_enabled--;
218e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC
219e689cf4aSJeff Kirsher 	if (gp->cell_enabled == 0) {
220e689cf4aSJeff Kirsher 		mb();
221e689cf4aSJeff Kirsher 		pmac_call_feature(PMAC_FTR_GMAC_ENABLE, gp->of_node, 0, 0);
222e689cf4aSJeff Kirsher 		udelay(10);
223e689cf4aSJeff Kirsher 	}
224e689cf4aSJeff Kirsher #endif /* CONFIG_PPC_PMAC */
225e689cf4aSJeff Kirsher }
226e689cf4aSJeff Kirsher 
227e689cf4aSJeff Kirsher static inline void gem_netif_stop(struct gem *gp)
228e689cf4aSJeff Kirsher {
229860e9538SFlorian Westphal 	netif_trans_update(gp->dev);	/* prevent tx timeout */
230e689cf4aSJeff Kirsher 	napi_disable(&gp->napi);
231e689cf4aSJeff Kirsher 	netif_tx_disable(gp->dev);
232e689cf4aSJeff Kirsher }
233e689cf4aSJeff Kirsher 
234e689cf4aSJeff Kirsher static inline void gem_netif_start(struct gem *gp)
235e689cf4aSJeff Kirsher {
236e689cf4aSJeff Kirsher 	/* NOTE: unconditional netif_wake_queue is only
237e689cf4aSJeff Kirsher 	 * appropriate so long as all callers are assured to
238e689cf4aSJeff Kirsher 	 * have free tx slots.
239e689cf4aSJeff Kirsher 	 */
240e689cf4aSJeff Kirsher 	netif_wake_queue(gp->dev);
241e689cf4aSJeff Kirsher 	napi_enable(&gp->napi);
242e689cf4aSJeff Kirsher }
243e689cf4aSJeff Kirsher 
244e689cf4aSJeff Kirsher static void gem_schedule_reset(struct gem *gp)
245e689cf4aSJeff Kirsher {
246e689cf4aSJeff Kirsher 	gp->reset_task_pending = 1;
247e689cf4aSJeff Kirsher 	schedule_work(&gp->reset_task);
248e689cf4aSJeff Kirsher }
249e689cf4aSJeff Kirsher 
250e689cf4aSJeff Kirsher static void gem_handle_mif_event(struct gem *gp, u32 reg_val, u32 changed_bits)
251e689cf4aSJeff Kirsher {
252e689cf4aSJeff Kirsher 	if (netif_msg_intr(gp))
253e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: mif interrupt\n", gp->dev->name);
254e689cf4aSJeff Kirsher }
255e689cf4aSJeff Kirsher 
256e689cf4aSJeff Kirsher static int gem_pcs_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
257e689cf4aSJeff Kirsher {
258e689cf4aSJeff Kirsher 	u32 pcs_istat = readl(gp->regs + PCS_ISTAT);
259e689cf4aSJeff Kirsher 	u32 pcs_miistat;
260e689cf4aSJeff Kirsher 
261e689cf4aSJeff Kirsher 	if (netif_msg_intr(gp))
262e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: pcs interrupt, pcs_istat: 0x%x\n",
263e689cf4aSJeff Kirsher 			gp->dev->name, pcs_istat);
264e689cf4aSJeff Kirsher 
265e689cf4aSJeff Kirsher 	if (!(pcs_istat & PCS_ISTAT_LSC)) {
266e689cf4aSJeff Kirsher 		netdev_err(dev, "PCS irq but no link status change???\n");
267e689cf4aSJeff Kirsher 		return 0;
268e689cf4aSJeff Kirsher 	}
269e689cf4aSJeff Kirsher 
270e689cf4aSJeff Kirsher 	/* The link status bit latches on zero, so you must
271e689cf4aSJeff Kirsher 	 * read it twice in such a case to see a transition
272e689cf4aSJeff Kirsher 	 * to the link being up.
273e689cf4aSJeff Kirsher 	 */
274e689cf4aSJeff Kirsher 	pcs_miistat = readl(gp->regs + PCS_MIISTAT);
275e689cf4aSJeff Kirsher 	if (!(pcs_miistat & PCS_MIISTAT_LS))
276e689cf4aSJeff Kirsher 		pcs_miistat |=
277e689cf4aSJeff Kirsher 			(readl(gp->regs + PCS_MIISTAT) &
278e689cf4aSJeff Kirsher 			 PCS_MIISTAT_LS);
279e689cf4aSJeff Kirsher 
280e689cf4aSJeff Kirsher 	if (pcs_miistat & PCS_MIISTAT_ANC) {
281e689cf4aSJeff Kirsher 		/* The remote-fault indication is only valid
282e689cf4aSJeff Kirsher 		 * when autoneg has completed.
283e689cf4aSJeff Kirsher 		 */
284e689cf4aSJeff Kirsher 		if (pcs_miistat & PCS_MIISTAT_RF)
285e689cf4aSJeff Kirsher 			netdev_info(dev, "PCS AutoNEG complete, RemoteFault\n");
286e689cf4aSJeff Kirsher 		else
287e689cf4aSJeff Kirsher 			netdev_info(dev, "PCS AutoNEG complete\n");
288e689cf4aSJeff Kirsher 	}
289e689cf4aSJeff Kirsher 
290e689cf4aSJeff Kirsher 	if (pcs_miistat & PCS_MIISTAT_LS) {
291e689cf4aSJeff Kirsher 		netdev_info(dev, "PCS link is now up\n");
292e689cf4aSJeff Kirsher 		netif_carrier_on(gp->dev);
293e689cf4aSJeff Kirsher 	} else {
294e689cf4aSJeff Kirsher 		netdev_info(dev, "PCS link is now down\n");
295e689cf4aSJeff Kirsher 		netif_carrier_off(gp->dev);
296e689cf4aSJeff Kirsher 		/* If this happens and the link timer is not running,
297e689cf4aSJeff Kirsher 		 * reset so we re-negotiate.
298e689cf4aSJeff Kirsher 		 */
299e689cf4aSJeff Kirsher 		if (!timer_pending(&gp->link_timer))
300e689cf4aSJeff Kirsher 			return 1;
301e689cf4aSJeff Kirsher 	}
302e689cf4aSJeff Kirsher 
303e689cf4aSJeff Kirsher 	return 0;
304e689cf4aSJeff Kirsher }
305e689cf4aSJeff Kirsher 
306e689cf4aSJeff Kirsher static int gem_txmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
307e689cf4aSJeff Kirsher {
308e689cf4aSJeff Kirsher 	u32 txmac_stat = readl(gp->regs + MAC_TXSTAT);
309e689cf4aSJeff Kirsher 
310e689cf4aSJeff Kirsher 	if (netif_msg_intr(gp))
311e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: txmac interrupt, txmac_stat: 0x%x\n",
312e689cf4aSJeff Kirsher 			gp->dev->name, txmac_stat);
313e689cf4aSJeff Kirsher 
314e689cf4aSJeff Kirsher 	/* Defer timer expiration is quite normal,
315e689cf4aSJeff Kirsher 	 * don't even log the event.
316e689cf4aSJeff Kirsher 	 */
317e689cf4aSJeff Kirsher 	if ((txmac_stat & MAC_TXSTAT_DTE) &&
318e689cf4aSJeff Kirsher 	    !(txmac_stat & ~MAC_TXSTAT_DTE))
319e689cf4aSJeff Kirsher 		return 0;
320e689cf4aSJeff Kirsher 
321e689cf4aSJeff Kirsher 	if (txmac_stat & MAC_TXSTAT_URUN) {
322e689cf4aSJeff Kirsher 		netdev_err(dev, "TX MAC xmit underrun\n");
323e689cf4aSJeff Kirsher 		dev->stats.tx_fifo_errors++;
324e689cf4aSJeff Kirsher 	}
325e689cf4aSJeff Kirsher 
326e689cf4aSJeff Kirsher 	if (txmac_stat & MAC_TXSTAT_MPE) {
327e689cf4aSJeff Kirsher 		netdev_err(dev, "TX MAC max packet size error\n");
328e689cf4aSJeff Kirsher 		dev->stats.tx_errors++;
329e689cf4aSJeff Kirsher 	}
330e689cf4aSJeff Kirsher 
331e689cf4aSJeff Kirsher 	/* The rest are all cases of one of the 16-bit TX
332e689cf4aSJeff Kirsher 	 * counters expiring.
333e689cf4aSJeff Kirsher 	 */
334e689cf4aSJeff Kirsher 	if (txmac_stat & MAC_TXSTAT_NCE)
335e689cf4aSJeff Kirsher 		dev->stats.collisions += 0x10000;
336e689cf4aSJeff Kirsher 
337e689cf4aSJeff Kirsher 	if (txmac_stat & MAC_TXSTAT_ECE) {
338e689cf4aSJeff Kirsher 		dev->stats.tx_aborted_errors += 0x10000;
339e689cf4aSJeff Kirsher 		dev->stats.collisions += 0x10000;
340e689cf4aSJeff Kirsher 	}
341e689cf4aSJeff Kirsher 
342e689cf4aSJeff Kirsher 	if (txmac_stat & MAC_TXSTAT_LCE) {
343e689cf4aSJeff Kirsher 		dev->stats.tx_aborted_errors += 0x10000;
344e689cf4aSJeff Kirsher 		dev->stats.collisions += 0x10000;
345e689cf4aSJeff Kirsher 	}
346e689cf4aSJeff Kirsher 
347e689cf4aSJeff Kirsher 	/* We do not keep track of MAC_TXSTAT_FCE and
348e689cf4aSJeff Kirsher 	 * MAC_TXSTAT_PCE events.
349e689cf4aSJeff Kirsher 	 */
350e689cf4aSJeff Kirsher 	return 0;
351e689cf4aSJeff Kirsher }
352e689cf4aSJeff Kirsher 
353e689cf4aSJeff Kirsher /* When we get a RX fifo overflow, the RX unit in GEM is probably hung
354e689cf4aSJeff Kirsher  * so we do the following.
355e689cf4aSJeff Kirsher  *
356e689cf4aSJeff Kirsher  * If any part of the reset goes wrong, we return 1 and that causes the
357e689cf4aSJeff Kirsher  * whole chip to be reset.
358e689cf4aSJeff Kirsher  */
359e689cf4aSJeff Kirsher static int gem_rxmac_reset(struct gem *gp)
360e689cf4aSJeff Kirsher {
361e689cf4aSJeff Kirsher 	struct net_device *dev = gp->dev;
362e689cf4aSJeff Kirsher 	int limit, i;
363e689cf4aSJeff Kirsher 	u64 desc_dma;
364e689cf4aSJeff Kirsher 	u32 val;
365e689cf4aSJeff Kirsher 
366e689cf4aSJeff Kirsher 	/* First, reset & disable MAC RX. */
367e689cf4aSJeff Kirsher 	writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST);
368e689cf4aSJeff Kirsher 	for (limit = 0; limit < 5000; limit++) {
369e689cf4aSJeff Kirsher 		if (!(readl(gp->regs + MAC_RXRST) & MAC_RXRST_CMD))
370e689cf4aSJeff Kirsher 			break;
371e689cf4aSJeff Kirsher 		udelay(10);
372e689cf4aSJeff Kirsher 	}
373e689cf4aSJeff Kirsher 	if (limit == 5000) {
374e689cf4aSJeff Kirsher 		netdev_err(dev, "RX MAC will not reset, resetting whole chip\n");
375e689cf4aSJeff Kirsher 		return 1;
376e689cf4aSJeff Kirsher 	}
377e689cf4aSJeff Kirsher 
378e689cf4aSJeff Kirsher 	writel(gp->mac_rx_cfg & ~MAC_RXCFG_ENAB,
379e689cf4aSJeff Kirsher 	       gp->regs + MAC_RXCFG);
380e689cf4aSJeff Kirsher 	for (limit = 0; limit < 5000; limit++) {
381e689cf4aSJeff Kirsher 		if (!(readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB))
382e689cf4aSJeff Kirsher 			break;
383e689cf4aSJeff Kirsher 		udelay(10);
384e689cf4aSJeff Kirsher 	}
385e689cf4aSJeff Kirsher 	if (limit == 5000) {
386e689cf4aSJeff Kirsher 		netdev_err(dev, "RX MAC will not disable, resetting whole chip\n");
387e689cf4aSJeff Kirsher 		return 1;
388e689cf4aSJeff Kirsher 	}
389e689cf4aSJeff Kirsher 
390e689cf4aSJeff Kirsher 	/* Second, disable RX DMA. */
391e689cf4aSJeff Kirsher 	writel(0, gp->regs + RXDMA_CFG);
392e689cf4aSJeff Kirsher 	for (limit = 0; limit < 5000; limit++) {
393e689cf4aSJeff Kirsher 		if (!(readl(gp->regs + RXDMA_CFG) & RXDMA_CFG_ENABLE))
394e689cf4aSJeff Kirsher 			break;
395e689cf4aSJeff Kirsher 		udelay(10);
396e689cf4aSJeff Kirsher 	}
397e689cf4aSJeff Kirsher 	if (limit == 5000) {
398e689cf4aSJeff Kirsher 		netdev_err(dev, "RX DMA will not disable, resetting whole chip\n");
399e689cf4aSJeff Kirsher 		return 1;
400e689cf4aSJeff Kirsher 	}
401e689cf4aSJeff Kirsher 
4023a22d5d5SArnd Bergmann 	mdelay(5);
403e689cf4aSJeff Kirsher 
404e689cf4aSJeff Kirsher 	/* Execute RX reset command. */
405e689cf4aSJeff Kirsher 	writel(gp->swrst_base | GREG_SWRST_RXRST,
406e689cf4aSJeff Kirsher 	       gp->regs + GREG_SWRST);
407e689cf4aSJeff Kirsher 	for (limit = 0; limit < 5000; limit++) {
408e689cf4aSJeff Kirsher 		if (!(readl(gp->regs + GREG_SWRST) & GREG_SWRST_RXRST))
409e689cf4aSJeff Kirsher 			break;
410e689cf4aSJeff Kirsher 		udelay(10);
411e689cf4aSJeff Kirsher 	}
412e689cf4aSJeff Kirsher 	if (limit == 5000) {
413e689cf4aSJeff Kirsher 		netdev_err(dev, "RX reset command will not execute, resetting whole chip\n");
414e689cf4aSJeff Kirsher 		return 1;
415e689cf4aSJeff Kirsher 	}
416e689cf4aSJeff Kirsher 
417e689cf4aSJeff Kirsher 	/* Refresh the RX ring. */
418e689cf4aSJeff Kirsher 	for (i = 0; i < RX_RING_SIZE; i++) {
419e689cf4aSJeff Kirsher 		struct gem_rxd *rxd = &gp->init_block->rxd[i];
420e689cf4aSJeff Kirsher 
421e689cf4aSJeff Kirsher 		if (gp->rx_skbs[i] == NULL) {
422e689cf4aSJeff Kirsher 			netdev_err(dev, "Parts of RX ring empty, resetting whole chip\n");
423e689cf4aSJeff Kirsher 			return 1;
424e689cf4aSJeff Kirsher 		}
425e689cf4aSJeff Kirsher 
426e689cf4aSJeff Kirsher 		rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp));
427e689cf4aSJeff Kirsher 	}
428e689cf4aSJeff Kirsher 	gp->rx_new = gp->rx_old = 0;
429e689cf4aSJeff Kirsher 
430e689cf4aSJeff Kirsher 	/* Now we must reprogram the rest of RX unit. */
431e689cf4aSJeff Kirsher 	desc_dma = (u64) gp->gblock_dvma;
432e689cf4aSJeff Kirsher 	desc_dma += (INIT_BLOCK_TX_RING_SIZE * sizeof(struct gem_txd));
433e689cf4aSJeff Kirsher 	writel(desc_dma >> 32, gp->regs + RXDMA_DBHI);
434e689cf4aSJeff Kirsher 	writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW);
435e689cf4aSJeff Kirsher 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
436e689cf4aSJeff Kirsher 	val = (RXDMA_CFG_BASE | (RX_OFFSET << 10) |
43712b03558SEric Dumazet 	       (ETH_HLEN << 13) | RXDMA_CFG_FTHRESH_128);
438e689cf4aSJeff Kirsher 	writel(val, gp->regs + RXDMA_CFG);
439e689cf4aSJeff Kirsher 	if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)
440e689cf4aSJeff Kirsher 		writel(((5 & RXDMA_BLANK_IPKTS) |
441e689cf4aSJeff Kirsher 			((8 << 12) & RXDMA_BLANK_ITIME)),
442e689cf4aSJeff Kirsher 		       gp->regs + RXDMA_BLANK);
443e689cf4aSJeff Kirsher 	else
444e689cf4aSJeff Kirsher 		writel(((5 & RXDMA_BLANK_IPKTS) |
445e689cf4aSJeff Kirsher 			((4 << 12) & RXDMA_BLANK_ITIME)),
446e689cf4aSJeff Kirsher 		       gp->regs + RXDMA_BLANK);
447e689cf4aSJeff Kirsher 	val  = (((gp->rx_pause_off / 64) << 0) & RXDMA_PTHRESH_OFF);
448e689cf4aSJeff Kirsher 	val |= (((gp->rx_pause_on / 64) << 12) & RXDMA_PTHRESH_ON);
449e689cf4aSJeff Kirsher 	writel(val, gp->regs + RXDMA_PTHRESH);
450e689cf4aSJeff Kirsher 	val = readl(gp->regs + RXDMA_CFG);
451e689cf4aSJeff Kirsher 	writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG);
452e689cf4aSJeff Kirsher 	writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK);
453e689cf4aSJeff Kirsher 	val = readl(gp->regs + MAC_RXCFG);
454e689cf4aSJeff Kirsher 	writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
455e689cf4aSJeff Kirsher 
456e689cf4aSJeff Kirsher 	return 0;
457e689cf4aSJeff Kirsher }
458e689cf4aSJeff Kirsher 
459e689cf4aSJeff Kirsher static int gem_rxmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
460e689cf4aSJeff Kirsher {
461e689cf4aSJeff Kirsher 	u32 rxmac_stat = readl(gp->regs + MAC_RXSTAT);
462e689cf4aSJeff Kirsher 	int ret = 0;
463e689cf4aSJeff Kirsher 
464e689cf4aSJeff Kirsher 	if (netif_msg_intr(gp))
465e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: rxmac interrupt, rxmac_stat: 0x%x\n",
466e689cf4aSJeff Kirsher 			gp->dev->name, rxmac_stat);
467e689cf4aSJeff Kirsher 
468e689cf4aSJeff Kirsher 	if (rxmac_stat & MAC_RXSTAT_OFLW) {
469e689cf4aSJeff Kirsher 		u32 smac = readl(gp->regs + MAC_SMACHINE);
470e689cf4aSJeff Kirsher 
471e689cf4aSJeff Kirsher 		netdev_err(dev, "RX MAC fifo overflow smac[%08x]\n", smac);
472e689cf4aSJeff Kirsher 		dev->stats.rx_over_errors++;
473e689cf4aSJeff Kirsher 		dev->stats.rx_fifo_errors++;
474e689cf4aSJeff Kirsher 
475e689cf4aSJeff Kirsher 		ret = gem_rxmac_reset(gp);
476e689cf4aSJeff Kirsher 	}
477e689cf4aSJeff Kirsher 
478e689cf4aSJeff Kirsher 	if (rxmac_stat & MAC_RXSTAT_ACE)
479e689cf4aSJeff Kirsher 		dev->stats.rx_frame_errors += 0x10000;
480e689cf4aSJeff Kirsher 
481e689cf4aSJeff Kirsher 	if (rxmac_stat & MAC_RXSTAT_CCE)
482e689cf4aSJeff Kirsher 		dev->stats.rx_crc_errors += 0x10000;
483e689cf4aSJeff Kirsher 
484e689cf4aSJeff Kirsher 	if (rxmac_stat & MAC_RXSTAT_LCE)
485e689cf4aSJeff Kirsher 		dev->stats.rx_length_errors += 0x10000;
486e689cf4aSJeff Kirsher 
487e689cf4aSJeff Kirsher 	/* We do not track MAC_RXSTAT_FCE and MAC_RXSTAT_VCE
488e689cf4aSJeff Kirsher 	 * events.
489e689cf4aSJeff Kirsher 	 */
490e689cf4aSJeff Kirsher 	return ret;
491e689cf4aSJeff Kirsher }
492e689cf4aSJeff Kirsher 
493e689cf4aSJeff Kirsher static int gem_mac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
494e689cf4aSJeff Kirsher {
495e689cf4aSJeff Kirsher 	u32 mac_cstat = readl(gp->regs + MAC_CSTAT);
496e689cf4aSJeff Kirsher 
497e689cf4aSJeff Kirsher 	if (netif_msg_intr(gp))
498e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: mac interrupt, mac_cstat: 0x%x\n",
499e689cf4aSJeff Kirsher 			gp->dev->name, mac_cstat);
500e689cf4aSJeff Kirsher 
501e689cf4aSJeff Kirsher 	/* This interrupt is just for pause frame and pause
502e689cf4aSJeff Kirsher 	 * tracking.  It is useful for diagnostics and debug
503e689cf4aSJeff Kirsher 	 * but probably by default we will mask these events.
504e689cf4aSJeff Kirsher 	 */
505e689cf4aSJeff Kirsher 	if (mac_cstat & MAC_CSTAT_PS)
506e689cf4aSJeff Kirsher 		gp->pause_entered++;
507e689cf4aSJeff Kirsher 
508e689cf4aSJeff Kirsher 	if (mac_cstat & MAC_CSTAT_PRCV)
509e689cf4aSJeff Kirsher 		gp->pause_last_time_recvd = (mac_cstat >> 16);
510e689cf4aSJeff Kirsher 
511e689cf4aSJeff Kirsher 	return 0;
512e689cf4aSJeff Kirsher }
513e689cf4aSJeff Kirsher 
514e689cf4aSJeff Kirsher static int gem_mif_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
515e689cf4aSJeff Kirsher {
516e689cf4aSJeff Kirsher 	u32 mif_status = readl(gp->regs + MIF_STATUS);
517e689cf4aSJeff Kirsher 	u32 reg_val, changed_bits;
518e689cf4aSJeff Kirsher 
519e689cf4aSJeff Kirsher 	reg_val = (mif_status & MIF_STATUS_DATA) >> 16;
520e689cf4aSJeff Kirsher 	changed_bits = (mif_status & MIF_STATUS_STAT);
521e689cf4aSJeff Kirsher 
522e689cf4aSJeff Kirsher 	gem_handle_mif_event(gp, reg_val, changed_bits);
523e689cf4aSJeff Kirsher 
524e689cf4aSJeff Kirsher 	return 0;
525e689cf4aSJeff Kirsher }
526e689cf4aSJeff Kirsher 
527e689cf4aSJeff Kirsher static int gem_pci_interrupt(struct net_device *dev, struct gem *gp, u32 gem_status)
528e689cf4aSJeff Kirsher {
529e689cf4aSJeff Kirsher 	u32 pci_estat = readl(gp->regs + GREG_PCIESTAT);
530e689cf4aSJeff Kirsher 
531e689cf4aSJeff Kirsher 	if (gp->pdev->vendor == PCI_VENDOR_ID_SUN &&
532e689cf4aSJeff Kirsher 	    gp->pdev->device == PCI_DEVICE_ID_SUN_GEM) {
533e689cf4aSJeff Kirsher 		netdev_err(dev, "PCI error [%04x]", pci_estat);
534e689cf4aSJeff Kirsher 
535e689cf4aSJeff Kirsher 		if (pci_estat & GREG_PCIESTAT_BADACK)
536e689cf4aSJeff Kirsher 			pr_cont(" <No ACK64# during ABS64 cycle>");
537e689cf4aSJeff Kirsher 		if (pci_estat & GREG_PCIESTAT_DTRTO)
538e689cf4aSJeff Kirsher 			pr_cont(" <Delayed transaction timeout>");
539e689cf4aSJeff Kirsher 		if (pci_estat & GREG_PCIESTAT_OTHER)
540e689cf4aSJeff Kirsher 			pr_cont(" <other>");
541e689cf4aSJeff Kirsher 		pr_cont("\n");
542e689cf4aSJeff Kirsher 	} else {
543e689cf4aSJeff Kirsher 		pci_estat |= GREG_PCIESTAT_OTHER;
544e689cf4aSJeff Kirsher 		netdev_err(dev, "PCI error\n");
545e689cf4aSJeff Kirsher 	}
546e689cf4aSJeff Kirsher 
547e689cf4aSJeff Kirsher 	if (pci_estat & GREG_PCIESTAT_OTHER) {
5480800d88eSHeiner Kallweit 		int pci_errs;
549e689cf4aSJeff Kirsher 
550e689cf4aSJeff Kirsher 		/* Interrogate PCI config space for the
551e689cf4aSJeff Kirsher 		 * true cause.
552e689cf4aSJeff Kirsher 		 */
5530800d88eSHeiner Kallweit 		pci_errs = pci_status_get_and_clear_errors(gp->pdev);
5540800d88eSHeiner Kallweit 		netdev_err(dev, "PCI status errors[%04x]\n", pci_errs);
5550800d88eSHeiner Kallweit 		if (pci_errs & PCI_STATUS_PARITY)
556e689cf4aSJeff Kirsher 			netdev_err(dev, "PCI parity error detected\n");
5570800d88eSHeiner Kallweit 		if (pci_errs & PCI_STATUS_SIG_TARGET_ABORT)
558e689cf4aSJeff Kirsher 			netdev_err(dev, "PCI target abort\n");
5590800d88eSHeiner Kallweit 		if (pci_errs & PCI_STATUS_REC_TARGET_ABORT)
560e689cf4aSJeff Kirsher 			netdev_err(dev, "PCI master acks target abort\n");
5610800d88eSHeiner Kallweit 		if (pci_errs & PCI_STATUS_REC_MASTER_ABORT)
562e689cf4aSJeff Kirsher 			netdev_err(dev, "PCI master abort\n");
5630800d88eSHeiner Kallweit 		if (pci_errs & PCI_STATUS_SIG_SYSTEM_ERROR)
564e689cf4aSJeff Kirsher 			netdev_err(dev, "PCI system error SERR#\n");
5650800d88eSHeiner Kallweit 		if (pci_errs & PCI_STATUS_DETECTED_PARITY)
566e689cf4aSJeff Kirsher 			netdev_err(dev, "PCI parity error\n");
567e689cf4aSJeff Kirsher 	}
568e689cf4aSJeff Kirsher 
569e689cf4aSJeff Kirsher 	/* For all PCI errors, we should reset the chip. */
570e689cf4aSJeff Kirsher 	return 1;
571e689cf4aSJeff Kirsher }
572e689cf4aSJeff Kirsher 
573e689cf4aSJeff Kirsher /* All non-normal interrupt conditions get serviced here.
574e689cf4aSJeff Kirsher  * Returns non-zero if we should just exit the interrupt
575e689cf4aSJeff Kirsher  * handler right now (ie. if we reset the card which invalidates
576e689cf4aSJeff Kirsher  * all of the other original irq status bits).
577e689cf4aSJeff Kirsher  */
578e689cf4aSJeff Kirsher static int gem_abnormal_irq(struct net_device *dev, struct gem *gp, u32 gem_status)
579e689cf4aSJeff Kirsher {
580e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_RXNOBUF) {
581e689cf4aSJeff Kirsher 		/* Frame arrived, no free RX buffers available. */
582e689cf4aSJeff Kirsher 		if (netif_msg_rx_err(gp))
583e689cf4aSJeff Kirsher 			printk(KERN_DEBUG "%s: no buffer for rx frame\n",
584e689cf4aSJeff Kirsher 				gp->dev->name);
585e689cf4aSJeff Kirsher 		dev->stats.rx_dropped++;
586e689cf4aSJeff Kirsher 	}
587e689cf4aSJeff Kirsher 
588e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_RXTAGERR) {
589e689cf4aSJeff Kirsher 		/* corrupt RX tag framing */
590e689cf4aSJeff Kirsher 		if (netif_msg_rx_err(gp))
591e689cf4aSJeff Kirsher 			printk(KERN_DEBUG "%s: corrupt rx tag framing\n",
592e689cf4aSJeff Kirsher 				gp->dev->name);
593e689cf4aSJeff Kirsher 		dev->stats.rx_errors++;
594e689cf4aSJeff Kirsher 
595e689cf4aSJeff Kirsher 		return 1;
596e689cf4aSJeff Kirsher 	}
597e689cf4aSJeff Kirsher 
598e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_PCS) {
599e689cf4aSJeff Kirsher 		if (gem_pcs_interrupt(dev, gp, gem_status))
600e689cf4aSJeff Kirsher 			return 1;
601e689cf4aSJeff Kirsher 	}
602e689cf4aSJeff Kirsher 
603e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_TXMAC) {
604e689cf4aSJeff Kirsher 		if (gem_txmac_interrupt(dev, gp, gem_status))
605e689cf4aSJeff Kirsher 			return 1;
606e689cf4aSJeff Kirsher 	}
607e689cf4aSJeff Kirsher 
608e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_RXMAC) {
609e689cf4aSJeff Kirsher 		if (gem_rxmac_interrupt(dev, gp, gem_status))
610e689cf4aSJeff Kirsher 			return 1;
611e689cf4aSJeff Kirsher 	}
612e689cf4aSJeff Kirsher 
613e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_MAC) {
614e689cf4aSJeff Kirsher 		if (gem_mac_interrupt(dev, gp, gem_status))
615e689cf4aSJeff Kirsher 			return 1;
616e689cf4aSJeff Kirsher 	}
617e689cf4aSJeff Kirsher 
618e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_MIF) {
619e689cf4aSJeff Kirsher 		if (gem_mif_interrupt(dev, gp, gem_status))
620e689cf4aSJeff Kirsher 			return 1;
621e689cf4aSJeff Kirsher 	}
622e689cf4aSJeff Kirsher 
623e689cf4aSJeff Kirsher 	if (gem_status & GREG_STAT_PCIERR) {
624e689cf4aSJeff Kirsher 		if (gem_pci_interrupt(dev, gp, gem_status))
625e689cf4aSJeff Kirsher 			return 1;
626e689cf4aSJeff Kirsher 	}
627e689cf4aSJeff Kirsher 
628e689cf4aSJeff Kirsher 	return 0;
629e689cf4aSJeff Kirsher }
630e689cf4aSJeff Kirsher 
631e689cf4aSJeff Kirsher static __inline__ void gem_tx(struct net_device *dev, struct gem *gp, u32 gem_status)
632e689cf4aSJeff Kirsher {
633e689cf4aSJeff Kirsher 	int entry, limit;
634e689cf4aSJeff Kirsher 
635e689cf4aSJeff Kirsher 	entry = gp->tx_old;
636e689cf4aSJeff Kirsher 	limit = ((gem_status & GREG_STAT_TXNR) >> GREG_STAT_TXNR_SHIFT);
637e689cf4aSJeff Kirsher 	while (entry != limit) {
638e689cf4aSJeff Kirsher 		struct sk_buff *skb;
639e689cf4aSJeff Kirsher 		struct gem_txd *txd;
640e689cf4aSJeff Kirsher 		dma_addr_t dma_addr;
641e689cf4aSJeff Kirsher 		u32 dma_len;
642e689cf4aSJeff Kirsher 		int frag;
643e689cf4aSJeff Kirsher 
644e689cf4aSJeff Kirsher 		if (netif_msg_tx_done(gp))
645e689cf4aSJeff Kirsher 			printk(KERN_DEBUG "%s: tx done, slot %d\n",
646e689cf4aSJeff Kirsher 				gp->dev->name, entry);
647e689cf4aSJeff Kirsher 		skb = gp->tx_skbs[entry];
648e689cf4aSJeff Kirsher 		if (skb_shinfo(skb)->nr_frags) {
649e689cf4aSJeff Kirsher 			int last = entry + skb_shinfo(skb)->nr_frags;
650e689cf4aSJeff Kirsher 			int walk = entry;
651e689cf4aSJeff Kirsher 			int incomplete = 0;
652e689cf4aSJeff Kirsher 
653e689cf4aSJeff Kirsher 			last &= (TX_RING_SIZE - 1);
654e689cf4aSJeff Kirsher 			for (;;) {
655e689cf4aSJeff Kirsher 				walk = NEXT_TX(walk);
656e689cf4aSJeff Kirsher 				if (walk == limit)
657e689cf4aSJeff Kirsher 					incomplete = 1;
658e689cf4aSJeff Kirsher 				if (walk == last)
659e689cf4aSJeff Kirsher 					break;
660e689cf4aSJeff Kirsher 			}
661e689cf4aSJeff Kirsher 			if (incomplete)
662e689cf4aSJeff Kirsher 				break;
663e689cf4aSJeff Kirsher 		}
664e689cf4aSJeff Kirsher 		gp->tx_skbs[entry] = NULL;
665e689cf4aSJeff Kirsher 		dev->stats.tx_bytes += skb->len;
666e689cf4aSJeff Kirsher 
667e689cf4aSJeff Kirsher 		for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
668e689cf4aSJeff Kirsher 			txd = &gp->init_block->txd[entry];
669e689cf4aSJeff Kirsher 
670e689cf4aSJeff Kirsher 			dma_addr = le64_to_cpu(txd->buffer);
671e689cf4aSJeff Kirsher 			dma_len = le64_to_cpu(txd->control_word) & TXDCTRL_BUFSZ;
672e689cf4aSJeff Kirsher 
673e689cf4aSJeff Kirsher 			pci_unmap_page(gp->pdev, dma_addr, dma_len, PCI_DMA_TODEVICE);
674e689cf4aSJeff Kirsher 			entry = NEXT_TX(entry);
675e689cf4aSJeff Kirsher 		}
676e689cf4aSJeff Kirsher 
677e689cf4aSJeff Kirsher 		dev->stats.tx_packets++;
678241198acSEric W. Biederman 		dev_consume_skb_any(skb);
679e689cf4aSJeff Kirsher 	}
680e689cf4aSJeff Kirsher 	gp->tx_old = entry;
681e689cf4aSJeff Kirsher 
682e689cf4aSJeff Kirsher 	/* Need to make the tx_old update visible to gem_start_xmit()
683e689cf4aSJeff Kirsher 	 * before checking for netif_queue_stopped().  Without the
684e689cf4aSJeff Kirsher 	 * memory barrier, there is a small possibility that gem_start_xmit()
685e689cf4aSJeff Kirsher 	 * will miss it and cause the queue to be stopped forever.
686e689cf4aSJeff Kirsher 	 */
687e689cf4aSJeff Kirsher 	smp_mb();
688e689cf4aSJeff Kirsher 
689e689cf4aSJeff Kirsher 	if (unlikely(netif_queue_stopped(dev) &&
690e689cf4aSJeff Kirsher 		     TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1))) {
691e689cf4aSJeff Kirsher 		struct netdev_queue *txq = netdev_get_tx_queue(dev, 0);
692e689cf4aSJeff Kirsher 
693e689cf4aSJeff Kirsher 		__netif_tx_lock(txq, smp_processor_id());
694e689cf4aSJeff Kirsher 		if (netif_queue_stopped(dev) &&
695e689cf4aSJeff Kirsher 		    TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1))
696e689cf4aSJeff Kirsher 			netif_wake_queue(dev);
697e689cf4aSJeff Kirsher 		__netif_tx_unlock(txq);
698e689cf4aSJeff Kirsher 	}
699e689cf4aSJeff Kirsher }
700e689cf4aSJeff Kirsher 
701e689cf4aSJeff Kirsher static __inline__ void gem_post_rxds(struct gem *gp, int limit)
702e689cf4aSJeff Kirsher {
703e689cf4aSJeff Kirsher 	int cluster_start, curr, count, kick;
704e689cf4aSJeff Kirsher 
705e689cf4aSJeff Kirsher 	cluster_start = curr = (gp->rx_new & ~(4 - 1));
706e689cf4aSJeff Kirsher 	count = 0;
707e689cf4aSJeff Kirsher 	kick = -1;
708b4468cc6SAlexander Duyck 	dma_wmb();
709e689cf4aSJeff Kirsher 	while (curr != limit) {
710e689cf4aSJeff Kirsher 		curr = NEXT_RX(curr);
711e689cf4aSJeff Kirsher 		if (++count == 4) {
712e689cf4aSJeff Kirsher 			struct gem_rxd *rxd =
713e689cf4aSJeff Kirsher 				&gp->init_block->rxd[cluster_start];
714e689cf4aSJeff Kirsher 			for (;;) {
715e689cf4aSJeff Kirsher 				rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp));
716e689cf4aSJeff Kirsher 				rxd++;
717e689cf4aSJeff Kirsher 				cluster_start = NEXT_RX(cluster_start);
718e689cf4aSJeff Kirsher 				if (cluster_start == curr)
719e689cf4aSJeff Kirsher 					break;
720e689cf4aSJeff Kirsher 			}
721e689cf4aSJeff Kirsher 			kick = curr;
722e689cf4aSJeff Kirsher 			count = 0;
723e689cf4aSJeff Kirsher 		}
724e689cf4aSJeff Kirsher 	}
725e689cf4aSJeff Kirsher 	if (kick >= 0) {
726e689cf4aSJeff Kirsher 		mb();
727e689cf4aSJeff Kirsher 		writel(kick, gp->regs + RXDMA_KICK);
728e689cf4aSJeff Kirsher 	}
729e689cf4aSJeff Kirsher }
730e689cf4aSJeff Kirsher 
731e689cf4aSJeff Kirsher #define ALIGNED_RX_SKB_ADDR(addr) \
732e689cf4aSJeff Kirsher         ((((unsigned long)(addr) + (64UL - 1UL)) & ~(64UL - 1UL)) - (unsigned long)(addr))
733e689cf4aSJeff Kirsher static __inline__ struct sk_buff *gem_alloc_skb(struct net_device *dev, int size,
734e689cf4aSJeff Kirsher 						gfp_t gfp_flags)
735e689cf4aSJeff Kirsher {
736e689cf4aSJeff Kirsher 	struct sk_buff *skb = alloc_skb(size + 64, gfp_flags);
737e689cf4aSJeff Kirsher 
738e689cf4aSJeff Kirsher 	if (likely(skb)) {
739e689cf4aSJeff Kirsher 		unsigned long offset = ALIGNED_RX_SKB_ADDR(skb->data);
740e689cf4aSJeff Kirsher 		skb_reserve(skb, offset);
741e689cf4aSJeff Kirsher 	}
742e689cf4aSJeff Kirsher 	return skb;
743e689cf4aSJeff Kirsher }
744e689cf4aSJeff Kirsher 
745e689cf4aSJeff Kirsher static int gem_rx(struct gem *gp, int work_to_do)
746e689cf4aSJeff Kirsher {
747e689cf4aSJeff Kirsher 	struct net_device *dev = gp->dev;
748e689cf4aSJeff Kirsher 	int entry, drops, work_done = 0;
749e689cf4aSJeff Kirsher 	u32 done;
750e689cf4aSJeff Kirsher 
751e689cf4aSJeff Kirsher 	if (netif_msg_rx_status(gp))
752e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: rx interrupt, done: %d, rx_new: %d\n",
753e689cf4aSJeff Kirsher 			gp->dev->name, readl(gp->regs + RXDMA_DONE), gp->rx_new);
754e689cf4aSJeff Kirsher 
755e689cf4aSJeff Kirsher 	entry = gp->rx_new;
756e689cf4aSJeff Kirsher 	drops = 0;
757e689cf4aSJeff Kirsher 	done = readl(gp->regs + RXDMA_DONE);
758e689cf4aSJeff Kirsher 	for (;;) {
759e689cf4aSJeff Kirsher 		struct gem_rxd *rxd = &gp->init_block->rxd[entry];
760e689cf4aSJeff Kirsher 		struct sk_buff *skb;
761e689cf4aSJeff Kirsher 		u64 status = le64_to_cpu(rxd->status_word);
762e689cf4aSJeff Kirsher 		dma_addr_t dma_addr;
763e689cf4aSJeff Kirsher 		int len;
764e689cf4aSJeff Kirsher 
765e689cf4aSJeff Kirsher 		if ((status & RXDCTRL_OWN) != 0)
766e689cf4aSJeff Kirsher 			break;
767e689cf4aSJeff Kirsher 
768e689cf4aSJeff Kirsher 		if (work_done >= RX_RING_SIZE || work_done >= work_to_do)
769e689cf4aSJeff Kirsher 			break;
770e689cf4aSJeff Kirsher 
771e689cf4aSJeff Kirsher 		/* When writing back RX descriptor, GEM writes status
772e689cf4aSJeff Kirsher 		 * then buffer address, possibly in separate transactions.
773e689cf4aSJeff Kirsher 		 * If we don't wait for the chip to write both, we could
774e689cf4aSJeff Kirsher 		 * post a new buffer to this descriptor then have GEM spam
775e689cf4aSJeff Kirsher 		 * on the buffer address.  We sync on the RX completion
776e689cf4aSJeff Kirsher 		 * register to prevent this from happening.
777e689cf4aSJeff Kirsher 		 */
778e689cf4aSJeff Kirsher 		if (entry == done) {
779e689cf4aSJeff Kirsher 			done = readl(gp->regs + RXDMA_DONE);
780e689cf4aSJeff Kirsher 			if (entry == done)
781e689cf4aSJeff Kirsher 				break;
782e689cf4aSJeff Kirsher 		}
783e689cf4aSJeff Kirsher 
784e689cf4aSJeff Kirsher 		/* We can now account for the work we're about to do */
785e689cf4aSJeff Kirsher 		work_done++;
786e689cf4aSJeff Kirsher 
787e689cf4aSJeff Kirsher 		skb = gp->rx_skbs[entry];
788e689cf4aSJeff Kirsher 
789e689cf4aSJeff Kirsher 		len = (status & RXDCTRL_BUFSZ) >> 16;
790e689cf4aSJeff Kirsher 		if ((len < ETH_ZLEN) || (status & RXDCTRL_BAD)) {
791e689cf4aSJeff Kirsher 			dev->stats.rx_errors++;
792e689cf4aSJeff Kirsher 			if (len < ETH_ZLEN)
793e689cf4aSJeff Kirsher 				dev->stats.rx_length_errors++;
794e689cf4aSJeff Kirsher 			if (len & RXDCTRL_BAD)
795e689cf4aSJeff Kirsher 				dev->stats.rx_crc_errors++;
796e689cf4aSJeff Kirsher 
797e689cf4aSJeff Kirsher 			/* We'll just return it to GEM. */
798e689cf4aSJeff Kirsher 		drop_it:
799e689cf4aSJeff Kirsher 			dev->stats.rx_dropped++;
800e689cf4aSJeff Kirsher 			goto next;
801e689cf4aSJeff Kirsher 		}
802e689cf4aSJeff Kirsher 
803e689cf4aSJeff Kirsher 		dma_addr = le64_to_cpu(rxd->buffer);
804e689cf4aSJeff Kirsher 		if (len > RX_COPY_THRESHOLD) {
805e689cf4aSJeff Kirsher 			struct sk_buff *new_skb;
806e689cf4aSJeff Kirsher 
807e689cf4aSJeff Kirsher 			new_skb = gem_alloc_skb(dev, RX_BUF_ALLOC_SIZE(gp), GFP_ATOMIC);
808e689cf4aSJeff Kirsher 			if (new_skb == NULL) {
809e689cf4aSJeff Kirsher 				drops++;
810e689cf4aSJeff Kirsher 				goto drop_it;
811e689cf4aSJeff Kirsher 			}
812e689cf4aSJeff Kirsher 			pci_unmap_page(gp->pdev, dma_addr,
813e689cf4aSJeff Kirsher 				       RX_BUF_ALLOC_SIZE(gp),
814e689cf4aSJeff Kirsher 				       PCI_DMA_FROMDEVICE);
815e689cf4aSJeff Kirsher 			gp->rx_skbs[entry] = new_skb;
816e689cf4aSJeff Kirsher 			skb_put(new_skb, (gp->rx_buf_sz + RX_OFFSET));
817e689cf4aSJeff Kirsher 			rxd->buffer = cpu_to_le64(pci_map_page(gp->pdev,
818e689cf4aSJeff Kirsher 							       virt_to_page(new_skb->data),
819e689cf4aSJeff Kirsher 							       offset_in_page(new_skb->data),
820e689cf4aSJeff Kirsher 							       RX_BUF_ALLOC_SIZE(gp),
821e689cf4aSJeff Kirsher 							       PCI_DMA_FROMDEVICE));
822e689cf4aSJeff Kirsher 			skb_reserve(new_skb, RX_OFFSET);
823e689cf4aSJeff Kirsher 
824e689cf4aSJeff Kirsher 			/* Trim the original skb for the netif. */
825e689cf4aSJeff Kirsher 			skb_trim(skb, len);
826e689cf4aSJeff Kirsher 		} else {
827e689cf4aSJeff Kirsher 			struct sk_buff *copy_skb = netdev_alloc_skb(dev, len + 2);
828e689cf4aSJeff Kirsher 
829e689cf4aSJeff Kirsher 			if (copy_skb == NULL) {
830e689cf4aSJeff Kirsher 				drops++;
831e689cf4aSJeff Kirsher 				goto drop_it;
832e689cf4aSJeff Kirsher 			}
833e689cf4aSJeff Kirsher 
834e689cf4aSJeff Kirsher 			skb_reserve(copy_skb, 2);
835e689cf4aSJeff Kirsher 			skb_put(copy_skb, len);
836e689cf4aSJeff Kirsher 			pci_dma_sync_single_for_cpu(gp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
837e689cf4aSJeff Kirsher 			skb_copy_from_linear_data(skb, copy_skb->data, len);
838e689cf4aSJeff Kirsher 			pci_dma_sync_single_for_device(gp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
839e689cf4aSJeff Kirsher 
840e689cf4aSJeff Kirsher 			/* We'll reuse the original ring buffer. */
841e689cf4aSJeff Kirsher 			skb = copy_skb;
842e689cf4aSJeff Kirsher 		}
843e689cf4aSJeff Kirsher 
84412b03558SEric Dumazet 		if (likely(dev->features & NETIF_F_RXCSUM)) {
84512b03558SEric Dumazet 			__sum16 csum;
84612b03558SEric Dumazet 
847e689cf4aSJeff Kirsher 			csum = (__force __sum16)htons((status & RXDCTRL_TCPCSUM) ^ 0xffff);
848e689cf4aSJeff Kirsher 			skb->csum = csum_unfold(csum);
849e689cf4aSJeff Kirsher 			skb->ip_summed = CHECKSUM_COMPLETE;
85012b03558SEric Dumazet 		}
851e689cf4aSJeff Kirsher 		skb->protocol = eth_type_trans(skb, gp->dev);
852e689cf4aSJeff Kirsher 
853e689cf4aSJeff Kirsher 		napi_gro_receive(&gp->napi, skb);
854e689cf4aSJeff Kirsher 
855e689cf4aSJeff Kirsher 		dev->stats.rx_packets++;
856e689cf4aSJeff Kirsher 		dev->stats.rx_bytes += len;
857e689cf4aSJeff Kirsher 
858e689cf4aSJeff Kirsher 	next:
859e689cf4aSJeff Kirsher 		entry = NEXT_RX(entry);
860e689cf4aSJeff Kirsher 	}
861e689cf4aSJeff Kirsher 
862e689cf4aSJeff Kirsher 	gem_post_rxds(gp, entry);
863e689cf4aSJeff Kirsher 
864e689cf4aSJeff Kirsher 	gp->rx_new = entry;
865e689cf4aSJeff Kirsher 
866e689cf4aSJeff Kirsher 	if (drops)
867e689cf4aSJeff Kirsher 		netdev_info(gp->dev, "Memory squeeze, deferring packet\n");
868e689cf4aSJeff Kirsher 
869e689cf4aSJeff Kirsher 	return work_done;
870e689cf4aSJeff Kirsher }
871e689cf4aSJeff Kirsher 
872e689cf4aSJeff Kirsher static int gem_poll(struct napi_struct *napi, int budget)
873e689cf4aSJeff Kirsher {
874e689cf4aSJeff Kirsher 	struct gem *gp = container_of(napi, struct gem, napi);
875e689cf4aSJeff Kirsher 	struct net_device *dev = gp->dev;
876e689cf4aSJeff Kirsher 	int work_done;
877e689cf4aSJeff Kirsher 
878e689cf4aSJeff Kirsher 	work_done = 0;
879e689cf4aSJeff Kirsher 	do {
880e689cf4aSJeff Kirsher 		/* Handle anomalies */
881e689cf4aSJeff Kirsher 		if (unlikely(gp->status & GREG_STAT_ABNORMAL)) {
882e689cf4aSJeff Kirsher 			struct netdev_queue *txq = netdev_get_tx_queue(dev, 0);
883e689cf4aSJeff Kirsher 			int reset;
884e689cf4aSJeff Kirsher 
885e689cf4aSJeff Kirsher 			/* We run the abnormal interrupt handling code with
886e689cf4aSJeff Kirsher 			 * the Tx lock. It only resets the Rx portion of the
887e689cf4aSJeff Kirsher 			 * chip, but we need to guard it against DMA being
888e689cf4aSJeff Kirsher 			 * restarted by the link poll timer
889e689cf4aSJeff Kirsher 			 */
890e689cf4aSJeff Kirsher 			__netif_tx_lock(txq, smp_processor_id());
891e689cf4aSJeff Kirsher 			reset = gem_abnormal_irq(dev, gp, gp->status);
892e689cf4aSJeff Kirsher 			__netif_tx_unlock(txq);
893e689cf4aSJeff Kirsher 			if (reset) {
894e689cf4aSJeff Kirsher 				gem_schedule_reset(gp);
895e689cf4aSJeff Kirsher 				napi_complete(napi);
896e689cf4aSJeff Kirsher 				return work_done;
897e689cf4aSJeff Kirsher 			}
898e689cf4aSJeff Kirsher 		}
899e689cf4aSJeff Kirsher 
900e689cf4aSJeff Kirsher 		/* Run TX completion thread */
901e689cf4aSJeff Kirsher 		gem_tx(dev, gp, gp->status);
902e689cf4aSJeff Kirsher 
903e689cf4aSJeff Kirsher 		/* Run RX thread. We don't use any locking here,
904e689cf4aSJeff Kirsher 		 * code willing to do bad things - like cleaning the
905e689cf4aSJeff Kirsher 		 * rx ring - must call napi_disable(), which
906e689cf4aSJeff Kirsher 		 * schedule_timeout()'s if polling is already disabled.
907e689cf4aSJeff Kirsher 		 */
908e689cf4aSJeff Kirsher 		work_done += gem_rx(gp, budget - work_done);
909e689cf4aSJeff Kirsher 
910e689cf4aSJeff Kirsher 		if (work_done >= budget)
911e689cf4aSJeff Kirsher 			return work_done;
912e689cf4aSJeff Kirsher 
913e689cf4aSJeff Kirsher 		gp->status = readl(gp->regs + GREG_STAT);
914e689cf4aSJeff Kirsher 	} while (gp->status & GREG_STAT_NAPI);
915e689cf4aSJeff Kirsher 
9166ad20165SEric Dumazet 	napi_complete_done(napi, work_done);
917e689cf4aSJeff Kirsher 	gem_enable_ints(gp);
918e689cf4aSJeff Kirsher 
919e689cf4aSJeff Kirsher 	return work_done;
920e689cf4aSJeff Kirsher }
921e689cf4aSJeff Kirsher 
922e689cf4aSJeff Kirsher static irqreturn_t gem_interrupt(int irq, void *dev_id)
923e689cf4aSJeff Kirsher {
924e689cf4aSJeff Kirsher 	struct net_device *dev = dev_id;
925e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
926e689cf4aSJeff Kirsher 
927e689cf4aSJeff Kirsher 	if (napi_schedule_prep(&gp->napi)) {
928e689cf4aSJeff Kirsher 		u32 gem_status = readl(gp->regs + GREG_STAT);
929e689cf4aSJeff Kirsher 
930e689cf4aSJeff Kirsher 		if (unlikely(gem_status == 0)) {
931e689cf4aSJeff Kirsher 			napi_enable(&gp->napi);
932e689cf4aSJeff Kirsher 			return IRQ_NONE;
933e689cf4aSJeff Kirsher 		}
934e689cf4aSJeff Kirsher 		if (netif_msg_intr(gp))
935e689cf4aSJeff Kirsher 			printk(KERN_DEBUG "%s: gem_interrupt() gem_status: 0x%x\n",
936e689cf4aSJeff Kirsher 			       gp->dev->name, gem_status);
937e689cf4aSJeff Kirsher 
938e689cf4aSJeff Kirsher 		gp->status = gem_status;
939e689cf4aSJeff Kirsher 		gem_disable_ints(gp);
940e689cf4aSJeff Kirsher 		__napi_schedule(&gp->napi);
941e689cf4aSJeff Kirsher 	}
942e689cf4aSJeff Kirsher 
943e689cf4aSJeff Kirsher 	/* If polling was disabled at the time we received that
944e689cf4aSJeff Kirsher 	 * interrupt, we may return IRQ_HANDLED here while we
945e689cf4aSJeff Kirsher 	 * should return IRQ_NONE. No big deal...
946e689cf4aSJeff Kirsher 	 */
947e689cf4aSJeff Kirsher 	return IRQ_HANDLED;
948e689cf4aSJeff Kirsher }
949e689cf4aSJeff Kirsher 
950e689cf4aSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER
951e689cf4aSJeff Kirsher static void gem_poll_controller(struct net_device *dev)
952e689cf4aSJeff Kirsher {
953e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
954e689cf4aSJeff Kirsher 
955e689cf4aSJeff Kirsher 	disable_irq(gp->pdev->irq);
956e689cf4aSJeff Kirsher 	gem_interrupt(gp->pdev->irq, dev);
957e689cf4aSJeff Kirsher 	enable_irq(gp->pdev->irq);
958e689cf4aSJeff Kirsher }
959e689cf4aSJeff Kirsher #endif
960e689cf4aSJeff Kirsher 
9610290bd29SMichael S. Tsirkin static void gem_tx_timeout(struct net_device *dev, unsigned int txqueue)
962e689cf4aSJeff Kirsher {
963e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
964e689cf4aSJeff Kirsher 
965e689cf4aSJeff Kirsher 	netdev_err(dev, "transmit timed out, resetting\n");
966e689cf4aSJeff Kirsher 
967e689cf4aSJeff Kirsher 	netdev_err(dev, "TX_STATE[%08x:%08x:%08x]\n",
968e689cf4aSJeff Kirsher 		   readl(gp->regs + TXDMA_CFG),
969e689cf4aSJeff Kirsher 		   readl(gp->regs + MAC_TXSTAT),
970e689cf4aSJeff Kirsher 		   readl(gp->regs + MAC_TXCFG));
971e689cf4aSJeff Kirsher 	netdev_err(dev, "RX_STATE[%08x:%08x:%08x]\n",
972e689cf4aSJeff Kirsher 		   readl(gp->regs + RXDMA_CFG),
973e689cf4aSJeff Kirsher 		   readl(gp->regs + MAC_RXSTAT),
974e689cf4aSJeff Kirsher 		   readl(gp->regs + MAC_RXCFG));
975e689cf4aSJeff Kirsher 
976e689cf4aSJeff Kirsher 	gem_schedule_reset(gp);
977e689cf4aSJeff Kirsher }
978e689cf4aSJeff Kirsher 
979e689cf4aSJeff Kirsher static __inline__ int gem_intme(int entry)
980e689cf4aSJeff Kirsher {
981e689cf4aSJeff Kirsher 	/* Algorithm: IRQ every 1/2 of descriptors. */
982e689cf4aSJeff Kirsher 	if (!(entry & ((TX_RING_SIZE>>1)-1)))
983e689cf4aSJeff Kirsher 		return 1;
984e689cf4aSJeff Kirsher 
985e689cf4aSJeff Kirsher 	return 0;
986e689cf4aSJeff Kirsher }
987e689cf4aSJeff Kirsher 
988e689cf4aSJeff Kirsher static netdev_tx_t gem_start_xmit(struct sk_buff *skb,
989e689cf4aSJeff Kirsher 				  struct net_device *dev)
990e689cf4aSJeff Kirsher {
991e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
992e689cf4aSJeff Kirsher 	int entry;
993e689cf4aSJeff Kirsher 	u64 ctrl;
994e689cf4aSJeff Kirsher 
995e689cf4aSJeff Kirsher 	ctrl = 0;
996e689cf4aSJeff Kirsher 	if (skb->ip_summed == CHECKSUM_PARTIAL) {
997e689cf4aSJeff Kirsher 		const u64 csum_start_off = skb_checksum_start_offset(skb);
998e689cf4aSJeff Kirsher 		const u64 csum_stuff_off = csum_start_off + skb->csum_offset;
999e689cf4aSJeff Kirsher 
1000e689cf4aSJeff Kirsher 		ctrl = (TXDCTRL_CENAB |
1001e689cf4aSJeff Kirsher 			(csum_start_off << 15) |
1002e689cf4aSJeff Kirsher 			(csum_stuff_off << 21));
1003e689cf4aSJeff Kirsher 	}
1004e689cf4aSJeff Kirsher 
1005e689cf4aSJeff Kirsher 	if (unlikely(TX_BUFFS_AVAIL(gp) <= (skb_shinfo(skb)->nr_frags + 1))) {
1006e689cf4aSJeff Kirsher 		/* This is a hard error, log it. */
1007e689cf4aSJeff Kirsher 		if (!netif_queue_stopped(dev)) {
1008e689cf4aSJeff Kirsher 			netif_stop_queue(dev);
1009e689cf4aSJeff Kirsher 			netdev_err(dev, "BUG! Tx Ring full when queue awake!\n");
1010e689cf4aSJeff Kirsher 		}
1011e689cf4aSJeff Kirsher 		return NETDEV_TX_BUSY;
1012e689cf4aSJeff Kirsher 	}
1013e689cf4aSJeff Kirsher 
1014e689cf4aSJeff Kirsher 	entry = gp->tx_new;
1015e689cf4aSJeff Kirsher 	gp->tx_skbs[entry] = skb;
1016e689cf4aSJeff Kirsher 
1017e689cf4aSJeff Kirsher 	if (skb_shinfo(skb)->nr_frags == 0) {
1018e689cf4aSJeff Kirsher 		struct gem_txd *txd = &gp->init_block->txd[entry];
1019e689cf4aSJeff Kirsher 		dma_addr_t mapping;
1020e689cf4aSJeff Kirsher 		u32 len;
1021e689cf4aSJeff Kirsher 
1022e689cf4aSJeff Kirsher 		len = skb->len;
1023e689cf4aSJeff Kirsher 		mapping = pci_map_page(gp->pdev,
1024e689cf4aSJeff Kirsher 				       virt_to_page(skb->data),
1025e689cf4aSJeff Kirsher 				       offset_in_page(skb->data),
1026e689cf4aSJeff Kirsher 				       len, PCI_DMA_TODEVICE);
1027e689cf4aSJeff Kirsher 		ctrl |= TXDCTRL_SOF | TXDCTRL_EOF | len;
1028e689cf4aSJeff Kirsher 		if (gem_intme(entry))
1029e689cf4aSJeff Kirsher 			ctrl |= TXDCTRL_INTME;
1030e689cf4aSJeff Kirsher 		txd->buffer = cpu_to_le64(mapping);
1031b4468cc6SAlexander Duyck 		dma_wmb();
1032e689cf4aSJeff Kirsher 		txd->control_word = cpu_to_le64(ctrl);
1033e689cf4aSJeff Kirsher 		entry = NEXT_TX(entry);
1034e689cf4aSJeff Kirsher 	} else {
1035e689cf4aSJeff Kirsher 		struct gem_txd *txd;
1036e689cf4aSJeff Kirsher 		u32 first_len;
1037e689cf4aSJeff Kirsher 		u64 intme;
1038e689cf4aSJeff Kirsher 		dma_addr_t first_mapping;
1039e689cf4aSJeff Kirsher 		int frag, first_entry = entry;
1040e689cf4aSJeff Kirsher 
1041e689cf4aSJeff Kirsher 		intme = 0;
1042e689cf4aSJeff Kirsher 		if (gem_intme(entry))
1043e689cf4aSJeff Kirsher 			intme |= TXDCTRL_INTME;
1044e689cf4aSJeff Kirsher 
1045e689cf4aSJeff Kirsher 		/* We must give this initial chunk to the device last.
1046e689cf4aSJeff Kirsher 		 * Otherwise we could race with the device.
1047e689cf4aSJeff Kirsher 		 */
1048e689cf4aSJeff Kirsher 		first_len = skb_headlen(skb);
1049e689cf4aSJeff Kirsher 		first_mapping = pci_map_page(gp->pdev, virt_to_page(skb->data),
1050e689cf4aSJeff Kirsher 					     offset_in_page(skb->data),
1051e689cf4aSJeff Kirsher 					     first_len, PCI_DMA_TODEVICE);
1052e689cf4aSJeff Kirsher 		entry = NEXT_TX(entry);
1053e689cf4aSJeff Kirsher 
1054e689cf4aSJeff Kirsher 		for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
10559e903e08SEric Dumazet 			const skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
1056e689cf4aSJeff Kirsher 			u32 len;
1057e689cf4aSJeff Kirsher 			dma_addr_t mapping;
1058e689cf4aSJeff Kirsher 			u64 this_ctrl;
1059e689cf4aSJeff Kirsher 
10609e903e08SEric Dumazet 			len = skb_frag_size(this_frag);
10614fee78b4SIan Campbell 			mapping = skb_frag_dma_map(&gp->pdev->dev, this_frag,
10625d6bcdfeSIan Campbell 						   0, len, DMA_TO_DEVICE);
1063e689cf4aSJeff Kirsher 			this_ctrl = ctrl;
1064e689cf4aSJeff Kirsher 			if (frag == skb_shinfo(skb)->nr_frags - 1)
1065e689cf4aSJeff Kirsher 				this_ctrl |= TXDCTRL_EOF;
1066e689cf4aSJeff Kirsher 
1067e689cf4aSJeff Kirsher 			txd = &gp->init_block->txd[entry];
1068e689cf4aSJeff Kirsher 			txd->buffer = cpu_to_le64(mapping);
1069b4468cc6SAlexander Duyck 			dma_wmb();
1070e689cf4aSJeff Kirsher 			txd->control_word = cpu_to_le64(this_ctrl | len);
1071e689cf4aSJeff Kirsher 
1072e689cf4aSJeff Kirsher 			if (gem_intme(entry))
1073e689cf4aSJeff Kirsher 				intme |= TXDCTRL_INTME;
1074e689cf4aSJeff Kirsher 
1075e689cf4aSJeff Kirsher 			entry = NEXT_TX(entry);
1076e689cf4aSJeff Kirsher 		}
1077e689cf4aSJeff Kirsher 		txd = &gp->init_block->txd[first_entry];
1078e689cf4aSJeff Kirsher 		txd->buffer = cpu_to_le64(first_mapping);
1079b4468cc6SAlexander Duyck 		dma_wmb();
1080e689cf4aSJeff Kirsher 		txd->control_word =
1081e689cf4aSJeff Kirsher 			cpu_to_le64(ctrl | TXDCTRL_SOF | intme | first_len);
1082e689cf4aSJeff Kirsher 	}
1083e689cf4aSJeff Kirsher 
1084e689cf4aSJeff Kirsher 	gp->tx_new = entry;
1085e689cf4aSJeff Kirsher 	if (unlikely(TX_BUFFS_AVAIL(gp) <= (MAX_SKB_FRAGS + 1))) {
1086e689cf4aSJeff Kirsher 		netif_stop_queue(dev);
1087e689cf4aSJeff Kirsher 
1088e689cf4aSJeff Kirsher 		/* netif_stop_queue() must be done before checking
1089e689cf4aSJeff Kirsher 		 * checking tx index in TX_BUFFS_AVAIL() below, because
1090e689cf4aSJeff Kirsher 		 * in gem_tx(), we update tx_old before checking for
1091e689cf4aSJeff Kirsher 		 * netif_queue_stopped().
1092e689cf4aSJeff Kirsher 		 */
1093e689cf4aSJeff Kirsher 		smp_mb();
1094e689cf4aSJeff Kirsher 		if (TX_BUFFS_AVAIL(gp) > (MAX_SKB_FRAGS + 1))
1095e689cf4aSJeff Kirsher 			netif_wake_queue(dev);
1096e689cf4aSJeff Kirsher 	}
1097e689cf4aSJeff Kirsher 	if (netif_msg_tx_queued(gp))
1098e689cf4aSJeff Kirsher 		printk(KERN_DEBUG "%s: tx queued, slot %d, skblen %d\n",
1099e689cf4aSJeff Kirsher 		       dev->name, entry, skb->len);
1100e689cf4aSJeff Kirsher 	mb();
1101e689cf4aSJeff Kirsher 	writel(gp->tx_new, gp->regs + TXDMA_KICK);
1102e689cf4aSJeff Kirsher 
1103e689cf4aSJeff Kirsher 	return NETDEV_TX_OK;
1104e689cf4aSJeff Kirsher }
1105e689cf4aSJeff Kirsher 
1106e689cf4aSJeff Kirsher static void gem_pcs_reset(struct gem *gp)
1107e689cf4aSJeff Kirsher {
1108e689cf4aSJeff Kirsher 	int limit;
1109e689cf4aSJeff Kirsher 	u32 val;
1110e689cf4aSJeff Kirsher 
1111e689cf4aSJeff Kirsher 	/* Reset PCS unit. */
1112e689cf4aSJeff Kirsher 	val = readl(gp->regs + PCS_MIICTRL);
1113e689cf4aSJeff Kirsher 	val |= PCS_MIICTRL_RST;
1114e689cf4aSJeff Kirsher 	writel(val, gp->regs + PCS_MIICTRL);
1115e689cf4aSJeff Kirsher 
1116e689cf4aSJeff Kirsher 	limit = 32;
1117e689cf4aSJeff Kirsher 	while (readl(gp->regs + PCS_MIICTRL) & PCS_MIICTRL_RST) {
1118e689cf4aSJeff Kirsher 		udelay(100);
1119e689cf4aSJeff Kirsher 		if (limit-- <= 0)
1120e689cf4aSJeff Kirsher 			break;
1121e689cf4aSJeff Kirsher 	}
1122e689cf4aSJeff Kirsher 	if (limit < 0)
1123e689cf4aSJeff Kirsher 		netdev_warn(gp->dev, "PCS reset bit would not clear\n");
1124e689cf4aSJeff Kirsher }
1125e689cf4aSJeff Kirsher 
1126e689cf4aSJeff Kirsher static void gem_pcs_reinit_adv(struct gem *gp)
1127e689cf4aSJeff Kirsher {
1128e689cf4aSJeff Kirsher 	u32 val;
1129e689cf4aSJeff Kirsher 
1130e689cf4aSJeff Kirsher 	/* Make sure PCS is disabled while changing advertisement
1131e689cf4aSJeff Kirsher 	 * configuration.
1132e689cf4aSJeff Kirsher 	 */
1133e689cf4aSJeff Kirsher 	val = readl(gp->regs + PCS_CFG);
1134e689cf4aSJeff Kirsher 	val &= ~(PCS_CFG_ENABLE | PCS_CFG_TO);
1135e689cf4aSJeff Kirsher 	writel(val, gp->regs + PCS_CFG);
1136e689cf4aSJeff Kirsher 
1137e689cf4aSJeff Kirsher 	/* Advertise all capabilities except asymmetric
1138e689cf4aSJeff Kirsher 	 * pause.
1139e689cf4aSJeff Kirsher 	 */
1140e689cf4aSJeff Kirsher 	val = readl(gp->regs + PCS_MIIADV);
1141e689cf4aSJeff Kirsher 	val |= (PCS_MIIADV_FD | PCS_MIIADV_HD |
1142e689cf4aSJeff Kirsher 		PCS_MIIADV_SP | PCS_MIIADV_AP);
1143e689cf4aSJeff Kirsher 	writel(val, gp->regs + PCS_MIIADV);
1144e689cf4aSJeff Kirsher 
1145e689cf4aSJeff Kirsher 	/* Enable and restart auto-negotiation, disable wrapback/loopback,
1146e689cf4aSJeff Kirsher 	 * and re-enable PCS.
1147e689cf4aSJeff Kirsher 	 */
1148e689cf4aSJeff Kirsher 	val = readl(gp->regs + PCS_MIICTRL);
1149e689cf4aSJeff Kirsher 	val |= (PCS_MIICTRL_RAN | PCS_MIICTRL_ANE);
1150e689cf4aSJeff Kirsher 	val &= ~PCS_MIICTRL_WB;
1151e689cf4aSJeff Kirsher 	writel(val, gp->regs + PCS_MIICTRL);
1152e689cf4aSJeff Kirsher 
1153e689cf4aSJeff Kirsher 	val = readl(gp->regs + PCS_CFG);
1154e689cf4aSJeff Kirsher 	val |= PCS_CFG_ENABLE;
1155e689cf4aSJeff Kirsher 	writel(val, gp->regs + PCS_CFG);
1156e689cf4aSJeff Kirsher 
1157e689cf4aSJeff Kirsher 	/* Make sure serialink loopback is off.  The meaning
1158e689cf4aSJeff Kirsher 	 * of this bit is logically inverted based upon whether
1159e689cf4aSJeff Kirsher 	 * you are in Serialink or SERDES mode.
1160e689cf4aSJeff Kirsher 	 */
1161e689cf4aSJeff Kirsher 	val = readl(gp->regs + PCS_SCTRL);
1162e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_serialink)
1163e689cf4aSJeff Kirsher 		val &= ~PCS_SCTRL_LOOP;
1164e689cf4aSJeff Kirsher 	else
1165e689cf4aSJeff Kirsher 		val |= PCS_SCTRL_LOOP;
1166e689cf4aSJeff Kirsher 	writel(val, gp->regs + PCS_SCTRL);
1167e689cf4aSJeff Kirsher }
1168e689cf4aSJeff Kirsher 
1169e689cf4aSJeff Kirsher #define STOP_TRIES 32
1170e689cf4aSJeff Kirsher 
1171e689cf4aSJeff Kirsher static void gem_reset(struct gem *gp)
1172e689cf4aSJeff Kirsher {
1173e689cf4aSJeff Kirsher 	int limit;
1174e689cf4aSJeff Kirsher 	u32 val;
1175e689cf4aSJeff Kirsher 
1176e689cf4aSJeff Kirsher 	/* Make sure we won't get any more interrupts */
1177e689cf4aSJeff Kirsher 	writel(0xffffffff, gp->regs + GREG_IMASK);
1178e689cf4aSJeff Kirsher 
1179e689cf4aSJeff Kirsher 	/* Reset the chip */
1180e689cf4aSJeff Kirsher 	writel(gp->swrst_base | GREG_SWRST_TXRST | GREG_SWRST_RXRST,
1181e689cf4aSJeff Kirsher 	       gp->regs + GREG_SWRST);
1182e689cf4aSJeff Kirsher 
1183e689cf4aSJeff Kirsher 	limit = STOP_TRIES;
1184e689cf4aSJeff Kirsher 
1185e689cf4aSJeff Kirsher 	do {
1186e689cf4aSJeff Kirsher 		udelay(20);
1187e689cf4aSJeff Kirsher 		val = readl(gp->regs + GREG_SWRST);
1188e689cf4aSJeff Kirsher 		if (limit-- <= 0)
1189e689cf4aSJeff Kirsher 			break;
1190e689cf4aSJeff Kirsher 	} while (val & (GREG_SWRST_TXRST | GREG_SWRST_RXRST));
1191e689cf4aSJeff Kirsher 
1192e689cf4aSJeff Kirsher 	if (limit < 0)
1193e689cf4aSJeff Kirsher 		netdev_err(gp->dev, "SW reset is ghetto\n");
1194e689cf4aSJeff Kirsher 
1195e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes)
1196e689cf4aSJeff Kirsher 		gem_pcs_reinit_adv(gp);
1197e689cf4aSJeff Kirsher }
1198e689cf4aSJeff Kirsher 
1199e689cf4aSJeff Kirsher static void gem_start_dma(struct gem *gp)
1200e689cf4aSJeff Kirsher {
1201e689cf4aSJeff Kirsher 	u32 val;
1202e689cf4aSJeff Kirsher 
1203e689cf4aSJeff Kirsher 	/* We are ready to rock, turn everything on. */
1204e689cf4aSJeff Kirsher 	val = readl(gp->regs + TXDMA_CFG);
1205e689cf4aSJeff Kirsher 	writel(val | TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG);
1206e689cf4aSJeff Kirsher 	val = readl(gp->regs + RXDMA_CFG);
1207e689cf4aSJeff Kirsher 	writel(val | RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG);
1208e689cf4aSJeff Kirsher 	val = readl(gp->regs + MAC_TXCFG);
1209e689cf4aSJeff Kirsher 	writel(val | MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG);
1210e689cf4aSJeff Kirsher 	val = readl(gp->regs + MAC_RXCFG);
1211e689cf4aSJeff Kirsher 	writel(val | MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
1212e689cf4aSJeff Kirsher 
1213e689cf4aSJeff Kirsher 	(void) readl(gp->regs + MAC_RXCFG);
1214e689cf4aSJeff Kirsher 	udelay(100);
1215e689cf4aSJeff Kirsher 
1216e689cf4aSJeff Kirsher 	gem_enable_ints(gp);
1217e689cf4aSJeff Kirsher 
1218e689cf4aSJeff Kirsher 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
1219e689cf4aSJeff Kirsher }
1220e689cf4aSJeff Kirsher 
1221e689cf4aSJeff Kirsher /* DMA won't be actually stopped before about 4ms tho ...
1222e689cf4aSJeff Kirsher  */
1223e689cf4aSJeff Kirsher static void gem_stop_dma(struct gem *gp)
1224e689cf4aSJeff Kirsher {
1225e689cf4aSJeff Kirsher 	u32 val;
1226e689cf4aSJeff Kirsher 
1227e689cf4aSJeff Kirsher 	/* We are done rocking, turn everything off. */
1228e689cf4aSJeff Kirsher 	val = readl(gp->regs + TXDMA_CFG);
1229e689cf4aSJeff Kirsher 	writel(val & ~TXDMA_CFG_ENABLE, gp->regs + TXDMA_CFG);
1230e689cf4aSJeff Kirsher 	val = readl(gp->regs + RXDMA_CFG);
1231e689cf4aSJeff Kirsher 	writel(val & ~RXDMA_CFG_ENABLE, gp->regs + RXDMA_CFG);
1232e689cf4aSJeff Kirsher 	val = readl(gp->regs + MAC_TXCFG);
1233e689cf4aSJeff Kirsher 	writel(val & ~MAC_TXCFG_ENAB, gp->regs + MAC_TXCFG);
1234e689cf4aSJeff Kirsher 	val = readl(gp->regs + MAC_RXCFG);
1235e689cf4aSJeff Kirsher 	writel(val & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
1236e689cf4aSJeff Kirsher 
1237e689cf4aSJeff Kirsher 	(void) readl(gp->regs + MAC_RXCFG);
1238e689cf4aSJeff Kirsher 
1239e689cf4aSJeff Kirsher 	/* Need to wait a bit ... done by the caller */
1240e689cf4aSJeff Kirsher }
1241e689cf4aSJeff Kirsher 
1242e689cf4aSJeff Kirsher 
1243e689cf4aSJeff Kirsher // XXX dbl check what that function should do when called on PCS PHY
124492552fddSPhilippe Reynes static void gem_begin_auto_negotiation(struct gem *gp,
124592552fddSPhilippe Reynes 				       const struct ethtool_link_ksettings *ep)
1246e689cf4aSJeff Kirsher {
1247e689cf4aSJeff Kirsher 	u32 advertise, features;
1248e689cf4aSJeff Kirsher 	int autoneg;
1249e689cf4aSJeff Kirsher 	int speed;
1250e689cf4aSJeff Kirsher 	int duplex;
125192552fddSPhilippe Reynes 	u32 advertising;
125292552fddSPhilippe Reynes 
1253e74bad6bSPhilippe Reynes 	if (ep)
1254e74bad6bSPhilippe Reynes 		ethtool_convert_link_mode_to_legacy_u32(
1255e74bad6bSPhilippe Reynes 			&advertising, ep->link_modes.advertising);
1256e689cf4aSJeff Kirsher 
1257e689cf4aSJeff Kirsher 	if (gp->phy_type != phy_mii_mdio0 &&
1258e689cf4aSJeff Kirsher      	    gp->phy_type != phy_mii_mdio1)
1259e689cf4aSJeff Kirsher      	    	goto non_mii;
1260e689cf4aSJeff Kirsher 
1261e689cf4aSJeff Kirsher 	/* Setup advertise */
1262e689cf4aSJeff Kirsher 	if (found_mii_phy(gp))
1263e689cf4aSJeff Kirsher 		features = gp->phy_mii.def->features;
1264e689cf4aSJeff Kirsher 	else
1265e689cf4aSJeff Kirsher 		features = 0;
1266e689cf4aSJeff Kirsher 
1267e689cf4aSJeff Kirsher 	advertise = features & ADVERTISE_MASK;
1268e689cf4aSJeff Kirsher 	if (gp->phy_mii.advertising != 0)
1269e689cf4aSJeff Kirsher 		advertise &= gp->phy_mii.advertising;
1270e689cf4aSJeff Kirsher 
1271e689cf4aSJeff Kirsher 	autoneg = gp->want_autoneg;
1272e689cf4aSJeff Kirsher 	speed = gp->phy_mii.speed;
1273e689cf4aSJeff Kirsher 	duplex = gp->phy_mii.duplex;
1274e689cf4aSJeff Kirsher 
1275e689cf4aSJeff Kirsher 	/* Setup link parameters */
1276e689cf4aSJeff Kirsher 	if (!ep)
1277e689cf4aSJeff Kirsher 		goto start_aneg;
127892552fddSPhilippe Reynes 	if (ep->base.autoneg == AUTONEG_ENABLE) {
127992552fddSPhilippe Reynes 		advertise = advertising;
1280e689cf4aSJeff Kirsher 		autoneg = 1;
1281e689cf4aSJeff Kirsher 	} else {
1282e689cf4aSJeff Kirsher 		autoneg = 0;
128392552fddSPhilippe Reynes 		speed = ep->base.speed;
128492552fddSPhilippe Reynes 		duplex = ep->base.duplex;
1285e689cf4aSJeff Kirsher 	}
1286e689cf4aSJeff Kirsher 
1287e689cf4aSJeff Kirsher start_aneg:
1288e689cf4aSJeff Kirsher 	/* Sanitize settings based on PHY capabilities */
1289e689cf4aSJeff Kirsher 	if ((features & SUPPORTED_Autoneg) == 0)
1290e689cf4aSJeff Kirsher 		autoneg = 0;
1291e689cf4aSJeff Kirsher 	if (speed == SPEED_1000 &&
1292e689cf4aSJeff Kirsher 	    !(features & (SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)))
1293e689cf4aSJeff Kirsher 		speed = SPEED_100;
1294e689cf4aSJeff Kirsher 	if (speed == SPEED_100 &&
1295e689cf4aSJeff Kirsher 	    !(features & (SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full)))
1296e689cf4aSJeff Kirsher 		speed = SPEED_10;
1297e689cf4aSJeff Kirsher 	if (duplex == DUPLEX_FULL &&
1298e689cf4aSJeff Kirsher 	    !(features & (SUPPORTED_1000baseT_Full |
1299e689cf4aSJeff Kirsher 	    		  SUPPORTED_100baseT_Full |
1300e689cf4aSJeff Kirsher 	    		  SUPPORTED_10baseT_Full)))
1301e689cf4aSJeff Kirsher 	    	duplex = DUPLEX_HALF;
1302e689cf4aSJeff Kirsher 	if (speed == 0)
1303e689cf4aSJeff Kirsher 		speed = SPEED_10;
1304e689cf4aSJeff Kirsher 
1305e689cf4aSJeff Kirsher 	/* If we are asleep, we don't try to actually setup the PHY, we
1306e689cf4aSJeff Kirsher 	 * just store the settings
1307e689cf4aSJeff Kirsher 	 */
1308e689cf4aSJeff Kirsher 	if (!netif_device_present(gp->dev)) {
1309e689cf4aSJeff Kirsher 		gp->phy_mii.autoneg = gp->want_autoneg = autoneg;
1310e689cf4aSJeff Kirsher 		gp->phy_mii.speed = speed;
1311e689cf4aSJeff Kirsher 		gp->phy_mii.duplex = duplex;
1312e689cf4aSJeff Kirsher 		return;
1313e689cf4aSJeff Kirsher 	}
1314e689cf4aSJeff Kirsher 
1315e689cf4aSJeff Kirsher 	/* Configure PHY & start aneg */
1316e689cf4aSJeff Kirsher 	gp->want_autoneg = autoneg;
1317e689cf4aSJeff Kirsher 	if (autoneg) {
1318e689cf4aSJeff Kirsher 		if (found_mii_phy(gp))
1319e689cf4aSJeff Kirsher 			gp->phy_mii.def->ops->setup_aneg(&gp->phy_mii, advertise);
1320e689cf4aSJeff Kirsher 		gp->lstate = link_aneg;
1321e689cf4aSJeff Kirsher 	} else {
1322e689cf4aSJeff Kirsher 		if (found_mii_phy(gp))
1323e689cf4aSJeff Kirsher 			gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, speed, duplex);
1324e689cf4aSJeff Kirsher 		gp->lstate = link_force_ok;
1325e689cf4aSJeff Kirsher 	}
1326e689cf4aSJeff Kirsher 
1327e689cf4aSJeff Kirsher non_mii:
1328e689cf4aSJeff Kirsher 	gp->timer_ticks = 0;
1329e689cf4aSJeff Kirsher 	mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10));
1330e689cf4aSJeff Kirsher }
1331e689cf4aSJeff Kirsher 
1332e689cf4aSJeff Kirsher /* A link-up condition has occurred, initialize and enable the
1333e689cf4aSJeff Kirsher  * rest of the chip.
1334e689cf4aSJeff Kirsher  */
1335e689cf4aSJeff Kirsher static int gem_set_link_modes(struct gem *gp)
1336e689cf4aSJeff Kirsher {
1337e689cf4aSJeff Kirsher 	struct netdev_queue *txq = netdev_get_tx_queue(gp->dev, 0);
1338e689cf4aSJeff Kirsher 	int full_duplex, speed, pause;
1339e689cf4aSJeff Kirsher 	u32 val;
1340e689cf4aSJeff Kirsher 
1341e689cf4aSJeff Kirsher 	full_duplex = 0;
1342e689cf4aSJeff Kirsher 	speed = SPEED_10;
1343e689cf4aSJeff Kirsher 	pause = 0;
1344e689cf4aSJeff Kirsher 
1345e689cf4aSJeff Kirsher 	if (found_mii_phy(gp)) {
1346e689cf4aSJeff Kirsher 	    	if (gp->phy_mii.def->ops->read_link(&gp->phy_mii))
1347e689cf4aSJeff Kirsher 	    		return 1;
1348e689cf4aSJeff Kirsher 		full_duplex = (gp->phy_mii.duplex == DUPLEX_FULL);
1349e689cf4aSJeff Kirsher 		speed = gp->phy_mii.speed;
1350e689cf4aSJeff Kirsher 		pause = gp->phy_mii.pause;
1351e689cf4aSJeff Kirsher 	} else if (gp->phy_type == phy_serialink ||
1352e689cf4aSJeff Kirsher 	    	   gp->phy_type == phy_serdes) {
1353e689cf4aSJeff Kirsher 		u32 pcs_lpa = readl(gp->regs + PCS_MIILP);
1354e689cf4aSJeff Kirsher 
1355e689cf4aSJeff Kirsher 		if ((pcs_lpa & PCS_MIIADV_FD) || gp->phy_type == phy_serdes)
1356e689cf4aSJeff Kirsher 			full_duplex = 1;
1357e689cf4aSJeff Kirsher 		speed = SPEED_1000;
1358e689cf4aSJeff Kirsher 	}
1359e689cf4aSJeff Kirsher 
1360e689cf4aSJeff Kirsher 	netif_info(gp, link, gp->dev, "Link is up at %d Mbps, %s-duplex\n",
1361e689cf4aSJeff Kirsher 		   speed, (full_duplex ? "full" : "half"));
1362e689cf4aSJeff Kirsher 
1363e689cf4aSJeff Kirsher 
1364e689cf4aSJeff Kirsher 	/* We take the tx queue lock to avoid collisions between
1365e689cf4aSJeff Kirsher 	 * this code, the tx path and the NAPI-driven error path
1366e689cf4aSJeff Kirsher 	 */
1367e689cf4aSJeff Kirsher 	__netif_tx_lock(txq, smp_processor_id());
1368e689cf4aSJeff Kirsher 
1369e689cf4aSJeff Kirsher 	val = (MAC_TXCFG_EIPG0 | MAC_TXCFG_NGU);
1370e689cf4aSJeff Kirsher 	if (full_duplex) {
1371e689cf4aSJeff Kirsher 		val |= (MAC_TXCFG_ICS | MAC_TXCFG_ICOLL);
1372e689cf4aSJeff Kirsher 	} else {
1373e689cf4aSJeff Kirsher 		/* MAC_TXCFG_NBO must be zero. */
1374e689cf4aSJeff Kirsher 	}
1375e689cf4aSJeff Kirsher 	writel(val, gp->regs + MAC_TXCFG);
1376e689cf4aSJeff Kirsher 
1377e689cf4aSJeff Kirsher 	val = (MAC_XIFCFG_OE | MAC_XIFCFG_LLED);
1378e689cf4aSJeff Kirsher 	if (!full_duplex &&
1379e689cf4aSJeff Kirsher 	    (gp->phy_type == phy_mii_mdio0 ||
1380e689cf4aSJeff Kirsher 	     gp->phy_type == phy_mii_mdio1)) {
1381e689cf4aSJeff Kirsher 		val |= MAC_XIFCFG_DISE;
1382e689cf4aSJeff Kirsher 	} else if (full_duplex) {
1383e689cf4aSJeff Kirsher 		val |= MAC_XIFCFG_FLED;
1384e689cf4aSJeff Kirsher 	}
1385e689cf4aSJeff Kirsher 
1386e689cf4aSJeff Kirsher 	if (speed == SPEED_1000)
1387e689cf4aSJeff Kirsher 		val |= (MAC_XIFCFG_GMII);
1388e689cf4aSJeff Kirsher 
1389e689cf4aSJeff Kirsher 	writel(val, gp->regs + MAC_XIFCFG);
1390e689cf4aSJeff Kirsher 
1391e689cf4aSJeff Kirsher 	/* If gigabit and half-duplex, enable carrier extension
1392e689cf4aSJeff Kirsher 	 * mode.  Else, disable it.
1393e689cf4aSJeff Kirsher 	 */
1394e689cf4aSJeff Kirsher 	if (speed == SPEED_1000 && !full_duplex) {
1395e689cf4aSJeff Kirsher 		val = readl(gp->regs + MAC_TXCFG);
1396e689cf4aSJeff Kirsher 		writel(val | MAC_TXCFG_TCE, gp->regs + MAC_TXCFG);
1397e689cf4aSJeff Kirsher 
1398e689cf4aSJeff Kirsher 		val = readl(gp->regs + MAC_RXCFG);
1399e689cf4aSJeff Kirsher 		writel(val | MAC_RXCFG_RCE, gp->regs + MAC_RXCFG);
1400e689cf4aSJeff Kirsher 	} else {
1401e689cf4aSJeff Kirsher 		val = readl(gp->regs + MAC_TXCFG);
1402e689cf4aSJeff Kirsher 		writel(val & ~MAC_TXCFG_TCE, gp->regs + MAC_TXCFG);
1403e689cf4aSJeff Kirsher 
1404e689cf4aSJeff Kirsher 		val = readl(gp->regs + MAC_RXCFG);
1405e689cf4aSJeff Kirsher 		writel(val & ~MAC_RXCFG_RCE, gp->regs + MAC_RXCFG);
1406e689cf4aSJeff Kirsher 	}
1407e689cf4aSJeff Kirsher 
1408e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_serialink ||
1409e689cf4aSJeff Kirsher 	    gp->phy_type == phy_serdes) {
1410e689cf4aSJeff Kirsher  		u32 pcs_lpa = readl(gp->regs + PCS_MIILP);
1411e689cf4aSJeff Kirsher 
1412e689cf4aSJeff Kirsher 		if (pcs_lpa & (PCS_MIIADV_SP | PCS_MIIADV_AP))
1413e689cf4aSJeff Kirsher 			pause = 1;
1414e689cf4aSJeff Kirsher 	}
1415e689cf4aSJeff Kirsher 
1416e689cf4aSJeff Kirsher 	if (!full_duplex)
1417e689cf4aSJeff Kirsher 		writel(512, gp->regs + MAC_STIME);
1418e689cf4aSJeff Kirsher 	else
1419e689cf4aSJeff Kirsher 		writel(64, gp->regs + MAC_STIME);
1420e689cf4aSJeff Kirsher 	val = readl(gp->regs + MAC_MCCFG);
1421e689cf4aSJeff Kirsher 	if (pause)
1422e689cf4aSJeff Kirsher 		val |= (MAC_MCCFG_SPE | MAC_MCCFG_RPE);
1423e689cf4aSJeff Kirsher 	else
1424e689cf4aSJeff Kirsher 		val &= ~(MAC_MCCFG_SPE | MAC_MCCFG_RPE);
1425e689cf4aSJeff Kirsher 	writel(val, gp->regs + MAC_MCCFG);
1426e689cf4aSJeff Kirsher 
1427e689cf4aSJeff Kirsher 	gem_start_dma(gp);
1428e689cf4aSJeff Kirsher 
1429e689cf4aSJeff Kirsher 	__netif_tx_unlock(txq);
1430e689cf4aSJeff Kirsher 
1431e689cf4aSJeff Kirsher 	if (netif_msg_link(gp)) {
1432e689cf4aSJeff Kirsher 		if (pause) {
1433e689cf4aSJeff Kirsher 			netdev_info(gp->dev,
1434e689cf4aSJeff Kirsher 				    "Pause is enabled (rxfifo: %d off: %d on: %d)\n",
1435e689cf4aSJeff Kirsher 				    gp->rx_fifo_sz,
1436e689cf4aSJeff Kirsher 				    gp->rx_pause_off,
1437e689cf4aSJeff Kirsher 				    gp->rx_pause_on);
1438e689cf4aSJeff Kirsher 		} else {
1439e689cf4aSJeff Kirsher 			netdev_info(gp->dev, "Pause is disabled\n");
1440e689cf4aSJeff Kirsher 		}
1441e689cf4aSJeff Kirsher 	}
1442e689cf4aSJeff Kirsher 
1443e689cf4aSJeff Kirsher 	return 0;
1444e689cf4aSJeff Kirsher }
1445e689cf4aSJeff Kirsher 
1446e689cf4aSJeff Kirsher static int gem_mdio_link_not_up(struct gem *gp)
1447e689cf4aSJeff Kirsher {
1448e689cf4aSJeff Kirsher 	switch (gp->lstate) {
1449e689cf4aSJeff Kirsher 	case link_force_ret:
1450e689cf4aSJeff Kirsher 		netif_info(gp, link, gp->dev,
1451e689cf4aSJeff Kirsher 			   "Autoneg failed again, keeping forced mode\n");
1452e689cf4aSJeff Kirsher 		gp->phy_mii.def->ops->setup_forced(&gp->phy_mii,
1453e689cf4aSJeff Kirsher 			gp->last_forced_speed, DUPLEX_HALF);
1454e689cf4aSJeff Kirsher 		gp->timer_ticks = 5;
1455e689cf4aSJeff Kirsher 		gp->lstate = link_force_ok;
1456e689cf4aSJeff Kirsher 		return 0;
1457e689cf4aSJeff Kirsher 	case link_aneg:
1458e689cf4aSJeff Kirsher 		/* We try forced modes after a failed aneg only on PHYs that don't
1459e689cf4aSJeff Kirsher 		 * have "magic_aneg" bit set, which means they internally do the
1460e689cf4aSJeff Kirsher 		 * while forced-mode thingy. On these, we just restart aneg
1461e689cf4aSJeff Kirsher 		 */
1462e689cf4aSJeff Kirsher 		if (gp->phy_mii.def->magic_aneg)
1463e689cf4aSJeff Kirsher 			return 1;
1464e689cf4aSJeff Kirsher 		netif_info(gp, link, gp->dev, "switching to forced 100bt\n");
1465e689cf4aSJeff Kirsher 		/* Try forced modes. */
1466e689cf4aSJeff Kirsher 		gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, SPEED_100,
1467e689cf4aSJeff Kirsher 			DUPLEX_HALF);
1468e689cf4aSJeff Kirsher 		gp->timer_ticks = 5;
1469e689cf4aSJeff Kirsher 		gp->lstate = link_force_try;
1470e689cf4aSJeff Kirsher 		return 0;
1471e689cf4aSJeff Kirsher 	case link_force_try:
1472e689cf4aSJeff Kirsher 		/* Downgrade from 100 to 10 Mbps if necessary.
1473e689cf4aSJeff Kirsher 		 * If already at 10Mbps, warn user about the
1474e689cf4aSJeff Kirsher 		 * situation every 10 ticks.
1475e689cf4aSJeff Kirsher 		 */
1476e689cf4aSJeff Kirsher 		if (gp->phy_mii.speed == SPEED_100) {
1477e689cf4aSJeff Kirsher 			gp->phy_mii.def->ops->setup_forced(&gp->phy_mii, SPEED_10,
1478e689cf4aSJeff Kirsher 				DUPLEX_HALF);
1479e689cf4aSJeff Kirsher 			gp->timer_ticks = 5;
1480e689cf4aSJeff Kirsher 			netif_info(gp, link, gp->dev,
1481e689cf4aSJeff Kirsher 				   "switching to forced 10bt\n");
1482e689cf4aSJeff Kirsher 			return 0;
1483e689cf4aSJeff Kirsher 		} else
1484e689cf4aSJeff Kirsher 			return 1;
1485e689cf4aSJeff Kirsher 	default:
1486e689cf4aSJeff Kirsher 		return 0;
1487e689cf4aSJeff Kirsher 	}
1488e689cf4aSJeff Kirsher }
1489e689cf4aSJeff Kirsher 
14900822c5d9SKees Cook static void gem_link_timer(struct timer_list *t)
1491e689cf4aSJeff Kirsher {
14920822c5d9SKees Cook 	struct gem *gp = from_timer(gp, t, link_timer);
1493e689cf4aSJeff Kirsher 	struct net_device *dev = gp->dev;
1494e689cf4aSJeff Kirsher 	int restart_aneg = 0;
1495e689cf4aSJeff Kirsher 
1496e689cf4aSJeff Kirsher 	/* There's no point doing anything if we're going to be reset */
1497e689cf4aSJeff Kirsher 	if (gp->reset_task_pending)
1498e689cf4aSJeff Kirsher 		return;
1499e689cf4aSJeff Kirsher 
1500e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_serialink ||
1501e689cf4aSJeff Kirsher 	    gp->phy_type == phy_serdes) {
1502e689cf4aSJeff Kirsher 		u32 val = readl(gp->regs + PCS_MIISTAT);
1503e689cf4aSJeff Kirsher 
1504e689cf4aSJeff Kirsher 		if (!(val & PCS_MIISTAT_LS))
1505e689cf4aSJeff Kirsher 			val = readl(gp->regs + PCS_MIISTAT);
1506e689cf4aSJeff Kirsher 
1507e689cf4aSJeff Kirsher 		if ((val & PCS_MIISTAT_LS) != 0) {
1508e689cf4aSJeff Kirsher 			if (gp->lstate == link_up)
1509e689cf4aSJeff Kirsher 				goto restart;
1510e689cf4aSJeff Kirsher 
1511e689cf4aSJeff Kirsher 			gp->lstate = link_up;
1512e689cf4aSJeff Kirsher 			netif_carrier_on(dev);
1513e689cf4aSJeff Kirsher 			(void)gem_set_link_modes(gp);
1514e689cf4aSJeff Kirsher 		}
1515e689cf4aSJeff Kirsher 		goto restart;
1516e689cf4aSJeff Kirsher 	}
1517e689cf4aSJeff Kirsher 	if (found_mii_phy(gp) && gp->phy_mii.def->ops->poll_link(&gp->phy_mii)) {
1518e689cf4aSJeff Kirsher 		/* Ok, here we got a link. If we had it due to a forced
1519e689cf4aSJeff Kirsher 		 * fallback, and we were configured for autoneg, we do
1520e689cf4aSJeff Kirsher 		 * retry a short autoneg pass. If you know your hub is
1521e689cf4aSJeff Kirsher 		 * broken, use ethtool ;)
1522e689cf4aSJeff Kirsher 		 */
1523e689cf4aSJeff Kirsher 		if (gp->lstate == link_force_try && gp->want_autoneg) {
1524e689cf4aSJeff Kirsher 			gp->lstate = link_force_ret;
1525e689cf4aSJeff Kirsher 			gp->last_forced_speed = gp->phy_mii.speed;
1526e689cf4aSJeff Kirsher 			gp->timer_ticks = 5;
1527e689cf4aSJeff Kirsher 			if (netif_msg_link(gp))
1528e689cf4aSJeff Kirsher 				netdev_info(dev,
1529e689cf4aSJeff Kirsher 					    "Got link after fallback, retrying autoneg once...\n");
1530e689cf4aSJeff Kirsher 			gp->phy_mii.def->ops->setup_aneg(&gp->phy_mii, gp->phy_mii.advertising);
1531e689cf4aSJeff Kirsher 		} else if (gp->lstate != link_up) {
1532e689cf4aSJeff Kirsher 			gp->lstate = link_up;
1533e689cf4aSJeff Kirsher 			netif_carrier_on(dev);
1534e689cf4aSJeff Kirsher 			if (gem_set_link_modes(gp))
1535e689cf4aSJeff Kirsher 				restart_aneg = 1;
1536e689cf4aSJeff Kirsher 		}
1537e689cf4aSJeff Kirsher 	} else {
1538e689cf4aSJeff Kirsher 		/* If the link was previously up, we restart the
1539e689cf4aSJeff Kirsher 		 * whole process
1540e689cf4aSJeff Kirsher 		 */
1541e689cf4aSJeff Kirsher 		if (gp->lstate == link_up) {
1542e689cf4aSJeff Kirsher 			gp->lstate = link_down;
1543e689cf4aSJeff Kirsher 			netif_info(gp, link, dev, "Link down\n");
1544e689cf4aSJeff Kirsher 			netif_carrier_off(dev);
1545e689cf4aSJeff Kirsher 			gem_schedule_reset(gp);
1546e689cf4aSJeff Kirsher 			/* The reset task will restart the timer */
1547e689cf4aSJeff Kirsher 			return;
1548e689cf4aSJeff Kirsher 		} else if (++gp->timer_ticks > 10) {
1549e689cf4aSJeff Kirsher 			if (found_mii_phy(gp))
1550e689cf4aSJeff Kirsher 				restart_aneg = gem_mdio_link_not_up(gp);
1551e689cf4aSJeff Kirsher 			else
1552e689cf4aSJeff Kirsher 				restart_aneg = 1;
1553e689cf4aSJeff Kirsher 		}
1554e689cf4aSJeff Kirsher 	}
1555e689cf4aSJeff Kirsher 	if (restart_aneg) {
1556e689cf4aSJeff Kirsher 		gem_begin_auto_negotiation(gp, NULL);
1557e689cf4aSJeff Kirsher 		return;
1558e689cf4aSJeff Kirsher 	}
1559e689cf4aSJeff Kirsher restart:
1560e689cf4aSJeff Kirsher 	mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10));
1561e689cf4aSJeff Kirsher }
1562e689cf4aSJeff Kirsher 
1563e689cf4aSJeff Kirsher static void gem_clean_rings(struct gem *gp)
1564e689cf4aSJeff Kirsher {
1565e689cf4aSJeff Kirsher 	struct gem_init_block *gb = gp->init_block;
1566e689cf4aSJeff Kirsher 	struct sk_buff *skb;
1567e689cf4aSJeff Kirsher 	int i;
1568e689cf4aSJeff Kirsher 	dma_addr_t dma_addr;
1569e689cf4aSJeff Kirsher 
1570e689cf4aSJeff Kirsher 	for (i = 0; i < RX_RING_SIZE; i++) {
1571e689cf4aSJeff Kirsher 		struct gem_rxd *rxd;
1572e689cf4aSJeff Kirsher 
1573e689cf4aSJeff Kirsher 		rxd = &gb->rxd[i];
1574e689cf4aSJeff Kirsher 		if (gp->rx_skbs[i] != NULL) {
1575e689cf4aSJeff Kirsher 			skb = gp->rx_skbs[i];
1576e689cf4aSJeff Kirsher 			dma_addr = le64_to_cpu(rxd->buffer);
1577e689cf4aSJeff Kirsher 			pci_unmap_page(gp->pdev, dma_addr,
1578e689cf4aSJeff Kirsher 				       RX_BUF_ALLOC_SIZE(gp),
1579e689cf4aSJeff Kirsher 				       PCI_DMA_FROMDEVICE);
1580e689cf4aSJeff Kirsher 			dev_kfree_skb_any(skb);
1581e689cf4aSJeff Kirsher 			gp->rx_skbs[i] = NULL;
1582e689cf4aSJeff Kirsher 		}
1583e689cf4aSJeff Kirsher 		rxd->status_word = 0;
1584b4468cc6SAlexander Duyck 		dma_wmb();
1585e689cf4aSJeff Kirsher 		rxd->buffer = 0;
1586e689cf4aSJeff Kirsher 	}
1587e689cf4aSJeff Kirsher 
1588e689cf4aSJeff Kirsher 	for (i = 0; i < TX_RING_SIZE; i++) {
1589e689cf4aSJeff Kirsher 		if (gp->tx_skbs[i] != NULL) {
1590e689cf4aSJeff Kirsher 			struct gem_txd *txd;
1591e689cf4aSJeff Kirsher 			int frag;
1592e689cf4aSJeff Kirsher 
1593e689cf4aSJeff Kirsher 			skb = gp->tx_skbs[i];
1594e689cf4aSJeff Kirsher 			gp->tx_skbs[i] = NULL;
1595e689cf4aSJeff Kirsher 
1596e689cf4aSJeff Kirsher 			for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1597e689cf4aSJeff Kirsher 				int ent = i & (TX_RING_SIZE - 1);
1598e689cf4aSJeff Kirsher 
1599e689cf4aSJeff Kirsher 				txd = &gb->txd[ent];
1600e689cf4aSJeff Kirsher 				dma_addr = le64_to_cpu(txd->buffer);
1601e689cf4aSJeff Kirsher 				pci_unmap_page(gp->pdev, dma_addr,
1602e689cf4aSJeff Kirsher 					       le64_to_cpu(txd->control_word) &
1603e689cf4aSJeff Kirsher 					       TXDCTRL_BUFSZ, PCI_DMA_TODEVICE);
1604e689cf4aSJeff Kirsher 
1605e689cf4aSJeff Kirsher 				if (frag != skb_shinfo(skb)->nr_frags)
1606e689cf4aSJeff Kirsher 					i++;
1607e689cf4aSJeff Kirsher 			}
1608e689cf4aSJeff Kirsher 			dev_kfree_skb_any(skb);
1609e689cf4aSJeff Kirsher 		}
1610e689cf4aSJeff Kirsher 	}
1611e689cf4aSJeff Kirsher }
1612e689cf4aSJeff Kirsher 
1613e689cf4aSJeff Kirsher static void gem_init_rings(struct gem *gp)
1614e689cf4aSJeff Kirsher {
1615e689cf4aSJeff Kirsher 	struct gem_init_block *gb = gp->init_block;
1616e689cf4aSJeff Kirsher 	struct net_device *dev = gp->dev;
1617e689cf4aSJeff Kirsher 	int i;
1618e689cf4aSJeff Kirsher 	dma_addr_t dma_addr;
1619e689cf4aSJeff Kirsher 
1620e689cf4aSJeff Kirsher 	gp->rx_new = gp->rx_old = gp->tx_new = gp->tx_old = 0;
1621e689cf4aSJeff Kirsher 
1622e689cf4aSJeff Kirsher 	gem_clean_rings(gp);
1623e689cf4aSJeff Kirsher 
1624e689cf4aSJeff Kirsher 	gp->rx_buf_sz = max(dev->mtu + ETH_HLEN + VLAN_HLEN,
1625e689cf4aSJeff Kirsher 			    (unsigned)VLAN_ETH_FRAME_LEN);
1626e689cf4aSJeff Kirsher 
1627e689cf4aSJeff Kirsher 	for (i = 0; i < RX_RING_SIZE; i++) {
1628e689cf4aSJeff Kirsher 		struct sk_buff *skb;
1629e689cf4aSJeff Kirsher 		struct gem_rxd *rxd = &gb->rxd[i];
1630e689cf4aSJeff Kirsher 
1631e689cf4aSJeff Kirsher 		skb = gem_alloc_skb(dev, RX_BUF_ALLOC_SIZE(gp), GFP_KERNEL);
1632e689cf4aSJeff Kirsher 		if (!skb) {
1633e689cf4aSJeff Kirsher 			rxd->buffer = 0;
1634e689cf4aSJeff Kirsher 			rxd->status_word = 0;
1635e689cf4aSJeff Kirsher 			continue;
1636e689cf4aSJeff Kirsher 		}
1637e689cf4aSJeff Kirsher 
1638e689cf4aSJeff Kirsher 		gp->rx_skbs[i] = skb;
1639e689cf4aSJeff Kirsher 		skb_put(skb, (gp->rx_buf_sz + RX_OFFSET));
1640e689cf4aSJeff Kirsher 		dma_addr = pci_map_page(gp->pdev,
1641e689cf4aSJeff Kirsher 					virt_to_page(skb->data),
1642e689cf4aSJeff Kirsher 					offset_in_page(skb->data),
1643e689cf4aSJeff Kirsher 					RX_BUF_ALLOC_SIZE(gp),
1644e689cf4aSJeff Kirsher 					PCI_DMA_FROMDEVICE);
1645e689cf4aSJeff Kirsher 		rxd->buffer = cpu_to_le64(dma_addr);
1646b4468cc6SAlexander Duyck 		dma_wmb();
1647e689cf4aSJeff Kirsher 		rxd->status_word = cpu_to_le64(RXDCTRL_FRESH(gp));
1648e689cf4aSJeff Kirsher 		skb_reserve(skb, RX_OFFSET);
1649e689cf4aSJeff Kirsher 	}
1650e689cf4aSJeff Kirsher 
1651e689cf4aSJeff Kirsher 	for (i = 0; i < TX_RING_SIZE; i++) {
1652e689cf4aSJeff Kirsher 		struct gem_txd *txd = &gb->txd[i];
1653e689cf4aSJeff Kirsher 
1654e689cf4aSJeff Kirsher 		txd->control_word = 0;
1655b4468cc6SAlexander Duyck 		dma_wmb();
1656e689cf4aSJeff Kirsher 		txd->buffer = 0;
1657e689cf4aSJeff Kirsher 	}
1658e689cf4aSJeff Kirsher 	wmb();
1659e689cf4aSJeff Kirsher }
1660e689cf4aSJeff Kirsher 
1661e689cf4aSJeff Kirsher /* Init PHY interface and start link poll state machine */
1662e689cf4aSJeff Kirsher static void gem_init_phy(struct gem *gp)
1663e689cf4aSJeff Kirsher {
1664e689cf4aSJeff Kirsher 	u32 mifcfg;
1665e689cf4aSJeff Kirsher 
1666e689cf4aSJeff Kirsher 	/* Revert MIF CFG setting done on stop_phy */
1667e689cf4aSJeff Kirsher 	mifcfg = readl(gp->regs + MIF_CFG);
1668e689cf4aSJeff Kirsher 	mifcfg &= ~MIF_CFG_BBMODE;
1669e689cf4aSJeff Kirsher 	writel(mifcfg, gp->regs + MIF_CFG);
1670e689cf4aSJeff Kirsher 
1671e689cf4aSJeff Kirsher 	if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) {
1672e689cf4aSJeff Kirsher 		int i;
1673e689cf4aSJeff Kirsher 
1674e689cf4aSJeff Kirsher 		/* Those delay sucks, the HW seem to love them though, I'll
1675e689cf4aSJeff Kirsher 		 * serisouly consider breaking some locks here to be able
1676e689cf4aSJeff Kirsher 		 * to schedule instead
1677e689cf4aSJeff Kirsher 		 */
1678e689cf4aSJeff Kirsher 		for (i = 0; i < 3; i++) {
1679e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC
1680e689cf4aSJeff Kirsher 			pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0);
1681e689cf4aSJeff Kirsher 			msleep(20);
1682e689cf4aSJeff Kirsher #endif
1683e689cf4aSJeff Kirsher 			/* Some PHYs used by apple have problem getting back to us,
1684e689cf4aSJeff Kirsher 			 * we do an additional reset here
1685e689cf4aSJeff Kirsher 			 */
1686abc4da45SDavid S. Miller 			sungem_phy_write(gp, MII_BMCR, BMCR_RESET);
1687e689cf4aSJeff Kirsher 			msleep(20);
1688abc4da45SDavid S. Miller 			if (sungem_phy_read(gp, MII_BMCR) != 0xffff)
1689e689cf4aSJeff Kirsher 				break;
1690e689cf4aSJeff Kirsher 			if (i == 2)
1691e689cf4aSJeff Kirsher 				netdev_warn(gp->dev, "GMAC PHY not responding !\n");
1692e689cf4aSJeff Kirsher 		}
1693e689cf4aSJeff Kirsher 	}
1694e689cf4aSJeff Kirsher 
1695e689cf4aSJeff Kirsher 	if (gp->pdev->vendor == PCI_VENDOR_ID_SUN &&
1696e689cf4aSJeff Kirsher 	    gp->pdev->device == PCI_DEVICE_ID_SUN_GEM) {
1697e689cf4aSJeff Kirsher 		u32 val;
1698e689cf4aSJeff Kirsher 
1699e689cf4aSJeff Kirsher 		/* Init datapath mode register. */
1700e689cf4aSJeff Kirsher 		if (gp->phy_type == phy_mii_mdio0 ||
1701e689cf4aSJeff Kirsher 		    gp->phy_type == phy_mii_mdio1) {
1702e689cf4aSJeff Kirsher 			val = PCS_DMODE_MGM;
1703e689cf4aSJeff Kirsher 		} else if (gp->phy_type == phy_serialink) {
1704e689cf4aSJeff Kirsher 			val = PCS_DMODE_SM | PCS_DMODE_GMOE;
1705e689cf4aSJeff Kirsher 		} else {
1706e689cf4aSJeff Kirsher 			val = PCS_DMODE_ESM;
1707e689cf4aSJeff Kirsher 		}
1708e689cf4aSJeff Kirsher 
1709e689cf4aSJeff Kirsher 		writel(val, gp->regs + PCS_DMODE);
1710e689cf4aSJeff Kirsher 	}
1711e689cf4aSJeff Kirsher 
1712e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_mii_mdio0 ||
1713e689cf4aSJeff Kirsher 	    gp->phy_type == phy_mii_mdio1) {
1714e689cf4aSJeff Kirsher 		/* Reset and detect MII PHY */
171519e2f6feSDavid S. Miller 		sungem_phy_probe(&gp->phy_mii, gp->mii_phy_addr);
1716e689cf4aSJeff Kirsher 
1717e689cf4aSJeff Kirsher 		/* Init PHY */
1718e689cf4aSJeff Kirsher 		if (gp->phy_mii.def && gp->phy_mii.def->ops->init)
1719e689cf4aSJeff Kirsher 			gp->phy_mii.def->ops->init(&gp->phy_mii);
1720e689cf4aSJeff Kirsher 	} else {
1721e689cf4aSJeff Kirsher 		gem_pcs_reset(gp);
1722e689cf4aSJeff Kirsher 		gem_pcs_reinit_adv(gp);
1723e689cf4aSJeff Kirsher 	}
1724e689cf4aSJeff Kirsher 
1725e689cf4aSJeff Kirsher 	/* Default aneg parameters */
1726e689cf4aSJeff Kirsher 	gp->timer_ticks = 0;
1727e689cf4aSJeff Kirsher 	gp->lstate = link_down;
1728e689cf4aSJeff Kirsher 	netif_carrier_off(gp->dev);
1729e689cf4aSJeff Kirsher 
1730e689cf4aSJeff Kirsher 	/* Print things out */
1731e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_mii_mdio0 ||
1732e689cf4aSJeff Kirsher 	    gp->phy_type == phy_mii_mdio1)
1733e689cf4aSJeff Kirsher 		netdev_info(gp->dev, "Found %s PHY\n",
1734e689cf4aSJeff Kirsher 			    gp->phy_mii.def ? gp->phy_mii.def->name : "no");
1735e689cf4aSJeff Kirsher 
1736e689cf4aSJeff Kirsher 	gem_begin_auto_negotiation(gp, NULL);
1737e689cf4aSJeff Kirsher }
1738e689cf4aSJeff Kirsher 
1739e689cf4aSJeff Kirsher static void gem_init_dma(struct gem *gp)
1740e689cf4aSJeff Kirsher {
1741e689cf4aSJeff Kirsher 	u64 desc_dma = (u64) gp->gblock_dvma;
1742e689cf4aSJeff Kirsher 	u32 val;
1743e689cf4aSJeff Kirsher 
1744e689cf4aSJeff Kirsher 	val = (TXDMA_CFG_BASE | (0x7ff << 10) | TXDMA_CFG_PMODE);
1745e689cf4aSJeff Kirsher 	writel(val, gp->regs + TXDMA_CFG);
1746e689cf4aSJeff Kirsher 
1747e689cf4aSJeff Kirsher 	writel(desc_dma >> 32, gp->regs + TXDMA_DBHI);
1748e689cf4aSJeff Kirsher 	writel(desc_dma & 0xffffffff, gp->regs + TXDMA_DBLOW);
1749e689cf4aSJeff Kirsher 	desc_dma += (INIT_BLOCK_TX_RING_SIZE * sizeof(struct gem_txd));
1750e689cf4aSJeff Kirsher 
1751e689cf4aSJeff Kirsher 	writel(0, gp->regs + TXDMA_KICK);
1752e689cf4aSJeff Kirsher 
1753e689cf4aSJeff Kirsher 	val = (RXDMA_CFG_BASE | (RX_OFFSET << 10) |
175412b03558SEric Dumazet 	       (ETH_HLEN << 13) | RXDMA_CFG_FTHRESH_128);
1755e689cf4aSJeff Kirsher 	writel(val, gp->regs + RXDMA_CFG);
1756e689cf4aSJeff Kirsher 
1757e689cf4aSJeff Kirsher 	writel(desc_dma >> 32, gp->regs + RXDMA_DBHI);
1758e689cf4aSJeff Kirsher 	writel(desc_dma & 0xffffffff, gp->regs + RXDMA_DBLOW);
1759e689cf4aSJeff Kirsher 
1760e689cf4aSJeff Kirsher 	writel(RX_RING_SIZE - 4, gp->regs + RXDMA_KICK);
1761e689cf4aSJeff Kirsher 
1762e689cf4aSJeff Kirsher 	val  = (((gp->rx_pause_off / 64) << 0) & RXDMA_PTHRESH_OFF);
1763e689cf4aSJeff Kirsher 	val |= (((gp->rx_pause_on / 64) << 12) & RXDMA_PTHRESH_ON);
1764e689cf4aSJeff Kirsher 	writel(val, gp->regs + RXDMA_PTHRESH);
1765e689cf4aSJeff Kirsher 
1766e689cf4aSJeff Kirsher 	if (readl(gp->regs + GREG_BIFCFG) & GREG_BIFCFG_M66EN)
1767e689cf4aSJeff Kirsher 		writel(((5 & RXDMA_BLANK_IPKTS) |
1768e689cf4aSJeff Kirsher 			((8 << 12) & RXDMA_BLANK_ITIME)),
1769e689cf4aSJeff Kirsher 		       gp->regs + RXDMA_BLANK);
1770e689cf4aSJeff Kirsher 	else
1771e689cf4aSJeff Kirsher 		writel(((5 & RXDMA_BLANK_IPKTS) |
1772e689cf4aSJeff Kirsher 			((4 << 12) & RXDMA_BLANK_ITIME)),
1773e689cf4aSJeff Kirsher 		       gp->regs + RXDMA_BLANK);
1774e689cf4aSJeff Kirsher }
1775e689cf4aSJeff Kirsher 
1776e689cf4aSJeff Kirsher static u32 gem_setup_multicast(struct gem *gp)
1777e689cf4aSJeff Kirsher {
1778e689cf4aSJeff Kirsher 	u32 rxcfg = 0;
1779e689cf4aSJeff Kirsher 	int i;
1780e689cf4aSJeff Kirsher 
1781e689cf4aSJeff Kirsher 	if ((gp->dev->flags & IFF_ALLMULTI) ||
1782e689cf4aSJeff Kirsher 	    (netdev_mc_count(gp->dev) > 256)) {
1783e689cf4aSJeff Kirsher 	    	for (i=0; i<16; i++)
1784e689cf4aSJeff Kirsher 			writel(0xffff, gp->regs + MAC_HASH0 + (i << 2));
1785e689cf4aSJeff Kirsher 		rxcfg |= MAC_RXCFG_HFE;
1786e689cf4aSJeff Kirsher 	} else if (gp->dev->flags & IFF_PROMISC) {
1787e689cf4aSJeff Kirsher 		rxcfg |= MAC_RXCFG_PROM;
1788e689cf4aSJeff Kirsher 	} else {
1789e689cf4aSJeff Kirsher 		u16 hash_table[16];
1790e689cf4aSJeff Kirsher 		u32 crc;
1791e689cf4aSJeff Kirsher 		struct netdev_hw_addr *ha;
1792e689cf4aSJeff Kirsher 		int i;
1793e689cf4aSJeff Kirsher 
1794e689cf4aSJeff Kirsher 		memset(hash_table, 0, sizeof(hash_table));
1795e689cf4aSJeff Kirsher 		netdev_for_each_mc_addr(ha, gp->dev) {
1796e689cf4aSJeff Kirsher 			crc = ether_crc_le(6, ha->addr);
1797e689cf4aSJeff Kirsher 			crc >>= 24;
1798e689cf4aSJeff Kirsher 			hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
1799e689cf4aSJeff Kirsher 		}
1800e689cf4aSJeff Kirsher 	    	for (i=0; i<16; i++)
1801e689cf4aSJeff Kirsher 			writel(hash_table[i], gp->regs + MAC_HASH0 + (i << 2));
1802e689cf4aSJeff Kirsher 		rxcfg |= MAC_RXCFG_HFE;
1803e689cf4aSJeff Kirsher 	}
1804e689cf4aSJeff Kirsher 
1805e689cf4aSJeff Kirsher 	return rxcfg;
1806e689cf4aSJeff Kirsher }
1807e689cf4aSJeff Kirsher 
1808e689cf4aSJeff Kirsher static void gem_init_mac(struct gem *gp)
1809e689cf4aSJeff Kirsher {
1810e689cf4aSJeff Kirsher 	unsigned char *e = &gp->dev->dev_addr[0];
1811e689cf4aSJeff Kirsher 
1812e689cf4aSJeff Kirsher 	writel(0x1bf0, gp->regs + MAC_SNDPAUSE);
1813e689cf4aSJeff Kirsher 
1814e689cf4aSJeff Kirsher 	writel(0x00, gp->regs + MAC_IPG0);
1815e689cf4aSJeff Kirsher 	writel(0x08, gp->regs + MAC_IPG1);
1816e689cf4aSJeff Kirsher 	writel(0x04, gp->regs + MAC_IPG2);
1817e689cf4aSJeff Kirsher 	writel(0x40, gp->regs + MAC_STIME);
1818e689cf4aSJeff Kirsher 	writel(0x40, gp->regs + MAC_MINFSZ);
1819e689cf4aSJeff Kirsher 
1820e689cf4aSJeff Kirsher 	/* Ethernet payload + header + FCS + optional VLAN tag. */
1821e689cf4aSJeff Kirsher 	writel(0x20000000 | (gp->rx_buf_sz + 4), gp->regs + MAC_MAXFSZ);
1822e689cf4aSJeff Kirsher 
1823e689cf4aSJeff Kirsher 	writel(0x07, gp->regs + MAC_PASIZE);
1824e689cf4aSJeff Kirsher 	writel(0x04, gp->regs + MAC_JAMSIZE);
1825e689cf4aSJeff Kirsher 	writel(0x10, gp->regs + MAC_ATTLIM);
1826e689cf4aSJeff Kirsher 	writel(0x8808, gp->regs + MAC_MCTYPE);
1827e689cf4aSJeff Kirsher 
1828e689cf4aSJeff Kirsher 	writel((e[5] | (e[4] << 8)) & 0x3ff, gp->regs + MAC_RANDSEED);
1829e689cf4aSJeff Kirsher 
1830e689cf4aSJeff Kirsher 	writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0);
1831e689cf4aSJeff Kirsher 	writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1);
1832e689cf4aSJeff Kirsher 	writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2);
1833e689cf4aSJeff Kirsher 
1834e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_ADDR3);
1835e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_ADDR4);
1836e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_ADDR5);
1837e689cf4aSJeff Kirsher 
1838e689cf4aSJeff Kirsher 	writel(0x0001, gp->regs + MAC_ADDR6);
1839e689cf4aSJeff Kirsher 	writel(0xc200, gp->regs + MAC_ADDR7);
1840e689cf4aSJeff Kirsher 	writel(0x0180, gp->regs + MAC_ADDR8);
1841e689cf4aSJeff Kirsher 
1842e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AFILT0);
1843e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AFILT1);
1844e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AFILT2);
1845e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AF21MSK);
1846e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AF0MSK);
1847e689cf4aSJeff Kirsher 
1848e689cf4aSJeff Kirsher 	gp->mac_rx_cfg = gem_setup_multicast(gp);
1849e689cf4aSJeff Kirsher #ifdef STRIP_FCS
1850e689cf4aSJeff Kirsher 	gp->mac_rx_cfg |= MAC_RXCFG_SFCS;
1851e689cf4aSJeff Kirsher #endif
1852e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_NCOLL);
1853e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_FASUCC);
1854e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_ECOLL);
1855e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_LCOLL);
1856e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_DTIMER);
1857e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_PATMPS);
1858e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_RFCTR);
1859e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_LERR);
1860e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AERR);
1861e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_FCSERR);
1862e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_RXCVERR);
1863e689cf4aSJeff Kirsher 
1864e689cf4aSJeff Kirsher 	/* Clear RX/TX/MAC/XIF config, we will set these up and enable
1865e689cf4aSJeff Kirsher 	 * them once a link is established.
1866e689cf4aSJeff Kirsher 	 */
1867e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_TXCFG);
1868e689cf4aSJeff Kirsher 	writel(gp->mac_rx_cfg, gp->regs + MAC_RXCFG);
1869e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_MCCFG);
1870e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_XIFCFG);
1871e689cf4aSJeff Kirsher 
1872e689cf4aSJeff Kirsher 	/* Setup MAC interrupts.  We want to get all of the interesting
1873e689cf4aSJeff Kirsher 	 * counter expiration events, but we do not want to hear about
1874e689cf4aSJeff Kirsher 	 * normal rx/tx as the DMA engine tells us that.
1875e689cf4aSJeff Kirsher 	 */
1876e689cf4aSJeff Kirsher 	writel(MAC_TXSTAT_XMIT, gp->regs + MAC_TXMASK);
1877e689cf4aSJeff Kirsher 	writel(MAC_RXSTAT_RCV, gp->regs + MAC_RXMASK);
1878e689cf4aSJeff Kirsher 
1879e689cf4aSJeff Kirsher 	/* Don't enable even the PAUSE interrupts for now, we
1880e689cf4aSJeff Kirsher 	 * make no use of those events other than to record them.
1881e689cf4aSJeff Kirsher 	 */
1882e689cf4aSJeff Kirsher 	writel(0xffffffff, gp->regs + MAC_MCMASK);
1883e689cf4aSJeff Kirsher 
1884e689cf4aSJeff Kirsher 	/* Don't enable GEM's WOL in normal operations
1885e689cf4aSJeff Kirsher 	 */
1886e689cf4aSJeff Kirsher 	if (gp->has_wol)
1887e689cf4aSJeff Kirsher 		writel(0, gp->regs + WOL_WAKECSR);
1888e689cf4aSJeff Kirsher }
1889e689cf4aSJeff Kirsher 
1890e689cf4aSJeff Kirsher static void gem_init_pause_thresholds(struct gem *gp)
1891e689cf4aSJeff Kirsher {
1892e689cf4aSJeff Kirsher        	u32 cfg;
1893e689cf4aSJeff Kirsher 
1894e689cf4aSJeff Kirsher 	/* Calculate pause thresholds.  Setting the OFF threshold to the
1895e689cf4aSJeff Kirsher 	 * full RX fifo size effectively disables PAUSE generation which
1896e689cf4aSJeff Kirsher 	 * is what we do for 10/100 only GEMs which have FIFOs too small
1897e689cf4aSJeff Kirsher 	 * to make real gains from PAUSE.
1898e689cf4aSJeff Kirsher 	 */
1899e689cf4aSJeff Kirsher 	if (gp->rx_fifo_sz <= (2 * 1024)) {
1900e689cf4aSJeff Kirsher 		gp->rx_pause_off = gp->rx_pause_on = gp->rx_fifo_sz;
1901e689cf4aSJeff Kirsher 	} else {
1902e689cf4aSJeff Kirsher 		int max_frame = (gp->rx_buf_sz + 4 + 64) & ~63;
1903e689cf4aSJeff Kirsher 		int off = (gp->rx_fifo_sz - (max_frame * 2));
1904e689cf4aSJeff Kirsher 		int on = off - max_frame;
1905e689cf4aSJeff Kirsher 
1906e689cf4aSJeff Kirsher 		gp->rx_pause_off = off;
1907e689cf4aSJeff Kirsher 		gp->rx_pause_on = on;
1908e689cf4aSJeff Kirsher 	}
1909e689cf4aSJeff Kirsher 
1910e689cf4aSJeff Kirsher 
1911e689cf4aSJeff Kirsher 	/* Configure the chip "burst" DMA mode & enable some
1912e689cf4aSJeff Kirsher 	 * HW bug fixes on Apple version
1913e689cf4aSJeff Kirsher 	 */
1914e689cf4aSJeff Kirsher        	cfg  = 0;
1915e689cf4aSJeff Kirsher        	if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE)
1916e689cf4aSJeff Kirsher 		cfg |= GREG_CFG_RONPAULBIT | GREG_CFG_ENBUG2FIX;
1917e689cf4aSJeff Kirsher #if !defined(CONFIG_SPARC64) && !defined(CONFIG_ALPHA)
1918e689cf4aSJeff Kirsher        	cfg |= GREG_CFG_IBURST;
1919e689cf4aSJeff Kirsher #endif
1920e689cf4aSJeff Kirsher        	cfg |= ((31 << 1) & GREG_CFG_TXDMALIM);
1921e689cf4aSJeff Kirsher        	cfg |= ((31 << 6) & GREG_CFG_RXDMALIM);
1922e689cf4aSJeff Kirsher        	writel(cfg, gp->regs + GREG_CFG);
1923e689cf4aSJeff Kirsher 
1924e689cf4aSJeff Kirsher 	/* If Infinite Burst didn't stick, then use different
1925e689cf4aSJeff Kirsher 	 * thresholds (and Apple bug fixes don't exist)
1926e689cf4aSJeff Kirsher 	 */
1927e689cf4aSJeff Kirsher 	if (!(readl(gp->regs + GREG_CFG) & GREG_CFG_IBURST)) {
1928e689cf4aSJeff Kirsher 		cfg = ((2 << 1) & GREG_CFG_TXDMALIM);
1929e689cf4aSJeff Kirsher 		cfg |= ((8 << 6) & GREG_CFG_RXDMALIM);
1930e689cf4aSJeff Kirsher 		writel(cfg, gp->regs + GREG_CFG);
1931e689cf4aSJeff Kirsher 	}
1932e689cf4aSJeff Kirsher }
1933e689cf4aSJeff Kirsher 
1934e689cf4aSJeff Kirsher static int gem_check_invariants(struct gem *gp)
1935e689cf4aSJeff Kirsher {
1936e689cf4aSJeff Kirsher 	struct pci_dev *pdev = gp->pdev;
1937e689cf4aSJeff Kirsher 	u32 mif_cfg;
1938e689cf4aSJeff Kirsher 
1939e689cf4aSJeff Kirsher 	/* On Apple's sungem, we can't rely on registers as the chip
1940e689cf4aSJeff Kirsher 	 * was been powered down by the firmware. The PHY is looked
1941e689cf4aSJeff Kirsher 	 * up later on.
1942e689cf4aSJeff Kirsher 	 */
1943e689cf4aSJeff Kirsher 	if (pdev->vendor == PCI_VENDOR_ID_APPLE) {
1944e689cf4aSJeff Kirsher 		gp->phy_type = phy_mii_mdio0;
1945e689cf4aSJeff Kirsher 		gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64;
1946e689cf4aSJeff Kirsher 		gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64;
1947e689cf4aSJeff Kirsher 		gp->swrst_base = 0;
1948e689cf4aSJeff Kirsher 
1949e689cf4aSJeff Kirsher 		mif_cfg = readl(gp->regs + MIF_CFG);
1950e689cf4aSJeff Kirsher 		mif_cfg &= ~(MIF_CFG_PSELECT|MIF_CFG_POLL|MIF_CFG_BBMODE|MIF_CFG_MDI1);
1951e689cf4aSJeff Kirsher 		mif_cfg |= MIF_CFG_MDI0;
1952e689cf4aSJeff Kirsher 		writel(mif_cfg, gp->regs + MIF_CFG);
1953e689cf4aSJeff Kirsher 		writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE);
1954e689cf4aSJeff Kirsher 		writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG);
1955e689cf4aSJeff Kirsher 
1956e689cf4aSJeff Kirsher 		/* We hard-code the PHY address so we can properly bring it out of
1957e689cf4aSJeff Kirsher 		 * reset later on, we can't really probe it at this point, though
1958e689cf4aSJeff Kirsher 		 * that isn't an issue.
1959e689cf4aSJeff Kirsher 		 */
1960e689cf4aSJeff Kirsher 		if (gp->pdev->device == PCI_DEVICE_ID_APPLE_K2_GMAC)
1961e689cf4aSJeff Kirsher 			gp->mii_phy_addr = 1;
1962e689cf4aSJeff Kirsher 		else
1963e689cf4aSJeff Kirsher 			gp->mii_phy_addr = 0;
1964e689cf4aSJeff Kirsher 
1965e689cf4aSJeff Kirsher 		return 0;
1966e689cf4aSJeff Kirsher 	}
1967e689cf4aSJeff Kirsher 
1968e689cf4aSJeff Kirsher 	mif_cfg = readl(gp->regs + MIF_CFG);
1969e689cf4aSJeff Kirsher 
1970e689cf4aSJeff Kirsher 	if (pdev->vendor == PCI_VENDOR_ID_SUN &&
1971e689cf4aSJeff Kirsher 	    pdev->device == PCI_DEVICE_ID_SUN_RIO_GEM) {
1972e689cf4aSJeff Kirsher 		/* One of the MII PHYs _must_ be present
1973e689cf4aSJeff Kirsher 		 * as this chip has no gigabit PHY.
1974e689cf4aSJeff Kirsher 		 */
1975e689cf4aSJeff Kirsher 		if ((mif_cfg & (MIF_CFG_MDI0 | MIF_CFG_MDI1)) == 0) {
1976e689cf4aSJeff Kirsher 			pr_err("RIO GEM lacks MII phy, mif_cfg[%08x]\n",
1977e689cf4aSJeff Kirsher 			       mif_cfg);
1978e689cf4aSJeff Kirsher 			return -1;
1979e689cf4aSJeff Kirsher 		}
1980e689cf4aSJeff Kirsher 	}
1981e689cf4aSJeff Kirsher 
1982e689cf4aSJeff Kirsher 	/* Determine initial PHY interface type guess.  MDIO1 is the
1983e689cf4aSJeff Kirsher 	 * external PHY and thus takes precedence over MDIO0.
1984e689cf4aSJeff Kirsher 	 */
1985e689cf4aSJeff Kirsher 
1986e689cf4aSJeff Kirsher 	if (mif_cfg & MIF_CFG_MDI1) {
1987e689cf4aSJeff Kirsher 		gp->phy_type = phy_mii_mdio1;
1988e689cf4aSJeff Kirsher 		mif_cfg |= MIF_CFG_PSELECT;
1989e689cf4aSJeff Kirsher 		writel(mif_cfg, gp->regs + MIF_CFG);
1990e689cf4aSJeff Kirsher 	} else if (mif_cfg & MIF_CFG_MDI0) {
1991e689cf4aSJeff Kirsher 		gp->phy_type = phy_mii_mdio0;
1992e689cf4aSJeff Kirsher 		mif_cfg &= ~MIF_CFG_PSELECT;
1993e689cf4aSJeff Kirsher 		writel(mif_cfg, gp->regs + MIF_CFG);
1994e689cf4aSJeff Kirsher 	} else {
1995e689cf4aSJeff Kirsher #ifdef CONFIG_SPARC
1996e689cf4aSJeff Kirsher 		const char *p;
1997e689cf4aSJeff Kirsher 
1998e689cf4aSJeff Kirsher 		p = of_get_property(gp->of_node, "shared-pins", NULL);
1999e689cf4aSJeff Kirsher 		if (p && !strcmp(p, "serdes"))
2000e689cf4aSJeff Kirsher 			gp->phy_type = phy_serdes;
2001e689cf4aSJeff Kirsher 		else
2002e689cf4aSJeff Kirsher #endif
2003e689cf4aSJeff Kirsher 			gp->phy_type = phy_serialink;
2004e689cf4aSJeff Kirsher 	}
2005e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_mii_mdio1 ||
2006e689cf4aSJeff Kirsher 	    gp->phy_type == phy_mii_mdio0) {
2007e689cf4aSJeff Kirsher 		int i;
2008e689cf4aSJeff Kirsher 
2009e689cf4aSJeff Kirsher 		for (i = 0; i < 32; i++) {
2010e689cf4aSJeff Kirsher 			gp->mii_phy_addr = i;
2011abc4da45SDavid S. Miller 			if (sungem_phy_read(gp, MII_BMCR) != 0xffff)
2012e689cf4aSJeff Kirsher 				break;
2013e689cf4aSJeff Kirsher 		}
2014e689cf4aSJeff Kirsher 		if (i == 32) {
2015e689cf4aSJeff Kirsher 			if (pdev->device != PCI_DEVICE_ID_SUN_GEM) {
2016e689cf4aSJeff Kirsher 				pr_err("RIO MII phy will not respond\n");
2017e689cf4aSJeff Kirsher 				return -1;
2018e689cf4aSJeff Kirsher 			}
2019e689cf4aSJeff Kirsher 			gp->phy_type = phy_serdes;
2020e689cf4aSJeff Kirsher 		}
2021e689cf4aSJeff Kirsher 	}
2022e689cf4aSJeff Kirsher 
2023e689cf4aSJeff Kirsher 	/* Fetch the FIFO configurations now too. */
2024e689cf4aSJeff Kirsher 	gp->tx_fifo_sz = readl(gp->regs + TXDMA_FSZ) * 64;
2025e689cf4aSJeff Kirsher 	gp->rx_fifo_sz = readl(gp->regs + RXDMA_FSZ) * 64;
2026e689cf4aSJeff Kirsher 
2027e689cf4aSJeff Kirsher 	if (pdev->vendor == PCI_VENDOR_ID_SUN) {
2028e689cf4aSJeff Kirsher 		if (pdev->device == PCI_DEVICE_ID_SUN_GEM) {
2029e689cf4aSJeff Kirsher 			if (gp->tx_fifo_sz != (9 * 1024) ||
2030e689cf4aSJeff Kirsher 			    gp->rx_fifo_sz != (20 * 1024)) {
2031e689cf4aSJeff Kirsher 				pr_err("GEM has bogus fifo sizes tx(%d) rx(%d)\n",
2032e689cf4aSJeff Kirsher 				       gp->tx_fifo_sz, gp->rx_fifo_sz);
2033e689cf4aSJeff Kirsher 				return -1;
2034e689cf4aSJeff Kirsher 			}
2035e689cf4aSJeff Kirsher 			gp->swrst_base = 0;
2036e689cf4aSJeff Kirsher 		} else {
2037e689cf4aSJeff Kirsher 			if (gp->tx_fifo_sz != (2 * 1024) ||
2038e689cf4aSJeff Kirsher 			    gp->rx_fifo_sz != (2 * 1024)) {
2039e689cf4aSJeff Kirsher 				pr_err("RIO GEM has bogus fifo sizes tx(%d) rx(%d)\n",
2040e689cf4aSJeff Kirsher 				       gp->tx_fifo_sz, gp->rx_fifo_sz);
2041e689cf4aSJeff Kirsher 				return -1;
2042e689cf4aSJeff Kirsher 			}
2043e689cf4aSJeff Kirsher 			gp->swrst_base = (64 / 4) << GREG_SWRST_CACHE_SHIFT;
2044e689cf4aSJeff Kirsher 		}
2045e689cf4aSJeff Kirsher 	}
2046e689cf4aSJeff Kirsher 
2047e689cf4aSJeff Kirsher 	return 0;
2048e689cf4aSJeff Kirsher }
2049e689cf4aSJeff Kirsher 
2050e689cf4aSJeff Kirsher static void gem_reinit_chip(struct gem *gp)
2051e689cf4aSJeff Kirsher {
2052e689cf4aSJeff Kirsher 	/* Reset the chip */
2053e689cf4aSJeff Kirsher 	gem_reset(gp);
2054e689cf4aSJeff Kirsher 
2055e689cf4aSJeff Kirsher 	/* Make sure ints are disabled */
2056e689cf4aSJeff Kirsher 	gem_disable_ints(gp);
2057e689cf4aSJeff Kirsher 
2058e689cf4aSJeff Kirsher 	/* Allocate & setup ring buffers */
2059e689cf4aSJeff Kirsher 	gem_init_rings(gp);
2060e689cf4aSJeff Kirsher 
2061e689cf4aSJeff Kirsher 	/* Configure pause thresholds */
2062e689cf4aSJeff Kirsher 	gem_init_pause_thresholds(gp);
2063e689cf4aSJeff Kirsher 
2064e689cf4aSJeff Kirsher 	/* Init DMA & MAC engines */
2065e689cf4aSJeff Kirsher 	gem_init_dma(gp);
2066e689cf4aSJeff Kirsher 	gem_init_mac(gp);
2067e689cf4aSJeff Kirsher }
2068e689cf4aSJeff Kirsher 
2069e689cf4aSJeff Kirsher 
2070e689cf4aSJeff Kirsher static void gem_stop_phy(struct gem *gp, int wol)
2071e689cf4aSJeff Kirsher {
2072e689cf4aSJeff Kirsher 	u32 mifcfg;
2073e689cf4aSJeff Kirsher 
2074e689cf4aSJeff Kirsher 	/* Let the chip settle down a bit, it seems that helps
2075e689cf4aSJeff Kirsher 	 * for sleep mode on some models
2076e689cf4aSJeff Kirsher 	 */
2077e689cf4aSJeff Kirsher 	msleep(10);
2078e689cf4aSJeff Kirsher 
2079e689cf4aSJeff Kirsher 	/* Make sure we aren't polling PHY status change. We
2080e689cf4aSJeff Kirsher 	 * don't currently use that feature though
2081e689cf4aSJeff Kirsher 	 */
2082e689cf4aSJeff Kirsher 	mifcfg = readl(gp->regs + MIF_CFG);
2083e689cf4aSJeff Kirsher 	mifcfg &= ~MIF_CFG_POLL;
2084e689cf4aSJeff Kirsher 	writel(mifcfg, gp->regs + MIF_CFG);
2085e689cf4aSJeff Kirsher 
2086e689cf4aSJeff Kirsher 	if (wol && gp->has_wol) {
2087e689cf4aSJeff Kirsher 		unsigned char *e = &gp->dev->dev_addr[0];
2088e689cf4aSJeff Kirsher 		u32 csr;
2089e689cf4aSJeff Kirsher 
2090e689cf4aSJeff Kirsher 		/* Setup wake-on-lan for MAGIC packet */
2091e689cf4aSJeff Kirsher 		writel(MAC_RXCFG_HFE | MAC_RXCFG_SFCS | MAC_RXCFG_ENAB,
2092e689cf4aSJeff Kirsher 		       gp->regs + MAC_RXCFG);
2093e689cf4aSJeff Kirsher 		writel((e[4] << 8) | e[5], gp->regs + WOL_MATCH0);
2094e689cf4aSJeff Kirsher 		writel((e[2] << 8) | e[3], gp->regs + WOL_MATCH1);
2095e689cf4aSJeff Kirsher 		writel((e[0] << 8) | e[1], gp->regs + WOL_MATCH2);
2096e689cf4aSJeff Kirsher 
2097e689cf4aSJeff Kirsher 		writel(WOL_MCOUNT_N | WOL_MCOUNT_M, gp->regs + WOL_MCOUNT);
2098e689cf4aSJeff Kirsher 		csr = WOL_WAKECSR_ENABLE;
2099e689cf4aSJeff Kirsher 		if ((readl(gp->regs + MAC_XIFCFG) & MAC_XIFCFG_GMII) == 0)
2100e689cf4aSJeff Kirsher 			csr |= WOL_WAKECSR_MII;
2101e689cf4aSJeff Kirsher 		writel(csr, gp->regs + WOL_WAKECSR);
2102e689cf4aSJeff Kirsher 	} else {
2103e689cf4aSJeff Kirsher 		writel(0, gp->regs + MAC_RXCFG);
2104e689cf4aSJeff Kirsher 		(void)readl(gp->regs + MAC_RXCFG);
2105e689cf4aSJeff Kirsher 		/* Machine sleep will die in strange ways if we
2106e689cf4aSJeff Kirsher 		 * dont wait a bit here, looks like the chip takes
2107e689cf4aSJeff Kirsher 		 * some time to really shut down
2108e689cf4aSJeff Kirsher 		 */
2109e689cf4aSJeff Kirsher 		msleep(10);
2110e689cf4aSJeff Kirsher 	}
2111e689cf4aSJeff Kirsher 
2112e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_TXCFG);
2113e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_XIFCFG);
2114e689cf4aSJeff Kirsher 	writel(0, gp->regs + TXDMA_CFG);
2115e689cf4aSJeff Kirsher 	writel(0, gp->regs + RXDMA_CFG);
2116e689cf4aSJeff Kirsher 
2117e689cf4aSJeff Kirsher 	if (!wol) {
2118e689cf4aSJeff Kirsher 		gem_reset(gp);
2119e689cf4aSJeff Kirsher 		writel(MAC_TXRST_CMD, gp->regs + MAC_TXRST);
2120e689cf4aSJeff Kirsher 		writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST);
2121e689cf4aSJeff Kirsher 
2122e689cf4aSJeff Kirsher 		if (found_mii_phy(gp) && gp->phy_mii.def->ops->suspend)
2123e689cf4aSJeff Kirsher 			gp->phy_mii.def->ops->suspend(&gp->phy_mii);
2124e689cf4aSJeff Kirsher 
2125e689cf4aSJeff Kirsher 		/* According to Apple, we must set the MDIO pins to this begnign
2126e689cf4aSJeff Kirsher 		 * state or we may 1) eat more current, 2) damage some PHYs
2127e689cf4aSJeff Kirsher 		 */
2128e689cf4aSJeff Kirsher 		writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
2129e689cf4aSJeff Kirsher 		writel(0, gp->regs + MIF_BBCLK);
2130e689cf4aSJeff Kirsher 		writel(0, gp->regs + MIF_BBDATA);
2131e689cf4aSJeff Kirsher 		writel(0, gp->regs + MIF_BBOENAB);
2132e689cf4aSJeff Kirsher 		writel(MAC_XIFCFG_GMII | MAC_XIFCFG_LBCK, gp->regs + MAC_XIFCFG);
2133e689cf4aSJeff Kirsher 		(void) readl(gp->regs + MAC_XIFCFG);
2134e689cf4aSJeff Kirsher 	}
2135e689cf4aSJeff Kirsher }
2136e689cf4aSJeff Kirsher 
2137e689cf4aSJeff Kirsher static int gem_do_start(struct net_device *dev)
2138e689cf4aSJeff Kirsher {
2139e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2140e689cf4aSJeff Kirsher 	int rc;
2141e689cf4aSJeff Kirsher 
2142e689cf4aSJeff Kirsher 	/* Enable the cell */
2143e689cf4aSJeff Kirsher 	gem_get_cell(gp);
2144e689cf4aSJeff Kirsher 
2145e689cf4aSJeff Kirsher 	/* Make sure PCI access and bus master are enabled */
2146e689cf4aSJeff Kirsher 	rc = pci_enable_device(gp->pdev);
2147e689cf4aSJeff Kirsher 	if (rc) {
2148e689cf4aSJeff Kirsher 		netdev_err(dev, "Failed to enable chip on PCI bus !\n");
2149e689cf4aSJeff Kirsher 
2150e689cf4aSJeff Kirsher 		/* Put cell and forget it for now, it will be considered as
2151e689cf4aSJeff Kirsher 		 * still asleep, a new sleep cycle may bring it back
2152e689cf4aSJeff Kirsher 		 */
2153e689cf4aSJeff Kirsher 		gem_put_cell(gp);
2154e689cf4aSJeff Kirsher 		return -ENXIO;
2155e689cf4aSJeff Kirsher 	}
2156e689cf4aSJeff Kirsher 	pci_set_master(gp->pdev);
2157e689cf4aSJeff Kirsher 
2158e689cf4aSJeff Kirsher 	/* Init & setup chip hardware */
2159e689cf4aSJeff Kirsher 	gem_reinit_chip(gp);
2160e689cf4aSJeff Kirsher 
2161e689cf4aSJeff Kirsher 	/* An interrupt might come in handy */
2162e689cf4aSJeff Kirsher 	rc = request_irq(gp->pdev->irq, gem_interrupt,
2163e689cf4aSJeff Kirsher 			 IRQF_SHARED, dev->name, (void *)dev);
2164e689cf4aSJeff Kirsher 	if (rc) {
2165e689cf4aSJeff Kirsher 		netdev_err(dev, "failed to request irq !\n");
2166e689cf4aSJeff Kirsher 
2167e689cf4aSJeff Kirsher 		gem_reset(gp);
2168e689cf4aSJeff Kirsher 		gem_clean_rings(gp);
2169e689cf4aSJeff Kirsher 		gem_put_cell(gp);
2170e689cf4aSJeff Kirsher 		return rc;
2171e689cf4aSJeff Kirsher 	}
2172e689cf4aSJeff Kirsher 
2173e689cf4aSJeff Kirsher 	/* Mark us as attached again if we come from resume(), this has
2174dbedd44eSJoe Perches 	 * no effect if we weren't detached and needs to be done now.
2175e689cf4aSJeff Kirsher 	 */
2176e689cf4aSJeff Kirsher 	netif_device_attach(dev);
2177e689cf4aSJeff Kirsher 
2178e689cf4aSJeff Kirsher 	/* Restart NAPI & queues */
2179e689cf4aSJeff Kirsher 	gem_netif_start(gp);
2180e689cf4aSJeff Kirsher 
2181e689cf4aSJeff Kirsher 	/* Detect & init PHY, start autoneg etc... this will
2182e689cf4aSJeff Kirsher 	 * eventually result in starting DMA operations when
2183e689cf4aSJeff Kirsher 	 * the link is up
2184e689cf4aSJeff Kirsher 	 */
2185e689cf4aSJeff Kirsher 	gem_init_phy(gp);
2186e689cf4aSJeff Kirsher 
2187e689cf4aSJeff Kirsher 	return 0;
2188e689cf4aSJeff Kirsher }
2189e689cf4aSJeff Kirsher 
2190e689cf4aSJeff Kirsher static void gem_do_stop(struct net_device *dev, int wol)
2191e689cf4aSJeff Kirsher {
2192e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2193e689cf4aSJeff Kirsher 
2194e689cf4aSJeff Kirsher 	/* Stop NAPI and stop tx queue */
2195e689cf4aSJeff Kirsher 	gem_netif_stop(gp);
2196e689cf4aSJeff Kirsher 
2197e689cf4aSJeff Kirsher 	/* Make sure ints are disabled. We don't care about
2198e689cf4aSJeff Kirsher 	 * synchronizing as NAPI is disabled, thus a stray
2199e689cf4aSJeff Kirsher 	 * interrupt will do nothing bad (our irq handler
2200e689cf4aSJeff Kirsher 	 * just schedules NAPI)
2201e689cf4aSJeff Kirsher 	 */
2202e689cf4aSJeff Kirsher 	gem_disable_ints(gp);
2203e689cf4aSJeff Kirsher 
2204e689cf4aSJeff Kirsher 	/* Stop the link timer */
2205e689cf4aSJeff Kirsher 	del_timer_sync(&gp->link_timer);
2206e689cf4aSJeff Kirsher 
2207e689cf4aSJeff Kirsher 	/* We cannot cancel the reset task while holding the
2208e689cf4aSJeff Kirsher 	 * rtnl lock, we'd get an A->B / B->A deadlock stituation
2209e689cf4aSJeff Kirsher 	 * if we did. This is not an issue however as the reset
2210e689cf4aSJeff Kirsher 	 * task is synchronized vs. us (rtnl_lock) and will do
2211e689cf4aSJeff Kirsher 	 * nothing if the device is down or suspended. We do
2212e689cf4aSJeff Kirsher 	 * still clear reset_task_pending to avoid a spurrious
2213e689cf4aSJeff Kirsher 	 * reset later on in case we do resume before it gets
2214e689cf4aSJeff Kirsher 	 * scheduled.
2215e689cf4aSJeff Kirsher 	 */
2216e689cf4aSJeff Kirsher 	gp->reset_task_pending = 0;
2217e689cf4aSJeff Kirsher 
2218e689cf4aSJeff Kirsher 	/* If we are going to sleep with WOL */
2219e689cf4aSJeff Kirsher 	gem_stop_dma(gp);
2220e689cf4aSJeff Kirsher 	msleep(10);
2221e689cf4aSJeff Kirsher 	if (!wol)
2222e689cf4aSJeff Kirsher 		gem_reset(gp);
2223e689cf4aSJeff Kirsher 	msleep(10);
2224e689cf4aSJeff Kirsher 
2225e689cf4aSJeff Kirsher 	/* Get rid of rings */
2226e689cf4aSJeff Kirsher 	gem_clean_rings(gp);
2227e689cf4aSJeff Kirsher 
2228e689cf4aSJeff Kirsher 	/* No irq needed anymore */
2229e689cf4aSJeff Kirsher 	free_irq(gp->pdev->irq, (void *) dev);
2230e689cf4aSJeff Kirsher 
2231e689cf4aSJeff Kirsher 	/* Shut the PHY down eventually and setup WOL */
2232e689cf4aSJeff Kirsher 	gem_stop_phy(gp, wol);
2233e689cf4aSJeff Kirsher 
2234e689cf4aSJeff Kirsher 	/* Make sure bus master is disabled */
2235e689cf4aSJeff Kirsher 	pci_disable_device(gp->pdev);
2236e689cf4aSJeff Kirsher 
2237e689cf4aSJeff Kirsher 	/* Cell not needed neither if no WOL */
2238e689cf4aSJeff Kirsher 	if (!wol)
2239e689cf4aSJeff Kirsher 		gem_put_cell(gp);
2240e689cf4aSJeff Kirsher }
2241e689cf4aSJeff Kirsher 
2242e689cf4aSJeff Kirsher static void gem_reset_task(struct work_struct *work)
2243e689cf4aSJeff Kirsher {
2244e689cf4aSJeff Kirsher 	struct gem *gp = container_of(work, struct gem, reset_task);
2245e689cf4aSJeff Kirsher 
2246e689cf4aSJeff Kirsher 	/* Lock out the network stack (essentially shield ourselves
2247e689cf4aSJeff Kirsher 	 * against a racing open, close, control call, or suspend
2248e689cf4aSJeff Kirsher 	 */
2249e689cf4aSJeff Kirsher 	rtnl_lock();
2250e689cf4aSJeff Kirsher 
2251e689cf4aSJeff Kirsher 	/* Skip the reset task if suspended or closed, or if it's
2252e689cf4aSJeff Kirsher 	 * been cancelled by gem_do_stop (see comment there)
2253e689cf4aSJeff Kirsher 	 */
2254e689cf4aSJeff Kirsher 	if (!netif_device_present(gp->dev) ||
2255e689cf4aSJeff Kirsher 	    !netif_running(gp->dev) ||
2256e689cf4aSJeff Kirsher 	    !gp->reset_task_pending) {
2257e689cf4aSJeff Kirsher 		rtnl_unlock();
2258e689cf4aSJeff Kirsher 		return;
2259e689cf4aSJeff Kirsher 	}
2260e689cf4aSJeff Kirsher 
2261e689cf4aSJeff Kirsher 	/* Stop the link timer */
2262e689cf4aSJeff Kirsher 	del_timer_sync(&gp->link_timer);
2263e689cf4aSJeff Kirsher 
2264e689cf4aSJeff Kirsher 	/* Stop NAPI and tx */
2265e689cf4aSJeff Kirsher 	gem_netif_stop(gp);
2266e689cf4aSJeff Kirsher 
2267e689cf4aSJeff Kirsher 	/* Reset the chip & rings */
2268e689cf4aSJeff Kirsher 	gem_reinit_chip(gp);
2269e689cf4aSJeff Kirsher 	if (gp->lstate == link_up)
2270e689cf4aSJeff Kirsher 		gem_set_link_modes(gp);
2271e689cf4aSJeff Kirsher 
2272e689cf4aSJeff Kirsher 	/* Restart NAPI and Tx */
2273e689cf4aSJeff Kirsher 	gem_netif_start(gp);
2274e689cf4aSJeff Kirsher 
2275e689cf4aSJeff Kirsher 	/* We are back ! */
2276e689cf4aSJeff Kirsher 	gp->reset_task_pending = 0;
2277e689cf4aSJeff Kirsher 
2278e689cf4aSJeff Kirsher 	/* If the link is not up, restart autoneg, else restart the
2279e689cf4aSJeff Kirsher 	 * polling timer
2280e689cf4aSJeff Kirsher 	 */
2281e689cf4aSJeff Kirsher 	if (gp->lstate != link_up)
2282e689cf4aSJeff Kirsher 		gem_begin_auto_negotiation(gp, NULL);
2283e689cf4aSJeff Kirsher 	else
2284e689cf4aSJeff Kirsher 		mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10));
2285e689cf4aSJeff Kirsher 
2286e689cf4aSJeff Kirsher 	rtnl_unlock();
2287e689cf4aSJeff Kirsher }
2288e689cf4aSJeff Kirsher 
2289e689cf4aSJeff Kirsher static int gem_open(struct net_device *dev)
2290e689cf4aSJeff Kirsher {
2291e689cf4aSJeff Kirsher 	/* We allow open while suspended, we just do nothing,
2292e689cf4aSJeff Kirsher 	 * the chip will be initialized in resume()
2293e689cf4aSJeff Kirsher 	 */
2294e689cf4aSJeff Kirsher 	if (netif_device_present(dev))
2295e689cf4aSJeff Kirsher 		return gem_do_start(dev);
2296e689cf4aSJeff Kirsher 	return 0;
2297e689cf4aSJeff Kirsher }
2298e689cf4aSJeff Kirsher 
2299e689cf4aSJeff Kirsher static int gem_close(struct net_device *dev)
2300e689cf4aSJeff Kirsher {
2301e689cf4aSJeff Kirsher 	if (netif_device_present(dev))
2302e689cf4aSJeff Kirsher 		gem_do_stop(dev, 0);
2303e689cf4aSJeff Kirsher 
2304e689cf4aSJeff Kirsher 	return 0;
2305e689cf4aSJeff Kirsher }
2306e689cf4aSJeff Kirsher 
2307e689cf4aSJeff Kirsher #ifdef CONFIG_PM
2308e689cf4aSJeff Kirsher static int gem_suspend(struct pci_dev *pdev, pm_message_t state)
2309e689cf4aSJeff Kirsher {
2310e689cf4aSJeff Kirsher 	struct net_device *dev = pci_get_drvdata(pdev);
2311e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2312e689cf4aSJeff Kirsher 
2313e689cf4aSJeff Kirsher 	/* Lock the network stack first to avoid racing with open/close,
2314e689cf4aSJeff Kirsher 	 * reset task and setting calls
2315e689cf4aSJeff Kirsher 	 */
2316e689cf4aSJeff Kirsher 	rtnl_lock();
2317e689cf4aSJeff Kirsher 
2318e689cf4aSJeff Kirsher 	/* Not running, mark ourselves non-present, no need for
2319e689cf4aSJeff Kirsher 	 * a lock here
2320e689cf4aSJeff Kirsher 	 */
2321e689cf4aSJeff Kirsher 	if (!netif_running(dev)) {
2322e689cf4aSJeff Kirsher 		netif_device_detach(dev);
2323e689cf4aSJeff Kirsher 		rtnl_unlock();
2324e689cf4aSJeff Kirsher 		return 0;
2325e689cf4aSJeff Kirsher 	}
2326e689cf4aSJeff Kirsher 	netdev_info(dev, "suspending, WakeOnLan %s\n",
2327e689cf4aSJeff Kirsher 		    (gp->wake_on_lan && netif_running(dev)) ?
2328e689cf4aSJeff Kirsher 		    "enabled" : "disabled");
2329e689cf4aSJeff Kirsher 
2330e689cf4aSJeff Kirsher 	/* Tell the network stack we're gone. gem_do_stop() below will
2331e689cf4aSJeff Kirsher 	 * synchronize with TX, stop NAPI etc...
2332e689cf4aSJeff Kirsher 	 */
2333e689cf4aSJeff Kirsher 	netif_device_detach(dev);
2334e689cf4aSJeff Kirsher 
2335e689cf4aSJeff Kirsher 	/* Switch off chip, remember WOL setting */
23365a8887d3SGerard Lledo 	gp->asleep_wol = !!gp->wake_on_lan;
2337e689cf4aSJeff Kirsher 	gem_do_stop(dev, gp->asleep_wol);
2338e689cf4aSJeff Kirsher 
2339e689cf4aSJeff Kirsher 	/* Unlock the network stack */
2340e689cf4aSJeff Kirsher 	rtnl_unlock();
2341e689cf4aSJeff Kirsher 
2342e689cf4aSJeff Kirsher 	return 0;
2343e689cf4aSJeff Kirsher }
2344e689cf4aSJeff Kirsher 
2345e689cf4aSJeff Kirsher static int gem_resume(struct pci_dev *pdev)
2346e689cf4aSJeff Kirsher {
2347e689cf4aSJeff Kirsher 	struct net_device *dev = pci_get_drvdata(pdev);
2348e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2349e689cf4aSJeff Kirsher 
2350e689cf4aSJeff Kirsher 	/* See locking comment in gem_suspend */
2351e689cf4aSJeff Kirsher 	rtnl_lock();
2352e689cf4aSJeff Kirsher 
2353e689cf4aSJeff Kirsher 	/* Not running, mark ourselves present, no need for
2354e689cf4aSJeff Kirsher 	 * a lock here
2355e689cf4aSJeff Kirsher 	 */
2356e689cf4aSJeff Kirsher 	if (!netif_running(dev)) {
2357e689cf4aSJeff Kirsher 		netif_device_attach(dev);
2358e689cf4aSJeff Kirsher 		rtnl_unlock();
2359e689cf4aSJeff Kirsher 		return 0;
2360e689cf4aSJeff Kirsher 	}
2361e689cf4aSJeff Kirsher 
2362e689cf4aSJeff Kirsher 	/* Restart chip. If that fails there isn't much we can do, we
2363e689cf4aSJeff Kirsher 	 * leave things stopped.
2364e689cf4aSJeff Kirsher 	 */
2365e689cf4aSJeff Kirsher 	gem_do_start(dev);
2366e689cf4aSJeff Kirsher 
2367e689cf4aSJeff Kirsher 	/* If we had WOL enabled, the cell clock was never turned off during
2368e689cf4aSJeff Kirsher 	 * sleep, so we end up beeing unbalanced. Fix that here
2369e689cf4aSJeff Kirsher 	 */
2370e689cf4aSJeff Kirsher 	if (gp->asleep_wol)
2371e689cf4aSJeff Kirsher 		gem_put_cell(gp);
2372e689cf4aSJeff Kirsher 
2373e689cf4aSJeff Kirsher 	/* Unlock the network stack */
2374e689cf4aSJeff Kirsher 	rtnl_unlock();
2375e689cf4aSJeff Kirsher 
2376e689cf4aSJeff Kirsher 	return 0;
2377e689cf4aSJeff Kirsher }
2378e689cf4aSJeff Kirsher #endif /* CONFIG_PM */
2379e689cf4aSJeff Kirsher 
2380e689cf4aSJeff Kirsher static struct net_device_stats *gem_get_stats(struct net_device *dev)
2381e689cf4aSJeff Kirsher {
2382e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2383e689cf4aSJeff Kirsher 
2384e689cf4aSJeff Kirsher 	/* I have seen this being called while the PM was in progress,
2385e689cf4aSJeff Kirsher 	 * so we shield against this. Let's also not poke at registers
2386e689cf4aSJeff Kirsher 	 * while the reset task is going on.
2387e689cf4aSJeff Kirsher 	 *
2388e689cf4aSJeff Kirsher 	 * TODO: Move stats collection elsewhere (link timer ?) and
2389e689cf4aSJeff Kirsher 	 * make this a nop to avoid all those synchro issues
2390e689cf4aSJeff Kirsher 	 */
2391e689cf4aSJeff Kirsher 	if (!netif_device_present(dev) || !netif_running(dev))
2392e689cf4aSJeff Kirsher 		goto bail;
2393e689cf4aSJeff Kirsher 
2394e689cf4aSJeff Kirsher 	/* Better safe than sorry... */
2395e689cf4aSJeff Kirsher 	if (WARN_ON(!gp->cell_enabled))
2396e689cf4aSJeff Kirsher 		goto bail;
2397e689cf4aSJeff Kirsher 
2398e689cf4aSJeff Kirsher 	dev->stats.rx_crc_errors += readl(gp->regs + MAC_FCSERR);
2399e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_FCSERR);
2400e689cf4aSJeff Kirsher 
2401e689cf4aSJeff Kirsher 	dev->stats.rx_frame_errors += readl(gp->regs + MAC_AERR);
2402e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_AERR);
2403e689cf4aSJeff Kirsher 
2404e689cf4aSJeff Kirsher 	dev->stats.rx_length_errors += readl(gp->regs + MAC_LERR);
2405e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_LERR);
2406e689cf4aSJeff Kirsher 
2407e689cf4aSJeff Kirsher 	dev->stats.tx_aborted_errors += readl(gp->regs + MAC_ECOLL);
2408e689cf4aSJeff Kirsher 	dev->stats.collisions +=
2409e689cf4aSJeff Kirsher 		(readl(gp->regs + MAC_ECOLL) + readl(gp->regs + MAC_LCOLL));
2410e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_ECOLL);
2411e689cf4aSJeff Kirsher 	writel(0, gp->regs + MAC_LCOLL);
2412e689cf4aSJeff Kirsher  bail:
2413e689cf4aSJeff Kirsher 	return &dev->stats;
2414e689cf4aSJeff Kirsher }
2415e689cf4aSJeff Kirsher 
2416e689cf4aSJeff Kirsher static int gem_set_mac_address(struct net_device *dev, void *addr)
2417e689cf4aSJeff Kirsher {
2418e689cf4aSJeff Kirsher 	struct sockaddr *macaddr = (struct sockaddr *) addr;
2419e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2420e689cf4aSJeff Kirsher 	unsigned char *e = &dev->dev_addr[0];
2421e689cf4aSJeff Kirsher 
2422e689cf4aSJeff Kirsher 	if (!is_valid_ether_addr(macaddr->sa_data))
2423e689cf4aSJeff Kirsher 		return -EADDRNOTAVAIL;
2424e689cf4aSJeff Kirsher 
2425e689cf4aSJeff Kirsher 	memcpy(dev->dev_addr, macaddr->sa_data, dev->addr_len);
2426e689cf4aSJeff Kirsher 
2427e689cf4aSJeff Kirsher 	/* We'll just catch it later when the device is up'd or resumed */
2428e689cf4aSJeff Kirsher 	if (!netif_running(dev) || !netif_device_present(dev))
2429e689cf4aSJeff Kirsher 		return 0;
2430e689cf4aSJeff Kirsher 
2431e689cf4aSJeff Kirsher 	/* Better safe than sorry... */
2432e689cf4aSJeff Kirsher 	if (WARN_ON(!gp->cell_enabled))
2433e689cf4aSJeff Kirsher 		return 0;
2434e689cf4aSJeff Kirsher 
2435e689cf4aSJeff Kirsher 	writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0);
2436e689cf4aSJeff Kirsher 	writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1);
2437e689cf4aSJeff Kirsher 	writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2);
2438e689cf4aSJeff Kirsher 
2439e689cf4aSJeff Kirsher 	return 0;
2440e689cf4aSJeff Kirsher }
2441e689cf4aSJeff Kirsher 
2442e689cf4aSJeff Kirsher static void gem_set_multicast(struct net_device *dev)
2443e689cf4aSJeff Kirsher {
2444e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2445e689cf4aSJeff Kirsher 	u32 rxcfg, rxcfg_new;
2446e689cf4aSJeff Kirsher 	int limit = 10000;
2447e689cf4aSJeff Kirsher 
2448e689cf4aSJeff Kirsher 	if (!netif_running(dev) || !netif_device_present(dev))
2449e689cf4aSJeff Kirsher 		return;
2450e689cf4aSJeff Kirsher 
2451e689cf4aSJeff Kirsher 	/* Better safe than sorry... */
2452e689cf4aSJeff Kirsher 	if (gp->reset_task_pending || WARN_ON(!gp->cell_enabled))
2453e689cf4aSJeff Kirsher 		return;
2454e689cf4aSJeff Kirsher 
2455e689cf4aSJeff Kirsher 	rxcfg = readl(gp->regs + MAC_RXCFG);
2456e689cf4aSJeff Kirsher 	rxcfg_new = gem_setup_multicast(gp);
2457e689cf4aSJeff Kirsher #ifdef STRIP_FCS
2458e689cf4aSJeff Kirsher 	rxcfg_new |= MAC_RXCFG_SFCS;
2459e689cf4aSJeff Kirsher #endif
2460e689cf4aSJeff Kirsher 	gp->mac_rx_cfg = rxcfg_new;
2461e689cf4aSJeff Kirsher 
2462e689cf4aSJeff Kirsher 	writel(rxcfg & ~MAC_RXCFG_ENAB, gp->regs + MAC_RXCFG);
2463e689cf4aSJeff Kirsher 	while (readl(gp->regs + MAC_RXCFG) & MAC_RXCFG_ENAB) {
2464e689cf4aSJeff Kirsher 		if (!limit--)
2465e689cf4aSJeff Kirsher 			break;
2466e689cf4aSJeff Kirsher 		udelay(10);
2467e689cf4aSJeff Kirsher 	}
2468e689cf4aSJeff Kirsher 
2469e689cf4aSJeff Kirsher 	rxcfg &= ~(MAC_RXCFG_PROM | MAC_RXCFG_HFE);
2470e689cf4aSJeff Kirsher 	rxcfg |= rxcfg_new;
2471e689cf4aSJeff Kirsher 
2472e689cf4aSJeff Kirsher 	writel(rxcfg, gp->regs + MAC_RXCFG);
2473e689cf4aSJeff Kirsher }
2474e689cf4aSJeff Kirsher 
2475e689cf4aSJeff Kirsher /* Jumbo-grams don't seem to work :-( */
2476540bfe30SJarod Wilson #define GEM_MIN_MTU	ETH_MIN_MTU
2477e689cf4aSJeff Kirsher #if 1
2478540bfe30SJarod Wilson #define GEM_MAX_MTU	ETH_DATA_LEN
2479e689cf4aSJeff Kirsher #else
2480e689cf4aSJeff Kirsher #define GEM_MAX_MTU	9000
2481e689cf4aSJeff Kirsher #endif
2482e689cf4aSJeff Kirsher 
2483e689cf4aSJeff Kirsher static int gem_change_mtu(struct net_device *dev, int new_mtu)
2484e689cf4aSJeff Kirsher {
2485e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2486e689cf4aSJeff Kirsher 
2487e689cf4aSJeff Kirsher 	dev->mtu = new_mtu;
2488e689cf4aSJeff Kirsher 
2489e689cf4aSJeff Kirsher 	/* We'll just catch it later when the device is up'd or resumed */
2490e689cf4aSJeff Kirsher 	if (!netif_running(dev) || !netif_device_present(dev))
2491e689cf4aSJeff Kirsher 		return 0;
2492e689cf4aSJeff Kirsher 
2493e689cf4aSJeff Kirsher 	/* Better safe than sorry... */
2494e689cf4aSJeff Kirsher 	if (WARN_ON(!gp->cell_enabled))
2495e689cf4aSJeff Kirsher 		return 0;
2496e689cf4aSJeff Kirsher 
2497e689cf4aSJeff Kirsher 	gem_netif_stop(gp);
2498e689cf4aSJeff Kirsher 	gem_reinit_chip(gp);
2499e689cf4aSJeff Kirsher 	if (gp->lstate == link_up)
2500e689cf4aSJeff Kirsher 		gem_set_link_modes(gp);
2501e689cf4aSJeff Kirsher 	gem_netif_start(gp);
2502e689cf4aSJeff Kirsher 
2503e689cf4aSJeff Kirsher 	return 0;
2504e689cf4aSJeff Kirsher }
2505e689cf4aSJeff Kirsher 
2506e689cf4aSJeff Kirsher static void gem_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2507e689cf4aSJeff Kirsher {
2508e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2509e689cf4aSJeff Kirsher 
251023020ab3SRick Jones 	strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
251123020ab3SRick Jones 	strlcpy(info->version, DRV_VERSION, sizeof(info->version));
251223020ab3SRick Jones 	strlcpy(info->bus_info, pci_name(gp->pdev), sizeof(info->bus_info));
2513e689cf4aSJeff Kirsher }
2514e689cf4aSJeff Kirsher 
251592552fddSPhilippe Reynes static int gem_get_link_ksettings(struct net_device *dev,
251692552fddSPhilippe Reynes 				  struct ethtool_link_ksettings *cmd)
2517e689cf4aSJeff Kirsher {
2518e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
251992552fddSPhilippe Reynes 	u32 supported, advertising;
2520e689cf4aSJeff Kirsher 
2521e689cf4aSJeff Kirsher 	if (gp->phy_type == phy_mii_mdio0 ||
2522e689cf4aSJeff Kirsher 	    gp->phy_type == phy_mii_mdio1) {
2523e689cf4aSJeff Kirsher 		if (gp->phy_mii.def)
252492552fddSPhilippe Reynes 			supported = gp->phy_mii.def->features;
2525e689cf4aSJeff Kirsher 		else
252692552fddSPhilippe Reynes 			supported = (SUPPORTED_10baseT_Half |
2527e689cf4aSJeff Kirsher 					  SUPPORTED_10baseT_Full);
2528e689cf4aSJeff Kirsher 
2529e689cf4aSJeff Kirsher 		/* XXX hardcoded stuff for now */
253092552fddSPhilippe Reynes 		cmd->base.port = PORT_MII;
253192552fddSPhilippe Reynes 		cmd->base.phy_address = 0; /* XXX fixed PHYAD */
2532e689cf4aSJeff Kirsher 
2533e689cf4aSJeff Kirsher 		/* Return current PHY settings */
253492552fddSPhilippe Reynes 		cmd->base.autoneg = gp->want_autoneg;
253592552fddSPhilippe Reynes 		cmd->base.speed = gp->phy_mii.speed;
253692552fddSPhilippe Reynes 		cmd->base.duplex = gp->phy_mii.duplex;
253792552fddSPhilippe Reynes 		advertising = gp->phy_mii.advertising;
2538e689cf4aSJeff Kirsher 
2539e689cf4aSJeff Kirsher 		/* If we started with a forced mode, we don't have a default
2540e689cf4aSJeff Kirsher 		 * advertise set, we need to return something sensible so
2541e689cf4aSJeff Kirsher 		 * userland can re-enable autoneg properly.
2542e689cf4aSJeff Kirsher 		 */
254392552fddSPhilippe Reynes 		if (advertising == 0)
254492552fddSPhilippe Reynes 			advertising = supported;
2545e689cf4aSJeff Kirsher 	} else { // XXX PCS ?
254692552fddSPhilippe Reynes 		supported =
2547e689cf4aSJeff Kirsher 			(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2548e689cf4aSJeff Kirsher 			 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2549e689cf4aSJeff Kirsher 			 SUPPORTED_Autoneg);
255092552fddSPhilippe Reynes 		advertising = supported;
255192552fddSPhilippe Reynes 		cmd->base.speed = 0;
255292552fddSPhilippe Reynes 		cmd->base.duplex = 0;
255392552fddSPhilippe Reynes 		cmd->base.port = 0;
255492552fddSPhilippe Reynes 		cmd->base.phy_address = 0;
255592552fddSPhilippe Reynes 		cmd->base.autoneg = 0;
2556e689cf4aSJeff Kirsher 
2557e689cf4aSJeff Kirsher 		/* serdes means usually a Fibre connector, with most fixed */
2558e689cf4aSJeff Kirsher 		if (gp->phy_type == phy_serdes) {
255992552fddSPhilippe Reynes 			cmd->base.port = PORT_FIBRE;
256092552fddSPhilippe Reynes 			supported = (SUPPORTED_1000baseT_Half |
2561e689cf4aSJeff Kirsher 				SUPPORTED_1000baseT_Full |
2562e689cf4aSJeff Kirsher 				SUPPORTED_FIBRE | SUPPORTED_Autoneg |
2563e689cf4aSJeff Kirsher 				SUPPORTED_Pause | SUPPORTED_Asym_Pause);
256492552fddSPhilippe Reynes 			advertising = supported;
2565e689cf4aSJeff Kirsher 			if (gp->lstate == link_up)
256692552fddSPhilippe Reynes 				cmd->base.speed = SPEED_1000;
256792552fddSPhilippe Reynes 			cmd->base.duplex = DUPLEX_FULL;
256892552fddSPhilippe Reynes 			cmd->base.autoneg = 1;
2569e689cf4aSJeff Kirsher 		}
2570e689cf4aSJeff Kirsher 	}
257192552fddSPhilippe Reynes 
257292552fddSPhilippe Reynes 	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
257392552fddSPhilippe Reynes 						supported);
257492552fddSPhilippe Reynes 	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
257592552fddSPhilippe Reynes 						advertising);
2576e689cf4aSJeff Kirsher 
2577e689cf4aSJeff Kirsher 	return 0;
2578e689cf4aSJeff Kirsher }
2579e689cf4aSJeff Kirsher 
258092552fddSPhilippe Reynes static int gem_set_link_ksettings(struct net_device *dev,
258192552fddSPhilippe Reynes 				  const struct ethtool_link_ksettings *cmd)
2582e689cf4aSJeff Kirsher {
2583e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
258492552fddSPhilippe Reynes 	u32 speed = cmd->base.speed;
258592552fddSPhilippe Reynes 	u32 advertising;
258692552fddSPhilippe Reynes 
258792552fddSPhilippe Reynes 	ethtool_convert_link_mode_to_legacy_u32(&advertising,
258892552fddSPhilippe Reynes 						cmd->link_modes.advertising);
2589e689cf4aSJeff Kirsher 
2590e689cf4aSJeff Kirsher 	/* Verify the settings we care about. */
259192552fddSPhilippe Reynes 	if (cmd->base.autoneg != AUTONEG_ENABLE &&
259292552fddSPhilippe Reynes 	    cmd->base.autoneg != AUTONEG_DISABLE)
2593e689cf4aSJeff Kirsher 		return -EINVAL;
2594e689cf4aSJeff Kirsher 
259592552fddSPhilippe Reynes 	if (cmd->base.autoneg == AUTONEG_ENABLE &&
259692552fddSPhilippe Reynes 	    advertising == 0)
2597e689cf4aSJeff Kirsher 		return -EINVAL;
2598e689cf4aSJeff Kirsher 
259992552fddSPhilippe Reynes 	if (cmd->base.autoneg == AUTONEG_DISABLE &&
2600e689cf4aSJeff Kirsher 	    ((speed != SPEED_1000 &&
2601e689cf4aSJeff Kirsher 	      speed != SPEED_100 &&
2602e689cf4aSJeff Kirsher 	      speed != SPEED_10) ||
260392552fddSPhilippe Reynes 	     (cmd->base.duplex != DUPLEX_HALF &&
260492552fddSPhilippe Reynes 	      cmd->base.duplex != DUPLEX_FULL)))
2605e689cf4aSJeff Kirsher 		return -EINVAL;
2606e689cf4aSJeff Kirsher 
2607e689cf4aSJeff Kirsher 	/* Apply settings and restart link process. */
2608e689cf4aSJeff Kirsher 	if (netif_device_present(gp->dev)) {
2609e689cf4aSJeff Kirsher 		del_timer_sync(&gp->link_timer);
2610e689cf4aSJeff Kirsher 		gem_begin_auto_negotiation(gp, cmd);
2611e689cf4aSJeff Kirsher 	}
2612e689cf4aSJeff Kirsher 
2613e689cf4aSJeff Kirsher 	return 0;
2614e689cf4aSJeff Kirsher }
2615e689cf4aSJeff Kirsher 
2616e689cf4aSJeff Kirsher static int gem_nway_reset(struct net_device *dev)
2617e689cf4aSJeff Kirsher {
2618e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2619e689cf4aSJeff Kirsher 
2620e689cf4aSJeff Kirsher 	if (!gp->want_autoneg)
2621e689cf4aSJeff Kirsher 		return -EINVAL;
2622e689cf4aSJeff Kirsher 
2623e689cf4aSJeff Kirsher 	/* Restart link process  */
2624e689cf4aSJeff Kirsher 	if (netif_device_present(gp->dev)) {
2625e689cf4aSJeff Kirsher 		del_timer_sync(&gp->link_timer);
2626e689cf4aSJeff Kirsher 		gem_begin_auto_negotiation(gp, NULL);
2627e689cf4aSJeff Kirsher 	}
2628e689cf4aSJeff Kirsher 
2629e689cf4aSJeff Kirsher 	return 0;
2630e689cf4aSJeff Kirsher }
2631e689cf4aSJeff Kirsher 
2632e689cf4aSJeff Kirsher static u32 gem_get_msglevel(struct net_device *dev)
2633e689cf4aSJeff Kirsher {
2634e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2635e689cf4aSJeff Kirsher 	return gp->msg_enable;
2636e689cf4aSJeff Kirsher }
2637e689cf4aSJeff Kirsher 
2638e689cf4aSJeff Kirsher static void gem_set_msglevel(struct net_device *dev, u32 value)
2639e689cf4aSJeff Kirsher {
2640e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2641e689cf4aSJeff Kirsher 	gp->msg_enable = value;
2642e689cf4aSJeff Kirsher }
2643e689cf4aSJeff Kirsher 
2644e689cf4aSJeff Kirsher 
2645e689cf4aSJeff Kirsher /* Add more when I understand how to program the chip */
2646e689cf4aSJeff Kirsher /* like WAKE_UCAST | WAKE_MCAST | WAKE_BCAST */
2647e689cf4aSJeff Kirsher 
2648e689cf4aSJeff Kirsher #define WOL_SUPPORTED_MASK	(WAKE_MAGIC)
2649e689cf4aSJeff Kirsher 
2650e689cf4aSJeff Kirsher static void gem_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2651e689cf4aSJeff Kirsher {
2652e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2653e689cf4aSJeff Kirsher 
2654e689cf4aSJeff Kirsher 	/* Add more when I understand how to program the chip */
2655e689cf4aSJeff Kirsher 	if (gp->has_wol) {
2656e689cf4aSJeff Kirsher 		wol->supported = WOL_SUPPORTED_MASK;
2657e689cf4aSJeff Kirsher 		wol->wolopts = gp->wake_on_lan;
2658e689cf4aSJeff Kirsher 	} else {
2659e689cf4aSJeff Kirsher 		wol->supported = 0;
2660e689cf4aSJeff Kirsher 		wol->wolopts = 0;
2661e689cf4aSJeff Kirsher 	}
2662e689cf4aSJeff Kirsher }
2663e689cf4aSJeff Kirsher 
2664e689cf4aSJeff Kirsher static int gem_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2665e689cf4aSJeff Kirsher {
2666e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2667e689cf4aSJeff Kirsher 
2668e689cf4aSJeff Kirsher 	if (!gp->has_wol)
2669e689cf4aSJeff Kirsher 		return -EOPNOTSUPP;
2670e689cf4aSJeff Kirsher 	gp->wake_on_lan = wol->wolopts & WOL_SUPPORTED_MASK;
2671e689cf4aSJeff Kirsher 	return 0;
2672e689cf4aSJeff Kirsher }
2673e689cf4aSJeff Kirsher 
2674e689cf4aSJeff Kirsher static const struct ethtool_ops gem_ethtool_ops = {
2675e689cf4aSJeff Kirsher 	.get_drvinfo		= gem_get_drvinfo,
2676e689cf4aSJeff Kirsher 	.get_link		= ethtool_op_get_link,
2677e689cf4aSJeff Kirsher 	.nway_reset		= gem_nway_reset,
2678e689cf4aSJeff Kirsher 	.get_msglevel		= gem_get_msglevel,
2679e689cf4aSJeff Kirsher 	.set_msglevel		= gem_set_msglevel,
2680e689cf4aSJeff Kirsher 	.get_wol		= gem_get_wol,
2681e689cf4aSJeff Kirsher 	.set_wol		= gem_set_wol,
268292552fddSPhilippe Reynes 	.get_link_ksettings	= gem_get_link_ksettings,
268392552fddSPhilippe Reynes 	.set_link_ksettings	= gem_set_link_ksettings,
2684e689cf4aSJeff Kirsher };
2685e689cf4aSJeff Kirsher 
2686e689cf4aSJeff Kirsher static int gem_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2687e689cf4aSJeff Kirsher {
2688e689cf4aSJeff Kirsher 	struct gem *gp = netdev_priv(dev);
2689e689cf4aSJeff Kirsher 	struct mii_ioctl_data *data = if_mii(ifr);
2690e689cf4aSJeff Kirsher 	int rc = -EOPNOTSUPP;
2691e689cf4aSJeff Kirsher 
2692e689cf4aSJeff Kirsher 	/* For SIOCGMIIREG and SIOCSMIIREG the core checks for us that
2693e689cf4aSJeff Kirsher 	 * netif_device_present() is true and holds rtnl_lock for us
2694e689cf4aSJeff Kirsher 	 * so we have nothing to worry about
2695e689cf4aSJeff Kirsher 	 */
2696e689cf4aSJeff Kirsher 
2697e689cf4aSJeff Kirsher 	switch (cmd) {
2698e689cf4aSJeff Kirsher 	case SIOCGMIIPHY:		/* Get address of MII PHY in use. */
2699e689cf4aSJeff Kirsher 		data->phy_id = gp->mii_phy_addr;
2700e689cf4aSJeff Kirsher 		/* Fallthrough... */
2701e689cf4aSJeff Kirsher 
2702e689cf4aSJeff Kirsher 	case SIOCGMIIREG:		/* Read MII PHY register. */
2703abc4da45SDavid S. Miller 		data->val_out = __sungem_phy_read(gp, data->phy_id & 0x1f,
2704e689cf4aSJeff Kirsher 					   data->reg_num & 0x1f);
2705e689cf4aSJeff Kirsher 		rc = 0;
2706e689cf4aSJeff Kirsher 		break;
2707e689cf4aSJeff Kirsher 
2708e689cf4aSJeff Kirsher 	case SIOCSMIIREG:		/* Write MII PHY register. */
2709abc4da45SDavid S. Miller 		__sungem_phy_write(gp, data->phy_id & 0x1f, data->reg_num & 0x1f,
2710e689cf4aSJeff Kirsher 			    data->val_in);
2711e689cf4aSJeff Kirsher 		rc = 0;
2712e689cf4aSJeff Kirsher 		break;
2713e689cf4aSJeff Kirsher 	}
2714e689cf4aSJeff Kirsher 	return rc;
2715e689cf4aSJeff Kirsher }
2716e689cf4aSJeff Kirsher 
2717e689cf4aSJeff Kirsher #if (!defined(CONFIG_SPARC) && !defined(CONFIG_PPC_PMAC))
2718e689cf4aSJeff Kirsher /* Fetch MAC address from vital product data of PCI ROM. */
2719e689cf4aSJeff Kirsher static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, unsigned char *dev_addr)
2720e689cf4aSJeff Kirsher {
2721e689cf4aSJeff Kirsher 	int this_offset;
2722e689cf4aSJeff Kirsher 
2723e689cf4aSJeff Kirsher 	for (this_offset = 0x20; this_offset < len; this_offset++) {
2724e689cf4aSJeff Kirsher 		void __iomem *p = rom_base + this_offset;
2725e689cf4aSJeff Kirsher 		int i;
2726e689cf4aSJeff Kirsher 
2727e689cf4aSJeff Kirsher 		if (readb(p + 0) != 0x90 ||
2728e689cf4aSJeff Kirsher 		    readb(p + 1) != 0x00 ||
2729e689cf4aSJeff Kirsher 		    readb(p + 2) != 0x09 ||
2730e689cf4aSJeff Kirsher 		    readb(p + 3) != 0x4e ||
2731e689cf4aSJeff Kirsher 		    readb(p + 4) != 0x41 ||
2732e689cf4aSJeff Kirsher 		    readb(p + 5) != 0x06)
2733e689cf4aSJeff Kirsher 			continue;
2734e689cf4aSJeff Kirsher 
2735e689cf4aSJeff Kirsher 		this_offset += 6;
2736e689cf4aSJeff Kirsher 		p += 6;
2737e689cf4aSJeff Kirsher 
2738e689cf4aSJeff Kirsher 		for (i = 0; i < 6; i++)
2739e689cf4aSJeff Kirsher 			dev_addr[i] = readb(p + i);
2740e689cf4aSJeff Kirsher 		return 1;
2741e689cf4aSJeff Kirsher 	}
2742e689cf4aSJeff Kirsher 	return 0;
2743e689cf4aSJeff Kirsher }
2744e689cf4aSJeff Kirsher 
2745e689cf4aSJeff Kirsher static void get_gem_mac_nonobp(struct pci_dev *pdev, unsigned char *dev_addr)
2746e689cf4aSJeff Kirsher {
2747e689cf4aSJeff Kirsher 	size_t size;
2748e689cf4aSJeff Kirsher 	void __iomem *p = pci_map_rom(pdev, &size);
2749e689cf4aSJeff Kirsher 
2750e689cf4aSJeff Kirsher 	if (p) {
2751e689cf4aSJeff Kirsher 		int found;
2752e689cf4aSJeff Kirsher 
2753e689cf4aSJeff Kirsher 		found = readb(p) == 0x55 &&
2754e689cf4aSJeff Kirsher 			readb(p + 1) == 0xaa &&
2755e689cf4aSJeff Kirsher 			find_eth_addr_in_vpd(p, (64 * 1024), dev_addr);
2756e689cf4aSJeff Kirsher 		pci_unmap_rom(pdev, p);
2757e689cf4aSJeff Kirsher 		if (found)
2758e689cf4aSJeff Kirsher 			return;
2759e689cf4aSJeff Kirsher 	}
2760e689cf4aSJeff Kirsher 
2761e689cf4aSJeff Kirsher 	/* Sun MAC prefix then 3 random bytes. */
2762e689cf4aSJeff Kirsher 	dev_addr[0] = 0x08;
2763e689cf4aSJeff Kirsher 	dev_addr[1] = 0x00;
2764e689cf4aSJeff Kirsher 	dev_addr[2] = 0x20;
2765e689cf4aSJeff Kirsher 	get_random_bytes(dev_addr + 3, 3);
2766e689cf4aSJeff Kirsher }
2767e689cf4aSJeff Kirsher #endif /* not Sparc and not PPC */
2768e689cf4aSJeff Kirsher 
2769f73d12bdSBill Pemberton static int gem_get_device_address(struct gem *gp)
2770e689cf4aSJeff Kirsher {
2771e689cf4aSJeff Kirsher #if defined(CONFIG_SPARC) || defined(CONFIG_PPC_PMAC)
2772e689cf4aSJeff Kirsher 	struct net_device *dev = gp->dev;
2773e689cf4aSJeff Kirsher 	const unsigned char *addr;
2774e689cf4aSJeff Kirsher 
2775e689cf4aSJeff Kirsher 	addr = of_get_property(gp->of_node, "local-mac-address", NULL);
2776e689cf4aSJeff Kirsher 	if (addr == NULL) {
2777e689cf4aSJeff Kirsher #ifdef CONFIG_SPARC
2778e689cf4aSJeff Kirsher 		addr = idprom->id_ethaddr;
2779e689cf4aSJeff Kirsher #else
2780e689cf4aSJeff Kirsher 		printk("\n");
2781e689cf4aSJeff Kirsher 		pr_err("%s: can't get mac-address\n", dev->name);
2782e689cf4aSJeff Kirsher 		return -1;
2783e689cf4aSJeff Kirsher #endif
2784e689cf4aSJeff Kirsher 	}
2785d458cdf7SJoe Perches 	memcpy(dev->dev_addr, addr, ETH_ALEN);
2786e689cf4aSJeff Kirsher #else
2787e689cf4aSJeff Kirsher 	get_gem_mac_nonobp(gp->pdev, gp->dev->dev_addr);
2788e689cf4aSJeff Kirsher #endif
2789e689cf4aSJeff Kirsher 	return 0;
2790e689cf4aSJeff Kirsher }
2791e689cf4aSJeff Kirsher 
2792e689cf4aSJeff Kirsher static void gem_remove_one(struct pci_dev *pdev)
2793e689cf4aSJeff Kirsher {
2794e689cf4aSJeff Kirsher 	struct net_device *dev = pci_get_drvdata(pdev);
2795e689cf4aSJeff Kirsher 
2796e689cf4aSJeff Kirsher 	if (dev) {
2797e689cf4aSJeff Kirsher 		struct gem *gp = netdev_priv(dev);
2798e689cf4aSJeff Kirsher 
2799e689cf4aSJeff Kirsher 		unregister_netdev(dev);
2800e689cf4aSJeff Kirsher 
2801dbedd44eSJoe Perches 		/* Ensure reset task is truly gone */
2802e689cf4aSJeff Kirsher 		cancel_work_sync(&gp->reset_task);
2803e689cf4aSJeff Kirsher 
2804e689cf4aSJeff Kirsher 		/* Free resources */
2805e689cf4aSJeff Kirsher 		pci_free_consistent(pdev,
2806e689cf4aSJeff Kirsher 				    sizeof(struct gem_init_block),
2807e689cf4aSJeff Kirsher 				    gp->init_block,
2808e689cf4aSJeff Kirsher 				    gp->gblock_dvma);
2809e689cf4aSJeff Kirsher 		iounmap(gp->regs);
2810e689cf4aSJeff Kirsher 		pci_release_regions(pdev);
2811e689cf4aSJeff Kirsher 		free_netdev(dev);
2812e689cf4aSJeff Kirsher 	}
2813e689cf4aSJeff Kirsher }
2814e689cf4aSJeff Kirsher 
2815e689cf4aSJeff Kirsher static const struct net_device_ops gem_netdev_ops = {
2816e689cf4aSJeff Kirsher 	.ndo_open		= gem_open,
2817e689cf4aSJeff Kirsher 	.ndo_stop		= gem_close,
2818e689cf4aSJeff Kirsher 	.ndo_start_xmit		= gem_start_xmit,
2819e689cf4aSJeff Kirsher 	.ndo_get_stats		= gem_get_stats,
2820afc4b13dSJiri Pirko 	.ndo_set_rx_mode	= gem_set_multicast,
2821e689cf4aSJeff Kirsher 	.ndo_do_ioctl		= gem_ioctl,
2822e689cf4aSJeff Kirsher 	.ndo_tx_timeout		= gem_tx_timeout,
2823e689cf4aSJeff Kirsher 	.ndo_change_mtu		= gem_change_mtu,
2824e689cf4aSJeff Kirsher 	.ndo_validate_addr	= eth_validate_addr,
2825e689cf4aSJeff Kirsher 	.ndo_set_mac_address    = gem_set_mac_address,
2826e689cf4aSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER
2827e689cf4aSJeff Kirsher 	.ndo_poll_controller    = gem_poll_controller,
2828e689cf4aSJeff Kirsher #endif
2829e689cf4aSJeff Kirsher };
2830e689cf4aSJeff Kirsher 
28311dd06ae8SGreg Kroah-Hartman static int gem_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2832e689cf4aSJeff Kirsher {
2833e689cf4aSJeff Kirsher 	unsigned long gemreg_base, gemreg_len;
2834e689cf4aSJeff Kirsher 	struct net_device *dev;
2835e689cf4aSJeff Kirsher 	struct gem *gp;
2836e689cf4aSJeff Kirsher 	int err, pci_using_dac;
2837e689cf4aSJeff Kirsher 
2838e689cf4aSJeff Kirsher 	printk_once(KERN_INFO "%s", version);
2839e689cf4aSJeff Kirsher 
2840e689cf4aSJeff Kirsher 	/* Apple gmac note: during probe, the chip is powered up by
2841e689cf4aSJeff Kirsher 	 * the arch code to allow the code below to work (and to let
2842e689cf4aSJeff Kirsher 	 * the chip be probed on the config space. It won't stay powered
2843e689cf4aSJeff Kirsher 	 * up until the interface is brought up however, so we can't rely
2844e689cf4aSJeff Kirsher 	 * on register configuration done at this point.
2845e689cf4aSJeff Kirsher 	 */
2846e689cf4aSJeff Kirsher 	err = pci_enable_device(pdev);
2847e689cf4aSJeff Kirsher 	if (err) {
2848e689cf4aSJeff Kirsher 		pr_err("Cannot enable MMIO operation, aborting\n");
2849e689cf4aSJeff Kirsher 		return err;
2850e689cf4aSJeff Kirsher 	}
2851e689cf4aSJeff Kirsher 	pci_set_master(pdev);
2852e689cf4aSJeff Kirsher 
2853e689cf4aSJeff Kirsher 	/* Configure DMA attributes. */
2854e689cf4aSJeff Kirsher 
2855e689cf4aSJeff Kirsher 	/* All of the GEM documentation states that 64-bit DMA addressing
2856e689cf4aSJeff Kirsher 	 * is fully supported and should work just fine.  However the
2857e689cf4aSJeff Kirsher 	 * front end for RIO based GEMs is different and only supports
2858e689cf4aSJeff Kirsher 	 * 32-bit addressing.
2859e689cf4aSJeff Kirsher 	 *
2860e689cf4aSJeff Kirsher 	 * For now we assume the various PPC GEMs are 32-bit only as well.
2861e689cf4aSJeff Kirsher 	 */
2862e689cf4aSJeff Kirsher 	if (pdev->vendor == PCI_VENDOR_ID_SUN &&
2863e689cf4aSJeff Kirsher 	    pdev->device == PCI_DEVICE_ID_SUN_GEM &&
2864e689cf4aSJeff Kirsher 	    !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
2865e689cf4aSJeff Kirsher 		pci_using_dac = 1;
2866e689cf4aSJeff Kirsher 	} else {
2867e689cf4aSJeff Kirsher 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2868e689cf4aSJeff Kirsher 		if (err) {
2869e689cf4aSJeff Kirsher 			pr_err("No usable DMA configuration, aborting\n");
2870e689cf4aSJeff Kirsher 			goto err_disable_device;
2871e689cf4aSJeff Kirsher 		}
2872e689cf4aSJeff Kirsher 		pci_using_dac = 0;
2873e689cf4aSJeff Kirsher 	}
2874e689cf4aSJeff Kirsher 
2875e689cf4aSJeff Kirsher 	gemreg_base = pci_resource_start(pdev, 0);
2876e689cf4aSJeff Kirsher 	gemreg_len = pci_resource_len(pdev, 0);
2877e689cf4aSJeff Kirsher 
2878e689cf4aSJeff Kirsher 	if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
2879e689cf4aSJeff Kirsher 		pr_err("Cannot find proper PCI device base address, aborting\n");
2880e689cf4aSJeff Kirsher 		err = -ENODEV;
2881e689cf4aSJeff Kirsher 		goto err_disable_device;
2882e689cf4aSJeff Kirsher 	}
2883e689cf4aSJeff Kirsher 
2884e689cf4aSJeff Kirsher 	dev = alloc_etherdev(sizeof(*gp));
2885e689cf4aSJeff Kirsher 	if (!dev) {
2886e689cf4aSJeff Kirsher 		err = -ENOMEM;
2887e689cf4aSJeff Kirsher 		goto err_disable_device;
2888e689cf4aSJeff Kirsher 	}
2889e689cf4aSJeff Kirsher 	SET_NETDEV_DEV(dev, &pdev->dev);
2890e689cf4aSJeff Kirsher 
2891e689cf4aSJeff Kirsher 	gp = netdev_priv(dev);
2892e689cf4aSJeff Kirsher 
2893e689cf4aSJeff Kirsher 	err = pci_request_regions(pdev, DRV_NAME);
2894e689cf4aSJeff Kirsher 	if (err) {
2895e689cf4aSJeff Kirsher 		pr_err("Cannot obtain PCI resources, aborting\n");
2896e689cf4aSJeff Kirsher 		goto err_out_free_netdev;
2897e689cf4aSJeff Kirsher 	}
2898e689cf4aSJeff Kirsher 
2899e689cf4aSJeff Kirsher 	gp->pdev = pdev;
2900e689cf4aSJeff Kirsher 	gp->dev = dev;
2901e689cf4aSJeff Kirsher 
2902e689cf4aSJeff Kirsher 	gp->msg_enable = DEFAULT_MSG;
2903e689cf4aSJeff Kirsher 
29040822c5d9SKees Cook 	timer_setup(&gp->link_timer, gem_link_timer, 0);
2905e689cf4aSJeff Kirsher 
2906e689cf4aSJeff Kirsher 	INIT_WORK(&gp->reset_task, gem_reset_task);
2907e689cf4aSJeff Kirsher 
2908e689cf4aSJeff Kirsher 	gp->lstate = link_down;
2909e689cf4aSJeff Kirsher 	gp->timer_ticks = 0;
2910e689cf4aSJeff Kirsher 	netif_carrier_off(dev);
2911e689cf4aSJeff Kirsher 
2912e689cf4aSJeff Kirsher 	gp->regs = ioremap(gemreg_base, gemreg_len);
2913e689cf4aSJeff Kirsher 	if (!gp->regs) {
2914e689cf4aSJeff Kirsher 		pr_err("Cannot map device registers, aborting\n");
2915e689cf4aSJeff Kirsher 		err = -EIO;
2916e689cf4aSJeff Kirsher 		goto err_out_free_res;
2917e689cf4aSJeff Kirsher 	}
2918e689cf4aSJeff Kirsher 
2919e689cf4aSJeff Kirsher 	/* On Apple, we want a reference to the Open Firmware device-tree
2920e689cf4aSJeff Kirsher 	 * node. We use it for clock control.
2921e689cf4aSJeff Kirsher 	 */
2922e689cf4aSJeff Kirsher #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC)
2923e689cf4aSJeff Kirsher 	gp->of_node = pci_device_to_OF_node(pdev);
2924e689cf4aSJeff Kirsher #endif
2925e689cf4aSJeff Kirsher 
2926e689cf4aSJeff Kirsher 	/* Only Apple version supports WOL afaik */
2927e689cf4aSJeff Kirsher 	if (pdev->vendor == PCI_VENDOR_ID_APPLE)
2928e689cf4aSJeff Kirsher 		gp->has_wol = 1;
2929e689cf4aSJeff Kirsher 
2930e689cf4aSJeff Kirsher 	/* Make sure cell is enabled */
2931e689cf4aSJeff Kirsher 	gem_get_cell(gp);
2932e689cf4aSJeff Kirsher 
2933e689cf4aSJeff Kirsher 	/* Make sure everything is stopped and in init state */
2934e689cf4aSJeff Kirsher 	gem_reset(gp);
2935e689cf4aSJeff Kirsher 
2936e689cf4aSJeff Kirsher 	/* Fill up the mii_phy structure (even if we won't use it) */
2937e689cf4aSJeff Kirsher 	gp->phy_mii.dev = dev;
2938abc4da45SDavid S. Miller 	gp->phy_mii.mdio_read = _sungem_phy_read;
2939abc4da45SDavid S. Miller 	gp->phy_mii.mdio_write = _sungem_phy_write;
2940e689cf4aSJeff Kirsher #ifdef CONFIG_PPC_PMAC
2941e689cf4aSJeff Kirsher 	gp->phy_mii.platform_data = gp->of_node;
2942e689cf4aSJeff Kirsher #endif
2943e689cf4aSJeff Kirsher 	/* By default, we start with autoneg */
2944e689cf4aSJeff Kirsher 	gp->want_autoneg = 1;
2945e689cf4aSJeff Kirsher 
2946e689cf4aSJeff Kirsher 	/* Check fifo sizes, PHY type, etc... */
2947e689cf4aSJeff Kirsher 	if (gem_check_invariants(gp)) {
2948e689cf4aSJeff Kirsher 		err = -ENODEV;
2949e689cf4aSJeff Kirsher 		goto err_out_iounmap;
2950e689cf4aSJeff Kirsher 	}
2951e689cf4aSJeff Kirsher 
2952e689cf4aSJeff Kirsher 	/* It is guaranteed that the returned buffer will be at least
2953e689cf4aSJeff Kirsher 	 * PAGE_SIZE aligned.
2954e689cf4aSJeff Kirsher 	 */
2955e689cf4aSJeff Kirsher 	gp->init_block = (struct gem_init_block *)
2956e689cf4aSJeff Kirsher 		pci_alloc_consistent(pdev, sizeof(struct gem_init_block),
2957e689cf4aSJeff Kirsher 				     &gp->gblock_dvma);
2958e689cf4aSJeff Kirsher 	if (!gp->init_block) {
2959e689cf4aSJeff Kirsher 		pr_err("Cannot allocate init block, aborting\n");
2960e689cf4aSJeff Kirsher 		err = -ENOMEM;
2961e689cf4aSJeff Kirsher 		goto err_out_iounmap;
2962e689cf4aSJeff Kirsher 	}
2963e689cf4aSJeff Kirsher 
29644df12834SPeter Senna Tschudin 	err = gem_get_device_address(gp);
29654df12834SPeter Senna Tschudin 	if (err)
2966e689cf4aSJeff Kirsher 		goto err_out_free_consistent;
2967e689cf4aSJeff Kirsher 
2968e689cf4aSJeff Kirsher 	dev->netdev_ops = &gem_netdev_ops;
2969e689cf4aSJeff Kirsher 	netif_napi_add(dev, &gp->napi, gem_poll, 64);
2970e689cf4aSJeff Kirsher 	dev->ethtool_ops = &gem_ethtool_ops;
2971e689cf4aSJeff Kirsher 	dev->watchdog_timeo = 5 * HZ;
2972e689cf4aSJeff Kirsher 	dev->dma = 0;
2973e689cf4aSJeff Kirsher 
2974e689cf4aSJeff Kirsher 	/* Set that now, in case PM kicks in now */
2975e689cf4aSJeff Kirsher 	pci_set_drvdata(pdev, dev);
2976e689cf4aSJeff Kirsher 
2977e689cf4aSJeff Kirsher 	/* We can do scatter/gather and HW checksum */
297812b03558SEric Dumazet 	dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
297912b03558SEric Dumazet 	dev->features = dev->hw_features;
2980e689cf4aSJeff Kirsher 	if (pci_using_dac)
2981e689cf4aSJeff Kirsher 		dev->features |= NETIF_F_HIGHDMA;
2982e689cf4aSJeff Kirsher 
2983540bfe30SJarod Wilson 	/* MTU range: 68 - 1500 (Jumbo mode is broken) */
2984540bfe30SJarod Wilson 	dev->min_mtu = GEM_MIN_MTU;
2985540bfe30SJarod Wilson 	dev->max_mtu = GEM_MAX_MTU;
2986540bfe30SJarod Wilson 
2987e689cf4aSJeff Kirsher 	/* Register with kernel */
2988e689cf4aSJeff Kirsher 	if (register_netdev(dev)) {
2989e689cf4aSJeff Kirsher 		pr_err("Cannot register net device, aborting\n");
2990e689cf4aSJeff Kirsher 		err = -ENOMEM;
2991e689cf4aSJeff Kirsher 		goto err_out_free_consistent;
2992e689cf4aSJeff Kirsher 	}
2993e689cf4aSJeff Kirsher 
2994e689cf4aSJeff Kirsher 	/* Undo the get_cell with appropriate locking (we could use
2995e689cf4aSJeff Kirsher 	 * ndo_init/uninit but that would be even more clumsy imho)
2996e689cf4aSJeff Kirsher 	 */
2997e689cf4aSJeff Kirsher 	rtnl_lock();
2998e689cf4aSJeff Kirsher 	gem_put_cell(gp);
2999e689cf4aSJeff Kirsher 	rtnl_unlock();
3000e689cf4aSJeff Kirsher 
3001e689cf4aSJeff Kirsher 	netdev_info(dev, "Sun GEM (PCI) 10/100/1000BaseT Ethernet %pM\n",
3002e689cf4aSJeff Kirsher 		    dev->dev_addr);
3003e689cf4aSJeff Kirsher 	return 0;
3004e689cf4aSJeff Kirsher 
3005e689cf4aSJeff Kirsher err_out_free_consistent:
3006e689cf4aSJeff Kirsher 	gem_remove_one(pdev);
3007e689cf4aSJeff Kirsher err_out_iounmap:
3008e689cf4aSJeff Kirsher 	gem_put_cell(gp);
3009e689cf4aSJeff Kirsher 	iounmap(gp->regs);
3010e689cf4aSJeff Kirsher 
3011e689cf4aSJeff Kirsher err_out_free_res:
3012e689cf4aSJeff Kirsher 	pci_release_regions(pdev);
3013e689cf4aSJeff Kirsher 
3014e689cf4aSJeff Kirsher err_out_free_netdev:
3015e689cf4aSJeff Kirsher 	free_netdev(dev);
3016e689cf4aSJeff Kirsher err_disable_device:
3017e689cf4aSJeff Kirsher 	pci_disable_device(pdev);
3018e689cf4aSJeff Kirsher 	return err;
3019e689cf4aSJeff Kirsher 
3020e689cf4aSJeff Kirsher }
3021e689cf4aSJeff Kirsher 
3022e689cf4aSJeff Kirsher 
3023e689cf4aSJeff Kirsher static struct pci_driver gem_driver = {
3024e689cf4aSJeff Kirsher 	.name		= GEM_MODULE_NAME,
3025e689cf4aSJeff Kirsher 	.id_table	= gem_pci_tbl,
3026e689cf4aSJeff Kirsher 	.probe		= gem_init_one,
3027e689cf4aSJeff Kirsher 	.remove		= gem_remove_one,
3028e689cf4aSJeff Kirsher #ifdef CONFIG_PM
3029e689cf4aSJeff Kirsher 	.suspend	= gem_suspend,
3030e689cf4aSJeff Kirsher 	.resume		= gem_resume,
3031e689cf4aSJeff Kirsher #endif /* CONFIG_PM */
3032e689cf4aSJeff Kirsher };
3033e689cf4aSJeff Kirsher 
30345119ad0bSPeter Hüwe module_pci_driver(gem_driver);
3035