1 // SPDX-License-Identifier: GPL-2.0-only 2 /******************************************************************************* 3 PTP 1588 clock using the STMMAC. 4 5 Copyright (C) 2013 Vayavya Labs Pvt Ltd 6 7 8 Author: Rayagond Kokatanur <rayagond@vayavyalabs.com> 9 *******************************************************************************/ 10 #include "stmmac.h" 11 #include "stmmac_ptp.h" 12 #include "dwmac4.h" 13 14 /** 15 * stmmac_adjust_freq 16 * 17 * @ptp: pointer to ptp_clock_info structure 18 * @ppb: desired period change in parts ber billion 19 * 20 * Description: this function will adjust the frequency of hardware clock. 21 */ 22 static int stmmac_adjust_freq(struct ptp_clock_info *ptp, s32 ppb) 23 { 24 struct stmmac_priv *priv = 25 container_of(ptp, struct stmmac_priv, ptp_clock_ops); 26 unsigned long flags; 27 u32 diff, addend; 28 int neg_adj = 0; 29 u64 adj; 30 31 if (ppb < 0) { 32 neg_adj = 1; 33 ppb = -ppb; 34 } 35 36 addend = priv->default_addend; 37 adj = addend; 38 adj *= ppb; 39 diff = div_u64(adj, 1000000000ULL); 40 addend = neg_adj ? (addend - diff) : (addend + diff); 41 42 write_lock_irqsave(&priv->ptp_lock, flags); 43 stmmac_config_addend(priv, priv->ptpaddr, addend); 44 write_unlock_irqrestore(&priv->ptp_lock, flags); 45 46 return 0; 47 } 48 49 /** 50 * stmmac_adjust_time 51 * 52 * @ptp: pointer to ptp_clock_info structure 53 * @delta: desired change in nanoseconds 54 * 55 * Description: this function will shift/adjust the hardware clock time. 56 */ 57 static int stmmac_adjust_time(struct ptp_clock_info *ptp, s64 delta) 58 { 59 struct stmmac_priv *priv = 60 container_of(ptp, struct stmmac_priv, ptp_clock_ops); 61 unsigned long flags; 62 u32 sec, nsec; 63 u32 quotient, reminder; 64 int neg_adj = 0; 65 bool xmac, est_rst = false; 66 int ret; 67 68 xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac; 69 70 if (delta < 0) { 71 neg_adj = 1; 72 delta = -delta; 73 } 74 75 quotient = div_u64_rem(delta, 1000000000ULL, &reminder); 76 sec = quotient; 77 nsec = reminder; 78 79 /* If EST is enabled, disabled it before adjust ptp time. */ 80 if (priv->plat->est && priv->plat->est->enable) { 81 est_rst = true; 82 mutex_lock(&priv->plat->est->lock); 83 priv->plat->est->enable = false; 84 stmmac_est_configure(priv, priv->ioaddr, priv->plat->est, 85 priv->plat->clk_ptp_rate); 86 mutex_unlock(&priv->plat->est->lock); 87 } 88 89 write_lock_irqsave(&priv->ptp_lock, flags); 90 stmmac_adjust_systime(priv, priv->ptpaddr, sec, nsec, neg_adj, xmac); 91 write_unlock_irqrestore(&priv->ptp_lock, flags); 92 93 /* Caculate new basetime and re-configured EST after PTP time adjust. */ 94 if (est_rst) { 95 struct timespec64 current_time, time; 96 ktime_t current_time_ns, basetime; 97 u64 cycle_time; 98 99 mutex_lock(&priv->plat->est->lock); 100 priv->ptp_clock_ops.gettime64(&priv->ptp_clock_ops, ¤t_time); 101 current_time_ns = timespec64_to_ktime(current_time); 102 time.tv_nsec = priv->plat->est->btr_reserve[0]; 103 time.tv_sec = priv->plat->est->btr_reserve[1]; 104 basetime = timespec64_to_ktime(time); 105 cycle_time = (u64)priv->plat->est->ctr[1] * NSEC_PER_SEC + 106 priv->plat->est->ctr[0]; 107 time = stmmac_calc_tas_basetime(basetime, 108 current_time_ns, 109 cycle_time); 110 111 priv->plat->est->btr[0] = (u32)time.tv_nsec; 112 priv->plat->est->btr[1] = (u32)time.tv_sec; 113 priv->plat->est->enable = true; 114 ret = stmmac_est_configure(priv, priv->ioaddr, priv->plat->est, 115 priv->plat->clk_ptp_rate); 116 mutex_unlock(&priv->plat->est->lock); 117 if (ret) 118 netdev_err(priv->dev, "failed to configure EST\n"); 119 } 120 121 return 0; 122 } 123 124 /** 125 * stmmac_get_time 126 * 127 * @ptp: pointer to ptp_clock_info structure 128 * @ts: pointer to hold time/result 129 * 130 * Description: this function will read the current time from the 131 * hardware clock and store it in @ts. 132 */ 133 static int stmmac_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts) 134 { 135 struct stmmac_priv *priv = 136 container_of(ptp, struct stmmac_priv, ptp_clock_ops); 137 unsigned long flags; 138 u64 ns = 0; 139 140 read_lock_irqsave(&priv->ptp_lock, flags); 141 stmmac_get_systime(priv, priv->ptpaddr, &ns); 142 read_unlock_irqrestore(&priv->ptp_lock, flags); 143 144 *ts = ns_to_timespec64(ns); 145 146 return 0; 147 } 148 149 /** 150 * stmmac_set_time 151 * 152 * @ptp: pointer to ptp_clock_info structure 153 * @ts: time value to set 154 * 155 * Description: this function will set the current time on the 156 * hardware clock. 157 */ 158 static int stmmac_set_time(struct ptp_clock_info *ptp, 159 const struct timespec64 *ts) 160 { 161 struct stmmac_priv *priv = 162 container_of(ptp, struct stmmac_priv, ptp_clock_ops); 163 unsigned long flags; 164 165 write_lock_irqsave(&priv->ptp_lock, flags); 166 stmmac_init_systime(priv, priv->ptpaddr, ts->tv_sec, ts->tv_nsec); 167 write_unlock_irqrestore(&priv->ptp_lock, flags); 168 169 return 0; 170 } 171 172 static int stmmac_enable(struct ptp_clock_info *ptp, 173 struct ptp_clock_request *rq, int on) 174 { 175 struct stmmac_priv *priv = 176 container_of(ptp, struct stmmac_priv, ptp_clock_ops); 177 void __iomem *ptpaddr = priv->ptpaddr; 178 struct stmmac_pps_cfg *cfg; 179 int ret = -EOPNOTSUPP; 180 unsigned long flags; 181 u32 acr_value; 182 183 switch (rq->type) { 184 case PTP_CLK_REQ_PEROUT: 185 /* Reject requests with unsupported flags */ 186 if (rq->perout.flags) 187 return -EOPNOTSUPP; 188 189 cfg = &priv->pps[rq->perout.index]; 190 191 cfg->start.tv_sec = rq->perout.start.sec; 192 cfg->start.tv_nsec = rq->perout.start.nsec; 193 cfg->period.tv_sec = rq->perout.period.sec; 194 cfg->period.tv_nsec = rq->perout.period.nsec; 195 196 write_lock_irqsave(&priv->ptp_lock, flags); 197 ret = stmmac_flex_pps_config(priv, priv->ioaddr, 198 rq->perout.index, cfg, on, 199 priv->sub_second_inc, 200 priv->systime_flags); 201 write_unlock_irqrestore(&priv->ptp_lock, flags); 202 break; 203 case PTP_CLK_REQ_EXTTS: 204 priv->plat->ext_snapshot_en = on; 205 mutex_lock(&priv->aux_ts_lock); 206 acr_value = readl(ptpaddr + PTP_ACR); 207 acr_value &= ~PTP_ACR_MASK; 208 if (on) { 209 /* Enable External snapshot trigger */ 210 acr_value |= priv->plat->ext_snapshot_num; 211 acr_value |= PTP_ACR_ATSFC; 212 netdev_dbg(priv->dev, "Auxiliary Snapshot %d enabled.\n", 213 priv->plat->ext_snapshot_num >> 214 PTP_ACR_ATSEN_SHIFT); 215 } else { 216 netdev_dbg(priv->dev, "Auxiliary Snapshot %d disabled.\n", 217 priv->plat->ext_snapshot_num >> 218 PTP_ACR_ATSEN_SHIFT); 219 } 220 writel(acr_value, ptpaddr + PTP_ACR); 221 mutex_unlock(&priv->aux_ts_lock); 222 ret = 0; 223 break; 224 225 default: 226 break; 227 } 228 229 return ret; 230 } 231 232 /** 233 * stmmac_get_syncdevicetime 234 * @device: current device time 235 * @system: system counter value read synchronously with device time 236 * @ctx: context provided by timekeeping code 237 * Description: Read device and system clock simultaneously and return the 238 * corrected clock values in ns. 239 **/ 240 static int stmmac_get_syncdevicetime(ktime_t *device, 241 struct system_counterval_t *system, 242 void *ctx) 243 { 244 struct stmmac_priv *priv = (struct stmmac_priv *)ctx; 245 246 if (priv->plat->crosststamp) 247 return priv->plat->crosststamp(device, system, ctx); 248 else 249 return -EOPNOTSUPP; 250 } 251 252 static int stmmac_getcrosststamp(struct ptp_clock_info *ptp, 253 struct system_device_crosststamp *xtstamp) 254 { 255 struct stmmac_priv *priv = 256 container_of(ptp, struct stmmac_priv, ptp_clock_ops); 257 258 return get_device_system_crosststamp(stmmac_get_syncdevicetime, 259 priv, NULL, xtstamp); 260 } 261 262 /* structure describing a PTP hardware clock */ 263 static struct ptp_clock_info stmmac_ptp_clock_ops = { 264 .owner = THIS_MODULE, 265 .name = "stmmac ptp", 266 .max_adj = 62500000, 267 .n_alarm = 0, 268 .n_ext_ts = 0, /* will be overwritten in stmmac_ptp_register */ 269 .n_per_out = 0, /* will be overwritten in stmmac_ptp_register */ 270 .n_pins = 0, 271 .pps = 0, 272 .adjfreq = stmmac_adjust_freq, 273 .adjtime = stmmac_adjust_time, 274 .gettime64 = stmmac_get_time, 275 .settime64 = stmmac_set_time, 276 .enable = stmmac_enable, 277 .getcrosststamp = stmmac_getcrosststamp, 278 }; 279 280 /** 281 * stmmac_ptp_register 282 * @priv: driver private structure 283 * Description: this function will register the ptp clock driver 284 * to kernel. It also does some house keeping work. 285 */ 286 void stmmac_ptp_register(struct stmmac_priv *priv) 287 { 288 int i; 289 290 for (i = 0; i < priv->dma_cap.pps_out_num; i++) { 291 if (i >= STMMAC_PPS_MAX) 292 break; 293 priv->pps[i].available = true; 294 } 295 296 if (priv->plat->ptp_max_adj) 297 stmmac_ptp_clock_ops.max_adj = priv->plat->ptp_max_adj; 298 299 /* Calculate the clock domain crossing (CDC) error if necessary */ 300 priv->plat->cdc_error_adj = 0; 301 if (priv->plat->has_gmac4 && priv->plat->clk_ptp_rate) 302 priv->plat->cdc_error_adj = (2 * NSEC_PER_SEC) / priv->plat->clk_ptp_rate; 303 304 stmmac_ptp_clock_ops.n_per_out = priv->dma_cap.pps_out_num; 305 stmmac_ptp_clock_ops.n_ext_ts = priv->dma_cap.aux_snapshot_n; 306 307 rwlock_init(&priv->ptp_lock); 308 mutex_init(&priv->aux_ts_lock); 309 priv->ptp_clock_ops = stmmac_ptp_clock_ops; 310 311 priv->ptp_clock = ptp_clock_register(&priv->ptp_clock_ops, 312 priv->device); 313 if (IS_ERR(priv->ptp_clock)) { 314 netdev_err(priv->dev, "ptp_clock_register failed\n"); 315 priv->ptp_clock = NULL; 316 } else if (priv->ptp_clock) 317 netdev_info(priv->dev, "registered PTP clock\n"); 318 } 319 320 /** 321 * stmmac_ptp_unregister 322 * @priv: driver private structure 323 * Description: this function will remove/unregister the ptp clock driver 324 * from the kernel. 325 */ 326 void stmmac_ptp_unregister(struct stmmac_priv *priv) 327 { 328 if (priv->ptp_clock) { 329 ptp_clock_unregister(priv->ptp_clock); 330 priv->ptp_clock = NULL; 331 pr_debug("Removed PTP HW clock successfully on %s\n", 332 priv->dev->name); 333 } 334 335 mutex_destroy(&priv->aux_ts_lock); 336 } 337