1 /******************************************************************************* 2 This contains the functions to handle the platform driver. 3 4 Copyright (C) 2007-2011 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 The full GNU General Public License is included in this distribution in 16 the file called "COPYING". 17 18 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 19 *******************************************************************************/ 20 21 #include <linux/platform_device.h> 22 #include <linux/module.h> 23 #include <linux/io.h> 24 #include <linux/of.h> 25 #include <linux/of_net.h> 26 #include <linux/of_device.h> 27 #include <linux/of_mdio.h> 28 29 #include "stmmac.h" 30 #include "stmmac_platform.h" 31 32 #ifdef CONFIG_OF 33 34 /** 35 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins 36 * @mcast_bins: Multicast filtering bins 37 * Description: 38 * this function validates the number of Multicast filtering bins specified 39 * by the configuration through the device tree. The Synopsys GMAC supports 40 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC 41 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds 42 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is 43 * invalid and will cause the filtering algorithm to use Multicast 44 * promiscuous mode. 45 */ 46 static int dwmac1000_validate_mcast_bins(int mcast_bins) 47 { 48 int x = mcast_bins; 49 50 switch (x) { 51 case HASH_TABLE_SIZE: 52 case 128: 53 case 256: 54 break; 55 default: 56 x = 0; 57 pr_info("Hash table entries set to unexpected value %d", 58 mcast_bins); 59 break; 60 } 61 return x; 62 } 63 64 /** 65 * dwmac1000_validate_ucast_entries - validate the Unicast address entries 66 * @ucast_entries: number of Unicast address entries 67 * Description: 68 * This function validates the number of Unicast address entries supported 69 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller 70 * supports 1, 32, 64, or 128 Unicast filter entries for it's Unicast filter 71 * logic. This function validates a valid, supported configuration is 72 * selected, and defaults to 1 Unicast address if an unsupported 73 * configuration is selected. 74 */ 75 static int dwmac1000_validate_ucast_entries(int ucast_entries) 76 { 77 int x = ucast_entries; 78 79 switch (x) { 80 case 1: 81 case 32: 82 case 64: 83 case 128: 84 break; 85 default: 86 x = 1; 87 pr_info("Unicast table entries set to unexpected value %d\n", 88 ucast_entries); 89 break; 90 } 91 return x; 92 } 93 94 /** 95 * stmmac_axi_setup - parse DT parameters for programming the AXI register 96 * @pdev: platform device 97 * @priv: driver private struct. 98 * Description: 99 * if required, from device-tree the AXI internal register can be tuned 100 * by using platform parameters. 101 */ 102 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev) 103 { 104 struct device_node *np; 105 struct stmmac_axi *axi; 106 107 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); 108 if (!np) 109 return NULL; 110 111 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); 112 if (!axi) { 113 of_node_put(np); 114 return ERR_PTR(-ENOMEM); 115 } 116 117 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); 118 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm"); 119 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe"); 120 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb"); 121 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb"); 122 axi->axi_rb = of_property_read_bool(np, "snps,axi_rb"); 123 124 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt)) 125 axi->axi_wr_osr_lmt = 1; 126 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt)) 127 axi->axi_rd_osr_lmt = 1; 128 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN); 129 of_node_put(np); 130 131 return axi; 132 } 133 134 /** 135 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration 136 * @pdev: platform device 137 */ 138 static void stmmac_mtl_setup(struct platform_device *pdev, 139 struct plat_stmmacenet_data *plat) 140 { 141 struct device_node *q_node; 142 struct device_node *rx_node; 143 struct device_node *tx_node; 144 u8 queue = 0; 145 146 /* For backwards-compatibility with device trees that don't have any 147 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back 148 * to one RX and TX queues each. 149 */ 150 plat->rx_queues_to_use = 1; 151 plat->tx_queues_to_use = 1; 152 153 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need 154 * to always set this, otherwise Queue will be classified as AVB 155 * (because MTL_QUEUE_AVB = 0). 156 */ 157 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB; 158 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB; 159 160 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0); 161 if (!rx_node) 162 return; 163 164 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0); 165 if (!tx_node) { 166 of_node_put(rx_node); 167 return; 168 } 169 170 /* Processing RX queues common config */ 171 if (of_property_read_u8(rx_node, "snps,rx-queues-to-use", 172 &plat->rx_queues_to_use)) 173 plat->rx_queues_to_use = 1; 174 175 if (of_property_read_bool(rx_node, "snps,rx-sched-sp")) 176 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 177 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp")) 178 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP; 179 else 180 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; 181 182 /* Processing individual RX queue config */ 183 for_each_child_of_node(rx_node, q_node) { 184 if (queue >= plat->rx_queues_to_use) 185 break; 186 187 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) 188 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 189 else if (of_property_read_bool(q_node, "snps,avb-algorithm")) 190 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 191 else 192 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 193 194 if (of_property_read_u8(q_node, "snps,map-to-dma-channel", 195 &plat->rx_queues_cfg[queue].chan)) 196 plat->rx_queues_cfg[queue].chan = queue; 197 /* TODO: Dynamic mapping to be included in the future */ 198 199 if (of_property_read_u32(q_node, "snps,priority", 200 &plat->rx_queues_cfg[queue].prio)) { 201 plat->rx_queues_cfg[queue].prio = 0; 202 plat->rx_queues_cfg[queue].use_prio = false; 203 } else { 204 plat->rx_queues_cfg[queue].use_prio = true; 205 } 206 207 /* RX queue specific packet type routing */ 208 if (of_property_read_bool(q_node, "snps,route-avcp")) 209 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ; 210 else if (of_property_read_bool(q_node, "snps,route-ptp")) 211 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ; 212 else if (of_property_read_bool(q_node, "snps,route-dcbcp")) 213 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ; 214 else if (of_property_read_bool(q_node, "snps,route-up")) 215 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ; 216 else if (of_property_read_bool(q_node, "snps,route-multi-broad")) 217 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ; 218 else 219 plat->rx_queues_cfg[queue].pkt_route = 0x0; 220 221 queue++; 222 } 223 224 /* Processing TX queues common config */ 225 if (of_property_read_u8(tx_node, "snps,tx-queues-to-use", 226 &plat->tx_queues_to_use)) 227 plat->tx_queues_to_use = 1; 228 229 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr")) 230 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR; 231 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq")) 232 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ; 233 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr")) 234 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR; 235 else if (of_property_read_bool(tx_node, "snps,tx-sched-sp")) 236 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP; 237 else 238 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP; 239 240 queue = 0; 241 242 /* Processing individual TX queue config */ 243 for_each_child_of_node(tx_node, q_node) { 244 if (queue >= plat->tx_queues_to_use) 245 break; 246 247 if (of_property_read_u8(q_node, "snps,weight", 248 &plat->tx_queues_cfg[queue].weight)) 249 plat->tx_queues_cfg[queue].weight = 0x10 + queue; 250 251 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) { 252 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 253 } else if (of_property_read_bool(q_node, 254 "snps,avb-algorithm")) { 255 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB; 256 257 /* Credit Base Shaper parameters used by AVB */ 258 if (of_property_read_u32(q_node, "snps,send_slope", 259 &plat->tx_queues_cfg[queue].send_slope)) 260 plat->tx_queues_cfg[queue].send_slope = 0x0; 261 if (of_property_read_u32(q_node, "snps,idle_slope", 262 &plat->tx_queues_cfg[queue].idle_slope)) 263 plat->tx_queues_cfg[queue].idle_slope = 0x0; 264 if (of_property_read_u32(q_node, "snps,high_credit", 265 &plat->tx_queues_cfg[queue].high_credit)) 266 plat->tx_queues_cfg[queue].high_credit = 0x0; 267 if (of_property_read_u32(q_node, "snps,low_credit", 268 &plat->tx_queues_cfg[queue].low_credit)) 269 plat->tx_queues_cfg[queue].low_credit = 0x0; 270 } else { 271 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; 272 } 273 274 if (of_property_read_u32(q_node, "snps,priority", 275 &plat->tx_queues_cfg[queue].prio)) { 276 plat->tx_queues_cfg[queue].prio = 0; 277 plat->tx_queues_cfg[queue].use_prio = false; 278 } else { 279 plat->tx_queues_cfg[queue].use_prio = true; 280 } 281 282 queue++; 283 } 284 285 of_node_put(rx_node); 286 of_node_put(tx_node); 287 of_node_put(q_node); 288 } 289 290 /** 291 * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources 292 * @plat: driver data platform structure 293 * @np: device tree node 294 * @dev: device pointer 295 * Description: 296 * The mdio bus will be allocated in case of a phy transceiver is on board; 297 * it will be NULL if the fixed-link is configured. 298 * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated 299 * in any case (for DSA, mdio must be registered even if fixed-link). 300 * The table below sums the supported configurations: 301 * ------------------------------- 302 * snps,phy-addr | Y 303 * ------------------------------- 304 * phy-handle | Y 305 * ------------------------------- 306 * fixed-link | N 307 * ------------------------------- 308 * snps,dwmac-mdio | 309 * even if | Y 310 * fixed-link | 311 * ------------------------------- 312 * 313 * It returns 0 in case of success otherwise -ENODEV. 314 */ 315 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, 316 struct device_node *np, struct device *dev) 317 { 318 bool mdio = true; 319 static const struct of_device_id need_mdio_ids[] = { 320 { .compatible = "snps,dwc-qos-ethernet-4.10" }, 321 { .compatible = "allwinner,sun8i-a83t-emac" }, 322 { .compatible = "allwinner,sun8i-h3-emac" }, 323 { .compatible = "allwinner,sun8i-v3s-emac" }, 324 { .compatible = "allwinner,sun50i-a64-emac" }, 325 {}, 326 }; 327 328 /* If phy-handle property is passed from DT, use it as the PHY */ 329 plat->phy_node = of_parse_phandle(np, "phy-handle", 0); 330 if (plat->phy_node) 331 dev_dbg(dev, "Found phy-handle subnode\n"); 332 333 /* If phy-handle is not specified, check if we have a fixed-phy */ 334 if (!plat->phy_node && of_phy_is_fixed_link(np)) { 335 if ((of_phy_register_fixed_link(np) < 0)) 336 return -ENODEV; 337 338 dev_dbg(dev, "Found fixed-link subnode\n"); 339 plat->phy_node = of_node_get(np); 340 mdio = false; 341 } 342 343 if (of_match_node(need_mdio_ids, np)) { 344 plat->mdio_node = of_get_child_by_name(np, "mdio"); 345 } else { 346 /** 347 * If snps,dwmac-mdio is passed from DT, always register 348 * the MDIO 349 */ 350 for_each_child_of_node(np, plat->mdio_node) { 351 if (of_device_is_compatible(plat->mdio_node, 352 "snps,dwmac-mdio")) 353 break; 354 } 355 } 356 357 if (plat->mdio_node) { 358 dev_dbg(dev, "Found MDIO subnode\n"); 359 mdio = true; 360 } 361 362 if (mdio) 363 plat->mdio_bus_data = 364 devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data), 365 GFP_KERNEL); 366 return 0; 367 } 368 369 /** 370 * stmmac_probe_config_dt - parse device-tree driver parameters 371 * @pdev: platform_device structure 372 * @mac: MAC address to use 373 * Description: 374 * this function is to read the driver parameters from device-tree and 375 * set some private fields that will be used by the main at runtime. 376 */ 377 struct plat_stmmacenet_data * 378 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) 379 { 380 struct device_node *np = pdev->dev.of_node; 381 struct plat_stmmacenet_data *plat; 382 struct stmmac_dma_cfg *dma_cfg; 383 384 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL); 385 if (!plat) 386 return ERR_PTR(-ENOMEM); 387 388 *mac = of_get_mac_address(np); 389 plat->interface = of_get_phy_mode(np); 390 391 /* Get max speed of operation from device tree */ 392 if (of_property_read_u32(np, "max-speed", &plat->max_speed)) 393 plat->max_speed = -1; 394 395 plat->bus_id = of_alias_get_id(np, "ethernet"); 396 if (plat->bus_id < 0) 397 plat->bus_id = 0; 398 399 /* Default to phy auto-detection */ 400 plat->phy_addr = -1; 401 402 /* "snps,phy-addr" is not a standard property. Mark it as deprecated 403 * and warn of its use. Remove this when phy node support is added. 404 */ 405 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0) 406 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n"); 407 408 /* To Configure PHY by using all device-tree supported properties */ 409 if (stmmac_dt_phy(plat, np, &pdev->dev)) 410 return ERR_PTR(-ENODEV); 411 412 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size); 413 414 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size); 415 416 plat->force_sf_dma_mode = 417 of_property_read_bool(np, "snps,force_sf_dma_mode"); 418 419 plat->en_tx_lpi_clockgating = 420 of_property_read_bool(np, "snps,en-tx-lpi-clockgating"); 421 422 /* Set the maxmtu to a default of JUMBO_LEN in case the 423 * parameter is not present in the device tree. 424 */ 425 plat->maxmtu = JUMBO_LEN; 426 427 /* Set default value for multicast hash bins */ 428 plat->multicast_filter_bins = HASH_TABLE_SIZE; 429 430 /* Set default value for unicast filter entries */ 431 plat->unicast_filter_entries = 1; 432 433 /* 434 * Currently only the properties needed on SPEAr600 435 * are provided. All other properties should be added 436 * once needed on other platforms. 437 */ 438 if (of_device_is_compatible(np, "st,spear600-gmac") || 439 of_device_is_compatible(np, "snps,dwmac-3.50a") || 440 of_device_is_compatible(np, "snps,dwmac-3.70a") || 441 of_device_is_compatible(np, "snps,dwmac")) { 442 /* Note that the max-frame-size parameter as defined in the 443 * ePAPR v1.1 spec is defined as max-frame-size, it's 444 * actually used as the IEEE definition of MAC Client 445 * data, or MTU. The ePAPR specification is confusing as 446 * the definition is max-frame-size, but usage examples 447 * are clearly MTUs 448 */ 449 of_property_read_u32(np, "max-frame-size", &plat->maxmtu); 450 of_property_read_u32(np, "snps,multicast-filter-bins", 451 &plat->multicast_filter_bins); 452 of_property_read_u32(np, "snps,perfect-filter-entries", 453 &plat->unicast_filter_entries); 454 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries( 455 plat->unicast_filter_entries); 456 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins( 457 plat->multicast_filter_bins); 458 plat->has_gmac = 1; 459 plat->pmt = 1; 460 } 461 462 if (of_device_is_compatible(np, "snps,dwmac-4.00") || 463 of_device_is_compatible(np, "snps,dwmac-4.10a")) { 464 plat->has_gmac4 = 1; 465 plat->has_gmac = 0; 466 plat->pmt = 1; 467 plat->tso_en = of_property_read_bool(np, "snps,tso"); 468 } 469 470 if (of_device_is_compatible(np, "snps,dwmac-3.610") || 471 of_device_is_compatible(np, "snps,dwmac-3.710")) { 472 plat->enh_desc = 1; 473 plat->bugged_jumbo = 1; 474 plat->force_sf_dma_mode = 1; 475 } 476 477 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg), 478 GFP_KERNEL); 479 if (!dma_cfg) { 480 stmmac_remove_config_dt(pdev, plat); 481 return ERR_PTR(-ENOMEM); 482 } 483 plat->dma_cfg = dma_cfg; 484 485 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl); 486 if (!dma_cfg->pbl) 487 dma_cfg->pbl = DEFAULT_DMA_PBL; 488 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl); 489 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl); 490 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8"); 491 492 dma_cfg->aal = of_property_read_bool(np, "snps,aal"); 493 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst"); 494 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst"); 495 496 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode"); 497 if (plat->force_thresh_dma_mode) { 498 plat->force_sf_dma_mode = 0; 499 pr_warn("force_sf_dma_mode is ignored if force_thresh_dma_mode is set."); 500 } 501 502 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed); 503 504 plat->axi = stmmac_axi_setup(pdev); 505 506 stmmac_mtl_setup(pdev, plat); 507 508 /* clock setup */ 509 plat->stmmac_clk = devm_clk_get(&pdev->dev, 510 STMMAC_RESOURCE_NAME); 511 if (IS_ERR(plat->stmmac_clk)) { 512 dev_warn(&pdev->dev, "Cannot get CSR clock\n"); 513 plat->stmmac_clk = NULL; 514 } 515 clk_prepare_enable(plat->stmmac_clk); 516 517 plat->pclk = devm_clk_get(&pdev->dev, "pclk"); 518 if (IS_ERR(plat->pclk)) { 519 if (PTR_ERR(plat->pclk) == -EPROBE_DEFER) 520 goto error_pclk_get; 521 522 plat->pclk = NULL; 523 } 524 clk_prepare_enable(plat->pclk); 525 526 /* Fall-back to main clock in case of no PTP ref is passed */ 527 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref"); 528 if (IS_ERR(plat->clk_ptp_ref)) { 529 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk); 530 plat->clk_ptp_ref = NULL; 531 dev_warn(&pdev->dev, "PTP uses main clock\n"); 532 } else { 533 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref); 534 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate); 535 } 536 537 plat->stmmac_rst = devm_reset_control_get(&pdev->dev, 538 STMMAC_RESOURCE_NAME); 539 if (IS_ERR(plat->stmmac_rst)) { 540 if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER) 541 goto error_hw_init; 542 543 dev_info(&pdev->dev, "no reset control found\n"); 544 plat->stmmac_rst = NULL; 545 } 546 547 return plat; 548 549 error_hw_init: 550 clk_disable_unprepare(plat->pclk); 551 error_pclk_get: 552 clk_disable_unprepare(plat->stmmac_clk); 553 554 return ERR_PTR(-EPROBE_DEFER); 555 } 556 557 /** 558 * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt() 559 * @pdev: platform_device structure 560 * @plat: driver data platform structure 561 * 562 * Release resources claimed by stmmac_probe_config_dt(). 563 */ 564 void stmmac_remove_config_dt(struct platform_device *pdev, 565 struct plat_stmmacenet_data *plat) 566 { 567 struct device_node *np = pdev->dev.of_node; 568 569 if (of_phy_is_fixed_link(np)) 570 of_phy_deregister_fixed_link(np); 571 of_node_put(plat->phy_node); 572 of_node_put(plat->mdio_node); 573 } 574 #else 575 struct plat_stmmacenet_data * 576 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) 577 { 578 return ERR_PTR(-EINVAL); 579 } 580 581 void stmmac_remove_config_dt(struct platform_device *pdev, 582 struct plat_stmmacenet_data *plat) 583 { 584 } 585 #endif /* CONFIG_OF */ 586 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt); 587 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt); 588 589 int stmmac_get_platform_resources(struct platform_device *pdev, 590 struct stmmac_resources *stmmac_res) 591 { 592 struct resource *res; 593 594 memset(stmmac_res, 0, sizeof(*stmmac_res)); 595 596 /* Get IRQ information early to have an ability to ask for deferred 597 * probe if needed before we went too far with resource allocation. 598 */ 599 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq"); 600 if (stmmac_res->irq < 0) { 601 if (stmmac_res->irq != -EPROBE_DEFER) { 602 dev_err(&pdev->dev, 603 "MAC IRQ configuration information not found\n"); 604 } 605 return stmmac_res->irq; 606 } 607 608 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq 609 * The external wake up irq can be passed through the platform code 610 * named as "eth_wake_irq" 611 * 612 * In case the wake up interrupt is not passed from the platform 613 * so the driver will continue to use the mac irq (ndev->irq) 614 */ 615 stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq"); 616 if (stmmac_res->wol_irq < 0) { 617 if (stmmac_res->wol_irq == -EPROBE_DEFER) 618 return -EPROBE_DEFER; 619 stmmac_res->wol_irq = stmmac_res->irq; 620 } 621 622 stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi"); 623 if (stmmac_res->lpi_irq == -EPROBE_DEFER) 624 return -EPROBE_DEFER; 625 626 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 627 stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res); 628 629 return PTR_ERR_OR_ZERO(stmmac_res->addr); 630 } 631 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources); 632 633 /** 634 * stmmac_pltfr_remove 635 * @pdev: platform device pointer 636 * Description: this function calls the main to free the net resources 637 * and calls the platforms hook and release the resources (e.g. mem). 638 */ 639 int stmmac_pltfr_remove(struct platform_device *pdev) 640 { 641 struct net_device *ndev = platform_get_drvdata(pdev); 642 struct stmmac_priv *priv = netdev_priv(ndev); 643 struct plat_stmmacenet_data *plat = priv->plat; 644 int ret = stmmac_dvr_remove(&pdev->dev); 645 646 if (plat->exit) 647 plat->exit(pdev, plat->bsp_priv); 648 649 stmmac_remove_config_dt(pdev, plat); 650 651 return ret; 652 } 653 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove); 654 655 #ifdef CONFIG_PM_SLEEP 656 /** 657 * stmmac_pltfr_suspend 658 * @dev: device pointer 659 * Description: this function is invoked when suspend the driver and it direcly 660 * call the main suspend function and then, if required, on some platform, it 661 * can call an exit helper. 662 */ 663 static int stmmac_pltfr_suspend(struct device *dev) 664 { 665 int ret; 666 struct net_device *ndev = dev_get_drvdata(dev); 667 struct stmmac_priv *priv = netdev_priv(ndev); 668 struct platform_device *pdev = to_platform_device(dev); 669 670 ret = stmmac_suspend(dev); 671 if (priv->plat->exit) 672 priv->plat->exit(pdev, priv->plat->bsp_priv); 673 674 return ret; 675 } 676 677 /** 678 * stmmac_pltfr_resume 679 * @dev: device pointer 680 * Description: this function is invoked when resume the driver before calling 681 * the main resume function, on some platforms, it can call own init helper 682 * if required. 683 */ 684 static int stmmac_pltfr_resume(struct device *dev) 685 { 686 struct net_device *ndev = dev_get_drvdata(dev); 687 struct stmmac_priv *priv = netdev_priv(ndev); 688 struct platform_device *pdev = to_platform_device(dev); 689 690 if (priv->plat->init) 691 priv->plat->init(pdev, priv->plat->bsp_priv); 692 693 return stmmac_resume(dev); 694 } 695 #endif /* CONFIG_PM_SLEEP */ 696 697 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend, 698 stmmac_pltfr_resume); 699 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops); 700 701 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support"); 702 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); 703 MODULE_LICENSE("GPL"); 704