1 /*******************************************************************************
2   This contains the functions to handle the platform driver.
3 
4   Copyright (C) 2007-2011  STMicroelectronics Ltd
5 
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9 
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   The full GNU General Public License is included in this distribution in
16   the file called "COPYING".
17 
18   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
19 *******************************************************************************/
20 
21 #include <linux/platform_device.h>
22 #include <linux/module.h>
23 #include <linux/io.h>
24 #include <linux/of.h>
25 #include <linux/of_net.h>
26 #include <linux/of_device.h>
27 #include <linux/of_mdio.h>
28 
29 #include "stmmac.h"
30 #include "stmmac_platform.h"
31 
32 #ifdef CONFIG_OF
33 
34 /**
35  * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
36  * @mcast_bins: Multicast filtering bins
37  * Description:
38  * this function validates the number of Multicast filtering bins specified
39  * by the configuration through the device tree. The Synopsys GMAC supports
40  * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
41  * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
42  * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
43  * invalid and will cause the filtering algorithm to use Multicast
44  * promiscuous mode.
45  */
46 static int dwmac1000_validate_mcast_bins(int mcast_bins)
47 {
48 	int x = mcast_bins;
49 
50 	switch (x) {
51 	case HASH_TABLE_SIZE:
52 	case 128:
53 	case 256:
54 		break;
55 	default:
56 		x = 0;
57 		pr_info("Hash table entries set to unexpected value %d",
58 			mcast_bins);
59 		break;
60 	}
61 	return x;
62 }
63 
64 /**
65  * dwmac1000_validate_ucast_entries - validate the Unicast address entries
66  * @ucast_entries: number of Unicast address entries
67  * Description:
68  * This function validates the number of Unicast address entries supported
69  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
70  * supports 1, 32, 64, or 128 Unicast filter entries for it's Unicast filter
71  * logic. This function validates a valid, supported configuration is
72  * selected, and defaults to 1 Unicast address if an unsupported
73  * configuration is selected.
74  */
75 static int dwmac1000_validate_ucast_entries(int ucast_entries)
76 {
77 	int x = ucast_entries;
78 
79 	switch (x) {
80 	case 1:
81 	case 32:
82 	case 64:
83 	case 128:
84 		break;
85 	default:
86 		x = 1;
87 		pr_info("Unicast table entries set to unexpected value %d\n",
88 			ucast_entries);
89 		break;
90 	}
91 	return x;
92 }
93 
94 /**
95  * stmmac_axi_setup - parse DT parameters for programming the AXI register
96  * @pdev: platform device
97  * @priv: driver private struct.
98  * Description:
99  * if required, from device-tree the AXI internal register can be tuned
100  * by using platform parameters.
101  */
102 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
103 {
104 	struct device_node *np;
105 	struct stmmac_axi *axi;
106 
107 	np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
108 	if (!np)
109 		return NULL;
110 
111 	axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
112 	if (!axi) {
113 		of_node_put(np);
114 		return ERR_PTR(-ENOMEM);
115 	}
116 
117 	axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
118 	axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
119 	axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
120 	axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
121 	axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
122 	axi->axi_rb =  of_property_read_bool(np, "snps,axi_rb");
123 
124 	if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
125 		axi->axi_wr_osr_lmt = 1;
126 	if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
127 		axi->axi_rd_osr_lmt = 1;
128 	of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
129 	of_node_put(np);
130 
131 	return axi;
132 }
133 
134 /**
135  * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
136  * @pdev: platform device
137  */
138 static void stmmac_mtl_setup(struct platform_device *pdev,
139 			     struct plat_stmmacenet_data *plat)
140 {
141 	struct device_node *q_node;
142 	struct device_node *rx_node;
143 	struct device_node *tx_node;
144 	u8 queue = 0;
145 
146 	/* For backwards-compatibility with device trees that don't have any
147 	 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
148 	 * to one RX and TX queues each.
149 	 */
150 	plat->rx_queues_to_use = 1;
151 	plat->tx_queues_to_use = 1;
152 
153 	rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
154 	if (!rx_node)
155 		return;
156 
157 	tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
158 	if (!tx_node) {
159 		of_node_put(rx_node);
160 		return;
161 	}
162 
163 	/* Processing RX queues common config */
164 	if (of_property_read_u8(rx_node, "snps,rx-queues-to-use",
165 				&plat->rx_queues_to_use))
166 		plat->rx_queues_to_use = 1;
167 
168 	if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
169 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
170 	else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
171 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
172 	else
173 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
174 
175 	/* Processing individual RX queue config */
176 	for_each_child_of_node(rx_node, q_node) {
177 		if (queue >= plat->rx_queues_to_use)
178 			break;
179 
180 		if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
181 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
182 		else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
183 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
184 		else
185 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
186 
187 		if (of_property_read_u8(q_node, "snps,map-to-dma-channel",
188 					&plat->rx_queues_cfg[queue].chan))
189 			plat->rx_queues_cfg[queue].chan = queue;
190 		/* TODO: Dynamic mapping to be included in the future */
191 
192 		if (of_property_read_u32(q_node, "snps,priority",
193 					&plat->rx_queues_cfg[queue].prio)) {
194 			plat->rx_queues_cfg[queue].prio = 0;
195 			plat->rx_queues_cfg[queue].use_prio = false;
196 		} else {
197 			plat->rx_queues_cfg[queue].use_prio = true;
198 		}
199 
200 		/* RX queue specific packet type routing */
201 		if (of_property_read_bool(q_node, "snps,route-avcp"))
202 			plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
203 		else if (of_property_read_bool(q_node, "snps,route-ptp"))
204 			plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
205 		else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
206 			plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
207 		else if (of_property_read_bool(q_node, "snps,route-up"))
208 			plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
209 		else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
210 			plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
211 		else
212 			plat->rx_queues_cfg[queue].pkt_route = 0x0;
213 
214 		queue++;
215 	}
216 
217 	/* Processing TX queues common config */
218 	if (of_property_read_u8(tx_node, "snps,tx-queues-to-use",
219 				&plat->tx_queues_to_use))
220 		plat->tx_queues_to_use = 1;
221 
222 	if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
223 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
224 	else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
225 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
226 	else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
227 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
228 	else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
229 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
230 	else
231 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
232 
233 	queue = 0;
234 
235 	/* Processing individual TX queue config */
236 	for_each_child_of_node(tx_node, q_node) {
237 		if (queue >= plat->tx_queues_to_use)
238 			break;
239 
240 		if (of_property_read_u8(q_node, "snps,weight",
241 					&plat->tx_queues_cfg[queue].weight))
242 			plat->tx_queues_cfg[queue].weight = 0x10 + queue;
243 
244 		if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
245 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
246 		} else if (of_property_read_bool(q_node,
247 						 "snps,avb-algorithm")) {
248 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
249 
250 			/* Credit Base Shaper parameters used by AVB */
251 			if (of_property_read_u32(q_node, "snps,send_slope",
252 				&plat->tx_queues_cfg[queue].send_slope))
253 				plat->tx_queues_cfg[queue].send_slope = 0x0;
254 			if (of_property_read_u32(q_node, "snps,idle_slope",
255 				&plat->tx_queues_cfg[queue].idle_slope))
256 				plat->tx_queues_cfg[queue].idle_slope = 0x0;
257 			if (of_property_read_u32(q_node, "snps,high_credit",
258 				&plat->tx_queues_cfg[queue].high_credit))
259 				plat->tx_queues_cfg[queue].high_credit = 0x0;
260 			if (of_property_read_u32(q_node, "snps,low_credit",
261 				&plat->tx_queues_cfg[queue].low_credit))
262 				plat->tx_queues_cfg[queue].low_credit = 0x0;
263 		} else {
264 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
265 		}
266 
267 		if (of_property_read_u32(q_node, "snps,priority",
268 					&plat->tx_queues_cfg[queue].prio)) {
269 			plat->tx_queues_cfg[queue].prio = 0;
270 			plat->tx_queues_cfg[queue].use_prio = false;
271 		} else {
272 			plat->tx_queues_cfg[queue].use_prio = true;
273 		}
274 
275 		queue++;
276 	}
277 
278 	of_node_put(rx_node);
279 	of_node_put(tx_node);
280 	of_node_put(q_node);
281 }
282 
283 /**
284  * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
285  * @plat: driver data platform structure
286  * @np: device tree node
287  * @dev: device pointer
288  * Description:
289  * The mdio bus will be allocated in case of a phy transceiver is on board;
290  * it will be NULL if the fixed-link is configured.
291  * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
292  * in any case (for DSA, mdio must be registered even if fixed-link).
293  * The table below sums the supported configurations:
294  *	-------------------------------
295  *	snps,phy-addr	|     Y
296  *	-------------------------------
297  *	phy-handle	|     Y
298  *	-------------------------------
299  *	fixed-link	|     N
300  *	-------------------------------
301  *	snps,dwmac-mdio	|
302  *	  even if	|     Y
303  *	fixed-link	|
304  *	-------------------------------
305  *
306  * It returns 0 in case of success otherwise -ENODEV.
307  */
308 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
309 			 struct device_node *np, struct device *dev)
310 {
311 	bool mdio = true;
312 	static const struct of_device_id need_mdio_ids[] = {
313 		{ .compatible = "snps,dwc-qos-ethernet-4.10" },
314 		{ .compatible = "allwinner,sun8i-a83t-emac" },
315 		{ .compatible = "allwinner,sun8i-h3-emac" },
316 		{ .compatible = "allwinner,sun8i-v3s-emac" },
317 		{ .compatible = "allwinner,sun50i-a64-emac" },
318 		{},
319 	};
320 
321 	/* If phy-handle property is passed from DT, use it as the PHY */
322 	plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
323 	if (plat->phy_node)
324 		dev_dbg(dev, "Found phy-handle subnode\n");
325 
326 	/* If phy-handle is not specified, check if we have a fixed-phy */
327 	if (!plat->phy_node && of_phy_is_fixed_link(np)) {
328 		if ((of_phy_register_fixed_link(np) < 0))
329 			return -ENODEV;
330 
331 		dev_dbg(dev, "Found fixed-link subnode\n");
332 		plat->phy_node = of_node_get(np);
333 		mdio = false;
334 	}
335 
336 	if (of_match_node(need_mdio_ids, np)) {
337 		plat->mdio_node = of_get_child_by_name(np, "mdio");
338 	} else {
339 		/**
340 		 * If snps,dwmac-mdio is passed from DT, always register
341 		 * the MDIO
342 		 */
343 		for_each_child_of_node(np, plat->mdio_node) {
344 			if (of_device_is_compatible(plat->mdio_node,
345 						    "snps,dwmac-mdio"))
346 				break;
347 		}
348 	}
349 
350 	if (plat->mdio_node) {
351 		dev_dbg(dev, "Found MDIO subnode\n");
352 		mdio = true;
353 	}
354 
355 	if (mdio)
356 		plat->mdio_bus_data =
357 			devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
358 				     GFP_KERNEL);
359 	return 0;
360 }
361 
362 /**
363  * stmmac_probe_config_dt - parse device-tree driver parameters
364  * @pdev: platform_device structure
365  * @mac: MAC address to use
366  * Description:
367  * this function is to read the driver parameters from device-tree and
368  * set some private fields that will be used by the main at runtime.
369  */
370 struct plat_stmmacenet_data *
371 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
372 {
373 	struct device_node *np = pdev->dev.of_node;
374 	struct plat_stmmacenet_data *plat;
375 	struct stmmac_dma_cfg *dma_cfg;
376 
377 	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
378 	if (!plat)
379 		return ERR_PTR(-ENOMEM);
380 
381 	*mac = of_get_mac_address(np);
382 	plat->interface = of_get_phy_mode(np);
383 
384 	/* Get max speed of operation from device tree */
385 	if (of_property_read_u32(np, "max-speed", &plat->max_speed))
386 		plat->max_speed = -1;
387 
388 	plat->bus_id = of_alias_get_id(np, "ethernet");
389 	if (plat->bus_id < 0)
390 		plat->bus_id = 0;
391 
392 	/* Default to phy auto-detection */
393 	plat->phy_addr = -1;
394 
395 	/* "snps,phy-addr" is not a standard property. Mark it as deprecated
396 	 * and warn of its use. Remove this when phy node support is added.
397 	 */
398 	if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
399 		dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
400 
401 	/* To Configure PHY by using all device-tree supported properties */
402 	if (stmmac_dt_phy(plat, np, &pdev->dev))
403 		return ERR_PTR(-ENODEV);
404 
405 	of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
406 
407 	of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
408 
409 	plat->force_sf_dma_mode =
410 		of_property_read_bool(np, "snps,force_sf_dma_mode");
411 
412 	plat->en_tx_lpi_clockgating =
413 		of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
414 
415 	/* Set the maxmtu to a default of JUMBO_LEN in case the
416 	 * parameter is not present in the device tree.
417 	 */
418 	plat->maxmtu = JUMBO_LEN;
419 
420 	/* Set default value for multicast hash bins */
421 	plat->multicast_filter_bins = HASH_TABLE_SIZE;
422 
423 	/* Set default value for unicast filter entries */
424 	plat->unicast_filter_entries = 1;
425 
426 	/*
427 	 * Currently only the properties needed on SPEAr600
428 	 * are provided. All other properties should be added
429 	 * once needed on other platforms.
430 	 */
431 	if (of_device_is_compatible(np, "st,spear600-gmac") ||
432 		of_device_is_compatible(np, "snps,dwmac-3.50a") ||
433 		of_device_is_compatible(np, "snps,dwmac-3.70a") ||
434 		of_device_is_compatible(np, "snps,dwmac")) {
435 		/* Note that the max-frame-size parameter as defined in the
436 		 * ePAPR v1.1 spec is defined as max-frame-size, it's
437 		 * actually used as the IEEE definition of MAC Client
438 		 * data, or MTU. The ePAPR specification is confusing as
439 		 * the definition is max-frame-size, but usage examples
440 		 * are clearly MTUs
441 		 */
442 		of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
443 		of_property_read_u32(np, "snps,multicast-filter-bins",
444 				     &plat->multicast_filter_bins);
445 		of_property_read_u32(np, "snps,perfect-filter-entries",
446 				     &plat->unicast_filter_entries);
447 		plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
448 					       plat->unicast_filter_entries);
449 		plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
450 					      plat->multicast_filter_bins);
451 		plat->has_gmac = 1;
452 		plat->pmt = 1;
453 	}
454 
455 	if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
456 	    of_device_is_compatible(np, "snps,dwmac-4.10a")) {
457 		plat->has_gmac4 = 1;
458 		plat->has_gmac = 0;
459 		plat->pmt = 1;
460 		plat->tso_en = of_property_read_bool(np, "snps,tso");
461 	}
462 
463 	if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
464 		of_device_is_compatible(np, "snps,dwmac-3.710")) {
465 		plat->enh_desc = 1;
466 		plat->bugged_jumbo = 1;
467 		plat->force_sf_dma_mode = 1;
468 	}
469 
470 	dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
471 			       GFP_KERNEL);
472 	if (!dma_cfg) {
473 		stmmac_remove_config_dt(pdev, plat);
474 		return ERR_PTR(-ENOMEM);
475 	}
476 	plat->dma_cfg = dma_cfg;
477 
478 	of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
479 	if (!dma_cfg->pbl)
480 		dma_cfg->pbl = DEFAULT_DMA_PBL;
481 	of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
482 	of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
483 	dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
484 
485 	dma_cfg->aal = of_property_read_bool(np, "snps,aal");
486 	dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
487 	dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
488 
489 	plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
490 	if (plat->force_thresh_dma_mode) {
491 		plat->force_sf_dma_mode = 0;
492 		pr_warn("force_sf_dma_mode is ignored if force_thresh_dma_mode is set.");
493 	}
494 
495 	of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
496 
497 	plat->axi = stmmac_axi_setup(pdev);
498 
499 	stmmac_mtl_setup(pdev, plat);
500 
501 	/* clock setup */
502 	plat->stmmac_clk = devm_clk_get(&pdev->dev,
503 					STMMAC_RESOURCE_NAME);
504 	if (IS_ERR(plat->stmmac_clk)) {
505 		dev_warn(&pdev->dev, "Cannot get CSR clock\n");
506 		plat->stmmac_clk = NULL;
507 	}
508 	clk_prepare_enable(plat->stmmac_clk);
509 
510 	plat->pclk = devm_clk_get(&pdev->dev, "pclk");
511 	if (IS_ERR(plat->pclk)) {
512 		if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
513 			goto error_pclk_get;
514 
515 		plat->pclk = NULL;
516 	}
517 	clk_prepare_enable(plat->pclk);
518 
519 	/* Fall-back to main clock in case of no PTP ref is passed */
520 	plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
521 	if (IS_ERR(plat->clk_ptp_ref)) {
522 		plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
523 		plat->clk_ptp_ref = NULL;
524 		dev_warn(&pdev->dev, "PTP uses main clock\n");
525 	} else {
526 		plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
527 		dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
528 	}
529 
530 	plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
531 						  STMMAC_RESOURCE_NAME);
532 	if (IS_ERR(plat->stmmac_rst)) {
533 		if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
534 			goto error_hw_init;
535 
536 		dev_info(&pdev->dev, "no reset control found\n");
537 		plat->stmmac_rst = NULL;
538 	}
539 
540 	return plat;
541 
542 error_hw_init:
543 	clk_disable_unprepare(plat->pclk);
544 error_pclk_get:
545 	clk_disable_unprepare(plat->stmmac_clk);
546 
547 	return ERR_PTR(-EPROBE_DEFER);
548 }
549 
550 /**
551  * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
552  * @pdev: platform_device structure
553  * @plat: driver data platform structure
554  *
555  * Release resources claimed by stmmac_probe_config_dt().
556  */
557 void stmmac_remove_config_dt(struct platform_device *pdev,
558 			     struct plat_stmmacenet_data *plat)
559 {
560 	struct device_node *np = pdev->dev.of_node;
561 
562 	if (of_phy_is_fixed_link(np))
563 		of_phy_deregister_fixed_link(np);
564 	of_node_put(plat->phy_node);
565 	of_node_put(plat->mdio_node);
566 }
567 #else
568 struct plat_stmmacenet_data *
569 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
570 {
571 	return ERR_PTR(-EINVAL);
572 }
573 
574 void stmmac_remove_config_dt(struct platform_device *pdev,
575 			     struct plat_stmmacenet_data *plat)
576 {
577 }
578 #endif /* CONFIG_OF */
579 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
580 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
581 
582 int stmmac_get_platform_resources(struct platform_device *pdev,
583 				  struct stmmac_resources *stmmac_res)
584 {
585 	struct resource *res;
586 
587 	memset(stmmac_res, 0, sizeof(*stmmac_res));
588 
589 	/* Get IRQ information early to have an ability to ask for deferred
590 	 * probe if needed before we went too far with resource allocation.
591 	 */
592 	stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
593 	if (stmmac_res->irq < 0) {
594 		if (stmmac_res->irq != -EPROBE_DEFER) {
595 			dev_err(&pdev->dev,
596 				"MAC IRQ configuration information not found\n");
597 		}
598 		return stmmac_res->irq;
599 	}
600 
601 	/* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
602 	 * The external wake up irq can be passed through the platform code
603 	 * named as "eth_wake_irq"
604 	 *
605 	 * In case the wake up interrupt is not passed from the platform
606 	 * so the driver will continue to use the mac irq (ndev->irq)
607 	 */
608 	stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
609 	if (stmmac_res->wol_irq < 0) {
610 		if (stmmac_res->wol_irq == -EPROBE_DEFER)
611 			return -EPROBE_DEFER;
612 		stmmac_res->wol_irq = stmmac_res->irq;
613 	}
614 
615 	stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
616 	if (stmmac_res->lpi_irq == -EPROBE_DEFER)
617 		return -EPROBE_DEFER;
618 
619 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
620 	stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res);
621 
622 	return PTR_ERR_OR_ZERO(stmmac_res->addr);
623 }
624 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
625 
626 /**
627  * stmmac_pltfr_remove
628  * @pdev: platform device pointer
629  * Description: this function calls the main to free the net resources
630  * and calls the platforms hook and release the resources (e.g. mem).
631  */
632 int stmmac_pltfr_remove(struct platform_device *pdev)
633 {
634 	struct net_device *ndev = platform_get_drvdata(pdev);
635 	struct stmmac_priv *priv = netdev_priv(ndev);
636 	struct plat_stmmacenet_data *plat = priv->plat;
637 	int ret = stmmac_dvr_remove(&pdev->dev);
638 
639 	if (plat->exit)
640 		plat->exit(pdev, plat->bsp_priv);
641 
642 	stmmac_remove_config_dt(pdev, plat);
643 
644 	return ret;
645 }
646 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
647 
648 #ifdef CONFIG_PM_SLEEP
649 /**
650  * stmmac_pltfr_suspend
651  * @dev: device pointer
652  * Description: this function is invoked when suspend the driver and it direcly
653  * call the main suspend function and then, if required, on some platform, it
654  * can call an exit helper.
655  */
656 static int stmmac_pltfr_suspend(struct device *dev)
657 {
658 	int ret;
659 	struct net_device *ndev = dev_get_drvdata(dev);
660 	struct stmmac_priv *priv = netdev_priv(ndev);
661 	struct platform_device *pdev = to_platform_device(dev);
662 
663 	ret = stmmac_suspend(dev);
664 	if (priv->plat->exit)
665 		priv->plat->exit(pdev, priv->plat->bsp_priv);
666 
667 	return ret;
668 }
669 
670 /**
671  * stmmac_pltfr_resume
672  * @dev: device pointer
673  * Description: this function is invoked when resume the driver before calling
674  * the main resume function, on some platforms, it can call own init helper
675  * if required.
676  */
677 static int stmmac_pltfr_resume(struct device *dev)
678 {
679 	struct net_device *ndev = dev_get_drvdata(dev);
680 	struct stmmac_priv *priv = netdev_priv(ndev);
681 	struct platform_device *pdev = to_platform_device(dev);
682 
683 	if (priv->plat->init)
684 		priv->plat->init(pdev, priv->plat->bsp_priv);
685 
686 	return stmmac_resume(dev);
687 }
688 #endif /* CONFIG_PM_SLEEP */
689 
690 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
691 				       stmmac_pltfr_resume);
692 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
693 
694 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
695 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
696 MODULE_LICENSE("GPL");
697