1 /*******************************************************************************
2   This contains the functions to handle the platform driver.
3 
4   Copyright (C) 2007-2011  STMicroelectronics Ltd
5 
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9 
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   The full GNU General Public License is included in this distribution in
16   the file called "COPYING".
17 
18   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
19 *******************************************************************************/
20 
21 #include <linux/platform_device.h>
22 #include <linux/module.h>
23 #include <linux/io.h>
24 #include <linux/of.h>
25 #include <linux/of_net.h>
26 #include <linux/of_device.h>
27 #include <linux/of_mdio.h>
28 
29 #include "stmmac.h"
30 #include "stmmac_platform.h"
31 
32 #ifdef CONFIG_OF
33 
34 /**
35  * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
36  * @mcast_bins: Multicast filtering bins
37  * Description:
38  * this function validates the number of Multicast filtering bins specified
39  * by the configuration through the device tree. The Synopsys GMAC supports
40  * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
41  * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
42  * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
43  * invalid and will cause the filtering algorithm to use Multicast
44  * promiscuous mode.
45  */
46 static int dwmac1000_validate_mcast_bins(int mcast_bins)
47 {
48 	int x = mcast_bins;
49 
50 	switch (x) {
51 	case HASH_TABLE_SIZE:
52 	case 128:
53 	case 256:
54 		break;
55 	default:
56 		x = 0;
57 		pr_info("Hash table entries set to unexpected value %d",
58 			mcast_bins);
59 		break;
60 	}
61 	return x;
62 }
63 
64 /**
65  * dwmac1000_validate_ucast_entries - validate the Unicast address entries
66  * @ucast_entries: number of Unicast address entries
67  * Description:
68  * This function validates the number of Unicast address entries supported
69  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
70  * supports 1, 32, 64, or 128 Unicast filter entries for it's Unicast filter
71  * logic. This function validates a valid, supported configuration is
72  * selected, and defaults to 1 Unicast address if an unsupported
73  * configuration is selected.
74  */
75 static int dwmac1000_validate_ucast_entries(int ucast_entries)
76 {
77 	int x = ucast_entries;
78 
79 	switch (x) {
80 	case 1:
81 	case 32:
82 	case 64:
83 	case 128:
84 		break;
85 	default:
86 		x = 1;
87 		pr_info("Unicast table entries set to unexpected value %d\n",
88 			ucast_entries);
89 		break;
90 	}
91 	return x;
92 }
93 
94 /**
95  * stmmac_axi_setup - parse DT parameters for programming the AXI register
96  * @pdev: platform device
97  * @priv: driver private struct.
98  * Description:
99  * if required, from device-tree the AXI internal register can be tuned
100  * by using platform parameters.
101  */
102 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
103 {
104 	struct device_node *np;
105 	struct stmmac_axi *axi;
106 
107 	np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
108 	if (!np)
109 		return NULL;
110 
111 	axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
112 	if (!axi) {
113 		of_node_put(np);
114 		return ERR_PTR(-ENOMEM);
115 	}
116 
117 	axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
118 	axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
119 	axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
120 	axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
121 	axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
122 	axi->axi_rb =  of_property_read_bool(np, "snps,axi_rb");
123 
124 	if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
125 		axi->axi_wr_osr_lmt = 1;
126 	if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
127 		axi->axi_rd_osr_lmt = 1;
128 	of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
129 	of_node_put(np);
130 
131 	return axi;
132 }
133 
134 /**
135  * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
136  * @pdev: platform device
137  */
138 static void stmmac_mtl_setup(struct platform_device *pdev,
139 			     struct plat_stmmacenet_data *plat)
140 {
141 	struct device_node *q_node;
142 	struct device_node *rx_node;
143 	struct device_node *tx_node;
144 	u8 queue = 0;
145 
146 	/* For backwards-compatibility with device trees that don't have any
147 	 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
148 	 * to one RX and TX queues each.
149 	 */
150 	plat->rx_queues_to_use = 1;
151 	plat->tx_queues_to_use = 1;
152 
153 	rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
154 	if (!rx_node)
155 		return;
156 
157 	tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
158 	if (!tx_node) {
159 		of_node_put(rx_node);
160 		return;
161 	}
162 
163 	/* Processing RX queues common config */
164 	if (of_property_read_u8(rx_node, "snps,rx-queues-to-use",
165 				&plat->rx_queues_to_use))
166 		plat->rx_queues_to_use = 1;
167 
168 	if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
169 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
170 	else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
171 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
172 	else
173 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
174 
175 	/* Processing individual RX queue config */
176 	for_each_child_of_node(rx_node, q_node) {
177 		if (queue >= plat->rx_queues_to_use)
178 			break;
179 
180 		if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
181 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
182 		else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
183 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
184 		else
185 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
186 
187 		if (of_property_read_u8(q_node, "snps,map-to-dma-channel",
188 					&plat->rx_queues_cfg[queue].chan))
189 			plat->rx_queues_cfg[queue].chan = queue;
190 		/* TODO: Dynamic mapping to be included in the future */
191 
192 		if (of_property_read_u32(q_node, "snps,priority",
193 					&plat->rx_queues_cfg[queue].prio)) {
194 			plat->rx_queues_cfg[queue].prio = 0;
195 			plat->rx_queues_cfg[queue].use_prio = false;
196 		} else {
197 			plat->rx_queues_cfg[queue].use_prio = true;
198 		}
199 
200 		/* RX queue specific packet type routing */
201 		if (of_property_read_bool(q_node, "snps,route-avcp"))
202 			plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
203 		else if (of_property_read_bool(q_node, "snps,route-ptp"))
204 			plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
205 		else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
206 			plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
207 		else if (of_property_read_bool(q_node, "snps,route-up"))
208 			plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
209 		else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
210 			plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
211 		else
212 			plat->rx_queues_cfg[queue].pkt_route = 0x0;
213 
214 		queue++;
215 	}
216 
217 	/* Processing TX queues common config */
218 	if (of_property_read_u8(tx_node, "snps,tx-queues-to-use",
219 				&plat->tx_queues_to_use))
220 		plat->tx_queues_to_use = 1;
221 
222 	if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
223 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
224 	else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
225 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
226 	else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
227 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
228 	else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
229 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
230 	else
231 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
232 
233 	queue = 0;
234 
235 	/* Processing individual TX queue config */
236 	for_each_child_of_node(tx_node, q_node) {
237 		if (queue >= plat->tx_queues_to_use)
238 			break;
239 
240 		if (of_property_read_u8(q_node, "snps,weight",
241 					&plat->tx_queues_cfg[queue].weight))
242 			plat->tx_queues_cfg[queue].weight = 0x10 + queue;
243 
244 		if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
245 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
246 		} else if (of_property_read_bool(q_node,
247 						 "snps,avb-algorithm")) {
248 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
249 
250 			/* Credit Base Shaper parameters used by AVB */
251 			if (of_property_read_u32(q_node, "snps,send_slope",
252 				&plat->tx_queues_cfg[queue].send_slope))
253 				plat->tx_queues_cfg[queue].send_slope = 0x0;
254 			if (of_property_read_u32(q_node, "snps,idle_slope",
255 				&plat->tx_queues_cfg[queue].idle_slope))
256 				plat->tx_queues_cfg[queue].idle_slope = 0x0;
257 			if (of_property_read_u32(q_node, "snps,high_credit",
258 				&plat->tx_queues_cfg[queue].high_credit))
259 				plat->tx_queues_cfg[queue].high_credit = 0x0;
260 			if (of_property_read_u32(q_node, "snps,low_credit",
261 				&plat->tx_queues_cfg[queue].low_credit))
262 				plat->tx_queues_cfg[queue].low_credit = 0x0;
263 		} else {
264 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
265 		}
266 
267 		if (of_property_read_u32(q_node, "snps,priority",
268 					&plat->tx_queues_cfg[queue].prio)) {
269 			plat->tx_queues_cfg[queue].prio = 0;
270 			plat->tx_queues_cfg[queue].use_prio = false;
271 		} else {
272 			plat->tx_queues_cfg[queue].use_prio = true;
273 		}
274 
275 		queue++;
276 	}
277 
278 	of_node_put(rx_node);
279 	of_node_put(tx_node);
280 	of_node_put(q_node);
281 }
282 
283 /**
284  * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
285  * @plat: driver data platform structure
286  * @np: device tree node
287  * @dev: device pointer
288  * Description:
289  * The mdio bus will be allocated in case of a phy transceiver is on board;
290  * it will be NULL if the fixed-link is configured.
291  * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
292  * in any case (for DSA, mdio must be registered even if fixed-link).
293  * The table below sums the supported configurations:
294  *	-------------------------------
295  *	snps,phy-addr	|     Y
296  *	-------------------------------
297  *	phy-handle	|     Y
298  *	-------------------------------
299  *	fixed-link	|     N
300  *	-------------------------------
301  *	snps,dwmac-mdio	|
302  *	  even if	|     Y
303  *	fixed-link	|
304  *	-------------------------------
305  *
306  * It returns 0 in case of success otherwise -ENODEV.
307  */
308 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
309 			 struct device_node *np, struct device *dev)
310 {
311 	bool mdio = true;
312 	static const struct of_device_id need_mdio_ids[] = {
313 		{ .compatible = "snps,dwc-qos-ethernet-4.10" },
314 		{ .compatible = "allwinner,sun8i-a83t-emac" },
315 		{ .compatible = "allwinner,sun8i-h3-emac" },
316 		{ .compatible = "allwinner,sun8i-v3s-emac" },
317 		{ .compatible = "allwinner,sun50i-a64-emac" },
318 	};
319 
320 	/* If phy-handle property is passed from DT, use it as the PHY */
321 	plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
322 	if (plat->phy_node)
323 		dev_dbg(dev, "Found phy-handle subnode\n");
324 
325 	/* If phy-handle is not specified, check if we have a fixed-phy */
326 	if (!plat->phy_node && of_phy_is_fixed_link(np)) {
327 		if ((of_phy_register_fixed_link(np) < 0))
328 			return -ENODEV;
329 
330 		dev_dbg(dev, "Found fixed-link subnode\n");
331 		plat->phy_node = of_node_get(np);
332 		mdio = false;
333 	}
334 
335 	if (of_match_node(need_mdio_ids, np)) {
336 		plat->mdio_node = of_get_child_by_name(np, "mdio");
337 	} else {
338 		/**
339 		 * If snps,dwmac-mdio is passed from DT, always register
340 		 * the MDIO
341 		 */
342 		for_each_child_of_node(np, plat->mdio_node) {
343 			if (of_device_is_compatible(plat->mdio_node,
344 						    "snps,dwmac-mdio"))
345 				break;
346 		}
347 	}
348 
349 	if (plat->mdio_node) {
350 		dev_dbg(dev, "Found MDIO subnode\n");
351 		mdio = true;
352 	}
353 
354 	if (mdio)
355 		plat->mdio_bus_data =
356 			devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
357 				     GFP_KERNEL);
358 	return 0;
359 }
360 
361 /**
362  * stmmac_probe_config_dt - parse device-tree driver parameters
363  * @pdev: platform_device structure
364  * @mac: MAC address to use
365  * Description:
366  * this function is to read the driver parameters from device-tree and
367  * set some private fields that will be used by the main at runtime.
368  */
369 struct plat_stmmacenet_data *
370 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
371 {
372 	struct device_node *np = pdev->dev.of_node;
373 	struct plat_stmmacenet_data *plat;
374 	struct stmmac_dma_cfg *dma_cfg;
375 
376 	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
377 	if (!plat)
378 		return ERR_PTR(-ENOMEM);
379 
380 	*mac = of_get_mac_address(np);
381 	plat->interface = of_get_phy_mode(np);
382 
383 	/* Get max speed of operation from device tree */
384 	if (of_property_read_u32(np, "max-speed", &plat->max_speed))
385 		plat->max_speed = -1;
386 
387 	plat->bus_id = of_alias_get_id(np, "ethernet");
388 	if (plat->bus_id < 0)
389 		plat->bus_id = 0;
390 
391 	/* Default to phy auto-detection */
392 	plat->phy_addr = -1;
393 
394 	/* "snps,phy-addr" is not a standard property. Mark it as deprecated
395 	 * and warn of its use. Remove this when phy node support is added.
396 	 */
397 	if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
398 		dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
399 
400 	/* To Configure PHY by using all device-tree supported properties */
401 	if (stmmac_dt_phy(plat, np, &pdev->dev))
402 		return ERR_PTR(-ENODEV);
403 
404 	of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
405 
406 	of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
407 
408 	plat->force_sf_dma_mode =
409 		of_property_read_bool(np, "snps,force_sf_dma_mode");
410 
411 	plat->en_tx_lpi_clockgating =
412 		of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
413 
414 	/* Set the maxmtu to a default of JUMBO_LEN in case the
415 	 * parameter is not present in the device tree.
416 	 */
417 	plat->maxmtu = JUMBO_LEN;
418 
419 	/* Set default value for multicast hash bins */
420 	plat->multicast_filter_bins = HASH_TABLE_SIZE;
421 
422 	/* Set default value for unicast filter entries */
423 	plat->unicast_filter_entries = 1;
424 
425 	/*
426 	 * Currently only the properties needed on SPEAr600
427 	 * are provided. All other properties should be added
428 	 * once needed on other platforms.
429 	 */
430 	if (of_device_is_compatible(np, "st,spear600-gmac") ||
431 		of_device_is_compatible(np, "snps,dwmac-3.50a") ||
432 		of_device_is_compatible(np, "snps,dwmac-3.70a") ||
433 		of_device_is_compatible(np, "snps,dwmac")) {
434 		/* Note that the max-frame-size parameter as defined in the
435 		 * ePAPR v1.1 spec is defined as max-frame-size, it's
436 		 * actually used as the IEEE definition of MAC Client
437 		 * data, or MTU. The ePAPR specification is confusing as
438 		 * the definition is max-frame-size, but usage examples
439 		 * are clearly MTUs
440 		 */
441 		of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
442 		of_property_read_u32(np, "snps,multicast-filter-bins",
443 				     &plat->multicast_filter_bins);
444 		of_property_read_u32(np, "snps,perfect-filter-entries",
445 				     &plat->unicast_filter_entries);
446 		plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
447 					       plat->unicast_filter_entries);
448 		plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
449 					      plat->multicast_filter_bins);
450 		plat->has_gmac = 1;
451 		plat->pmt = 1;
452 	}
453 
454 	if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
455 	    of_device_is_compatible(np, "snps,dwmac-4.10a")) {
456 		plat->has_gmac4 = 1;
457 		plat->has_gmac = 0;
458 		plat->pmt = 1;
459 		plat->tso_en = of_property_read_bool(np, "snps,tso");
460 	}
461 
462 	if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
463 		of_device_is_compatible(np, "snps,dwmac-3.710")) {
464 		plat->enh_desc = 1;
465 		plat->bugged_jumbo = 1;
466 		plat->force_sf_dma_mode = 1;
467 	}
468 
469 	dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
470 			       GFP_KERNEL);
471 	if (!dma_cfg) {
472 		stmmac_remove_config_dt(pdev, plat);
473 		return ERR_PTR(-ENOMEM);
474 	}
475 	plat->dma_cfg = dma_cfg;
476 
477 	of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
478 	if (!dma_cfg->pbl)
479 		dma_cfg->pbl = DEFAULT_DMA_PBL;
480 	of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
481 	of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
482 	dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
483 
484 	dma_cfg->aal = of_property_read_bool(np, "snps,aal");
485 	dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
486 	dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
487 
488 	plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
489 	if (plat->force_thresh_dma_mode) {
490 		plat->force_sf_dma_mode = 0;
491 		pr_warn("force_sf_dma_mode is ignored if force_thresh_dma_mode is set.");
492 	}
493 
494 	of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
495 
496 	plat->axi = stmmac_axi_setup(pdev);
497 
498 	stmmac_mtl_setup(pdev, plat);
499 
500 	/* clock setup */
501 	plat->stmmac_clk = devm_clk_get(&pdev->dev,
502 					STMMAC_RESOURCE_NAME);
503 	if (IS_ERR(plat->stmmac_clk)) {
504 		dev_warn(&pdev->dev, "Cannot get CSR clock\n");
505 		plat->stmmac_clk = NULL;
506 	}
507 	clk_prepare_enable(plat->stmmac_clk);
508 
509 	plat->pclk = devm_clk_get(&pdev->dev, "pclk");
510 	if (IS_ERR(plat->pclk)) {
511 		if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
512 			goto error_pclk_get;
513 
514 		plat->pclk = NULL;
515 	}
516 	clk_prepare_enable(plat->pclk);
517 
518 	/* Fall-back to main clock in case of no PTP ref is passed */
519 	plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
520 	if (IS_ERR(plat->clk_ptp_ref)) {
521 		plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
522 		plat->clk_ptp_ref = NULL;
523 		dev_warn(&pdev->dev, "PTP uses main clock\n");
524 	} else {
525 		plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
526 		dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
527 	}
528 
529 	plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
530 						  STMMAC_RESOURCE_NAME);
531 	if (IS_ERR(plat->stmmac_rst)) {
532 		if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
533 			goto error_hw_init;
534 
535 		dev_info(&pdev->dev, "no reset control found\n");
536 		plat->stmmac_rst = NULL;
537 	}
538 
539 	return plat;
540 
541 error_hw_init:
542 	clk_disable_unprepare(plat->pclk);
543 error_pclk_get:
544 	clk_disable_unprepare(plat->stmmac_clk);
545 
546 	return ERR_PTR(-EPROBE_DEFER);
547 }
548 
549 /**
550  * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
551  * @pdev: platform_device structure
552  * @plat: driver data platform structure
553  *
554  * Release resources claimed by stmmac_probe_config_dt().
555  */
556 void stmmac_remove_config_dt(struct platform_device *pdev,
557 			     struct plat_stmmacenet_data *plat)
558 {
559 	struct device_node *np = pdev->dev.of_node;
560 
561 	if (of_phy_is_fixed_link(np))
562 		of_phy_deregister_fixed_link(np);
563 	of_node_put(plat->phy_node);
564 	of_node_put(plat->mdio_node);
565 }
566 #else
567 struct plat_stmmacenet_data *
568 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
569 {
570 	return ERR_PTR(-EINVAL);
571 }
572 
573 void stmmac_remove_config_dt(struct platform_device *pdev,
574 			     struct plat_stmmacenet_data *plat)
575 {
576 }
577 #endif /* CONFIG_OF */
578 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
579 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
580 
581 int stmmac_get_platform_resources(struct platform_device *pdev,
582 				  struct stmmac_resources *stmmac_res)
583 {
584 	struct resource *res;
585 
586 	memset(stmmac_res, 0, sizeof(*stmmac_res));
587 
588 	/* Get IRQ information early to have an ability to ask for deferred
589 	 * probe if needed before we went too far with resource allocation.
590 	 */
591 	stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
592 	if (stmmac_res->irq < 0) {
593 		if (stmmac_res->irq != -EPROBE_DEFER) {
594 			dev_err(&pdev->dev,
595 				"MAC IRQ configuration information not found\n");
596 		}
597 		return stmmac_res->irq;
598 	}
599 
600 	/* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
601 	 * The external wake up irq can be passed through the platform code
602 	 * named as "eth_wake_irq"
603 	 *
604 	 * In case the wake up interrupt is not passed from the platform
605 	 * so the driver will continue to use the mac irq (ndev->irq)
606 	 */
607 	stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
608 	if (stmmac_res->wol_irq < 0) {
609 		if (stmmac_res->wol_irq == -EPROBE_DEFER)
610 			return -EPROBE_DEFER;
611 		stmmac_res->wol_irq = stmmac_res->irq;
612 	}
613 
614 	stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
615 	if (stmmac_res->lpi_irq == -EPROBE_DEFER)
616 		return -EPROBE_DEFER;
617 
618 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
619 	stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res);
620 
621 	return PTR_ERR_OR_ZERO(stmmac_res->addr);
622 }
623 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
624 
625 /**
626  * stmmac_pltfr_remove
627  * @pdev: platform device pointer
628  * Description: this function calls the main to free the net resources
629  * and calls the platforms hook and release the resources (e.g. mem).
630  */
631 int stmmac_pltfr_remove(struct platform_device *pdev)
632 {
633 	struct net_device *ndev = platform_get_drvdata(pdev);
634 	struct stmmac_priv *priv = netdev_priv(ndev);
635 	struct plat_stmmacenet_data *plat = priv->plat;
636 	int ret = stmmac_dvr_remove(&pdev->dev);
637 
638 	if (plat->exit)
639 		plat->exit(pdev, plat->bsp_priv);
640 
641 	stmmac_remove_config_dt(pdev, plat);
642 
643 	return ret;
644 }
645 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
646 
647 #ifdef CONFIG_PM_SLEEP
648 /**
649  * stmmac_pltfr_suspend
650  * @dev: device pointer
651  * Description: this function is invoked when suspend the driver and it direcly
652  * call the main suspend function and then, if required, on some platform, it
653  * can call an exit helper.
654  */
655 static int stmmac_pltfr_suspend(struct device *dev)
656 {
657 	int ret;
658 	struct net_device *ndev = dev_get_drvdata(dev);
659 	struct stmmac_priv *priv = netdev_priv(ndev);
660 	struct platform_device *pdev = to_platform_device(dev);
661 
662 	ret = stmmac_suspend(dev);
663 	if (priv->plat->exit)
664 		priv->plat->exit(pdev, priv->plat->bsp_priv);
665 
666 	return ret;
667 }
668 
669 /**
670  * stmmac_pltfr_resume
671  * @dev: device pointer
672  * Description: this function is invoked when resume the driver before calling
673  * the main resume function, on some platforms, it can call own init helper
674  * if required.
675  */
676 static int stmmac_pltfr_resume(struct device *dev)
677 {
678 	struct net_device *ndev = dev_get_drvdata(dev);
679 	struct stmmac_priv *priv = netdev_priv(ndev);
680 	struct platform_device *pdev = to_platform_device(dev);
681 
682 	if (priv->plat->init)
683 		priv->plat->init(pdev, priv->plat->bsp_priv);
684 
685 	return stmmac_resume(dev);
686 }
687 #endif /* CONFIG_PM_SLEEP */
688 
689 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
690 				       stmmac_pltfr_resume);
691 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
692 
693 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
694 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
695 MODULE_LICENSE("GPL");
696