1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3   This contains the functions to handle the platform driver.
4 
5   Copyright (C) 2007-2011  STMicroelectronics Ltd
6 
7 
8   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
10 
11 #include <linux/platform_device.h>
12 #include <linux/module.h>
13 #include <linux/io.h>
14 #include <linux/of.h>
15 #include <linux/of_net.h>
16 #include <linux/of_device.h>
17 #include <linux/of_mdio.h>
18 
19 #include "stmmac.h"
20 #include "stmmac_platform.h"
21 
22 #ifdef CONFIG_OF
23 
24 /**
25  * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
26  * @dev: struct device of the platform device
27  * @mcast_bins: Multicast filtering bins
28  * Description:
29  * this function validates the number of Multicast filtering bins specified
30  * by the configuration through the device tree. The Synopsys GMAC supports
31  * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
32  * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
33  * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
34  * invalid and will cause the filtering algorithm to use Multicast
35  * promiscuous mode.
36  */
37 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
38 {
39 	int x = mcast_bins;
40 
41 	switch (x) {
42 	case HASH_TABLE_SIZE:
43 	case 128:
44 	case 256:
45 		break;
46 	default:
47 		x = 0;
48 		dev_info(dev, "Hash table entries set to unexpected value %d\n",
49 			 mcast_bins);
50 		break;
51 	}
52 	return x;
53 }
54 
55 /**
56  * dwmac1000_validate_ucast_entries - validate the Unicast address entries
57  * @dev: struct device of the platform device
58  * @ucast_entries: number of Unicast address entries
59  * Description:
60  * This function validates the number of Unicast address entries supported
61  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
62  * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
63  * logic. This function validates a valid, supported configuration is
64  * selected, and defaults to 1 Unicast address if an unsupported
65  * configuration is selected.
66  */
67 static int dwmac1000_validate_ucast_entries(struct device *dev,
68 					    int ucast_entries)
69 {
70 	int x = ucast_entries;
71 
72 	switch (x) {
73 	case 1 ... 32:
74 	case 64:
75 	case 128:
76 		break;
77 	default:
78 		x = 1;
79 		dev_info(dev, "Unicast table entries set to unexpected value %d\n",
80 			 ucast_entries);
81 		break;
82 	}
83 	return x;
84 }
85 
86 /**
87  * stmmac_axi_setup - parse DT parameters for programming the AXI register
88  * @pdev: platform device
89  * Description:
90  * if required, from device-tree the AXI internal register can be tuned
91  * by using platform parameters.
92  */
93 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
94 {
95 	struct device_node *np;
96 	struct stmmac_axi *axi;
97 
98 	np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
99 	if (!np)
100 		return NULL;
101 
102 	axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
103 	if (!axi) {
104 		of_node_put(np);
105 		return ERR_PTR(-ENOMEM);
106 	}
107 
108 	axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
109 	axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
110 	axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
111 	axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
112 	axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
113 	axi->axi_rb =  of_property_read_bool(np, "snps,axi_rb");
114 
115 	if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
116 		axi->axi_wr_osr_lmt = 1;
117 	if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
118 		axi->axi_rd_osr_lmt = 1;
119 	of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
120 	of_node_put(np);
121 
122 	return axi;
123 }
124 
125 /**
126  * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
127  * @pdev: platform device
128  */
129 static int stmmac_mtl_setup(struct platform_device *pdev,
130 			    struct plat_stmmacenet_data *plat)
131 {
132 	struct device_node *q_node;
133 	struct device_node *rx_node;
134 	struct device_node *tx_node;
135 	u8 queue = 0;
136 	int ret = 0;
137 
138 	/* For backwards-compatibility with device trees that don't have any
139 	 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
140 	 * to one RX and TX queues each.
141 	 */
142 	plat->rx_queues_to_use = 1;
143 	plat->tx_queues_to_use = 1;
144 
145 	/* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
146 	 * to always set this, otherwise Queue will be classified as AVB
147 	 * (because MTL_QUEUE_AVB = 0).
148 	 */
149 	plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
150 	plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
151 
152 	rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
153 	if (!rx_node)
154 		return ret;
155 
156 	tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
157 	if (!tx_node) {
158 		of_node_put(rx_node);
159 		return ret;
160 	}
161 
162 	/* Processing RX queues common config */
163 	if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
164 				 &plat->rx_queues_to_use))
165 		plat->rx_queues_to_use = 1;
166 
167 	if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
168 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
169 	else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
170 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
171 	else
172 		plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
173 
174 	/* Processing individual RX queue config */
175 	for_each_child_of_node(rx_node, q_node) {
176 		if (queue >= plat->rx_queues_to_use)
177 			break;
178 
179 		if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
180 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
181 		else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
182 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
183 		else
184 			plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
185 
186 		if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
187 					 &plat->rx_queues_cfg[queue].chan))
188 			plat->rx_queues_cfg[queue].chan = queue;
189 		/* TODO: Dynamic mapping to be included in the future */
190 
191 		if (of_property_read_u32(q_node, "snps,priority",
192 					&plat->rx_queues_cfg[queue].prio)) {
193 			plat->rx_queues_cfg[queue].prio = 0;
194 			plat->rx_queues_cfg[queue].use_prio = false;
195 		} else {
196 			plat->rx_queues_cfg[queue].use_prio = true;
197 		}
198 
199 		/* RX queue specific packet type routing */
200 		if (of_property_read_bool(q_node, "snps,route-avcp"))
201 			plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
202 		else if (of_property_read_bool(q_node, "snps,route-ptp"))
203 			plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
204 		else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
205 			plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
206 		else if (of_property_read_bool(q_node, "snps,route-up"))
207 			plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
208 		else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
209 			plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
210 		else
211 			plat->rx_queues_cfg[queue].pkt_route = 0x0;
212 
213 		queue++;
214 	}
215 	if (queue != plat->rx_queues_to_use) {
216 		ret = -EINVAL;
217 		dev_err(&pdev->dev, "Not all RX queues were configured\n");
218 		goto out;
219 	}
220 
221 	/* Processing TX queues common config */
222 	if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
223 				 &plat->tx_queues_to_use))
224 		plat->tx_queues_to_use = 1;
225 
226 	if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
227 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
228 	else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
229 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
230 	else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
231 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
232 	else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
233 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
234 	else
235 		plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
236 
237 	queue = 0;
238 
239 	/* Processing individual TX queue config */
240 	for_each_child_of_node(tx_node, q_node) {
241 		if (queue >= plat->tx_queues_to_use)
242 			break;
243 
244 		if (of_property_read_u32(q_node, "snps,weight",
245 					 &plat->tx_queues_cfg[queue].weight))
246 			plat->tx_queues_cfg[queue].weight = 0x10 + queue;
247 
248 		if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
249 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
250 		} else if (of_property_read_bool(q_node,
251 						 "snps,avb-algorithm")) {
252 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
253 
254 			/* Credit Base Shaper parameters used by AVB */
255 			if (of_property_read_u32(q_node, "snps,send_slope",
256 				&plat->tx_queues_cfg[queue].send_slope))
257 				plat->tx_queues_cfg[queue].send_slope = 0x0;
258 			if (of_property_read_u32(q_node, "snps,idle_slope",
259 				&plat->tx_queues_cfg[queue].idle_slope))
260 				plat->tx_queues_cfg[queue].idle_slope = 0x0;
261 			if (of_property_read_u32(q_node, "snps,high_credit",
262 				&plat->tx_queues_cfg[queue].high_credit))
263 				plat->tx_queues_cfg[queue].high_credit = 0x0;
264 			if (of_property_read_u32(q_node, "snps,low_credit",
265 				&plat->tx_queues_cfg[queue].low_credit))
266 				plat->tx_queues_cfg[queue].low_credit = 0x0;
267 		} else {
268 			plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
269 		}
270 
271 		if (of_property_read_u32(q_node, "snps,priority",
272 					&plat->tx_queues_cfg[queue].prio)) {
273 			plat->tx_queues_cfg[queue].prio = 0;
274 			plat->tx_queues_cfg[queue].use_prio = false;
275 		} else {
276 			plat->tx_queues_cfg[queue].use_prio = true;
277 		}
278 
279 		queue++;
280 	}
281 	if (queue != plat->tx_queues_to_use) {
282 		ret = -EINVAL;
283 		dev_err(&pdev->dev, "Not all TX queues were configured\n");
284 		goto out;
285 	}
286 
287 out:
288 	of_node_put(rx_node);
289 	of_node_put(tx_node);
290 	of_node_put(q_node);
291 
292 	return ret;
293 }
294 
295 /**
296  * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
297  * @plat: driver data platform structure
298  * @np: device tree node
299  * @dev: device pointer
300  * Description:
301  * The mdio bus will be allocated in case of a phy transceiver is on board;
302  * it will be NULL if the fixed-link is configured.
303  * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
304  * in any case (for DSA, mdio must be registered even if fixed-link).
305  * The table below sums the supported configurations:
306  *	-------------------------------
307  *	snps,phy-addr	|     Y
308  *	-------------------------------
309  *	phy-handle	|     Y
310  *	-------------------------------
311  *	fixed-link	|     N
312  *	-------------------------------
313  *	snps,dwmac-mdio	|
314  *	  even if	|     Y
315  *	fixed-link	|
316  *	-------------------------------
317  *
318  * It returns 0 in case of success otherwise -ENODEV.
319  */
320 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
321 			 struct device_node *np, struct device *dev)
322 {
323 	bool mdio = false;
324 	static const struct of_device_id need_mdio_ids[] = {
325 		{ .compatible = "snps,dwc-qos-ethernet-4.10" },
326 		{},
327 	};
328 
329 	if (of_match_node(need_mdio_ids, np)) {
330 		plat->mdio_node = of_get_child_by_name(np, "mdio");
331 	} else {
332 		/**
333 		 * If snps,dwmac-mdio is passed from DT, always register
334 		 * the MDIO
335 		 */
336 		for_each_child_of_node(np, plat->mdio_node) {
337 			if (of_device_is_compatible(plat->mdio_node,
338 						    "snps,dwmac-mdio"))
339 				break;
340 		}
341 	}
342 
343 	if (plat->mdio_node) {
344 		dev_dbg(dev, "Found MDIO subnode\n");
345 		mdio = true;
346 	}
347 
348 	if (mdio) {
349 		plat->mdio_bus_data =
350 			devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
351 				     GFP_KERNEL);
352 		if (!plat->mdio_bus_data)
353 			return -ENOMEM;
354 
355 		plat->mdio_bus_data->needs_reset = true;
356 	}
357 
358 	return 0;
359 }
360 
361 /**
362  * stmmac_of_get_mac_mode - retrieves the interface of the MAC
363  * @np - device-tree node
364  * Description:
365  * Similar to `of_get_phy_mode()`, this function will retrieve (from
366  * the device-tree) the interface mode on the MAC side. This assumes
367  * that there is mode converter in-between the MAC & PHY
368  * (e.g. GMII-to-RGMII).
369  */
370 static int stmmac_of_get_mac_mode(struct device_node *np)
371 {
372 	const char *pm;
373 	int err, i;
374 
375 	err = of_property_read_string(np, "mac-mode", &pm);
376 	if (err < 0)
377 		return err;
378 
379 	for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
380 		if (!strcasecmp(pm, phy_modes(i)))
381 			return i;
382 	}
383 
384 	return -ENODEV;
385 }
386 
387 /**
388  * stmmac_probe_config_dt - parse device-tree driver parameters
389  * @pdev: platform_device structure
390  * @mac: MAC address to use
391  * Description:
392  * this function is to read the driver parameters from device-tree and
393  * set some private fields that will be used by the main at runtime.
394  */
395 struct plat_stmmacenet_data *
396 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
397 {
398 	struct device_node *np = pdev->dev.of_node;
399 	struct plat_stmmacenet_data *plat;
400 	struct stmmac_dma_cfg *dma_cfg;
401 	int rc;
402 
403 	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
404 	if (!plat)
405 		return ERR_PTR(-ENOMEM);
406 
407 	*mac = of_get_mac_address(np);
408 	if (IS_ERR(*mac)) {
409 		if (PTR_ERR(*mac) == -EPROBE_DEFER)
410 			return ERR_CAST(*mac);
411 
412 		*mac = NULL;
413 	}
414 
415 	rc = of_get_phy_mode(np, &plat->phy_interface);
416 	if (rc)
417 		return ERR_PTR(rc);
418 
419 	plat->interface = stmmac_of_get_mac_mode(np);
420 	if (plat->interface < 0)
421 		plat->interface = plat->phy_interface;
422 
423 	/* Some wrapper drivers still rely on phy_node. Let's save it while
424 	 * they are not converted to phylink. */
425 	plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
426 
427 	/* PHYLINK automatically parses the phy-handle property */
428 	plat->phylink_node = np;
429 
430 	/* Get max speed of operation from device tree */
431 	if (of_property_read_u32(np, "max-speed", &plat->max_speed))
432 		plat->max_speed = -1;
433 
434 	plat->bus_id = of_alias_get_id(np, "ethernet");
435 	if (plat->bus_id < 0)
436 		plat->bus_id = 0;
437 
438 	/* Default to phy auto-detection */
439 	plat->phy_addr = -1;
440 
441 	/* Default to get clk_csr from stmmac_clk_crs_set(),
442 	 * or get clk_csr from device tree.
443 	 */
444 	plat->clk_csr = -1;
445 	of_property_read_u32(np, "clk_csr", &plat->clk_csr);
446 
447 	/* "snps,phy-addr" is not a standard property. Mark it as deprecated
448 	 * and warn of its use. Remove this when phy node support is added.
449 	 */
450 	if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
451 		dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
452 
453 	/* To Configure PHY by using all device-tree supported properties */
454 	rc = stmmac_dt_phy(plat, np, &pdev->dev);
455 	if (rc)
456 		return ERR_PTR(rc);
457 
458 	of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
459 
460 	of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
461 
462 	plat->force_sf_dma_mode =
463 		of_property_read_bool(np, "snps,force_sf_dma_mode");
464 
465 	plat->en_tx_lpi_clockgating =
466 		of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
467 
468 	/* Set the maxmtu to a default of JUMBO_LEN in case the
469 	 * parameter is not present in the device tree.
470 	 */
471 	plat->maxmtu = JUMBO_LEN;
472 
473 	/* Set default value for multicast hash bins */
474 	plat->multicast_filter_bins = HASH_TABLE_SIZE;
475 
476 	/* Set default value for unicast filter entries */
477 	plat->unicast_filter_entries = 1;
478 
479 	/*
480 	 * Currently only the properties needed on SPEAr600
481 	 * are provided. All other properties should be added
482 	 * once needed on other platforms.
483 	 */
484 	if (of_device_is_compatible(np, "st,spear600-gmac") ||
485 		of_device_is_compatible(np, "snps,dwmac-3.50a") ||
486 		of_device_is_compatible(np, "snps,dwmac-3.70a") ||
487 		of_device_is_compatible(np, "snps,dwmac")) {
488 		/* Note that the max-frame-size parameter as defined in the
489 		 * ePAPR v1.1 spec is defined as max-frame-size, it's
490 		 * actually used as the IEEE definition of MAC Client
491 		 * data, or MTU. The ePAPR specification is confusing as
492 		 * the definition is max-frame-size, but usage examples
493 		 * are clearly MTUs
494 		 */
495 		of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
496 		of_property_read_u32(np, "snps,multicast-filter-bins",
497 				     &plat->multicast_filter_bins);
498 		of_property_read_u32(np, "snps,perfect-filter-entries",
499 				     &plat->unicast_filter_entries);
500 		plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
501 				&pdev->dev, plat->unicast_filter_entries);
502 		plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
503 				&pdev->dev, plat->multicast_filter_bins);
504 		plat->has_gmac = 1;
505 		plat->pmt = 1;
506 	}
507 
508 	if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
509 	    of_device_is_compatible(np, "snps,dwmac-4.10a") ||
510 	    of_device_is_compatible(np, "snps,dwmac-4.20a")) {
511 		plat->has_gmac4 = 1;
512 		plat->has_gmac = 0;
513 		plat->pmt = 1;
514 		plat->tso_en = of_property_read_bool(np, "snps,tso");
515 	}
516 
517 	if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
518 		of_device_is_compatible(np, "snps,dwmac-3.710")) {
519 		plat->enh_desc = 1;
520 		plat->bugged_jumbo = 1;
521 		plat->force_sf_dma_mode = 1;
522 	}
523 
524 	if (of_device_is_compatible(np, "snps,dwxgmac")) {
525 		plat->has_xgmac = 1;
526 		plat->pmt = 1;
527 		plat->tso_en = of_property_read_bool(np, "snps,tso");
528 	}
529 
530 	dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
531 			       GFP_KERNEL);
532 	if (!dma_cfg) {
533 		stmmac_remove_config_dt(pdev, plat);
534 		return ERR_PTR(-ENOMEM);
535 	}
536 	plat->dma_cfg = dma_cfg;
537 
538 	of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
539 	if (!dma_cfg->pbl)
540 		dma_cfg->pbl = DEFAULT_DMA_PBL;
541 	of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
542 	of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
543 	dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
544 
545 	dma_cfg->aal = of_property_read_bool(np, "snps,aal");
546 	dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
547 	dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
548 
549 	plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
550 	if (plat->force_thresh_dma_mode) {
551 		plat->force_sf_dma_mode = 0;
552 		dev_warn(&pdev->dev,
553 			 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
554 	}
555 
556 	of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
557 
558 	plat->axi = stmmac_axi_setup(pdev);
559 
560 	rc = stmmac_mtl_setup(pdev, plat);
561 	if (rc) {
562 		stmmac_remove_config_dt(pdev, plat);
563 		return ERR_PTR(rc);
564 	}
565 
566 	/* clock setup */
567 	if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
568 		plat->stmmac_clk = devm_clk_get(&pdev->dev,
569 						STMMAC_RESOURCE_NAME);
570 		if (IS_ERR(plat->stmmac_clk)) {
571 			dev_warn(&pdev->dev, "Cannot get CSR clock\n");
572 			plat->stmmac_clk = NULL;
573 		}
574 		clk_prepare_enable(plat->stmmac_clk);
575 	}
576 
577 	plat->pclk = devm_clk_get(&pdev->dev, "pclk");
578 	if (IS_ERR(plat->pclk)) {
579 		if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
580 			goto error_pclk_get;
581 
582 		plat->pclk = NULL;
583 	}
584 	clk_prepare_enable(plat->pclk);
585 
586 	/* Fall-back to main clock in case of no PTP ref is passed */
587 	plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
588 	if (IS_ERR(plat->clk_ptp_ref)) {
589 		plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
590 		plat->clk_ptp_ref = NULL;
591 		dev_warn(&pdev->dev, "PTP uses main clock\n");
592 	} else {
593 		plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
594 		dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
595 	}
596 
597 	plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
598 						  STMMAC_RESOURCE_NAME);
599 	if (IS_ERR(plat->stmmac_rst)) {
600 		if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
601 			goto error_hw_init;
602 
603 		dev_info(&pdev->dev, "no reset control found\n");
604 		plat->stmmac_rst = NULL;
605 	}
606 
607 	return plat;
608 
609 error_hw_init:
610 	clk_disable_unprepare(plat->pclk);
611 error_pclk_get:
612 	clk_disable_unprepare(plat->stmmac_clk);
613 
614 	return ERR_PTR(-EPROBE_DEFER);
615 }
616 
617 /**
618  * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
619  * @pdev: platform_device structure
620  * @plat: driver data platform structure
621  *
622  * Release resources claimed by stmmac_probe_config_dt().
623  */
624 void stmmac_remove_config_dt(struct platform_device *pdev,
625 			     struct plat_stmmacenet_data *plat)
626 {
627 	of_node_put(plat->phy_node);
628 	of_node_put(plat->mdio_node);
629 }
630 #else
631 struct plat_stmmacenet_data *
632 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
633 {
634 	return ERR_PTR(-EINVAL);
635 }
636 
637 void stmmac_remove_config_dt(struct platform_device *pdev,
638 			     struct plat_stmmacenet_data *plat)
639 {
640 }
641 #endif /* CONFIG_OF */
642 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
643 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
644 
645 int stmmac_get_platform_resources(struct platform_device *pdev,
646 				  struct stmmac_resources *stmmac_res)
647 {
648 	struct resource *res;
649 
650 	memset(stmmac_res, 0, sizeof(*stmmac_res));
651 
652 	/* Get IRQ information early to have an ability to ask for deferred
653 	 * probe if needed before we went too far with resource allocation.
654 	 */
655 	stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
656 	if (stmmac_res->irq < 0)
657 		return stmmac_res->irq;
658 
659 	/* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
660 	 * The external wake up irq can be passed through the platform code
661 	 * named as "eth_wake_irq"
662 	 *
663 	 * In case the wake up interrupt is not passed from the platform
664 	 * so the driver will continue to use the mac irq (ndev->irq)
665 	 */
666 	stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
667 	if (stmmac_res->wol_irq < 0) {
668 		if (stmmac_res->wol_irq == -EPROBE_DEFER)
669 			return -EPROBE_DEFER;
670 		stmmac_res->wol_irq = stmmac_res->irq;
671 	}
672 
673 	stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
674 	if (stmmac_res->lpi_irq == -EPROBE_DEFER)
675 		return -EPROBE_DEFER;
676 
677 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
678 	stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res);
679 
680 	return PTR_ERR_OR_ZERO(stmmac_res->addr);
681 }
682 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
683 
684 /**
685  * stmmac_pltfr_remove
686  * @pdev: platform device pointer
687  * Description: this function calls the main to free the net resources
688  * and calls the platforms hook and release the resources (e.g. mem).
689  */
690 int stmmac_pltfr_remove(struct platform_device *pdev)
691 {
692 	struct net_device *ndev = platform_get_drvdata(pdev);
693 	struct stmmac_priv *priv = netdev_priv(ndev);
694 	struct plat_stmmacenet_data *plat = priv->plat;
695 	int ret = stmmac_dvr_remove(&pdev->dev);
696 
697 	if (plat->exit)
698 		plat->exit(pdev, plat->bsp_priv);
699 
700 	stmmac_remove_config_dt(pdev, plat);
701 
702 	return ret;
703 }
704 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
705 
706 #ifdef CONFIG_PM_SLEEP
707 /**
708  * stmmac_pltfr_suspend
709  * @dev: device pointer
710  * Description: this function is invoked when suspend the driver and it direcly
711  * call the main suspend function and then, if required, on some platform, it
712  * can call an exit helper.
713  */
714 static int stmmac_pltfr_suspend(struct device *dev)
715 {
716 	int ret;
717 	struct net_device *ndev = dev_get_drvdata(dev);
718 	struct stmmac_priv *priv = netdev_priv(ndev);
719 	struct platform_device *pdev = to_platform_device(dev);
720 
721 	ret = stmmac_suspend(dev);
722 	if (priv->plat->exit)
723 		priv->plat->exit(pdev, priv->plat->bsp_priv);
724 
725 	return ret;
726 }
727 
728 /**
729  * stmmac_pltfr_resume
730  * @dev: device pointer
731  * Description: this function is invoked when resume the driver before calling
732  * the main resume function, on some platforms, it can call own init helper
733  * if required.
734  */
735 static int stmmac_pltfr_resume(struct device *dev)
736 {
737 	struct net_device *ndev = dev_get_drvdata(dev);
738 	struct stmmac_priv *priv = netdev_priv(ndev);
739 	struct platform_device *pdev = to_platform_device(dev);
740 
741 	if (priv->plat->init)
742 		priv->plat->init(pdev, priv->plat->bsp_priv);
743 
744 	return stmmac_resume(dev);
745 }
746 #endif /* CONFIG_PM_SLEEP */
747 
748 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
749 				       stmmac_pltfr_resume);
750 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
751 
752 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
753 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
754 MODULE_LICENSE("GPL");
755