1 /*******************************************************************************
2   Copyright (C) 2013  Vayavya Labs Pvt Ltd
3 
4   This implements all the API for managing HW timestamp & PTP.
5 
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9 
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   The full GNU General Public License is included in this distribution in
16   the file called "COPYING".
17 
18   Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
19   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
20 *******************************************************************************/
21 
22 #include <linux/io.h>
23 #include <linux/delay.h>
24 #include "common.h"
25 #include "stmmac_ptp.h"
26 
27 static void config_hw_tstamping(void __iomem *ioaddr, u32 data)
28 {
29 	writel(data, ioaddr + PTP_TCR);
30 }
31 
32 static void config_sub_second_increment(void __iomem *ioaddr,
33 		u32 ptp_clock, int gmac4, u32 *ssinc)
34 {
35 	u32 value = readl(ioaddr + PTP_TCR);
36 	unsigned long data;
37 	u32 reg_value;
38 
39 	/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
40 	 *	formula = (1/ptp_clock) * 1000000000
41 	 * where ptp_clock is 50MHz if fine method is used to update system
42 	 */
43 	if (value & PTP_TCR_TSCFUPDT)
44 		data = (1000000000ULL / 50000000);
45 	else
46 		data = (1000000000ULL / ptp_clock);
47 
48 	/* 0.465ns accuracy */
49 	if (!(value & PTP_TCR_TSCTRLSSR))
50 		data = (data * 1000) / 465;
51 
52 	data &= PTP_SSIR_SSINC_MASK;
53 
54 	reg_value = data;
55 	if (gmac4)
56 		reg_value <<= GMAC4_PTP_SSIR_SSINC_SHIFT;
57 
58 	writel(reg_value, ioaddr + PTP_SSIR);
59 
60 	if (ssinc)
61 		*ssinc = data;
62 }
63 
64 static int init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
65 {
66 	int limit;
67 	u32 value;
68 
69 	writel(sec, ioaddr + PTP_STSUR);
70 	writel(nsec, ioaddr + PTP_STNSUR);
71 	/* issue command to initialize the system time value */
72 	value = readl(ioaddr + PTP_TCR);
73 	value |= PTP_TCR_TSINIT;
74 	writel(value, ioaddr + PTP_TCR);
75 
76 	/* wait for present system time initialize to complete */
77 	limit = 10;
78 	while (limit--) {
79 		if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSINIT))
80 			break;
81 		mdelay(10);
82 	}
83 	if (limit < 0)
84 		return -EBUSY;
85 
86 	return 0;
87 }
88 
89 static int config_addend(void __iomem *ioaddr, u32 addend)
90 {
91 	u32 value;
92 	int limit;
93 
94 	writel(addend, ioaddr + PTP_TAR);
95 	/* issue command to update the addend value */
96 	value = readl(ioaddr + PTP_TCR);
97 	value |= PTP_TCR_TSADDREG;
98 	writel(value, ioaddr + PTP_TCR);
99 
100 	/* wait for present addend update to complete */
101 	limit = 10;
102 	while (limit--) {
103 		if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSADDREG))
104 			break;
105 		mdelay(10);
106 	}
107 	if (limit < 0)
108 		return -EBUSY;
109 
110 	return 0;
111 }
112 
113 static int adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,
114 		int add_sub, int gmac4)
115 {
116 	u32 value;
117 	int limit;
118 
119 	if (add_sub) {
120 		/* If the new sec value needs to be subtracted with
121 		 * the system time, then MAC_STSUR reg should be
122 		 * programmed with (2^32 – <new_sec_value>)
123 		 */
124 		if (gmac4)
125 			sec = (100000000ULL - sec);
126 
127 		value = readl(ioaddr + PTP_TCR);
128 		if (value & PTP_TCR_TSCTRLSSR)
129 			nsec = (PTP_DIGITAL_ROLLOVER_MODE - nsec);
130 		else
131 			nsec = (PTP_BINARY_ROLLOVER_MODE - nsec);
132 	}
133 
134 	writel(sec, ioaddr + PTP_STSUR);
135 	value = (add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec;
136 	writel(value, ioaddr + PTP_STNSUR);
137 
138 	/* issue command to initialize the system time value */
139 	value = readl(ioaddr + PTP_TCR);
140 	value |= PTP_TCR_TSUPDT;
141 	writel(value, ioaddr + PTP_TCR);
142 
143 	/* wait for present system time adjust/update to complete */
144 	limit = 10;
145 	while (limit--) {
146 		if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSUPDT))
147 			break;
148 		mdelay(10);
149 	}
150 	if (limit < 0)
151 		return -EBUSY;
152 
153 	return 0;
154 }
155 
156 static void get_systime(void __iomem *ioaddr, u64 *systime)
157 {
158 	u64 ns;
159 
160 	/* Get the TSSS value */
161 	ns = readl(ioaddr + PTP_STNSR);
162 	/* Get the TSS and convert sec time value to nanosecond */
163 	ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
164 
165 	if (systime)
166 		*systime = ns;
167 }
168 
169 const struct stmmac_hwtimestamp stmmac_ptp = {
170 	.config_hw_tstamping = config_hw_tstamping,
171 	.init_systime = init_systime,
172 	.config_sub_second_increment = config_sub_second_increment,
173 	.config_addend = config_addend,
174 	.adjust_systime = adjust_systime,
175 	.get_systime = get_systime,
176 };
177