1 /*******************************************************************************
2   Copyright (C) 2013  Vayavya Labs Pvt Ltd
3 
4   This implements all the API for managing HW timestamp & PTP.
5 
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9 
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   The full GNU General Public License is included in this distribution in
16   the file called "COPYING".
17 
18   Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
19   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
20 *******************************************************************************/
21 
22 #include <linux/io.h>
23 #include <linux/delay.h>
24 #include "common.h"
25 #include "stmmac_ptp.h"
26 
27 static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data)
28 {
29 	writel(data, ioaddr + PTP_TCR);
30 }
31 
32 static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
33 					      u32 ptp_clock, int gmac4)
34 {
35 	u32 value = readl(ioaddr + PTP_TCR);
36 	unsigned long data;
37 
38 	/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
39 	 *	formula = (1/ptp_clock) * 1000000000
40 	 * where ptp_clock is 50MHz if fine method is used to update system
41 	 */
42 	if (value & PTP_TCR_TSCFUPDT)
43 		data = (1000000000ULL / 50000000);
44 	else
45 		data = (1000000000ULL / ptp_clock);
46 
47 	/* 0.465ns accuracy */
48 	if (!(value & PTP_TCR_TSCTRLSSR))
49 		data = (data * 1000) / 465;
50 
51 	data &= PTP_SSIR_SSINC_MASK;
52 
53 	if (gmac4)
54 		data = data << GMAC4_PTP_SSIR_SSINC_SHIFT;
55 
56 	writel(data, ioaddr + PTP_SSIR);
57 
58 	return data;
59 }
60 
61 static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
62 {
63 	int limit;
64 	u32 value;
65 
66 	writel(sec, ioaddr + PTP_STSUR);
67 	writel(nsec, ioaddr + PTP_STNSUR);
68 	/* issue command to initialize the system time value */
69 	value = readl(ioaddr + PTP_TCR);
70 	value |= PTP_TCR_TSINIT;
71 	writel(value, ioaddr + PTP_TCR);
72 
73 	/* wait for present system time initialize to complete */
74 	limit = 10;
75 	while (limit--) {
76 		if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSINIT))
77 			break;
78 		mdelay(10);
79 	}
80 	if (limit < 0)
81 		return -EBUSY;
82 
83 	return 0;
84 }
85 
86 static int stmmac_config_addend(void __iomem *ioaddr, u32 addend)
87 {
88 	u32 value;
89 	int limit;
90 
91 	writel(addend, ioaddr + PTP_TAR);
92 	/* issue command to update the addend value */
93 	value = readl(ioaddr + PTP_TCR);
94 	value |= PTP_TCR_TSADDREG;
95 	writel(value, ioaddr + PTP_TCR);
96 
97 	/* wait for present addend update to complete */
98 	limit = 10;
99 	while (limit--) {
100 		if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSADDREG))
101 			break;
102 		mdelay(10);
103 	}
104 	if (limit < 0)
105 		return -EBUSY;
106 
107 	return 0;
108 }
109 
110 static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,
111 				 int add_sub, int gmac4)
112 {
113 	u32 value;
114 	int limit;
115 
116 	if (add_sub) {
117 		/* If the new sec value needs to be subtracted with
118 		 * the system time, then MAC_STSUR reg should be
119 		 * programmed with (2^32 – <new_sec_value>)
120 		 */
121 		if (gmac4)
122 			sec = (100000000ULL - sec);
123 
124 		value = readl(ioaddr + PTP_TCR);
125 		if (value & PTP_TCR_TSCTRLSSR)
126 			nsec = (PTP_DIGITAL_ROLLOVER_MODE - nsec);
127 		else
128 			nsec = (PTP_BINARY_ROLLOVER_MODE - nsec);
129 	}
130 
131 	writel(sec, ioaddr + PTP_STSUR);
132 	value = (add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec;
133 	writel(value, ioaddr + PTP_STNSUR);
134 
135 	/* issue command to initialize the system time value */
136 	value = readl(ioaddr + PTP_TCR);
137 	value |= PTP_TCR_TSUPDT;
138 	writel(value, ioaddr + PTP_TCR);
139 
140 	/* wait for present system time adjust/update to complete */
141 	limit = 10;
142 	while (limit--) {
143 		if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSUPDT))
144 			break;
145 		mdelay(10);
146 	}
147 	if (limit < 0)
148 		return -EBUSY;
149 
150 	return 0;
151 }
152 
153 static u64 stmmac_get_systime(void __iomem *ioaddr)
154 {
155 	u64 ns;
156 
157 	/* Get the TSSS value */
158 	ns = readl(ioaddr + PTP_STNSR);
159 	/* Get the TSS and convert sec time value to nanosecond */
160 	ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
161 
162 	return ns;
163 }
164 
165 const struct stmmac_hwtimestamp stmmac_ptp = {
166 	.config_hw_tstamping = stmmac_config_hw_tstamping,
167 	.init_systime = stmmac_init_systime,
168 	.config_sub_second_increment = stmmac_config_sub_second_increment,
169 	.config_addend = stmmac_config_addend,
170 	.adjust_systime = stmmac_adjust_systime,
171 	.get_systime = stmmac_get_systime,
172 };
173