1 /******************************************************************************* 2 STMMAC Ethtool support 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 23 *******************************************************************************/ 24 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/interrupt.h> 28 #include <linux/mii.h> 29 #include <linux/phy.h> 30 #include <asm/io.h> 31 32 #include "stmmac.h" 33 #include "dwmac_dma.h" 34 35 #define REG_SPACE_SIZE 0x1054 36 #define MAC100_ETHTOOL_NAME "st_mac100" 37 #define GMAC_ETHTOOL_NAME "st_gmac" 38 39 struct stmmac_stats { 40 char stat_string[ETH_GSTRING_LEN]; 41 int sizeof_stat; 42 int stat_offset; 43 }; 44 45 #define STMMAC_STAT(m) \ 46 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \ 47 offsetof(struct stmmac_priv, xstats.m)} 48 49 static const struct stmmac_stats stmmac_gstrings_stats[] = { 50 /* Transmit errors */ 51 STMMAC_STAT(tx_underflow), 52 STMMAC_STAT(tx_carrier), 53 STMMAC_STAT(tx_losscarrier), 54 STMMAC_STAT(vlan_tag), 55 STMMAC_STAT(tx_deferred), 56 STMMAC_STAT(tx_vlan), 57 STMMAC_STAT(tx_jabber), 58 STMMAC_STAT(tx_frame_flushed), 59 STMMAC_STAT(tx_payload_error), 60 STMMAC_STAT(tx_ip_header_error), 61 /* Receive errors */ 62 STMMAC_STAT(rx_desc), 63 STMMAC_STAT(sa_filter_fail), 64 STMMAC_STAT(overflow_error), 65 STMMAC_STAT(ipc_csum_error), 66 STMMAC_STAT(rx_collision), 67 STMMAC_STAT(rx_crc), 68 STMMAC_STAT(dribbling_bit), 69 STMMAC_STAT(rx_length), 70 STMMAC_STAT(rx_mii), 71 STMMAC_STAT(rx_multicast), 72 STMMAC_STAT(rx_gmac_overflow), 73 STMMAC_STAT(rx_watchdog), 74 STMMAC_STAT(da_rx_filter_fail), 75 STMMAC_STAT(sa_rx_filter_fail), 76 STMMAC_STAT(rx_missed_cntr), 77 STMMAC_STAT(rx_overflow_cntr), 78 STMMAC_STAT(rx_vlan), 79 /* Tx/Rx IRQ errors */ 80 STMMAC_STAT(tx_undeflow_irq), 81 STMMAC_STAT(tx_process_stopped_irq), 82 STMMAC_STAT(tx_jabber_irq), 83 STMMAC_STAT(rx_overflow_irq), 84 STMMAC_STAT(rx_buf_unav_irq), 85 STMMAC_STAT(rx_process_stopped_irq), 86 STMMAC_STAT(rx_watchdog_irq), 87 STMMAC_STAT(tx_early_irq), 88 STMMAC_STAT(fatal_bus_error_irq), 89 /* Extra info */ 90 STMMAC_STAT(threshold), 91 STMMAC_STAT(tx_pkt_n), 92 STMMAC_STAT(rx_pkt_n), 93 STMMAC_STAT(poll_n), 94 STMMAC_STAT(sched_timer_n), 95 STMMAC_STAT(normal_irq_n), 96 }; 97 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) 98 99 /* HW MAC Management counters (if supported) */ 100 #define STMMAC_MMC_STAT(m) \ 101 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \ 102 offsetof(struct stmmac_priv, mmc.m)} 103 104 static const struct stmmac_stats stmmac_mmc[] = { 105 STMMAC_MMC_STAT(mmc_tx_octetcount_gb), 106 STMMAC_MMC_STAT(mmc_tx_framecount_gb), 107 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g), 108 STMMAC_MMC_STAT(mmc_tx_multicastframe_g), 109 STMMAC_MMC_STAT(mmc_tx_64_octets_gb), 110 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb), 111 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb), 112 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb), 113 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb), 114 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb), 115 STMMAC_MMC_STAT(mmc_tx_unicast_gb), 116 STMMAC_MMC_STAT(mmc_tx_multicast_gb), 117 STMMAC_MMC_STAT(mmc_tx_broadcast_gb), 118 STMMAC_MMC_STAT(mmc_tx_underflow_error), 119 STMMAC_MMC_STAT(mmc_tx_singlecol_g), 120 STMMAC_MMC_STAT(mmc_tx_multicol_g), 121 STMMAC_MMC_STAT(mmc_tx_deferred), 122 STMMAC_MMC_STAT(mmc_tx_latecol), 123 STMMAC_MMC_STAT(mmc_tx_exesscol), 124 STMMAC_MMC_STAT(mmc_tx_carrier_error), 125 STMMAC_MMC_STAT(mmc_tx_octetcount_g), 126 STMMAC_MMC_STAT(mmc_tx_framecount_g), 127 STMMAC_MMC_STAT(mmc_tx_excessdef), 128 STMMAC_MMC_STAT(mmc_tx_pause_frame), 129 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g), 130 STMMAC_MMC_STAT(mmc_rx_framecount_gb), 131 STMMAC_MMC_STAT(mmc_rx_octetcount_gb), 132 STMMAC_MMC_STAT(mmc_rx_octetcount_g), 133 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), 134 STMMAC_MMC_STAT(mmc_rx_multicastframe_g), 135 STMMAC_MMC_STAT(mmc_rx_crc_errror), 136 STMMAC_MMC_STAT(mmc_rx_align_error), 137 STMMAC_MMC_STAT(mmc_rx_run_error), 138 STMMAC_MMC_STAT(mmc_rx_jabber_error), 139 STMMAC_MMC_STAT(mmc_rx_undersize_g), 140 STMMAC_MMC_STAT(mmc_rx_oversize_g), 141 STMMAC_MMC_STAT(mmc_rx_64_octets_gb), 142 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb), 143 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb), 144 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb), 145 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb), 146 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb), 147 STMMAC_MMC_STAT(mmc_rx_unicast_g), 148 STMMAC_MMC_STAT(mmc_rx_length_error), 149 STMMAC_MMC_STAT(mmc_rx_autofrangetype), 150 STMMAC_MMC_STAT(mmc_rx_pause_frames), 151 STMMAC_MMC_STAT(mmc_rx_fifo_overflow), 152 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb), 153 STMMAC_MMC_STAT(mmc_rx_watchdog_error), 154 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask), 155 STMMAC_MMC_STAT(mmc_rx_ipc_intr), 156 STMMAC_MMC_STAT(mmc_rx_ipv4_gd), 157 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr), 158 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay), 159 STMMAC_MMC_STAT(mmc_rx_ipv4_frag), 160 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl), 161 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets), 162 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets), 163 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets), 164 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets), 165 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets), 166 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets), 167 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets), 168 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets), 169 STMMAC_MMC_STAT(mmc_rx_ipv6_gd), 170 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr), 171 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay), 172 STMMAC_MMC_STAT(mmc_rx_udp_gd), 173 STMMAC_MMC_STAT(mmc_rx_udp_err), 174 STMMAC_MMC_STAT(mmc_rx_tcp_gd), 175 STMMAC_MMC_STAT(mmc_rx_tcp_err), 176 STMMAC_MMC_STAT(mmc_rx_icmp_gd), 177 STMMAC_MMC_STAT(mmc_rx_icmp_err), 178 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets), 179 STMMAC_MMC_STAT(mmc_rx_udp_err_octets), 180 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets), 181 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets), 182 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets), 183 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets), 184 }; 185 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc) 186 187 static void stmmac_ethtool_getdrvinfo(struct net_device *dev, 188 struct ethtool_drvinfo *info) 189 { 190 struct stmmac_priv *priv = netdev_priv(dev); 191 192 if (priv->plat->has_gmac) 193 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver)); 194 else 195 strlcpy(info->driver, MAC100_ETHTOOL_NAME, 196 sizeof(info->driver)); 197 198 strcpy(info->version, DRV_MODULE_VERSION); 199 info->fw_version[0] = '\0'; 200 } 201 202 static int stmmac_ethtool_getsettings(struct net_device *dev, 203 struct ethtool_cmd *cmd) 204 { 205 struct stmmac_priv *priv = netdev_priv(dev); 206 struct phy_device *phy = priv->phydev; 207 int rc; 208 if (phy == NULL) { 209 pr_err("%s: %s: PHY is not registered\n", 210 __func__, dev->name); 211 return -ENODEV; 212 } 213 if (!netif_running(dev)) { 214 pr_err("%s: interface is disabled: we cannot track " 215 "link speed / duplex setting\n", dev->name); 216 return -EBUSY; 217 } 218 cmd->transceiver = XCVR_INTERNAL; 219 spin_lock_irq(&priv->lock); 220 rc = phy_ethtool_gset(phy, cmd); 221 spin_unlock_irq(&priv->lock); 222 return rc; 223 } 224 225 static int stmmac_ethtool_setsettings(struct net_device *dev, 226 struct ethtool_cmd *cmd) 227 { 228 struct stmmac_priv *priv = netdev_priv(dev); 229 struct phy_device *phy = priv->phydev; 230 int rc; 231 232 spin_lock(&priv->lock); 233 rc = phy_ethtool_sset(phy, cmd); 234 spin_unlock(&priv->lock); 235 236 return rc; 237 } 238 239 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev) 240 { 241 struct stmmac_priv *priv = netdev_priv(dev); 242 return priv->msg_enable; 243 } 244 245 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level) 246 { 247 struct stmmac_priv *priv = netdev_priv(dev); 248 priv->msg_enable = level; 249 250 } 251 252 static int stmmac_check_if_running(struct net_device *dev) 253 { 254 if (!netif_running(dev)) 255 return -EBUSY; 256 return 0; 257 } 258 259 static int stmmac_ethtool_get_regs_len(struct net_device *dev) 260 { 261 return REG_SPACE_SIZE; 262 } 263 264 static void stmmac_ethtool_gregs(struct net_device *dev, 265 struct ethtool_regs *regs, void *space) 266 { 267 int i; 268 u32 *reg_space = (u32 *) space; 269 270 struct stmmac_priv *priv = netdev_priv(dev); 271 272 memset(reg_space, 0x0, REG_SPACE_SIZE); 273 274 if (!priv->plat->has_gmac) { 275 /* MAC registers */ 276 for (i = 0; i < 12; i++) 277 reg_space[i] = readl(priv->ioaddr + (i * 4)); 278 /* DMA registers */ 279 for (i = 0; i < 9; i++) 280 reg_space[i + 12] = 281 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 282 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR); 283 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR); 284 } else { 285 /* MAC registers */ 286 for (i = 0; i < 55; i++) 287 reg_space[i] = readl(priv->ioaddr + (i * 4)); 288 /* DMA registers */ 289 for (i = 0; i < 22; i++) 290 reg_space[i + 55] = 291 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 292 } 293 } 294 295 static void 296 stmmac_get_pauseparam(struct net_device *netdev, 297 struct ethtool_pauseparam *pause) 298 { 299 struct stmmac_priv *priv = netdev_priv(netdev); 300 301 spin_lock(&priv->lock); 302 303 pause->rx_pause = 0; 304 pause->tx_pause = 0; 305 pause->autoneg = priv->phydev->autoneg; 306 307 if (priv->flow_ctrl & FLOW_RX) 308 pause->rx_pause = 1; 309 if (priv->flow_ctrl & FLOW_TX) 310 pause->tx_pause = 1; 311 312 spin_unlock(&priv->lock); 313 } 314 315 static int 316 stmmac_set_pauseparam(struct net_device *netdev, 317 struct ethtool_pauseparam *pause) 318 { 319 struct stmmac_priv *priv = netdev_priv(netdev); 320 struct phy_device *phy = priv->phydev; 321 int new_pause = FLOW_OFF; 322 int ret = 0; 323 324 spin_lock(&priv->lock); 325 326 if (pause->rx_pause) 327 new_pause |= FLOW_RX; 328 if (pause->tx_pause) 329 new_pause |= FLOW_TX; 330 331 priv->flow_ctrl = new_pause; 332 phy->autoneg = pause->autoneg; 333 334 if (phy->autoneg) { 335 if (netif_running(netdev)) 336 ret = phy_start_aneg(phy); 337 } else 338 priv->hw->mac->flow_ctrl(priv->ioaddr, phy->duplex, 339 priv->flow_ctrl, priv->pause); 340 spin_unlock(&priv->lock); 341 return ret; 342 } 343 344 static void stmmac_get_ethtool_stats(struct net_device *dev, 345 struct ethtool_stats *dummy, u64 *data) 346 { 347 struct stmmac_priv *priv = netdev_priv(dev); 348 int i, j = 0; 349 350 /* Update the DMA HW counters for dwmac10/100 */ 351 if (!priv->plat->has_gmac) 352 priv->hw->dma->dma_diagnostic_fr(&dev->stats, 353 (void *) &priv->xstats, 354 priv->ioaddr); 355 else { 356 /* If supported, for new GMAC chips expose the MMC counters */ 357 if (priv->dma_cap.rmon) { 358 dwmac_mmc_read(priv->ioaddr, &priv->mmc); 359 360 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 361 char *p; 362 p = (char *)priv + stmmac_mmc[i].stat_offset; 363 364 data[j++] = (stmmac_mmc[i].sizeof_stat == 365 sizeof(u64)) ? (*(u64 *)p) : 366 (*(u32 *)p); 367 } 368 } 369 } 370 for (i = 0; i < STMMAC_STATS_LEN; i++) { 371 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; 372 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat == 373 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); 374 } 375 } 376 377 static int stmmac_get_sset_count(struct net_device *netdev, int sset) 378 { 379 struct stmmac_priv *priv = netdev_priv(netdev); 380 int len; 381 382 switch (sset) { 383 case ETH_SS_STATS: 384 len = STMMAC_STATS_LEN; 385 386 if (priv->dma_cap.rmon) 387 len += STMMAC_MMC_STATS_LEN; 388 389 return len; 390 default: 391 return -EOPNOTSUPP; 392 } 393 } 394 395 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) 396 { 397 int i; 398 u8 *p = data; 399 struct stmmac_priv *priv = netdev_priv(dev); 400 401 switch (stringset) { 402 case ETH_SS_STATS: 403 if (priv->dma_cap.rmon) 404 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 405 memcpy(p, stmmac_mmc[i].stat_string, 406 ETH_GSTRING_LEN); 407 p += ETH_GSTRING_LEN; 408 } 409 for (i = 0; i < STMMAC_STATS_LEN; i++) { 410 memcpy(p, stmmac_gstrings_stats[i].stat_string, 411 ETH_GSTRING_LEN); 412 p += ETH_GSTRING_LEN; 413 } 414 break; 415 default: 416 WARN_ON(1); 417 break; 418 } 419 } 420 421 /* Currently only support WOL through Magic packet. */ 422 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 423 { 424 struct stmmac_priv *priv = netdev_priv(dev); 425 426 spin_lock_irq(&priv->lock); 427 if (device_can_wakeup(priv->device)) { 428 wol->supported = WAKE_MAGIC | WAKE_UCAST; 429 wol->wolopts = priv->wolopts; 430 } 431 spin_unlock_irq(&priv->lock); 432 } 433 434 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 435 { 436 struct stmmac_priv *priv = netdev_priv(dev); 437 u32 support = WAKE_MAGIC | WAKE_UCAST; 438 439 /* By default almost all GMAC devices support the WoL via 440 * magic frame but we can disable it if the HW capability 441 * register shows no support for pmt_magic_frame. */ 442 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame)) 443 wol->wolopts &= ~WAKE_MAGIC; 444 445 if (!device_can_wakeup(priv->device)) 446 return -EINVAL; 447 448 if (wol->wolopts & ~support) 449 return -EINVAL; 450 451 if (wol->wolopts) { 452 pr_info("stmmac: wakeup enable\n"); 453 device_set_wakeup_enable(priv->device, 1); 454 enable_irq_wake(priv->wol_irq); 455 } else { 456 device_set_wakeup_enable(priv->device, 0); 457 disable_irq_wake(priv->wol_irq); 458 } 459 460 spin_lock_irq(&priv->lock); 461 priv->wolopts = wol->wolopts; 462 spin_unlock_irq(&priv->lock); 463 464 return 0; 465 } 466 467 static const struct ethtool_ops stmmac_ethtool_ops = { 468 .begin = stmmac_check_if_running, 469 .get_drvinfo = stmmac_ethtool_getdrvinfo, 470 .get_settings = stmmac_ethtool_getsettings, 471 .set_settings = stmmac_ethtool_setsettings, 472 .get_msglevel = stmmac_ethtool_getmsglevel, 473 .set_msglevel = stmmac_ethtool_setmsglevel, 474 .get_regs = stmmac_ethtool_gregs, 475 .get_regs_len = stmmac_ethtool_get_regs_len, 476 .get_link = ethtool_op_get_link, 477 .get_pauseparam = stmmac_get_pauseparam, 478 .set_pauseparam = stmmac_set_pauseparam, 479 .get_ethtool_stats = stmmac_get_ethtool_stats, 480 .get_strings = stmmac_get_strings, 481 .get_wol = stmmac_get_wol, 482 .set_wol = stmmac_set_wol, 483 .get_sset_count = stmmac_get_sset_count, 484 }; 485 486 void stmmac_set_ethtool_ops(struct net_device *netdev) 487 { 488 SET_ETHTOOL_OPS(netdev, &stmmac_ethtool_ops); 489 } 490