1 /******************************************************************************* 2 STMMAC Ethtool support 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 23 *******************************************************************************/ 24 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/interrupt.h> 28 #include <linux/mii.h> 29 #include <linux/phy.h> 30 #include <linux/net_tstamp.h> 31 #include <asm/io.h> 32 33 #include "stmmac.h" 34 #include "dwmac_dma.h" 35 36 #define REG_SPACE_SIZE 0x1054 37 #define MAC100_ETHTOOL_NAME "st_mac100" 38 #define GMAC_ETHTOOL_NAME "st_gmac" 39 40 struct stmmac_stats { 41 char stat_string[ETH_GSTRING_LEN]; 42 int sizeof_stat; 43 int stat_offset; 44 }; 45 46 #define STMMAC_STAT(m) \ 47 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \ 48 offsetof(struct stmmac_priv, xstats.m)} 49 50 static const struct stmmac_stats stmmac_gstrings_stats[] = { 51 /* Transmit errors */ 52 STMMAC_STAT(tx_underflow), 53 STMMAC_STAT(tx_carrier), 54 STMMAC_STAT(tx_losscarrier), 55 STMMAC_STAT(vlan_tag), 56 STMMAC_STAT(tx_deferred), 57 STMMAC_STAT(tx_vlan), 58 STMMAC_STAT(tx_jabber), 59 STMMAC_STAT(tx_frame_flushed), 60 STMMAC_STAT(tx_payload_error), 61 STMMAC_STAT(tx_ip_header_error), 62 /* Receive errors */ 63 STMMAC_STAT(rx_desc), 64 STMMAC_STAT(sa_filter_fail), 65 STMMAC_STAT(overflow_error), 66 STMMAC_STAT(ipc_csum_error), 67 STMMAC_STAT(rx_collision), 68 STMMAC_STAT(rx_crc), 69 STMMAC_STAT(dribbling_bit), 70 STMMAC_STAT(rx_length), 71 STMMAC_STAT(rx_mii), 72 STMMAC_STAT(rx_multicast), 73 STMMAC_STAT(rx_gmac_overflow), 74 STMMAC_STAT(rx_watchdog), 75 STMMAC_STAT(da_rx_filter_fail), 76 STMMAC_STAT(sa_rx_filter_fail), 77 STMMAC_STAT(rx_missed_cntr), 78 STMMAC_STAT(rx_overflow_cntr), 79 STMMAC_STAT(rx_vlan), 80 /* Tx/Rx IRQ error info */ 81 STMMAC_STAT(tx_undeflow_irq), 82 STMMAC_STAT(tx_process_stopped_irq), 83 STMMAC_STAT(tx_jabber_irq), 84 STMMAC_STAT(rx_overflow_irq), 85 STMMAC_STAT(rx_buf_unav_irq), 86 STMMAC_STAT(rx_process_stopped_irq), 87 STMMAC_STAT(rx_watchdog_irq), 88 STMMAC_STAT(tx_early_irq), 89 STMMAC_STAT(fatal_bus_error_irq), 90 /* Tx/Rx IRQ Events */ 91 STMMAC_STAT(rx_early_irq), 92 STMMAC_STAT(threshold), 93 STMMAC_STAT(tx_pkt_n), 94 STMMAC_STAT(rx_pkt_n), 95 STMMAC_STAT(normal_irq_n), 96 STMMAC_STAT(rx_normal_irq_n), 97 STMMAC_STAT(napi_poll), 98 STMMAC_STAT(tx_normal_irq_n), 99 STMMAC_STAT(tx_clean), 100 STMMAC_STAT(tx_set_ic_bit), 101 STMMAC_STAT(irq_receive_pmt_irq_n), 102 /* MMC info */ 103 STMMAC_STAT(mmc_tx_irq_n), 104 STMMAC_STAT(mmc_rx_irq_n), 105 STMMAC_STAT(mmc_rx_csum_offload_irq_n), 106 /* EEE */ 107 STMMAC_STAT(irq_tx_path_in_lpi_mode_n), 108 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n), 109 STMMAC_STAT(irq_rx_path_in_lpi_mode_n), 110 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n), 111 STMMAC_STAT(phy_eee_wakeup_error_n), 112 /* Extended RDES status */ 113 STMMAC_STAT(ip_hdr_err), 114 STMMAC_STAT(ip_payload_err), 115 STMMAC_STAT(ip_csum_bypassed), 116 STMMAC_STAT(ipv4_pkt_rcvd), 117 STMMAC_STAT(ipv6_pkt_rcvd), 118 STMMAC_STAT(no_ptp_rx_msg_type_ext), 119 STMMAC_STAT(ptp_rx_msg_type_sync), 120 STMMAC_STAT(ptp_rx_msg_type_follow_up), 121 STMMAC_STAT(ptp_rx_msg_type_delay_req), 122 STMMAC_STAT(ptp_rx_msg_type_delay_resp), 123 STMMAC_STAT(ptp_rx_msg_type_pdelay_req), 124 STMMAC_STAT(ptp_rx_msg_type_pdelay_resp), 125 STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up), 126 STMMAC_STAT(ptp_rx_msg_type_announce), 127 STMMAC_STAT(ptp_rx_msg_type_management), 128 STMMAC_STAT(ptp_rx_msg_pkt_reserved_type), 129 STMMAC_STAT(ptp_frame_type), 130 STMMAC_STAT(ptp_ver), 131 STMMAC_STAT(timestamp_dropped), 132 STMMAC_STAT(av_pkt_rcvd), 133 STMMAC_STAT(av_tagged_pkt_rcvd), 134 STMMAC_STAT(vlan_tag_priority_val), 135 STMMAC_STAT(l3_filter_match), 136 STMMAC_STAT(l4_filter_match), 137 STMMAC_STAT(l3_l4_filter_no_match), 138 /* PCS */ 139 STMMAC_STAT(irq_pcs_ane_n), 140 STMMAC_STAT(irq_pcs_link_n), 141 STMMAC_STAT(irq_rgmii_n), 142 /* DEBUG */ 143 STMMAC_STAT(mtl_tx_status_fifo_full), 144 STMMAC_STAT(mtl_tx_fifo_not_empty), 145 STMMAC_STAT(mmtl_fifo_ctrl), 146 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write), 147 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait), 148 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read), 149 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle), 150 STMMAC_STAT(mac_tx_in_pause), 151 STMMAC_STAT(mac_tx_frame_ctrl_xfer), 152 STMMAC_STAT(mac_tx_frame_ctrl_idle), 153 STMMAC_STAT(mac_tx_frame_ctrl_wait), 154 STMMAC_STAT(mac_tx_frame_ctrl_pause), 155 STMMAC_STAT(mac_gmii_tx_proto_engine), 156 STMMAC_STAT(mtl_rx_fifo_fill_level_full), 157 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh), 158 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh), 159 STMMAC_STAT(mtl_rx_fifo_fill_level_empty), 160 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush), 161 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data), 162 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status), 163 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle), 164 STMMAC_STAT(mtl_rx_fifo_ctrl_active), 165 STMMAC_STAT(mac_rx_frame_ctrl_fifo), 166 STMMAC_STAT(mac_gmii_rx_proto_engine), 167 /* TSO */ 168 STMMAC_STAT(tx_tso_frames), 169 STMMAC_STAT(tx_tso_nfrags), 170 }; 171 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) 172 173 /* HW MAC Management counters (if supported) */ 174 #define STMMAC_MMC_STAT(m) \ 175 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \ 176 offsetof(struct stmmac_priv, mmc.m)} 177 178 static const struct stmmac_stats stmmac_mmc[] = { 179 STMMAC_MMC_STAT(mmc_tx_octetcount_gb), 180 STMMAC_MMC_STAT(mmc_tx_framecount_gb), 181 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g), 182 STMMAC_MMC_STAT(mmc_tx_multicastframe_g), 183 STMMAC_MMC_STAT(mmc_tx_64_octets_gb), 184 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb), 185 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb), 186 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb), 187 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb), 188 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb), 189 STMMAC_MMC_STAT(mmc_tx_unicast_gb), 190 STMMAC_MMC_STAT(mmc_tx_multicast_gb), 191 STMMAC_MMC_STAT(mmc_tx_broadcast_gb), 192 STMMAC_MMC_STAT(mmc_tx_underflow_error), 193 STMMAC_MMC_STAT(mmc_tx_singlecol_g), 194 STMMAC_MMC_STAT(mmc_tx_multicol_g), 195 STMMAC_MMC_STAT(mmc_tx_deferred), 196 STMMAC_MMC_STAT(mmc_tx_latecol), 197 STMMAC_MMC_STAT(mmc_tx_exesscol), 198 STMMAC_MMC_STAT(mmc_tx_carrier_error), 199 STMMAC_MMC_STAT(mmc_tx_octetcount_g), 200 STMMAC_MMC_STAT(mmc_tx_framecount_g), 201 STMMAC_MMC_STAT(mmc_tx_excessdef), 202 STMMAC_MMC_STAT(mmc_tx_pause_frame), 203 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g), 204 STMMAC_MMC_STAT(mmc_rx_framecount_gb), 205 STMMAC_MMC_STAT(mmc_rx_octetcount_gb), 206 STMMAC_MMC_STAT(mmc_rx_octetcount_g), 207 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), 208 STMMAC_MMC_STAT(mmc_rx_multicastframe_g), 209 STMMAC_MMC_STAT(mmc_rx_crc_error), 210 STMMAC_MMC_STAT(mmc_rx_align_error), 211 STMMAC_MMC_STAT(mmc_rx_run_error), 212 STMMAC_MMC_STAT(mmc_rx_jabber_error), 213 STMMAC_MMC_STAT(mmc_rx_undersize_g), 214 STMMAC_MMC_STAT(mmc_rx_oversize_g), 215 STMMAC_MMC_STAT(mmc_rx_64_octets_gb), 216 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb), 217 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb), 218 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb), 219 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb), 220 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb), 221 STMMAC_MMC_STAT(mmc_rx_unicast_g), 222 STMMAC_MMC_STAT(mmc_rx_length_error), 223 STMMAC_MMC_STAT(mmc_rx_autofrangetype), 224 STMMAC_MMC_STAT(mmc_rx_pause_frames), 225 STMMAC_MMC_STAT(mmc_rx_fifo_overflow), 226 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb), 227 STMMAC_MMC_STAT(mmc_rx_watchdog_error), 228 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask), 229 STMMAC_MMC_STAT(mmc_rx_ipc_intr), 230 STMMAC_MMC_STAT(mmc_rx_ipv4_gd), 231 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr), 232 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay), 233 STMMAC_MMC_STAT(mmc_rx_ipv4_frag), 234 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl), 235 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets), 236 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets), 237 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets), 238 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets), 239 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets), 240 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets), 241 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets), 242 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets), 243 STMMAC_MMC_STAT(mmc_rx_ipv6_gd), 244 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr), 245 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay), 246 STMMAC_MMC_STAT(mmc_rx_udp_gd), 247 STMMAC_MMC_STAT(mmc_rx_udp_err), 248 STMMAC_MMC_STAT(mmc_rx_tcp_gd), 249 STMMAC_MMC_STAT(mmc_rx_tcp_err), 250 STMMAC_MMC_STAT(mmc_rx_icmp_gd), 251 STMMAC_MMC_STAT(mmc_rx_icmp_err), 252 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets), 253 STMMAC_MMC_STAT(mmc_rx_udp_err_octets), 254 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets), 255 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets), 256 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets), 257 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets), 258 }; 259 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc) 260 261 static void stmmac_ethtool_getdrvinfo(struct net_device *dev, 262 struct ethtool_drvinfo *info) 263 { 264 struct stmmac_priv *priv = netdev_priv(dev); 265 266 if (priv->plat->has_gmac) 267 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver)); 268 else 269 strlcpy(info->driver, MAC100_ETHTOOL_NAME, 270 sizeof(info->driver)); 271 272 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 273 } 274 275 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev, 276 struct ethtool_link_ksettings *cmd) 277 { 278 struct stmmac_priv *priv = netdev_priv(dev); 279 struct phy_device *phy = dev->phydev; 280 int rc; 281 282 if (priv->hw->pcs & STMMAC_PCS_RGMII || 283 priv->hw->pcs & STMMAC_PCS_SGMII) { 284 struct rgmii_adv adv; 285 u32 supported, advertising, lp_advertising; 286 287 if (!priv->xstats.pcs_link) { 288 cmd->base.speed = SPEED_UNKNOWN; 289 cmd->base.duplex = DUPLEX_UNKNOWN; 290 return 0; 291 } 292 cmd->base.duplex = priv->xstats.pcs_duplex; 293 294 cmd->base.speed = priv->xstats.pcs_speed; 295 296 /* Get and convert ADV/LP_ADV from the HW AN registers */ 297 if (!priv->hw->mac->pcs_get_adv_lp) 298 return -EOPNOTSUPP; /* should never happen indeed */ 299 300 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv); 301 302 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */ 303 304 ethtool_convert_link_mode_to_legacy_u32( 305 &supported, cmd->link_modes.supported); 306 ethtool_convert_link_mode_to_legacy_u32( 307 &advertising, cmd->link_modes.advertising); 308 ethtool_convert_link_mode_to_legacy_u32( 309 &lp_advertising, cmd->link_modes.lp_advertising); 310 311 if (adv.pause & STMMAC_PCS_PAUSE) 312 advertising |= ADVERTISED_Pause; 313 if (adv.pause & STMMAC_PCS_ASYM_PAUSE) 314 advertising |= ADVERTISED_Asym_Pause; 315 if (adv.lp_pause & STMMAC_PCS_PAUSE) 316 lp_advertising |= ADVERTISED_Pause; 317 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE) 318 lp_advertising |= ADVERTISED_Asym_Pause; 319 320 /* Reg49[3] always set because ANE is always supported */ 321 cmd->base.autoneg = ADVERTISED_Autoneg; 322 supported |= SUPPORTED_Autoneg; 323 advertising |= ADVERTISED_Autoneg; 324 lp_advertising |= ADVERTISED_Autoneg; 325 326 if (adv.duplex) { 327 supported |= (SUPPORTED_1000baseT_Full | 328 SUPPORTED_100baseT_Full | 329 SUPPORTED_10baseT_Full); 330 advertising |= (ADVERTISED_1000baseT_Full | 331 ADVERTISED_100baseT_Full | 332 ADVERTISED_10baseT_Full); 333 } else { 334 supported |= (SUPPORTED_1000baseT_Half | 335 SUPPORTED_100baseT_Half | 336 SUPPORTED_10baseT_Half); 337 advertising |= (ADVERTISED_1000baseT_Half | 338 ADVERTISED_100baseT_Half | 339 ADVERTISED_10baseT_Half); 340 } 341 if (adv.lp_duplex) 342 lp_advertising |= (ADVERTISED_1000baseT_Full | 343 ADVERTISED_100baseT_Full | 344 ADVERTISED_10baseT_Full); 345 else 346 lp_advertising |= (ADVERTISED_1000baseT_Half | 347 ADVERTISED_100baseT_Half | 348 ADVERTISED_10baseT_Half); 349 cmd->base.port = PORT_OTHER; 350 351 ethtool_convert_legacy_u32_to_link_mode( 352 cmd->link_modes.supported, supported); 353 ethtool_convert_legacy_u32_to_link_mode( 354 cmd->link_modes.advertising, advertising); 355 ethtool_convert_legacy_u32_to_link_mode( 356 cmd->link_modes.lp_advertising, lp_advertising); 357 358 return 0; 359 } 360 361 if (phy == NULL) { 362 pr_err("%s: %s: PHY is not registered\n", 363 __func__, dev->name); 364 return -ENODEV; 365 } 366 if (!netif_running(dev)) { 367 pr_err("%s: interface is disabled: we cannot track " 368 "link speed / duplex setting\n", dev->name); 369 return -EBUSY; 370 } 371 rc = phy_ethtool_ksettings_get(phy, cmd); 372 return rc; 373 } 374 375 static int 376 stmmac_ethtool_set_link_ksettings(struct net_device *dev, 377 const struct ethtool_link_ksettings *cmd) 378 { 379 struct stmmac_priv *priv = netdev_priv(dev); 380 struct phy_device *phy = dev->phydev; 381 int rc; 382 383 if (priv->hw->pcs & STMMAC_PCS_RGMII || 384 priv->hw->pcs & STMMAC_PCS_SGMII) { 385 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause; 386 387 /* Only support ANE */ 388 if (cmd->base.autoneg != AUTONEG_ENABLE) 389 return -EINVAL; 390 391 mask &= (ADVERTISED_1000baseT_Half | 392 ADVERTISED_1000baseT_Full | 393 ADVERTISED_100baseT_Half | 394 ADVERTISED_100baseT_Full | 395 ADVERTISED_10baseT_Half | 396 ADVERTISED_10baseT_Full); 397 398 spin_lock(&priv->lock); 399 400 if (priv->hw->mac->pcs_ctrl_ane) 401 priv->hw->mac->pcs_ctrl_ane(priv->ioaddr, 1, 402 priv->hw->ps, 0); 403 404 spin_unlock(&priv->lock); 405 406 return 0; 407 } 408 409 spin_lock(&priv->lock); 410 rc = phy_ethtool_ksettings_set(phy, cmd); 411 spin_unlock(&priv->lock); 412 413 return rc; 414 } 415 416 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev) 417 { 418 struct stmmac_priv *priv = netdev_priv(dev); 419 return priv->msg_enable; 420 } 421 422 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level) 423 { 424 struct stmmac_priv *priv = netdev_priv(dev); 425 priv->msg_enable = level; 426 427 } 428 429 static int stmmac_check_if_running(struct net_device *dev) 430 { 431 if (!netif_running(dev)) 432 return -EBUSY; 433 return 0; 434 } 435 436 static int stmmac_ethtool_get_regs_len(struct net_device *dev) 437 { 438 return REG_SPACE_SIZE; 439 } 440 441 static void stmmac_ethtool_gregs(struct net_device *dev, 442 struct ethtool_regs *regs, void *space) 443 { 444 int i; 445 u32 *reg_space = (u32 *) space; 446 447 struct stmmac_priv *priv = netdev_priv(dev); 448 449 memset(reg_space, 0x0, REG_SPACE_SIZE); 450 451 if (!priv->plat->has_gmac) { 452 /* MAC registers */ 453 for (i = 0; i < 12; i++) 454 reg_space[i] = readl(priv->ioaddr + (i * 4)); 455 /* DMA registers */ 456 for (i = 0; i < 9; i++) 457 reg_space[i + 12] = 458 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 459 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR); 460 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR); 461 } else { 462 /* MAC registers */ 463 for (i = 0; i < 55; i++) 464 reg_space[i] = readl(priv->ioaddr + (i * 4)); 465 /* DMA registers */ 466 for (i = 0; i < 22; i++) 467 reg_space[i + 55] = 468 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 469 } 470 } 471 472 static void 473 stmmac_get_pauseparam(struct net_device *netdev, 474 struct ethtool_pauseparam *pause) 475 { 476 struct stmmac_priv *priv = netdev_priv(netdev); 477 478 pause->rx_pause = 0; 479 pause->tx_pause = 0; 480 481 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) { 482 struct rgmii_adv adv_lp; 483 484 pause->autoneg = 1; 485 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp); 486 if (!adv_lp.pause) 487 return; 488 } else { 489 if (!(netdev->phydev->supported & SUPPORTED_Pause) || 490 !(netdev->phydev->supported & SUPPORTED_Asym_Pause)) 491 return; 492 } 493 494 pause->autoneg = netdev->phydev->autoneg; 495 496 if (priv->flow_ctrl & FLOW_RX) 497 pause->rx_pause = 1; 498 if (priv->flow_ctrl & FLOW_TX) 499 pause->tx_pause = 1; 500 501 } 502 503 static int 504 stmmac_set_pauseparam(struct net_device *netdev, 505 struct ethtool_pauseparam *pause) 506 { 507 struct stmmac_priv *priv = netdev_priv(netdev); 508 struct phy_device *phy = netdev->phydev; 509 int new_pause = FLOW_OFF; 510 511 if (priv->hw->pcs && priv->hw->mac->pcs_get_adv_lp) { 512 struct rgmii_adv adv_lp; 513 514 pause->autoneg = 1; 515 priv->hw->mac->pcs_get_adv_lp(priv->ioaddr, &adv_lp); 516 if (!adv_lp.pause) 517 return -EOPNOTSUPP; 518 } else { 519 if (!(phy->supported & SUPPORTED_Pause) || 520 !(phy->supported & SUPPORTED_Asym_Pause)) 521 return -EOPNOTSUPP; 522 } 523 524 if (pause->rx_pause) 525 new_pause |= FLOW_RX; 526 if (pause->tx_pause) 527 new_pause |= FLOW_TX; 528 529 priv->flow_ctrl = new_pause; 530 phy->autoneg = pause->autoneg; 531 532 if (phy->autoneg) { 533 if (netif_running(netdev)) 534 return phy_start_aneg(phy); 535 } 536 537 priv->hw->mac->flow_ctrl(priv->hw, phy->duplex, priv->flow_ctrl, 538 priv->pause); 539 return 0; 540 } 541 542 static void stmmac_get_ethtool_stats(struct net_device *dev, 543 struct ethtool_stats *dummy, u64 *data) 544 { 545 struct stmmac_priv *priv = netdev_priv(dev); 546 int i, j = 0; 547 548 /* Update the DMA HW counters for dwmac10/100 */ 549 if (priv->hw->dma->dma_diagnostic_fr) 550 priv->hw->dma->dma_diagnostic_fr(&dev->stats, 551 (void *) &priv->xstats, 552 priv->ioaddr); 553 else { 554 /* If supported, for new GMAC chips expose the MMC counters */ 555 if (priv->dma_cap.rmon) { 556 dwmac_mmc_read(priv->mmcaddr, &priv->mmc); 557 558 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 559 char *p; 560 p = (char *)priv + stmmac_mmc[i].stat_offset; 561 562 data[j++] = (stmmac_mmc[i].sizeof_stat == 563 sizeof(u64)) ? (*(u64 *)p) : 564 (*(u32 *)p); 565 } 566 } 567 if (priv->eee_enabled) { 568 int val = phy_get_eee_err(dev->phydev); 569 if (val) 570 priv->xstats.phy_eee_wakeup_error_n = val; 571 } 572 573 if ((priv->hw->mac->debug) && 574 (priv->synopsys_id >= DWMAC_CORE_3_50)) 575 priv->hw->mac->debug(priv->ioaddr, 576 (void *)&priv->xstats); 577 } 578 for (i = 0; i < STMMAC_STATS_LEN; i++) { 579 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; 580 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat == 581 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); 582 } 583 } 584 585 static int stmmac_get_sset_count(struct net_device *netdev, int sset) 586 { 587 struct stmmac_priv *priv = netdev_priv(netdev); 588 int len; 589 590 switch (sset) { 591 case ETH_SS_STATS: 592 len = STMMAC_STATS_LEN; 593 594 if (priv->dma_cap.rmon) 595 len += STMMAC_MMC_STATS_LEN; 596 597 return len; 598 default: 599 return -EOPNOTSUPP; 600 } 601 } 602 603 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) 604 { 605 int i; 606 u8 *p = data; 607 struct stmmac_priv *priv = netdev_priv(dev); 608 609 switch (stringset) { 610 case ETH_SS_STATS: 611 if (priv->dma_cap.rmon) 612 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 613 memcpy(p, stmmac_mmc[i].stat_string, 614 ETH_GSTRING_LEN); 615 p += ETH_GSTRING_LEN; 616 } 617 for (i = 0; i < STMMAC_STATS_LEN; i++) { 618 memcpy(p, stmmac_gstrings_stats[i].stat_string, 619 ETH_GSTRING_LEN); 620 p += ETH_GSTRING_LEN; 621 } 622 break; 623 default: 624 WARN_ON(1); 625 break; 626 } 627 } 628 629 /* Currently only support WOL through Magic packet. */ 630 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 631 { 632 struct stmmac_priv *priv = netdev_priv(dev); 633 634 spin_lock_irq(&priv->lock); 635 if (device_can_wakeup(priv->device)) { 636 wol->supported = WAKE_MAGIC | WAKE_UCAST; 637 wol->wolopts = priv->wolopts; 638 } 639 spin_unlock_irq(&priv->lock); 640 } 641 642 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 643 { 644 struct stmmac_priv *priv = netdev_priv(dev); 645 u32 support = WAKE_MAGIC | WAKE_UCAST; 646 647 /* By default almost all GMAC devices support the WoL via 648 * magic frame but we can disable it if the HW capability 649 * register shows no support for pmt_magic_frame. */ 650 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame)) 651 wol->wolopts &= ~WAKE_MAGIC; 652 653 if (!device_can_wakeup(priv->device)) 654 return -EINVAL; 655 656 if (wol->wolopts & ~support) 657 return -EINVAL; 658 659 if (wol->wolopts) { 660 pr_info("stmmac: wakeup enable\n"); 661 device_set_wakeup_enable(priv->device, 1); 662 enable_irq_wake(priv->wol_irq); 663 } else { 664 device_set_wakeup_enable(priv->device, 0); 665 disable_irq_wake(priv->wol_irq); 666 } 667 668 spin_lock_irq(&priv->lock); 669 priv->wolopts = wol->wolopts; 670 spin_unlock_irq(&priv->lock); 671 672 return 0; 673 } 674 675 static int stmmac_ethtool_op_get_eee(struct net_device *dev, 676 struct ethtool_eee *edata) 677 { 678 struct stmmac_priv *priv = netdev_priv(dev); 679 680 if (!priv->dma_cap.eee) 681 return -EOPNOTSUPP; 682 683 edata->eee_enabled = priv->eee_enabled; 684 edata->eee_active = priv->eee_active; 685 edata->tx_lpi_timer = priv->tx_lpi_timer; 686 687 return phy_ethtool_get_eee(dev->phydev, edata); 688 } 689 690 static int stmmac_ethtool_op_set_eee(struct net_device *dev, 691 struct ethtool_eee *edata) 692 { 693 struct stmmac_priv *priv = netdev_priv(dev); 694 695 priv->eee_enabled = edata->eee_enabled; 696 697 if (!priv->eee_enabled) 698 stmmac_disable_eee_mode(priv); 699 else { 700 /* We are asking for enabling the EEE but it is safe 701 * to verify all by invoking the eee_init function. 702 * In case of failure it will return an error. 703 */ 704 priv->eee_enabled = stmmac_eee_init(priv); 705 if (!priv->eee_enabled) 706 return -EOPNOTSUPP; 707 708 /* Do not change tx_lpi_timer in case of failure */ 709 priv->tx_lpi_timer = edata->tx_lpi_timer; 710 } 711 712 return phy_ethtool_set_eee(dev->phydev, edata); 713 } 714 715 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) 716 { 717 unsigned long clk = clk_get_rate(priv->stmmac_clk); 718 719 if (!clk) 720 return 0; 721 722 return (usec * (clk / 1000000)) / 256; 723 } 724 725 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) 726 { 727 unsigned long clk = clk_get_rate(priv->stmmac_clk); 728 729 if (!clk) 730 return 0; 731 732 return (riwt * 256) / (clk / 1000000); 733 } 734 735 static int stmmac_get_coalesce(struct net_device *dev, 736 struct ethtool_coalesce *ec) 737 { 738 struct stmmac_priv *priv = netdev_priv(dev); 739 740 ec->tx_coalesce_usecs = priv->tx_coal_timer; 741 ec->tx_max_coalesced_frames = priv->tx_coal_frames; 742 743 if (priv->use_riwt) 744 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv); 745 746 return 0; 747 } 748 749 static int stmmac_set_coalesce(struct net_device *dev, 750 struct ethtool_coalesce *ec) 751 { 752 struct stmmac_priv *priv = netdev_priv(dev); 753 unsigned int rx_riwt; 754 755 /* Check not supported parameters */ 756 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) || 757 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) || 758 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) || 759 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) || 760 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) || 761 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) || 762 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) || 763 (ec->rx_max_coalesced_frames_high) || 764 (ec->tx_max_coalesced_frames_irq) || 765 (ec->stats_block_coalesce_usecs) || 766 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval)) 767 return -EOPNOTSUPP; 768 769 if (ec->rx_coalesce_usecs == 0) 770 return -EINVAL; 771 772 if ((ec->tx_coalesce_usecs == 0) && 773 (ec->tx_max_coalesced_frames == 0)) 774 return -EINVAL; 775 776 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) || 777 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES)) 778 return -EINVAL; 779 780 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv); 781 782 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT)) 783 return -EINVAL; 784 else if (!priv->use_riwt) 785 return -EOPNOTSUPP; 786 787 /* Only copy relevant parameters, ignore all others. */ 788 priv->tx_coal_frames = ec->tx_max_coalesced_frames; 789 priv->tx_coal_timer = ec->tx_coalesce_usecs; 790 priv->rx_riwt = rx_riwt; 791 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt); 792 793 return 0; 794 } 795 796 static int stmmac_get_ts_info(struct net_device *dev, 797 struct ethtool_ts_info *info) 798 { 799 struct stmmac_priv *priv = netdev_priv(dev); 800 801 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) { 802 803 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 804 SOF_TIMESTAMPING_TX_HARDWARE | 805 SOF_TIMESTAMPING_RX_SOFTWARE | 806 SOF_TIMESTAMPING_RX_HARDWARE | 807 SOF_TIMESTAMPING_SOFTWARE | 808 SOF_TIMESTAMPING_RAW_HARDWARE; 809 810 if (priv->ptp_clock) 811 info->phc_index = ptp_clock_index(priv->ptp_clock); 812 813 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 814 815 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) | 816 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 817 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 818 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 819 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 820 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 821 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) | 822 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) | 823 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) | 824 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 825 (1 << HWTSTAMP_FILTER_ALL)); 826 return 0; 827 } else 828 return ethtool_op_get_ts_info(dev, info); 829 } 830 831 static int stmmac_get_tunable(struct net_device *dev, 832 const struct ethtool_tunable *tuna, void *data) 833 { 834 struct stmmac_priv *priv = netdev_priv(dev); 835 int ret = 0; 836 837 switch (tuna->id) { 838 case ETHTOOL_RX_COPYBREAK: 839 *(u32 *)data = priv->rx_copybreak; 840 break; 841 default: 842 ret = -EINVAL; 843 break; 844 } 845 846 return ret; 847 } 848 849 static int stmmac_set_tunable(struct net_device *dev, 850 const struct ethtool_tunable *tuna, 851 const void *data) 852 { 853 struct stmmac_priv *priv = netdev_priv(dev); 854 int ret = 0; 855 856 switch (tuna->id) { 857 case ETHTOOL_RX_COPYBREAK: 858 priv->rx_copybreak = *(u32 *)data; 859 break; 860 default: 861 ret = -EINVAL; 862 break; 863 } 864 865 return ret; 866 } 867 868 static const struct ethtool_ops stmmac_ethtool_ops = { 869 .begin = stmmac_check_if_running, 870 .get_drvinfo = stmmac_ethtool_getdrvinfo, 871 .get_msglevel = stmmac_ethtool_getmsglevel, 872 .set_msglevel = stmmac_ethtool_setmsglevel, 873 .get_regs = stmmac_ethtool_gregs, 874 .get_regs_len = stmmac_ethtool_get_regs_len, 875 .get_link = ethtool_op_get_link, 876 .nway_reset = phy_ethtool_nway_reset, 877 .get_pauseparam = stmmac_get_pauseparam, 878 .set_pauseparam = stmmac_set_pauseparam, 879 .get_ethtool_stats = stmmac_get_ethtool_stats, 880 .get_strings = stmmac_get_strings, 881 .get_wol = stmmac_get_wol, 882 .set_wol = stmmac_set_wol, 883 .get_eee = stmmac_ethtool_op_get_eee, 884 .set_eee = stmmac_ethtool_op_set_eee, 885 .get_sset_count = stmmac_get_sset_count, 886 .get_ts_info = stmmac_get_ts_info, 887 .get_coalesce = stmmac_get_coalesce, 888 .set_coalesce = stmmac_set_coalesce, 889 .get_tunable = stmmac_get_tunable, 890 .set_tunable = stmmac_set_tunable, 891 .get_link_ksettings = stmmac_ethtool_get_link_ksettings, 892 .set_link_ksettings = stmmac_ethtool_set_link_ksettings, 893 }; 894 895 void stmmac_set_ethtool_ops(struct net_device *netdev) 896 { 897 netdev->ethtool_ops = &stmmac_ethtool_ops; 898 } 899