1 /******************************************************************************* 2 STMMAC Ethtool support 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 23 *******************************************************************************/ 24 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/interrupt.h> 28 #include <linux/mii.h> 29 #include <linux/phy.h> 30 #include <linux/net_tstamp.h> 31 #include <asm/io.h> 32 33 #include "stmmac.h" 34 #include "dwmac_dma.h" 35 36 #define REG_SPACE_SIZE 0x1054 37 #define MAC100_ETHTOOL_NAME "st_mac100" 38 #define GMAC_ETHTOOL_NAME "st_gmac" 39 40 struct stmmac_stats { 41 char stat_string[ETH_GSTRING_LEN]; 42 int sizeof_stat; 43 int stat_offset; 44 }; 45 46 #define STMMAC_STAT(m) \ 47 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \ 48 offsetof(struct stmmac_priv, xstats.m)} 49 50 static const struct stmmac_stats stmmac_gstrings_stats[] = { 51 /* Transmit errors */ 52 STMMAC_STAT(tx_underflow), 53 STMMAC_STAT(tx_carrier), 54 STMMAC_STAT(tx_losscarrier), 55 STMMAC_STAT(vlan_tag), 56 STMMAC_STAT(tx_deferred), 57 STMMAC_STAT(tx_vlan), 58 STMMAC_STAT(tx_jabber), 59 STMMAC_STAT(tx_frame_flushed), 60 STMMAC_STAT(tx_payload_error), 61 STMMAC_STAT(tx_ip_header_error), 62 /* Receive errors */ 63 STMMAC_STAT(rx_desc), 64 STMMAC_STAT(sa_filter_fail), 65 STMMAC_STAT(overflow_error), 66 STMMAC_STAT(ipc_csum_error), 67 STMMAC_STAT(rx_collision), 68 STMMAC_STAT(rx_crc), 69 STMMAC_STAT(dribbling_bit), 70 STMMAC_STAT(rx_length), 71 STMMAC_STAT(rx_mii), 72 STMMAC_STAT(rx_multicast), 73 STMMAC_STAT(rx_gmac_overflow), 74 STMMAC_STAT(rx_watchdog), 75 STMMAC_STAT(da_rx_filter_fail), 76 STMMAC_STAT(sa_rx_filter_fail), 77 STMMAC_STAT(rx_missed_cntr), 78 STMMAC_STAT(rx_overflow_cntr), 79 STMMAC_STAT(rx_vlan), 80 /* Tx/Rx IRQ error info */ 81 STMMAC_STAT(tx_undeflow_irq), 82 STMMAC_STAT(tx_process_stopped_irq), 83 STMMAC_STAT(tx_jabber_irq), 84 STMMAC_STAT(rx_overflow_irq), 85 STMMAC_STAT(rx_buf_unav_irq), 86 STMMAC_STAT(rx_process_stopped_irq), 87 STMMAC_STAT(rx_watchdog_irq), 88 STMMAC_STAT(tx_early_irq), 89 STMMAC_STAT(fatal_bus_error_irq), 90 /* Tx/Rx IRQ Events */ 91 STMMAC_STAT(rx_early_irq), 92 STMMAC_STAT(threshold), 93 STMMAC_STAT(tx_pkt_n), 94 STMMAC_STAT(rx_pkt_n), 95 STMMAC_STAT(normal_irq_n), 96 STMMAC_STAT(rx_normal_irq_n), 97 STMMAC_STAT(napi_poll), 98 STMMAC_STAT(tx_normal_irq_n), 99 STMMAC_STAT(tx_clean), 100 STMMAC_STAT(tx_set_ic_bit), 101 STMMAC_STAT(irq_receive_pmt_irq_n), 102 /* MMC info */ 103 STMMAC_STAT(mmc_tx_irq_n), 104 STMMAC_STAT(mmc_rx_irq_n), 105 STMMAC_STAT(mmc_rx_csum_offload_irq_n), 106 /* EEE */ 107 STMMAC_STAT(irq_tx_path_in_lpi_mode_n), 108 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n), 109 STMMAC_STAT(irq_rx_path_in_lpi_mode_n), 110 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n), 111 STMMAC_STAT(phy_eee_wakeup_error_n), 112 /* Extended RDES status */ 113 STMMAC_STAT(ip_hdr_err), 114 STMMAC_STAT(ip_payload_err), 115 STMMAC_STAT(ip_csum_bypassed), 116 STMMAC_STAT(ipv4_pkt_rcvd), 117 STMMAC_STAT(ipv6_pkt_rcvd), 118 STMMAC_STAT(rx_msg_type_ext_no_ptp), 119 STMMAC_STAT(rx_msg_type_sync), 120 STMMAC_STAT(rx_msg_type_follow_up), 121 STMMAC_STAT(rx_msg_type_delay_req), 122 STMMAC_STAT(rx_msg_type_delay_resp), 123 STMMAC_STAT(rx_msg_type_pdelay_req), 124 STMMAC_STAT(rx_msg_type_pdelay_resp), 125 STMMAC_STAT(rx_msg_type_pdelay_follow_up), 126 STMMAC_STAT(ptp_frame_type), 127 STMMAC_STAT(ptp_ver), 128 STMMAC_STAT(timestamp_dropped), 129 STMMAC_STAT(av_pkt_rcvd), 130 STMMAC_STAT(av_tagged_pkt_rcvd), 131 STMMAC_STAT(vlan_tag_priority_val), 132 STMMAC_STAT(l3_filter_match), 133 STMMAC_STAT(l4_filter_match), 134 STMMAC_STAT(l3_l4_filter_no_match), 135 /* PCS */ 136 STMMAC_STAT(irq_pcs_ane_n), 137 STMMAC_STAT(irq_pcs_link_n), 138 STMMAC_STAT(irq_rgmii_n), 139 /* DEBUG */ 140 STMMAC_STAT(mtl_tx_status_fifo_full), 141 STMMAC_STAT(mtl_tx_fifo_not_empty), 142 STMMAC_STAT(mmtl_fifo_ctrl), 143 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write), 144 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait), 145 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read), 146 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle), 147 STMMAC_STAT(mac_tx_in_pause), 148 STMMAC_STAT(mac_tx_frame_ctrl_xfer), 149 STMMAC_STAT(mac_tx_frame_ctrl_idle), 150 STMMAC_STAT(mac_tx_frame_ctrl_wait), 151 STMMAC_STAT(mac_tx_frame_ctrl_pause), 152 STMMAC_STAT(mac_gmii_tx_proto_engine), 153 STMMAC_STAT(mtl_rx_fifo_fill_level_full), 154 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh), 155 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh), 156 STMMAC_STAT(mtl_rx_fifo_fill_level_empty), 157 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush), 158 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data), 159 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status), 160 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle), 161 STMMAC_STAT(mtl_rx_fifo_ctrl_active), 162 STMMAC_STAT(mac_rx_frame_ctrl_fifo), 163 STMMAC_STAT(mac_gmii_rx_proto_engine), 164 /* TSO */ 165 STMMAC_STAT(tx_tso_frames), 166 STMMAC_STAT(tx_tso_nfrags), 167 }; 168 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats) 169 170 /* HW MAC Management counters (if supported) */ 171 #define STMMAC_MMC_STAT(m) \ 172 { #m, FIELD_SIZEOF(struct stmmac_counters, m), \ 173 offsetof(struct stmmac_priv, mmc.m)} 174 175 static const struct stmmac_stats stmmac_mmc[] = { 176 STMMAC_MMC_STAT(mmc_tx_octetcount_gb), 177 STMMAC_MMC_STAT(mmc_tx_framecount_gb), 178 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g), 179 STMMAC_MMC_STAT(mmc_tx_multicastframe_g), 180 STMMAC_MMC_STAT(mmc_tx_64_octets_gb), 181 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb), 182 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb), 183 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb), 184 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb), 185 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb), 186 STMMAC_MMC_STAT(mmc_tx_unicast_gb), 187 STMMAC_MMC_STAT(mmc_tx_multicast_gb), 188 STMMAC_MMC_STAT(mmc_tx_broadcast_gb), 189 STMMAC_MMC_STAT(mmc_tx_underflow_error), 190 STMMAC_MMC_STAT(mmc_tx_singlecol_g), 191 STMMAC_MMC_STAT(mmc_tx_multicol_g), 192 STMMAC_MMC_STAT(mmc_tx_deferred), 193 STMMAC_MMC_STAT(mmc_tx_latecol), 194 STMMAC_MMC_STAT(mmc_tx_exesscol), 195 STMMAC_MMC_STAT(mmc_tx_carrier_error), 196 STMMAC_MMC_STAT(mmc_tx_octetcount_g), 197 STMMAC_MMC_STAT(mmc_tx_framecount_g), 198 STMMAC_MMC_STAT(mmc_tx_excessdef), 199 STMMAC_MMC_STAT(mmc_tx_pause_frame), 200 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g), 201 STMMAC_MMC_STAT(mmc_rx_framecount_gb), 202 STMMAC_MMC_STAT(mmc_rx_octetcount_gb), 203 STMMAC_MMC_STAT(mmc_rx_octetcount_g), 204 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), 205 STMMAC_MMC_STAT(mmc_rx_multicastframe_g), 206 STMMAC_MMC_STAT(mmc_rx_crc_error), 207 STMMAC_MMC_STAT(mmc_rx_align_error), 208 STMMAC_MMC_STAT(mmc_rx_run_error), 209 STMMAC_MMC_STAT(mmc_rx_jabber_error), 210 STMMAC_MMC_STAT(mmc_rx_undersize_g), 211 STMMAC_MMC_STAT(mmc_rx_oversize_g), 212 STMMAC_MMC_STAT(mmc_rx_64_octets_gb), 213 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb), 214 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb), 215 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb), 216 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb), 217 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb), 218 STMMAC_MMC_STAT(mmc_rx_unicast_g), 219 STMMAC_MMC_STAT(mmc_rx_length_error), 220 STMMAC_MMC_STAT(mmc_rx_autofrangetype), 221 STMMAC_MMC_STAT(mmc_rx_pause_frames), 222 STMMAC_MMC_STAT(mmc_rx_fifo_overflow), 223 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb), 224 STMMAC_MMC_STAT(mmc_rx_watchdog_error), 225 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask), 226 STMMAC_MMC_STAT(mmc_rx_ipc_intr), 227 STMMAC_MMC_STAT(mmc_rx_ipv4_gd), 228 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr), 229 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay), 230 STMMAC_MMC_STAT(mmc_rx_ipv4_frag), 231 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl), 232 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets), 233 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets), 234 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets), 235 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets), 236 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets), 237 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets), 238 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets), 239 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets), 240 STMMAC_MMC_STAT(mmc_rx_ipv6_gd), 241 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr), 242 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay), 243 STMMAC_MMC_STAT(mmc_rx_udp_gd), 244 STMMAC_MMC_STAT(mmc_rx_udp_err), 245 STMMAC_MMC_STAT(mmc_rx_tcp_gd), 246 STMMAC_MMC_STAT(mmc_rx_tcp_err), 247 STMMAC_MMC_STAT(mmc_rx_icmp_gd), 248 STMMAC_MMC_STAT(mmc_rx_icmp_err), 249 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets), 250 STMMAC_MMC_STAT(mmc_rx_udp_err_octets), 251 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets), 252 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets), 253 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets), 254 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets), 255 }; 256 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc) 257 258 static void stmmac_ethtool_getdrvinfo(struct net_device *dev, 259 struct ethtool_drvinfo *info) 260 { 261 struct stmmac_priv *priv = netdev_priv(dev); 262 263 if (priv->plat->has_gmac) 264 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver)); 265 else 266 strlcpy(info->driver, MAC100_ETHTOOL_NAME, 267 sizeof(info->driver)); 268 269 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); 270 } 271 272 static int stmmac_ethtool_getsettings(struct net_device *dev, 273 struct ethtool_cmd *cmd) 274 { 275 struct stmmac_priv *priv = netdev_priv(dev); 276 struct phy_device *phy = priv->phydev; 277 int rc; 278 279 if ((priv->pcs & STMMAC_PCS_RGMII) || (priv->pcs & STMMAC_PCS_SGMII)) { 280 struct rgmii_adv adv; 281 282 if (!priv->xstats.pcs_link) { 283 ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN); 284 cmd->duplex = DUPLEX_UNKNOWN; 285 return 0; 286 } 287 cmd->duplex = priv->xstats.pcs_duplex; 288 289 ethtool_cmd_speed_set(cmd, priv->xstats.pcs_speed); 290 291 /* Get and convert ADV/LP_ADV from the HW AN registers */ 292 if (!priv->hw->mac->get_adv) 293 return -EOPNOTSUPP; /* should never happen indeed */ 294 295 priv->hw->mac->get_adv(priv->hw, &adv); 296 297 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */ 298 299 if (adv.pause & STMMAC_PCS_PAUSE) 300 cmd->advertising |= ADVERTISED_Pause; 301 if (adv.pause & STMMAC_PCS_ASYM_PAUSE) 302 cmd->advertising |= ADVERTISED_Asym_Pause; 303 if (adv.lp_pause & STMMAC_PCS_PAUSE) 304 cmd->lp_advertising |= ADVERTISED_Pause; 305 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE) 306 cmd->lp_advertising |= ADVERTISED_Asym_Pause; 307 308 /* Reg49[3] always set because ANE is always supported */ 309 cmd->autoneg = ADVERTISED_Autoneg; 310 cmd->supported |= SUPPORTED_Autoneg; 311 cmd->advertising |= ADVERTISED_Autoneg; 312 cmd->lp_advertising |= ADVERTISED_Autoneg; 313 314 if (adv.duplex) { 315 cmd->supported |= (SUPPORTED_1000baseT_Full | 316 SUPPORTED_100baseT_Full | 317 SUPPORTED_10baseT_Full); 318 cmd->advertising |= (ADVERTISED_1000baseT_Full | 319 ADVERTISED_100baseT_Full | 320 ADVERTISED_10baseT_Full); 321 } else { 322 cmd->supported |= (SUPPORTED_1000baseT_Half | 323 SUPPORTED_100baseT_Half | 324 SUPPORTED_10baseT_Half); 325 cmd->advertising |= (ADVERTISED_1000baseT_Half | 326 ADVERTISED_100baseT_Half | 327 ADVERTISED_10baseT_Half); 328 } 329 if (adv.lp_duplex) 330 cmd->lp_advertising |= (ADVERTISED_1000baseT_Full | 331 ADVERTISED_100baseT_Full | 332 ADVERTISED_10baseT_Full); 333 else 334 cmd->lp_advertising |= (ADVERTISED_1000baseT_Half | 335 ADVERTISED_100baseT_Half | 336 ADVERTISED_10baseT_Half); 337 cmd->port = PORT_OTHER; 338 339 return 0; 340 } 341 342 if (phy == NULL) { 343 pr_err("%s: %s: PHY is not registered\n", 344 __func__, dev->name); 345 return -ENODEV; 346 } 347 if (!netif_running(dev)) { 348 pr_err("%s: interface is disabled: we cannot track " 349 "link speed / duplex setting\n", dev->name); 350 return -EBUSY; 351 } 352 cmd->transceiver = XCVR_INTERNAL; 353 rc = phy_ethtool_gset(phy, cmd); 354 return rc; 355 } 356 357 static int stmmac_ethtool_setsettings(struct net_device *dev, 358 struct ethtool_cmd *cmd) 359 { 360 struct stmmac_priv *priv = netdev_priv(dev); 361 struct phy_device *phy = priv->phydev; 362 int rc; 363 364 if ((priv->pcs & STMMAC_PCS_RGMII) || (priv->pcs & STMMAC_PCS_SGMII)) { 365 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause; 366 367 /* Only support ANE */ 368 if (cmd->autoneg != AUTONEG_ENABLE) 369 return -EINVAL; 370 371 mask &= (ADVERTISED_1000baseT_Half | 372 ADVERTISED_1000baseT_Full | 373 ADVERTISED_100baseT_Half | 374 ADVERTISED_100baseT_Full | 375 ADVERTISED_10baseT_Half | 376 ADVERTISED_10baseT_Full); 377 378 spin_lock(&priv->lock); 379 if (priv->hw->mac->ctrl_ane) 380 priv->hw->mac->ctrl_ane(priv->hw, 1); 381 spin_unlock(&priv->lock); 382 383 return 0; 384 } 385 386 spin_lock(&priv->lock); 387 rc = phy_ethtool_sset(phy, cmd); 388 spin_unlock(&priv->lock); 389 390 return rc; 391 } 392 393 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev) 394 { 395 struct stmmac_priv *priv = netdev_priv(dev); 396 return priv->msg_enable; 397 } 398 399 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level) 400 { 401 struct stmmac_priv *priv = netdev_priv(dev); 402 priv->msg_enable = level; 403 404 } 405 406 static int stmmac_check_if_running(struct net_device *dev) 407 { 408 if (!netif_running(dev)) 409 return -EBUSY; 410 return 0; 411 } 412 413 static int stmmac_ethtool_get_regs_len(struct net_device *dev) 414 { 415 return REG_SPACE_SIZE; 416 } 417 418 static void stmmac_ethtool_gregs(struct net_device *dev, 419 struct ethtool_regs *regs, void *space) 420 { 421 int i; 422 u32 *reg_space = (u32 *) space; 423 424 struct stmmac_priv *priv = netdev_priv(dev); 425 426 memset(reg_space, 0x0, REG_SPACE_SIZE); 427 428 if (!priv->plat->has_gmac) { 429 /* MAC registers */ 430 for (i = 0; i < 12; i++) 431 reg_space[i] = readl(priv->ioaddr + (i * 4)); 432 /* DMA registers */ 433 for (i = 0; i < 9; i++) 434 reg_space[i + 12] = 435 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 436 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR); 437 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR); 438 } else { 439 /* MAC registers */ 440 for (i = 0; i < 55; i++) 441 reg_space[i] = readl(priv->ioaddr + (i * 4)); 442 /* DMA registers */ 443 for (i = 0; i < 22; i++) 444 reg_space[i + 55] = 445 readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); 446 } 447 } 448 449 static void 450 stmmac_get_pauseparam(struct net_device *netdev, 451 struct ethtool_pauseparam *pause) 452 { 453 struct stmmac_priv *priv = netdev_priv(netdev); 454 455 if (priv->pcs) /* FIXME */ 456 return; 457 458 pause->rx_pause = 0; 459 pause->tx_pause = 0; 460 pause->autoneg = priv->phydev->autoneg; 461 462 if (priv->flow_ctrl & FLOW_RX) 463 pause->rx_pause = 1; 464 if (priv->flow_ctrl & FLOW_TX) 465 pause->tx_pause = 1; 466 467 } 468 469 static int 470 stmmac_set_pauseparam(struct net_device *netdev, 471 struct ethtool_pauseparam *pause) 472 { 473 struct stmmac_priv *priv = netdev_priv(netdev); 474 struct phy_device *phy = priv->phydev; 475 int new_pause = FLOW_OFF; 476 int ret = 0; 477 478 if (priv->pcs) /* FIXME */ 479 return -EOPNOTSUPP; 480 481 if (pause->rx_pause) 482 new_pause |= FLOW_RX; 483 if (pause->tx_pause) 484 new_pause |= FLOW_TX; 485 486 priv->flow_ctrl = new_pause; 487 phy->autoneg = pause->autoneg; 488 489 if (phy->autoneg) { 490 if (netif_running(netdev)) 491 ret = phy_start_aneg(phy); 492 } else 493 priv->hw->mac->flow_ctrl(priv->hw, phy->duplex, 494 priv->flow_ctrl, priv->pause); 495 return ret; 496 } 497 498 static void stmmac_get_ethtool_stats(struct net_device *dev, 499 struct ethtool_stats *dummy, u64 *data) 500 { 501 struct stmmac_priv *priv = netdev_priv(dev); 502 int i, j = 0; 503 504 /* Update the DMA HW counters for dwmac10/100 */ 505 if (priv->hw->dma->dma_diagnostic_fr) 506 priv->hw->dma->dma_diagnostic_fr(&dev->stats, 507 (void *) &priv->xstats, 508 priv->ioaddr); 509 else { 510 /* If supported, for new GMAC chips expose the MMC counters */ 511 if (priv->dma_cap.rmon) { 512 dwmac_mmc_read(priv->mmcaddr, &priv->mmc); 513 514 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 515 char *p; 516 p = (char *)priv + stmmac_mmc[i].stat_offset; 517 518 data[j++] = (stmmac_mmc[i].sizeof_stat == 519 sizeof(u64)) ? (*(u64 *)p) : 520 (*(u32 *)p); 521 } 522 } 523 if (priv->eee_enabled) { 524 int val = phy_get_eee_err(priv->phydev); 525 if (val) 526 priv->xstats.phy_eee_wakeup_error_n = val; 527 } 528 529 if ((priv->hw->mac->debug) && 530 (priv->synopsys_id >= DWMAC_CORE_3_50)) 531 priv->hw->mac->debug(priv->ioaddr, 532 (void *)&priv->xstats); 533 } 534 for (i = 0; i < STMMAC_STATS_LEN; i++) { 535 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset; 536 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat == 537 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p); 538 } 539 } 540 541 static int stmmac_get_sset_count(struct net_device *netdev, int sset) 542 { 543 struct stmmac_priv *priv = netdev_priv(netdev); 544 int len; 545 546 switch (sset) { 547 case ETH_SS_STATS: 548 len = STMMAC_STATS_LEN; 549 550 if (priv->dma_cap.rmon) 551 len += STMMAC_MMC_STATS_LEN; 552 553 return len; 554 default: 555 return -EOPNOTSUPP; 556 } 557 } 558 559 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data) 560 { 561 int i; 562 u8 *p = data; 563 struct stmmac_priv *priv = netdev_priv(dev); 564 565 switch (stringset) { 566 case ETH_SS_STATS: 567 if (priv->dma_cap.rmon) 568 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) { 569 memcpy(p, stmmac_mmc[i].stat_string, 570 ETH_GSTRING_LEN); 571 p += ETH_GSTRING_LEN; 572 } 573 for (i = 0; i < STMMAC_STATS_LEN; i++) { 574 memcpy(p, stmmac_gstrings_stats[i].stat_string, 575 ETH_GSTRING_LEN); 576 p += ETH_GSTRING_LEN; 577 } 578 break; 579 default: 580 WARN_ON(1); 581 break; 582 } 583 } 584 585 /* Currently only support WOL through Magic packet. */ 586 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 587 { 588 struct stmmac_priv *priv = netdev_priv(dev); 589 590 spin_lock_irq(&priv->lock); 591 if (device_can_wakeup(priv->device)) { 592 wol->supported = WAKE_MAGIC | WAKE_UCAST; 593 wol->wolopts = priv->wolopts; 594 } 595 spin_unlock_irq(&priv->lock); 596 } 597 598 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 599 { 600 struct stmmac_priv *priv = netdev_priv(dev); 601 u32 support = WAKE_MAGIC | WAKE_UCAST; 602 603 /* By default almost all GMAC devices support the WoL via 604 * magic frame but we can disable it if the HW capability 605 * register shows no support for pmt_magic_frame. */ 606 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame)) 607 wol->wolopts &= ~WAKE_MAGIC; 608 609 if (!device_can_wakeup(priv->device)) 610 return -EINVAL; 611 612 if (wol->wolopts & ~support) 613 return -EINVAL; 614 615 if (wol->wolopts) { 616 pr_info("stmmac: wakeup enable\n"); 617 device_set_wakeup_enable(priv->device, 1); 618 enable_irq_wake(priv->wol_irq); 619 } else { 620 device_set_wakeup_enable(priv->device, 0); 621 disable_irq_wake(priv->wol_irq); 622 } 623 624 spin_lock_irq(&priv->lock); 625 priv->wolopts = wol->wolopts; 626 spin_unlock_irq(&priv->lock); 627 628 return 0; 629 } 630 631 static int stmmac_ethtool_op_get_eee(struct net_device *dev, 632 struct ethtool_eee *edata) 633 { 634 struct stmmac_priv *priv = netdev_priv(dev); 635 636 if (!priv->dma_cap.eee) 637 return -EOPNOTSUPP; 638 639 edata->eee_enabled = priv->eee_enabled; 640 edata->eee_active = priv->eee_active; 641 edata->tx_lpi_timer = priv->tx_lpi_timer; 642 643 return phy_ethtool_get_eee(priv->phydev, edata); 644 } 645 646 static int stmmac_ethtool_op_set_eee(struct net_device *dev, 647 struct ethtool_eee *edata) 648 { 649 struct stmmac_priv *priv = netdev_priv(dev); 650 651 priv->eee_enabled = edata->eee_enabled; 652 653 if (!priv->eee_enabled) 654 stmmac_disable_eee_mode(priv); 655 else { 656 /* We are asking for enabling the EEE but it is safe 657 * to verify all by invoking the eee_init function. 658 * In case of failure it will return an error. 659 */ 660 priv->eee_enabled = stmmac_eee_init(priv); 661 if (!priv->eee_enabled) 662 return -EOPNOTSUPP; 663 664 /* Do not change tx_lpi_timer in case of failure */ 665 priv->tx_lpi_timer = edata->tx_lpi_timer; 666 } 667 668 return phy_ethtool_set_eee(priv->phydev, edata); 669 } 670 671 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) 672 { 673 unsigned long clk = clk_get_rate(priv->stmmac_clk); 674 675 if (!clk) 676 return 0; 677 678 return (usec * (clk / 1000000)) / 256; 679 } 680 681 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) 682 { 683 unsigned long clk = clk_get_rate(priv->stmmac_clk); 684 685 if (!clk) 686 return 0; 687 688 return (riwt * 256) / (clk / 1000000); 689 } 690 691 static int stmmac_get_coalesce(struct net_device *dev, 692 struct ethtool_coalesce *ec) 693 { 694 struct stmmac_priv *priv = netdev_priv(dev); 695 696 ec->tx_coalesce_usecs = priv->tx_coal_timer; 697 ec->tx_max_coalesced_frames = priv->tx_coal_frames; 698 699 if (priv->use_riwt) 700 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv); 701 702 return 0; 703 } 704 705 static int stmmac_set_coalesce(struct net_device *dev, 706 struct ethtool_coalesce *ec) 707 { 708 struct stmmac_priv *priv = netdev_priv(dev); 709 unsigned int rx_riwt; 710 711 /* Check not supported parameters */ 712 if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) || 713 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) || 714 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) || 715 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) || 716 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) || 717 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) || 718 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) || 719 (ec->rx_max_coalesced_frames_high) || 720 (ec->tx_max_coalesced_frames_irq) || 721 (ec->stats_block_coalesce_usecs) || 722 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval)) 723 return -EOPNOTSUPP; 724 725 if (ec->rx_coalesce_usecs == 0) 726 return -EINVAL; 727 728 if ((ec->tx_coalesce_usecs == 0) && 729 (ec->tx_max_coalesced_frames == 0)) 730 return -EINVAL; 731 732 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) || 733 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES)) 734 return -EINVAL; 735 736 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv); 737 738 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT)) 739 return -EINVAL; 740 else if (!priv->use_riwt) 741 return -EOPNOTSUPP; 742 743 /* Only copy relevant parameters, ignore all others. */ 744 priv->tx_coal_frames = ec->tx_max_coalesced_frames; 745 priv->tx_coal_timer = ec->tx_coalesce_usecs; 746 priv->rx_riwt = rx_riwt; 747 priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt); 748 749 return 0; 750 } 751 752 static int stmmac_get_ts_info(struct net_device *dev, 753 struct ethtool_ts_info *info) 754 { 755 struct stmmac_priv *priv = netdev_priv(dev); 756 757 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) { 758 759 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 760 SOF_TIMESTAMPING_TX_HARDWARE | 761 SOF_TIMESTAMPING_RX_SOFTWARE | 762 SOF_TIMESTAMPING_RX_HARDWARE | 763 SOF_TIMESTAMPING_SOFTWARE | 764 SOF_TIMESTAMPING_RAW_HARDWARE; 765 766 if (priv->ptp_clock) 767 info->phc_index = ptp_clock_index(priv->ptp_clock); 768 769 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); 770 771 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) | 772 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | 773 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 774 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 775 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 776 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 777 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) | 778 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) | 779 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) | 780 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | 781 (1 << HWTSTAMP_FILTER_ALL)); 782 return 0; 783 } else 784 return ethtool_op_get_ts_info(dev, info); 785 } 786 787 static int stmmac_get_tunable(struct net_device *dev, 788 const struct ethtool_tunable *tuna, void *data) 789 { 790 struct stmmac_priv *priv = netdev_priv(dev); 791 int ret = 0; 792 793 switch (tuna->id) { 794 case ETHTOOL_RX_COPYBREAK: 795 *(u32 *)data = priv->rx_copybreak; 796 break; 797 default: 798 ret = -EINVAL; 799 break; 800 } 801 802 return ret; 803 } 804 805 static int stmmac_set_tunable(struct net_device *dev, 806 const struct ethtool_tunable *tuna, 807 const void *data) 808 { 809 struct stmmac_priv *priv = netdev_priv(dev); 810 int ret = 0; 811 812 switch (tuna->id) { 813 case ETHTOOL_RX_COPYBREAK: 814 priv->rx_copybreak = *(u32 *)data; 815 break; 816 default: 817 ret = -EINVAL; 818 break; 819 } 820 821 return ret; 822 } 823 824 static const struct ethtool_ops stmmac_ethtool_ops = { 825 .begin = stmmac_check_if_running, 826 .get_drvinfo = stmmac_ethtool_getdrvinfo, 827 .get_settings = stmmac_ethtool_getsettings, 828 .set_settings = stmmac_ethtool_setsettings, 829 .get_msglevel = stmmac_ethtool_getmsglevel, 830 .set_msglevel = stmmac_ethtool_setmsglevel, 831 .get_regs = stmmac_ethtool_gregs, 832 .get_regs_len = stmmac_ethtool_get_regs_len, 833 .get_link = ethtool_op_get_link, 834 .get_pauseparam = stmmac_get_pauseparam, 835 .set_pauseparam = stmmac_set_pauseparam, 836 .get_ethtool_stats = stmmac_get_ethtool_stats, 837 .get_strings = stmmac_get_strings, 838 .get_wol = stmmac_get_wol, 839 .set_wol = stmmac_set_wol, 840 .get_eee = stmmac_ethtool_op_get_eee, 841 .set_eee = stmmac_ethtool_op_set_eee, 842 .get_sset_count = stmmac_get_sset_count, 843 .get_ts_info = stmmac_get_ts_info, 844 .get_coalesce = stmmac_get_coalesce, 845 .set_coalesce = stmmac_set_coalesce, 846 .get_tunable = stmmac_get_tunable, 847 .set_tunable = stmmac_set_tunable, 848 }; 849 850 void stmmac_set_ethtool_ops(struct net_device *netdev) 851 { 852 netdev->ethtool_ops = &stmmac_ethtool_ops; 853 } 854