1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Copyright (C) 2007-2009 STMicroelectronics Ltd 4 5 6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 7 *******************************************************************************/ 8 9 #ifndef __STMMAC_H__ 10 #define __STMMAC_H__ 11 12 #define STMMAC_RESOURCE_NAME "stmmaceth" 13 #define DRV_MODULE_VERSION "Jan_2016" 14 15 #include <linux/clk.h> 16 #include <linux/if_vlan.h> 17 #include <linux/stmmac.h> 18 #include <linux/phylink.h> 19 #include <linux/pci.h> 20 #include "common.h" 21 #include <linux/ptp_clock_kernel.h> 22 #include <linux/net_tstamp.h> 23 #include <linux/reset.h> 24 #include <net/page_pool.h> 25 26 struct stmmac_resources { 27 void __iomem *addr; 28 const char *mac; 29 int wol_irq; 30 int lpi_irq; 31 int irq; 32 }; 33 34 struct stmmac_tx_info { 35 dma_addr_t buf; 36 bool map_as_page; 37 unsigned len; 38 bool last_segment; 39 bool is_jumbo; 40 }; 41 42 /* Frequently used values are kept adjacent for cache effect */ 43 struct stmmac_tx_queue { 44 u32 tx_count_frames; 45 struct timer_list txtimer; 46 u32 queue_index; 47 struct stmmac_priv *priv_data; 48 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 49 struct dma_desc *dma_tx; 50 struct sk_buff **tx_skbuff; 51 struct stmmac_tx_info *tx_skbuff_dma; 52 unsigned int cur_tx; 53 unsigned int dirty_tx; 54 dma_addr_t dma_tx_phy; 55 u32 tx_tail_addr; 56 u32 mss; 57 }; 58 59 struct stmmac_rx_buffer { 60 struct page *page; 61 dma_addr_t addr; 62 }; 63 64 struct stmmac_rx_queue { 65 u32 rx_count_frames; 66 u32 queue_index; 67 struct page_pool *page_pool; 68 struct stmmac_rx_buffer *buf_pool; 69 struct stmmac_priv *priv_data; 70 struct dma_extended_desc *dma_erx; 71 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 72 unsigned int cur_rx; 73 unsigned int dirty_rx; 74 u32 rx_zeroc_thresh; 75 dma_addr_t dma_rx_phy; 76 u32 rx_tail_addr; 77 unsigned int state_saved; 78 struct { 79 struct sk_buff *skb; 80 unsigned int len; 81 unsigned int error; 82 } state; 83 }; 84 85 struct stmmac_channel { 86 struct napi_struct rx_napi ____cacheline_aligned_in_smp; 87 struct napi_struct tx_napi ____cacheline_aligned_in_smp; 88 struct stmmac_priv *priv_data; 89 u32 index; 90 }; 91 92 struct stmmac_tc_entry { 93 bool in_use; 94 bool in_hw; 95 bool is_last; 96 bool is_frag; 97 void *frag_ptr; 98 unsigned int table_pos; 99 u32 handle; 100 u32 prio; 101 struct { 102 u32 match_data; 103 u32 match_en; 104 u8 af:1; 105 u8 rf:1; 106 u8 im:1; 107 u8 nc:1; 108 u8 res1:4; 109 u8 frame_offset; 110 u8 ok_index; 111 u8 dma_ch_no; 112 u32 res2; 113 } __packed val; 114 }; 115 116 #define STMMAC_PPS_MAX 4 117 struct stmmac_pps_cfg { 118 bool available; 119 struct timespec64 start; 120 struct timespec64 period; 121 }; 122 123 struct stmmac_rss { 124 int enable; 125 u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 126 u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 127 }; 128 129 struct stmmac_priv { 130 /* Frequently used values are kept adjacent for cache effect */ 131 u32 tx_coal_frames; 132 u32 tx_coal_timer; 133 u32 rx_coal_frames; 134 135 int tx_coalesce; 136 int hwts_tx_en; 137 bool tx_path_in_lpi_mode; 138 bool tso; 139 140 unsigned int dma_buf_sz; 141 unsigned int rx_copybreak; 142 u32 rx_riwt; 143 int hwts_rx_en; 144 145 void __iomem *ioaddr; 146 struct net_device *dev; 147 struct device *device; 148 struct mac_device_info *hw; 149 int (*hwif_quirks)(struct stmmac_priv *priv); 150 struct mutex lock; 151 152 /* RX Queue */ 153 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 154 155 /* TX Queue */ 156 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 157 158 /* Generic channel for NAPI */ 159 struct stmmac_channel channel[STMMAC_CH_MAX]; 160 161 int speed; 162 unsigned int flow_ctrl; 163 unsigned int pause; 164 struct mii_bus *mii; 165 int mii_irq[PHY_MAX_ADDR]; 166 167 struct phylink_config phylink_config; 168 struct phylink *phylink; 169 170 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 171 struct stmmac_safety_stats sstats; 172 struct plat_stmmacenet_data *plat; 173 struct dma_features dma_cap; 174 struct stmmac_counters mmc; 175 int hw_cap_support; 176 int synopsys_id; 177 u32 msg_enable; 178 int wolopts; 179 int wol_irq; 180 int clk_csr; 181 struct timer_list eee_ctrl_timer; 182 int lpi_irq; 183 int eee_enabled; 184 int eee_active; 185 int tx_lpi_timer; 186 unsigned int mode; 187 unsigned int chain_mode; 188 int extend_desc; 189 struct hwtstamp_config tstamp_config; 190 struct ptp_clock *ptp_clock; 191 struct ptp_clock_info ptp_clock_ops; 192 unsigned int default_addend; 193 u32 sub_second_inc; 194 u32 systime_flags; 195 u32 adv_ts; 196 int use_riwt; 197 int irq_wake; 198 spinlock_t ptp_lock; 199 void __iomem *mmcaddr; 200 void __iomem *ptpaddr; 201 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 202 203 #ifdef CONFIG_DEBUG_FS 204 struct dentry *dbgfs_dir; 205 #endif 206 207 unsigned long state; 208 struct workqueue_struct *wq; 209 struct work_struct service_task; 210 211 /* TC Handling */ 212 unsigned int tc_entries_max; 213 unsigned int tc_off_max; 214 struct stmmac_tc_entry *tc_entries; 215 216 /* Pulse Per Second output */ 217 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 218 219 /* Receive Side Scaling */ 220 struct stmmac_rss rss; 221 }; 222 223 enum stmmac_state { 224 STMMAC_DOWN, 225 STMMAC_RESET_REQUESTED, 226 STMMAC_RESETING, 227 STMMAC_SERVICE_SCHED, 228 }; 229 230 int stmmac_mdio_unregister(struct net_device *ndev); 231 int stmmac_mdio_register(struct net_device *ndev); 232 int stmmac_mdio_reset(struct mii_bus *mii); 233 void stmmac_set_ethtool_ops(struct net_device *netdev); 234 235 void stmmac_ptp_register(struct stmmac_priv *priv); 236 void stmmac_ptp_unregister(struct stmmac_priv *priv); 237 int stmmac_resume(struct device *dev); 238 int stmmac_suspend(struct device *dev); 239 int stmmac_dvr_remove(struct device *dev); 240 int stmmac_dvr_probe(struct device *device, 241 struct plat_stmmacenet_data *plat_dat, 242 struct stmmac_resources *res); 243 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 244 bool stmmac_eee_init(struct stmmac_priv *priv); 245 246 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 247 void stmmac_selftest_run(struct net_device *dev, 248 struct ethtool_test *etest, u64 *buf); 249 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 250 int stmmac_selftest_get_count(struct stmmac_priv *priv); 251 #else 252 static inline void stmmac_selftest_run(struct net_device *dev, 253 struct ethtool_test *etest, u64 *buf) 254 { 255 /* Not enabled */ 256 } 257 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 258 u8 *data) 259 { 260 /* Not enabled */ 261 } 262 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 263 { 264 return -EOPNOTSUPP; 265 } 266 #endif /* CONFIG_STMMAC_SELFTESTS */ 267 268 #endif /* __STMMAC_H__ */ 269