1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /******************************************************************************* 3 Copyright (C) 2007-2009 STMicroelectronics Ltd 4 5 6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 7 *******************************************************************************/ 8 9 #ifndef __STMMAC_H__ 10 #define __STMMAC_H__ 11 12 #define STMMAC_RESOURCE_NAME "stmmaceth" 13 14 #include <linux/clk.h> 15 #include <linux/hrtimer.h> 16 #include <linux/if_vlan.h> 17 #include <linux/stmmac.h> 18 #include <linux/phylink.h> 19 #include <linux/pci.h> 20 #include "common.h" 21 #include <linux/ptp_clock_kernel.h> 22 #include <linux/net_tstamp.h> 23 #include <linux/reset.h> 24 #include <net/page_pool.h> 25 #include <net/xdp.h> 26 #include <uapi/linux/bpf.h> 27 28 struct stmmac_resources { 29 void __iomem *addr; 30 u8 mac[ETH_ALEN]; 31 int wol_irq; 32 int lpi_irq; 33 int irq; 34 int sfty_ce_irq; 35 int sfty_ue_irq; 36 int rx_irq[MTL_MAX_RX_QUEUES]; 37 int tx_irq[MTL_MAX_TX_QUEUES]; 38 }; 39 40 enum stmmac_txbuf_type { 41 STMMAC_TXBUF_T_SKB, 42 STMMAC_TXBUF_T_XDP_TX, 43 STMMAC_TXBUF_T_XDP_NDO, 44 STMMAC_TXBUF_T_XSK_TX, 45 }; 46 47 struct stmmac_tx_info { 48 dma_addr_t buf; 49 bool map_as_page; 50 unsigned len; 51 bool last_segment; 52 bool is_jumbo; 53 enum stmmac_txbuf_type buf_type; 54 }; 55 56 #define STMMAC_TBS_AVAIL BIT(0) 57 #define STMMAC_TBS_EN BIT(1) 58 59 /* Frequently used values are kept adjacent for cache effect */ 60 struct stmmac_tx_queue { 61 u32 tx_count_frames; 62 int tbs; 63 struct hrtimer txtimer; 64 u32 queue_index; 65 struct stmmac_priv *priv_data; 66 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 67 struct dma_edesc *dma_entx; 68 struct dma_desc *dma_tx; 69 union { 70 struct sk_buff **tx_skbuff; 71 struct xdp_frame **xdpf; 72 }; 73 struct stmmac_tx_info *tx_skbuff_dma; 74 struct xsk_buff_pool *xsk_pool; 75 u32 xsk_frames_done; 76 unsigned int cur_tx; 77 unsigned int dirty_tx; 78 dma_addr_t dma_tx_phy; 79 dma_addr_t tx_tail_addr; 80 u32 mss; 81 struct stmmac_txq_stats txq_stats; 82 }; 83 84 struct stmmac_rx_buffer { 85 union { 86 struct { 87 struct page *page; 88 dma_addr_t addr; 89 __u32 page_offset; 90 }; 91 struct xdp_buff *xdp; 92 }; 93 struct page *sec_page; 94 dma_addr_t sec_addr; 95 }; 96 97 struct stmmac_xdp_buff { 98 struct xdp_buff xdp; 99 struct stmmac_priv *priv; 100 struct dma_desc *desc; 101 struct dma_desc *ndesc; 102 }; 103 104 struct stmmac_rx_queue { 105 u32 rx_count_frames; 106 u32 queue_index; 107 struct xdp_rxq_info xdp_rxq; 108 struct xsk_buff_pool *xsk_pool; 109 struct page_pool *page_pool; 110 struct stmmac_rx_buffer *buf_pool; 111 struct stmmac_priv *priv_data; 112 struct dma_extended_desc *dma_erx; 113 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 114 unsigned int cur_rx; 115 unsigned int dirty_rx; 116 unsigned int buf_alloc_num; 117 u32 rx_zeroc_thresh; 118 dma_addr_t dma_rx_phy; 119 u32 rx_tail_addr; 120 unsigned int state_saved; 121 struct { 122 struct sk_buff *skb; 123 unsigned int len; 124 unsigned int error; 125 } state; 126 struct stmmac_rxq_stats rxq_stats; 127 }; 128 129 struct stmmac_channel { 130 struct napi_struct rx_napi ____cacheline_aligned_in_smp; 131 struct napi_struct tx_napi ____cacheline_aligned_in_smp; 132 struct napi_struct rxtx_napi ____cacheline_aligned_in_smp; 133 struct stmmac_priv *priv_data; 134 spinlock_t lock; 135 u32 index; 136 }; 137 138 struct stmmac_tc_entry { 139 bool in_use; 140 bool in_hw; 141 bool is_last; 142 bool is_frag; 143 void *frag_ptr; 144 unsigned int table_pos; 145 u32 handle; 146 u32 prio; 147 struct { 148 u32 match_data; 149 u32 match_en; 150 u8 af:1; 151 u8 rf:1; 152 u8 im:1; 153 u8 nc:1; 154 u8 res1:4; 155 u8 frame_offset; 156 u8 ok_index; 157 u8 dma_ch_no; 158 u32 res2; 159 } __packed val; 160 }; 161 162 #define STMMAC_PPS_MAX 4 163 struct stmmac_pps_cfg { 164 bool available; 165 struct timespec64 start; 166 struct timespec64 period; 167 }; 168 169 struct stmmac_rss { 170 int enable; 171 u8 key[STMMAC_RSS_HASH_KEY_SIZE]; 172 u32 table[STMMAC_RSS_MAX_TABLE_SIZE]; 173 }; 174 175 #define STMMAC_FLOW_ACTION_DROP BIT(0) 176 struct stmmac_flow_entry { 177 unsigned long cookie; 178 unsigned long action; 179 u8 ip_proto; 180 int in_use; 181 int idx; 182 int is_l4; 183 }; 184 185 /* Rx Frame Steering */ 186 enum stmmac_rfs_type { 187 STMMAC_RFS_T_VLAN, 188 STMMAC_RFS_T_LLDP, 189 STMMAC_RFS_T_1588, 190 STMMAC_RFS_T_MAX, 191 }; 192 193 struct stmmac_rfs_entry { 194 unsigned long cookie; 195 u16 etype; 196 int in_use; 197 int type; 198 int tc; 199 }; 200 201 struct stmmac_dma_conf { 202 unsigned int dma_buf_sz; 203 204 /* RX Queue */ 205 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 206 unsigned int dma_rx_size; 207 208 /* TX Queue */ 209 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 210 unsigned int dma_tx_size; 211 }; 212 213 struct stmmac_priv { 214 /* Frequently used values are kept adjacent for cache effect */ 215 u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; 216 u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; 217 u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; 218 219 int hwts_tx_en; 220 bool tx_path_in_lpi_mode; 221 bool tso; 222 int sph; 223 int sph_cap; 224 u32 sarc_type; 225 226 unsigned int rx_copybreak; 227 u32 rx_riwt[MTL_MAX_TX_QUEUES]; 228 int hwts_rx_en; 229 230 void __iomem *ioaddr; 231 struct net_device *dev; 232 struct device *device; 233 struct mac_device_info *hw; 234 int (*hwif_quirks)(struct stmmac_priv *priv); 235 struct mutex lock; 236 237 struct stmmac_dma_conf dma_conf; 238 239 /* Generic channel for NAPI */ 240 struct stmmac_channel channel[STMMAC_CH_MAX]; 241 242 int speed; 243 unsigned int flow_ctrl; 244 unsigned int pause; 245 struct mii_bus *mii; 246 247 struct phylink_config phylink_config; 248 struct phylink *phylink; 249 250 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 251 struct stmmac_safety_stats sstats; 252 struct plat_stmmacenet_data *plat; 253 struct dma_features dma_cap; 254 struct stmmac_counters mmc; 255 int hw_cap_support; 256 int synopsys_id; 257 u32 msg_enable; 258 int wolopts; 259 int wol_irq; 260 int clk_csr; 261 struct timer_list eee_ctrl_timer; 262 int lpi_irq; 263 int eee_enabled; 264 int eee_active; 265 int tx_lpi_timer; 266 int tx_lpi_enabled; 267 int eee_tw_timer; 268 bool eee_sw_timer_en; 269 unsigned int mode; 270 unsigned int chain_mode; 271 int extend_desc; 272 struct hwtstamp_config tstamp_config; 273 struct ptp_clock *ptp_clock; 274 struct ptp_clock_info ptp_clock_ops; 275 unsigned int default_addend; 276 u32 sub_second_inc; 277 u32 systime_flags; 278 u32 adv_ts; 279 int use_riwt; 280 int irq_wake; 281 rwlock_t ptp_lock; 282 /* Protects auxiliary snapshot registers from concurrent access. */ 283 struct mutex aux_ts_lock; 284 wait_queue_head_t tstamp_busy_wait; 285 286 void __iomem *mmcaddr; 287 void __iomem *ptpaddr; 288 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 289 int sfty_ce_irq; 290 int sfty_ue_irq; 291 int rx_irq[MTL_MAX_RX_QUEUES]; 292 int tx_irq[MTL_MAX_TX_QUEUES]; 293 /*irq name */ 294 char int_name_mac[IFNAMSIZ + 9]; 295 char int_name_wol[IFNAMSIZ + 9]; 296 char int_name_lpi[IFNAMSIZ + 9]; 297 char int_name_sfty_ce[IFNAMSIZ + 10]; 298 char int_name_sfty_ue[IFNAMSIZ + 10]; 299 char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; 300 char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; 301 302 #ifdef CONFIG_DEBUG_FS 303 struct dentry *dbgfs_dir; 304 #endif 305 306 unsigned long state; 307 struct workqueue_struct *wq; 308 struct work_struct service_task; 309 310 /* Workqueue for handling FPE hand-shaking */ 311 unsigned long fpe_task_state; 312 struct workqueue_struct *fpe_wq; 313 struct work_struct fpe_task; 314 char wq_name[IFNAMSIZ + 4]; 315 316 /* TC Handling */ 317 unsigned int tc_entries_max; 318 unsigned int tc_off_max; 319 struct stmmac_tc_entry *tc_entries; 320 unsigned int flow_entries_max; 321 struct stmmac_flow_entry *flow_entries; 322 unsigned int rfs_entries_max[STMMAC_RFS_T_MAX]; 323 unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX]; 324 unsigned int rfs_entries_total; 325 struct stmmac_rfs_entry *rfs_entries; 326 327 /* Pulse Per Second output */ 328 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; 329 330 /* Receive Side Scaling */ 331 struct stmmac_rss rss; 332 333 /* XDP BPF Program */ 334 unsigned long *af_xdp_zc_qps; 335 struct bpf_prog *xdp_prog; 336 }; 337 338 enum stmmac_state { 339 STMMAC_DOWN, 340 STMMAC_RESET_REQUESTED, 341 STMMAC_RESETING, 342 STMMAC_SERVICE_SCHED, 343 }; 344 345 int stmmac_mdio_unregister(struct net_device *ndev); 346 int stmmac_mdio_register(struct net_device *ndev); 347 int stmmac_mdio_reset(struct mii_bus *mii); 348 int stmmac_xpcs_setup(struct mii_bus *mii); 349 void stmmac_set_ethtool_ops(struct net_device *netdev); 350 351 int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags); 352 void stmmac_ptp_register(struct stmmac_priv *priv); 353 void stmmac_ptp_unregister(struct stmmac_priv *priv); 354 int stmmac_xdp_open(struct net_device *dev); 355 void stmmac_xdp_release(struct net_device *dev); 356 int stmmac_resume(struct device *dev); 357 int stmmac_suspend(struct device *dev); 358 void stmmac_dvr_remove(struct device *dev); 359 int stmmac_dvr_probe(struct device *device, 360 struct plat_stmmacenet_data *plat_dat, 361 struct stmmac_resources *res); 362 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 363 bool stmmac_eee_init(struct stmmac_priv *priv); 364 int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); 365 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); 366 int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); 367 void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable); 368 369 static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) 370 { 371 return !!priv->xdp_prog; 372 } 373 374 static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) 375 { 376 if (stmmac_xdp_is_enabled(priv)) 377 return XDP_PACKET_HEADROOM; 378 379 return 0; 380 } 381 382 void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue); 383 void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue); 384 void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue); 385 void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue); 386 int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags); 387 struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, 388 ktime_t current_time, 389 u64 cycle_time); 390 391 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) 392 void stmmac_selftest_run(struct net_device *dev, 393 struct ethtool_test *etest, u64 *buf); 394 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); 395 int stmmac_selftest_get_count(struct stmmac_priv *priv); 396 #else 397 static inline void stmmac_selftest_run(struct net_device *dev, 398 struct ethtool_test *etest, u64 *buf) 399 { 400 /* Not enabled */ 401 } 402 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, 403 u8 *data) 404 { 405 /* Not enabled */ 406 } 407 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) 408 { 409 return -EOPNOTSUPP; 410 } 411 #endif /* CONFIG_STMMAC_SELFTESTS */ 412 413 #endif /* __STMMAC_H__ */ 414