1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*******************************************************************************
3   Copyright (C) 2007-2009  STMicroelectronics Ltd
4 
5 
6   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7 *******************************************************************************/
8 
9 #ifndef __STMMAC_H__
10 #define __STMMAC_H__
11 
12 #define STMMAC_RESOURCE_NAME   "stmmaceth"
13 #define DRV_MODULE_VERSION	"Jan_2016"
14 
15 #include <linux/clk.h>
16 #include <linux/hrtimer.h>
17 #include <linux/if_vlan.h>
18 #include <linux/stmmac.h>
19 #include <linux/phylink.h>
20 #include <linux/pci.h>
21 #include "common.h"
22 #include <linux/ptp_clock_kernel.h>
23 #include <linux/net_tstamp.h>
24 #include <linux/reset.h>
25 #include <net/page_pool.h>
26 
27 struct stmmac_resources {
28 	void __iomem *addr;
29 	const char *mac;
30 	int wol_irq;
31 	int lpi_irq;
32 	int irq;
33 	int sfty_ce_irq;
34 	int sfty_ue_irq;
35 	int rx_irq[MTL_MAX_RX_QUEUES];
36 	int tx_irq[MTL_MAX_TX_QUEUES];
37 };
38 
39 struct stmmac_tx_info {
40 	dma_addr_t buf;
41 	bool map_as_page;
42 	unsigned len;
43 	bool last_segment;
44 	bool is_jumbo;
45 };
46 
47 #define STMMAC_TBS_AVAIL	BIT(0)
48 #define STMMAC_TBS_EN		BIT(1)
49 
50 /* Frequently used values are kept adjacent for cache effect */
51 struct stmmac_tx_queue {
52 	u32 tx_count_frames;
53 	int tbs;
54 	struct hrtimer txtimer;
55 	u32 queue_index;
56 	struct stmmac_priv *priv_data;
57 	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
58 	struct dma_edesc *dma_entx;
59 	struct dma_desc *dma_tx;
60 	struct sk_buff **tx_skbuff;
61 	struct stmmac_tx_info *tx_skbuff_dma;
62 	unsigned int cur_tx;
63 	unsigned int dirty_tx;
64 	dma_addr_t dma_tx_phy;
65 	u32 tx_tail_addr;
66 	u32 mss;
67 };
68 
69 struct stmmac_rx_buffer {
70 	struct page *page;
71 	struct page *sec_page;
72 	dma_addr_t addr;
73 	dma_addr_t sec_addr;
74 };
75 
76 struct stmmac_rx_queue {
77 	u32 rx_count_frames;
78 	u32 queue_index;
79 	struct page_pool *page_pool;
80 	struct stmmac_rx_buffer *buf_pool;
81 	struct stmmac_priv *priv_data;
82 	struct dma_extended_desc *dma_erx;
83 	struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
84 	unsigned int cur_rx;
85 	unsigned int dirty_rx;
86 	u32 rx_zeroc_thresh;
87 	dma_addr_t dma_rx_phy;
88 	u32 rx_tail_addr;
89 	unsigned int state_saved;
90 	struct {
91 		struct sk_buff *skb;
92 		unsigned int len;
93 		unsigned int error;
94 	} state;
95 };
96 
97 struct stmmac_channel {
98 	struct napi_struct rx_napi ____cacheline_aligned_in_smp;
99 	struct napi_struct tx_napi ____cacheline_aligned_in_smp;
100 	struct stmmac_priv *priv_data;
101 	spinlock_t lock;
102 	u32 index;
103 };
104 
105 struct stmmac_tc_entry {
106 	bool in_use;
107 	bool in_hw;
108 	bool is_last;
109 	bool is_frag;
110 	void *frag_ptr;
111 	unsigned int table_pos;
112 	u32 handle;
113 	u32 prio;
114 	struct {
115 		u32 match_data;
116 		u32 match_en;
117 		u8 af:1;
118 		u8 rf:1;
119 		u8 im:1;
120 		u8 nc:1;
121 		u8 res1:4;
122 		u8 frame_offset;
123 		u8 ok_index;
124 		u8 dma_ch_no;
125 		u32 res2;
126 	} __packed val;
127 };
128 
129 #define STMMAC_PPS_MAX		4
130 struct stmmac_pps_cfg {
131 	bool available;
132 	struct timespec64 start;
133 	struct timespec64 period;
134 };
135 
136 struct stmmac_rss {
137 	int enable;
138 	u8 key[STMMAC_RSS_HASH_KEY_SIZE];
139 	u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
140 };
141 
142 #define STMMAC_FLOW_ACTION_DROP		BIT(0)
143 struct stmmac_flow_entry {
144 	unsigned long cookie;
145 	unsigned long action;
146 	u8 ip_proto;
147 	int in_use;
148 	int idx;
149 	int is_l4;
150 };
151 
152 struct stmmac_priv {
153 	/* Frequently used values are kept adjacent for cache effect */
154 	u32 tx_coal_frames[MTL_MAX_TX_QUEUES];
155 	u32 tx_coal_timer[MTL_MAX_TX_QUEUES];
156 	u32 rx_coal_frames[MTL_MAX_TX_QUEUES];
157 
158 	int tx_coalesce;
159 	int hwts_tx_en;
160 	bool tx_path_in_lpi_mode;
161 	bool tso;
162 	int sph;
163 	u32 sarc_type;
164 
165 	unsigned int dma_buf_sz;
166 	unsigned int rx_copybreak;
167 	u32 rx_riwt[MTL_MAX_TX_QUEUES];
168 	int hwts_rx_en;
169 
170 	void __iomem *ioaddr;
171 	struct net_device *dev;
172 	struct device *device;
173 	struct mac_device_info *hw;
174 	int (*hwif_quirks)(struct stmmac_priv *priv);
175 	struct mutex lock;
176 
177 	/* RX Queue */
178 	struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
179 	unsigned int dma_rx_size;
180 
181 	/* TX Queue */
182 	struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
183 	unsigned int dma_tx_size;
184 
185 	/* Generic channel for NAPI */
186 	struct stmmac_channel channel[STMMAC_CH_MAX];
187 
188 	int speed;
189 	unsigned int flow_ctrl;
190 	unsigned int pause;
191 	struct mii_bus *mii;
192 	int mii_irq[PHY_MAX_ADDR];
193 
194 	struct phylink_config phylink_config;
195 	struct phylink *phylink;
196 
197 	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
198 	struct stmmac_safety_stats sstats;
199 	struct plat_stmmacenet_data *plat;
200 	struct dma_features dma_cap;
201 	struct stmmac_counters mmc;
202 	int hw_cap_support;
203 	int synopsys_id;
204 	u32 msg_enable;
205 	int wolopts;
206 	int wol_irq;
207 	int clk_csr;
208 	struct timer_list eee_ctrl_timer;
209 	int lpi_irq;
210 	int eee_enabled;
211 	int eee_active;
212 	int tx_lpi_timer;
213 	int tx_lpi_enabled;
214 	int eee_tw_timer;
215 	bool eee_sw_timer_en;
216 	unsigned int mode;
217 	unsigned int chain_mode;
218 	int extend_desc;
219 	struct hwtstamp_config tstamp_config;
220 	struct ptp_clock *ptp_clock;
221 	struct ptp_clock_info ptp_clock_ops;
222 	unsigned int default_addend;
223 	u32 sub_second_inc;
224 	u32 systime_flags;
225 	u32 adv_ts;
226 	int use_riwt;
227 	int irq_wake;
228 	spinlock_t ptp_lock;
229 	void __iomem *mmcaddr;
230 	void __iomem *ptpaddr;
231 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
232 	int sfty_ce_irq;
233 	int sfty_ue_irq;
234 	int rx_irq[MTL_MAX_RX_QUEUES];
235 	int tx_irq[MTL_MAX_TX_QUEUES];
236 	/*irq name */
237 	char int_name_mac[IFNAMSIZ + 9];
238 	char int_name_wol[IFNAMSIZ + 9];
239 	char int_name_lpi[IFNAMSIZ + 9];
240 	char int_name_sfty_ce[IFNAMSIZ + 10];
241 	char int_name_sfty_ue[IFNAMSIZ + 10];
242 	char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14];
243 	char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18];
244 
245 #ifdef CONFIG_DEBUG_FS
246 	struct dentry *dbgfs_dir;
247 #endif
248 
249 	unsigned long state;
250 	struct workqueue_struct *wq;
251 	struct work_struct service_task;
252 
253 	/* Workqueue for handling FPE hand-shaking */
254 	unsigned long fpe_task_state;
255 	struct workqueue_struct *fpe_wq;
256 	struct work_struct fpe_task;
257 	char wq_name[IFNAMSIZ + 4];
258 
259 	/* TC Handling */
260 	unsigned int tc_entries_max;
261 	unsigned int tc_off_max;
262 	struct stmmac_tc_entry *tc_entries;
263 	unsigned int flow_entries_max;
264 	struct stmmac_flow_entry *flow_entries;
265 
266 	/* Pulse Per Second output */
267 	struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
268 
269 	/* Receive Side Scaling */
270 	struct stmmac_rss rss;
271 };
272 
273 enum stmmac_state {
274 	STMMAC_DOWN,
275 	STMMAC_RESET_REQUESTED,
276 	STMMAC_RESETING,
277 	STMMAC_SERVICE_SCHED,
278 };
279 
280 int stmmac_mdio_unregister(struct net_device *ndev);
281 int stmmac_mdio_register(struct net_device *ndev);
282 int stmmac_mdio_reset(struct mii_bus *mii);
283 void stmmac_set_ethtool_ops(struct net_device *netdev);
284 
285 void stmmac_ptp_register(struct stmmac_priv *priv);
286 void stmmac_ptp_unregister(struct stmmac_priv *priv);
287 int stmmac_resume(struct device *dev);
288 int stmmac_suspend(struct device *dev);
289 int stmmac_dvr_remove(struct device *dev);
290 int stmmac_dvr_probe(struct device *device,
291 		     struct plat_stmmacenet_data *plat_dat,
292 		     struct stmmac_resources *res);
293 void stmmac_disable_eee_mode(struct stmmac_priv *priv);
294 bool stmmac_eee_init(struct stmmac_priv *priv);
295 int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt);
296 int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);
297 int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled);
298 void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable);
299 
300 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
301 void stmmac_selftest_run(struct net_device *dev,
302 			 struct ethtool_test *etest, u64 *buf);
303 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
304 int stmmac_selftest_get_count(struct stmmac_priv *priv);
305 #else
306 static inline void stmmac_selftest_run(struct net_device *dev,
307 				       struct ethtool_test *etest, u64 *buf)
308 {
309 	/* Not enabled */
310 }
311 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
312 					       u8 *data)
313 {
314 	/* Not enabled */
315 }
316 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
317 {
318 	return -EOPNOTSUPP;
319 }
320 #endif /* CONFIG_STMMAC_SELFTESTS */
321 
322 #endif /* __STMMAC_H__ */
323