1 /******************************************************************************* 2 Copyright (C) 2007-2009 STMicroelectronics Ltd 3 4 This program is free software; you can redistribute it and/or modify it 5 under the terms and conditions of the GNU General Public License, 6 version 2, as published by the Free Software Foundation. 7 8 This program is distributed in the hope it will be useful, but WITHOUT 9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 more details. 12 13 The full GNU General Public License is included in this distribution in 14 the file called "COPYING". 15 16 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 17 *******************************************************************************/ 18 19 #ifndef __STMMAC_H__ 20 #define __STMMAC_H__ 21 22 #define STMMAC_RESOURCE_NAME "stmmaceth" 23 #define DRV_MODULE_VERSION "Jan_2016" 24 25 #include <linux/clk.h> 26 #include <linux/stmmac.h> 27 #include <linux/phy.h> 28 #include <linux/pci.h> 29 #include "common.h" 30 #include <linux/ptp_clock_kernel.h> 31 #include <linux/reset.h> 32 33 struct stmmac_resources { 34 void __iomem *addr; 35 const char *mac; 36 int wol_irq; 37 int lpi_irq; 38 int irq; 39 }; 40 41 struct stmmac_tx_info { 42 dma_addr_t buf; 43 bool map_as_page; 44 unsigned len; 45 bool last_segment; 46 bool is_jumbo; 47 }; 48 49 /* Frequently used values are kept adjacent for cache effect */ 50 struct stmmac_tx_queue { 51 u32 queue_index; 52 struct stmmac_priv *priv_data; 53 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; 54 struct dma_desc *dma_tx; 55 struct sk_buff **tx_skbuff; 56 struct stmmac_tx_info *tx_skbuff_dma; 57 unsigned int cur_tx; 58 unsigned int dirty_tx; 59 dma_addr_t dma_tx_phy; 60 u32 tx_tail_addr; 61 u32 mss; 62 }; 63 64 struct stmmac_rx_queue { 65 u32 queue_index; 66 struct stmmac_priv *priv_data; 67 struct dma_extended_desc *dma_erx; 68 struct dma_desc *dma_rx ____cacheline_aligned_in_smp; 69 struct sk_buff **rx_skbuff; 70 dma_addr_t *rx_skbuff_dma; 71 unsigned int cur_rx; 72 unsigned int dirty_rx; 73 u32 rx_zeroc_thresh; 74 dma_addr_t dma_rx_phy; 75 u32 rx_tail_addr; 76 struct napi_struct napi ____cacheline_aligned_in_smp; 77 }; 78 79 struct stmmac_tc_entry { 80 bool in_use; 81 bool in_hw; 82 bool is_last; 83 bool is_frag; 84 void *frag_ptr; 85 unsigned int table_pos; 86 u32 handle; 87 u32 prio; 88 struct { 89 u32 match_data; 90 u32 match_en; 91 u8 af:1; 92 u8 rf:1; 93 u8 im:1; 94 u8 nc:1; 95 u8 res1:4; 96 u8 frame_offset; 97 u8 ok_index; 98 u8 dma_ch_no; 99 u32 res2; 100 } __packed val; 101 }; 102 103 struct stmmac_priv { 104 /* Frequently used values are kept adjacent for cache effect */ 105 u32 tx_count_frames; 106 u32 tx_coal_frames; 107 u32 tx_coal_timer; 108 bool tx_timer_armed; 109 110 int tx_coalesce; 111 int hwts_tx_en; 112 bool tx_path_in_lpi_mode; 113 struct timer_list txtimer; 114 bool tso; 115 116 unsigned int dma_buf_sz; 117 unsigned int rx_copybreak; 118 u32 rx_riwt; 119 int hwts_rx_en; 120 121 void __iomem *ioaddr; 122 struct net_device *dev; 123 struct device *device; 124 struct mac_device_info *hw; 125 struct mutex lock; 126 127 /* RX Queue */ 128 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; 129 130 /* TX Queue */ 131 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; 132 133 bool oldlink; 134 int speed; 135 int oldduplex; 136 unsigned int flow_ctrl; 137 unsigned int pause; 138 struct mii_bus *mii; 139 int mii_irq[PHY_MAX_ADDR]; 140 141 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; 142 struct stmmac_safety_stats sstats; 143 struct plat_stmmacenet_data *plat; 144 struct dma_features dma_cap; 145 struct stmmac_counters mmc; 146 int hw_cap_support; 147 int synopsys_id; 148 u32 msg_enable; 149 int wolopts; 150 int wol_irq; 151 int clk_csr; 152 struct timer_list eee_ctrl_timer; 153 int lpi_irq; 154 int eee_enabled; 155 int eee_active; 156 int tx_lpi_timer; 157 unsigned int mode; 158 unsigned int chain_mode; 159 int extend_desc; 160 struct ptp_clock *ptp_clock; 161 struct ptp_clock_info ptp_clock_ops; 162 unsigned int default_addend; 163 u32 adv_ts; 164 int use_riwt; 165 int irq_wake; 166 spinlock_t ptp_lock; 167 void __iomem *mmcaddr; 168 void __iomem *ptpaddr; 169 170 #ifdef CONFIG_DEBUG_FS 171 struct dentry *dbgfs_dir; 172 struct dentry *dbgfs_rings_status; 173 struct dentry *dbgfs_dma_cap; 174 #endif 175 176 unsigned long state; 177 struct workqueue_struct *wq; 178 struct work_struct service_task; 179 180 /* TC Handling */ 181 unsigned int tc_entries_max; 182 unsigned int tc_off_max; 183 struct stmmac_tc_entry *tc_entries; 184 }; 185 186 enum stmmac_state { 187 STMMAC_DOWN, 188 STMMAC_RESET_REQUESTED, 189 STMMAC_RESETING, 190 STMMAC_SERVICE_SCHED, 191 }; 192 193 int stmmac_mdio_unregister(struct net_device *ndev); 194 int stmmac_mdio_register(struct net_device *ndev); 195 int stmmac_mdio_reset(struct mii_bus *mii); 196 void stmmac_set_ethtool_ops(struct net_device *netdev); 197 198 void stmmac_ptp_register(struct stmmac_priv *priv); 199 void stmmac_ptp_unregister(struct stmmac_priv *priv); 200 int stmmac_resume(struct device *dev); 201 int stmmac_suspend(struct device *dev); 202 int stmmac_dvr_remove(struct device *dev); 203 int stmmac_dvr_probe(struct device *device, 204 struct plat_stmmacenet_data *plat_dat, 205 struct stmmac_resources *res); 206 void stmmac_disable_eee_mode(struct stmmac_priv *priv); 207 bool stmmac_eee_init(struct stmmac_priv *priv); 208 209 #endif /* __STMMAC_H__ */ 210