1 /******************************************************************************* 2 This contains the functions to handle the normal descriptors. 3 4 Copyright (C) 2007-2009 STMicroelectronics Ltd 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 23 *******************************************************************************/ 24 25 #include <linux/stmmac.h> 26 #include "common.h" 27 #include "descs_com.h" 28 29 static int ndesc_get_tx_status(void *data, struct stmmac_extra_stats *x, 30 struct dma_desc *p, void __iomem *ioaddr) 31 { 32 int ret = 0; 33 struct net_device_stats *stats = (struct net_device_stats *)data; 34 35 if (unlikely(p->des01.tx.error_summary)) { 36 if (unlikely(p->des01.tx.underflow_error)) { 37 x->tx_underflow++; 38 stats->tx_fifo_errors++; 39 } 40 if (unlikely(p->des01.tx.no_carrier)) { 41 x->tx_carrier++; 42 stats->tx_carrier_errors++; 43 } 44 if (unlikely(p->des01.tx.loss_carrier)) { 45 x->tx_losscarrier++; 46 stats->tx_carrier_errors++; 47 } 48 if (unlikely((p->des01.tx.excessive_deferral) || 49 (p->des01.tx.excessive_collisions) || 50 (p->des01.tx.late_collision))) 51 stats->collisions += p->des01.tx.collision_count; 52 ret = -1; 53 } 54 55 if (p->des01.etx.vlan_frame) { 56 CHIP_DBG(KERN_INFO "GMAC TX status: VLAN frame\n"); 57 x->tx_vlan++; 58 } 59 60 if (unlikely(p->des01.tx.deferred)) 61 x->tx_deferred++; 62 63 return ret; 64 } 65 66 static int ndesc_get_tx_len(struct dma_desc *p) 67 { 68 return p->des01.tx.buffer1_size; 69 } 70 71 /* This function verifies if each incoming frame has some errors 72 * and, if required, updates the multicast statistics. 73 * In case of success, it returns good_frame because the GMAC device 74 * is supposed to be able to compute the csum in HW. */ 75 static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x, 76 struct dma_desc *p) 77 { 78 int ret = good_frame; 79 struct net_device_stats *stats = (struct net_device_stats *)data; 80 81 if (unlikely(p->des01.rx.last_descriptor == 0)) { 82 pr_warning("ndesc Error: Oversized Ethernet " 83 "frame spanned multiple buffers\n"); 84 stats->rx_length_errors++; 85 return discard_frame; 86 } 87 88 if (unlikely(p->des01.rx.error_summary)) { 89 if (unlikely(p->des01.rx.descriptor_error)) 90 x->rx_desc++; 91 if (unlikely(p->des01.rx.sa_filter_fail)) 92 x->sa_filter_fail++; 93 if (unlikely(p->des01.rx.overflow_error)) 94 x->overflow_error++; 95 if (unlikely(p->des01.rx.ipc_csum_error)) 96 x->ipc_csum_error++; 97 if (unlikely(p->des01.rx.collision)) { 98 x->rx_collision++; 99 stats->collisions++; 100 } 101 if (unlikely(p->des01.rx.crc_error)) { 102 x->rx_crc++; 103 stats->rx_crc_errors++; 104 } 105 ret = discard_frame; 106 } 107 if (unlikely(p->des01.rx.dribbling)) 108 x->dribbling_bit++; 109 110 if (unlikely(p->des01.rx.length_error)) { 111 x->rx_length++; 112 ret = discard_frame; 113 } 114 if (unlikely(p->des01.rx.mii_error)) { 115 x->rx_mii++; 116 ret = discard_frame; 117 } 118 #ifdef STMMAC_VLAN_TAG_USED 119 if (p->des01.rx.vlan_tag) 120 x->vlan_tag++; 121 #endif 122 return ret; 123 } 124 125 static void ndesc_init_rx_desc(struct dma_desc *p, unsigned int ring_size, 126 int disable_rx_ic) 127 { 128 int i; 129 for (i = 0; i < ring_size; i++) { 130 p->des01.rx.own = 1; 131 p->des01.rx.buffer1_size = BUF_SIZE_2KiB - 1; 132 133 ndesc_rx_set_on_ring_chain(p, (i == ring_size - 1)); 134 135 if (disable_rx_ic) 136 p->des01.rx.disable_ic = 1; 137 p++; 138 } 139 } 140 141 static void ndesc_init_tx_desc(struct dma_desc *p, unsigned int ring_size) 142 { 143 int i; 144 for (i = 0; i < ring_size; i++) { 145 p->des01.tx.own = 0; 146 ndesc_tx_set_on_ring_chain(p, (i == (ring_size - 1))); 147 p++; 148 } 149 } 150 151 static int ndesc_get_tx_owner(struct dma_desc *p) 152 { 153 return p->des01.tx.own; 154 } 155 156 static int ndesc_get_rx_owner(struct dma_desc *p) 157 { 158 return p->des01.rx.own; 159 } 160 161 static void ndesc_set_tx_owner(struct dma_desc *p) 162 { 163 p->des01.tx.own = 1; 164 } 165 166 static void ndesc_set_rx_owner(struct dma_desc *p) 167 { 168 p->des01.rx.own = 1; 169 } 170 171 static int ndesc_get_tx_ls(struct dma_desc *p) 172 { 173 return p->des01.tx.last_segment; 174 } 175 176 static void ndesc_release_tx_desc(struct dma_desc *p) 177 { 178 int ter = p->des01.tx.end_ring; 179 180 memset(p, 0, offsetof(struct dma_desc, des2)); 181 ndesc_end_tx_desc(p, ter); 182 } 183 184 static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, 185 int csum_flag) 186 { 187 p->des01.tx.first_segment = is_fs; 188 norm_set_tx_desc_len(p, len); 189 190 if (likely(csum_flag)) 191 p->des01.tx.checksum_insertion = cic_full; 192 } 193 194 static void ndesc_clear_tx_ic(struct dma_desc *p) 195 { 196 p->des01.tx.interrupt = 0; 197 } 198 199 static void ndesc_close_tx_desc(struct dma_desc *p) 200 { 201 p->des01.tx.last_segment = 1; 202 p->des01.tx.interrupt = 1; 203 } 204 205 static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type) 206 { 207 /* The type-1 checksum offload engines append the checksum at 208 * the end of frame and the two bytes of checksum are added in 209 * the length. 210 * Adjust for that in the framelen for type-1 checksum offload 211 * engines. */ 212 if (rx_coe_type == STMMAC_RX_COE_TYPE1) 213 return p->des01.rx.frame_length - 2; 214 else 215 return p->des01.rx.frame_length; 216 } 217 218 const struct stmmac_desc_ops ndesc_ops = { 219 .tx_status = ndesc_get_tx_status, 220 .rx_status = ndesc_get_rx_status, 221 .get_tx_len = ndesc_get_tx_len, 222 .init_rx_desc = ndesc_init_rx_desc, 223 .init_tx_desc = ndesc_init_tx_desc, 224 .get_tx_owner = ndesc_get_tx_owner, 225 .get_rx_owner = ndesc_get_rx_owner, 226 .release_tx_desc = ndesc_release_tx_desc, 227 .prepare_tx_desc = ndesc_prepare_tx_desc, 228 .clear_tx_ic = ndesc_clear_tx_ic, 229 .close_tx_desc = ndesc_close_tx_desc, 230 .get_tx_ls = ndesc_get_tx_ls, 231 .set_tx_owner = ndesc_set_tx_owner, 232 .set_rx_owner = ndesc_set_rx_owner, 233 .get_rx_frame_len = ndesc_get_rx_frame_len, 234 }; 235