17ac6653aSJeff Kirsherconfig STMMAC_ETH
27ac6653aSJeff Kirsher	tristate "STMicroelectronics 10/100/1000 Ethernet driver"
37ac6653aSJeff Kirsher	depends on HAS_IOMEM
4aaba215cSJeff Kirsher	select NET_CORE
57ac6653aSJeff Kirsher	select MII
67ac6653aSJeff Kirsher	select PHYLIB
77ac6653aSJeff Kirsher	select CRC32
87ac6653aSJeff Kirsher	---help---
97ac6653aSJeff Kirsher	  This is the driver for the Ethernet IPs are built around a
107ac6653aSJeff Kirsher	  Synopsys IP Core and only tested on the STMicroelectronics
117ac6653aSJeff Kirsher	  platforms.
127ac6653aSJeff Kirsher
137ac6653aSJeff Kirsherif STMMAC_ETH
147ac6653aSJeff Kirsher
15bfab27a1SGiuseppe CAVALLAROconfig STMMAC_PLATFORM
16ba27ec66SGiuseppe CAVALLARO	bool "STMMAC Platform bus support"
17bfab27a1SGiuseppe CAVALLARO	depends on STMMAC_ETH
18bfab27a1SGiuseppe CAVALLARO	---help---
19bfab27a1SGiuseppe CAVALLARO	  This selects the platform specific bus support for
20bfab27a1SGiuseppe CAVALLARO	  the stmmac device driver. This is the driver used
21bfab27a1SGiuseppe CAVALLARO	  on many embedded STM platforms based on ARM and SuperH
22bfab27a1SGiuseppe CAVALLARO	  processors.
23bfab27a1SGiuseppe CAVALLARO	  If you have a controller with this interface, say Y or M here.
24bfab27a1SGiuseppe CAVALLARO
25bfab27a1SGiuseppe CAVALLARO	  If unsure, say N.
26bfab27a1SGiuseppe CAVALLARO
27bfab27a1SGiuseppe CAVALLAROconfig STMMAC_PCI
28ba27ec66SGiuseppe CAVALLARO	bool "STMMAC PCI bus support (EXPERIMENTAL)"
29bfab27a1SGiuseppe CAVALLARO	depends on STMMAC_ETH && PCI && EXPERIMENTAL
30bfab27a1SGiuseppe CAVALLARO	---help---
31bfab27a1SGiuseppe CAVALLARO	  This is to select the Synopsys DWMAC available on PCI devices,
32bfab27a1SGiuseppe CAVALLARO	  if you have a controller with this interface, say Y or M here.
33bfab27a1SGiuseppe CAVALLARO
34bfab27a1SGiuseppe CAVALLARO	  This PCI support is tested on XLINX XC2V3000 FF1152AMT0221
35bfab27a1SGiuseppe CAVALLARO	  D1215994A VIRTEX FPGA board.
36bfab27a1SGiuseppe CAVALLARO
37bfab27a1SGiuseppe CAVALLARO	  If unsure, say N.
38bfab27a1SGiuseppe CAVALLARO
397ac29055SGiuseppe CAVALLAROconfig STMMAC_DEBUG_FS
407ac29055SGiuseppe CAVALLARO	bool "Enable monitoring via sysFS "
417ac29055SGiuseppe CAVALLARO	default n
427ac29055SGiuseppe CAVALLARO	depends on STMMAC_ETH && DEBUG_FS
43bfab27a1SGiuseppe CAVALLARO	---help---
44e7434821SGiuseppe CAVALLARO	  The stmmac entry in /sys reports DMA TX/RX rings
45e7434821SGiuseppe CAVALLARO	  or (if supported) the HW cap register.
467ac29055SGiuseppe CAVALLARO
477ac6653aSJeff Kirsherconfig STMMAC_DA
487ac6653aSJeff Kirsher	bool "STMMAC DMA arbitration scheme"
497ac6653aSJeff Kirsher	default n
507ac6653aSJeff Kirsher	---help---
517ac6653aSJeff Kirsher	  Selecting this option, rx has priority over Tx (only for Giga
527ac6653aSJeff Kirsher	  Ethernet device).
537ac6653aSJeff Kirsher	  By default, the DMA arbitration scheme is based on Round-robin
547ac6653aSJeff Kirsher	  (rx:tx priority is 1:1).
557ac6653aSJeff Kirsher
567ac6653aSJeff Kirsherconfig STMMAC_TIMER
577ac6653aSJeff Kirsher	bool "STMMAC Timer optimisation"
587ac6653aSJeff Kirsher	default n
597ac6653aSJeff Kirsher	depends on RTC_HCTOSYS_DEVICE
607ac6653aSJeff Kirsher	---help---
617ac6653aSJeff Kirsher	  Use an external timer for mitigating the number of network
627ac6653aSJeff Kirsher	  interrupts. Currently, for SH architectures, it is possible
637ac6653aSJeff Kirsher	  to use the TMU channel 2 and the SH-RTC device.
647ac6653aSJeff Kirsher
657ac6653aSJeff Kirsherchoice
667ac6653aSJeff Kirsher        prompt "Select Timer device"
677ac6653aSJeff Kirsher        depends on STMMAC_TIMER
687ac6653aSJeff Kirsher
697ac6653aSJeff Kirsherconfig STMMAC_TMU_TIMER
707ac6653aSJeff Kirsher        bool "TMU channel 2"
717ac6653aSJeff Kirsher        depends on CPU_SH4
727ac6653aSJeff Kirsher	---help---
737ac6653aSJeff Kirsher
747ac6653aSJeff Kirsherconfig STMMAC_RTC_TIMER
757ac6653aSJeff Kirsher        bool "Real time clock"
767ac6653aSJeff Kirsher        depends on RTC_CLASS
777ac6653aSJeff Kirsher	---help---
787ac6653aSJeff Kirsher
797ac6653aSJeff Kirsherendchoice
807ac6653aSJeff Kirsher
81286a8372SGiuseppe CAVALLAROchoice
82286a8372SGiuseppe CAVALLARO	prompt "Select the DMA TX/RX descriptor operating modes"
83286a8372SGiuseppe CAVALLARO	depends on STMMAC_ETH
84286a8372SGiuseppe CAVALLARO	---help---
85286a8372SGiuseppe CAVALLARO	  This driver supports DMA descriptor to operate both in dual buffer
86286a8372SGiuseppe CAVALLARO	  (RING) and linked-list(CHAINED) mode. In RING mode each descriptor
87286a8372SGiuseppe CAVALLARO	  points to two data buffer pointers whereas in CHAINED mode they
88286a8372SGiuseppe CAVALLARO	  points to only one data buffer pointer.
89286a8372SGiuseppe CAVALLARO
90286a8372SGiuseppe CAVALLAROconfig STMMAC_RING
91286a8372SGiuseppe CAVALLARO	bool "Enable Descriptor Ring Mode"
92286a8372SGiuseppe CAVALLARO
93286a8372SGiuseppe CAVALLAROconfig STMMAC_CHAINED
94286a8372SGiuseppe CAVALLARO	bool "Enable Descriptor Chained Mode"
95286a8372SGiuseppe CAVALLARO
96286a8372SGiuseppe CAVALLAROendchoice
97286a8372SGiuseppe CAVALLARO
98286a8372SGiuseppe CAVALLARO
997ac6653aSJeff Kirsherendif
100