17ac6653aSJeff Kirsherconfig STMMAC_ETH
27ac6653aSJeff Kirsher	tristate "STMicroelectronics 10/100/1000 Ethernet driver"
37ac6653aSJeff Kirsher	depends on HAS_IOMEM
4aaba215cSJeff Kirsher	select NET_CORE
57ac6653aSJeff Kirsher	select MII
67ac6653aSJeff Kirsher	select PHYLIB
77ac6653aSJeff Kirsher	select CRC32
87ac6653aSJeff Kirsher	---help---
97ac6653aSJeff Kirsher	  This is the driver for the Ethernet IPs are built around a
107ac6653aSJeff Kirsher	  Synopsys IP Core and only tested on the STMicroelectronics
117ac6653aSJeff Kirsher	  platforms.
127ac6653aSJeff Kirsher
137ac6653aSJeff Kirsherif STMMAC_ETH
147ac6653aSJeff Kirsher
157ac29055SGiuseppe CAVALLAROconfig STMMAC_DEBUG_FS
167ac29055SGiuseppe CAVALLARO	bool "Enable monitoring via sysFS "
177ac29055SGiuseppe CAVALLARO	default n
187ac29055SGiuseppe CAVALLARO	depends on STMMAC_ETH && DEBUG_FS
197ac29055SGiuseppe CAVALLARO	-- help
20e7434821SGiuseppe CAVALLARO	  The stmmac entry in /sys reports DMA TX/RX rings
21e7434821SGiuseppe CAVALLARO	  or (if supported) the HW cap register.
227ac29055SGiuseppe CAVALLARO
237ac6653aSJeff Kirsherconfig STMMAC_DA
247ac6653aSJeff Kirsher	bool "STMMAC DMA arbitration scheme"
257ac6653aSJeff Kirsher	default n
267ac6653aSJeff Kirsher	---help---
277ac6653aSJeff Kirsher	  Selecting this option, rx has priority over Tx (only for Giga
287ac6653aSJeff Kirsher	  Ethernet device).
297ac6653aSJeff Kirsher	  By default, the DMA arbitration scheme is based on Round-robin
307ac6653aSJeff Kirsher	  (rx:tx priority is 1:1).
317ac6653aSJeff Kirsher
327ac6653aSJeff Kirsherconfig STMMAC_DUAL_MAC
337ac6653aSJeff Kirsher	bool "STMMAC: dual mac support (EXPERIMENTAL)"
347ac6653aSJeff Kirsher	default n
357ac6653aSJeff Kirsher        depends on EXPERIMENTAL && STMMAC_ETH && !STMMAC_TIMER
367ac6653aSJeff Kirsher	---help---
377ac6653aSJeff Kirsher	  Some ST SoCs (for example the stx7141 and stx7200c2) have two
387ac6653aSJeff Kirsher	  Ethernet Controllers. This option turns on the second Ethernet
397ac6653aSJeff Kirsher	  device on this kind of platforms.
407ac6653aSJeff Kirsher
417ac6653aSJeff Kirsherconfig STMMAC_TIMER
427ac6653aSJeff Kirsher	bool "STMMAC Timer optimisation"
437ac6653aSJeff Kirsher	default n
447ac6653aSJeff Kirsher	depends on RTC_HCTOSYS_DEVICE
457ac6653aSJeff Kirsher	---help---
467ac6653aSJeff Kirsher	  Use an external timer for mitigating the number of network
477ac6653aSJeff Kirsher	  interrupts. Currently, for SH architectures, it is possible
487ac6653aSJeff Kirsher	  to use the TMU channel 2 and the SH-RTC device.
497ac6653aSJeff Kirsher
507ac6653aSJeff Kirsherchoice
517ac6653aSJeff Kirsher        prompt "Select Timer device"
527ac6653aSJeff Kirsher        depends on STMMAC_TIMER
537ac6653aSJeff Kirsher
547ac6653aSJeff Kirsherconfig STMMAC_TMU_TIMER
557ac6653aSJeff Kirsher        bool "TMU channel 2"
567ac6653aSJeff Kirsher        depends on CPU_SH4
577ac6653aSJeff Kirsher	---help---
587ac6653aSJeff Kirsher
597ac6653aSJeff Kirsherconfig STMMAC_RTC_TIMER
607ac6653aSJeff Kirsher        bool "Real time clock"
617ac6653aSJeff Kirsher        depends on RTC_CLASS
627ac6653aSJeff Kirsher	---help---
637ac6653aSJeff Kirsher
647ac6653aSJeff Kirsherendchoice
657ac6653aSJeff Kirsher
66*286a8372SGiuseppe CAVALLAROchoice
67*286a8372SGiuseppe CAVALLARO	prompt "Select the DMA TX/RX descriptor operating modes"
68*286a8372SGiuseppe CAVALLARO	depends on STMMAC_ETH
69*286a8372SGiuseppe CAVALLARO	---help---
70*286a8372SGiuseppe CAVALLARO	  This driver supports DMA descriptor to operate both in dual buffer
71*286a8372SGiuseppe CAVALLARO	  (RING) and linked-list(CHAINED) mode. In RING mode each descriptor
72*286a8372SGiuseppe CAVALLARO	  points to two data buffer pointers whereas in CHAINED mode they
73*286a8372SGiuseppe CAVALLARO	  points to only one data buffer pointer.
74*286a8372SGiuseppe CAVALLARO
75*286a8372SGiuseppe CAVALLAROconfig STMMAC_RING
76*286a8372SGiuseppe CAVALLARO	bool "Enable Descriptor Ring Mode"
77*286a8372SGiuseppe CAVALLARO
78*286a8372SGiuseppe CAVALLAROconfig STMMAC_CHAINED
79*286a8372SGiuseppe CAVALLARO	bool "Enable Descriptor Chained Mode"
80*286a8372SGiuseppe CAVALLARO
81*286a8372SGiuseppe CAVALLAROendchoice
82*286a8372SGiuseppe CAVALLARO
83*286a8372SGiuseppe CAVALLARO
847ac6653aSJeff Kirsherendif
85