1 /*************************************************************************** 2 * 3 * Copyright (C) 2004-2008 SMSC 4 * Copyright (C) 2005-2008 ARM 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 *************************************************************************** 20 * Rewritten, heavily based on smsc911x simple driver by SMSC. 21 * Partly uses io macros from smc91x.c by Nicolas Pitre 22 * 23 * Supported devices: 24 * LAN9115, LAN9116, LAN9117, LAN9118 25 * LAN9215, LAN9216, LAN9217, LAN9218 26 * LAN9210, LAN9211 27 * LAN9220, LAN9221 28 * LAN89218 29 * 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/crc32.h> 35 #include <linux/clk.h> 36 #include <linux/delay.h> 37 #include <linux/errno.h> 38 #include <linux/etherdevice.h> 39 #include <linux/ethtool.h> 40 #include <linux/init.h> 41 #include <linux/interrupt.h> 42 #include <linux/ioport.h> 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/netdevice.h> 46 #include <linux/platform_device.h> 47 #include <linux/regulator/consumer.h> 48 #include <linux/sched.h> 49 #include <linux/timer.h> 50 #include <linux/bug.h> 51 #include <linux/bitops.h> 52 #include <linux/irq.h> 53 #include <linux/io.h> 54 #include <linux/swab.h> 55 #include <linux/phy.h> 56 #include <linux/smsc911x.h> 57 #include <linux/device.h> 58 #include <linux/of.h> 59 #include <linux/of_device.h> 60 #include <linux/of_gpio.h> 61 #include <linux/of_net.h> 62 #include <linux/acpi.h> 63 #include <linux/pm_runtime.h> 64 #include <linux/property.h> 65 #include <linux/gpio/consumer.h> 66 67 #include "smsc911x.h" 68 69 #define SMSC_CHIPNAME "smsc911x" 70 #define SMSC_MDIONAME "smsc911x-mdio" 71 #define SMSC_DRV_VERSION "2008-10-21" 72 73 MODULE_LICENSE("GPL"); 74 MODULE_VERSION(SMSC_DRV_VERSION); 75 MODULE_ALIAS("platform:smsc911x"); 76 77 #if USE_DEBUG > 0 78 static int debug = 16; 79 #else 80 static int debug = 3; 81 #endif 82 83 module_param(debug, int, 0); 84 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 85 86 struct smsc911x_data; 87 88 struct smsc911x_ops { 89 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); 90 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); 91 void (*rx_readfifo)(struct smsc911x_data *pdata, 92 unsigned int *buf, unsigned int wordcount); 93 void (*tx_writefifo)(struct smsc911x_data *pdata, 94 unsigned int *buf, unsigned int wordcount); 95 }; 96 97 #define SMSC911X_NUM_SUPPLIES 2 98 99 struct smsc911x_data { 100 void __iomem *ioaddr; 101 102 unsigned int idrev; 103 104 /* used to decide which workarounds apply */ 105 unsigned int generation; 106 107 /* device configuration (copied from platform_data during probe) */ 108 struct smsc911x_platform_config config; 109 110 /* This needs to be acquired before calling any of below: 111 * smsc911x_mac_read(), smsc911x_mac_write() 112 */ 113 spinlock_t mac_lock; 114 115 /* spinlock to ensure register accesses are serialised */ 116 spinlock_t dev_lock; 117 118 struct mii_bus *mii_bus; 119 unsigned int using_extphy; 120 int last_duplex; 121 int last_carrier; 122 123 u32 msg_enable; 124 unsigned int gpio_setting; 125 unsigned int gpio_orig_setting; 126 struct net_device *dev; 127 struct napi_struct napi; 128 129 unsigned int software_irq_signal; 130 131 #ifdef USE_PHY_WORK_AROUND 132 #define MIN_PACKET_SIZE (64) 133 char loopback_tx_pkt[MIN_PACKET_SIZE]; 134 char loopback_rx_pkt[MIN_PACKET_SIZE]; 135 unsigned int resetcount; 136 #endif 137 138 /* Members for Multicast filter workaround */ 139 unsigned int multicast_update_pending; 140 unsigned int set_bits_mask; 141 unsigned int clear_bits_mask; 142 unsigned int hashhi; 143 unsigned int hashlo; 144 145 /* register access functions */ 146 const struct smsc911x_ops *ops; 147 148 /* regulators */ 149 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES]; 150 151 /* Reset GPIO */ 152 struct gpio_desc *reset_gpiod; 153 154 /* clock */ 155 struct clk *clk; 156 }; 157 158 /* Easy access to information */ 159 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) 160 161 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 162 { 163 if (pdata->config.flags & SMSC911X_USE_32BIT) 164 return readl(pdata->ioaddr + reg); 165 166 if (pdata->config.flags & SMSC911X_USE_16BIT) 167 return ((readw(pdata->ioaddr + reg) & 0xFFFF) | 168 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); 169 170 BUG(); 171 return 0; 172 } 173 174 static inline u32 175 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg) 176 { 177 if (pdata->config.flags & SMSC911X_USE_32BIT) 178 return readl(pdata->ioaddr + __smsc_shift(pdata, reg)); 179 180 if (pdata->config.flags & SMSC911X_USE_16BIT) 181 return (readw(pdata->ioaddr + 182 __smsc_shift(pdata, reg)) & 0xFFFF) | 183 ((readw(pdata->ioaddr + 184 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16); 185 186 BUG(); 187 return 0; 188 } 189 190 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 191 { 192 u32 data; 193 unsigned long flags; 194 195 spin_lock_irqsave(&pdata->dev_lock, flags); 196 data = pdata->ops->reg_read(pdata, reg); 197 spin_unlock_irqrestore(&pdata->dev_lock, flags); 198 199 return data; 200 } 201 202 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 203 u32 val) 204 { 205 if (pdata->config.flags & SMSC911X_USE_32BIT) { 206 writel(val, pdata->ioaddr + reg); 207 return; 208 } 209 210 if (pdata->config.flags & SMSC911X_USE_16BIT) { 211 writew(val & 0xFFFF, pdata->ioaddr + reg); 212 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2); 213 return; 214 } 215 216 BUG(); 217 } 218 219 static inline void 220 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val) 221 { 222 if (pdata->config.flags & SMSC911X_USE_32BIT) { 223 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg)); 224 return; 225 } 226 227 if (pdata->config.flags & SMSC911X_USE_16BIT) { 228 writew(val & 0xFFFF, 229 pdata->ioaddr + __smsc_shift(pdata, reg)); 230 writew((val >> 16) & 0xFFFF, 231 pdata->ioaddr + __smsc_shift(pdata, reg + 2)); 232 return; 233 } 234 235 BUG(); 236 } 237 238 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 239 u32 val) 240 { 241 unsigned long flags; 242 243 spin_lock_irqsave(&pdata->dev_lock, flags); 244 pdata->ops->reg_write(pdata, reg, val); 245 spin_unlock_irqrestore(&pdata->dev_lock, flags); 246 } 247 248 /* Writes a packet to the TX_DATA_FIFO */ 249 static inline void 250 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 251 unsigned int wordcount) 252 { 253 unsigned long flags; 254 255 spin_lock_irqsave(&pdata->dev_lock, flags); 256 257 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 258 while (wordcount--) 259 __smsc911x_reg_write(pdata, TX_DATA_FIFO, 260 swab32(*buf++)); 261 goto out; 262 } 263 264 if (pdata->config.flags & SMSC911X_USE_32BIT) { 265 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 266 goto out; 267 } 268 269 if (pdata->config.flags & SMSC911X_USE_16BIT) { 270 while (wordcount--) 271 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++); 272 goto out; 273 } 274 275 BUG(); 276 out: 277 spin_unlock_irqrestore(&pdata->dev_lock, flags); 278 } 279 280 /* Writes a packet to the TX_DATA_FIFO - shifted version */ 281 static inline void 282 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 283 unsigned int wordcount) 284 { 285 unsigned long flags; 286 287 spin_lock_irqsave(&pdata->dev_lock, flags); 288 289 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 290 while (wordcount--) 291 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO, 292 swab32(*buf++)); 293 goto out; 294 } 295 296 if (pdata->config.flags & SMSC911X_USE_32BIT) { 297 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata, 298 TX_DATA_FIFO), buf, wordcount); 299 goto out; 300 } 301 302 if (pdata->config.flags & SMSC911X_USE_16BIT) { 303 while (wordcount--) 304 __smsc911x_reg_write_shift(pdata, 305 TX_DATA_FIFO, *buf++); 306 goto out; 307 } 308 309 BUG(); 310 out: 311 spin_unlock_irqrestore(&pdata->dev_lock, flags); 312 } 313 314 /* Reads a packet out of the RX_DATA_FIFO */ 315 static inline void 316 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 317 unsigned int wordcount) 318 { 319 unsigned long flags; 320 321 spin_lock_irqsave(&pdata->dev_lock, flags); 322 323 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 324 while (wordcount--) 325 *buf++ = swab32(__smsc911x_reg_read(pdata, 326 RX_DATA_FIFO)); 327 goto out; 328 } 329 330 if (pdata->config.flags & SMSC911X_USE_32BIT) { 331 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 332 goto out; 333 } 334 335 if (pdata->config.flags & SMSC911X_USE_16BIT) { 336 while (wordcount--) 337 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); 338 goto out; 339 } 340 341 BUG(); 342 out: 343 spin_unlock_irqrestore(&pdata->dev_lock, flags); 344 } 345 346 /* Reads a packet out of the RX_DATA_FIFO - shifted version */ 347 static inline void 348 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 349 unsigned int wordcount) 350 { 351 unsigned long flags; 352 353 spin_lock_irqsave(&pdata->dev_lock, flags); 354 355 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 356 while (wordcount--) 357 *buf++ = swab32(__smsc911x_reg_read_shift(pdata, 358 RX_DATA_FIFO)); 359 goto out; 360 } 361 362 if (pdata->config.flags & SMSC911X_USE_32BIT) { 363 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata, 364 RX_DATA_FIFO), buf, wordcount); 365 goto out; 366 } 367 368 if (pdata->config.flags & SMSC911X_USE_16BIT) { 369 while (wordcount--) 370 *buf++ = __smsc911x_reg_read_shift(pdata, 371 RX_DATA_FIFO); 372 goto out; 373 } 374 375 BUG(); 376 out: 377 spin_unlock_irqrestore(&pdata->dev_lock, flags); 378 } 379 380 /* 381 * enable regulator and clock resources. 382 */ 383 static int smsc911x_enable_resources(struct platform_device *pdev) 384 { 385 struct net_device *ndev = platform_get_drvdata(pdev); 386 struct smsc911x_data *pdata = netdev_priv(ndev); 387 int ret = 0; 388 389 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies), 390 pdata->supplies); 391 if (ret) 392 netdev_err(ndev, "failed to enable regulators %d\n", 393 ret); 394 395 if (!IS_ERR(pdata->clk)) { 396 ret = clk_prepare_enable(pdata->clk); 397 if (ret < 0) 398 netdev_err(ndev, "failed to enable clock %d\n", ret); 399 } 400 401 return ret; 402 } 403 404 /* 405 * disable resources, currently just regulators. 406 */ 407 static int smsc911x_disable_resources(struct platform_device *pdev) 408 { 409 struct net_device *ndev = platform_get_drvdata(pdev); 410 struct smsc911x_data *pdata = netdev_priv(ndev); 411 int ret = 0; 412 413 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies), 414 pdata->supplies); 415 416 if (!IS_ERR(pdata->clk)) 417 clk_disable_unprepare(pdata->clk); 418 419 return ret; 420 } 421 422 /* 423 * Request resources, currently just regulators. 424 * 425 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where 426 * these are not always-on we need to request regulators to be turned on 427 * before we can try to access the device registers. 428 */ 429 static int smsc911x_request_resources(struct platform_device *pdev) 430 { 431 struct net_device *ndev = platform_get_drvdata(pdev); 432 struct smsc911x_data *pdata = netdev_priv(ndev); 433 int ret = 0; 434 435 /* Request regulators */ 436 pdata->supplies[0].supply = "vdd33a"; 437 pdata->supplies[1].supply = "vddvario"; 438 ret = regulator_bulk_get(&pdev->dev, 439 ARRAY_SIZE(pdata->supplies), 440 pdata->supplies); 441 if (ret) 442 netdev_err(ndev, "couldn't get regulators %d\n", 443 ret); 444 445 /* Request optional RESET GPIO */ 446 pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev, 447 "reset", 448 GPIOD_OUT_LOW); 449 450 /* Request clock */ 451 pdata->clk = clk_get(&pdev->dev, NULL); 452 if (IS_ERR(pdata->clk)) 453 dev_dbg(&pdev->dev, "couldn't get clock %li\n", 454 PTR_ERR(pdata->clk)); 455 456 return ret; 457 } 458 459 /* 460 * Free resources, currently just regulators. 461 * 462 */ 463 static void smsc911x_free_resources(struct platform_device *pdev) 464 { 465 struct net_device *ndev = platform_get_drvdata(pdev); 466 struct smsc911x_data *pdata = netdev_priv(ndev); 467 468 /* Free regulators */ 469 regulator_bulk_free(ARRAY_SIZE(pdata->supplies), 470 pdata->supplies); 471 472 /* Free clock */ 473 if (!IS_ERR(pdata->clk)) { 474 clk_put(pdata->clk); 475 pdata->clk = NULL; 476 } 477 } 478 479 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read 480 * and smsc911x_mac_write, so assumes mac_lock is held */ 481 static int smsc911x_mac_complete(struct smsc911x_data *pdata) 482 { 483 int i; 484 u32 val; 485 486 SMSC_ASSERT_MAC_LOCK(pdata); 487 488 for (i = 0; i < 40; i++) { 489 val = smsc911x_reg_read(pdata, MAC_CSR_CMD); 490 if (!(val & MAC_CSR_CMD_CSR_BUSY_)) 491 return 0; 492 } 493 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. " 494 "MAC_CSR_CMD: 0x%08X", val); 495 return -EIO; 496 } 497 498 /* Fetches a MAC register value. Assumes mac_lock is acquired */ 499 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) 500 { 501 unsigned int temp; 502 503 SMSC_ASSERT_MAC_LOCK(pdata); 504 505 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 506 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 507 SMSC_WARN(pdata, hw, "MAC busy at entry"); 508 return 0xFFFFFFFF; 509 } 510 511 /* Send the MAC cmd */ 512 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 513 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); 514 515 /* Workaround for hardware read-after-write restriction */ 516 temp = smsc911x_reg_read(pdata, BYTE_TEST); 517 518 /* Wait for the read to complete */ 519 if (likely(smsc911x_mac_complete(pdata) == 0)) 520 return smsc911x_reg_read(pdata, MAC_CSR_DATA); 521 522 SMSC_WARN(pdata, hw, "MAC busy after read"); 523 return 0xFFFFFFFF; 524 } 525 526 /* Set a mac register, mac_lock must be acquired before calling */ 527 static void smsc911x_mac_write(struct smsc911x_data *pdata, 528 unsigned int offset, u32 val) 529 { 530 unsigned int temp; 531 532 SMSC_ASSERT_MAC_LOCK(pdata); 533 534 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 535 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 536 SMSC_WARN(pdata, hw, 537 "smsc911x_mac_write failed, MAC busy at entry"); 538 return; 539 } 540 541 /* Send data to write */ 542 smsc911x_reg_write(pdata, MAC_CSR_DATA, val); 543 544 /* Write the actual data */ 545 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 546 MAC_CSR_CMD_CSR_BUSY_)); 547 548 /* Workaround for hardware read-after-write restriction */ 549 temp = smsc911x_reg_read(pdata, BYTE_TEST); 550 551 /* Wait for the write to complete */ 552 if (likely(smsc911x_mac_complete(pdata) == 0)) 553 return; 554 555 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write"); 556 } 557 558 /* Get a phy register */ 559 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) 560 { 561 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 562 unsigned long flags; 563 unsigned int addr; 564 int i, reg; 565 566 spin_lock_irqsave(&pdata->mac_lock, flags); 567 568 /* Confirm MII not busy */ 569 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 570 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???"); 571 reg = -EIO; 572 goto out; 573 } 574 575 /* Set the address, index & direction (read from PHY) */ 576 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); 577 smsc911x_mac_write(pdata, MII_ACC, addr); 578 579 /* Wait for read to complete w/ timeout */ 580 for (i = 0; i < 100; i++) 581 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 582 reg = smsc911x_mac_read(pdata, MII_DATA); 583 goto out; 584 } 585 586 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish"); 587 reg = -EIO; 588 589 out: 590 spin_unlock_irqrestore(&pdata->mac_lock, flags); 591 return reg; 592 } 593 594 /* Set a phy register */ 595 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, 596 u16 val) 597 { 598 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 599 unsigned long flags; 600 unsigned int addr; 601 int i, reg; 602 603 spin_lock_irqsave(&pdata->mac_lock, flags); 604 605 /* Confirm MII not busy */ 606 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 607 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???"); 608 reg = -EIO; 609 goto out; 610 } 611 612 /* Put the data to write in the MAC */ 613 smsc911x_mac_write(pdata, MII_DATA, val); 614 615 /* Set the address, index & direction (write to PHY) */ 616 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | 617 MII_ACC_MII_WRITE_; 618 smsc911x_mac_write(pdata, MII_ACC, addr); 619 620 /* Wait for write to complete w/ timeout */ 621 for (i = 0; i < 100; i++) 622 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 623 reg = 0; 624 goto out; 625 } 626 627 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish"); 628 reg = -EIO; 629 630 out: 631 spin_unlock_irqrestore(&pdata->mac_lock, flags); 632 return reg; 633 } 634 635 /* Switch to external phy. Assumes tx and rx are stopped. */ 636 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) 637 { 638 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 639 640 /* Disable phy clocks to the MAC */ 641 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 642 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 643 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 644 udelay(10); /* Enough time for clocks to stop */ 645 646 /* Switch to external phy */ 647 hwcfg |= HW_CFG_EXT_PHY_EN_; 648 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 649 650 /* Enable phy clocks to the MAC */ 651 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 652 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 653 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 654 udelay(10); /* Enough time for clocks to restart */ 655 656 hwcfg |= HW_CFG_SMI_SEL_; 657 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 658 } 659 660 /* Autodetects and enables external phy if present on supported chips. 661 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY 662 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ 663 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) 664 { 665 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 666 667 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { 668 SMSC_TRACE(pdata, hw, "Forcing internal PHY"); 669 pdata->using_extphy = 0; 670 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { 671 SMSC_TRACE(pdata, hw, "Forcing external PHY"); 672 smsc911x_phy_enable_external(pdata); 673 pdata->using_extphy = 1; 674 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { 675 SMSC_TRACE(pdata, hw, 676 "HW_CFG EXT_PHY_DET set, using external PHY"); 677 smsc911x_phy_enable_external(pdata); 678 pdata->using_extphy = 1; 679 } else { 680 SMSC_TRACE(pdata, hw, 681 "HW_CFG EXT_PHY_DET clear, using internal PHY"); 682 pdata->using_extphy = 0; 683 } 684 } 685 686 /* Fetches a tx status out of the status fifo */ 687 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) 688 { 689 unsigned int result = 690 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; 691 692 if (result != 0) 693 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); 694 695 return result; 696 } 697 698 /* Fetches the next rx status */ 699 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) 700 { 701 unsigned int result = 702 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; 703 704 if (result != 0) 705 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); 706 707 return result; 708 } 709 710 #ifdef USE_PHY_WORK_AROUND 711 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) 712 { 713 unsigned int tries; 714 u32 wrsz; 715 u32 rdsz; 716 ulong bufp; 717 718 for (tries = 0; tries < 10; tries++) { 719 unsigned int txcmd_a; 720 unsigned int txcmd_b; 721 unsigned int status; 722 unsigned int pktlength; 723 unsigned int i; 724 725 /* Zero-out rx packet memory */ 726 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); 727 728 /* Write tx packet to 118 */ 729 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; 730 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 731 txcmd_a |= MIN_PACKET_SIZE; 732 733 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; 734 735 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a); 736 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b); 737 738 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); 739 wrsz = MIN_PACKET_SIZE + 3; 740 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); 741 wrsz >>= 2; 742 743 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 744 745 /* Wait till transmit is done */ 746 i = 60; 747 do { 748 udelay(5); 749 status = smsc911x_tx_get_txstatus(pdata); 750 } while ((i--) && (!status)); 751 752 if (!status) { 753 SMSC_WARN(pdata, hw, 754 "Failed to transmit during loopback test"); 755 continue; 756 } 757 if (status & TX_STS_ES_) { 758 SMSC_WARN(pdata, hw, 759 "Transmit encountered errors during loopback test"); 760 continue; 761 } 762 763 /* Wait till receive is done */ 764 i = 60; 765 do { 766 udelay(5); 767 status = smsc911x_rx_get_rxstatus(pdata); 768 } while ((i--) && (!status)); 769 770 if (!status) { 771 SMSC_WARN(pdata, hw, 772 "Failed to receive during loopback test"); 773 continue; 774 } 775 if (status & RX_STS_ES_) { 776 SMSC_WARN(pdata, hw, 777 "Receive encountered errors during loopback test"); 778 continue; 779 } 780 781 pktlength = ((status & 0x3FFF0000UL) >> 16); 782 bufp = (ulong)pdata->loopback_rx_pkt; 783 rdsz = pktlength + 3; 784 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); 785 rdsz >>= 2; 786 787 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz); 788 789 if (pktlength != (MIN_PACKET_SIZE + 4)) { 790 SMSC_WARN(pdata, hw, "Unexpected packet size " 791 "during loop back test, size=%d, will retry", 792 pktlength); 793 } else { 794 unsigned int j; 795 int mismatch = 0; 796 for (j = 0; j < MIN_PACKET_SIZE; j++) { 797 if (pdata->loopback_tx_pkt[j] 798 != pdata->loopback_rx_pkt[j]) { 799 mismatch = 1; 800 break; 801 } 802 } 803 if (!mismatch) { 804 SMSC_TRACE(pdata, hw, "Successfully verified " 805 "loopback packet"); 806 return 0; 807 } else { 808 SMSC_WARN(pdata, hw, "Data mismatch " 809 "during loop back test, will retry"); 810 } 811 } 812 } 813 814 return -EIO; 815 } 816 817 static int smsc911x_phy_reset(struct smsc911x_data *pdata) 818 { 819 unsigned int temp; 820 unsigned int i = 100000; 821 822 temp = smsc911x_reg_read(pdata, PMT_CTRL); 823 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_); 824 do { 825 msleep(1); 826 temp = smsc911x_reg_read(pdata, PMT_CTRL); 827 } while ((i--) && (temp & PMT_CTRL_PHY_RST_)); 828 829 if (unlikely(temp & PMT_CTRL_PHY_RST_)) { 830 SMSC_WARN(pdata, hw, "PHY reset failed to complete"); 831 return -EIO; 832 } 833 /* Extra delay required because the phy may not be completed with 834 * its reset when BMCR_RESET is cleared. Specs say 256 uS is 835 * enough delay but using 1ms here to be safe */ 836 msleep(1); 837 838 return 0; 839 } 840 841 static int smsc911x_phy_loopbacktest(struct net_device *dev) 842 { 843 struct smsc911x_data *pdata = netdev_priv(dev); 844 struct phy_device *phy_dev = dev->phydev; 845 int result = -EIO; 846 unsigned int i, val; 847 unsigned long flags; 848 849 /* Initialise tx packet using broadcast destination address */ 850 eth_broadcast_addr(pdata->loopback_tx_pkt); 851 852 /* Use incrementing source address */ 853 for (i = 6; i < 12; i++) 854 pdata->loopback_tx_pkt[i] = (char)i; 855 856 /* Set length type field */ 857 pdata->loopback_tx_pkt[12] = 0x00; 858 pdata->loopback_tx_pkt[13] = 0x00; 859 860 for (i = 14; i < MIN_PACKET_SIZE; i++) 861 pdata->loopback_tx_pkt[i] = (char)i; 862 863 val = smsc911x_reg_read(pdata, HW_CFG); 864 val &= HW_CFG_TX_FIF_SZ_; 865 val |= HW_CFG_SF_; 866 smsc911x_reg_write(pdata, HW_CFG, val); 867 868 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 869 smsc911x_reg_write(pdata, RX_CFG, 870 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); 871 872 for (i = 0; i < 10; i++) { 873 /* Set PHY to 10/FD, no ANEG, and loopback mode */ 874 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, 875 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX); 876 877 /* Enable MAC tx/rx, FD */ 878 spin_lock_irqsave(&pdata->mac_lock, flags); 879 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ 880 | MAC_CR_TXEN_ | MAC_CR_RXEN_); 881 spin_unlock_irqrestore(&pdata->mac_lock, flags); 882 883 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { 884 result = 0; 885 break; 886 } 887 pdata->resetcount++; 888 889 /* Disable MAC rx */ 890 spin_lock_irqsave(&pdata->mac_lock, flags); 891 smsc911x_mac_write(pdata, MAC_CR, 0); 892 spin_unlock_irqrestore(&pdata->mac_lock, flags); 893 894 smsc911x_phy_reset(pdata); 895 } 896 897 /* Disable MAC */ 898 spin_lock_irqsave(&pdata->mac_lock, flags); 899 smsc911x_mac_write(pdata, MAC_CR, 0); 900 spin_unlock_irqrestore(&pdata->mac_lock, flags); 901 902 /* Cancel PHY loopback mode */ 903 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0); 904 905 smsc911x_reg_write(pdata, TX_CFG, 0); 906 smsc911x_reg_write(pdata, RX_CFG, 0); 907 908 return result; 909 } 910 #endif /* USE_PHY_WORK_AROUND */ 911 912 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) 913 { 914 struct net_device *ndev = pdata->dev; 915 struct phy_device *phy_dev = ndev->phydev; 916 u32 afc = smsc911x_reg_read(pdata, AFC_CFG); 917 u32 flow; 918 unsigned long flags; 919 920 if (phy_dev->duplex == DUPLEX_FULL) { 921 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE); 922 u16 rmtadv = phy_read(phy_dev, MII_LPA); 923 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 924 925 if (cap & FLOW_CTRL_RX) 926 flow = 0xFFFF0002; 927 else 928 flow = 0; 929 930 if (cap & FLOW_CTRL_TX) 931 afc |= 0xF; 932 else 933 afc &= ~0xF; 934 935 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s", 936 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 937 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 938 } else { 939 SMSC_TRACE(pdata, hw, "half duplex"); 940 flow = 0; 941 afc |= 0xF; 942 } 943 944 spin_lock_irqsave(&pdata->mac_lock, flags); 945 smsc911x_mac_write(pdata, FLOW, flow); 946 spin_unlock_irqrestore(&pdata->mac_lock, flags); 947 948 smsc911x_reg_write(pdata, AFC_CFG, afc); 949 } 950 951 /* Update link mode if anything has changed. Called periodically when the 952 * PHY is in polling mode, even if nothing has changed. */ 953 static void smsc911x_phy_adjust_link(struct net_device *dev) 954 { 955 struct smsc911x_data *pdata = netdev_priv(dev); 956 struct phy_device *phy_dev = dev->phydev; 957 unsigned long flags; 958 int carrier; 959 960 if (phy_dev->duplex != pdata->last_duplex) { 961 unsigned int mac_cr; 962 SMSC_TRACE(pdata, hw, "duplex state has changed"); 963 964 spin_lock_irqsave(&pdata->mac_lock, flags); 965 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 966 if (phy_dev->duplex) { 967 SMSC_TRACE(pdata, hw, 968 "configuring for full duplex mode"); 969 mac_cr |= MAC_CR_FDPX_; 970 } else { 971 SMSC_TRACE(pdata, hw, 972 "configuring for half duplex mode"); 973 mac_cr &= ~MAC_CR_FDPX_; 974 } 975 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 976 spin_unlock_irqrestore(&pdata->mac_lock, flags); 977 978 smsc911x_phy_update_flowcontrol(pdata); 979 pdata->last_duplex = phy_dev->duplex; 980 } 981 982 carrier = netif_carrier_ok(dev); 983 if (carrier != pdata->last_carrier) { 984 SMSC_TRACE(pdata, hw, "carrier state has changed"); 985 if (carrier) { 986 SMSC_TRACE(pdata, hw, "configuring for carrier OK"); 987 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && 988 (!pdata->using_extphy)) { 989 /* Restore original GPIO configuration */ 990 pdata->gpio_setting = pdata->gpio_orig_setting; 991 smsc911x_reg_write(pdata, GPIO_CFG, 992 pdata->gpio_setting); 993 } 994 } else { 995 SMSC_TRACE(pdata, hw, "configuring for no carrier"); 996 /* Check global setting that LED1 997 * usage is 10/100 indicator */ 998 pdata->gpio_setting = smsc911x_reg_read(pdata, 999 GPIO_CFG); 1000 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && 1001 (!pdata->using_extphy)) { 1002 /* Force 10/100 LED off, after saving 1003 * original GPIO configuration */ 1004 pdata->gpio_orig_setting = pdata->gpio_setting; 1005 1006 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; 1007 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ 1008 | GPIO_CFG_GPIODIR0_ 1009 | GPIO_CFG_GPIOD0_); 1010 smsc911x_reg_write(pdata, GPIO_CFG, 1011 pdata->gpio_setting); 1012 } 1013 } 1014 pdata->last_carrier = carrier; 1015 } 1016 } 1017 1018 static int smsc911x_mii_probe(struct net_device *dev) 1019 { 1020 struct smsc911x_data *pdata = netdev_priv(dev); 1021 struct phy_device *phydev = NULL; 1022 int ret; 1023 1024 /* find the first phy */ 1025 phydev = phy_find_first(pdata->mii_bus); 1026 if (!phydev) { 1027 netdev_err(dev, "no PHY found\n"); 1028 return -ENODEV; 1029 } 1030 1031 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X", 1032 phydev->mdio.addr, phydev->phy_id); 1033 1034 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link, 1035 pdata->config.phy_interface); 1036 1037 if (ret) { 1038 netdev_err(dev, "Could not attach to PHY\n"); 1039 return ret; 1040 } 1041 1042 phy_attached_info(phydev); 1043 1044 /* mask with MAC supported features */ 1045 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause | 1046 SUPPORTED_Asym_Pause); 1047 phydev->advertising = phydev->supported; 1048 1049 pdata->last_duplex = -1; 1050 pdata->last_carrier = -1; 1051 1052 #ifdef USE_PHY_WORK_AROUND 1053 if (smsc911x_phy_loopbacktest(dev) < 0) { 1054 SMSC_WARN(pdata, hw, "Failed Loop Back Test"); 1055 phy_disconnect(phydev); 1056 return -ENODEV; 1057 } 1058 SMSC_TRACE(pdata, hw, "Passed Loop Back Test"); 1059 #endif /* USE_PHY_WORK_AROUND */ 1060 1061 SMSC_TRACE(pdata, hw, "phy initialised successfully"); 1062 return 0; 1063 } 1064 1065 static int smsc911x_mii_init(struct platform_device *pdev, 1066 struct net_device *dev) 1067 { 1068 struct smsc911x_data *pdata = netdev_priv(dev); 1069 int err = -ENXIO; 1070 1071 pdata->mii_bus = mdiobus_alloc(); 1072 if (!pdata->mii_bus) { 1073 err = -ENOMEM; 1074 goto err_out_1; 1075 } 1076 1077 pdata->mii_bus->name = SMSC_MDIONAME; 1078 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 1079 pdev->name, pdev->id); 1080 pdata->mii_bus->priv = pdata; 1081 pdata->mii_bus->read = smsc911x_mii_read; 1082 pdata->mii_bus->write = smsc911x_mii_write; 1083 1084 pdata->mii_bus->parent = &pdev->dev; 1085 1086 switch (pdata->idrev & 0xFFFF0000) { 1087 case 0x01170000: 1088 case 0x01150000: 1089 case 0x117A0000: 1090 case 0x115A0000: 1091 /* External PHY supported, try to autodetect */ 1092 smsc911x_phy_initialise_external(pdata); 1093 break; 1094 default: 1095 SMSC_TRACE(pdata, hw, "External PHY is not supported, " 1096 "using internal PHY"); 1097 pdata->using_extphy = 0; 1098 break; 1099 } 1100 1101 if (!pdata->using_extphy) { 1102 /* Mask all PHYs except ID 1 (internal) */ 1103 pdata->mii_bus->phy_mask = ~(1 << 1); 1104 } 1105 1106 if (mdiobus_register(pdata->mii_bus)) { 1107 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1108 goto err_out_free_bus_2; 1109 } 1110 1111 return 0; 1112 1113 err_out_free_bus_2: 1114 mdiobus_free(pdata->mii_bus); 1115 err_out_1: 1116 return err; 1117 } 1118 1119 /* Gets the number of tx statuses in the fifo */ 1120 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) 1121 { 1122 return (smsc911x_reg_read(pdata, TX_FIFO_INF) 1123 & TX_FIFO_INF_TSUSED_) >> 16; 1124 } 1125 1126 /* Reads tx statuses and increments counters where necessary */ 1127 static void smsc911x_tx_update_txcounters(struct net_device *dev) 1128 { 1129 struct smsc911x_data *pdata = netdev_priv(dev); 1130 unsigned int tx_stat; 1131 1132 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { 1133 if (unlikely(tx_stat & 0x80000000)) { 1134 /* In this driver the packet tag is used as the packet 1135 * length. Since a packet length can never reach the 1136 * size of 0x8000, this bit is reserved. It is worth 1137 * noting that the "reserved bit" in the warning above 1138 * does not reference a hardware defined reserved bit 1139 * but rather a driver defined one. 1140 */ 1141 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high"); 1142 } else { 1143 if (unlikely(tx_stat & TX_STS_ES_)) { 1144 dev->stats.tx_errors++; 1145 } else { 1146 dev->stats.tx_packets++; 1147 dev->stats.tx_bytes += (tx_stat >> 16); 1148 } 1149 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { 1150 dev->stats.collisions += 16; 1151 dev->stats.tx_aborted_errors += 1; 1152 } else { 1153 dev->stats.collisions += 1154 ((tx_stat >> 3) & 0xF); 1155 } 1156 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) 1157 dev->stats.tx_carrier_errors += 1; 1158 if (unlikely(tx_stat & TX_STS_LATE_COL_)) { 1159 dev->stats.collisions++; 1160 dev->stats.tx_aborted_errors++; 1161 } 1162 } 1163 } 1164 } 1165 1166 /* Increments the Rx error counters */ 1167 static void 1168 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) 1169 { 1170 int crc_err = 0; 1171 1172 if (unlikely(rxstat & RX_STS_ES_)) { 1173 dev->stats.rx_errors++; 1174 if (unlikely(rxstat & RX_STS_CRC_ERR_)) { 1175 dev->stats.rx_crc_errors++; 1176 crc_err = 1; 1177 } 1178 } 1179 if (likely(!crc_err)) { 1180 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && 1181 (rxstat & RX_STS_LENGTH_ERR_))) 1182 dev->stats.rx_length_errors++; 1183 if (rxstat & RX_STS_MCAST_) 1184 dev->stats.multicast++; 1185 } 1186 } 1187 1188 /* Quickly dumps bad packets */ 1189 static void 1190 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords) 1191 { 1192 if (likely(pktwords >= 4)) { 1193 unsigned int timeout = 500; 1194 unsigned int val; 1195 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); 1196 do { 1197 udelay(1); 1198 val = smsc911x_reg_read(pdata, RX_DP_CTRL); 1199 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); 1200 1201 if (unlikely(timeout == 0)) 1202 SMSC_WARN(pdata, hw, "Timed out waiting for " 1203 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val); 1204 } else { 1205 unsigned int temp; 1206 while (pktwords--) 1207 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO); 1208 } 1209 } 1210 1211 /* NAPI poll function */ 1212 static int smsc911x_poll(struct napi_struct *napi, int budget) 1213 { 1214 struct smsc911x_data *pdata = 1215 container_of(napi, struct smsc911x_data, napi); 1216 struct net_device *dev = pdata->dev; 1217 int npackets = 0; 1218 1219 while (npackets < budget) { 1220 unsigned int pktlength; 1221 unsigned int pktwords; 1222 struct sk_buff *skb; 1223 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); 1224 1225 if (!rxstat) { 1226 unsigned int temp; 1227 /* We processed all packets available. Tell NAPI it can 1228 * stop polling then re-enable rx interrupts */ 1229 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); 1230 napi_complete(napi); 1231 temp = smsc911x_reg_read(pdata, INT_EN); 1232 temp |= INT_EN_RSFL_EN_; 1233 smsc911x_reg_write(pdata, INT_EN, temp); 1234 break; 1235 } 1236 1237 /* Count packet for NAPI scheduling, even if it has an error. 1238 * Error packets still require cycles to discard */ 1239 npackets++; 1240 1241 pktlength = ((rxstat & 0x3FFF0000) >> 16); 1242 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; 1243 smsc911x_rx_counterrors(dev, rxstat); 1244 1245 if (unlikely(rxstat & RX_STS_ES_)) { 1246 SMSC_WARN(pdata, rx_err, 1247 "Discarding packet with error bit set"); 1248 /* Packet has an error, discard it and continue with 1249 * the next */ 1250 smsc911x_rx_fastforward(pdata, pktwords); 1251 dev->stats.rx_dropped++; 1252 continue; 1253 } 1254 1255 skb = netdev_alloc_skb(dev, pktwords << 2); 1256 if (unlikely(!skb)) { 1257 SMSC_WARN(pdata, rx_err, 1258 "Unable to allocate skb for rx packet"); 1259 /* Drop the packet and stop this polling iteration */ 1260 smsc911x_rx_fastforward(pdata, pktwords); 1261 dev->stats.rx_dropped++; 1262 break; 1263 } 1264 1265 pdata->ops->rx_readfifo(pdata, 1266 (unsigned int *)skb->data, pktwords); 1267 1268 /* Align IP on 16B boundary */ 1269 skb_reserve(skb, NET_IP_ALIGN); 1270 skb_put(skb, pktlength - 4); 1271 skb->protocol = eth_type_trans(skb, dev); 1272 skb_checksum_none_assert(skb); 1273 netif_receive_skb(skb); 1274 1275 /* Update counters */ 1276 dev->stats.rx_packets++; 1277 dev->stats.rx_bytes += (pktlength - 4); 1278 } 1279 1280 /* Return total received packets */ 1281 return npackets; 1282 } 1283 1284 /* Returns hash bit number for given MAC address 1285 * Example: 1286 * 01 00 5E 00 00 01 -> returns bit number 31 */ 1287 static unsigned int smsc911x_hash(char addr[ETH_ALEN]) 1288 { 1289 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 1290 } 1291 1292 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) 1293 { 1294 /* Performs the multicast & mac_cr update. This is called when 1295 * safe on the current hardware, and with the mac_lock held */ 1296 unsigned int mac_cr; 1297 1298 SMSC_ASSERT_MAC_LOCK(pdata); 1299 1300 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1301 mac_cr |= pdata->set_bits_mask; 1302 mac_cr &= ~(pdata->clear_bits_mask); 1303 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1304 smsc911x_mac_write(pdata, HASHH, pdata->hashhi); 1305 smsc911x_mac_write(pdata, HASHL, pdata->hashlo); 1306 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X", 1307 mac_cr, pdata->hashhi, pdata->hashlo); 1308 } 1309 1310 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) 1311 { 1312 unsigned int mac_cr; 1313 1314 /* This function is only called for older LAN911x devices 1315 * (revA or revB), where MAC_CR, HASHH and HASHL should not 1316 * be modified during Rx - newer devices immediately update the 1317 * registers. 1318 * 1319 * This is called from interrupt context */ 1320 1321 spin_lock(&pdata->mac_lock); 1322 1323 /* Check Rx has stopped */ 1324 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) 1325 SMSC_WARN(pdata, drv, "Rx not stopped"); 1326 1327 /* Perform the update - safe to do now Rx has stopped */ 1328 smsc911x_rx_multicast_update(pdata); 1329 1330 /* Re-enable Rx */ 1331 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1332 mac_cr |= MAC_CR_RXEN_; 1333 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1334 1335 pdata->multicast_update_pending = 0; 1336 1337 spin_unlock(&pdata->mac_lock); 1338 } 1339 1340 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata) 1341 { 1342 struct net_device *ndev = pdata->dev; 1343 struct phy_device *phy_dev = ndev->phydev; 1344 int rc = 0; 1345 1346 if (!phy_dev) 1347 return rc; 1348 1349 /* If the internal PHY is in General Power-Down mode, all, except the 1350 * management interface, is powered-down and stays in that condition as 1351 * long as Phy register bit 0.11 is HIGH. 1352 * 1353 * In that case, clear the bit 0.11, so the PHY powers up and we can 1354 * access to the phy registers. 1355 */ 1356 rc = phy_read(phy_dev, MII_BMCR); 1357 if (rc < 0) { 1358 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1359 return rc; 1360 } 1361 1362 /* If the PHY general power-down bit is not set is not necessary to 1363 * disable the general power down-mode. 1364 */ 1365 if (rc & BMCR_PDOWN) { 1366 rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN); 1367 if (rc < 0) { 1368 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1369 return rc; 1370 } 1371 1372 usleep_range(1000, 1500); 1373 } 1374 1375 return 0; 1376 } 1377 1378 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata) 1379 { 1380 struct net_device *ndev = pdata->dev; 1381 struct phy_device *phy_dev = ndev->phydev; 1382 int rc = 0; 1383 1384 if (!phy_dev) 1385 return rc; 1386 1387 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS); 1388 1389 if (rc < 0) { 1390 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1391 return rc; 1392 } 1393 1394 /* Only disable if energy detect mode is already enabled */ 1395 if (rc & MII_LAN83C185_EDPWRDOWN) { 1396 /* Disable energy detect mode for this SMSC Transceivers */ 1397 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS, 1398 rc & (~MII_LAN83C185_EDPWRDOWN)); 1399 1400 if (rc < 0) { 1401 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1402 return rc; 1403 } 1404 /* Allow PHY to wakeup */ 1405 mdelay(2); 1406 } 1407 1408 return 0; 1409 } 1410 1411 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata) 1412 { 1413 struct net_device *ndev = pdata->dev; 1414 struct phy_device *phy_dev = ndev->phydev; 1415 int rc = 0; 1416 1417 if (!phy_dev) 1418 return rc; 1419 1420 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS); 1421 1422 if (rc < 0) { 1423 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1424 return rc; 1425 } 1426 1427 /* Only enable if energy detect mode is already disabled */ 1428 if (!(rc & MII_LAN83C185_EDPWRDOWN)) { 1429 /* Enable energy detect mode for this SMSC Transceivers */ 1430 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS, 1431 rc | MII_LAN83C185_EDPWRDOWN); 1432 1433 if (rc < 0) { 1434 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1435 return rc; 1436 } 1437 } 1438 return 0; 1439 } 1440 1441 static int smsc911x_soft_reset(struct smsc911x_data *pdata) 1442 { 1443 unsigned int timeout; 1444 unsigned int temp; 1445 int ret; 1446 1447 /* 1448 * Make sure to power-up the PHY chip before doing a reset, otherwise 1449 * the reset fails. 1450 */ 1451 ret = smsc911x_phy_general_power_up(pdata); 1452 if (ret) { 1453 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip"); 1454 return ret; 1455 } 1456 1457 /* 1458 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that 1459 * are initialized in a Energy Detect Power-Down mode that prevents 1460 * the MAC chip to be software reseted. So we have to wakeup the PHY 1461 * before. 1462 */ 1463 if (pdata->generation == 4) { 1464 ret = smsc911x_phy_disable_energy_detect(pdata); 1465 1466 if (ret) { 1467 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1468 return ret; 1469 } 1470 } 1471 1472 /* Reset the LAN911x */ 1473 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_); 1474 timeout = 10; 1475 do { 1476 udelay(10); 1477 temp = smsc911x_reg_read(pdata, HW_CFG); 1478 } while ((--timeout) && (temp & HW_CFG_SRST_)); 1479 1480 if (unlikely(temp & HW_CFG_SRST_)) { 1481 SMSC_WARN(pdata, drv, "Failed to complete reset"); 1482 return -EIO; 1483 } 1484 1485 if (pdata->generation == 4) { 1486 ret = smsc911x_phy_enable_energy_detect(pdata); 1487 1488 if (ret) { 1489 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1490 return ret; 1491 } 1492 } 1493 1494 return 0; 1495 } 1496 1497 /* Sets the device MAC address to dev_addr, called with mac_lock held */ 1498 static void 1499 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6]) 1500 { 1501 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; 1502 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | 1503 (dev_addr[1] << 8) | dev_addr[0]; 1504 1505 SMSC_ASSERT_MAC_LOCK(pdata); 1506 1507 smsc911x_mac_write(pdata, ADDRH, mac_high16); 1508 smsc911x_mac_write(pdata, ADDRL, mac_low32); 1509 } 1510 1511 static void smsc911x_disable_irq_chip(struct net_device *dev) 1512 { 1513 struct smsc911x_data *pdata = netdev_priv(dev); 1514 1515 smsc911x_reg_write(pdata, INT_EN, 0); 1516 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 1517 } 1518 1519 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) 1520 { 1521 struct net_device *dev = dev_id; 1522 struct smsc911x_data *pdata = netdev_priv(dev); 1523 u32 intsts = smsc911x_reg_read(pdata, INT_STS); 1524 u32 inten = smsc911x_reg_read(pdata, INT_EN); 1525 int serviced = IRQ_NONE; 1526 u32 temp; 1527 1528 if (unlikely(intsts & inten & INT_STS_SW_INT_)) { 1529 temp = smsc911x_reg_read(pdata, INT_EN); 1530 temp &= (~INT_EN_SW_INT_EN_); 1531 smsc911x_reg_write(pdata, INT_EN, temp); 1532 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); 1533 pdata->software_irq_signal = 1; 1534 smp_wmb(); 1535 serviced = IRQ_HANDLED; 1536 } 1537 1538 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { 1539 /* Called when there is a multicast update scheduled and 1540 * it is now safe to complete the update */ 1541 SMSC_TRACE(pdata, intr, "RX Stop interrupt"); 1542 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); 1543 if (pdata->multicast_update_pending) 1544 smsc911x_rx_multicast_update_workaround(pdata); 1545 serviced = IRQ_HANDLED; 1546 } 1547 1548 if (intsts & inten & INT_STS_TDFA_) { 1549 temp = smsc911x_reg_read(pdata, FIFO_INT); 1550 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1551 smsc911x_reg_write(pdata, FIFO_INT, temp); 1552 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); 1553 netif_wake_queue(dev); 1554 serviced = IRQ_HANDLED; 1555 } 1556 1557 if (unlikely(intsts & inten & INT_STS_RXE_)) { 1558 SMSC_TRACE(pdata, intr, "RX Error interrupt"); 1559 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); 1560 serviced = IRQ_HANDLED; 1561 } 1562 1563 if (likely(intsts & inten & INT_STS_RSFL_)) { 1564 if (likely(napi_schedule_prep(&pdata->napi))) { 1565 /* Disable Rx interrupts */ 1566 temp = smsc911x_reg_read(pdata, INT_EN); 1567 temp &= (~INT_EN_RSFL_EN_); 1568 smsc911x_reg_write(pdata, INT_EN, temp); 1569 /* Schedule a NAPI poll */ 1570 __napi_schedule(&pdata->napi); 1571 } else { 1572 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed"); 1573 } 1574 serviced = IRQ_HANDLED; 1575 } 1576 1577 return serviced; 1578 } 1579 1580 static int smsc911x_open(struct net_device *dev) 1581 { 1582 struct smsc911x_data *pdata = netdev_priv(dev); 1583 unsigned int timeout; 1584 unsigned int temp; 1585 unsigned int intcfg; 1586 int retval; 1587 int irq_flags; 1588 1589 /* find and start the given phy */ 1590 if (!dev->phydev) { 1591 retval = smsc911x_mii_probe(dev); 1592 if (retval < 0) { 1593 SMSC_WARN(pdata, probe, "Error starting phy"); 1594 goto out; 1595 } 1596 } 1597 1598 /* Reset the LAN911x */ 1599 retval = smsc911x_soft_reset(pdata); 1600 if (retval) { 1601 SMSC_WARN(pdata, hw, "soft reset failed"); 1602 goto mii_free_out; 1603 } 1604 1605 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1606 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1607 1608 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ 1609 spin_lock_irq(&pdata->mac_lock); 1610 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); 1611 spin_unlock_irq(&pdata->mac_lock); 1612 1613 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1614 timeout = 50; 1615 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && 1616 --timeout) { 1617 udelay(10); 1618 } 1619 1620 if (unlikely(timeout == 0)) 1621 SMSC_WARN(pdata, ifup, 1622 "Timed out waiting for EEPROM busy bit to clear"); 1623 1624 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000); 1625 1626 /* The soft reset above cleared the device's MAC address, 1627 * restore it from local copy (set in probe) */ 1628 spin_lock_irq(&pdata->mac_lock); 1629 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1630 spin_unlock_irq(&pdata->mac_lock); 1631 1632 /* Initialise irqs, but leave all sources disabled */ 1633 smsc911x_disable_irq_chip(dev); 1634 1635 /* Set interrupt deassertion to 100uS */ 1636 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); 1637 1638 if (pdata->config.irq_polarity) { 1639 SMSC_TRACE(pdata, ifup, "irq polarity: active high"); 1640 intcfg |= INT_CFG_IRQ_POL_; 1641 } else { 1642 SMSC_TRACE(pdata, ifup, "irq polarity: active low"); 1643 } 1644 1645 if (pdata->config.irq_type) { 1646 SMSC_TRACE(pdata, ifup, "irq type: push-pull"); 1647 intcfg |= INT_CFG_IRQ_TYPE_; 1648 } else { 1649 SMSC_TRACE(pdata, ifup, "irq type: open drain"); 1650 } 1651 1652 smsc911x_reg_write(pdata, INT_CFG, intcfg); 1653 1654 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq); 1655 pdata->software_irq_signal = 0; 1656 smp_wmb(); 1657 1658 irq_flags = irq_get_trigger_type(dev->irq); 1659 retval = request_irq(dev->irq, smsc911x_irqhandler, 1660 irq_flags | IRQF_SHARED, dev->name, dev); 1661 if (retval) { 1662 SMSC_WARN(pdata, probe, 1663 "Unable to claim requested irq: %d", dev->irq); 1664 goto mii_free_out; 1665 } 1666 1667 temp = smsc911x_reg_read(pdata, INT_EN); 1668 temp |= INT_EN_SW_INT_EN_; 1669 smsc911x_reg_write(pdata, INT_EN, temp); 1670 1671 timeout = 1000; 1672 while (timeout--) { 1673 if (pdata->software_irq_signal) 1674 break; 1675 msleep(1); 1676 } 1677 1678 if (!pdata->software_irq_signal) { 1679 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n", 1680 dev->irq); 1681 retval = -ENODEV; 1682 goto irq_stop_out; 1683 } 1684 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d", 1685 dev->irq); 1686 1687 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n", 1688 (unsigned long)pdata->ioaddr, dev->irq); 1689 1690 /* Reset the last known duplex and carrier */ 1691 pdata->last_duplex = -1; 1692 pdata->last_carrier = -1; 1693 1694 /* Bring the PHY up */ 1695 phy_start(dev->phydev); 1696 1697 temp = smsc911x_reg_read(pdata, HW_CFG); 1698 /* Preserve TX FIFO size and external PHY configuration */ 1699 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); 1700 temp |= HW_CFG_SF_; 1701 smsc911x_reg_write(pdata, HW_CFG, temp); 1702 1703 temp = smsc911x_reg_read(pdata, FIFO_INT); 1704 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1705 temp &= ~(FIFO_INT_RX_STS_LEVEL_); 1706 smsc911x_reg_write(pdata, FIFO_INT, temp); 1707 1708 /* set RX Data offset to 2 bytes for alignment */ 1709 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8)); 1710 1711 /* enable NAPI polling before enabling RX interrupts */ 1712 napi_enable(&pdata->napi); 1713 1714 temp = smsc911x_reg_read(pdata, INT_EN); 1715 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); 1716 smsc911x_reg_write(pdata, INT_EN, temp); 1717 1718 spin_lock_irq(&pdata->mac_lock); 1719 temp = smsc911x_mac_read(pdata, MAC_CR); 1720 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 1721 smsc911x_mac_write(pdata, MAC_CR, temp); 1722 spin_unlock_irq(&pdata->mac_lock); 1723 1724 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 1725 1726 netif_start_queue(dev); 1727 return 0; 1728 1729 irq_stop_out: 1730 free_irq(dev->irq, dev); 1731 mii_free_out: 1732 phy_disconnect(dev->phydev); 1733 dev->phydev = NULL; 1734 out: 1735 return retval; 1736 } 1737 1738 /* Entry point for stopping the interface */ 1739 static int smsc911x_stop(struct net_device *dev) 1740 { 1741 struct smsc911x_data *pdata = netdev_priv(dev); 1742 unsigned int temp; 1743 1744 /* Disable all device interrupts */ 1745 temp = smsc911x_reg_read(pdata, INT_CFG); 1746 temp &= ~INT_CFG_IRQ_EN_; 1747 smsc911x_reg_write(pdata, INT_CFG, temp); 1748 1749 /* Stop Tx and Rx polling */ 1750 netif_stop_queue(dev); 1751 napi_disable(&pdata->napi); 1752 1753 /* At this point all Rx and Tx activity is stopped */ 1754 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1755 smsc911x_tx_update_txcounters(dev); 1756 1757 free_irq(dev->irq, dev); 1758 1759 /* Bring the PHY down */ 1760 if (dev->phydev) { 1761 phy_stop(dev->phydev); 1762 phy_disconnect(dev->phydev); 1763 dev->phydev = NULL; 1764 } 1765 netif_carrier_off(dev); 1766 1767 SMSC_TRACE(pdata, ifdown, "Interface stopped"); 1768 return 0; 1769 } 1770 1771 /* Entry point for transmitting a packet */ 1772 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 1773 { 1774 struct smsc911x_data *pdata = netdev_priv(dev); 1775 unsigned int freespace; 1776 unsigned int tx_cmd_a; 1777 unsigned int tx_cmd_b; 1778 unsigned int temp; 1779 u32 wrsz; 1780 ulong bufp; 1781 1782 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; 1783 1784 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) 1785 SMSC_WARN(pdata, tx_err, 1786 "Tx data fifo low, space available: %d", freespace); 1787 1788 /* Word alignment adjustment */ 1789 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; 1790 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 1791 tx_cmd_a |= (unsigned int)skb->len; 1792 1793 tx_cmd_b = ((unsigned int)skb->len) << 16; 1794 tx_cmd_b |= (unsigned int)skb->len; 1795 1796 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a); 1797 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b); 1798 1799 bufp = (ulong)skb->data & (~0x3); 1800 wrsz = (u32)skb->len + 3; 1801 wrsz += (u32)((ulong)skb->data & 0x3); 1802 wrsz >>= 2; 1803 1804 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 1805 freespace -= (skb->len + 32); 1806 skb_tx_timestamp(skb); 1807 dev_consume_skb_any(skb); 1808 1809 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) 1810 smsc911x_tx_update_txcounters(dev); 1811 1812 if (freespace < TX_FIFO_LOW_THRESHOLD) { 1813 netif_stop_queue(dev); 1814 temp = smsc911x_reg_read(pdata, FIFO_INT); 1815 temp &= 0x00FFFFFF; 1816 temp |= 0x32000000; 1817 smsc911x_reg_write(pdata, FIFO_INT, temp); 1818 } 1819 1820 return NETDEV_TX_OK; 1821 } 1822 1823 /* Entry point for getting status counters */ 1824 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) 1825 { 1826 struct smsc911x_data *pdata = netdev_priv(dev); 1827 smsc911x_tx_update_txcounters(dev); 1828 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1829 return &dev->stats; 1830 } 1831 1832 /* Entry point for setting addressing modes */ 1833 static void smsc911x_set_multicast_list(struct net_device *dev) 1834 { 1835 struct smsc911x_data *pdata = netdev_priv(dev); 1836 unsigned long flags; 1837 1838 if (dev->flags & IFF_PROMISC) { 1839 /* Enabling promiscuous mode */ 1840 pdata->set_bits_mask = MAC_CR_PRMS_; 1841 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1842 pdata->hashhi = 0; 1843 pdata->hashlo = 0; 1844 } else if (dev->flags & IFF_ALLMULTI) { 1845 /* Enabling all multicast mode */ 1846 pdata->set_bits_mask = MAC_CR_MCPAS_; 1847 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); 1848 pdata->hashhi = 0; 1849 pdata->hashlo = 0; 1850 } else if (!netdev_mc_empty(dev)) { 1851 /* Enabling specific multicast addresses */ 1852 unsigned int hash_high = 0; 1853 unsigned int hash_low = 0; 1854 struct netdev_hw_addr *ha; 1855 1856 pdata->set_bits_mask = MAC_CR_HPFILT_; 1857 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1858 1859 netdev_for_each_mc_addr(ha, dev) { 1860 unsigned int bitnum = smsc911x_hash(ha->addr); 1861 unsigned int mask = 0x01 << (bitnum & 0x1F); 1862 1863 if (bitnum & 0x20) 1864 hash_high |= mask; 1865 else 1866 hash_low |= mask; 1867 } 1868 1869 pdata->hashhi = hash_high; 1870 pdata->hashlo = hash_low; 1871 } else { 1872 /* Enabling local MAC address only */ 1873 pdata->set_bits_mask = 0; 1874 pdata->clear_bits_mask = 1875 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1876 pdata->hashhi = 0; 1877 pdata->hashlo = 0; 1878 } 1879 1880 spin_lock_irqsave(&pdata->mac_lock, flags); 1881 1882 if (pdata->generation <= 1) { 1883 /* Older hardware revision - cannot change these flags while 1884 * receiving data */ 1885 if (!pdata->multicast_update_pending) { 1886 unsigned int temp; 1887 SMSC_TRACE(pdata, hw, "scheduling mcast update"); 1888 pdata->multicast_update_pending = 1; 1889 1890 /* Request the hardware to stop, then perform the 1891 * update when we get an RX_STOP interrupt */ 1892 temp = smsc911x_mac_read(pdata, MAC_CR); 1893 temp &= ~(MAC_CR_RXEN_); 1894 smsc911x_mac_write(pdata, MAC_CR, temp); 1895 } else { 1896 /* There is another update pending, this should now 1897 * use the newer values */ 1898 } 1899 } else { 1900 /* Newer hardware revision - can write immediately */ 1901 smsc911x_rx_multicast_update(pdata); 1902 } 1903 1904 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1905 } 1906 1907 #ifdef CONFIG_NET_POLL_CONTROLLER 1908 static void smsc911x_poll_controller(struct net_device *dev) 1909 { 1910 disable_irq(dev->irq); 1911 smsc911x_irqhandler(0, dev); 1912 enable_irq(dev->irq); 1913 } 1914 #endif /* CONFIG_NET_POLL_CONTROLLER */ 1915 1916 static int smsc911x_set_mac_address(struct net_device *dev, void *p) 1917 { 1918 struct smsc911x_data *pdata = netdev_priv(dev); 1919 struct sockaddr *addr = p; 1920 1921 /* On older hardware revisions we cannot change the mac address 1922 * registers while receiving data. Newer devices can safely change 1923 * this at any time. */ 1924 if (pdata->generation <= 1 && netif_running(dev)) 1925 return -EBUSY; 1926 1927 if (!is_valid_ether_addr(addr->sa_data)) 1928 return -EADDRNOTAVAIL; 1929 1930 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 1931 1932 spin_lock_irq(&pdata->mac_lock); 1933 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1934 spin_unlock_irq(&pdata->mac_lock); 1935 1936 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 1937 1938 return 0; 1939 } 1940 1941 /* Standard ioctls for mii-tool */ 1942 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1943 { 1944 if (!netif_running(dev) || !dev->phydev) 1945 return -EINVAL; 1946 1947 return phy_mii_ioctl(dev->phydev, ifr, cmd); 1948 } 1949 1950 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, 1951 struct ethtool_drvinfo *info) 1952 { 1953 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); 1954 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); 1955 strlcpy(info->bus_info, dev_name(dev->dev.parent), 1956 sizeof(info->bus_info)); 1957 } 1958 1959 static int smsc911x_ethtool_nwayreset(struct net_device *dev) 1960 { 1961 return phy_start_aneg(dev->phydev); 1962 } 1963 1964 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) 1965 { 1966 struct smsc911x_data *pdata = netdev_priv(dev); 1967 return pdata->msg_enable; 1968 } 1969 1970 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1971 { 1972 struct smsc911x_data *pdata = netdev_priv(dev); 1973 pdata->msg_enable = level; 1974 } 1975 1976 static int smsc911x_ethtool_getregslen(struct net_device *dev) 1977 { 1978 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * 1979 sizeof(u32); 1980 } 1981 1982 static void 1983 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, 1984 void *buf) 1985 { 1986 struct smsc911x_data *pdata = netdev_priv(dev); 1987 struct phy_device *phy_dev = dev->phydev; 1988 unsigned long flags; 1989 unsigned int i; 1990 unsigned int j = 0; 1991 u32 *data = buf; 1992 1993 regs->version = pdata->idrev; 1994 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) 1995 data[j++] = smsc911x_reg_read(pdata, i); 1996 1997 for (i = MAC_CR; i <= WUCSR; i++) { 1998 spin_lock_irqsave(&pdata->mac_lock, flags); 1999 data[j++] = smsc911x_mac_read(pdata, i); 2000 spin_unlock_irqrestore(&pdata->mac_lock, flags); 2001 } 2002 2003 for (i = 0; i <= 31; i++) 2004 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus, 2005 phy_dev->mdio.addr, i); 2006 } 2007 2008 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) 2009 { 2010 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); 2011 temp &= ~GPIO_CFG_EEPR_EN_; 2012 smsc911x_reg_write(pdata, GPIO_CFG, temp); 2013 msleep(1); 2014 } 2015 2016 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) 2017 { 2018 int timeout = 100; 2019 u32 e2cmd; 2020 2021 SMSC_TRACE(pdata, drv, "op 0x%08x", op); 2022 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { 2023 SMSC_WARN(pdata, drv, "Busy at start"); 2024 return -EBUSY; 2025 } 2026 2027 e2cmd = op | E2P_CMD_EPC_BUSY_; 2028 smsc911x_reg_write(pdata, E2P_CMD, e2cmd); 2029 2030 do { 2031 msleep(1); 2032 e2cmd = smsc911x_reg_read(pdata, E2P_CMD); 2033 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); 2034 2035 if (!timeout) { 2036 SMSC_TRACE(pdata, drv, "TIMED OUT"); 2037 return -EAGAIN; 2038 } 2039 2040 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { 2041 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation"); 2042 return -EINVAL; 2043 } 2044 2045 return 0; 2046 } 2047 2048 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, 2049 u8 address, u8 *data) 2050 { 2051 u32 op = E2P_CMD_EPC_CMD_READ_ | address; 2052 int ret; 2053 2054 SMSC_TRACE(pdata, drv, "address 0x%x", address); 2055 ret = smsc911x_eeprom_send_cmd(pdata, op); 2056 2057 if (!ret) 2058 data[address] = smsc911x_reg_read(pdata, E2P_DATA); 2059 2060 return ret; 2061 } 2062 2063 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, 2064 u8 address, u8 data) 2065 { 2066 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; 2067 u32 temp; 2068 int ret; 2069 2070 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data); 2071 ret = smsc911x_eeprom_send_cmd(pdata, op); 2072 2073 if (!ret) { 2074 op = E2P_CMD_EPC_CMD_WRITE_ | address; 2075 smsc911x_reg_write(pdata, E2P_DATA, (u32)data); 2076 2077 /* Workaround for hardware read-after-write restriction */ 2078 temp = smsc911x_reg_read(pdata, BYTE_TEST); 2079 2080 ret = smsc911x_eeprom_send_cmd(pdata, op); 2081 } 2082 2083 return ret; 2084 } 2085 2086 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) 2087 { 2088 return SMSC911X_EEPROM_SIZE; 2089 } 2090 2091 static int smsc911x_ethtool_get_eeprom(struct net_device *dev, 2092 struct ethtool_eeprom *eeprom, u8 *data) 2093 { 2094 struct smsc911x_data *pdata = netdev_priv(dev); 2095 u8 eeprom_data[SMSC911X_EEPROM_SIZE]; 2096 int len; 2097 int i; 2098 2099 smsc911x_eeprom_enable_access(pdata); 2100 2101 len = min(eeprom->len, SMSC911X_EEPROM_SIZE); 2102 for (i = 0; i < len; i++) { 2103 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data); 2104 if (ret < 0) { 2105 eeprom->len = 0; 2106 return ret; 2107 } 2108 } 2109 2110 memcpy(data, &eeprom_data[eeprom->offset], len); 2111 eeprom->len = len; 2112 return 0; 2113 } 2114 2115 static int smsc911x_ethtool_set_eeprom(struct net_device *dev, 2116 struct ethtool_eeprom *eeprom, u8 *data) 2117 { 2118 int ret; 2119 struct smsc911x_data *pdata = netdev_priv(dev); 2120 2121 smsc911x_eeprom_enable_access(pdata); 2122 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); 2123 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data); 2124 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); 2125 2126 /* Single byte write, according to man page */ 2127 eeprom->len = 1; 2128 2129 return ret; 2130 } 2131 2132 static const struct ethtool_ops smsc911x_ethtool_ops = { 2133 .get_link = ethtool_op_get_link, 2134 .get_drvinfo = smsc911x_ethtool_getdrvinfo, 2135 .nway_reset = smsc911x_ethtool_nwayreset, 2136 .get_msglevel = smsc911x_ethtool_getmsglevel, 2137 .set_msglevel = smsc911x_ethtool_setmsglevel, 2138 .get_regs_len = smsc911x_ethtool_getregslen, 2139 .get_regs = smsc911x_ethtool_getregs, 2140 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 2141 .get_eeprom = smsc911x_ethtool_get_eeprom, 2142 .set_eeprom = smsc911x_ethtool_set_eeprom, 2143 .get_ts_info = ethtool_op_get_ts_info, 2144 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2145 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2146 }; 2147 2148 static const struct net_device_ops smsc911x_netdev_ops = { 2149 .ndo_open = smsc911x_open, 2150 .ndo_stop = smsc911x_stop, 2151 .ndo_start_xmit = smsc911x_hard_start_xmit, 2152 .ndo_get_stats = smsc911x_get_stats, 2153 .ndo_set_rx_mode = smsc911x_set_multicast_list, 2154 .ndo_do_ioctl = smsc911x_do_ioctl, 2155 .ndo_change_mtu = eth_change_mtu, 2156 .ndo_validate_addr = eth_validate_addr, 2157 .ndo_set_mac_address = smsc911x_set_mac_address, 2158 #ifdef CONFIG_NET_POLL_CONTROLLER 2159 .ndo_poll_controller = smsc911x_poll_controller, 2160 #endif 2161 }; 2162 2163 /* copies the current mac address from hardware to dev->dev_addr */ 2164 static void smsc911x_read_mac_address(struct net_device *dev) 2165 { 2166 struct smsc911x_data *pdata = netdev_priv(dev); 2167 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); 2168 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); 2169 2170 dev->dev_addr[0] = (u8)(mac_low32); 2171 dev->dev_addr[1] = (u8)(mac_low32 >> 8); 2172 dev->dev_addr[2] = (u8)(mac_low32 >> 16); 2173 dev->dev_addr[3] = (u8)(mac_low32 >> 24); 2174 dev->dev_addr[4] = (u8)(mac_high16); 2175 dev->dev_addr[5] = (u8)(mac_high16 >> 8); 2176 } 2177 2178 /* Initializing private device structures, only called from probe */ 2179 static int smsc911x_init(struct net_device *dev) 2180 { 2181 struct smsc911x_data *pdata = netdev_priv(dev); 2182 unsigned int byte_test, mask; 2183 unsigned int to = 100; 2184 2185 SMSC_TRACE(pdata, probe, "Driver Parameters:"); 2186 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX", 2187 (unsigned long)pdata->ioaddr); 2188 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq); 2189 SMSC_TRACE(pdata, probe, "PHY will be autodetected."); 2190 2191 spin_lock_init(&pdata->dev_lock); 2192 spin_lock_init(&pdata->mac_lock); 2193 2194 if (pdata->ioaddr == NULL) { 2195 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000"); 2196 return -ENODEV; 2197 } 2198 2199 /* 2200 * poll the READY bit in PMT_CTRL. Any other access to the device is 2201 * forbidden while this bit isn't set. Try for 100ms 2202 * 2203 * Note that this test is done before the WORD_SWAP register is 2204 * programmed. So in some configurations the READY bit is at 16 before 2205 * WORD_SWAP is written to. This issue is worked around by waiting 2206 * until either bit 0 or bit 16 gets set in PMT_CTRL. 2207 * 2208 * SMSC has confirmed that checking bit 16 (marked as reserved in 2209 * the datasheet) is fine since these bits "will either never be set 2210 * or can only go high after READY does (so also indicate the device 2211 * is ready)". 2212 */ 2213 2214 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); 2215 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) 2216 udelay(1000); 2217 2218 if (to == 0) { 2219 netdev_err(dev, "Device not READY in 100ms aborting\n"); 2220 return -ENODEV; 2221 } 2222 2223 /* Check byte ordering */ 2224 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2225 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test); 2226 if (byte_test == 0x43218765) { 2227 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, " 2228 "applying WORD_SWAP"); 2229 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff); 2230 2231 /* 1 dummy read of BYTE_TEST is needed after a write to 2232 * WORD_SWAP before its contents are valid */ 2233 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2234 2235 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2236 } 2237 2238 if (byte_test != 0x87654321) { 2239 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test); 2240 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { 2241 SMSC_WARN(pdata, probe, 2242 "top 16 bits equal to bottom 16 bits"); 2243 SMSC_TRACE(pdata, probe, 2244 "This may mean the chip is set " 2245 "for 32 bit while the bus is reading 16 bit"); 2246 } 2247 return -ENODEV; 2248 } 2249 2250 /* Default generation to zero (all workarounds apply) */ 2251 pdata->generation = 0; 2252 2253 pdata->idrev = smsc911x_reg_read(pdata, ID_REV); 2254 switch (pdata->idrev & 0xFFFF0000) { 2255 case 0x01180000: 2256 case 0x01170000: 2257 case 0x01160000: 2258 case 0x01150000: 2259 case 0x218A0000: 2260 /* LAN911[5678] family */ 2261 pdata->generation = pdata->idrev & 0x0000FFFF; 2262 break; 2263 2264 case 0x118A0000: 2265 case 0x117A0000: 2266 case 0x116A0000: 2267 case 0x115A0000: 2268 /* LAN921[5678] family */ 2269 pdata->generation = 3; 2270 break; 2271 2272 case 0x92100000: 2273 case 0x92110000: 2274 case 0x92200000: 2275 case 0x92210000: 2276 /* LAN9210/LAN9211/LAN9220/LAN9221 */ 2277 pdata->generation = 4; 2278 break; 2279 2280 default: 2281 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X", 2282 pdata->idrev); 2283 return -ENODEV; 2284 } 2285 2286 SMSC_TRACE(pdata, probe, 2287 "LAN911x identified, idrev: 0x%08X, generation: %d", 2288 pdata->idrev, pdata->generation); 2289 2290 if (pdata->generation == 0) 2291 SMSC_WARN(pdata, probe, 2292 "This driver is not intended for this chip revision"); 2293 2294 /* workaround for platforms without an eeprom, where the mac address 2295 * is stored elsewhere and set by the bootloader. This saves the 2296 * mac address before resetting the device */ 2297 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) { 2298 spin_lock_irq(&pdata->mac_lock); 2299 smsc911x_read_mac_address(dev); 2300 spin_unlock_irq(&pdata->mac_lock); 2301 } 2302 2303 /* Reset the LAN911x */ 2304 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata)) 2305 return -ENODEV; 2306 2307 dev->flags |= IFF_MULTICAST; 2308 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT); 2309 dev->netdev_ops = &smsc911x_netdev_ops; 2310 dev->ethtool_ops = &smsc911x_ethtool_ops; 2311 2312 return 0; 2313 } 2314 2315 static int smsc911x_drv_remove(struct platform_device *pdev) 2316 { 2317 struct net_device *dev; 2318 struct smsc911x_data *pdata; 2319 struct resource *res; 2320 2321 dev = platform_get_drvdata(pdev); 2322 BUG_ON(!dev); 2323 pdata = netdev_priv(dev); 2324 BUG_ON(!pdata); 2325 BUG_ON(!pdata->ioaddr); 2326 WARN_ON(dev->phydev); 2327 2328 SMSC_TRACE(pdata, ifdown, "Stopping driver"); 2329 2330 mdiobus_unregister(pdata->mii_bus); 2331 mdiobus_free(pdata->mii_bus); 2332 2333 unregister_netdev(dev); 2334 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2335 "smsc911x-memory"); 2336 if (!res) 2337 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2338 2339 release_mem_region(res->start, resource_size(res)); 2340 2341 iounmap(pdata->ioaddr); 2342 2343 (void)smsc911x_disable_resources(pdev); 2344 smsc911x_free_resources(pdev); 2345 2346 free_netdev(dev); 2347 2348 pm_runtime_put(&pdev->dev); 2349 pm_runtime_disable(&pdev->dev); 2350 2351 return 0; 2352 } 2353 2354 /* standard register acces */ 2355 static const struct smsc911x_ops standard_smsc911x_ops = { 2356 .reg_read = __smsc911x_reg_read, 2357 .reg_write = __smsc911x_reg_write, 2358 .rx_readfifo = smsc911x_rx_readfifo, 2359 .tx_writefifo = smsc911x_tx_writefifo, 2360 }; 2361 2362 /* shifted register access */ 2363 static const struct smsc911x_ops shifted_smsc911x_ops = { 2364 .reg_read = __smsc911x_reg_read_shift, 2365 .reg_write = __smsc911x_reg_write_shift, 2366 .rx_readfifo = smsc911x_rx_readfifo_shift, 2367 .tx_writefifo = smsc911x_tx_writefifo_shift, 2368 }; 2369 2370 static int smsc911x_probe_config(struct smsc911x_platform_config *config, 2371 struct device *dev) 2372 { 2373 int phy_interface; 2374 u32 width = 0; 2375 int err; 2376 2377 phy_interface = device_get_phy_mode(dev); 2378 if (phy_interface < 0) 2379 phy_interface = PHY_INTERFACE_MODE_NA; 2380 config->phy_interface = phy_interface; 2381 2382 device_get_mac_address(dev, config->mac, ETH_ALEN); 2383 2384 err = device_property_read_u32(dev, "reg-io-width", &width); 2385 if (err == -ENXIO) 2386 return err; 2387 if (!err && width == 4) 2388 config->flags |= SMSC911X_USE_32BIT; 2389 else 2390 config->flags |= SMSC911X_USE_16BIT; 2391 2392 device_property_read_u32(dev, "reg-shift", &config->shift); 2393 2394 if (device_property_present(dev, "smsc,irq-active-high")) 2395 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH; 2396 2397 if (device_property_present(dev, "smsc,irq-push-pull")) 2398 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL; 2399 2400 if (device_property_present(dev, "smsc,force-internal-phy")) 2401 config->flags |= SMSC911X_FORCE_INTERNAL_PHY; 2402 2403 if (device_property_present(dev, "smsc,force-external-phy")) 2404 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY; 2405 2406 if (device_property_present(dev, "smsc,save-mac-address")) 2407 config->flags |= SMSC911X_SAVE_MAC_ADDRESS; 2408 2409 return 0; 2410 } 2411 2412 static int smsc911x_drv_probe(struct platform_device *pdev) 2413 { 2414 struct net_device *dev; 2415 struct smsc911x_data *pdata; 2416 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev); 2417 struct resource *res; 2418 int res_size, irq; 2419 int retval; 2420 2421 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2422 "smsc911x-memory"); 2423 if (!res) 2424 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2425 if (!res) { 2426 pr_warn("Could not allocate resource\n"); 2427 retval = -ENODEV; 2428 goto out_0; 2429 } 2430 res_size = resource_size(res); 2431 2432 irq = platform_get_irq(pdev, 0); 2433 if (irq == -EPROBE_DEFER) { 2434 retval = -EPROBE_DEFER; 2435 goto out_0; 2436 } else if (irq <= 0) { 2437 pr_warn("Could not allocate irq resource\n"); 2438 retval = -ENODEV; 2439 goto out_0; 2440 } 2441 2442 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { 2443 retval = -EBUSY; 2444 goto out_0; 2445 } 2446 2447 dev = alloc_etherdev(sizeof(struct smsc911x_data)); 2448 if (!dev) { 2449 retval = -ENOMEM; 2450 goto out_release_io_1; 2451 } 2452 2453 SET_NETDEV_DEV(dev, &pdev->dev); 2454 2455 pdata = netdev_priv(dev); 2456 dev->irq = irq; 2457 pdata->ioaddr = ioremap_nocache(res->start, res_size); 2458 2459 pdata->dev = dev; 2460 pdata->msg_enable = ((1 << debug) - 1); 2461 2462 platform_set_drvdata(pdev, dev); 2463 2464 retval = smsc911x_request_resources(pdev); 2465 if (retval) 2466 goto out_request_resources_fail; 2467 2468 retval = smsc911x_enable_resources(pdev); 2469 if (retval) 2470 goto out_enable_resources_fail; 2471 2472 if (pdata->ioaddr == NULL) { 2473 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid"); 2474 retval = -ENOMEM; 2475 goto out_disable_resources; 2476 } 2477 2478 retval = smsc911x_probe_config(&pdata->config, &pdev->dev); 2479 if (retval && config) { 2480 /* copy config parameters across to pdata */ 2481 memcpy(&pdata->config, config, sizeof(pdata->config)); 2482 retval = 0; 2483 } 2484 2485 if (retval) { 2486 SMSC_WARN(pdata, probe, "Error smsc911x config not found"); 2487 goto out_disable_resources; 2488 } 2489 2490 /* assume standard, non-shifted, access to HW registers */ 2491 pdata->ops = &standard_smsc911x_ops; 2492 /* apply the right access if shifting is needed */ 2493 if (pdata->config.shift) 2494 pdata->ops = &shifted_smsc911x_ops; 2495 2496 pm_runtime_enable(&pdev->dev); 2497 pm_runtime_get_sync(&pdev->dev); 2498 2499 retval = smsc911x_init(dev); 2500 if (retval < 0) 2501 goto out_disable_resources; 2502 2503 netif_carrier_off(dev); 2504 2505 retval = smsc911x_mii_init(pdev, dev); 2506 if (retval) { 2507 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval); 2508 goto out_disable_resources; 2509 } 2510 2511 retval = register_netdev(dev); 2512 if (retval) { 2513 SMSC_WARN(pdata, probe, "Error %i registering device", retval); 2514 goto out_disable_resources; 2515 } else { 2516 SMSC_TRACE(pdata, probe, 2517 "Network interface: \"%s\"", dev->name); 2518 } 2519 2520 spin_lock_irq(&pdata->mac_lock); 2521 2522 /* Check if mac address has been specified when bringing interface up */ 2523 if (is_valid_ether_addr(dev->dev_addr)) { 2524 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2525 SMSC_TRACE(pdata, probe, 2526 "MAC Address is specified by configuration"); 2527 } else if (is_valid_ether_addr(pdata->config.mac)) { 2528 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN); 2529 SMSC_TRACE(pdata, probe, 2530 "MAC Address specified by platform data"); 2531 } else { 2532 /* Try reading mac address from device. if EEPROM is present 2533 * it will already have been set */ 2534 smsc_get_mac(dev); 2535 2536 if (is_valid_ether_addr(dev->dev_addr)) { 2537 /* eeprom values are valid so use them */ 2538 SMSC_TRACE(pdata, probe, 2539 "Mac Address is read from LAN911x EEPROM"); 2540 } else { 2541 /* eeprom values are invalid, generate random MAC */ 2542 eth_hw_addr_random(dev); 2543 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2544 SMSC_TRACE(pdata, probe, 2545 "MAC Address is set to eth_random_addr"); 2546 } 2547 } 2548 2549 spin_unlock_irq(&pdata->mac_lock); 2550 2551 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 2552 2553 return 0; 2554 2555 out_disable_resources: 2556 pm_runtime_put(&pdev->dev); 2557 pm_runtime_disable(&pdev->dev); 2558 (void)smsc911x_disable_resources(pdev); 2559 out_enable_resources_fail: 2560 smsc911x_free_resources(pdev); 2561 out_request_resources_fail: 2562 iounmap(pdata->ioaddr); 2563 free_netdev(dev); 2564 out_release_io_1: 2565 release_mem_region(res->start, resource_size(res)); 2566 out_0: 2567 return retval; 2568 } 2569 2570 #ifdef CONFIG_PM 2571 /* This implementation assumes the devices remains powered on its VDDVARIO 2572 * pins during suspend. */ 2573 2574 /* TODO: implement freeze/thaw callbacks for hibernation.*/ 2575 2576 static int smsc911x_suspend(struct device *dev) 2577 { 2578 struct net_device *ndev = dev_get_drvdata(dev); 2579 struct smsc911x_data *pdata = netdev_priv(ndev); 2580 2581 /* enable wake on LAN, energy detection and the external PME 2582 * signal. */ 2583 smsc911x_reg_write(pdata, PMT_CTRL, 2584 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | 2585 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); 2586 2587 return 0; 2588 } 2589 2590 static int smsc911x_resume(struct device *dev) 2591 { 2592 struct net_device *ndev = dev_get_drvdata(dev); 2593 struct smsc911x_data *pdata = netdev_priv(ndev); 2594 unsigned int to = 100; 2595 2596 /* Note 3.11 from the datasheet: 2597 * "When the LAN9220 is in a power saving state, a write of any 2598 * data to the BYTE_TEST register will wake-up the device." 2599 */ 2600 smsc911x_reg_write(pdata, BYTE_TEST, 0); 2601 2602 /* poll the READY bit in PMT_CTRL. Any other access to the device is 2603 * forbidden while this bit isn't set. Try for 100ms and return -EIO 2604 * if it failed. */ 2605 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) 2606 udelay(1000); 2607 2608 return (to == 0) ? -EIO : 0; 2609 } 2610 2611 static const struct dev_pm_ops smsc911x_pm_ops = { 2612 .suspend = smsc911x_suspend, 2613 .resume = smsc911x_resume, 2614 }; 2615 2616 #define SMSC911X_PM_OPS (&smsc911x_pm_ops) 2617 2618 #else 2619 #define SMSC911X_PM_OPS NULL 2620 #endif 2621 2622 #ifdef CONFIG_OF 2623 static const struct of_device_id smsc911x_dt_ids[] = { 2624 { .compatible = "smsc,lan9115", }, 2625 { /* sentinel */ } 2626 }; 2627 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids); 2628 #endif 2629 2630 static const struct acpi_device_id smsc911x_acpi_match[] = { 2631 { "ARMH9118", 0 }, 2632 { } 2633 }; 2634 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match); 2635 2636 static struct platform_driver smsc911x_driver = { 2637 .probe = smsc911x_drv_probe, 2638 .remove = smsc911x_drv_remove, 2639 .driver = { 2640 .name = SMSC_CHIPNAME, 2641 .pm = SMSC911X_PM_OPS, 2642 .of_match_table = of_match_ptr(smsc911x_dt_ids), 2643 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match), 2644 }, 2645 }; 2646 2647 /* Entry point for loading the module */ 2648 static int __init smsc911x_init_module(void) 2649 { 2650 SMSC_INITIALIZE(); 2651 return platform_driver_register(&smsc911x_driver); 2652 } 2653 2654 /* entry point for unloading the module */ 2655 static void __exit smsc911x_cleanup_module(void) 2656 { 2657 platform_driver_unregister(&smsc911x_driver); 2658 } 2659 2660 module_init(smsc911x_init_module); 2661 module_exit(smsc911x_cleanup_module); 2662