1 /*************************************************************************** 2 * 3 * Copyright (C) 2004-2008 SMSC 4 * Copyright (C) 2005-2008 ARM 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 *************************************************************************** 20 * Rewritten, heavily based on smsc911x simple driver by SMSC. 21 * Partly uses io macros from smc91x.c by Nicolas Pitre 22 * 23 * Supported devices: 24 * LAN9115, LAN9116, LAN9117, LAN9118 25 * LAN9215, LAN9216, LAN9217, LAN9218 26 * LAN9210, LAN9211 27 * LAN9220, LAN9221 28 * LAN89218 29 * 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/crc32.h> 35 #include <linux/clk.h> 36 #include <linux/delay.h> 37 #include <linux/errno.h> 38 #include <linux/etherdevice.h> 39 #include <linux/ethtool.h> 40 #include <linux/init.h> 41 #include <linux/interrupt.h> 42 #include <linux/ioport.h> 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/netdevice.h> 46 #include <linux/platform_device.h> 47 #include <linux/regulator/consumer.h> 48 #include <linux/sched.h> 49 #include <linux/timer.h> 50 #include <linux/bug.h> 51 #include <linux/bitops.h> 52 #include <linux/irq.h> 53 #include <linux/io.h> 54 #include <linux/swab.h> 55 #include <linux/phy.h> 56 #include <linux/smsc911x.h> 57 #include <linux/device.h> 58 #include <linux/of.h> 59 #include <linux/of_device.h> 60 #include <linux/of_gpio.h> 61 #include <linux/of_net.h> 62 #include "smsc911x.h" 63 64 #define SMSC_CHIPNAME "smsc911x" 65 #define SMSC_MDIONAME "smsc911x-mdio" 66 #define SMSC_DRV_VERSION "2008-10-21" 67 68 MODULE_LICENSE("GPL"); 69 MODULE_VERSION(SMSC_DRV_VERSION); 70 MODULE_ALIAS("platform:smsc911x"); 71 72 #if USE_DEBUG > 0 73 static int debug = 16; 74 #else 75 static int debug = 3; 76 #endif 77 78 module_param(debug, int, 0); 79 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 80 81 struct smsc911x_data; 82 83 struct smsc911x_ops { 84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); 85 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); 86 void (*rx_readfifo)(struct smsc911x_data *pdata, 87 unsigned int *buf, unsigned int wordcount); 88 void (*tx_writefifo)(struct smsc911x_data *pdata, 89 unsigned int *buf, unsigned int wordcount); 90 }; 91 92 #define SMSC911X_NUM_SUPPLIES 2 93 94 struct smsc911x_data { 95 void __iomem *ioaddr; 96 97 unsigned int idrev; 98 99 /* used to decide which workarounds apply */ 100 unsigned int generation; 101 102 /* device configuration (copied from platform_data during probe) */ 103 struct smsc911x_platform_config config; 104 105 /* This needs to be acquired before calling any of below: 106 * smsc911x_mac_read(), smsc911x_mac_write() 107 */ 108 spinlock_t mac_lock; 109 110 /* spinlock to ensure register accesses are serialised */ 111 spinlock_t dev_lock; 112 113 struct phy_device *phy_dev; 114 struct mii_bus *mii_bus; 115 int phy_irq[PHY_MAX_ADDR]; 116 unsigned int using_extphy; 117 int last_duplex; 118 int last_carrier; 119 120 u32 msg_enable; 121 unsigned int gpio_setting; 122 unsigned int gpio_orig_setting; 123 struct net_device *dev; 124 struct napi_struct napi; 125 126 unsigned int software_irq_signal; 127 128 #ifdef USE_PHY_WORK_AROUND 129 #define MIN_PACKET_SIZE (64) 130 char loopback_tx_pkt[MIN_PACKET_SIZE]; 131 char loopback_rx_pkt[MIN_PACKET_SIZE]; 132 unsigned int resetcount; 133 #endif 134 135 /* Members for Multicast filter workaround */ 136 unsigned int multicast_update_pending; 137 unsigned int set_bits_mask; 138 unsigned int clear_bits_mask; 139 unsigned int hashhi; 140 unsigned int hashlo; 141 142 /* register access functions */ 143 const struct smsc911x_ops *ops; 144 145 /* regulators */ 146 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES]; 147 148 /* clock */ 149 struct clk *clk; 150 }; 151 152 /* Easy access to information */ 153 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) 154 155 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 156 { 157 if (pdata->config.flags & SMSC911X_USE_32BIT) 158 return readl(pdata->ioaddr + reg); 159 160 if (pdata->config.flags & SMSC911X_USE_16BIT) 161 return ((readw(pdata->ioaddr + reg) & 0xFFFF) | 162 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); 163 164 BUG(); 165 return 0; 166 } 167 168 static inline u32 169 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg) 170 { 171 if (pdata->config.flags & SMSC911X_USE_32BIT) 172 return readl(pdata->ioaddr + __smsc_shift(pdata, reg)); 173 174 if (pdata->config.flags & SMSC911X_USE_16BIT) 175 return (readw(pdata->ioaddr + 176 __smsc_shift(pdata, reg)) & 0xFFFF) | 177 ((readw(pdata->ioaddr + 178 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16); 179 180 BUG(); 181 return 0; 182 } 183 184 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 185 { 186 u32 data; 187 unsigned long flags; 188 189 spin_lock_irqsave(&pdata->dev_lock, flags); 190 data = pdata->ops->reg_read(pdata, reg); 191 spin_unlock_irqrestore(&pdata->dev_lock, flags); 192 193 return data; 194 } 195 196 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 197 u32 val) 198 { 199 if (pdata->config.flags & SMSC911X_USE_32BIT) { 200 writel(val, pdata->ioaddr + reg); 201 return; 202 } 203 204 if (pdata->config.flags & SMSC911X_USE_16BIT) { 205 writew(val & 0xFFFF, pdata->ioaddr + reg); 206 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2); 207 return; 208 } 209 210 BUG(); 211 } 212 213 static inline void 214 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val) 215 { 216 if (pdata->config.flags & SMSC911X_USE_32BIT) { 217 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg)); 218 return; 219 } 220 221 if (pdata->config.flags & SMSC911X_USE_16BIT) { 222 writew(val & 0xFFFF, 223 pdata->ioaddr + __smsc_shift(pdata, reg)); 224 writew((val >> 16) & 0xFFFF, 225 pdata->ioaddr + __smsc_shift(pdata, reg + 2)); 226 return; 227 } 228 229 BUG(); 230 } 231 232 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 233 u32 val) 234 { 235 unsigned long flags; 236 237 spin_lock_irqsave(&pdata->dev_lock, flags); 238 pdata->ops->reg_write(pdata, reg, val); 239 spin_unlock_irqrestore(&pdata->dev_lock, flags); 240 } 241 242 /* Writes a packet to the TX_DATA_FIFO */ 243 static inline void 244 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 245 unsigned int wordcount) 246 { 247 unsigned long flags; 248 249 spin_lock_irqsave(&pdata->dev_lock, flags); 250 251 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 252 while (wordcount--) 253 __smsc911x_reg_write(pdata, TX_DATA_FIFO, 254 swab32(*buf++)); 255 goto out; 256 } 257 258 if (pdata->config.flags & SMSC911X_USE_32BIT) { 259 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 260 goto out; 261 } 262 263 if (pdata->config.flags & SMSC911X_USE_16BIT) { 264 while (wordcount--) 265 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++); 266 goto out; 267 } 268 269 BUG(); 270 out: 271 spin_unlock_irqrestore(&pdata->dev_lock, flags); 272 } 273 274 /* Writes a packet to the TX_DATA_FIFO - shifted version */ 275 static inline void 276 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 277 unsigned int wordcount) 278 { 279 unsigned long flags; 280 281 spin_lock_irqsave(&pdata->dev_lock, flags); 282 283 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 284 while (wordcount--) 285 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO, 286 swab32(*buf++)); 287 goto out; 288 } 289 290 if (pdata->config.flags & SMSC911X_USE_32BIT) { 291 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata, 292 TX_DATA_FIFO), buf, wordcount); 293 goto out; 294 } 295 296 if (pdata->config.flags & SMSC911X_USE_16BIT) { 297 while (wordcount--) 298 __smsc911x_reg_write_shift(pdata, 299 TX_DATA_FIFO, *buf++); 300 goto out; 301 } 302 303 BUG(); 304 out: 305 spin_unlock_irqrestore(&pdata->dev_lock, flags); 306 } 307 308 /* Reads a packet out of the RX_DATA_FIFO */ 309 static inline void 310 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 311 unsigned int wordcount) 312 { 313 unsigned long flags; 314 315 spin_lock_irqsave(&pdata->dev_lock, flags); 316 317 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 318 while (wordcount--) 319 *buf++ = swab32(__smsc911x_reg_read(pdata, 320 RX_DATA_FIFO)); 321 goto out; 322 } 323 324 if (pdata->config.flags & SMSC911X_USE_32BIT) { 325 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 326 goto out; 327 } 328 329 if (pdata->config.flags & SMSC911X_USE_16BIT) { 330 while (wordcount--) 331 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); 332 goto out; 333 } 334 335 BUG(); 336 out: 337 spin_unlock_irqrestore(&pdata->dev_lock, flags); 338 } 339 340 /* Reads a packet out of the RX_DATA_FIFO - shifted version */ 341 static inline void 342 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 343 unsigned int wordcount) 344 { 345 unsigned long flags; 346 347 spin_lock_irqsave(&pdata->dev_lock, flags); 348 349 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 350 while (wordcount--) 351 *buf++ = swab32(__smsc911x_reg_read_shift(pdata, 352 RX_DATA_FIFO)); 353 goto out; 354 } 355 356 if (pdata->config.flags & SMSC911X_USE_32BIT) { 357 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata, 358 RX_DATA_FIFO), buf, wordcount); 359 goto out; 360 } 361 362 if (pdata->config.flags & SMSC911X_USE_16BIT) { 363 while (wordcount--) 364 *buf++ = __smsc911x_reg_read_shift(pdata, 365 RX_DATA_FIFO); 366 goto out; 367 } 368 369 BUG(); 370 out: 371 spin_unlock_irqrestore(&pdata->dev_lock, flags); 372 } 373 374 /* 375 * enable regulator and clock resources. 376 */ 377 static int smsc911x_enable_resources(struct platform_device *pdev) 378 { 379 struct net_device *ndev = platform_get_drvdata(pdev); 380 struct smsc911x_data *pdata = netdev_priv(ndev); 381 int ret = 0; 382 383 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies), 384 pdata->supplies); 385 if (ret) 386 netdev_err(ndev, "failed to enable regulators %d\n", 387 ret); 388 389 if (!IS_ERR(pdata->clk)) { 390 ret = clk_prepare_enable(pdata->clk); 391 if (ret < 0) 392 netdev_err(ndev, "failed to enable clock %d\n", ret); 393 } 394 395 return ret; 396 } 397 398 /* 399 * disable resources, currently just regulators. 400 */ 401 static int smsc911x_disable_resources(struct platform_device *pdev) 402 { 403 struct net_device *ndev = platform_get_drvdata(pdev); 404 struct smsc911x_data *pdata = netdev_priv(ndev); 405 int ret = 0; 406 407 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies), 408 pdata->supplies); 409 410 if (!IS_ERR(pdata->clk)) 411 clk_disable_unprepare(pdata->clk); 412 413 return ret; 414 } 415 416 /* 417 * Request resources, currently just regulators. 418 * 419 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where 420 * these are not always-on we need to request regulators to be turned on 421 * before we can try to access the device registers. 422 */ 423 static int smsc911x_request_resources(struct platform_device *pdev) 424 { 425 struct net_device *ndev = platform_get_drvdata(pdev); 426 struct smsc911x_data *pdata = netdev_priv(ndev); 427 int ret = 0; 428 429 /* Request regulators */ 430 pdata->supplies[0].supply = "vdd33a"; 431 pdata->supplies[1].supply = "vddvario"; 432 ret = regulator_bulk_get(&pdev->dev, 433 ARRAY_SIZE(pdata->supplies), 434 pdata->supplies); 435 if (ret) 436 netdev_err(ndev, "couldn't get regulators %d\n", 437 ret); 438 439 /* Request clock */ 440 pdata->clk = clk_get(&pdev->dev, NULL); 441 if (IS_ERR(pdata->clk)) 442 netdev_warn(ndev, "couldn't get clock %li\n", PTR_ERR(pdata->clk)); 443 444 return ret; 445 } 446 447 /* 448 * Free resources, currently just regulators. 449 * 450 */ 451 static void smsc911x_free_resources(struct platform_device *pdev) 452 { 453 struct net_device *ndev = platform_get_drvdata(pdev); 454 struct smsc911x_data *pdata = netdev_priv(ndev); 455 456 /* Free regulators */ 457 regulator_bulk_free(ARRAY_SIZE(pdata->supplies), 458 pdata->supplies); 459 460 /* Free clock */ 461 if (!IS_ERR(pdata->clk)) { 462 clk_put(pdata->clk); 463 pdata->clk = NULL; 464 } 465 } 466 467 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read 468 * and smsc911x_mac_write, so assumes mac_lock is held */ 469 static int smsc911x_mac_complete(struct smsc911x_data *pdata) 470 { 471 int i; 472 u32 val; 473 474 SMSC_ASSERT_MAC_LOCK(pdata); 475 476 for (i = 0; i < 40; i++) { 477 val = smsc911x_reg_read(pdata, MAC_CSR_CMD); 478 if (!(val & MAC_CSR_CMD_CSR_BUSY_)) 479 return 0; 480 } 481 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. " 482 "MAC_CSR_CMD: 0x%08X", val); 483 return -EIO; 484 } 485 486 /* Fetches a MAC register value. Assumes mac_lock is acquired */ 487 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) 488 { 489 unsigned int temp; 490 491 SMSC_ASSERT_MAC_LOCK(pdata); 492 493 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 494 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 495 SMSC_WARN(pdata, hw, "MAC busy at entry"); 496 return 0xFFFFFFFF; 497 } 498 499 /* Send the MAC cmd */ 500 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 501 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); 502 503 /* Workaround for hardware read-after-write restriction */ 504 temp = smsc911x_reg_read(pdata, BYTE_TEST); 505 506 /* Wait for the read to complete */ 507 if (likely(smsc911x_mac_complete(pdata) == 0)) 508 return smsc911x_reg_read(pdata, MAC_CSR_DATA); 509 510 SMSC_WARN(pdata, hw, "MAC busy after read"); 511 return 0xFFFFFFFF; 512 } 513 514 /* Set a mac register, mac_lock must be acquired before calling */ 515 static void smsc911x_mac_write(struct smsc911x_data *pdata, 516 unsigned int offset, u32 val) 517 { 518 unsigned int temp; 519 520 SMSC_ASSERT_MAC_LOCK(pdata); 521 522 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 523 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 524 SMSC_WARN(pdata, hw, 525 "smsc911x_mac_write failed, MAC busy at entry"); 526 return; 527 } 528 529 /* Send data to write */ 530 smsc911x_reg_write(pdata, MAC_CSR_DATA, val); 531 532 /* Write the actual data */ 533 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 534 MAC_CSR_CMD_CSR_BUSY_)); 535 536 /* Workaround for hardware read-after-write restriction */ 537 temp = smsc911x_reg_read(pdata, BYTE_TEST); 538 539 /* Wait for the write to complete */ 540 if (likely(smsc911x_mac_complete(pdata) == 0)) 541 return; 542 543 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write"); 544 } 545 546 /* Get a phy register */ 547 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) 548 { 549 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 550 unsigned long flags; 551 unsigned int addr; 552 int i, reg; 553 554 spin_lock_irqsave(&pdata->mac_lock, flags); 555 556 /* Confirm MII not busy */ 557 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 558 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???"); 559 reg = -EIO; 560 goto out; 561 } 562 563 /* Set the address, index & direction (read from PHY) */ 564 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); 565 smsc911x_mac_write(pdata, MII_ACC, addr); 566 567 /* Wait for read to complete w/ timeout */ 568 for (i = 0; i < 100; i++) 569 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 570 reg = smsc911x_mac_read(pdata, MII_DATA); 571 goto out; 572 } 573 574 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish"); 575 reg = -EIO; 576 577 out: 578 spin_unlock_irqrestore(&pdata->mac_lock, flags); 579 return reg; 580 } 581 582 /* Set a phy register */ 583 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, 584 u16 val) 585 { 586 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 587 unsigned long flags; 588 unsigned int addr; 589 int i, reg; 590 591 spin_lock_irqsave(&pdata->mac_lock, flags); 592 593 /* Confirm MII not busy */ 594 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 595 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???"); 596 reg = -EIO; 597 goto out; 598 } 599 600 /* Put the data to write in the MAC */ 601 smsc911x_mac_write(pdata, MII_DATA, val); 602 603 /* Set the address, index & direction (write to PHY) */ 604 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | 605 MII_ACC_MII_WRITE_; 606 smsc911x_mac_write(pdata, MII_ACC, addr); 607 608 /* Wait for write to complete w/ timeout */ 609 for (i = 0; i < 100; i++) 610 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 611 reg = 0; 612 goto out; 613 } 614 615 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish"); 616 reg = -EIO; 617 618 out: 619 spin_unlock_irqrestore(&pdata->mac_lock, flags); 620 return reg; 621 } 622 623 /* Switch to external phy. Assumes tx and rx are stopped. */ 624 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) 625 { 626 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 627 628 /* Disable phy clocks to the MAC */ 629 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 630 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 631 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 632 udelay(10); /* Enough time for clocks to stop */ 633 634 /* Switch to external phy */ 635 hwcfg |= HW_CFG_EXT_PHY_EN_; 636 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 637 638 /* Enable phy clocks to the MAC */ 639 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 640 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 641 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 642 udelay(10); /* Enough time for clocks to restart */ 643 644 hwcfg |= HW_CFG_SMI_SEL_; 645 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 646 } 647 648 /* Autodetects and enables external phy if present on supported chips. 649 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY 650 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ 651 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) 652 { 653 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 654 655 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { 656 SMSC_TRACE(pdata, hw, "Forcing internal PHY"); 657 pdata->using_extphy = 0; 658 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { 659 SMSC_TRACE(pdata, hw, "Forcing external PHY"); 660 smsc911x_phy_enable_external(pdata); 661 pdata->using_extphy = 1; 662 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { 663 SMSC_TRACE(pdata, hw, 664 "HW_CFG EXT_PHY_DET set, using external PHY"); 665 smsc911x_phy_enable_external(pdata); 666 pdata->using_extphy = 1; 667 } else { 668 SMSC_TRACE(pdata, hw, 669 "HW_CFG EXT_PHY_DET clear, using internal PHY"); 670 pdata->using_extphy = 0; 671 } 672 } 673 674 /* Fetches a tx status out of the status fifo */ 675 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) 676 { 677 unsigned int result = 678 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; 679 680 if (result != 0) 681 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); 682 683 return result; 684 } 685 686 /* Fetches the next rx status */ 687 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) 688 { 689 unsigned int result = 690 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; 691 692 if (result != 0) 693 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); 694 695 return result; 696 } 697 698 #ifdef USE_PHY_WORK_AROUND 699 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) 700 { 701 unsigned int tries; 702 u32 wrsz; 703 u32 rdsz; 704 ulong bufp; 705 706 for (tries = 0; tries < 10; tries++) { 707 unsigned int txcmd_a; 708 unsigned int txcmd_b; 709 unsigned int status; 710 unsigned int pktlength; 711 unsigned int i; 712 713 /* Zero-out rx packet memory */ 714 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); 715 716 /* Write tx packet to 118 */ 717 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; 718 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 719 txcmd_a |= MIN_PACKET_SIZE; 720 721 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; 722 723 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a); 724 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b); 725 726 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); 727 wrsz = MIN_PACKET_SIZE + 3; 728 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); 729 wrsz >>= 2; 730 731 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 732 733 /* Wait till transmit is done */ 734 i = 60; 735 do { 736 udelay(5); 737 status = smsc911x_tx_get_txstatus(pdata); 738 } while ((i--) && (!status)); 739 740 if (!status) { 741 SMSC_WARN(pdata, hw, 742 "Failed to transmit during loopback test"); 743 continue; 744 } 745 if (status & TX_STS_ES_) { 746 SMSC_WARN(pdata, hw, 747 "Transmit encountered errors during loopback test"); 748 continue; 749 } 750 751 /* Wait till receive is done */ 752 i = 60; 753 do { 754 udelay(5); 755 status = smsc911x_rx_get_rxstatus(pdata); 756 } while ((i--) && (!status)); 757 758 if (!status) { 759 SMSC_WARN(pdata, hw, 760 "Failed to receive during loopback test"); 761 continue; 762 } 763 if (status & RX_STS_ES_) { 764 SMSC_WARN(pdata, hw, 765 "Receive encountered errors during loopback test"); 766 continue; 767 } 768 769 pktlength = ((status & 0x3FFF0000UL) >> 16); 770 bufp = (ulong)pdata->loopback_rx_pkt; 771 rdsz = pktlength + 3; 772 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); 773 rdsz >>= 2; 774 775 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz); 776 777 if (pktlength != (MIN_PACKET_SIZE + 4)) { 778 SMSC_WARN(pdata, hw, "Unexpected packet size " 779 "during loop back test, size=%d, will retry", 780 pktlength); 781 } else { 782 unsigned int j; 783 int mismatch = 0; 784 for (j = 0; j < MIN_PACKET_SIZE; j++) { 785 if (pdata->loopback_tx_pkt[j] 786 != pdata->loopback_rx_pkt[j]) { 787 mismatch = 1; 788 break; 789 } 790 } 791 if (!mismatch) { 792 SMSC_TRACE(pdata, hw, "Successfully verified " 793 "loopback packet"); 794 return 0; 795 } else { 796 SMSC_WARN(pdata, hw, "Data mismatch " 797 "during loop back test, will retry"); 798 } 799 } 800 } 801 802 return -EIO; 803 } 804 805 static int smsc911x_phy_reset(struct smsc911x_data *pdata) 806 { 807 struct phy_device *phy_dev = pdata->phy_dev; 808 unsigned int temp; 809 unsigned int i = 100000; 810 811 BUG_ON(!phy_dev); 812 BUG_ON(!phy_dev->bus); 813 814 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset"); 815 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET); 816 do { 817 msleep(1); 818 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, 819 MII_BMCR); 820 } while ((i--) && (temp & BMCR_RESET)); 821 822 if (temp & BMCR_RESET) { 823 SMSC_WARN(pdata, hw, "PHY reset failed to complete"); 824 return -EIO; 825 } 826 /* Extra delay required because the phy may not be completed with 827 * its reset when BMCR_RESET is cleared. Specs say 256 uS is 828 * enough delay but using 1ms here to be safe */ 829 msleep(1); 830 831 return 0; 832 } 833 834 static int smsc911x_phy_loopbacktest(struct net_device *dev) 835 { 836 struct smsc911x_data *pdata = netdev_priv(dev); 837 struct phy_device *phy_dev = pdata->phy_dev; 838 int result = -EIO; 839 unsigned int i, val; 840 unsigned long flags; 841 842 /* Initialise tx packet using broadcast destination address */ 843 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN); 844 845 /* Use incrementing source address */ 846 for (i = 6; i < 12; i++) 847 pdata->loopback_tx_pkt[i] = (char)i; 848 849 /* Set length type field */ 850 pdata->loopback_tx_pkt[12] = 0x00; 851 pdata->loopback_tx_pkt[13] = 0x00; 852 853 for (i = 14; i < MIN_PACKET_SIZE; i++) 854 pdata->loopback_tx_pkt[i] = (char)i; 855 856 val = smsc911x_reg_read(pdata, HW_CFG); 857 val &= HW_CFG_TX_FIF_SZ_; 858 val |= HW_CFG_SF_; 859 smsc911x_reg_write(pdata, HW_CFG, val); 860 861 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 862 smsc911x_reg_write(pdata, RX_CFG, 863 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); 864 865 for (i = 0; i < 10; i++) { 866 /* Set PHY to 10/FD, no ANEG, and loopback mode */ 867 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 868 BMCR_LOOPBACK | BMCR_FULLDPLX); 869 870 /* Enable MAC tx/rx, FD */ 871 spin_lock_irqsave(&pdata->mac_lock, flags); 872 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ 873 | MAC_CR_TXEN_ | MAC_CR_RXEN_); 874 spin_unlock_irqrestore(&pdata->mac_lock, flags); 875 876 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { 877 result = 0; 878 break; 879 } 880 pdata->resetcount++; 881 882 /* Disable MAC rx */ 883 spin_lock_irqsave(&pdata->mac_lock, flags); 884 smsc911x_mac_write(pdata, MAC_CR, 0); 885 spin_unlock_irqrestore(&pdata->mac_lock, flags); 886 887 smsc911x_phy_reset(pdata); 888 } 889 890 /* Disable MAC */ 891 spin_lock_irqsave(&pdata->mac_lock, flags); 892 smsc911x_mac_write(pdata, MAC_CR, 0); 893 spin_unlock_irqrestore(&pdata->mac_lock, flags); 894 895 /* Cancel PHY loopback mode */ 896 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0); 897 898 smsc911x_reg_write(pdata, TX_CFG, 0); 899 smsc911x_reg_write(pdata, RX_CFG, 0); 900 901 return result; 902 } 903 #endif /* USE_PHY_WORK_AROUND */ 904 905 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) 906 { 907 struct phy_device *phy_dev = pdata->phy_dev; 908 u32 afc = smsc911x_reg_read(pdata, AFC_CFG); 909 u32 flow; 910 unsigned long flags; 911 912 if (phy_dev->duplex == DUPLEX_FULL) { 913 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE); 914 u16 rmtadv = phy_read(phy_dev, MII_LPA); 915 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 916 917 if (cap & FLOW_CTRL_RX) 918 flow = 0xFFFF0002; 919 else 920 flow = 0; 921 922 if (cap & FLOW_CTRL_TX) 923 afc |= 0xF; 924 else 925 afc &= ~0xF; 926 927 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s", 928 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 929 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 930 } else { 931 SMSC_TRACE(pdata, hw, "half duplex"); 932 flow = 0; 933 afc |= 0xF; 934 } 935 936 spin_lock_irqsave(&pdata->mac_lock, flags); 937 smsc911x_mac_write(pdata, FLOW, flow); 938 spin_unlock_irqrestore(&pdata->mac_lock, flags); 939 940 smsc911x_reg_write(pdata, AFC_CFG, afc); 941 } 942 943 /* Update link mode if anything has changed. Called periodically when the 944 * PHY is in polling mode, even if nothing has changed. */ 945 static void smsc911x_phy_adjust_link(struct net_device *dev) 946 { 947 struct smsc911x_data *pdata = netdev_priv(dev); 948 struct phy_device *phy_dev = pdata->phy_dev; 949 unsigned long flags; 950 int carrier; 951 952 if (phy_dev->duplex != pdata->last_duplex) { 953 unsigned int mac_cr; 954 SMSC_TRACE(pdata, hw, "duplex state has changed"); 955 956 spin_lock_irqsave(&pdata->mac_lock, flags); 957 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 958 if (phy_dev->duplex) { 959 SMSC_TRACE(pdata, hw, 960 "configuring for full duplex mode"); 961 mac_cr |= MAC_CR_FDPX_; 962 } else { 963 SMSC_TRACE(pdata, hw, 964 "configuring for half duplex mode"); 965 mac_cr &= ~MAC_CR_FDPX_; 966 } 967 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 968 spin_unlock_irqrestore(&pdata->mac_lock, flags); 969 970 smsc911x_phy_update_flowcontrol(pdata); 971 pdata->last_duplex = phy_dev->duplex; 972 } 973 974 carrier = netif_carrier_ok(dev); 975 if (carrier != pdata->last_carrier) { 976 SMSC_TRACE(pdata, hw, "carrier state has changed"); 977 if (carrier) { 978 SMSC_TRACE(pdata, hw, "configuring for carrier OK"); 979 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && 980 (!pdata->using_extphy)) { 981 /* Restore original GPIO configuration */ 982 pdata->gpio_setting = pdata->gpio_orig_setting; 983 smsc911x_reg_write(pdata, GPIO_CFG, 984 pdata->gpio_setting); 985 } 986 } else { 987 SMSC_TRACE(pdata, hw, "configuring for no carrier"); 988 /* Check global setting that LED1 989 * usage is 10/100 indicator */ 990 pdata->gpio_setting = smsc911x_reg_read(pdata, 991 GPIO_CFG); 992 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && 993 (!pdata->using_extphy)) { 994 /* Force 10/100 LED off, after saving 995 * original GPIO configuration */ 996 pdata->gpio_orig_setting = pdata->gpio_setting; 997 998 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; 999 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ 1000 | GPIO_CFG_GPIODIR0_ 1001 | GPIO_CFG_GPIOD0_); 1002 smsc911x_reg_write(pdata, GPIO_CFG, 1003 pdata->gpio_setting); 1004 } 1005 } 1006 pdata->last_carrier = carrier; 1007 } 1008 } 1009 1010 static int smsc911x_mii_probe(struct net_device *dev) 1011 { 1012 struct smsc911x_data *pdata = netdev_priv(dev); 1013 struct phy_device *phydev = NULL; 1014 int ret; 1015 1016 /* find the first phy */ 1017 phydev = phy_find_first(pdata->mii_bus); 1018 if (!phydev) { 1019 netdev_err(dev, "no PHY found\n"); 1020 return -ENODEV; 1021 } 1022 1023 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X", 1024 phydev->addr, phydev->phy_id); 1025 1026 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link, 1027 pdata->config.phy_interface); 1028 1029 if (ret) { 1030 netdev_err(dev, "Could not attach to PHY\n"); 1031 return ret; 1032 } 1033 1034 netdev_info(dev, 1035 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", 1036 phydev->drv->name, dev_name(&phydev->dev), phydev->irq); 1037 1038 /* mask with MAC supported features */ 1039 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause | 1040 SUPPORTED_Asym_Pause); 1041 phydev->advertising = phydev->supported; 1042 1043 pdata->phy_dev = phydev; 1044 pdata->last_duplex = -1; 1045 pdata->last_carrier = -1; 1046 1047 #ifdef USE_PHY_WORK_AROUND 1048 if (smsc911x_phy_loopbacktest(dev) < 0) { 1049 SMSC_WARN(pdata, hw, "Failed Loop Back Test"); 1050 return -ENODEV; 1051 } 1052 SMSC_TRACE(pdata, hw, "Passed Loop Back Test"); 1053 #endif /* USE_PHY_WORK_AROUND */ 1054 1055 SMSC_TRACE(pdata, hw, "phy initialised successfully"); 1056 return 0; 1057 } 1058 1059 static int smsc911x_mii_init(struct platform_device *pdev, 1060 struct net_device *dev) 1061 { 1062 struct smsc911x_data *pdata = netdev_priv(dev); 1063 int err = -ENXIO, i; 1064 1065 pdata->mii_bus = mdiobus_alloc(); 1066 if (!pdata->mii_bus) { 1067 err = -ENOMEM; 1068 goto err_out_1; 1069 } 1070 1071 pdata->mii_bus->name = SMSC_MDIONAME; 1072 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 1073 pdev->name, pdev->id); 1074 pdata->mii_bus->priv = pdata; 1075 pdata->mii_bus->read = smsc911x_mii_read; 1076 pdata->mii_bus->write = smsc911x_mii_write; 1077 pdata->mii_bus->irq = pdata->phy_irq; 1078 for (i = 0; i < PHY_MAX_ADDR; ++i) 1079 pdata->mii_bus->irq[i] = PHY_POLL; 1080 1081 pdata->mii_bus->parent = &pdev->dev; 1082 1083 switch (pdata->idrev & 0xFFFF0000) { 1084 case 0x01170000: 1085 case 0x01150000: 1086 case 0x117A0000: 1087 case 0x115A0000: 1088 /* External PHY supported, try to autodetect */ 1089 smsc911x_phy_initialise_external(pdata); 1090 break; 1091 default: 1092 SMSC_TRACE(pdata, hw, "External PHY is not supported, " 1093 "using internal PHY"); 1094 pdata->using_extphy = 0; 1095 break; 1096 } 1097 1098 if (!pdata->using_extphy) { 1099 /* Mask all PHYs except ID 1 (internal) */ 1100 pdata->mii_bus->phy_mask = ~(1 << 1); 1101 } 1102 1103 if (mdiobus_register(pdata->mii_bus)) { 1104 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1105 goto err_out_free_bus_2; 1106 } 1107 1108 if (smsc911x_mii_probe(dev) < 0) { 1109 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1110 goto err_out_unregister_bus_3; 1111 } 1112 1113 return 0; 1114 1115 err_out_unregister_bus_3: 1116 mdiobus_unregister(pdata->mii_bus); 1117 err_out_free_bus_2: 1118 mdiobus_free(pdata->mii_bus); 1119 err_out_1: 1120 return err; 1121 } 1122 1123 /* Gets the number of tx statuses in the fifo */ 1124 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) 1125 { 1126 return (smsc911x_reg_read(pdata, TX_FIFO_INF) 1127 & TX_FIFO_INF_TSUSED_) >> 16; 1128 } 1129 1130 /* Reads tx statuses and increments counters where necessary */ 1131 static void smsc911x_tx_update_txcounters(struct net_device *dev) 1132 { 1133 struct smsc911x_data *pdata = netdev_priv(dev); 1134 unsigned int tx_stat; 1135 1136 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { 1137 if (unlikely(tx_stat & 0x80000000)) { 1138 /* In this driver the packet tag is used as the packet 1139 * length. Since a packet length can never reach the 1140 * size of 0x8000, this bit is reserved. It is worth 1141 * noting that the "reserved bit" in the warning above 1142 * does not reference a hardware defined reserved bit 1143 * but rather a driver defined one. 1144 */ 1145 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high"); 1146 } else { 1147 if (unlikely(tx_stat & TX_STS_ES_)) { 1148 dev->stats.tx_errors++; 1149 } else { 1150 dev->stats.tx_packets++; 1151 dev->stats.tx_bytes += (tx_stat >> 16); 1152 } 1153 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { 1154 dev->stats.collisions += 16; 1155 dev->stats.tx_aborted_errors += 1; 1156 } else { 1157 dev->stats.collisions += 1158 ((tx_stat >> 3) & 0xF); 1159 } 1160 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) 1161 dev->stats.tx_carrier_errors += 1; 1162 if (unlikely(tx_stat & TX_STS_LATE_COL_)) { 1163 dev->stats.collisions++; 1164 dev->stats.tx_aborted_errors++; 1165 } 1166 } 1167 } 1168 } 1169 1170 /* Increments the Rx error counters */ 1171 static void 1172 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) 1173 { 1174 int crc_err = 0; 1175 1176 if (unlikely(rxstat & RX_STS_ES_)) { 1177 dev->stats.rx_errors++; 1178 if (unlikely(rxstat & RX_STS_CRC_ERR_)) { 1179 dev->stats.rx_crc_errors++; 1180 crc_err = 1; 1181 } 1182 } 1183 if (likely(!crc_err)) { 1184 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && 1185 (rxstat & RX_STS_LENGTH_ERR_))) 1186 dev->stats.rx_length_errors++; 1187 if (rxstat & RX_STS_MCAST_) 1188 dev->stats.multicast++; 1189 } 1190 } 1191 1192 /* Quickly dumps bad packets */ 1193 static void 1194 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords) 1195 { 1196 if (likely(pktwords >= 4)) { 1197 unsigned int timeout = 500; 1198 unsigned int val; 1199 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); 1200 do { 1201 udelay(1); 1202 val = smsc911x_reg_read(pdata, RX_DP_CTRL); 1203 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); 1204 1205 if (unlikely(timeout == 0)) 1206 SMSC_WARN(pdata, hw, "Timed out waiting for " 1207 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val); 1208 } else { 1209 unsigned int temp; 1210 while (pktwords--) 1211 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO); 1212 } 1213 } 1214 1215 /* NAPI poll function */ 1216 static int smsc911x_poll(struct napi_struct *napi, int budget) 1217 { 1218 struct smsc911x_data *pdata = 1219 container_of(napi, struct smsc911x_data, napi); 1220 struct net_device *dev = pdata->dev; 1221 int npackets = 0; 1222 1223 while (npackets < budget) { 1224 unsigned int pktlength; 1225 unsigned int pktwords; 1226 struct sk_buff *skb; 1227 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); 1228 1229 if (!rxstat) { 1230 unsigned int temp; 1231 /* We processed all packets available. Tell NAPI it can 1232 * stop polling then re-enable rx interrupts */ 1233 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); 1234 napi_complete(napi); 1235 temp = smsc911x_reg_read(pdata, INT_EN); 1236 temp |= INT_EN_RSFL_EN_; 1237 smsc911x_reg_write(pdata, INT_EN, temp); 1238 break; 1239 } 1240 1241 /* Count packet for NAPI scheduling, even if it has an error. 1242 * Error packets still require cycles to discard */ 1243 npackets++; 1244 1245 pktlength = ((rxstat & 0x3FFF0000) >> 16); 1246 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; 1247 smsc911x_rx_counterrors(dev, rxstat); 1248 1249 if (unlikely(rxstat & RX_STS_ES_)) { 1250 SMSC_WARN(pdata, rx_err, 1251 "Discarding packet with error bit set"); 1252 /* Packet has an error, discard it and continue with 1253 * the next */ 1254 smsc911x_rx_fastforward(pdata, pktwords); 1255 dev->stats.rx_dropped++; 1256 continue; 1257 } 1258 1259 skb = netdev_alloc_skb(dev, pktwords << 2); 1260 if (unlikely(!skb)) { 1261 SMSC_WARN(pdata, rx_err, 1262 "Unable to allocate skb for rx packet"); 1263 /* Drop the packet and stop this polling iteration */ 1264 smsc911x_rx_fastforward(pdata, pktwords); 1265 dev->stats.rx_dropped++; 1266 break; 1267 } 1268 1269 pdata->ops->rx_readfifo(pdata, 1270 (unsigned int *)skb->data, pktwords); 1271 1272 /* Align IP on 16B boundary */ 1273 skb_reserve(skb, NET_IP_ALIGN); 1274 skb_put(skb, pktlength - 4); 1275 skb->protocol = eth_type_trans(skb, dev); 1276 skb_checksum_none_assert(skb); 1277 netif_receive_skb(skb); 1278 1279 /* Update counters */ 1280 dev->stats.rx_packets++; 1281 dev->stats.rx_bytes += (pktlength - 4); 1282 } 1283 1284 /* Return total received packets */ 1285 return npackets; 1286 } 1287 1288 /* Returns hash bit number for given MAC address 1289 * Example: 1290 * 01 00 5E 00 00 01 -> returns bit number 31 */ 1291 static unsigned int smsc911x_hash(char addr[ETH_ALEN]) 1292 { 1293 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 1294 } 1295 1296 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) 1297 { 1298 /* Performs the multicast & mac_cr update. This is called when 1299 * safe on the current hardware, and with the mac_lock held */ 1300 unsigned int mac_cr; 1301 1302 SMSC_ASSERT_MAC_LOCK(pdata); 1303 1304 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1305 mac_cr |= pdata->set_bits_mask; 1306 mac_cr &= ~(pdata->clear_bits_mask); 1307 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1308 smsc911x_mac_write(pdata, HASHH, pdata->hashhi); 1309 smsc911x_mac_write(pdata, HASHL, pdata->hashlo); 1310 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X", 1311 mac_cr, pdata->hashhi, pdata->hashlo); 1312 } 1313 1314 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) 1315 { 1316 unsigned int mac_cr; 1317 1318 /* This function is only called for older LAN911x devices 1319 * (revA or revB), where MAC_CR, HASHH and HASHL should not 1320 * be modified during Rx - newer devices immediately update the 1321 * registers. 1322 * 1323 * This is called from interrupt context */ 1324 1325 spin_lock(&pdata->mac_lock); 1326 1327 /* Check Rx has stopped */ 1328 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) 1329 SMSC_WARN(pdata, drv, "Rx not stopped"); 1330 1331 /* Perform the update - safe to do now Rx has stopped */ 1332 smsc911x_rx_multicast_update(pdata); 1333 1334 /* Re-enable Rx */ 1335 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1336 mac_cr |= MAC_CR_RXEN_; 1337 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1338 1339 pdata->multicast_update_pending = 0; 1340 1341 spin_unlock(&pdata->mac_lock); 1342 } 1343 1344 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata) 1345 { 1346 int rc = 0; 1347 1348 if (!pdata->phy_dev) 1349 return rc; 1350 1351 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS); 1352 1353 if (rc < 0) { 1354 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1355 return rc; 1356 } 1357 1358 /* 1359 * If energy is detected the PHY is already awake so is not necessary 1360 * to disable the energy detect power-down mode. 1361 */ 1362 if ((rc & MII_LAN83C185_EDPWRDOWN) && 1363 !(rc & MII_LAN83C185_ENERGYON)) { 1364 /* Disable energy detect mode for this SMSC Transceivers */ 1365 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS, 1366 rc & (~MII_LAN83C185_EDPWRDOWN)); 1367 1368 if (rc < 0) { 1369 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1370 return rc; 1371 } 1372 1373 mdelay(1); 1374 } 1375 1376 return 0; 1377 } 1378 1379 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata) 1380 { 1381 int rc = 0; 1382 1383 if (!pdata->phy_dev) 1384 return rc; 1385 1386 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS); 1387 1388 if (rc < 0) { 1389 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1390 return rc; 1391 } 1392 1393 /* Only enable if energy detect mode is already disabled */ 1394 if (!(rc & MII_LAN83C185_EDPWRDOWN)) { 1395 mdelay(100); 1396 /* Enable energy detect mode for this SMSC Transceivers */ 1397 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS, 1398 rc | MII_LAN83C185_EDPWRDOWN); 1399 1400 if (rc < 0) { 1401 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1402 return rc; 1403 } 1404 1405 mdelay(1); 1406 } 1407 return 0; 1408 } 1409 1410 static int smsc911x_soft_reset(struct smsc911x_data *pdata) 1411 { 1412 unsigned int timeout; 1413 unsigned int temp; 1414 int ret; 1415 1416 /* 1417 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that 1418 * are initialized in a Energy Detect Power-Down mode that prevents 1419 * the MAC chip to be software reseted. So we have to wakeup the PHY 1420 * before. 1421 */ 1422 if (pdata->generation == 4) { 1423 ret = smsc911x_phy_disable_energy_detect(pdata); 1424 1425 if (ret) { 1426 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1427 return ret; 1428 } 1429 } 1430 1431 /* Reset the LAN911x */ 1432 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_); 1433 timeout = 10; 1434 do { 1435 udelay(10); 1436 temp = smsc911x_reg_read(pdata, HW_CFG); 1437 } while ((--timeout) && (temp & HW_CFG_SRST_)); 1438 1439 if (unlikely(temp & HW_CFG_SRST_)) { 1440 SMSC_WARN(pdata, drv, "Failed to complete reset"); 1441 return -EIO; 1442 } 1443 1444 if (pdata->generation == 4) { 1445 ret = smsc911x_phy_enable_energy_detect(pdata); 1446 1447 if (ret) { 1448 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1449 return ret; 1450 } 1451 } 1452 1453 return 0; 1454 } 1455 1456 /* Sets the device MAC address to dev_addr, called with mac_lock held */ 1457 static void 1458 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6]) 1459 { 1460 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; 1461 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | 1462 (dev_addr[1] << 8) | dev_addr[0]; 1463 1464 SMSC_ASSERT_MAC_LOCK(pdata); 1465 1466 smsc911x_mac_write(pdata, ADDRH, mac_high16); 1467 smsc911x_mac_write(pdata, ADDRL, mac_low32); 1468 } 1469 1470 static void smsc911x_disable_irq_chip(struct net_device *dev) 1471 { 1472 struct smsc911x_data *pdata = netdev_priv(dev); 1473 1474 smsc911x_reg_write(pdata, INT_EN, 0); 1475 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 1476 } 1477 1478 static int smsc911x_open(struct net_device *dev) 1479 { 1480 struct smsc911x_data *pdata = netdev_priv(dev); 1481 unsigned int timeout; 1482 unsigned int temp; 1483 unsigned int intcfg; 1484 1485 /* if the phy is not yet registered, retry later*/ 1486 if (!pdata->phy_dev) { 1487 SMSC_WARN(pdata, hw, "phy_dev is NULL"); 1488 return -EAGAIN; 1489 } 1490 1491 /* Reset the LAN911x */ 1492 if (smsc911x_soft_reset(pdata)) { 1493 SMSC_WARN(pdata, hw, "soft reset failed"); 1494 return -EIO; 1495 } 1496 1497 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1498 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1499 1500 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ 1501 spin_lock_irq(&pdata->mac_lock); 1502 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); 1503 spin_unlock_irq(&pdata->mac_lock); 1504 1505 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1506 timeout = 50; 1507 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && 1508 --timeout) { 1509 udelay(10); 1510 } 1511 1512 if (unlikely(timeout == 0)) 1513 SMSC_WARN(pdata, ifup, 1514 "Timed out waiting for EEPROM busy bit to clear"); 1515 1516 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000); 1517 1518 /* The soft reset above cleared the device's MAC address, 1519 * restore it from local copy (set in probe) */ 1520 spin_lock_irq(&pdata->mac_lock); 1521 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1522 spin_unlock_irq(&pdata->mac_lock); 1523 1524 /* Initialise irqs, but leave all sources disabled */ 1525 smsc911x_disable_irq_chip(dev); 1526 1527 /* Set interrupt deassertion to 100uS */ 1528 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); 1529 1530 if (pdata->config.irq_polarity) { 1531 SMSC_TRACE(pdata, ifup, "irq polarity: active high"); 1532 intcfg |= INT_CFG_IRQ_POL_; 1533 } else { 1534 SMSC_TRACE(pdata, ifup, "irq polarity: active low"); 1535 } 1536 1537 if (pdata->config.irq_type) { 1538 SMSC_TRACE(pdata, ifup, "irq type: push-pull"); 1539 intcfg |= INT_CFG_IRQ_TYPE_; 1540 } else { 1541 SMSC_TRACE(pdata, ifup, "irq type: open drain"); 1542 } 1543 1544 smsc911x_reg_write(pdata, INT_CFG, intcfg); 1545 1546 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq); 1547 pdata->software_irq_signal = 0; 1548 smp_wmb(); 1549 1550 temp = smsc911x_reg_read(pdata, INT_EN); 1551 temp |= INT_EN_SW_INT_EN_; 1552 smsc911x_reg_write(pdata, INT_EN, temp); 1553 1554 timeout = 1000; 1555 while (timeout--) { 1556 if (pdata->software_irq_signal) 1557 break; 1558 msleep(1); 1559 } 1560 1561 if (!pdata->software_irq_signal) { 1562 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n", 1563 dev->irq); 1564 return -ENODEV; 1565 } 1566 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d", 1567 dev->irq); 1568 1569 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n", 1570 (unsigned long)pdata->ioaddr, dev->irq); 1571 1572 /* Reset the last known duplex and carrier */ 1573 pdata->last_duplex = -1; 1574 pdata->last_carrier = -1; 1575 1576 /* Bring the PHY up */ 1577 phy_start(pdata->phy_dev); 1578 1579 temp = smsc911x_reg_read(pdata, HW_CFG); 1580 /* Preserve TX FIFO size and external PHY configuration */ 1581 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); 1582 temp |= HW_CFG_SF_; 1583 smsc911x_reg_write(pdata, HW_CFG, temp); 1584 1585 temp = smsc911x_reg_read(pdata, FIFO_INT); 1586 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1587 temp &= ~(FIFO_INT_RX_STS_LEVEL_); 1588 smsc911x_reg_write(pdata, FIFO_INT, temp); 1589 1590 /* set RX Data offset to 2 bytes for alignment */ 1591 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8)); 1592 1593 /* enable NAPI polling before enabling RX interrupts */ 1594 napi_enable(&pdata->napi); 1595 1596 temp = smsc911x_reg_read(pdata, INT_EN); 1597 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); 1598 smsc911x_reg_write(pdata, INT_EN, temp); 1599 1600 spin_lock_irq(&pdata->mac_lock); 1601 temp = smsc911x_mac_read(pdata, MAC_CR); 1602 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 1603 smsc911x_mac_write(pdata, MAC_CR, temp); 1604 spin_unlock_irq(&pdata->mac_lock); 1605 1606 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 1607 1608 netif_start_queue(dev); 1609 return 0; 1610 } 1611 1612 /* Entry point for stopping the interface */ 1613 static int smsc911x_stop(struct net_device *dev) 1614 { 1615 struct smsc911x_data *pdata = netdev_priv(dev); 1616 unsigned int temp; 1617 1618 /* Disable all device interrupts */ 1619 temp = smsc911x_reg_read(pdata, INT_CFG); 1620 temp &= ~INT_CFG_IRQ_EN_; 1621 smsc911x_reg_write(pdata, INT_CFG, temp); 1622 1623 /* Stop Tx and Rx polling */ 1624 netif_stop_queue(dev); 1625 napi_disable(&pdata->napi); 1626 1627 /* At this point all Rx and Tx activity is stopped */ 1628 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1629 smsc911x_tx_update_txcounters(dev); 1630 1631 /* Bring the PHY down */ 1632 if (pdata->phy_dev) 1633 phy_stop(pdata->phy_dev); 1634 1635 SMSC_TRACE(pdata, ifdown, "Interface stopped"); 1636 return 0; 1637 } 1638 1639 /* Entry point for transmitting a packet */ 1640 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 1641 { 1642 struct smsc911x_data *pdata = netdev_priv(dev); 1643 unsigned int freespace; 1644 unsigned int tx_cmd_a; 1645 unsigned int tx_cmd_b; 1646 unsigned int temp; 1647 u32 wrsz; 1648 ulong bufp; 1649 1650 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; 1651 1652 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) 1653 SMSC_WARN(pdata, tx_err, 1654 "Tx data fifo low, space available: %d", freespace); 1655 1656 /* Word alignment adjustment */ 1657 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; 1658 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 1659 tx_cmd_a |= (unsigned int)skb->len; 1660 1661 tx_cmd_b = ((unsigned int)skb->len) << 16; 1662 tx_cmd_b |= (unsigned int)skb->len; 1663 1664 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a); 1665 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b); 1666 1667 bufp = (ulong)skb->data & (~0x3); 1668 wrsz = (u32)skb->len + 3; 1669 wrsz += (u32)((ulong)skb->data & 0x3); 1670 wrsz >>= 2; 1671 1672 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 1673 freespace -= (skb->len + 32); 1674 skb_tx_timestamp(skb); 1675 dev_kfree_skb(skb); 1676 1677 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) 1678 smsc911x_tx_update_txcounters(dev); 1679 1680 if (freespace < TX_FIFO_LOW_THRESHOLD) { 1681 netif_stop_queue(dev); 1682 temp = smsc911x_reg_read(pdata, FIFO_INT); 1683 temp &= 0x00FFFFFF; 1684 temp |= 0x32000000; 1685 smsc911x_reg_write(pdata, FIFO_INT, temp); 1686 } 1687 1688 return NETDEV_TX_OK; 1689 } 1690 1691 /* Entry point for getting status counters */ 1692 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) 1693 { 1694 struct smsc911x_data *pdata = netdev_priv(dev); 1695 smsc911x_tx_update_txcounters(dev); 1696 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1697 return &dev->stats; 1698 } 1699 1700 /* Entry point for setting addressing modes */ 1701 static void smsc911x_set_multicast_list(struct net_device *dev) 1702 { 1703 struct smsc911x_data *pdata = netdev_priv(dev); 1704 unsigned long flags; 1705 1706 if (dev->flags & IFF_PROMISC) { 1707 /* Enabling promiscuous mode */ 1708 pdata->set_bits_mask = MAC_CR_PRMS_; 1709 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1710 pdata->hashhi = 0; 1711 pdata->hashlo = 0; 1712 } else if (dev->flags & IFF_ALLMULTI) { 1713 /* Enabling all multicast mode */ 1714 pdata->set_bits_mask = MAC_CR_MCPAS_; 1715 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); 1716 pdata->hashhi = 0; 1717 pdata->hashlo = 0; 1718 } else if (!netdev_mc_empty(dev)) { 1719 /* Enabling specific multicast addresses */ 1720 unsigned int hash_high = 0; 1721 unsigned int hash_low = 0; 1722 struct netdev_hw_addr *ha; 1723 1724 pdata->set_bits_mask = MAC_CR_HPFILT_; 1725 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1726 1727 netdev_for_each_mc_addr(ha, dev) { 1728 unsigned int bitnum = smsc911x_hash(ha->addr); 1729 unsigned int mask = 0x01 << (bitnum & 0x1F); 1730 1731 if (bitnum & 0x20) 1732 hash_high |= mask; 1733 else 1734 hash_low |= mask; 1735 } 1736 1737 pdata->hashhi = hash_high; 1738 pdata->hashlo = hash_low; 1739 } else { 1740 /* Enabling local MAC address only */ 1741 pdata->set_bits_mask = 0; 1742 pdata->clear_bits_mask = 1743 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1744 pdata->hashhi = 0; 1745 pdata->hashlo = 0; 1746 } 1747 1748 spin_lock_irqsave(&pdata->mac_lock, flags); 1749 1750 if (pdata->generation <= 1) { 1751 /* Older hardware revision - cannot change these flags while 1752 * receiving data */ 1753 if (!pdata->multicast_update_pending) { 1754 unsigned int temp; 1755 SMSC_TRACE(pdata, hw, "scheduling mcast update"); 1756 pdata->multicast_update_pending = 1; 1757 1758 /* Request the hardware to stop, then perform the 1759 * update when we get an RX_STOP interrupt */ 1760 temp = smsc911x_mac_read(pdata, MAC_CR); 1761 temp &= ~(MAC_CR_RXEN_); 1762 smsc911x_mac_write(pdata, MAC_CR, temp); 1763 } else { 1764 /* There is another update pending, this should now 1765 * use the newer values */ 1766 } 1767 } else { 1768 /* Newer hardware revision - can write immediately */ 1769 smsc911x_rx_multicast_update(pdata); 1770 } 1771 1772 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1773 } 1774 1775 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) 1776 { 1777 struct net_device *dev = dev_id; 1778 struct smsc911x_data *pdata = netdev_priv(dev); 1779 u32 intsts = smsc911x_reg_read(pdata, INT_STS); 1780 u32 inten = smsc911x_reg_read(pdata, INT_EN); 1781 int serviced = IRQ_NONE; 1782 u32 temp; 1783 1784 if (unlikely(intsts & inten & INT_STS_SW_INT_)) { 1785 temp = smsc911x_reg_read(pdata, INT_EN); 1786 temp &= (~INT_EN_SW_INT_EN_); 1787 smsc911x_reg_write(pdata, INT_EN, temp); 1788 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); 1789 pdata->software_irq_signal = 1; 1790 smp_wmb(); 1791 serviced = IRQ_HANDLED; 1792 } 1793 1794 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { 1795 /* Called when there is a multicast update scheduled and 1796 * it is now safe to complete the update */ 1797 SMSC_TRACE(pdata, intr, "RX Stop interrupt"); 1798 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); 1799 if (pdata->multicast_update_pending) 1800 smsc911x_rx_multicast_update_workaround(pdata); 1801 serviced = IRQ_HANDLED; 1802 } 1803 1804 if (intsts & inten & INT_STS_TDFA_) { 1805 temp = smsc911x_reg_read(pdata, FIFO_INT); 1806 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1807 smsc911x_reg_write(pdata, FIFO_INT, temp); 1808 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); 1809 netif_wake_queue(dev); 1810 serviced = IRQ_HANDLED; 1811 } 1812 1813 if (unlikely(intsts & inten & INT_STS_RXE_)) { 1814 SMSC_TRACE(pdata, intr, "RX Error interrupt"); 1815 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); 1816 serviced = IRQ_HANDLED; 1817 } 1818 1819 if (likely(intsts & inten & INT_STS_RSFL_)) { 1820 if (likely(napi_schedule_prep(&pdata->napi))) { 1821 /* Disable Rx interrupts */ 1822 temp = smsc911x_reg_read(pdata, INT_EN); 1823 temp &= (~INT_EN_RSFL_EN_); 1824 smsc911x_reg_write(pdata, INT_EN, temp); 1825 /* Schedule a NAPI poll */ 1826 __napi_schedule(&pdata->napi); 1827 } else { 1828 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed"); 1829 } 1830 serviced = IRQ_HANDLED; 1831 } 1832 1833 return serviced; 1834 } 1835 1836 #ifdef CONFIG_NET_POLL_CONTROLLER 1837 static void smsc911x_poll_controller(struct net_device *dev) 1838 { 1839 disable_irq(dev->irq); 1840 smsc911x_irqhandler(0, dev); 1841 enable_irq(dev->irq); 1842 } 1843 #endif /* CONFIG_NET_POLL_CONTROLLER */ 1844 1845 static int smsc911x_set_mac_address(struct net_device *dev, void *p) 1846 { 1847 struct smsc911x_data *pdata = netdev_priv(dev); 1848 struct sockaddr *addr = p; 1849 1850 /* On older hardware revisions we cannot change the mac address 1851 * registers while receiving data. Newer devices can safely change 1852 * this at any time. */ 1853 if (pdata->generation <= 1 && netif_running(dev)) 1854 return -EBUSY; 1855 1856 if (!is_valid_ether_addr(addr->sa_data)) 1857 return -EADDRNOTAVAIL; 1858 1859 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 1860 1861 spin_lock_irq(&pdata->mac_lock); 1862 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1863 spin_unlock_irq(&pdata->mac_lock); 1864 1865 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 1866 1867 return 0; 1868 } 1869 1870 /* Standard ioctls for mii-tool */ 1871 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1872 { 1873 struct smsc911x_data *pdata = netdev_priv(dev); 1874 1875 if (!netif_running(dev) || !pdata->phy_dev) 1876 return -EINVAL; 1877 1878 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd); 1879 } 1880 1881 static int 1882 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1883 { 1884 struct smsc911x_data *pdata = netdev_priv(dev); 1885 1886 cmd->maxtxpkt = 1; 1887 cmd->maxrxpkt = 1; 1888 return phy_ethtool_gset(pdata->phy_dev, cmd); 1889 } 1890 1891 static int 1892 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1893 { 1894 struct smsc911x_data *pdata = netdev_priv(dev); 1895 1896 return phy_ethtool_sset(pdata->phy_dev, cmd); 1897 } 1898 1899 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, 1900 struct ethtool_drvinfo *info) 1901 { 1902 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); 1903 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); 1904 strlcpy(info->bus_info, dev_name(dev->dev.parent), 1905 sizeof(info->bus_info)); 1906 } 1907 1908 static int smsc911x_ethtool_nwayreset(struct net_device *dev) 1909 { 1910 struct smsc911x_data *pdata = netdev_priv(dev); 1911 1912 return phy_start_aneg(pdata->phy_dev); 1913 } 1914 1915 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) 1916 { 1917 struct smsc911x_data *pdata = netdev_priv(dev); 1918 return pdata->msg_enable; 1919 } 1920 1921 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1922 { 1923 struct smsc911x_data *pdata = netdev_priv(dev); 1924 pdata->msg_enable = level; 1925 } 1926 1927 static int smsc911x_ethtool_getregslen(struct net_device *dev) 1928 { 1929 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * 1930 sizeof(u32); 1931 } 1932 1933 static void 1934 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, 1935 void *buf) 1936 { 1937 struct smsc911x_data *pdata = netdev_priv(dev); 1938 struct phy_device *phy_dev = pdata->phy_dev; 1939 unsigned long flags; 1940 unsigned int i; 1941 unsigned int j = 0; 1942 u32 *data = buf; 1943 1944 regs->version = pdata->idrev; 1945 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) 1946 data[j++] = smsc911x_reg_read(pdata, i); 1947 1948 for (i = MAC_CR; i <= WUCSR; i++) { 1949 spin_lock_irqsave(&pdata->mac_lock, flags); 1950 data[j++] = smsc911x_mac_read(pdata, i); 1951 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1952 } 1953 1954 for (i = 0; i <= 31; i++) 1955 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i); 1956 } 1957 1958 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) 1959 { 1960 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); 1961 temp &= ~GPIO_CFG_EEPR_EN_; 1962 smsc911x_reg_write(pdata, GPIO_CFG, temp); 1963 msleep(1); 1964 } 1965 1966 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) 1967 { 1968 int timeout = 100; 1969 u32 e2cmd; 1970 1971 SMSC_TRACE(pdata, drv, "op 0x%08x", op); 1972 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { 1973 SMSC_WARN(pdata, drv, "Busy at start"); 1974 return -EBUSY; 1975 } 1976 1977 e2cmd = op | E2P_CMD_EPC_BUSY_; 1978 smsc911x_reg_write(pdata, E2P_CMD, e2cmd); 1979 1980 do { 1981 msleep(1); 1982 e2cmd = smsc911x_reg_read(pdata, E2P_CMD); 1983 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); 1984 1985 if (!timeout) { 1986 SMSC_TRACE(pdata, drv, "TIMED OUT"); 1987 return -EAGAIN; 1988 } 1989 1990 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { 1991 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation"); 1992 return -EINVAL; 1993 } 1994 1995 return 0; 1996 } 1997 1998 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, 1999 u8 address, u8 *data) 2000 { 2001 u32 op = E2P_CMD_EPC_CMD_READ_ | address; 2002 int ret; 2003 2004 SMSC_TRACE(pdata, drv, "address 0x%x", address); 2005 ret = smsc911x_eeprom_send_cmd(pdata, op); 2006 2007 if (!ret) 2008 data[address] = smsc911x_reg_read(pdata, E2P_DATA); 2009 2010 return ret; 2011 } 2012 2013 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, 2014 u8 address, u8 data) 2015 { 2016 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; 2017 u32 temp; 2018 int ret; 2019 2020 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data); 2021 ret = smsc911x_eeprom_send_cmd(pdata, op); 2022 2023 if (!ret) { 2024 op = E2P_CMD_EPC_CMD_WRITE_ | address; 2025 smsc911x_reg_write(pdata, E2P_DATA, (u32)data); 2026 2027 /* Workaround for hardware read-after-write restriction */ 2028 temp = smsc911x_reg_read(pdata, BYTE_TEST); 2029 2030 ret = smsc911x_eeprom_send_cmd(pdata, op); 2031 } 2032 2033 return ret; 2034 } 2035 2036 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) 2037 { 2038 return SMSC911X_EEPROM_SIZE; 2039 } 2040 2041 static int smsc911x_ethtool_get_eeprom(struct net_device *dev, 2042 struct ethtool_eeprom *eeprom, u8 *data) 2043 { 2044 struct smsc911x_data *pdata = netdev_priv(dev); 2045 u8 eeprom_data[SMSC911X_EEPROM_SIZE]; 2046 int len; 2047 int i; 2048 2049 smsc911x_eeprom_enable_access(pdata); 2050 2051 len = min(eeprom->len, SMSC911X_EEPROM_SIZE); 2052 for (i = 0; i < len; i++) { 2053 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data); 2054 if (ret < 0) { 2055 eeprom->len = 0; 2056 return ret; 2057 } 2058 } 2059 2060 memcpy(data, &eeprom_data[eeprom->offset], len); 2061 eeprom->len = len; 2062 return 0; 2063 } 2064 2065 static int smsc911x_ethtool_set_eeprom(struct net_device *dev, 2066 struct ethtool_eeprom *eeprom, u8 *data) 2067 { 2068 int ret; 2069 struct smsc911x_data *pdata = netdev_priv(dev); 2070 2071 smsc911x_eeprom_enable_access(pdata); 2072 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); 2073 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data); 2074 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); 2075 2076 /* Single byte write, according to man page */ 2077 eeprom->len = 1; 2078 2079 return ret; 2080 } 2081 2082 static const struct ethtool_ops smsc911x_ethtool_ops = { 2083 .get_settings = smsc911x_ethtool_getsettings, 2084 .set_settings = smsc911x_ethtool_setsettings, 2085 .get_link = ethtool_op_get_link, 2086 .get_drvinfo = smsc911x_ethtool_getdrvinfo, 2087 .nway_reset = smsc911x_ethtool_nwayreset, 2088 .get_msglevel = smsc911x_ethtool_getmsglevel, 2089 .set_msglevel = smsc911x_ethtool_setmsglevel, 2090 .get_regs_len = smsc911x_ethtool_getregslen, 2091 .get_regs = smsc911x_ethtool_getregs, 2092 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 2093 .get_eeprom = smsc911x_ethtool_get_eeprom, 2094 .set_eeprom = smsc911x_ethtool_set_eeprom, 2095 .get_ts_info = ethtool_op_get_ts_info, 2096 }; 2097 2098 static const struct net_device_ops smsc911x_netdev_ops = { 2099 .ndo_open = smsc911x_open, 2100 .ndo_stop = smsc911x_stop, 2101 .ndo_start_xmit = smsc911x_hard_start_xmit, 2102 .ndo_get_stats = smsc911x_get_stats, 2103 .ndo_set_rx_mode = smsc911x_set_multicast_list, 2104 .ndo_do_ioctl = smsc911x_do_ioctl, 2105 .ndo_change_mtu = eth_change_mtu, 2106 .ndo_validate_addr = eth_validate_addr, 2107 .ndo_set_mac_address = smsc911x_set_mac_address, 2108 #ifdef CONFIG_NET_POLL_CONTROLLER 2109 .ndo_poll_controller = smsc911x_poll_controller, 2110 #endif 2111 }; 2112 2113 /* copies the current mac address from hardware to dev->dev_addr */ 2114 static void smsc911x_read_mac_address(struct net_device *dev) 2115 { 2116 struct smsc911x_data *pdata = netdev_priv(dev); 2117 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); 2118 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); 2119 2120 dev->dev_addr[0] = (u8)(mac_low32); 2121 dev->dev_addr[1] = (u8)(mac_low32 >> 8); 2122 dev->dev_addr[2] = (u8)(mac_low32 >> 16); 2123 dev->dev_addr[3] = (u8)(mac_low32 >> 24); 2124 dev->dev_addr[4] = (u8)(mac_high16); 2125 dev->dev_addr[5] = (u8)(mac_high16 >> 8); 2126 } 2127 2128 /* Initializing private device structures, only called from probe */ 2129 static int smsc911x_init(struct net_device *dev) 2130 { 2131 struct smsc911x_data *pdata = netdev_priv(dev); 2132 unsigned int byte_test, mask; 2133 unsigned int to = 100; 2134 2135 SMSC_TRACE(pdata, probe, "Driver Parameters:"); 2136 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX", 2137 (unsigned long)pdata->ioaddr); 2138 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq); 2139 SMSC_TRACE(pdata, probe, "PHY will be autodetected."); 2140 2141 spin_lock_init(&pdata->dev_lock); 2142 spin_lock_init(&pdata->mac_lock); 2143 2144 if (pdata->ioaddr == NULL) { 2145 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000"); 2146 return -ENODEV; 2147 } 2148 2149 /* 2150 * poll the READY bit in PMT_CTRL. Any other access to the device is 2151 * forbidden while this bit isn't set. Try for 100ms 2152 * 2153 * Note that this test is done before the WORD_SWAP register is 2154 * programmed. So in some configurations the READY bit is at 16 before 2155 * WORD_SWAP is written to. This issue is worked around by waiting 2156 * until either bit 0 or bit 16 gets set in PMT_CTRL. 2157 * 2158 * SMSC has confirmed that checking bit 16 (marked as reserved in 2159 * the datasheet) is fine since these bits "will either never be set 2160 * or can only go high after READY does (so also indicate the device 2161 * is ready)". 2162 */ 2163 2164 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); 2165 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) 2166 udelay(1000); 2167 2168 if (to == 0) { 2169 netdev_err(dev, "Device not READY in 100ms aborting\n"); 2170 return -ENODEV; 2171 } 2172 2173 /* Check byte ordering */ 2174 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2175 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test); 2176 if (byte_test == 0x43218765) { 2177 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, " 2178 "applying WORD_SWAP"); 2179 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff); 2180 2181 /* 1 dummy read of BYTE_TEST is needed after a write to 2182 * WORD_SWAP before its contents are valid */ 2183 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2184 2185 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2186 } 2187 2188 if (byte_test != 0x87654321) { 2189 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test); 2190 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { 2191 SMSC_WARN(pdata, probe, 2192 "top 16 bits equal to bottom 16 bits"); 2193 SMSC_TRACE(pdata, probe, 2194 "This may mean the chip is set " 2195 "for 32 bit while the bus is reading 16 bit"); 2196 } 2197 return -ENODEV; 2198 } 2199 2200 /* Default generation to zero (all workarounds apply) */ 2201 pdata->generation = 0; 2202 2203 pdata->idrev = smsc911x_reg_read(pdata, ID_REV); 2204 switch (pdata->idrev & 0xFFFF0000) { 2205 case 0x01180000: 2206 case 0x01170000: 2207 case 0x01160000: 2208 case 0x01150000: 2209 case 0x218A0000: 2210 /* LAN911[5678] family */ 2211 pdata->generation = pdata->idrev & 0x0000FFFF; 2212 break; 2213 2214 case 0x118A0000: 2215 case 0x117A0000: 2216 case 0x116A0000: 2217 case 0x115A0000: 2218 /* LAN921[5678] family */ 2219 pdata->generation = 3; 2220 break; 2221 2222 case 0x92100000: 2223 case 0x92110000: 2224 case 0x92200000: 2225 case 0x92210000: 2226 /* LAN9210/LAN9211/LAN9220/LAN9221 */ 2227 pdata->generation = 4; 2228 break; 2229 2230 default: 2231 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X", 2232 pdata->idrev); 2233 return -ENODEV; 2234 } 2235 2236 SMSC_TRACE(pdata, probe, 2237 "LAN911x identified, idrev: 0x%08X, generation: %d", 2238 pdata->idrev, pdata->generation); 2239 2240 if (pdata->generation == 0) 2241 SMSC_WARN(pdata, probe, 2242 "This driver is not intended for this chip revision"); 2243 2244 /* workaround for platforms without an eeprom, where the mac address 2245 * is stored elsewhere and set by the bootloader. This saves the 2246 * mac address before resetting the device */ 2247 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) { 2248 spin_lock_irq(&pdata->mac_lock); 2249 smsc911x_read_mac_address(dev); 2250 spin_unlock_irq(&pdata->mac_lock); 2251 } 2252 2253 /* Reset the LAN911x */ 2254 if (smsc911x_soft_reset(pdata)) 2255 return -ENODEV; 2256 2257 ether_setup(dev); 2258 dev->flags |= IFF_MULTICAST; 2259 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT); 2260 dev->netdev_ops = &smsc911x_netdev_ops; 2261 dev->ethtool_ops = &smsc911x_ethtool_ops; 2262 2263 return 0; 2264 } 2265 2266 static int smsc911x_drv_remove(struct platform_device *pdev) 2267 { 2268 struct net_device *dev; 2269 struct smsc911x_data *pdata; 2270 struct resource *res; 2271 2272 dev = platform_get_drvdata(pdev); 2273 BUG_ON(!dev); 2274 pdata = netdev_priv(dev); 2275 BUG_ON(!pdata); 2276 BUG_ON(!pdata->ioaddr); 2277 BUG_ON(!pdata->phy_dev); 2278 2279 SMSC_TRACE(pdata, ifdown, "Stopping driver"); 2280 2281 phy_disconnect(pdata->phy_dev); 2282 pdata->phy_dev = NULL; 2283 mdiobus_unregister(pdata->mii_bus); 2284 mdiobus_free(pdata->mii_bus); 2285 2286 unregister_netdev(dev); 2287 free_irq(dev->irq, dev); 2288 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2289 "smsc911x-memory"); 2290 if (!res) 2291 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2292 2293 release_mem_region(res->start, resource_size(res)); 2294 2295 iounmap(pdata->ioaddr); 2296 2297 (void)smsc911x_disable_resources(pdev); 2298 smsc911x_free_resources(pdev); 2299 2300 free_netdev(dev); 2301 2302 return 0; 2303 } 2304 2305 /* standard register acces */ 2306 static const struct smsc911x_ops standard_smsc911x_ops = { 2307 .reg_read = __smsc911x_reg_read, 2308 .reg_write = __smsc911x_reg_write, 2309 .rx_readfifo = smsc911x_rx_readfifo, 2310 .tx_writefifo = smsc911x_tx_writefifo, 2311 }; 2312 2313 /* shifted register access */ 2314 static const struct smsc911x_ops shifted_smsc911x_ops = { 2315 .reg_read = __smsc911x_reg_read_shift, 2316 .reg_write = __smsc911x_reg_write_shift, 2317 .rx_readfifo = smsc911x_rx_readfifo_shift, 2318 .tx_writefifo = smsc911x_tx_writefifo_shift, 2319 }; 2320 2321 #ifdef CONFIG_OF 2322 static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config, 2323 struct device_node *np) 2324 { 2325 const char *mac; 2326 u32 width = 0; 2327 2328 if (!np) 2329 return -ENODEV; 2330 2331 config->phy_interface = of_get_phy_mode(np); 2332 2333 mac = of_get_mac_address(np); 2334 if (mac) 2335 memcpy(config->mac, mac, ETH_ALEN); 2336 2337 of_property_read_u32(np, "reg-shift", &config->shift); 2338 2339 of_property_read_u32(np, "reg-io-width", &width); 2340 if (width == 4) 2341 config->flags |= SMSC911X_USE_32BIT; 2342 else 2343 config->flags |= SMSC911X_USE_16BIT; 2344 2345 if (of_get_property(np, "smsc,irq-active-high", NULL)) 2346 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH; 2347 2348 if (of_get_property(np, "smsc,irq-push-pull", NULL)) 2349 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL; 2350 2351 if (of_get_property(np, "smsc,force-internal-phy", NULL)) 2352 config->flags |= SMSC911X_FORCE_INTERNAL_PHY; 2353 2354 if (of_get_property(np, "smsc,force-external-phy", NULL)) 2355 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY; 2356 2357 if (of_get_property(np, "smsc,save-mac-address", NULL)) 2358 config->flags |= SMSC911X_SAVE_MAC_ADDRESS; 2359 2360 return 0; 2361 } 2362 #else 2363 static inline int smsc911x_probe_config_dt( 2364 struct smsc911x_platform_config *config, 2365 struct device_node *np) 2366 { 2367 return -ENODEV; 2368 } 2369 #endif /* CONFIG_OF */ 2370 2371 static int smsc911x_drv_probe(struct platform_device *pdev) 2372 { 2373 struct device_node *np = pdev->dev.of_node; 2374 struct net_device *dev; 2375 struct smsc911x_data *pdata; 2376 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev); 2377 struct resource *res, *irq_res; 2378 unsigned int intcfg = 0; 2379 int res_size, irq_flags; 2380 int retval; 2381 2382 pr_info("Driver version %s\n", SMSC_DRV_VERSION); 2383 2384 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2385 "smsc911x-memory"); 2386 if (!res) 2387 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2388 if (!res) { 2389 pr_warn("Could not allocate resource\n"); 2390 retval = -ENODEV; 2391 goto out_0; 2392 } 2393 res_size = resource_size(res); 2394 2395 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 2396 if (!irq_res) { 2397 pr_warn("Could not allocate irq resource\n"); 2398 retval = -ENODEV; 2399 goto out_0; 2400 } 2401 2402 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { 2403 retval = -EBUSY; 2404 goto out_0; 2405 } 2406 2407 dev = alloc_etherdev(sizeof(struct smsc911x_data)); 2408 if (!dev) { 2409 retval = -ENOMEM; 2410 goto out_release_io_1; 2411 } 2412 2413 SET_NETDEV_DEV(dev, &pdev->dev); 2414 2415 pdata = netdev_priv(dev); 2416 dev->irq = irq_res->start; 2417 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK; 2418 pdata->ioaddr = ioremap_nocache(res->start, res_size); 2419 2420 pdata->dev = dev; 2421 pdata->msg_enable = ((1 << debug) - 1); 2422 2423 platform_set_drvdata(pdev, dev); 2424 2425 retval = smsc911x_request_resources(pdev); 2426 if (retval) 2427 goto out_request_resources_fail; 2428 2429 retval = smsc911x_enable_resources(pdev); 2430 if (retval) 2431 goto out_enable_resources_fail; 2432 2433 if (pdata->ioaddr == NULL) { 2434 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid"); 2435 retval = -ENOMEM; 2436 goto out_disable_resources; 2437 } 2438 2439 retval = smsc911x_probe_config_dt(&pdata->config, np); 2440 if (retval && config) { 2441 /* copy config parameters across to pdata */ 2442 memcpy(&pdata->config, config, sizeof(pdata->config)); 2443 retval = 0; 2444 } 2445 2446 if (retval) { 2447 SMSC_WARN(pdata, probe, "Error smsc911x config not found"); 2448 goto out_disable_resources; 2449 } 2450 2451 /* assume standard, non-shifted, access to HW registers */ 2452 pdata->ops = &standard_smsc911x_ops; 2453 /* apply the right access if shifting is needed */ 2454 if (pdata->config.shift) 2455 pdata->ops = &shifted_smsc911x_ops; 2456 2457 retval = smsc911x_init(dev); 2458 if (retval < 0) 2459 goto out_disable_resources; 2460 2461 /* configure irq polarity and type before connecting isr */ 2462 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) 2463 intcfg |= INT_CFG_IRQ_POL_; 2464 2465 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL) 2466 intcfg |= INT_CFG_IRQ_TYPE_; 2467 2468 smsc911x_reg_write(pdata, INT_CFG, intcfg); 2469 2470 /* Ensure interrupts are globally disabled before connecting ISR */ 2471 smsc911x_disable_irq_chip(dev); 2472 2473 retval = request_irq(dev->irq, smsc911x_irqhandler, 2474 irq_flags | IRQF_SHARED, dev->name, dev); 2475 if (retval) { 2476 SMSC_WARN(pdata, probe, 2477 "Unable to claim requested irq: %d", dev->irq); 2478 goto out_disable_resources; 2479 } 2480 2481 retval = register_netdev(dev); 2482 if (retval) { 2483 SMSC_WARN(pdata, probe, "Error %i registering device", retval); 2484 goto out_free_irq; 2485 } else { 2486 SMSC_TRACE(pdata, probe, 2487 "Network interface: \"%s\"", dev->name); 2488 } 2489 2490 retval = smsc911x_mii_init(pdev, dev); 2491 if (retval) { 2492 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval); 2493 goto out_unregister_netdev_5; 2494 } 2495 2496 spin_lock_irq(&pdata->mac_lock); 2497 2498 /* Check if mac address has been specified when bringing interface up */ 2499 if (is_valid_ether_addr(dev->dev_addr)) { 2500 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2501 SMSC_TRACE(pdata, probe, 2502 "MAC Address is specified by configuration"); 2503 } else if (is_valid_ether_addr(pdata->config.mac)) { 2504 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN); 2505 SMSC_TRACE(pdata, probe, 2506 "MAC Address specified by platform data"); 2507 } else { 2508 /* Try reading mac address from device. if EEPROM is present 2509 * it will already have been set */ 2510 smsc_get_mac(dev); 2511 2512 if (is_valid_ether_addr(dev->dev_addr)) { 2513 /* eeprom values are valid so use them */ 2514 SMSC_TRACE(pdata, probe, 2515 "Mac Address is read from LAN911x EEPROM"); 2516 } else { 2517 /* eeprom values are invalid, generate random MAC */ 2518 eth_hw_addr_random(dev); 2519 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2520 SMSC_TRACE(pdata, probe, 2521 "MAC Address is set to eth_random_addr"); 2522 } 2523 } 2524 2525 spin_unlock_irq(&pdata->mac_lock); 2526 2527 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 2528 2529 return 0; 2530 2531 out_unregister_netdev_5: 2532 unregister_netdev(dev); 2533 out_free_irq: 2534 free_irq(dev->irq, dev); 2535 out_disable_resources: 2536 (void)smsc911x_disable_resources(pdev); 2537 out_enable_resources_fail: 2538 smsc911x_free_resources(pdev); 2539 out_request_resources_fail: 2540 iounmap(pdata->ioaddr); 2541 free_netdev(dev); 2542 out_release_io_1: 2543 release_mem_region(res->start, resource_size(res)); 2544 out_0: 2545 return retval; 2546 } 2547 2548 #ifdef CONFIG_PM 2549 /* This implementation assumes the devices remains powered on its VDDVARIO 2550 * pins during suspend. */ 2551 2552 /* TODO: implement freeze/thaw callbacks for hibernation.*/ 2553 2554 static int smsc911x_suspend(struct device *dev) 2555 { 2556 struct net_device *ndev = dev_get_drvdata(dev); 2557 struct smsc911x_data *pdata = netdev_priv(ndev); 2558 2559 /* enable wake on LAN, energy detection and the external PME 2560 * signal. */ 2561 smsc911x_reg_write(pdata, PMT_CTRL, 2562 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | 2563 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); 2564 2565 return 0; 2566 } 2567 2568 static int smsc911x_resume(struct device *dev) 2569 { 2570 struct net_device *ndev = dev_get_drvdata(dev); 2571 struct smsc911x_data *pdata = netdev_priv(ndev); 2572 unsigned int to = 100; 2573 2574 /* Note 3.11 from the datasheet: 2575 * "When the LAN9220 is in a power saving state, a write of any 2576 * data to the BYTE_TEST register will wake-up the device." 2577 */ 2578 smsc911x_reg_write(pdata, BYTE_TEST, 0); 2579 2580 /* poll the READY bit in PMT_CTRL. Any other access to the device is 2581 * forbidden while this bit isn't set. Try for 100ms and return -EIO 2582 * if it failed. */ 2583 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) 2584 udelay(1000); 2585 2586 return (to == 0) ? -EIO : 0; 2587 } 2588 2589 static const struct dev_pm_ops smsc911x_pm_ops = { 2590 .suspend = smsc911x_suspend, 2591 .resume = smsc911x_resume, 2592 }; 2593 2594 #define SMSC911X_PM_OPS (&smsc911x_pm_ops) 2595 2596 #else 2597 #define SMSC911X_PM_OPS NULL 2598 #endif 2599 2600 #ifdef CONFIG_OF 2601 static const struct of_device_id smsc911x_dt_ids[] = { 2602 { .compatible = "smsc,lan9115", }, 2603 { /* sentinel */ } 2604 }; 2605 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids); 2606 #endif 2607 2608 static struct platform_driver smsc911x_driver = { 2609 .probe = smsc911x_drv_probe, 2610 .remove = smsc911x_drv_remove, 2611 .driver = { 2612 .name = SMSC_CHIPNAME, 2613 .owner = THIS_MODULE, 2614 .pm = SMSC911X_PM_OPS, 2615 .of_match_table = of_match_ptr(smsc911x_dt_ids), 2616 }, 2617 }; 2618 2619 /* Entry point for loading the module */ 2620 static int __init smsc911x_init_module(void) 2621 { 2622 SMSC_INITIALIZE(); 2623 return platform_driver_register(&smsc911x_driver); 2624 } 2625 2626 /* entry point for unloading the module */ 2627 static void __exit smsc911x_cleanup_module(void) 2628 { 2629 platform_driver_unregister(&smsc911x_driver); 2630 } 2631 2632 module_init(smsc911x_init_module); 2633 module_exit(smsc911x_cleanup_module); 2634