1 /*************************************************************************** 2 * 3 * Copyright (C) 2004-2008 SMSC 4 * Copyright (C) 2005-2008 ARM 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 *************************************************************************** 20 * Rewritten, heavily based on smsc911x simple driver by SMSC. 21 * Partly uses io macros from smc91x.c by Nicolas Pitre 22 * 23 * Supported devices: 24 * LAN9115, LAN9116, LAN9117, LAN9118 25 * LAN9215, LAN9216, LAN9217, LAN9218 26 * LAN9210, LAN9211 27 * LAN9220, LAN9221 28 * LAN89218 29 * 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/crc32.h> 35 #include <linux/clk.h> 36 #include <linux/delay.h> 37 #include <linux/errno.h> 38 #include <linux/etherdevice.h> 39 #include <linux/ethtool.h> 40 #include <linux/init.h> 41 #include <linux/interrupt.h> 42 #include <linux/ioport.h> 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/netdevice.h> 46 #include <linux/platform_device.h> 47 #include <linux/regulator/consumer.h> 48 #include <linux/sched.h> 49 #include <linux/timer.h> 50 #include <linux/bug.h> 51 #include <linux/bitops.h> 52 #include <linux/irq.h> 53 #include <linux/io.h> 54 #include <linux/swab.h> 55 #include <linux/phy.h> 56 #include <linux/smsc911x.h> 57 #include <linux/device.h> 58 #include <linux/of.h> 59 #include <linux/of_device.h> 60 #include <linux/of_gpio.h> 61 #include <linux/of_net.h> 62 #include <linux/acpi.h> 63 #include <linux/pm_runtime.h> 64 #include <linux/property.h> 65 66 #include "smsc911x.h" 67 68 #define SMSC_CHIPNAME "smsc911x" 69 #define SMSC_MDIONAME "smsc911x-mdio" 70 #define SMSC_DRV_VERSION "2008-10-21" 71 72 MODULE_LICENSE("GPL"); 73 MODULE_VERSION(SMSC_DRV_VERSION); 74 MODULE_ALIAS("platform:smsc911x"); 75 76 #if USE_DEBUG > 0 77 static int debug = 16; 78 #else 79 static int debug = 3; 80 #endif 81 82 module_param(debug, int, 0); 83 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 84 85 struct smsc911x_data; 86 87 struct smsc911x_ops { 88 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); 89 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); 90 void (*rx_readfifo)(struct smsc911x_data *pdata, 91 unsigned int *buf, unsigned int wordcount); 92 void (*tx_writefifo)(struct smsc911x_data *pdata, 93 unsigned int *buf, unsigned int wordcount); 94 }; 95 96 #define SMSC911X_NUM_SUPPLIES 2 97 98 struct smsc911x_data { 99 void __iomem *ioaddr; 100 101 unsigned int idrev; 102 103 /* used to decide which workarounds apply */ 104 unsigned int generation; 105 106 /* device configuration (copied from platform_data during probe) */ 107 struct smsc911x_platform_config config; 108 109 /* This needs to be acquired before calling any of below: 110 * smsc911x_mac_read(), smsc911x_mac_write() 111 */ 112 spinlock_t mac_lock; 113 114 /* spinlock to ensure register accesses are serialised */ 115 spinlock_t dev_lock; 116 117 struct phy_device *phy_dev; 118 struct mii_bus *mii_bus; 119 int phy_irq[PHY_MAX_ADDR]; 120 unsigned int using_extphy; 121 int last_duplex; 122 int last_carrier; 123 124 u32 msg_enable; 125 unsigned int gpio_setting; 126 unsigned int gpio_orig_setting; 127 struct net_device *dev; 128 struct napi_struct napi; 129 130 unsigned int software_irq_signal; 131 132 #ifdef USE_PHY_WORK_AROUND 133 #define MIN_PACKET_SIZE (64) 134 char loopback_tx_pkt[MIN_PACKET_SIZE]; 135 char loopback_rx_pkt[MIN_PACKET_SIZE]; 136 unsigned int resetcount; 137 #endif 138 139 /* Members for Multicast filter workaround */ 140 unsigned int multicast_update_pending; 141 unsigned int set_bits_mask; 142 unsigned int clear_bits_mask; 143 unsigned int hashhi; 144 unsigned int hashlo; 145 146 /* register access functions */ 147 const struct smsc911x_ops *ops; 148 149 /* regulators */ 150 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES]; 151 152 /* clock */ 153 struct clk *clk; 154 }; 155 156 /* Easy access to information */ 157 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) 158 159 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 160 { 161 if (pdata->config.flags & SMSC911X_USE_32BIT) 162 return readl(pdata->ioaddr + reg); 163 164 if (pdata->config.flags & SMSC911X_USE_16BIT) 165 return ((readw(pdata->ioaddr + reg) & 0xFFFF) | 166 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); 167 168 BUG(); 169 return 0; 170 } 171 172 static inline u32 173 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg) 174 { 175 if (pdata->config.flags & SMSC911X_USE_32BIT) 176 return readl(pdata->ioaddr + __smsc_shift(pdata, reg)); 177 178 if (pdata->config.flags & SMSC911X_USE_16BIT) 179 return (readw(pdata->ioaddr + 180 __smsc_shift(pdata, reg)) & 0xFFFF) | 181 ((readw(pdata->ioaddr + 182 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16); 183 184 BUG(); 185 return 0; 186 } 187 188 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 189 { 190 u32 data; 191 unsigned long flags; 192 193 spin_lock_irqsave(&pdata->dev_lock, flags); 194 data = pdata->ops->reg_read(pdata, reg); 195 spin_unlock_irqrestore(&pdata->dev_lock, flags); 196 197 return data; 198 } 199 200 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 201 u32 val) 202 { 203 if (pdata->config.flags & SMSC911X_USE_32BIT) { 204 writel(val, pdata->ioaddr + reg); 205 return; 206 } 207 208 if (pdata->config.flags & SMSC911X_USE_16BIT) { 209 writew(val & 0xFFFF, pdata->ioaddr + reg); 210 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2); 211 return; 212 } 213 214 BUG(); 215 } 216 217 static inline void 218 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val) 219 { 220 if (pdata->config.flags & SMSC911X_USE_32BIT) { 221 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg)); 222 return; 223 } 224 225 if (pdata->config.flags & SMSC911X_USE_16BIT) { 226 writew(val & 0xFFFF, 227 pdata->ioaddr + __smsc_shift(pdata, reg)); 228 writew((val >> 16) & 0xFFFF, 229 pdata->ioaddr + __smsc_shift(pdata, reg + 2)); 230 return; 231 } 232 233 BUG(); 234 } 235 236 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 237 u32 val) 238 { 239 unsigned long flags; 240 241 spin_lock_irqsave(&pdata->dev_lock, flags); 242 pdata->ops->reg_write(pdata, reg, val); 243 spin_unlock_irqrestore(&pdata->dev_lock, flags); 244 } 245 246 /* Writes a packet to the TX_DATA_FIFO */ 247 static inline void 248 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 249 unsigned int wordcount) 250 { 251 unsigned long flags; 252 253 spin_lock_irqsave(&pdata->dev_lock, flags); 254 255 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 256 while (wordcount--) 257 __smsc911x_reg_write(pdata, TX_DATA_FIFO, 258 swab32(*buf++)); 259 goto out; 260 } 261 262 if (pdata->config.flags & SMSC911X_USE_32BIT) { 263 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 264 goto out; 265 } 266 267 if (pdata->config.flags & SMSC911X_USE_16BIT) { 268 while (wordcount--) 269 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++); 270 goto out; 271 } 272 273 BUG(); 274 out: 275 spin_unlock_irqrestore(&pdata->dev_lock, flags); 276 } 277 278 /* Writes a packet to the TX_DATA_FIFO - shifted version */ 279 static inline void 280 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 281 unsigned int wordcount) 282 { 283 unsigned long flags; 284 285 spin_lock_irqsave(&pdata->dev_lock, flags); 286 287 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 288 while (wordcount--) 289 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO, 290 swab32(*buf++)); 291 goto out; 292 } 293 294 if (pdata->config.flags & SMSC911X_USE_32BIT) { 295 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata, 296 TX_DATA_FIFO), buf, wordcount); 297 goto out; 298 } 299 300 if (pdata->config.flags & SMSC911X_USE_16BIT) { 301 while (wordcount--) 302 __smsc911x_reg_write_shift(pdata, 303 TX_DATA_FIFO, *buf++); 304 goto out; 305 } 306 307 BUG(); 308 out: 309 spin_unlock_irqrestore(&pdata->dev_lock, flags); 310 } 311 312 /* Reads a packet out of the RX_DATA_FIFO */ 313 static inline void 314 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 315 unsigned int wordcount) 316 { 317 unsigned long flags; 318 319 spin_lock_irqsave(&pdata->dev_lock, flags); 320 321 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 322 while (wordcount--) 323 *buf++ = swab32(__smsc911x_reg_read(pdata, 324 RX_DATA_FIFO)); 325 goto out; 326 } 327 328 if (pdata->config.flags & SMSC911X_USE_32BIT) { 329 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 330 goto out; 331 } 332 333 if (pdata->config.flags & SMSC911X_USE_16BIT) { 334 while (wordcount--) 335 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); 336 goto out; 337 } 338 339 BUG(); 340 out: 341 spin_unlock_irqrestore(&pdata->dev_lock, flags); 342 } 343 344 /* Reads a packet out of the RX_DATA_FIFO - shifted version */ 345 static inline void 346 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 347 unsigned int wordcount) 348 { 349 unsigned long flags; 350 351 spin_lock_irqsave(&pdata->dev_lock, flags); 352 353 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 354 while (wordcount--) 355 *buf++ = swab32(__smsc911x_reg_read_shift(pdata, 356 RX_DATA_FIFO)); 357 goto out; 358 } 359 360 if (pdata->config.flags & SMSC911X_USE_32BIT) { 361 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata, 362 RX_DATA_FIFO), buf, wordcount); 363 goto out; 364 } 365 366 if (pdata->config.flags & SMSC911X_USE_16BIT) { 367 while (wordcount--) 368 *buf++ = __smsc911x_reg_read_shift(pdata, 369 RX_DATA_FIFO); 370 goto out; 371 } 372 373 BUG(); 374 out: 375 spin_unlock_irqrestore(&pdata->dev_lock, flags); 376 } 377 378 /* 379 * enable regulator and clock resources. 380 */ 381 static int smsc911x_enable_resources(struct platform_device *pdev) 382 { 383 struct net_device *ndev = platform_get_drvdata(pdev); 384 struct smsc911x_data *pdata = netdev_priv(ndev); 385 int ret = 0; 386 387 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies), 388 pdata->supplies); 389 if (ret) 390 netdev_err(ndev, "failed to enable regulators %d\n", 391 ret); 392 393 if (!IS_ERR(pdata->clk)) { 394 ret = clk_prepare_enable(pdata->clk); 395 if (ret < 0) 396 netdev_err(ndev, "failed to enable clock %d\n", ret); 397 } 398 399 return ret; 400 } 401 402 /* 403 * disable resources, currently just regulators. 404 */ 405 static int smsc911x_disable_resources(struct platform_device *pdev) 406 { 407 struct net_device *ndev = platform_get_drvdata(pdev); 408 struct smsc911x_data *pdata = netdev_priv(ndev); 409 int ret = 0; 410 411 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies), 412 pdata->supplies); 413 414 if (!IS_ERR(pdata->clk)) 415 clk_disable_unprepare(pdata->clk); 416 417 return ret; 418 } 419 420 /* 421 * Request resources, currently just regulators. 422 * 423 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where 424 * these are not always-on we need to request regulators to be turned on 425 * before we can try to access the device registers. 426 */ 427 static int smsc911x_request_resources(struct platform_device *pdev) 428 { 429 struct net_device *ndev = platform_get_drvdata(pdev); 430 struct smsc911x_data *pdata = netdev_priv(ndev); 431 int ret = 0; 432 433 /* Request regulators */ 434 pdata->supplies[0].supply = "vdd33a"; 435 pdata->supplies[1].supply = "vddvario"; 436 ret = regulator_bulk_get(&pdev->dev, 437 ARRAY_SIZE(pdata->supplies), 438 pdata->supplies); 439 if (ret) 440 netdev_err(ndev, "couldn't get regulators %d\n", 441 ret); 442 443 /* Request clock */ 444 pdata->clk = clk_get(&pdev->dev, NULL); 445 if (IS_ERR(pdata->clk)) 446 dev_dbg(&pdev->dev, "couldn't get clock %li\n", 447 PTR_ERR(pdata->clk)); 448 449 return ret; 450 } 451 452 /* 453 * Free resources, currently just regulators. 454 * 455 */ 456 static void smsc911x_free_resources(struct platform_device *pdev) 457 { 458 struct net_device *ndev = platform_get_drvdata(pdev); 459 struct smsc911x_data *pdata = netdev_priv(ndev); 460 461 /* Free regulators */ 462 regulator_bulk_free(ARRAY_SIZE(pdata->supplies), 463 pdata->supplies); 464 465 /* Free clock */ 466 if (!IS_ERR(pdata->clk)) { 467 clk_put(pdata->clk); 468 pdata->clk = NULL; 469 } 470 } 471 472 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read 473 * and smsc911x_mac_write, so assumes mac_lock is held */ 474 static int smsc911x_mac_complete(struct smsc911x_data *pdata) 475 { 476 int i; 477 u32 val; 478 479 SMSC_ASSERT_MAC_LOCK(pdata); 480 481 for (i = 0; i < 40; i++) { 482 val = smsc911x_reg_read(pdata, MAC_CSR_CMD); 483 if (!(val & MAC_CSR_CMD_CSR_BUSY_)) 484 return 0; 485 } 486 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. " 487 "MAC_CSR_CMD: 0x%08X", val); 488 return -EIO; 489 } 490 491 /* Fetches a MAC register value. Assumes mac_lock is acquired */ 492 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) 493 { 494 unsigned int temp; 495 496 SMSC_ASSERT_MAC_LOCK(pdata); 497 498 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 499 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 500 SMSC_WARN(pdata, hw, "MAC busy at entry"); 501 return 0xFFFFFFFF; 502 } 503 504 /* Send the MAC cmd */ 505 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 506 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); 507 508 /* Workaround for hardware read-after-write restriction */ 509 temp = smsc911x_reg_read(pdata, BYTE_TEST); 510 511 /* Wait for the read to complete */ 512 if (likely(smsc911x_mac_complete(pdata) == 0)) 513 return smsc911x_reg_read(pdata, MAC_CSR_DATA); 514 515 SMSC_WARN(pdata, hw, "MAC busy after read"); 516 return 0xFFFFFFFF; 517 } 518 519 /* Set a mac register, mac_lock must be acquired before calling */ 520 static void smsc911x_mac_write(struct smsc911x_data *pdata, 521 unsigned int offset, u32 val) 522 { 523 unsigned int temp; 524 525 SMSC_ASSERT_MAC_LOCK(pdata); 526 527 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 528 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 529 SMSC_WARN(pdata, hw, 530 "smsc911x_mac_write failed, MAC busy at entry"); 531 return; 532 } 533 534 /* Send data to write */ 535 smsc911x_reg_write(pdata, MAC_CSR_DATA, val); 536 537 /* Write the actual data */ 538 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 539 MAC_CSR_CMD_CSR_BUSY_)); 540 541 /* Workaround for hardware read-after-write restriction */ 542 temp = smsc911x_reg_read(pdata, BYTE_TEST); 543 544 /* Wait for the write to complete */ 545 if (likely(smsc911x_mac_complete(pdata) == 0)) 546 return; 547 548 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write"); 549 } 550 551 /* Get a phy register */ 552 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) 553 { 554 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 555 unsigned long flags; 556 unsigned int addr; 557 int i, reg; 558 559 spin_lock_irqsave(&pdata->mac_lock, flags); 560 561 /* Confirm MII not busy */ 562 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 563 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???"); 564 reg = -EIO; 565 goto out; 566 } 567 568 /* Set the address, index & direction (read from PHY) */ 569 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); 570 smsc911x_mac_write(pdata, MII_ACC, addr); 571 572 /* Wait for read to complete w/ timeout */ 573 for (i = 0; i < 100; i++) 574 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 575 reg = smsc911x_mac_read(pdata, MII_DATA); 576 goto out; 577 } 578 579 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish"); 580 reg = -EIO; 581 582 out: 583 spin_unlock_irqrestore(&pdata->mac_lock, flags); 584 return reg; 585 } 586 587 /* Set a phy register */ 588 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, 589 u16 val) 590 { 591 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 592 unsigned long flags; 593 unsigned int addr; 594 int i, reg; 595 596 spin_lock_irqsave(&pdata->mac_lock, flags); 597 598 /* Confirm MII not busy */ 599 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 600 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???"); 601 reg = -EIO; 602 goto out; 603 } 604 605 /* Put the data to write in the MAC */ 606 smsc911x_mac_write(pdata, MII_DATA, val); 607 608 /* Set the address, index & direction (write to PHY) */ 609 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | 610 MII_ACC_MII_WRITE_; 611 smsc911x_mac_write(pdata, MII_ACC, addr); 612 613 /* Wait for write to complete w/ timeout */ 614 for (i = 0; i < 100; i++) 615 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 616 reg = 0; 617 goto out; 618 } 619 620 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish"); 621 reg = -EIO; 622 623 out: 624 spin_unlock_irqrestore(&pdata->mac_lock, flags); 625 return reg; 626 } 627 628 /* Switch to external phy. Assumes tx and rx are stopped. */ 629 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) 630 { 631 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 632 633 /* Disable phy clocks to the MAC */ 634 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 635 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 636 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 637 udelay(10); /* Enough time for clocks to stop */ 638 639 /* Switch to external phy */ 640 hwcfg |= HW_CFG_EXT_PHY_EN_; 641 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 642 643 /* Enable phy clocks to the MAC */ 644 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 645 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 646 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 647 udelay(10); /* Enough time for clocks to restart */ 648 649 hwcfg |= HW_CFG_SMI_SEL_; 650 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 651 } 652 653 /* Autodetects and enables external phy if present on supported chips. 654 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY 655 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ 656 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) 657 { 658 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 659 660 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { 661 SMSC_TRACE(pdata, hw, "Forcing internal PHY"); 662 pdata->using_extphy = 0; 663 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { 664 SMSC_TRACE(pdata, hw, "Forcing external PHY"); 665 smsc911x_phy_enable_external(pdata); 666 pdata->using_extphy = 1; 667 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { 668 SMSC_TRACE(pdata, hw, 669 "HW_CFG EXT_PHY_DET set, using external PHY"); 670 smsc911x_phy_enable_external(pdata); 671 pdata->using_extphy = 1; 672 } else { 673 SMSC_TRACE(pdata, hw, 674 "HW_CFG EXT_PHY_DET clear, using internal PHY"); 675 pdata->using_extphy = 0; 676 } 677 } 678 679 /* Fetches a tx status out of the status fifo */ 680 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) 681 { 682 unsigned int result = 683 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; 684 685 if (result != 0) 686 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); 687 688 return result; 689 } 690 691 /* Fetches the next rx status */ 692 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) 693 { 694 unsigned int result = 695 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; 696 697 if (result != 0) 698 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); 699 700 return result; 701 } 702 703 #ifdef USE_PHY_WORK_AROUND 704 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) 705 { 706 unsigned int tries; 707 u32 wrsz; 708 u32 rdsz; 709 ulong bufp; 710 711 for (tries = 0; tries < 10; tries++) { 712 unsigned int txcmd_a; 713 unsigned int txcmd_b; 714 unsigned int status; 715 unsigned int pktlength; 716 unsigned int i; 717 718 /* Zero-out rx packet memory */ 719 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); 720 721 /* Write tx packet to 118 */ 722 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; 723 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 724 txcmd_a |= MIN_PACKET_SIZE; 725 726 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; 727 728 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a); 729 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b); 730 731 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); 732 wrsz = MIN_PACKET_SIZE + 3; 733 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); 734 wrsz >>= 2; 735 736 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 737 738 /* Wait till transmit is done */ 739 i = 60; 740 do { 741 udelay(5); 742 status = smsc911x_tx_get_txstatus(pdata); 743 } while ((i--) && (!status)); 744 745 if (!status) { 746 SMSC_WARN(pdata, hw, 747 "Failed to transmit during loopback test"); 748 continue; 749 } 750 if (status & TX_STS_ES_) { 751 SMSC_WARN(pdata, hw, 752 "Transmit encountered errors during loopback test"); 753 continue; 754 } 755 756 /* Wait till receive is done */ 757 i = 60; 758 do { 759 udelay(5); 760 status = smsc911x_rx_get_rxstatus(pdata); 761 } while ((i--) && (!status)); 762 763 if (!status) { 764 SMSC_WARN(pdata, hw, 765 "Failed to receive during loopback test"); 766 continue; 767 } 768 if (status & RX_STS_ES_) { 769 SMSC_WARN(pdata, hw, 770 "Receive encountered errors during loopback test"); 771 continue; 772 } 773 774 pktlength = ((status & 0x3FFF0000UL) >> 16); 775 bufp = (ulong)pdata->loopback_rx_pkt; 776 rdsz = pktlength + 3; 777 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); 778 rdsz >>= 2; 779 780 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz); 781 782 if (pktlength != (MIN_PACKET_SIZE + 4)) { 783 SMSC_WARN(pdata, hw, "Unexpected packet size " 784 "during loop back test, size=%d, will retry", 785 pktlength); 786 } else { 787 unsigned int j; 788 int mismatch = 0; 789 for (j = 0; j < MIN_PACKET_SIZE; j++) { 790 if (pdata->loopback_tx_pkt[j] 791 != pdata->loopback_rx_pkt[j]) { 792 mismatch = 1; 793 break; 794 } 795 } 796 if (!mismatch) { 797 SMSC_TRACE(pdata, hw, "Successfully verified " 798 "loopback packet"); 799 return 0; 800 } else { 801 SMSC_WARN(pdata, hw, "Data mismatch " 802 "during loop back test, will retry"); 803 } 804 } 805 } 806 807 return -EIO; 808 } 809 810 static int smsc911x_phy_reset(struct smsc911x_data *pdata) 811 { 812 struct phy_device *phy_dev = pdata->phy_dev; 813 unsigned int temp; 814 unsigned int i = 100000; 815 816 BUG_ON(!phy_dev); 817 BUG_ON(!phy_dev->bus); 818 819 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset"); 820 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET); 821 do { 822 msleep(1); 823 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, 824 MII_BMCR); 825 } while ((i--) && (temp & BMCR_RESET)); 826 827 if (temp & BMCR_RESET) { 828 SMSC_WARN(pdata, hw, "PHY reset failed to complete"); 829 return -EIO; 830 } 831 /* Extra delay required because the phy may not be completed with 832 * its reset when BMCR_RESET is cleared. Specs say 256 uS is 833 * enough delay but using 1ms here to be safe */ 834 msleep(1); 835 836 return 0; 837 } 838 839 static int smsc911x_phy_loopbacktest(struct net_device *dev) 840 { 841 struct smsc911x_data *pdata = netdev_priv(dev); 842 struct phy_device *phy_dev = pdata->phy_dev; 843 int result = -EIO; 844 unsigned int i, val; 845 unsigned long flags; 846 847 /* Initialise tx packet using broadcast destination address */ 848 eth_broadcast_addr(pdata->loopback_tx_pkt); 849 850 /* Use incrementing source address */ 851 for (i = 6; i < 12; i++) 852 pdata->loopback_tx_pkt[i] = (char)i; 853 854 /* Set length type field */ 855 pdata->loopback_tx_pkt[12] = 0x00; 856 pdata->loopback_tx_pkt[13] = 0x00; 857 858 for (i = 14; i < MIN_PACKET_SIZE; i++) 859 pdata->loopback_tx_pkt[i] = (char)i; 860 861 val = smsc911x_reg_read(pdata, HW_CFG); 862 val &= HW_CFG_TX_FIF_SZ_; 863 val |= HW_CFG_SF_; 864 smsc911x_reg_write(pdata, HW_CFG, val); 865 866 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 867 smsc911x_reg_write(pdata, RX_CFG, 868 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); 869 870 for (i = 0; i < 10; i++) { 871 /* Set PHY to 10/FD, no ANEG, and loopback mode */ 872 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 873 BMCR_LOOPBACK | BMCR_FULLDPLX); 874 875 /* Enable MAC tx/rx, FD */ 876 spin_lock_irqsave(&pdata->mac_lock, flags); 877 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ 878 | MAC_CR_TXEN_ | MAC_CR_RXEN_); 879 spin_unlock_irqrestore(&pdata->mac_lock, flags); 880 881 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { 882 result = 0; 883 break; 884 } 885 pdata->resetcount++; 886 887 /* Disable MAC rx */ 888 spin_lock_irqsave(&pdata->mac_lock, flags); 889 smsc911x_mac_write(pdata, MAC_CR, 0); 890 spin_unlock_irqrestore(&pdata->mac_lock, flags); 891 892 smsc911x_phy_reset(pdata); 893 } 894 895 /* Disable MAC */ 896 spin_lock_irqsave(&pdata->mac_lock, flags); 897 smsc911x_mac_write(pdata, MAC_CR, 0); 898 spin_unlock_irqrestore(&pdata->mac_lock, flags); 899 900 /* Cancel PHY loopback mode */ 901 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0); 902 903 smsc911x_reg_write(pdata, TX_CFG, 0); 904 smsc911x_reg_write(pdata, RX_CFG, 0); 905 906 return result; 907 } 908 #endif /* USE_PHY_WORK_AROUND */ 909 910 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) 911 { 912 struct phy_device *phy_dev = pdata->phy_dev; 913 u32 afc = smsc911x_reg_read(pdata, AFC_CFG); 914 u32 flow; 915 unsigned long flags; 916 917 if (phy_dev->duplex == DUPLEX_FULL) { 918 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE); 919 u16 rmtadv = phy_read(phy_dev, MII_LPA); 920 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 921 922 if (cap & FLOW_CTRL_RX) 923 flow = 0xFFFF0002; 924 else 925 flow = 0; 926 927 if (cap & FLOW_CTRL_TX) 928 afc |= 0xF; 929 else 930 afc &= ~0xF; 931 932 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s", 933 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 934 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 935 } else { 936 SMSC_TRACE(pdata, hw, "half duplex"); 937 flow = 0; 938 afc |= 0xF; 939 } 940 941 spin_lock_irqsave(&pdata->mac_lock, flags); 942 smsc911x_mac_write(pdata, FLOW, flow); 943 spin_unlock_irqrestore(&pdata->mac_lock, flags); 944 945 smsc911x_reg_write(pdata, AFC_CFG, afc); 946 } 947 948 /* Update link mode if anything has changed. Called periodically when the 949 * PHY is in polling mode, even if nothing has changed. */ 950 static void smsc911x_phy_adjust_link(struct net_device *dev) 951 { 952 struct smsc911x_data *pdata = netdev_priv(dev); 953 struct phy_device *phy_dev = pdata->phy_dev; 954 unsigned long flags; 955 int carrier; 956 957 if (phy_dev->duplex != pdata->last_duplex) { 958 unsigned int mac_cr; 959 SMSC_TRACE(pdata, hw, "duplex state has changed"); 960 961 spin_lock_irqsave(&pdata->mac_lock, flags); 962 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 963 if (phy_dev->duplex) { 964 SMSC_TRACE(pdata, hw, 965 "configuring for full duplex mode"); 966 mac_cr |= MAC_CR_FDPX_; 967 } else { 968 SMSC_TRACE(pdata, hw, 969 "configuring for half duplex mode"); 970 mac_cr &= ~MAC_CR_FDPX_; 971 } 972 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 973 spin_unlock_irqrestore(&pdata->mac_lock, flags); 974 975 smsc911x_phy_update_flowcontrol(pdata); 976 pdata->last_duplex = phy_dev->duplex; 977 } 978 979 carrier = netif_carrier_ok(dev); 980 if (carrier != pdata->last_carrier) { 981 SMSC_TRACE(pdata, hw, "carrier state has changed"); 982 if (carrier) { 983 SMSC_TRACE(pdata, hw, "configuring for carrier OK"); 984 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && 985 (!pdata->using_extphy)) { 986 /* Restore original GPIO configuration */ 987 pdata->gpio_setting = pdata->gpio_orig_setting; 988 smsc911x_reg_write(pdata, GPIO_CFG, 989 pdata->gpio_setting); 990 } 991 } else { 992 SMSC_TRACE(pdata, hw, "configuring for no carrier"); 993 /* Check global setting that LED1 994 * usage is 10/100 indicator */ 995 pdata->gpio_setting = smsc911x_reg_read(pdata, 996 GPIO_CFG); 997 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && 998 (!pdata->using_extphy)) { 999 /* Force 10/100 LED off, after saving 1000 * original GPIO configuration */ 1001 pdata->gpio_orig_setting = pdata->gpio_setting; 1002 1003 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; 1004 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ 1005 | GPIO_CFG_GPIODIR0_ 1006 | GPIO_CFG_GPIOD0_); 1007 smsc911x_reg_write(pdata, GPIO_CFG, 1008 pdata->gpio_setting); 1009 } 1010 } 1011 pdata->last_carrier = carrier; 1012 } 1013 } 1014 1015 static int smsc911x_mii_probe(struct net_device *dev) 1016 { 1017 struct smsc911x_data *pdata = netdev_priv(dev); 1018 struct phy_device *phydev = NULL; 1019 int ret; 1020 1021 /* find the first phy */ 1022 phydev = phy_find_first(pdata->mii_bus); 1023 if (!phydev) { 1024 netdev_err(dev, "no PHY found\n"); 1025 return -ENODEV; 1026 } 1027 1028 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X", 1029 phydev->addr, phydev->phy_id); 1030 1031 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link, 1032 pdata->config.phy_interface); 1033 1034 if (ret) { 1035 netdev_err(dev, "Could not attach to PHY\n"); 1036 return ret; 1037 } 1038 1039 netdev_info(dev, 1040 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", 1041 phydev->drv->name, dev_name(&phydev->dev), phydev->irq); 1042 1043 /* mask with MAC supported features */ 1044 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause | 1045 SUPPORTED_Asym_Pause); 1046 phydev->advertising = phydev->supported; 1047 1048 pdata->phy_dev = phydev; 1049 pdata->last_duplex = -1; 1050 pdata->last_carrier = -1; 1051 1052 #ifdef USE_PHY_WORK_AROUND 1053 if (smsc911x_phy_loopbacktest(dev) < 0) { 1054 SMSC_WARN(pdata, hw, "Failed Loop Back Test"); 1055 phy_disconnect(phydev); 1056 return -ENODEV; 1057 } 1058 SMSC_TRACE(pdata, hw, "Passed Loop Back Test"); 1059 #endif /* USE_PHY_WORK_AROUND */ 1060 1061 SMSC_TRACE(pdata, hw, "phy initialised successfully"); 1062 return 0; 1063 } 1064 1065 static int smsc911x_mii_init(struct platform_device *pdev, 1066 struct net_device *dev) 1067 { 1068 struct smsc911x_data *pdata = netdev_priv(dev); 1069 int err = -ENXIO, i; 1070 1071 pdata->mii_bus = mdiobus_alloc(); 1072 if (!pdata->mii_bus) { 1073 err = -ENOMEM; 1074 goto err_out_1; 1075 } 1076 1077 pdata->mii_bus->name = SMSC_MDIONAME; 1078 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 1079 pdev->name, pdev->id); 1080 pdata->mii_bus->priv = pdata; 1081 pdata->mii_bus->read = smsc911x_mii_read; 1082 pdata->mii_bus->write = smsc911x_mii_write; 1083 pdata->mii_bus->irq = pdata->phy_irq; 1084 for (i = 0; i < PHY_MAX_ADDR; ++i) 1085 pdata->mii_bus->irq[i] = PHY_POLL; 1086 1087 pdata->mii_bus->parent = &pdev->dev; 1088 1089 switch (pdata->idrev & 0xFFFF0000) { 1090 case 0x01170000: 1091 case 0x01150000: 1092 case 0x117A0000: 1093 case 0x115A0000: 1094 /* External PHY supported, try to autodetect */ 1095 smsc911x_phy_initialise_external(pdata); 1096 break; 1097 default: 1098 SMSC_TRACE(pdata, hw, "External PHY is not supported, " 1099 "using internal PHY"); 1100 pdata->using_extphy = 0; 1101 break; 1102 } 1103 1104 if (!pdata->using_extphy) { 1105 /* Mask all PHYs except ID 1 (internal) */ 1106 pdata->mii_bus->phy_mask = ~(1 << 1); 1107 } 1108 1109 if (mdiobus_register(pdata->mii_bus)) { 1110 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1111 goto err_out_free_bus_2; 1112 } 1113 1114 if (smsc911x_mii_probe(dev) < 0) { 1115 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1116 goto err_out_unregister_bus_3; 1117 } 1118 1119 return 0; 1120 1121 err_out_unregister_bus_3: 1122 mdiobus_unregister(pdata->mii_bus); 1123 err_out_free_bus_2: 1124 mdiobus_free(pdata->mii_bus); 1125 err_out_1: 1126 return err; 1127 } 1128 1129 /* Gets the number of tx statuses in the fifo */ 1130 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) 1131 { 1132 return (smsc911x_reg_read(pdata, TX_FIFO_INF) 1133 & TX_FIFO_INF_TSUSED_) >> 16; 1134 } 1135 1136 /* Reads tx statuses and increments counters where necessary */ 1137 static void smsc911x_tx_update_txcounters(struct net_device *dev) 1138 { 1139 struct smsc911x_data *pdata = netdev_priv(dev); 1140 unsigned int tx_stat; 1141 1142 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { 1143 if (unlikely(tx_stat & 0x80000000)) { 1144 /* In this driver the packet tag is used as the packet 1145 * length. Since a packet length can never reach the 1146 * size of 0x8000, this bit is reserved. It is worth 1147 * noting that the "reserved bit" in the warning above 1148 * does not reference a hardware defined reserved bit 1149 * but rather a driver defined one. 1150 */ 1151 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high"); 1152 } else { 1153 if (unlikely(tx_stat & TX_STS_ES_)) { 1154 dev->stats.tx_errors++; 1155 } else { 1156 dev->stats.tx_packets++; 1157 dev->stats.tx_bytes += (tx_stat >> 16); 1158 } 1159 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { 1160 dev->stats.collisions += 16; 1161 dev->stats.tx_aborted_errors += 1; 1162 } else { 1163 dev->stats.collisions += 1164 ((tx_stat >> 3) & 0xF); 1165 } 1166 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) 1167 dev->stats.tx_carrier_errors += 1; 1168 if (unlikely(tx_stat & TX_STS_LATE_COL_)) { 1169 dev->stats.collisions++; 1170 dev->stats.tx_aborted_errors++; 1171 } 1172 } 1173 } 1174 } 1175 1176 /* Increments the Rx error counters */ 1177 static void 1178 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) 1179 { 1180 int crc_err = 0; 1181 1182 if (unlikely(rxstat & RX_STS_ES_)) { 1183 dev->stats.rx_errors++; 1184 if (unlikely(rxstat & RX_STS_CRC_ERR_)) { 1185 dev->stats.rx_crc_errors++; 1186 crc_err = 1; 1187 } 1188 } 1189 if (likely(!crc_err)) { 1190 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && 1191 (rxstat & RX_STS_LENGTH_ERR_))) 1192 dev->stats.rx_length_errors++; 1193 if (rxstat & RX_STS_MCAST_) 1194 dev->stats.multicast++; 1195 } 1196 } 1197 1198 /* Quickly dumps bad packets */ 1199 static void 1200 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords) 1201 { 1202 if (likely(pktwords >= 4)) { 1203 unsigned int timeout = 500; 1204 unsigned int val; 1205 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); 1206 do { 1207 udelay(1); 1208 val = smsc911x_reg_read(pdata, RX_DP_CTRL); 1209 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); 1210 1211 if (unlikely(timeout == 0)) 1212 SMSC_WARN(pdata, hw, "Timed out waiting for " 1213 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val); 1214 } else { 1215 unsigned int temp; 1216 while (pktwords--) 1217 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO); 1218 } 1219 } 1220 1221 /* NAPI poll function */ 1222 static int smsc911x_poll(struct napi_struct *napi, int budget) 1223 { 1224 struct smsc911x_data *pdata = 1225 container_of(napi, struct smsc911x_data, napi); 1226 struct net_device *dev = pdata->dev; 1227 int npackets = 0; 1228 1229 while (npackets < budget) { 1230 unsigned int pktlength; 1231 unsigned int pktwords; 1232 struct sk_buff *skb; 1233 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); 1234 1235 if (!rxstat) { 1236 unsigned int temp; 1237 /* We processed all packets available. Tell NAPI it can 1238 * stop polling then re-enable rx interrupts */ 1239 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); 1240 napi_complete(napi); 1241 temp = smsc911x_reg_read(pdata, INT_EN); 1242 temp |= INT_EN_RSFL_EN_; 1243 smsc911x_reg_write(pdata, INT_EN, temp); 1244 break; 1245 } 1246 1247 /* Count packet for NAPI scheduling, even if it has an error. 1248 * Error packets still require cycles to discard */ 1249 npackets++; 1250 1251 pktlength = ((rxstat & 0x3FFF0000) >> 16); 1252 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; 1253 smsc911x_rx_counterrors(dev, rxstat); 1254 1255 if (unlikely(rxstat & RX_STS_ES_)) { 1256 SMSC_WARN(pdata, rx_err, 1257 "Discarding packet with error bit set"); 1258 /* Packet has an error, discard it and continue with 1259 * the next */ 1260 smsc911x_rx_fastforward(pdata, pktwords); 1261 dev->stats.rx_dropped++; 1262 continue; 1263 } 1264 1265 skb = netdev_alloc_skb(dev, pktwords << 2); 1266 if (unlikely(!skb)) { 1267 SMSC_WARN(pdata, rx_err, 1268 "Unable to allocate skb for rx packet"); 1269 /* Drop the packet and stop this polling iteration */ 1270 smsc911x_rx_fastforward(pdata, pktwords); 1271 dev->stats.rx_dropped++; 1272 break; 1273 } 1274 1275 pdata->ops->rx_readfifo(pdata, 1276 (unsigned int *)skb->data, pktwords); 1277 1278 /* Align IP on 16B boundary */ 1279 skb_reserve(skb, NET_IP_ALIGN); 1280 skb_put(skb, pktlength - 4); 1281 skb->protocol = eth_type_trans(skb, dev); 1282 skb_checksum_none_assert(skb); 1283 netif_receive_skb(skb); 1284 1285 /* Update counters */ 1286 dev->stats.rx_packets++; 1287 dev->stats.rx_bytes += (pktlength - 4); 1288 } 1289 1290 /* Return total received packets */ 1291 return npackets; 1292 } 1293 1294 /* Returns hash bit number for given MAC address 1295 * Example: 1296 * 01 00 5E 00 00 01 -> returns bit number 31 */ 1297 static unsigned int smsc911x_hash(char addr[ETH_ALEN]) 1298 { 1299 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 1300 } 1301 1302 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) 1303 { 1304 /* Performs the multicast & mac_cr update. This is called when 1305 * safe on the current hardware, and with the mac_lock held */ 1306 unsigned int mac_cr; 1307 1308 SMSC_ASSERT_MAC_LOCK(pdata); 1309 1310 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1311 mac_cr |= pdata->set_bits_mask; 1312 mac_cr &= ~(pdata->clear_bits_mask); 1313 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1314 smsc911x_mac_write(pdata, HASHH, pdata->hashhi); 1315 smsc911x_mac_write(pdata, HASHL, pdata->hashlo); 1316 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X", 1317 mac_cr, pdata->hashhi, pdata->hashlo); 1318 } 1319 1320 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) 1321 { 1322 unsigned int mac_cr; 1323 1324 /* This function is only called for older LAN911x devices 1325 * (revA or revB), where MAC_CR, HASHH and HASHL should not 1326 * be modified during Rx - newer devices immediately update the 1327 * registers. 1328 * 1329 * This is called from interrupt context */ 1330 1331 spin_lock(&pdata->mac_lock); 1332 1333 /* Check Rx has stopped */ 1334 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) 1335 SMSC_WARN(pdata, drv, "Rx not stopped"); 1336 1337 /* Perform the update - safe to do now Rx has stopped */ 1338 smsc911x_rx_multicast_update(pdata); 1339 1340 /* Re-enable Rx */ 1341 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1342 mac_cr |= MAC_CR_RXEN_; 1343 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1344 1345 pdata->multicast_update_pending = 0; 1346 1347 spin_unlock(&pdata->mac_lock); 1348 } 1349 1350 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata) 1351 { 1352 int rc = 0; 1353 1354 if (!pdata->phy_dev) 1355 return rc; 1356 1357 /* If the internal PHY is in General Power-Down mode, all, except the 1358 * management interface, is powered-down and stays in that condition as 1359 * long as Phy register bit 0.11 is HIGH. 1360 * 1361 * In that case, clear the bit 0.11, so the PHY powers up and we can 1362 * access to the phy registers. 1363 */ 1364 rc = phy_read(pdata->phy_dev, MII_BMCR); 1365 if (rc < 0) { 1366 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1367 return rc; 1368 } 1369 1370 /* If the PHY general power-down bit is not set is not necessary to 1371 * disable the general power down-mode. 1372 */ 1373 if (rc & BMCR_PDOWN) { 1374 rc = phy_write(pdata->phy_dev, MII_BMCR, rc & ~BMCR_PDOWN); 1375 if (rc < 0) { 1376 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1377 return rc; 1378 } 1379 1380 usleep_range(1000, 1500); 1381 } 1382 1383 return 0; 1384 } 1385 1386 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata) 1387 { 1388 int rc = 0; 1389 1390 if (!pdata->phy_dev) 1391 return rc; 1392 1393 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS); 1394 1395 if (rc < 0) { 1396 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1397 return rc; 1398 } 1399 1400 /* Only disable if energy detect mode is already enabled */ 1401 if (rc & MII_LAN83C185_EDPWRDOWN) { 1402 /* Disable energy detect mode for this SMSC Transceivers */ 1403 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS, 1404 rc & (~MII_LAN83C185_EDPWRDOWN)); 1405 1406 if (rc < 0) { 1407 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1408 return rc; 1409 } 1410 /* Allow PHY to wakeup */ 1411 mdelay(2); 1412 } 1413 1414 return 0; 1415 } 1416 1417 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata) 1418 { 1419 int rc = 0; 1420 1421 if (!pdata->phy_dev) 1422 return rc; 1423 1424 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS); 1425 1426 if (rc < 0) { 1427 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1428 return rc; 1429 } 1430 1431 /* Only enable if energy detect mode is already disabled */ 1432 if (!(rc & MII_LAN83C185_EDPWRDOWN)) { 1433 /* Enable energy detect mode for this SMSC Transceivers */ 1434 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS, 1435 rc | MII_LAN83C185_EDPWRDOWN); 1436 1437 if (rc < 0) { 1438 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1439 return rc; 1440 } 1441 } 1442 return 0; 1443 } 1444 1445 static int smsc911x_soft_reset(struct smsc911x_data *pdata) 1446 { 1447 unsigned int timeout; 1448 unsigned int temp; 1449 int ret; 1450 1451 /* 1452 * Make sure to power-up the PHY chip before doing a reset, otherwise 1453 * the reset fails. 1454 */ 1455 ret = smsc911x_phy_general_power_up(pdata); 1456 if (ret) { 1457 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip"); 1458 return ret; 1459 } 1460 1461 /* 1462 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that 1463 * are initialized in a Energy Detect Power-Down mode that prevents 1464 * the MAC chip to be software reseted. So we have to wakeup the PHY 1465 * before. 1466 */ 1467 if (pdata->generation == 4) { 1468 ret = smsc911x_phy_disable_energy_detect(pdata); 1469 1470 if (ret) { 1471 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1472 return ret; 1473 } 1474 } 1475 1476 /* Reset the LAN911x */ 1477 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_); 1478 timeout = 10; 1479 do { 1480 udelay(10); 1481 temp = smsc911x_reg_read(pdata, HW_CFG); 1482 } while ((--timeout) && (temp & HW_CFG_SRST_)); 1483 1484 if (unlikely(temp & HW_CFG_SRST_)) { 1485 SMSC_WARN(pdata, drv, "Failed to complete reset"); 1486 return -EIO; 1487 } 1488 1489 if (pdata->generation == 4) { 1490 ret = smsc911x_phy_enable_energy_detect(pdata); 1491 1492 if (ret) { 1493 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1494 return ret; 1495 } 1496 } 1497 1498 return 0; 1499 } 1500 1501 /* Sets the device MAC address to dev_addr, called with mac_lock held */ 1502 static void 1503 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6]) 1504 { 1505 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; 1506 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | 1507 (dev_addr[1] << 8) | dev_addr[0]; 1508 1509 SMSC_ASSERT_MAC_LOCK(pdata); 1510 1511 smsc911x_mac_write(pdata, ADDRH, mac_high16); 1512 smsc911x_mac_write(pdata, ADDRL, mac_low32); 1513 } 1514 1515 static void smsc911x_disable_irq_chip(struct net_device *dev) 1516 { 1517 struct smsc911x_data *pdata = netdev_priv(dev); 1518 1519 smsc911x_reg_write(pdata, INT_EN, 0); 1520 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 1521 } 1522 1523 static int smsc911x_open(struct net_device *dev) 1524 { 1525 struct smsc911x_data *pdata = netdev_priv(dev); 1526 unsigned int timeout; 1527 unsigned int temp; 1528 unsigned int intcfg; 1529 1530 /* if the phy is not yet registered, retry later*/ 1531 if (!pdata->phy_dev) { 1532 SMSC_WARN(pdata, hw, "phy_dev is NULL"); 1533 return -EAGAIN; 1534 } 1535 1536 /* Reset the LAN911x */ 1537 if (smsc911x_soft_reset(pdata)) { 1538 SMSC_WARN(pdata, hw, "soft reset failed"); 1539 return -EIO; 1540 } 1541 1542 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1543 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1544 1545 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ 1546 spin_lock_irq(&pdata->mac_lock); 1547 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); 1548 spin_unlock_irq(&pdata->mac_lock); 1549 1550 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1551 timeout = 50; 1552 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && 1553 --timeout) { 1554 udelay(10); 1555 } 1556 1557 if (unlikely(timeout == 0)) 1558 SMSC_WARN(pdata, ifup, 1559 "Timed out waiting for EEPROM busy bit to clear"); 1560 1561 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000); 1562 1563 /* The soft reset above cleared the device's MAC address, 1564 * restore it from local copy (set in probe) */ 1565 spin_lock_irq(&pdata->mac_lock); 1566 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1567 spin_unlock_irq(&pdata->mac_lock); 1568 1569 /* Initialise irqs, but leave all sources disabled */ 1570 smsc911x_disable_irq_chip(dev); 1571 1572 /* Set interrupt deassertion to 100uS */ 1573 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); 1574 1575 if (pdata->config.irq_polarity) { 1576 SMSC_TRACE(pdata, ifup, "irq polarity: active high"); 1577 intcfg |= INT_CFG_IRQ_POL_; 1578 } else { 1579 SMSC_TRACE(pdata, ifup, "irq polarity: active low"); 1580 } 1581 1582 if (pdata->config.irq_type) { 1583 SMSC_TRACE(pdata, ifup, "irq type: push-pull"); 1584 intcfg |= INT_CFG_IRQ_TYPE_; 1585 } else { 1586 SMSC_TRACE(pdata, ifup, "irq type: open drain"); 1587 } 1588 1589 smsc911x_reg_write(pdata, INT_CFG, intcfg); 1590 1591 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq); 1592 pdata->software_irq_signal = 0; 1593 smp_wmb(); 1594 1595 temp = smsc911x_reg_read(pdata, INT_EN); 1596 temp |= INT_EN_SW_INT_EN_; 1597 smsc911x_reg_write(pdata, INT_EN, temp); 1598 1599 timeout = 1000; 1600 while (timeout--) { 1601 if (pdata->software_irq_signal) 1602 break; 1603 msleep(1); 1604 } 1605 1606 if (!pdata->software_irq_signal) { 1607 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n", 1608 dev->irq); 1609 return -ENODEV; 1610 } 1611 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d", 1612 dev->irq); 1613 1614 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n", 1615 (unsigned long)pdata->ioaddr, dev->irq); 1616 1617 /* Reset the last known duplex and carrier */ 1618 pdata->last_duplex = -1; 1619 pdata->last_carrier = -1; 1620 1621 /* Bring the PHY up */ 1622 phy_start(pdata->phy_dev); 1623 1624 temp = smsc911x_reg_read(pdata, HW_CFG); 1625 /* Preserve TX FIFO size and external PHY configuration */ 1626 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); 1627 temp |= HW_CFG_SF_; 1628 smsc911x_reg_write(pdata, HW_CFG, temp); 1629 1630 temp = smsc911x_reg_read(pdata, FIFO_INT); 1631 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1632 temp &= ~(FIFO_INT_RX_STS_LEVEL_); 1633 smsc911x_reg_write(pdata, FIFO_INT, temp); 1634 1635 /* set RX Data offset to 2 bytes for alignment */ 1636 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8)); 1637 1638 /* enable NAPI polling before enabling RX interrupts */ 1639 napi_enable(&pdata->napi); 1640 1641 temp = smsc911x_reg_read(pdata, INT_EN); 1642 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); 1643 smsc911x_reg_write(pdata, INT_EN, temp); 1644 1645 spin_lock_irq(&pdata->mac_lock); 1646 temp = smsc911x_mac_read(pdata, MAC_CR); 1647 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 1648 smsc911x_mac_write(pdata, MAC_CR, temp); 1649 spin_unlock_irq(&pdata->mac_lock); 1650 1651 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 1652 1653 netif_start_queue(dev); 1654 return 0; 1655 } 1656 1657 /* Entry point for stopping the interface */ 1658 static int smsc911x_stop(struct net_device *dev) 1659 { 1660 struct smsc911x_data *pdata = netdev_priv(dev); 1661 unsigned int temp; 1662 1663 /* Disable all device interrupts */ 1664 temp = smsc911x_reg_read(pdata, INT_CFG); 1665 temp &= ~INT_CFG_IRQ_EN_; 1666 smsc911x_reg_write(pdata, INT_CFG, temp); 1667 1668 /* Stop Tx and Rx polling */ 1669 netif_stop_queue(dev); 1670 napi_disable(&pdata->napi); 1671 1672 /* At this point all Rx and Tx activity is stopped */ 1673 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1674 smsc911x_tx_update_txcounters(dev); 1675 1676 /* Bring the PHY down */ 1677 if (pdata->phy_dev) 1678 phy_stop(pdata->phy_dev); 1679 1680 SMSC_TRACE(pdata, ifdown, "Interface stopped"); 1681 return 0; 1682 } 1683 1684 /* Entry point for transmitting a packet */ 1685 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 1686 { 1687 struct smsc911x_data *pdata = netdev_priv(dev); 1688 unsigned int freespace; 1689 unsigned int tx_cmd_a; 1690 unsigned int tx_cmd_b; 1691 unsigned int temp; 1692 u32 wrsz; 1693 ulong bufp; 1694 1695 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; 1696 1697 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) 1698 SMSC_WARN(pdata, tx_err, 1699 "Tx data fifo low, space available: %d", freespace); 1700 1701 /* Word alignment adjustment */ 1702 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; 1703 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 1704 tx_cmd_a |= (unsigned int)skb->len; 1705 1706 tx_cmd_b = ((unsigned int)skb->len) << 16; 1707 tx_cmd_b |= (unsigned int)skb->len; 1708 1709 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a); 1710 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b); 1711 1712 bufp = (ulong)skb->data & (~0x3); 1713 wrsz = (u32)skb->len + 3; 1714 wrsz += (u32)((ulong)skb->data & 0x3); 1715 wrsz >>= 2; 1716 1717 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 1718 freespace -= (skb->len + 32); 1719 skb_tx_timestamp(skb); 1720 dev_consume_skb_any(skb); 1721 1722 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) 1723 smsc911x_tx_update_txcounters(dev); 1724 1725 if (freespace < TX_FIFO_LOW_THRESHOLD) { 1726 netif_stop_queue(dev); 1727 temp = smsc911x_reg_read(pdata, FIFO_INT); 1728 temp &= 0x00FFFFFF; 1729 temp |= 0x32000000; 1730 smsc911x_reg_write(pdata, FIFO_INT, temp); 1731 } 1732 1733 return NETDEV_TX_OK; 1734 } 1735 1736 /* Entry point for getting status counters */ 1737 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) 1738 { 1739 struct smsc911x_data *pdata = netdev_priv(dev); 1740 smsc911x_tx_update_txcounters(dev); 1741 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1742 return &dev->stats; 1743 } 1744 1745 /* Entry point for setting addressing modes */ 1746 static void smsc911x_set_multicast_list(struct net_device *dev) 1747 { 1748 struct smsc911x_data *pdata = netdev_priv(dev); 1749 unsigned long flags; 1750 1751 if (dev->flags & IFF_PROMISC) { 1752 /* Enabling promiscuous mode */ 1753 pdata->set_bits_mask = MAC_CR_PRMS_; 1754 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1755 pdata->hashhi = 0; 1756 pdata->hashlo = 0; 1757 } else if (dev->flags & IFF_ALLMULTI) { 1758 /* Enabling all multicast mode */ 1759 pdata->set_bits_mask = MAC_CR_MCPAS_; 1760 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); 1761 pdata->hashhi = 0; 1762 pdata->hashlo = 0; 1763 } else if (!netdev_mc_empty(dev)) { 1764 /* Enabling specific multicast addresses */ 1765 unsigned int hash_high = 0; 1766 unsigned int hash_low = 0; 1767 struct netdev_hw_addr *ha; 1768 1769 pdata->set_bits_mask = MAC_CR_HPFILT_; 1770 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1771 1772 netdev_for_each_mc_addr(ha, dev) { 1773 unsigned int bitnum = smsc911x_hash(ha->addr); 1774 unsigned int mask = 0x01 << (bitnum & 0x1F); 1775 1776 if (bitnum & 0x20) 1777 hash_high |= mask; 1778 else 1779 hash_low |= mask; 1780 } 1781 1782 pdata->hashhi = hash_high; 1783 pdata->hashlo = hash_low; 1784 } else { 1785 /* Enabling local MAC address only */ 1786 pdata->set_bits_mask = 0; 1787 pdata->clear_bits_mask = 1788 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1789 pdata->hashhi = 0; 1790 pdata->hashlo = 0; 1791 } 1792 1793 spin_lock_irqsave(&pdata->mac_lock, flags); 1794 1795 if (pdata->generation <= 1) { 1796 /* Older hardware revision - cannot change these flags while 1797 * receiving data */ 1798 if (!pdata->multicast_update_pending) { 1799 unsigned int temp; 1800 SMSC_TRACE(pdata, hw, "scheduling mcast update"); 1801 pdata->multicast_update_pending = 1; 1802 1803 /* Request the hardware to stop, then perform the 1804 * update when we get an RX_STOP interrupt */ 1805 temp = smsc911x_mac_read(pdata, MAC_CR); 1806 temp &= ~(MAC_CR_RXEN_); 1807 smsc911x_mac_write(pdata, MAC_CR, temp); 1808 } else { 1809 /* There is another update pending, this should now 1810 * use the newer values */ 1811 } 1812 } else { 1813 /* Newer hardware revision - can write immediately */ 1814 smsc911x_rx_multicast_update(pdata); 1815 } 1816 1817 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1818 } 1819 1820 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) 1821 { 1822 struct net_device *dev = dev_id; 1823 struct smsc911x_data *pdata = netdev_priv(dev); 1824 u32 intsts = smsc911x_reg_read(pdata, INT_STS); 1825 u32 inten = smsc911x_reg_read(pdata, INT_EN); 1826 int serviced = IRQ_NONE; 1827 u32 temp; 1828 1829 if (unlikely(intsts & inten & INT_STS_SW_INT_)) { 1830 temp = smsc911x_reg_read(pdata, INT_EN); 1831 temp &= (~INT_EN_SW_INT_EN_); 1832 smsc911x_reg_write(pdata, INT_EN, temp); 1833 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); 1834 pdata->software_irq_signal = 1; 1835 smp_wmb(); 1836 serviced = IRQ_HANDLED; 1837 } 1838 1839 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { 1840 /* Called when there is a multicast update scheduled and 1841 * it is now safe to complete the update */ 1842 SMSC_TRACE(pdata, intr, "RX Stop interrupt"); 1843 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); 1844 if (pdata->multicast_update_pending) 1845 smsc911x_rx_multicast_update_workaround(pdata); 1846 serviced = IRQ_HANDLED; 1847 } 1848 1849 if (intsts & inten & INT_STS_TDFA_) { 1850 temp = smsc911x_reg_read(pdata, FIFO_INT); 1851 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1852 smsc911x_reg_write(pdata, FIFO_INT, temp); 1853 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); 1854 netif_wake_queue(dev); 1855 serviced = IRQ_HANDLED; 1856 } 1857 1858 if (unlikely(intsts & inten & INT_STS_RXE_)) { 1859 SMSC_TRACE(pdata, intr, "RX Error interrupt"); 1860 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); 1861 serviced = IRQ_HANDLED; 1862 } 1863 1864 if (likely(intsts & inten & INT_STS_RSFL_)) { 1865 if (likely(napi_schedule_prep(&pdata->napi))) { 1866 /* Disable Rx interrupts */ 1867 temp = smsc911x_reg_read(pdata, INT_EN); 1868 temp &= (~INT_EN_RSFL_EN_); 1869 smsc911x_reg_write(pdata, INT_EN, temp); 1870 /* Schedule a NAPI poll */ 1871 __napi_schedule(&pdata->napi); 1872 } else { 1873 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed"); 1874 } 1875 serviced = IRQ_HANDLED; 1876 } 1877 1878 return serviced; 1879 } 1880 1881 #ifdef CONFIG_NET_POLL_CONTROLLER 1882 static void smsc911x_poll_controller(struct net_device *dev) 1883 { 1884 disable_irq(dev->irq); 1885 smsc911x_irqhandler(0, dev); 1886 enable_irq(dev->irq); 1887 } 1888 #endif /* CONFIG_NET_POLL_CONTROLLER */ 1889 1890 static int smsc911x_set_mac_address(struct net_device *dev, void *p) 1891 { 1892 struct smsc911x_data *pdata = netdev_priv(dev); 1893 struct sockaddr *addr = p; 1894 1895 /* On older hardware revisions we cannot change the mac address 1896 * registers while receiving data. Newer devices can safely change 1897 * this at any time. */ 1898 if (pdata->generation <= 1 && netif_running(dev)) 1899 return -EBUSY; 1900 1901 if (!is_valid_ether_addr(addr->sa_data)) 1902 return -EADDRNOTAVAIL; 1903 1904 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 1905 1906 spin_lock_irq(&pdata->mac_lock); 1907 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1908 spin_unlock_irq(&pdata->mac_lock); 1909 1910 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 1911 1912 return 0; 1913 } 1914 1915 /* Standard ioctls for mii-tool */ 1916 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1917 { 1918 struct smsc911x_data *pdata = netdev_priv(dev); 1919 1920 if (!netif_running(dev) || !pdata->phy_dev) 1921 return -EINVAL; 1922 1923 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd); 1924 } 1925 1926 static int 1927 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1928 { 1929 struct smsc911x_data *pdata = netdev_priv(dev); 1930 1931 cmd->maxtxpkt = 1; 1932 cmd->maxrxpkt = 1; 1933 return phy_ethtool_gset(pdata->phy_dev, cmd); 1934 } 1935 1936 static int 1937 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1938 { 1939 struct smsc911x_data *pdata = netdev_priv(dev); 1940 1941 return phy_ethtool_sset(pdata->phy_dev, cmd); 1942 } 1943 1944 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, 1945 struct ethtool_drvinfo *info) 1946 { 1947 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); 1948 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); 1949 strlcpy(info->bus_info, dev_name(dev->dev.parent), 1950 sizeof(info->bus_info)); 1951 } 1952 1953 static int smsc911x_ethtool_nwayreset(struct net_device *dev) 1954 { 1955 struct smsc911x_data *pdata = netdev_priv(dev); 1956 1957 return phy_start_aneg(pdata->phy_dev); 1958 } 1959 1960 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) 1961 { 1962 struct smsc911x_data *pdata = netdev_priv(dev); 1963 return pdata->msg_enable; 1964 } 1965 1966 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1967 { 1968 struct smsc911x_data *pdata = netdev_priv(dev); 1969 pdata->msg_enable = level; 1970 } 1971 1972 static int smsc911x_ethtool_getregslen(struct net_device *dev) 1973 { 1974 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * 1975 sizeof(u32); 1976 } 1977 1978 static void 1979 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, 1980 void *buf) 1981 { 1982 struct smsc911x_data *pdata = netdev_priv(dev); 1983 struct phy_device *phy_dev = pdata->phy_dev; 1984 unsigned long flags; 1985 unsigned int i; 1986 unsigned int j = 0; 1987 u32 *data = buf; 1988 1989 regs->version = pdata->idrev; 1990 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) 1991 data[j++] = smsc911x_reg_read(pdata, i); 1992 1993 for (i = MAC_CR; i <= WUCSR; i++) { 1994 spin_lock_irqsave(&pdata->mac_lock, flags); 1995 data[j++] = smsc911x_mac_read(pdata, i); 1996 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1997 } 1998 1999 for (i = 0; i <= 31; i++) 2000 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i); 2001 } 2002 2003 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) 2004 { 2005 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); 2006 temp &= ~GPIO_CFG_EEPR_EN_; 2007 smsc911x_reg_write(pdata, GPIO_CFG, temp); 2008 msleep(1); 2009 } 2010 2011 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) 2012 { 2013 int timeout = 100; 2014 u32 e2cmd; 2015 2016 SMSC_TRACE(pdata, drv, "op 0x%08x", op); 2017 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { 2018 SMSC_WARN(pdata, drv, "Busy at start"); 2019 return -EBUSY; 2020 } 2021 2022 e2cmd = op | E2P_CMD_EPC_BUSY_; 2023 smsc911x_reg_write(pdata, E2P_CMD, e2cmd); 2024 2025 do { 2026 msleep(1); 2027 e2cmd = smsc911x_reg_read(pdata, E2P_CMD); 2028 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); 2029 2030 if (!timeout) { 2031 SMSC_TRACE(pdata, drv, "TIMED OUT"); 2032 return -EAGAIN; 2033 } 2034 2035 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { 2036 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation"); 2037 return -EINVAL; 2038 } 2039 2040 return 0; 2041 } 2042 2043 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, 2044 u8 address, u8 *data) 2045 { 2046 u32 op = E2P_CMD_EPC_CMD_READ_ | address; 2047 int ret; 2048 2049 SMSC_TRACE(pdata, drv, "address 0x%x", address); 2050 ret = smsc911x_eeprom_send_cmd(pdata, op); 2051 2052 if (!ret) 2053 data[address] = smsc911x_reg_read(pdata, E2P_DATA); 2054 2055 return ret; 2056 } 2057 2058 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, 2059 u8 address, u8 data) 2060 { 2061 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; 2062 u32 temp; 2063 int ret; 2064 2065 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data); 2066 ret = smsc911x_eeprom_send_cmd(pdata, op); 2067 2068 if (!ret) { 2069 op = E2P_CMD_EPC_CMD_WRITE_ | address; 2070 smsc911x_reg_write(pdata, E2P_DATA, (u32)data); 2071 2072 /* Workaround for hardware read-after-write restriction */ 2073 temp = smsc911x_reg_read(pdata, BYTE_TEST); 2074 2075 ret = smsc911x_eeprom_send_cmd(pdata, op); 2076 } 2077 2078 return ret; 2079 } 2080 2081 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) 2082 { 2083 return SMSC911X_EEPROM_SIZE; 2084 } 2085 2086 static int smsc911x_ethtool_get_eeprom(struct net_device *dev, 2087 struct ethtool_eeprom *eeprom, u8 *data) 2088 { 2089 struct smsc911x_data *pdata = netdev_priv(dev); 2090 u8 eeprom_data[SMSC911X_EEPROM_SIZE]; 2091 int len; 2092 int i; 2093 2094 smsc911x_eeprom_enable_access(pdata); 2095 2096 len = min(eeprom->len, SMSC911X_EEPROM_SIZE); 2097 for (i = 0; i < len; i++) { 2098 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data); 2099 if (ret < 0) { 2100 eeprom->len = 0; 2101 return ret; 2102 } 2103 } 2104 2105 memcpy(data, &eeprom_data[eeprom->offset], len); 2106 eeprom->len = len; 2107 return 0; 2108 } 2109 2110 static int smsc911x_ethtool_set_eeprom(struct net_device *dev, 2111 struct ethtool_eeprom *eeprom, u8 *data) 2112 { 2113 int ret; 2114 struct smsc911x_data *pdata = netdev_priv(dev); 2115 2116 smsc911x_eeprom_enable_access(pdata); 2117 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); 2118 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data); 2119 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); 2120 2121 /* Single byte write, according to man page */ 2122 eeprom->len = 1; 2123 2124 return ret; 2125 } 2126 2127 static const struct ethtool_ops smsc911x_ethtool_ops = { 2128 .get_settings = smsc911x_ethtool_getsettings, 2129 .set_settings = smsc911x_ethtool_setsettings, 2130 .get_link = ethtool_op_get_link, 2131 .get_drvinfo = smsc911x_ethtool_getdrvinfo, 2132 .nway_reset = smsc911x_ethtool_nwayreset, 2133 .get_msglevel = smsc911x_ethtool_getmsglevel, 2134 .set_msglevel = smsc911x_ethtool_setmsglevel, 2135 .get_regs_len = smsc911x_ethtool_getregslen, 2136 .get_regs = smsc911x_ethtool_getregs, 2137 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 2138 .get_eeprom = smsc911x_ethtool_get_eeprom, 2139 .set_eeprom = smsc911x_ethtool_set_eeprom, 2140 .get_ts_info = ethtool_op_get_ts_info, 2141 }; 2142 2143 static const struct net_device_ops smsc911x_netdev_ops = { 2144 .ndo_open = smsc911x_open, 2145 .ndo_stop = smsc911x_stop, 2146 .ndo_start_xmit = smsc911x_hard_start_xmit, 2147 .ndo_get_stats = smsc911x_get_stats, 2148 .ndo_set_rx_mode = smsc911x_set_multicast_list, 2149 .ndo_do_ioctl = smsc911x_do_ioctl, 2150 .ndo_change_mtu = eth_change_mtu, 2151 .ndo_validate_addr = eth_validate_addr, 2152 .ndo_set_mac_address = smsc911x_set_mac_address, 2153 #ifdef CONFIG_NET_POLL_CONTROLLER 2154 .ndo_poll_controller = smsc911x_poll_controller, 2155 #endif 2156 }; 2157 2158 /* copies the current mac address from hardware to dev->dev_addr */ 2159 static void smsc911x_read_mac_address(struct net_device *dev) 2160 { 2161 struct smsc911x_data *pdata = netdev_priv(dev); 2162 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); 2163 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); 2164 2165 dev->dev_addr[0] = (u8)(mac_low32); 2166 dev->dev_addr[1] = (u8)(mac_low32 >> 8); 2167 dev->dev_addr[2] = (u8)(mac_low32 >> 16); 2168 dev->dev_addr[3] = (u8)(mac_low32 >> 24); 2169 dev->dev_addr[4] = (u8)(mac_high16); 2170 dev->dev_addr[5] = (u8)(mac_high16 >> 8); 2171 } 2172 2173 /* Initializing private device structures, only called from probe */ 2174 static int smsc911x_init(struct net_device *dev) 2175 { 2176 struct smsc911x_data *pdata = netdev_priv(dev); 2177 unsigned int byte_test, mask; 2178 unsigned int to = 100; 2179 2180 SMSC_TRACE(pdata, probe, "Driver Parameters:"); 2181 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX", 2182 (unsigned long)pdata->ioaddr); 2183 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq); 2184 SMSC_TRACE(pdata, probe, "PHY will be autodetected."); 2185 2186 spin_lock_init(&pdata->dev_lock); 2187 spin_lock_init(&pdata->mac_lock); 2188 2189 if (pdata->ioaddr == NULL) { 2190 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000"); 2191 return -ENODEV; 2192 } 2193 2194 /* 2195 * poll the READY bit in PMT_CTRL. Any other access to the device is 2196 * forbidden while this bit isn't set. Try for 100ms 2197 * 2198 * Note that this test is done before the WORD_SWAP register is 2199 * programmed. So in some configurations the READY bit is at 16 before 2200 * WORD_SWAP is written to. This issue is worked around by waiting 2201 * until either bit 0 or bit 16 gets set in PMT_CTRL. 2202 * 2203 * SMSC has confirmed that checking bit 16 (marked as reserved in 2204 * the datasheet) is fine since these bits "will either never be set 2205 * or can only go high after READY does (so also indicate the device 2206 * is ready)". 2207 */ 2208 2209 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); 2210 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) 2211 udelay(1000); 2212 2213 if (to == 0) { 2214 netdev_err(dev, "Device not READY in 100ms aborting\n"); 2215 return -ENODEV; 2216 } 2217 2218 /* Check byte ordering */ 2219 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2220 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test); 2221 if (byte_test == 0x43218765) { 2222 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, " 2223 "applying WORD_SWAP"); 2224 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff); 2225 2226 /* 1 dummy read of BYTE_TEST is needed after a write to 2227 * WORD_SWAP before its contents are valid */ 2228 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2229 2230 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2231 } 2232 2233 if (byte_test != 0x87654321) { 2234 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test); 2235 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { 2236 SMSC_WARN(pdata, probe, 2237 "top 16 bits equal to bottom 16 bits"); 2238 SMSC_TRACE(pdata, probe, 2239 "This may mean the chip is set " 2240 "for 32 bit while the bus is reading 16 bit"); 2241 } 2242 return -ENODEV; 2243 } 2244 2245 /* Default generation to zero (all workarounds apply) */ 2246 pdata->generation = 0; 2247 2248 pdata->idrev = smsc911x_reg_read(pdata, ID_REV); 2249 switch (pdata->idrev & 0xFFFF0000) { 2250 case 0x01180000: 2251 case 0x01170000: 2252 case 0x01160000: 2253 case 0x01150000: 2254 case 0x218A0000: 2255 /* LAN911[5678] family */ 2256 pdata->generation = pdata->idrev & 0x0000FFFF; 2257 break; 2258 2259 case 0x118A0000: 2260 case 0x117A0000: 2261 case 0x116A0000: 2262 case 0x115A0000: 2263 /* LAN921[5678] family */ 2264 pdata->generation = 3; 2265 break; 2266 2267 case 0x92100000: 2268 case 0x92110000: 2269 case 0x92200000: 2270 case 0x92210000: 2271 /* LAN9210/LAN9211/LAN9220/LAN9221 */ 2272 pdata->generation = 4; 2273 break; 2274 2275 default: 2276 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X", 2277 pdata->idrev); 2278 return -ENODEV; 2279 } 2280 2281 SMSC_TRACE(pdata, probe, 2282 "LAN911x identified, idrev: 0x%08X, generation: %d", 2283 pdata->idrev, pdata->generation); 2284 2285 if (pdata->generation == 0) 2286 SMSC_WARN(pdata, probe, 2287 "This driver is not intended for this chip revision"); 2288 2289 /* workaround for platforms without an eeprom, where the mac address 2290 * is stored elsewhere and set by the bootloader. This saves the 2291 * mac address before resetting the device */ 2292 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) { 2293 spin_lock_irq(&pdata->mac_lock); 2294 smsc911x_read_mac_address(dev); 2295 spin_unlock_irq(&pdata->mac_lock); 2296 } 2297 2298 /* Reset the LAN911x */ 2299 if (smsc911x_soft_reset(pdata)) 2300 return -ENODEV; 2301 2302 dev->flags |= IFF_MULTICAST; 2303 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT); 2304 dev->netdev_ops = &smsc911x_netdev_ops; 2305 dev->ethtool_ops = &smsc911x_ethtool_ops; 2306 2307 return 0; 2308 } 2309 2310 static int smsc911x_drv_remove(struct platform_device *pdev) 2311 { 2312 struct net_device *dev; 2313 struct smsc911x_data *pdata; 2314 struct resource *res; 2315 2316 dev = platform_get_drvdata(pdev); 2317 BUG_ON(!dev); 2318 pdata = netdev_priv(dev); 2319 BUG_ON(!pdata); 2320 BUG_ON(!pdata->ioaddr); 2321 BUG_ON(!pdata->phy_dev); 2322 2323 SMSC_TRACE(pdata, ifdown, "Stopping driver"); 2324 2325 phy_disconnect(pdata->phy_dev); 2326 pdata->phy_dev = NULL; 2327 mdiobus_unregister(pdata->mii_bus); 2328 mdiobus_free(pdata->mii_bus); 2329 2330 unregister_netdev(dev); 2331 free_irq(dev->irq, dev); 2332 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2333 "smsc911x-memory"); 2334 if (!res) 2335 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2336 2337 release_mem_region(res->start, resource_size(res)); 2338 2339 iounmap(pdata->ioaddr); 2340 2341 (void)smsc911x_disable_resources(pdev); 2342 smsc911x_free_resources(pdev); 2343 2344 free_netdev(dev); 2345 2346 pm_runtime_put(&pdev->dev); 2347 pm_runtime_disable(&pdev->dev); 2348 2349 return 0; 2350 } 2351 2352 /* standard register acces */ 2353 static const struct smsc911x_ops standard_smsc911x_ops = { 2354 .reg_read = __smsc911x_reg_read, 2355 .reg_write = __smsc911x_reg_write, 2356 .rx_readfifo = smsc911x_rx_readfifo, 2357 .tx_writefifo = smsc911x_tx_writefifo, 2358 }; 2359 2360 /* shifted register access */ 2361 static const struct smsc911x_ops shifted_smsc911x_ops = { 2362 .reg_read = __smsc911x_reg_read_shift, 2363 .reg_write = __smsc911x_reg_write_shift, 2364 .rx_readfifo = smsc911x_rx_readfifo_shift, 2365 .tx_writefifo = smsc911x_tx_writefifo_shift, 2366 }; 2367 2368 static int smsc911x_probe_config(struct smsc911x_platform_config *config, 2369 struct device *dev) 2370 { 2371 int phy_interface; 2372 u32 width = 0; 2373 int err; 2374 2375 phy_interface = device_get_phy_mode(dev); 2376 if (phy_interface < 0) 2377 phy_interface = PHY_INTERFACE_MODE_NA; 2378 config->phy_interface = phy_interface; 2379 2380 device_get_mac_address(dev, config->mac, ETH_ALEN); 2381 2382 err = device_property_read_u32(dev, "reg-io-width", &width); 2383 if (err == -ENXIO) 2384 return err; 2385 if (!err && width == 4) 2386 config->flags |= SMSC911X_USE_32BIT; 2387 else 2388 config->flags |= SMSC911X_USE_16BIT; 2389 2390 device_property_read_u32(dev, "reg-shift", &config->shift); 2391 2392 if (device_property_present(dev, "smsc,irq-active-high")) 2393 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH; 2394 2395 if (device_property_present(dev, "smsc,irq-push-pull")) 2396 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL; 2397 2398 if (device_property_present(dev, "smsc,force-internal-phy")) 2399 config->flags |= SMSC911X_FORCE_INTERNAL_PHY; 2400 2401 if (device_property_present(dev, "smsc,force-external-phy")) 2402 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY; 2403 2404 if (device_property_present(dev, "smsc,save-mac-address")) 2405 config->flags |= SMSC911X_SAVE_MAC_ADDRESS; 2406 2407 return 0; 2408 } 2409 2410 static int smsc911x_drv_probe(struct platform_device *pdev) 2411 { 2412 struct net_device *dev; 2413 struct smsc911x_data *pdata; 2414 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev); 2415 struct resource *res; 2416 unsigned int intcfg = 0; 2417 int res_size, irq, irq_flags; 2418 int retval; 2419 2420 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2421 "smsc911x-memory"); 2422 if (!res) 2423 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2424 if (!res) { 2425 pr_warn("Could not allocate resource\n"); 2426 retval = -ENODEV; 2427 goto out_0; 2428 } 2429 res_size = resource_size(res); 2430 2431 irq = platform_get_irq(pdev, 0); 2432 if (irq == -EPROBE_DEFER) { 2433 retval = -EPROBE_DEFER; 2434 goto out_0; 2435 } else if (irq <= 0) { 2436 pr_warn("Could not allocate irq resource\n"); 2437 retval = -ENODEV; 2438 goto out_0; 2439 } 2440 2441 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { 2442 retval = -EBUSY; 2443 goto out_0; 2444 } 2445 2446 dev = alloc_etherdev(sizeof(struct smsc911x_data)); 2447 if (!dev) { 2448 retval = -ENOMEM; 2449 goto out_release_io_1; 2450 } 2451 2452 SET_NETDEV_DEV(dev, &pdev->dev); 2453 2454 pdata = netdev_priv(dev); 2455 dev->irq = irq; 2456 irq_flags = irq_get_trigger_type(irq); 2457 pdata->ioaddr = ioremap_nocache(res->start, res_size); 2458 2459 pdata->dev = dev; 2460 pdata->msg_enable = ((1 << debug) - 1); 2461 2462 platform_set_drvdata(pdev, dev); 2463 2464 retval = smsc911x_request_resources(pdev); 2465 if (retval) 2466 goto out_request_resources_fail; 2467 2468 retval = smsc911x_enable_resources(pdev); 2469 if (retval) 2470 goto out_enable_resources_fail; 2471 2472 if (pdata->ioaddr == NULL) { 2473 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid"); 2474 retval = -ENOMEM; 2475 goto out_disable_resources; 2476 } 2477 2478 retval = smsc911x_probe_config(&pdata->config, &pdev->dev); 2479 if (retval && config) { 2480 /* copy config parameters across to pdata */ 2481 memcpy(&pdata->config, config, sizeof(pdata->config)); 2482 retval = 0; 2483 } 2484 2485 if (retval) { 2486 SMSC_WARN(pdata, probe, "Error smsc911x config not found"); 2487 goto out_disable_resources; 2488 } 2489 2490 /* assume standard, non-shifted, access to HW registers */ 2491 pdata->ops = &standard_smsc911x_ops; 2492 /* apply the right access if shifting is needed */ 2493 if (pdata->config.shift) 2494 pdata->ops = &shifted_smsc911x_ops; 2495 2496 pm_runtime_enable(&pdev->dev); 2497 pm_runtime_get_sync(&pdev->dev); 2498 2499 retval = smsc911x_init(dev); 2500 if (retval < 0) 2501 goto out_disable_resources; 2502 2503 /* configure irq polarity and type before connecting isr */ 2504 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) 2505 intcfg |= INT_CFG_IRQ_POL_; 2506 2507 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL) 2508 intcfg |= INT_CFG_IRQ_TYPE_; 2509 2510 smsc911x_reg_write(pdata, INT_CFG, intcfg); 2511 2512 /* Ensure interrupts are globally disabled before connecting ISR */ 2513 smsc911x_disable_irq_chip(dev); 2514 2515 retval = request_irq(dev->irq, smsc911x_irqhandler, 2516 irq_flags | IRQF_SHARED, dev->name, dev); 2517 if (retval) { 2518 SMSC_WARN(pdata, probe, 2519 "Unable to claim requested irq: %d", dev->irq); 2520 goto out_disable_resources; 2521 } 2522 2523 netif_carrier_off(dev); 2524 2525 retval = register_netdev(dev); 2526 if (retval) { 2527 SMSC_WARN(pdata, probe, "Error %i registering device", retval); 2528 goto out_free_irq; 2529 } else { 2530 SMSC_TRACE(pdata, probe, 2531 "Network interface: \"%s\"", dev->name); 2532 } 2533 2534 retval = smsc911x_mii_init(pdev, dev); 2535 if (retval) { 2536 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval); 2537 goto out_unregister_netdev_5; 2538 } 2539 2540 spin_lock_irq(&pdata->mac_lock); 2541 2542 /* Check if mac address has been specified when bringing interface up */ 2543 if (is_valid_ether_addr(dev->dev_addr)) { 2544 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2545 SMSC_TRACE(pdata, probe, 2546 "MAC Address is specified by configuration"); 2547 } else if (is_valid_ether_addr(pdata->config.mac)) { 2548 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN); 2549 SMSC_TRACE(pdata, probe, 2550 "MAC Address specified by platform data"); 2551 } else { 2552 /* Try reading mac address from device. if EEPROM is present 2553 * it will already have been set */ 2554 smsc_get_mac(dev); 2555 2556 if (is_valid_ether_addr(dev->dev_addr)) { 2557 /* eeprom values are valid so use them */ 2558 SMSC_TRACE(pdata, probe, 2559 "Mac Address is read from LAN911x EEPROM"); 2560 } else { 2561 /* eeprom values are invalid, generate random MAC */ 2562 eth_hw_addr_random(dev); 2563 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2564 SMSC_TRACE(pdata, probe, 2565 "MAC Address is set to eth_random_addr"); 2566 } 2567 } 2568 2569 spin_unlock_irq(&pdata->mac_lock); 2570 2571 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 2572 2573 return 0; 2574 2575 out_unregister_netdev_5: 2576 unregister_netdev(dev); 2577 out_free_irq: 2578 free_irq(dev->irq, dev); 2579 out_disable_resources: 2580 pm_runtime_put(&pdev->dev); 2581 pm_runtime_disable(&pdev->dev); 2582 (void)smsc911x_disable_resources(pdev); 2583 out_enable_resources_fail: 2584 smsc911x_free_resources(pdev); 2585 out_request_resources_fail: 2586 iounmap(pdata->ioaddr); 2587 free_netdev(dev); 2588 out_release_io_1: 2589 release_mem_region(res->start, resource_size(res)); 2590 out_0: 2591 return retval; 2592 } 2593 2594 #ifdef CONFIG_PM 2595 /* This implementation assumes the devices remains powered on its VDDVARIO 2596 * pins during suspend. */ 2597 2598 /* TODO: implement freeze/thaw callbacks for hibernation.*/ 2599 2600 static int smsc911x_suspend(struct device *dev) 2601 { 2602 struct net_device *ndev = dev_get_drvdata(dev); 2603 struct smsc911x_data *pdata = netdev_priv(ndev); 2604 2605 /* enable wake on LAN, energy detection and the external PME 2606 * signal. */ 2607 smsc911x_reg_write(pdata, PMT_CTRL, 2608 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | 2609 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); 2610 2611 return 0; 2612 } 2613 2614 static int smsc911x_resume(struct device *dev) 2615 { 2616 struct net_device *ndev = dev_get_drvdata(dev); 2617 struct smsc911x_data *pdata = netdev_priv(ndev); 2618 unsigned int to = 100; 2619 2620 /* Note 3.11 from the datasheet: 2621 * "When the LAN9220 is in a power saving state, a write of any 2622 * data to the BYTE_TEST register will wake-up the device." 2623 */ 2624 smsc911x_reg_write(pdata, BYTE_TEST, 0); 2625 2626 /* poll the READY bit in PMT_CTRL. Any other access to the device is 2627 * forbidden while this bit isn't set. Try for 100ms and return -EIO 2628 * if it failed. */ 2629 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) 2630 udelay(1000); 2631 2632 return (to == 0) ? -EIO : 0; 2633 } 2634 2635 static const struct dev_pm_ops smsc911x_pm_ops = { 2636 .suspend = smsc911x_suspend, 2637 .resume = smsc911x_resume, 2638 }; 2639 2640 #define SMSC911X_PM_OPS (&smsc911x_pm_ops) 2641 2642 #else 2643 #define SMSC911X_PM_OPS NULL 2644 #endif 2645 2646 #ifdef CONFIG_OF 2647 static const struct of_device_id smsc911x_dt_ids[] = { 2648 { .compatible = "smsc,lan9115", }, 2649 { /* sentinel */ } 2650 }; 2651 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids); 2652 #endif 2653 2654 static const struct acpi_device_id smsc911x_acpi_match[] = { 2655 { "ARMH9118", 0 }, 2656 { } 2657 }; 2658 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match); 2659 2660 static struct platform_driver smsc911x_driver = { 2661 .probe = smsc911x_drv_probe, 2662 .remove = smsc911x_drv_remove, 2663 .driver = { 2664 .name = SMSC_CHIPNAME, 2665 .pm = SMSC911X_PM_OPS, 2666 .of_match_table = of_match_ptr(smsc911x_dt_ids), 2667 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match), 2668 }, 2669 }; 2670 2671 /* Entry point for loading the module */ 2672 static int __init smsc911x_init_module(void) 2673 { 2674 SMSC_INITIALIZE(); 2675 return platform_driver_register(&smsc911x_driver); 2676 } 2677 2678 /* entry point for unloading the module */ 2679 static void __exit smsc911x_cleanup_module(void) 2680 { 2681 platform_driver_unregister(&smsc911x_driver); 2682 } 2683 2684 module_init(smsc911x_init_module); 2685 module_exit(smsc911x_cleanup_module); 2686