1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /***************************************************************************
3  *
4  * Copyright (C) 2004-2008 SMSC
5  * Copyright (C) 2005-2008 ARM
6  *
7  ***************************************************************************
8  * Rewritten, heavily based on smsc911x simple driver by SMSC.
9  * Partly uses io macros from smc91x.c by Nicolas Pitre
10  *
11  * Supported devices:
12  *   LAN9115, LAN9116, LAN9117, LAN9118
13  *   LAN9215, LAN9216, LAN9217, LAN9218
14  *   LAN9210, LAN9211
15  *   LAN9220, LAN9221
16  *   LAN89218,LAN9250
17  */
18 
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 
21 #include <linux/crc32.h>
22 #include <linux/clk.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
29 #include <linux/ioport.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/netdevice.h>
33 #include <linux/platform_device.h>
34 #include <linux/regulator/consumer.h>
35 #include <linux/sched.h>
36 #include <linux/timer.h>
37 #include <linux/bug.h>
38 #include <linux/bitops.h>
39 #include <linux/irq.h>
40 #include <linux/io.h>
41 #include <linux/swab.h>
42 #include <linux/phy.h>
43 #include <linux/smsc911x.h>
44 #include <linux/device.h>
45 #include <linux/of.h>
46 #include <linux/of_device.h>
47 #include <linux/of_gpio.h>
48 #include <linux/of_net.h>
49 #include <linux/acpi.h>
50 #include <linux/pm_runtime.h>
51 #include <linux/property.h>
52 #include <linux/gpio/consumer.h>
53 
54 #include "smsc911x.h"
55 
56 #define SMSC_CHIPNAME		"smsc911x"
57 #define SMSC_MDIONAME		"smsc911x-mdio"
58 #define SMSC_DRV_VERSION	"2008-10-21"
59 
60 MODULE_LICENSE("GPL");
61 MODULE_VERSION(SMSC_DRV_VERSION);
62 MODULE_ALIAS("platform:smsc911x");
63 
64 #if USE_DEBUG > 0
65 static int debug = 16;
66 #else
67 static int debug = 3;
68 #endif
69 
70 module_param(debug, int, 0);
71 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
72 
73 struct smsc911x_data;
74 
75 struct smsc911x_ops {
76 	u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
77 	void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
78 	void (*rx_readfifo)(struct smsc911x_data *pdata,
79 				unsigned int *buf, unsigned int wordcount);
80 	void (*tx_writefifo)(struct smsc911x_data *pdata,
81 				unsigned int *buf, unsigned int wordcount);
82 };
83 
84 #define SMSC911X_NUM_SUPPLIES 2
85 
86 struct smsc911x_data {
87 	void __iomem *ioaddr;
88 
89 	unsigned int idrev;
90 
91 	/* used to decide which workarounds apply */
92 	unsigned int generation;
93 
94 	/* device configuration (copied from platform_data during probe) */
95 	struct smsc911x_platform_config config;
96 
97 	/* This needs to be acquired before calling any of below:
98 	 * smsc911x_mac_read(), smsc911x_mac_write()
99 	 */
100 	spinlock_t mac_lock;
101 
102 	/* spinlock to ensure register accesses are serialised */
103 	spinlock_t dev_lock;
104 
105 	struct mii_bus *mii_bus;
106 	unsigned int using_extphy;
107 	int last_duplex;
108 	int last_carrier;
109 
110 	u32 msg_enable;
111 	unsigned int gpio_setting;
112 	unsigned int gpio_orig_setting;
113 	struct net_device *dev;
114 	struct napi_struct napi;
115 
116 	unsigned int software_irq_signal;
117 
118 #ifdef USE_PHY_WORK_AROUND
119 #define MIN_PACKET_SIZE (64)
120 	char loopback_tx_pkt[MIN_PACKET_SIZE];
121 	char loopback_rx_pkt[MIN_PACKET_SIZE];
122 	unsigned int resetcount;
123 #endif
124 
125 	/* Members for Multicast filter workaround */
126 	unsigned int multicast_update_pending;
127 	unsigned int set_bits_mask;
128 	unsigned int clear_bits_mask;
129 	unsigned int hashhi;
130 	unsigned int hashlo;
131 
132 	/* register access functions */
133 	const struct smsc911x_ops *ops;
134 
135 	/* regulators */
136 	struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
137 
138 	/* Reset GPIO */
139 	struct gpio_desc *reset_gpiod;
140 
141 	/* clock */
142 	struct clk *clk;
143 };
144 
145 /* Easy access to information */
146 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
147 
148 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
149 {
150 	if (pdata->config.flags & SMSC911X_USE_32BIT)
151 		return readl(pdata->ioaddr + reg);
152 
153 	if (pdata->config.flags & SMSC911X_USE_16BIT)
154 		return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
155 			((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
156 
157 	BUG();
158 	return 0;
159 }
160 
161 static inline u32
162 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
163 {
164 	if (pdata->config.flags & SMSC911X_USE_32BIT)
165 		return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
166 
167 	if (pdata->config.flags & SMSC911X_USE_16BIT)
168 		return (readw(pdata->ioaddr +
169 				__smsc_shift(pdata, reg)) & 0xFFFF) |
170 			((readw(pdata->ioaddr +
171 			__smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
172 
173 	BUG();
174 	return 0;
175 }
176 
177 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
178 {
179 	u32 data;
180 	unsigned long flags;
181 
182 	spin_lock_irqsave(&pdata->dev_lock, flags);
183 	data = pdata->ops->reg_read(pdata, reg);
184 	spin_unlock_irqrestore(&pdata->dev_lock, flags);
185 
186 	return data;
187 }
188 
189 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
190 					u32 val)
191 {
192 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
193 		writel(val, pdata->ioaddr + reg);
194 		return;
195 	}
196 
197 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
198 		writew(val & 0xFFFF, pdata->ioaddr + reg);
199 		writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
200 		return;
201 	}
202 
203 	BUG();
204 }
205 
206 static inline void
207 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
208 {
209 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
210 		writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
211 		return;
212 	}
213 
214 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
215 		writew(val & 0xFFFF,
216 			pdata->ioaddr + __smsc_shift(pdata, reg));
217 		writew((val >> 16) & 0xFFFF,
218 			pdata->ioaddr + __smsc_shift(pdata, reg + 2));
219 		return;
220 	}
221 
222 	BUG();
223 }
224 
225 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
226 				      u32 val)
227 {
228 	unsigned long flags;
229 
230 	spin_lock_irqsave(&pdata->dev_lock, flags);
231 	pdata->ops->reg_write(pdata, reg, val);
232 	spin_unlock_irqrestore(&pdata->dev_lock, flags);
233 }
234 
235 /* Writes a packet to the TX_DATA_FIFO */
236 static inline void
237 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
238 		      unsigned int wordcount)
239 {
240 	unsigned long flags;
241 
242 	spin_lock_irqsave(&pdata->dev_lock, flags);
243 
244 	if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
245 		while (wordcount--)
246 			__smsc911x_reg_write(pdata, TX_DATA_FIFO,
247 					     swab32(*buf++));
248 		goto out;
249 	}
250 
251 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
252 		iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
253 		goto out;
254 	}
255 
256 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
257 		while (wordcount--)
258 			__smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
259 		goto out;
260 	}
261 
262 	BUG();
263 out:
264 	spin_unlock_irqrestore(&pdata->dev_lock, flags);
265 }
266 
267 /* Writes a packet to the TX_DATA_FIFO - shifted version */
268 static inline void
269 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
270 		      unsigned int wordcount)
271 {
272 	unsigned long flags;
273 
274 	spin_lock_irqsave(&pdata->dev_lock, flags);
275 
276 	if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
277 		while (wordcount--)
278 			__smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
279 					     swab32(*buf++));
280 		goto out;
281 	}
282 
283 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
284 		iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
285 						TX_DATA_FIFO), buf, wordcount);
286 		goto out;
287 	}
288 
289 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
290 		while (wordcount--)
291 			__smsc911x_reg_write_shift(pdata,
292 						 TX_DATA_FIFO, *buf++);
293 		goto out;
294 	}
295 
296 	BUG();
297 out:
298 	spin_unlock_irqrestore(&pdata->dev_lock, flags);
299 }
300 
301 /* Reads a packet out of the RX_DATA_FIFO */
302 static inline void
303 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
304 		     unsigned int wordcount)
305 {
306 	unsigned long flags;
307 
308 	spin_lock_irqsave(&pdata->dev_lock, flags);
309 
310 	if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
311 		while (wordcount--)
312 			*buf++ = swab32(__smsc911x_reg_read(pdata,
313 							    RX_DATA_FIFO));
314 		goto out;
315 	}
316 
317 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
318 		ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
319 		goto out;
320 	}
321 
322 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
323 		while (wordcount--)
324 			*buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
325 		goto out;
326 	}
327 
328 	BUG();
329 out:
330 	spin_unlock_irqrestore(&pdata->dev_lock, flags);
331 }
332 
333 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
334 static inline void
335 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
336 		     unsigned int wordcount)
337 {
338 	unsigned long flags;
339 
340 	spin_lock_irqsave(&pdata->dev_lock, flags);
341 
342 	if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
343 		while (wordcount--)
344 			*buf++ = swab32(__smsc911x_reg_read_shift(pdata,
345 							    RX_DATA_FIFO));
346 		goto out;
347 	}
348 
349 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
350 		ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
351 						RX_DATA_FIFO), buf, wordcount);
352 		goto out;
353 	}
354 
355 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
356 		while (wordcount--)
357 			*buf++ = __smsc911x_reg_read_shift(pdata,
358 								RX_DATA_FIFO);
359 		goto out;
360 	}
361 
362 	BUG();
363 out:
364 	spin_unlock_irqrestore(&pdata->dev_lock, flags);
365 }
366 
367 /*
368  * enable regulator and clock resources.
369  */
370 static int smsc911x_enable_resources(struct platform_device *pdev)
371 {
372 	struct net_device *ndev = platform_get_drvdata(pdev);
373 	struct smsc911x_data *pdata = netdev_priv(ndev);
374 	int ret = 0;
375 
376 	ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
377 			pdata->supplies);
378 	if (ret)
379 		netdev_err(ndev, "failed to enable regulators %d\n",
380 				ret);
381 
382 	if (!IS_ERR(pdata->clk)) {
383 		ret = clk_prepare_enable(pdata->clk);
384 		if (ret < 0)
385 			netdev_err(ndev, "failed to enable clock %d\n", ret);
386 	}
387 
388 	return ret;
389 }
390 
391 /*
392  * disable resources, currently just regulators.
393  */
394 static int smsc911x_disable_resources(struct platform_device *pdev)
395 {
396 	struct net_device *ndev = platform_get_drvdata(pdev);
397 	struct smsc911x_data *pdata = netdev_priv(ndev);
398 	int ret = 0;
399 
400 	ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
401 			pdata->supplies);
402 
403 	if (!IS_ERR(pdata->clk))
404 		clk_disable_unprepare(pdata->clk);
405 
406 	return ret;
407 }
408 
409 /*
410  * Request resources, currently just regulators.
411  *
412  * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
413  * these are not always-on we need to request regulators to be turned on
414  * before we can try to access the device registers.
415  */
416 static int smsc911x_request_resources(struct platform_device *pdev)
417 {
418 	struct net_device *ndev = platform_get_drvdata(pdev);
419 	struct smsc911x_data *pdata = netdev_priv(ndev);
420 	int ret = 0;
421 
422 	/* Request regulators */
423 	pdata->supplies[0].supply = "vdd33a";
424 	pdata->supplies[1].supply = "vddvario";
425 	ret = regulator_bulk_get(&pdev->dev,
426 			ARRAY_SIZE(pdata->supplies),
427 			pdata->supplies);
428 	if (ret) {
429 		/*
430 		 * Retry on deferrals, else just report the error
431 		 * and try to continue.
432 		 */
433 		if (ret == -EPROBE_DEFER)
434 			return ret;
435 		netdev_err(ndev, "couldn't get regulators %d\n",
436 				ret);
437 	}
438 
439 	/* Request optional RESET GPIO */
440 	pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev,
441 						     "reset",
442 						     GPIOD_OUT_LOW);
443 
444 	/* Request clock */
445 	pdata->clk = clk_get(&pdev->dev, NULL);
446 	if (IS_ERR(pdata->clk))
447 		dev_dbg(&pdev->dev, "couldn't get clock %li\n",
448 			PTR_ERR(pdata->clk));
449 
450 	return ret;
451 }
452 
453 /*
454  * Free resources, currently just regulators.
455  *
456  */
457 static void smsc911x_free_resources(struct platform_device *pdev)
458 {
459 	struct net_device *ndev = platform_get_drvdata(pdev);
460 	struct smsc911x_data *pdata = netdev_priv(ndev);
461 
462 	/* Free regulators */
463 	regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
464 			pdata->supplies);
465 
466 	/* Free clock */
467 	if (!IS_ERR(pdata->clk)) {
468 		clk_put(pdata->clk);
469 		pdata->clk = NULL;
470 	}
471 }
472 
473 /* waits for MAC not busy, with timeout.  Only called by smsc911x_mac_read
474  * and smsc911x_mac_write, so assumes mac_lock is held */
475 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
476 {
477 	int i;
478 	u32 val;
479 
480 	SMSC_ASSERT_MAC_LOCK(pdata);
481 
482 	for (i = 0; i < 40; i++) {
483 		val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
484 		if (!(val & MAC_CSR_CMD_CSR_BUSY_))
485 			return 0;
486 	}
487 	SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
488 		  "MAC_CSR_CMD: 0x%08X", val);
489 	return -EIO;
490 }
491 
492 /* Fetches a MAC register value. Assumes mac_lock is acquired */
493 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
494 {
495 	unsigned int temp;
496 
497 	SMSC_ASSERT_MAC_LOCK(pdata);
498 
499 	temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
500 	if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
501 		SMSC_WARN(pdata, hw, "MAC busy at entry");
502 		return 0xFFFFFFFF;
503 	}
504 
505 	/* Send the MAC cmd */
506 	smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
507 		MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
508 
509 	/* Workaround for hardware read-after-write restriction */
510 	temp = smsc911x_reg_read(pdata, BYTE_TEST);
511 
512 	/* Wait for the read to complete */
513 	if (likely(smsc911x_mac_complete(pdata) == 0))
514 		return smsc911x_reg_read(pdata, MAC_CSR_DATA);
515 
516 	SMSC_WARN(pdata, hw, "MAC busy after read");
517 	return 0xFFFFFFFF;
518 }
519 
520 /* Set a mac register, mac_lock must be acquired before calling */
521 static void smsc911x_mac_write(struct smsc911x_data *pdata,
522 			       unsigned int offset, u32 val)
523 {
524 	unsigned int temp;
525 
526 	SMSC_ASSERT_MAC_LOCK(pdata);
527 
528 	temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
529 	if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
530 		SMSC_WARN(pdata, hw,
531 			  "smsc911x_mac_write failed, MAC busy at entry");
532 		return;
533 	}
534 
535 	/* Send data to write */
536 	smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
537 
538 	/* Write the actual data */
539 	smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
540 		MAC_CSR_CMD_CSR_BUSY_));
541 
542 	/* Workaround for hardware read-after-write restriction */
543 	temp = smsc911x_reg_read(pdata, BYTE_TEST);
544 
545 	/* Wait for the write to complete */
546 	if (likely(smsc911x_mac_complete(pdata) == 0))
547 		return;
548 
549 	SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
550 }
551 
552 /* Get a phy register */
553 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
554 {
555 	struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
556 	unsigned long flags;
557 	unsigned int addr;
558 	int i, reg;
559 
560 	spin_lock_irqsave(&pdata->mac_lock, flags);
561 
562 	/* Confirm MII not busy */
563 	if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
564 		SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
565 		reg = -EIO;
566 		goto out;
567 	}
568 
569 	/* Set the address, index & direction (read from PHY) */
570 	addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
571 	smsc911x_mac_write(pdata, MII_ACC, addr);
572 
573 	/* Wait for read to complete w/ timeout */
574 	for (i = 0; i < 100; i++)
575 		if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
576 			reg = smsc911x_mac_read(pdata, MII_DATA);
577 			goto out;
578 		}
579 
580 	SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
581 	reg = -EIO;
582 
583 out:
584 	spin_unlock_irqrestore(&pdata->mac_lock, flags);
585 	return reg;
586 }
587 
588 /* Set a phy register */
589 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
590 			   u16 val)
591 {
592 	struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
593 	unsigned long flags;
594 	unsigned int addr;
595 	int i, reg;
596 
597 	spin_lock_irqsave(&pdata->mac_lock, flags);
598 
599 	/* Confirm MII not busy */
600 	if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
601 		SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
602 		reg = -EIO;
603 		goto out;
604 	}
605 
606 	/* Put the data to write in the MAC */
607 	smsc911x_mac_write(pdata, MII_DATA, val);
608 
609 	/* Set the address, index & direction (write to PHY) */
610 	addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
611 		MII_ACC_MII_WRITE_;
612 	smsc911x_mac_write(pdata, MII_ACC, addr);
613 
614 	/* Wait for write to complete w/ timeout */
615 	for (i = 0; i < 100; i++)
616 		if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
617 			reg = 0;
618 			goto out;
619 		}
620 
621 	SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
622 	reg = -EIO;
623 
624 out:
625 	spin_unlock_irqrestore(&pdata->mac_lock, flags);
626 	return reg;
627 }
628 
629 /* Switch to external phy. Assumes tx and rx are stopped. */
630 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
631 {
632 	unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
633 
634 	/* Disable phy clocks to the MAC */
635 	hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
636 	hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
637 	smsc911x_reg_write(pdata, HW_CFG, hwcfg);
638 	udelay(10);	/* Enough time for clocks to stop */
639 
640 	/* Switch to external phy */
641 	hwcfg |= HW_CFG_EXT_PHY_EN_;
642 	smsc911x_reg_write(pdata, HW_CFG, hwcfg);
643 
644 	/* Enable phy clocks to the MAC */
645 	hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
646 	hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
647 	smsc911x_reg_write(pdata, HW_CFG, hwcfg);
648 	udelay(10);	/* Enough time for clocks to restart */
649 
650 	hwcfg |= HW_CFG_SMI_SEL_;
651 	smsc911x_reg_write(pdata, HW_CFG, hwcfg);
652 }
653 
654 /* Autodetects and enables external phy if present on supported chips.
655  * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
656  * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
657 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
658 {
659 	unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
660 
661 	if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
662 		SMSC_TRACE(pdata, hw, "Forcing internal PHY");
663 		pdata->using_extphy = 0;
664 	} else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
665 		SMSC_TRACE(pdata, hw, "Forcing external PHY");
666 		smsc911x_phy_enable_external(pdata);
667 		pdata->using_extphy = 1;
668 	} else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
669 		SMSC_TRACE(pdata, hw,
670 			   "HW_CFG EXT_PHY_DET set, using external PHY");
671 		smsc911x_phy_enable_external(pdata);
672 		pdata->using_extphy = 1;
673 	} else {
674 		SMSC_TRACE(pdata, hw,
675 			   "HW_CFG EXT_PHY_DET clear, using internal PHY");
676 		pdata->using_extphy = 0;
677 	}
678 }
679 
680 /* Fetches a tx status out of the status fifo */
681 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
682 {
683 	unsigned int result =
684 	    smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
685 
686 	if (result != 0)
687 		result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
688 
689 	return result;
690 }
691 
692 /* Fetches the next rx status */
693 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
694 {
695 	unsigned int result =
696 	    smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
697 
698 	if (result != 0)
699 		result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
700 
701 	return result;
702 }
703 
704 #ifdef USE_PHY_WORK_AROUND
705 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
706 {
707 	unsigned int tries;
708 	u32 wrsz;
709 	u32 rdsz;
710 	ulong bufp;
711 
712 	for (tries = 0; tries < 10; tries++) {
713 		unsigned int txcmd_a;
714 		unsigned int txcmd_b;
715 		unsigned int status;
716 		unsigned int pktlength;
717 		unsigned int i;
718 
719 		/* Zero-out rx packet memory */
720 		memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
721 
722 		/* Write tx packet to 118 */
723 		txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
724 		txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
725 		txcmd_a |= MIN_PACKET_SIZE;
726 
727 		txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
728 
729 		smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
730 		smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
731 
732 		bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
733 		wrsz = MIN_PACKET_SIZE + 3;
734 		wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
735 		wrsz >>= 2;
736 
737 		pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
738 
739 		/* Wait till transmit is done */
740 		i = 60;
741 		do {
742 			udelay(5);
743 			status = smsc911x_tx_get_txstatus(pdata);
744 		} while ((i--) && (!status));
745 
746 		if (!status) {
747 			SMSC_WARN(pdata, hw,
748 				  "Failed to transmit during loopback test");
749 			continue;
750 		}
751 		if (status & TX_STS_ES_) {
752 			SMSC_WARN(pdata, hw,
753 				  "Transmit encountered errors during loopback test");
754 			continue;
755 		}
756 
757 		/* Wait till receive is done */
758 		i = 60;
759 		do {
760 			udelay(5);
761 			status = smsc911x_rx_get_rxstatus(pdata);
762 		} while ((i--) && (!status));
763 
764 		if (!status) {
765 			SMSC_WARN(pdata, hw,
766 				  "Failed to receive during loopback test");
767 			continue;
768 		}
769 		if (status & RX_STS_ES_) {
770 			SMSC_WARN(pdata, hw,
771 				  "Receive encountered errors during loopback test");
772 			continue;
773 		}
774 
775 		pktlength = ((status & 0x3FFF0000UL) >> 16);
776 		bufp = (ulong)pdata->loopback_rx_pkt;
777 		rdsz = pktlength + 3;
778 		rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
779 		rdsz >>= 2;
780 
781 		pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
782 
783 		if (pktlength != (MIN_PACKET_SIZE + 4)) {
784 			SMSC_WARN(pdata, hw, "Unexpected packet size "
785 				  "during loop back test, size=%d, will retry",
786 				  pktlength);
787 		} else {
788 			unsigned int j;
789 			int mismatch = 0;
790 			for (j = 0; j < MIN_PACKET_SIZE; j++) {
791 				if (pdata->loopback_tx_pkt[j]
792 				    != pdata->loopback_rx_pkt[j]) {
793 					mismatch = 1;
794 					break;
795 				}
796 			}
797 			if (!mismatch) {
798 				SMSC_TRACE(pdata, hw, "Successfully verified "
799 					   "loopback packet");
800 				return 0;
801 			} else {
802 				SMSC_WARN(pdata, hw, "Data mismatch "
803 					  "during loop back test, will retry");
804 			}
805 		}
806 	}
807 
808 	return -EIO;
809 }
810 
811 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
812 {
813 	unsigned int temp;
814 	unsigned int i = 100000;
815 
816 	temp = smsc911x_reg_read(pdata, PMT_CTRL);
817 	smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
818 	do {
819 		msleep(1);
820 		temp = smsc911x_reg_read(pdata, PMT_CTRL);
821 	} while ((i--) && (temp & PMT_CTRL_PHY_RST_));
822 
823 	if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
824 		SMSC_WARN(pdata, hw, "PHY reset failed to complete");
825 		return -EIO;
826 	}
827 	/* Extra delay required because the phy may not be completed with
828 	* its reset when BMCR_RESET is cleared. Specs say 256 uS is
829 	* enough delay but using 1ms here to be safe */
830 	msleep(1);
831 
832 	return 0;
833 }
834 
835 static int smsc911x_phy_loopbacktest(struct net_device *dev)
836 {
837 	struct smsc911x_data *pdata = netdev_priv(dev);
838 	struct phy_device *phy_dev = dev->phydev;
839 	int result = -EIO;
840 	unsigned int i, val;
841 	unsigned long flags;
842 
843 	/* Initialise tx packet using broadcast destination address */
844 	eth_broadcast_addr(pdata->loopback_tx_pkt);
845 
846 	/* Use incrementing source address */
847 	for (i = 6; i < 12; i++)
848 		pdata->loopback_tx_pkt[i] = (char)i;
849 
850 	/* Set length type field */
851 	pdata->loopback_tx_pkt[12] = 0x00;
852 	pdata->loopback_tx_pkt[13] = 0x00;
853 
854 	for (i = 14; i < MIN_PACKET_SIZE; i++)
855 		pdata->loopback_tx_pkt[i] = (char)i;
856 
857 	val = smsc911x_reg_read(pdata, HW_CFG);
858 	val &= HW_CFG_TX_FIF_SZ_;
859 	val |= HW_CFG_SF_;
860 	smsc911x_reg_write(pdata, HW_CFG, val);
861 
862 	smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
863 	smsc911x_reg_write(pdata, RX_CFG,
864 		(u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
865 
866 	for (i = 0; i < 10; i++) {
867 		/* Set PHY to 10/FD, no ANEG, and loopback mode */
868 		smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
869 				   MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
870 
871 		/* Enable MAC tx/rx, FD */
872 		spin_lock_irqsave(&pdata->mac_lock, flags);
873 		smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
874 				   | MAC_CR_TXEN_ | MAC_CR_RXEN_);
875 		spin_unlock_irqrestore(&pdata->mac_lock, flags);
876 
877 		if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
878 			result = 0;
879 			break;
880 		}
881 		pdata->resetcount++;
882 
883 		/* Disable MAC rx */
884 		spin_lock_irqsave(&pdata->mac_lock, flags);
885 		smsc911x_mac_write(pdata, MAC_CR, 0);
886 		spin_unlock_irqrestore(&pdata->mac_lock, flags);
887 
888 		smsc911x_phy_reset(pdata);
889 	}
890 
891 	/* Disable MAC */
892 	spin_lock_irqsave(&pdata->mac_lock, flags);
893 	smsc911x_mac_write(pdata, MAC_CR, 0);
894 	spin_unlock_irqrestore(&pdata->mac_lock, flags);
895 
896 	/* Cancel PHY loopback mode */
897 	smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
898 
899 	smsc911x_reg_write(pdata, TX_CFG, 0);
900 	smsc911x_reg_write(pdata, RX_CFG, 0);
901 
902 	return result;
903 }
904 #endif				/* USE_PHY_WORK_AROUND */
905 
906 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
907 {
908 	struct net_device *ndev = pdata->dev;
909 	struct phy_device *phy_dev = ndev->phydev;
910 	u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
911 	u32 flow;
912 	unsigned long flags;
913 
914 	if (phy_dev->duplex == DUPLEX_FULL) {
915 		u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
916 		u16 rmtadv = phy_read(phy_dev, MII_LPA);
917 		u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
918 
919 		if (cap & FLOW_CTRL_RX)
920 			flow = 0xFFFF0002;
921 		else
922 			flow = 0;
923 
924 		if (cap & FLOW_CTRL_TX)
925 			afc |= 0xF;
926 		else
927 			afc &= ~0xF;
928 
929 		SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
930 			   (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
931 			   (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
932 	} else {
933 		SMSC_TRACE(pdata, hw, "half duplex");
934 		flow = 0;
935 		afc |= 0xF;
936 	}
937 
938 	spin_lock_irqsave(&pdata->mac_lock, flags);
939 	smsc911x_mac_write(pdata, FLOW, flow);
940 	spin_unlock_irqrestore(&pdata->mac_lock, flags);
941 
942 	smsc911x_reg_write(pdata, AFC_CFG, afc);
943 }
944 
945 /* Update link mode if anything has changed.  Called periodically when the
946  * PHY is in polling mode, even if nothing has changed. */
947 static void smsc911x_phy_adjust_link(struct net_device *dev)
948 {
949 	struct smsc911x_data *pdata = netdev_priv(dev);
950 	struct phy_device *phy_dev = dev->phydev;
951 	unsigned long flags;
952 	int carrier;
953 
954 	if (phy_dev->duplex != pdata->last_duplex) {
955 		unsigned int mac_cr;
956 		SMSC_TRACE(pdata, hw, "duplex state has changed");
957 
958 		spin_lock_irqsave(&pdata->mac_lock, flags);
959 		mac_cr = smsc911x_mac_read(pdata, MAC_CR);
960 		if (phy_dev->duplex) {
961 			SMSC_TRACE(pdata, hw,
962 				   "configuring for full duplex mode");
963 			mac_cr |= MAC_CR_FDPX_;
964 		} else {
965 			SMSC_TRACE(pdata, hw,
966 				   "configuring for half duplex mode");
967 			mac_cr &= ~MAC_CR_FDPX_;
968 		}
969 		smsc911x_mac_write(pdata, MAC_CR, mac_cr);
970 		spin_unlock_irqrestore(&pdata->mac_lock, flags);
971 
972 		smsc911x_phy_update_flowcontrol(pdata);
973 		pdata->last_duplex = phy_dev->duplex;
974 	}
975 
976 	carrier = netif_carrier_ok(dev);
977 	if (carrier != pdata->last_carrier) {
978 		SMSC_TRACE(pdata, hw, "carrier state has changed");
979 		if (carrier) {
980 			SMSC_TRACE(pdata, hw, "configuring for carrier OK");
981 			if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
982 			    (!pdata->using_extphy)) {
983 				/* Restore original GPIO configuration */
984 				pdata->gpio_setting = pdata->gpio_orig_setting;
985 				smsc911x_reg_write(pdata, GPIO_CFG,
986 					pdata->gpio_setting);
987 			}
988 		} else {
989 			SMSC_TRACE(pdata, hw, "configuring for no carrier");
990 			/* Check global setting that LED1
991 			 * usage is 10/100 indicator */
992 			pdata->gpio_setting = smsc911x_reg_read(pdata,
993 				GPIO_CFG);
994 			if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
995 			    (!pdata->using_extphy)) {
996 				/* Force 10/100 LED off, after saving
997 				 * original GPIO configuration */
998 				pdata->gpio_orig_setting = pdata->gpio_setting;
999 
1000 				pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1001 				pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1002 							| GPIO_CFG_GPIODIR0_
1003 							| GPIO_CFG_GPIOD0_);
1004 				smsc911x_reg_write(pdata, GPIO_CFG,
1005 					pdata->gpio_setting);
1006 			}
1007 		}
1008 		pdata->last_carrier = carrier;
1009 	}
1010 }
1011 
1012 static int smsc911x_mii_probe(struct net_device *dev)
1013 {
1014 	struct smsc911x_data *pdata = netdev_priv(dev);
1015 	struct phy_device *phydev = NULL;
1016 	int ret;
1017 
1018 	/* find the first phy */
1019 	phydev = phy_find_first(pdata->mii_bus);
1020 	if (!phydev) {
1021 		netdev_err(dev, "no PHY found\n");
1022 		return -ENODEV;
1023 	}
1024 
1025 	SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1026 		   phydev->mdio.addr, phydev->phy_id);
1027 
1028 	ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1029 				 pdata->config.phy_interface);
1030 
1031 	if (ret) {
1032 		netdev_err(dev, "Could not attach to PHY\n");
1033 		return ret;
1034 	}
1035 
1036 	phy_attached_info(phydev);
1037 
1038 	phy_set_max_speed(phydev, SPEED_100);
1039 
1040 	/* mask with MAC supported features */
1041 	phy_support_asym_pause(phydev);
1042 
1043 	pdata->last_duplex = -1;
1044 	pdata->last_carrier = -1;
1045 
1046 #ifdef USE_PHY_WORK_AROUND
1047 	if (smsc911x_phy_loopbacktest(dev) < 0) {
1048 		SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1049 		phy_disconnect(phydev);
1050 		return -ENODEV;
1051 	}
1052 	SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1053 #endif				/* USE_PHY_WORK_AROUND */
1054 
1055 	SMSC_TRACE(pdata, hw, "phy initialised successfully");
1056 	return 0;
1057 }
1058 
1059 static int smsc911x_mii_init(struct platform_device *pdev,
1060 			     struct net_device *dev)
1061 {
1062 	struct smsc911x_data *pdata = netdev_priv(dev);
1063 	int err = -ENXIO;
1064 
1065 	pdata->mii_bus = mdiobus_alloc();
1066 	if (!pdata->mii_bus) {
1067 		err = -ENOMEM;
1068 		goto err_out_1;
1069 	}
1070 
1071 	pdata->mii_bus->name = SMSC_MDIONAME;
1072 	snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1073 		pdev->name, pdev->id);
1074 	pdata->mii_bus->priv = pdata;
1075 	pdata->mii_bus->read = smsc911x_mii_read;
1076 	pdata->mii_bus->write = smsc911x_mii_write;
1077 
1078 	pdata->mii_bus->parent = &pdev->dev;
1079 
1080 	switch (pdata->idrev & 0xFFFF0000) {
1081 	case 0x01170000:
1082 	case 0x01150000:
1083 	case 0x117A0000:
1084 	case 0x115A0000:
1085 		/* External PHY supported, try to autodetect */
1086 		smsc911x_phy_initialise_external(pdata);
1087 		break;
1088 	default:
1089 		SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1090 			   "using internal PHY");
1091 		pdata->using_extphy = 0;
1092 		break;
1093 	}
1094 
1095 	if (!pdata->using_extphy) {
1096 		/* Mask all PHYs except ID 1 (internal) */
1097 		pdata->mii_bus->phy_mask = ~(1 << 1);
1098 	}
1099 
1100 	if (mdiobus_register(pdata->mii_bus)) {
1101 		SMSC_WARN(pdata, probe, "Error registering mii bus");
1102 		goto err_out_free_bus_2;
1103 	}
1104 
1105 	return 0;
1106 
1107 err_out_free_bus_2:
1108 	mdiobus_free(pdata->mii_bus);
1109 err_out_1:
1110 	return err;
1111 }
1112 
1113 /* Gets the number of tx statuses in the fifo */
1114 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1115 {
1116 	return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1117 		& TX_FIFO_INF_TSUSED_) >> 16;
1118 }
1119 
1120 /* Reads tx statuses and increments counters where necessary */
1121 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1122 {
1123 	struct smsc911x_data *pdata = netdev_priv(dev);
1124 	unsigned int tx_stat;
1125 
1126 	while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1127 		if (unlikely(tx_stat & 0x80000000)) {
1128 			/* In this driver the packet tag is used as the packet
1129 			 * length. Since a packet length can never reach the
1130 			 * size of 0x8000, this bit is reserved. It is worth
1131 			 * noting that the "reserved bit" in the warning above
1132 			 * does not reference a hardware defined reserved bit
1133 			 * but rather a driver defined one.
1134 			 */
1135 			SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1136 		} else {
1137 			if (unlikely(tx_stat & TX_STS_ES_)) {
1138 				dev->stats.tx_errors++;
1139 			} else {
1140 				dev->stats.tx_packets++;
1141 				dev->stats.tx_bytes += (tx_stat >> 16);
1142 			}
1143 			if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1144 				dev->stats.collisions += 16;
1145 				dev->stats.tx_aborted_errors += 1;
1146 			} else {
1147 				dev->stats.collisions +=
1148 				    ((tx_stat >> 3) & 0xF);
1149 			}
1150 			if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1151 				dev->stats.tx_carrier_errors += 1;
1152 			if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1153 				dev->stats.collisions++;
1154 				dev->stats.tx_aborted_errors++;
1155 			}
1156 		}
1157 	}
1158 }
1159 
1160 /* Increments the Rx error counters */
1161 static void
1162 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1163 {
1164 	int crc_err = 0;
1165 
1166 	if (unlikely(rxstat & RX_STS_ES_)) {
1167 		dev->stats.rx_errors++;
1168 		if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1169 			dev->stats.rx_crc_errors++;
1170 			crc_err = 1;
1171 		}
1172 	}
1173 	if (likely(!crc_err)) {
1174 		if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1175 			     (rxstat & RX_STS_LENGTH_ERR_)))
1176 			dev->stats.rx_length_errors++;
1177 		if (rxstat & RX_STS_MCAST_)
1178 			dev->stats.multicast++;
1179 	}
1180 }
1181 
1182 /* Quickly dumps bad packets */
1183 static void
1184 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1185 {
1186 	if (likely(pktwords >= 4)) {
1187 		unsigned int timeout = 500;
1188 		unsigned int val;
1189 		smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1190 		do {
1191 			udelay(1);
1192 			val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1193 		} while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1194 
1195 		if (unlikely(timeout == 0))
1196 			SMSC_WARN(pdata, hw, "Timed out waiting for "
1197 				  "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1198 	} else {
1199 		unsigned int temp;
1200 		while (pktwords--)
1201 			temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1202 	}
1203 }
1204 
1205 /* NAPI poll function */
1206 static int smsc911x_poll(struct napi_struct *napi, int budget)
1207 {
1208 	struct smsc911x_data *pdata =
1209 		container_of(napi, struct smsc911x_data, napi);
1210 	struct net_device *dev = pdata->dev;
1211 	int npackets = 0;
1212 
1213 	while (npackets < budget) {
1214 		unsigned int pktlength;
1215 		unsigned int pktwords;
1216 		struct sk_buff *skb;
1217 		unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1218 
1219 		if (!rxstat) {
1220 			unsigned int temp;
1221 			/* We processed all packets available.  Tell NAPI it can
1222 			 * stop polling then re-enable rx interrupts */
1223 			smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1224 			napi_complete(napi);
1225 			temp = smsc911x_reg_read(pdata, INT_EN);
1226 			temp |= INT_EN_RSFL_EN_;
1227 			smsc911x_reg_write(pdata, INT_EN, temp);
1228 			break;
1229 		}
1230 
1231 		/* Count packet for NAPI scheduling, even if it has an error.
1232 		 * Error packets still require cycles to discard */
1233 		npackets++;
1234 
1235 		pktlength = ((rxstat & 0x3FFF0000) >> 16);
1236 		pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1237 		smsc911x_rx_counterrors(dev, rxstat);
1238 
1239 		if (unlikely(rxstat & RX_STS_ES_)) {
1240 			SMSC_WARN(pdata, rx_err,
1241 				  "Discarding packet with error bit set");
1242 			/* Packet has an error, discard it and continue with
1243 			 * the next */
1244 			smsc911x_rx_fastforward(pdata, pktwords);
1245 			dev->stats.rx_dropped++;
1246 			continue;
1247 		}
1248 
1249 		skb = netdev_alloc_skb(dev, pktwords << 2);
1250 		if (unlikely(!skb)) {
1251 			SMSC_WARN(pdata, rx_err,
1252 				  "Unable to allocate skb for rx packet");
1253 			/* Drop the packet and stop this polling iteration */
1254 			smsc911x_rx_fastforward(pdata, pktwords);
1255 			dev->stats.rx_dropped++;
1256 			break;
1257 		}
1258 
1259 		pdata->ops->rx_readfifo(pdata,
1260 				 (unsigned int *)skb->data, pktwords);
1261 
1262 		/* Align IP on 16B boundary */
1263 		skb_reserve(skb, NET_IP_ALIGN);
1264 		skb_put(skb, pktlength - 4);
1265 		skb->protocol = eth_type_trans(skb, dev);
1266 		skb_checksum_none_assert(skb);
1267 		netif_receive_skb(skb);
1268 
1269 		/* Update counters */
1270 		dev->stats.rx_packets++;
1271 		dev->stats.rx_bytes += (pktlength - 4);
1272 	}
1273 
1274 	/* Return total received packets */
1275 	return npackets;
1276 }
1277 
1278 /* Returns hash bit number for given MAC address
1279  * Example:
1280  * 01 00 5E 00 00 01 -> returns bit number 31 */
1281 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1282 {
1283 	return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1284 }
1285 
1286 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1287 {
1288 	/* Performs the multicast & mac_cr update.  This is called when
1289 	 * safe on the current hardware, and with the mac_lock held */
1290 	unsigned int mac_cr;
1291 
1292 	SMSC_ASSERT_MAC_LOCK(pdata);
1293 
1294 	mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1295 	mac_cr |= pdata->set_bits_mask;
1296 	mac_cr &= ~(pdata->clear_bits_mask);
1297 	smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1298 	smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1299 	smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1300 	SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1301 		   mac_cr, pdata->hashhi, pdata->hashlo);
1302 }
1303 
1304 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1305 {
1306 	unsigned int mac_cr;
1307 
1308 	/* This function is only called for older LAN911x devices
1309 	 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1310 	 * be modified during Rx - newer devices immediately update the
1311 	 * registers.
1312 	 *
1313 	 * This is called from interrupt context */
1314 
1315 	spin_lock(&pdata->mac_lock);
1316 
1317 	/* Check Rx has stopped */
1318 	if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1319 		SMSC_WARN(pdata, drv, "Rx not stopped");
1320 
1321 	/* Perform the update - safe to do now Rx has stopped */
1322 	smsc911x_rx_multicast_update(pdata);
1323 
1324 	/* Re-enable Rx */
1325 	mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1326 	mac_cr |= MAC_CR_RXEN_;
1327 	smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1328 
1329 	pdata->multicast_update_pending = 0;
1330 
1331 	spin_unlock(&pdata->mac_lock);
1332 }
1333 
1334 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1335 {
1336 	struct net_device *ndev = pdata->dev;
1337 	struct phy_device *phy_dev = ndev->phydev;
1338 	int rc = 0;
1339 
1340 	if (!phy_dev)
1341 		return rc;
1342 
1343 	/* If the internal PHY is in General Power-Down mode, all, except the
1344 	 * management interface, is powered-down and stays in that condition as
1345 	 * long as Phy register bit 0.11 is HIGH.
1346 	 *
1347 	 * In that case, clear the bit 0.11, so the PHY powers up and we can
1348 	 * access to the phy registers.
1349 	 */
1350 	rc = phy_read(phy_dev, MII_BMCR);
1351 	if (rc < 0) {
1352 		SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1353 		return rc;
1354 	}
1355 
1356 	/* If the PHY general power-down bit is not set is not necessary to
1357 	 * disable the general power down-mode.
1358 	 */
1359 	if (rc & BMCR_PDOWN) {
1360 		rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1361 		if (rc < 0) {
1362 			SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1363 			return rc;
1364 		}
1365 
1366 		usleep_range(1000, 1500);
1367 	}
1368 
1369 	return 0;
1370 }
1371 
1372 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1373 {
1374 	struct net_device *ndev = pdata->dev;
1375 	struct phy_device *phy_dev = ndev->phydev;
1376 	int rc = 0;
1377 
1378 	if (!phy_dev)
1379 		return rc;
1380 
1381 	rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1382 
1383 	if (rc < 0) {
1384 		SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1385 		return rc;
1386 	}
1387 
1388 	/* Only disable if energy detect mode is already enabled */
1389 	if (rc & MII_LAN83C185_EDPWRDOWN) {
1390 		/* Disable energy detect mode for this SMSC Transceivers */
1391 		rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1392 			       rc & (~MII_LAN83C185_EDPWRDOWN));
1393 
1394 		if (rc < 0) {
1395 			SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1396 			return rc;
1397 		}
1398 		/* Allow PHY to wakeup */
1399 		mdelay(2);
1400 	}
1401 
1402 	return 0;
1403 }
1404 
1405 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1406 {
1407 	struct net_device *ndev = pdata->dev;
1408 	struct phy_device *phy_dev = ndev->phydev;
1409 	int rc = 0;
1410 
1411 	if (!phy_dev)
1412 		return rc;
1413 
1414 	rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1415 
1416 	if (rc < 0) {
1417 		SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1418 		return rc;
1419 	}
1420 
1421 	/* Only enable if energy detect mode is already disabled */
1422 	if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1423 		/* Enable energy detect mode for this SMSC Transceivers */
1424 		rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1425 			       rc | MII_LAN83C185_EDPWRDOWN);
1426 
1427 		if (rc < 0) {
1428 			SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1429 			return rc;
1430 		}
1431 	}
1432 	return 0;
1433 }
1434 
1435 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1436 {
1437 	unsigned int timeout;
1438 	unsigned int temp;
1439 	int ret;
1440 	unsigned int reset_offset = HW_CFG;
1441 	unsigned int reset_mask = HW_CFG_SRST_;
1442 
1443 	/*
1444 	 * Make sure to power-up the PHY chip before doing a reset, otherwise
1445 	 * the reset fails.
1446 	 */
1447 	ret = smsc911x_phy_general_power_up(pdata);
1448 	if (ret) {
1449 		SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1450 		return ret;
1451 	}
1452 
1453 	/*
1454 	 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1455 	 * are initialized in a Energy Detect Power-Down mode that prevents
1456 	 * the MAC chip to be software reseted. So we have to wakeup the PHY
1457 	 * before.
1458 	 */
1459 	if (pdata->generation == 4) {
1460 		ret = smsc911x_phy_disable_energy_detect(pdata);
1461 
1462 		if (ret) {
1463 			SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1464 			return ret;
1465 		}
1466 	}
1467 
1468 	if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
1469 		/* special reset for  LAN9250 */
1470 		reset_offset = RESET_CTL;
1471 		reset_mask = RESET_CTL_DIGITAL_RST_;
1472 	}
1473 
1474 	/* Reset the LAN911x */
1475 	smsc911x_reg_write(pdata, reset_offset, reset_mask);
1476 
1477 	/* verify reset bit is cleared */
1478 	timeout = 10;
1479 	do {
1480 		udelay(10);
1481 		temp = smsc911x_reg_read(pdata, reset_offset);
1482 	} while ((--timeout) && (temp & reset_mask));
1483 
1484 	if (unlikely(temp & reset_mask)) {
1485 		SMSC_WARN(pdata, drv, "Failed to complete reset");
1486 		return -EIO;
1487 	}
1488 
1489 	if (pdata->generation == 4) {
1490 		ret = smsc911x_phy_enable_energy_detect(pdata);
1491 
1492 		if (ret) {
1493 			SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1494 			return ret;
1495 		}
1496 	}
1497 
1498 	return 0;
1499 }
1500 
1501 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1502 static void
1503 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1504 {
1505 	u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1506 	u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1507 	    (dev_addr[1] << 8) | dev_addr[0];
1508 
1509 	SMSC_ASSERT_MAC_LOCK(pdata);
1510 
1511 	smsc911x_mac_write(pdata, ADDRH, mac_high16);
1512 	smsc911x_mac_write(pdata, ADDRL, mac_low32);
1513 }
1514 
1515 static void smsc911x_disable_irq_chip(struct net_device *dev)
1516 {
1517 	struct smsc911x_data *pdata = netdev_priv(dev);
1518 
1519 	smsc911x_reg_write(pdata, INT_EN, 0);
1520 	smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1521 }
1522 
1523 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1524 {
1525 	struct net_device *dev = dev_id;
1526 	struct smsc911x_data *pdata = netdev_priv(dev);
1527 	u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1528 	u32 inten = smsc911x_reg_read(pdata, INT_EN);
1529 	int serviced = IRQ_NONE;
1530 	u32 temp;
1531 
1532 	if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1533 		temp = smsc911x_reg_read(pdata, INT_EN);
1534 		temp &= (~INT_EN_SW_INT_EN_);
1535 		smsc911x_reg_write(pdata, INT_EN, temp);
1536 		smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1537 		pdata->software_irq_signal = 1;
1538 		smp_wmb();
1539 		serviced = IRQ_HANDLED;
1540 	}
1541 
1542 	if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1543 		/* Called when there is a multicast update scheduled and
1544 		 * it is now safe to complete the update */
1545 		SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1546 		smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1547 		if (pdata->multicast_update_pending)
1548 			smsc911x_rx_multicast_update_workaround(pdata);
1549 		serviced = IRQ_HANDLED;
1550 	}
1551 
1552 	if (intsts & inten & INT_STS_TDFA_) {
1553 		temp = smsc911x_reg_read(pdata, FIFO_INT);
1554 		temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1555 		smsc911x_reg_write(pdata, FIFO_INT, temp);
1556 		smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1557 		netif_wake_queue(dev);
1558 		serviced = IRQ_HANDLED;
1559 	}
1560 
1561 	if (unlikely(intsts & inten & INT_STS_RXE_)) {
1562 		SMSC_TRACE(pdata, intr, "RX Error interrupt");
1563 		smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1564 		serviced = IRQ_HANDLED;
1565 	}
1566 
1567 	if (likely(intsts & inten & INT_STS_RSFL_)) {
1568 		if (likely(napi_schedule_prep(&pdata->napi))) {
1569 			/* Disable Rx interrupts */
1570 			temp = smsc911x_reg_read(pdata, INT_EN);
1571 			temp &= (~INT_EN_RSFL_EN_);
1572 			smsc911x_reg_write(pdata, INT_EN, temp);
1573 			/* Schedule a NAPI poll */
1574 			__napi_schedule(&pdata->napi);
1575 		} else {
1576 			SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1577 		}
1578 		serviced = IRQ_HANDLED;
1579 	}
1580 
1581 	return serviced;
1582 }
1583 
1584 static int smsc911x_open(struct net_device *dev)
1585 {
1586 	struct smsc911x_data *pdata = netdev_priv(dev);
1587 	unsigned int timeout;
1588 	unsigned int temp;
1589 	unsigned int intcfg;
1590 	int retval;
1591 	int irq_flags;
1592 
1593 	/* find and start the given phy */
1594 	if (!dev->phydev) {
1595 		retval = smsc911x_mii_probe(dev);
1596 		if (retval < 0) {
1597 			SMSC_WARN(pdata, probe, "Error starting phy");
1598 			goto out;
1599 		}
1600 	}
1601 
1602 	/* Reset the LAN911x */
1603 	retval = smsc911x_soft_reset(pdata);
1604 	if (retval) {
1605 		SMSC_WARN(pdata, hw, "soft reset failed");
1606 		goto mii_free_out;
1607 	}
1608 
1609 	smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1610 	smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1611 
1612 	/* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1613 	spin_lock_irq(&pdata->mac_lock);
1614 	smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1615 	spin_unlock_irq(&pdata->mac_lock);
1616 
1617 	/* Make sure EEPROM has finished loading before setting GPIO_CFG */
1618 	timeout = 50;
1619 	while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1620 	       --timeout) {
1621 		udelay(10);
1622 	}
1623 
1624 	if (unlikely(timeout == 0))
1625 		SMSC_WARN(pdata, ifup,
1626 			  "Timed out waiting for EEPROM busy bit to clear");
1627 
1628 	smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1629 
1630 	/* The soft reset above cleared the device's MAC address,
1631 	 * restore it from local copy (set in probe) */
1632 	spin_lock_irq(&pdata->mac_lock);
1633 	smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1634 	spin_unlock_irq(&pdata->mac_lock);
1635 
1636 	/* Initialise irqs, but leave all sources disabled */
1637 	smsc911x_disable_irq_chip(dev);
1638 
1639 	/* Set interrupt deassertion to 100uS */
1640 	intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1641 
1642 	if (pdata->config.irq_polarity) {
1643 		SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1644 		intcfg |= INT_CFG_IRQ_POL_;
1645 	} else {
1646 		SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1647 	}
1648 
1649 	if (pdata->config.irq_type) {
1650 		SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1651 		intcfg |= INT_CFG_IRQ_TYPE_;
1652 	} else {
1653 		SMSC_TRACE(pdata, ifup, "irq type: open drain");
1654 	}
1655 
1656 	smsc911x_reg_write(pdata, INT_CFG, intcfg);
1657 
1658 	SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1659 	pdata->software_irq_signal = 0;
1660 	smp_wmb();
1661 
1662 	irq_flags = irq_get_trigger_type(dev->irq);
1663 	retval = request_irq(dev->irq, smsc911x_irqhandler,
1664 			     irq_flags | IRQF_SHARED, dev->name, dev);
1665 	if (retval) {
1666 		SMSC_WARN(pdata, probe,
1667 			  "Unable to claim requested irq: %d", dev->irq);
1668 		goto mii_free_out;
1669 	}
1670 
1671 	temp = smsc911x_reg_read(pdata, INT_EN);
1672 	temp |= INT_EN_SW_INT_EN_;
1673 	smsc911x_reg_write(pdata, INT_EN, temp);
1674 
1675 	timeout = 1000;
1676 	while (timeout--) {
1677 		if (pdata->software_irq_signal)
1678 			break;
1679 		msleep(1);
1680 	}
1681 
1682 	if (!pdata->software_irq_signal) {
1683 		netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1684 			    dev->irq);
1685 		retval = -ENODEV;
1686 		goto irq_stop_out;
1687 	}
1688 	SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1689 		   dev->irq);
1690 
1691 	netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1692 		    (unsigned long)pdata->ioaddr, dev->irq);
1693 
1694 	/* Reset the last known duplex and carrier */
1695 	pdata->last_duplex = -1;
1696 	pdata->last_carrier = -1;
1697 
1698 	/* Bring the PHY up */
1699 	phy_start(dev->phydev);
1700 
1701 	temp = smsc911x_reg_read(pdata, HW_CFG);
1702 	/* Preserve TX FIFO size and external PHY configuration */
1703 	temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1704 	temp |= HW_CFG_SF_;
1705 	smsc911x_reg_write(pdata, HW_CFG, temp);
1706 
1707 	temp = smsc911x_reg_read(pdata, FIFO_INT);
1708 	temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1709 	temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1710 	smsc911x_reg_write(pdata, FIFO_INT, temp);
1711 
1712 	/* set RX Data offset to 2 bytes for alignment */
1713 	smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1714 
1715 	/* enable NAPI polling before enabling RX interrupts */
1716 	napi_enable(&pdata->napi);
1717 
1718 	temp = smsc911x_reg_read(pdata, INT_EN);
1719 	temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1720 	smsc911x_reg_write(pdata, INT_EN, temp);
1721 
1722 	spin_lock_irq(&pdata->mac_lock);
1723 	temp = smsc911x_mac_read(pdata, MAC_CR);
1724 	temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1725 	smsc911x_mac_write(pdata, MAC_CR, temp);
1726 	spin_unlock_irq(&pdata->mac_lock);
1727 
1728 	smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1729 
1730 	netif_start_queue(dev);
1731 	return 0;
1732 
1733 irq_stop_out:
1734 	free_irq(dev->irq, dev);
1735 mii_free_out:
1736 	phy_disconnect(dev->phydev);
1737 	dev->phydev = NULL;
1738 out:
1739 	return retval;
1740 }
1741 
1742 /* Entry point for stopping the interface */
1743 static int smsc911x_stop(struct net_device *dev)
1744 {
1745 	struct smsc911x_data *pdata = netdev_priv(dev);
1746 	unsigned int temp;
1747 
1748 	/* Disable all device interrupts */
1749 	temp = smsc911x_reg_read(pdata, INT_CFG);
1750 	temp &= ~INT_CFG_IRQ_EN_;
1751 	smsc911x_reg_write(pdata, INT_CFG, temp);
1752 
1753 	/* Stop Tx and Rx polling */
1754 	netif_stop_queue(dev);
1755 	napi_disable(&pdata->napi);
1756 
1757 	/* At this point all Rx and Tx activity is stopped */
1758 	dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1759 	smsc911x_tx_update_txcounters(dev);
1760 
1761 	free_irq(dev->irq, dev);
1762 
1763 	/* Bring the PHY down */
1764 	if (dev->phydev) {
1765 		phy_stop(dev->phydev);
1766 		phy_disconnect(dev->phydev);
1767 		dev->phydev = NULL;
1768 	}
1769 	netif_carrier_off(dev);
1770 
1771 	SMSC_TRACE(pdata, ifdown, "Interface stopped");
1772 	return 0;
1773 }
1774 
1775 /* Entry point for transmitting a packet */
1776 static netdev_tx_t
1777 smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1778 {
1779 	struct smsc911x_data *pdata = netdev_priv(dev);
1780 	unsigned int freespace;
1781 	unsigned int tx_cmd_a;
1782 	unsigned int tx_cmd_b;
1783 	unsigned int temp;
1784 	u32 wrsz;
1785 	ulong bufp;
1786 
1787 	freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1788 
1789 	if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1790 		SMSC_WARN(pdata, tx_err,
1791 			  "Tx data fifo low, space available: %d", freespace);
1792 
1793 	/* Word alignment adjustment */
1794 	tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1795 	tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1796 	tx_cmd_a |= (unsigned int)skb->len;
1797 
1798 	tx_cmd_b = ((unsigned int)skb->len) << 16;
1799 	tx_cmd_b |= (unsigned int)skb->len;
1800 
1801 	smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1802 	smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1803 
1804 	bufp = (ulong)skb->data & (~0x3);
1805 	wrsz = (u32)skb->len + 3;
1806 	wrsz += (u32)((ulong)skb->data & 0x3);
1807 	wrsz >>= 2;
1808 
1809 	pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1810 	freespace -= (skb->len + 32);
1811 	skb_tx_timestamp(skb);
1812 	dev_consume_skb_any(skb);
1813 
1814 	if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1815 		smsc911x_tx_update_txcounters(dev);
1816 
1817 	if (freespace < TX_FIFO_LOW_THRESHOLD) {
1818 		netif_stop_queue(dev);
1819 		temp = smsc911x_reg_read(pdata, FIFO_INT);
1820 		temp &= 0x00FFFFFF;
1821 		temp |= 0x32000000;
1822 		smsc911x_reg_write(pdata, FIFO_INT, temp);
1823 	}
1824 
1825 	return NETDEV_TX_OK;
1826 }
1827 
1828 /* Entry point for getting status counters */
1829 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1830 {
1831 	struct smsc911x_data *pdata = netdev_priv(dev);
1832 	smsc911x_tx_update_txcounters(dev);
1833 	dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1834 	return &dev->stats;
1835 }
1836 
1837 /* Entry point for setting addressing modes */
1838 static void smsc911x_set_multicast_list(struct net_device *dev)
1839 {
1840 	struct smsc911x_data *pdata = netdev_priv(dev);
1841 	unsigned long flags;
1842 
1843 	if (dev->flags & IFF_PROMISC) {
1844 		/* Enabling promiscuous mode */
1845 		pdata->set_bits_mask = MAC_CR_PRMS_;
1846 		pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1847 		pdata->hashhi = 0;
1848 		pdata->hashlo = 0;
1849 	} else if (dev->flags & IFF_ALLMULTI) {
1850 		/* Enabling all multicast mode */
1851 		pdata->set_bits_mask = MAC_CR_MCPAS_;
1852 		pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1853 		pdata->hashhi = 0;
1854 		pdata->hashlo = 0;
1855 	} else if (!netdev_mc_empty(dev)) {
1856 		/* Enabling specific multicast addresses */
1857 		unsigned int hash_high = 0;
1858 		unsigned int hash_low = 0;
1859 		struct netdev_hw_addr *ha;
1860 
1861 		pdata->set_bits_mask = MAC_CR_HPFILT_;
1862 		pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1863 
1864 		netdev_for_each_mc_addr(ha, dev) {
1865 			unsigned int bitnum = smsc911x_hash(ha->addr);
1866 			unsigned int mask = 0x01 << (bitnum & 0x1F);
1867 
1868 			if (bitnum & 0x20)
1869 				hash_high |= mask;
1870 			else
1871 				hash_low |= mask;
1872 		}
1873 
1874 		pdata->hashhi = hash_high;
1875 		pdata->hashlo = hash_low;
1876 	} else {
1877 		/* Enabling local MAC address only */
1878 		pdata->set_bits_mask = 0;
1879 		pdata->clear_bits_mask =
1880 		    (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1881 		pdata->hashhi = 0;
1882 		pdata->hashlo = 0;
1883 	}
1884 
1885 	spin_lock_irqsave(&pdata->mac_lock, flags);
1886 
1887 	if (pdata->generation <= 1) {
1888 		/* Older hardware revision - cannot change these flags while
1889 		 * receiving data */
1890 		if (!pdata->multicast_update_pending) {
1891 			unsigned int temp;
1892 			SMSC_TRACE(pdata, hw, "scheduling mcast update");
1893 			pdata->multicast_update_pending = 1;
1894 
1895 			/* Request the hardware to stop, then perform the
1896 			 * update when we get an RX_STOP interrupt */
1897 			temp = smsc911x_mac_read(pdata, MAC_CR);
1898 			temp &= ~(MAC_CR_RXEN_);
1899 			smsc911x_mac_write(pdata, MAC_CR, temp);
1900 		} else {
1901 			/* There is another update pending, this should now
1902 			 * use the newer values */
1903 		}
1904 	} else {
1905 		/* Newer hardware revision - can write immediately */
1906 		smsc911x_rx_multicast_update(pdata);
1907 	}
1908 
1909 	spin_unlock_irqrestore(&pdata->mac_lock, flags);
1910 }
1911 
1912 #ifdef CONFIG_NET_POLL_CONTROLLER
1913 static void smsc911x_poll_controller(struct net_device *dev)
1914 {
1915 	disable_irq(dev->irq);
1916 	smsc911x_irqhandler(0, dev);
1917 	enable_irq(dev->irq);
1918 }
1919 #endif				/* CONFIG_NET_POLL_CONTROLLER */
1920 
1921 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1922 {
1923 	struct smsc911x_data *pdata = netdev_priv(dev);
1924 	struct sockaddr *addr = p;
1925 
1926 	/* On older hardware revisions we cannot change the mac address
1927 	 * registers while receiving data.  Newer devices can safely change
1928 	 * this at any time. */
1929 	if (pdata->generation <= 1 && netif_running(dev))
1930 		return -EBUSY;
1931 
1932 	if (!is_valid_ether_addr(addr->sa_data))
1933 		return -EADDRNOTAVAIL;
1934 
1935 	memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1936 
1937 	spin_lock_irq(&pdata->mac_lock);
1938 	smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1939 	spin_unlock_irq(&pdata->mac_lock);
1940 
1941 	netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1942 
1943 	return 0;
1944 }
1945 
1946 /* Standard ioctls for mii-tool */
1947 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1948 {
1949 	if (!netif_running(dev) || !dev->phydev)
1950 		return -EINVAL;
1951 
1952 	return phy_mii_ioctl(dev->phydev, ifr, cmd);
1953 }
1954 
1955 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1956 					struct ethtool_drvinfo *info)
1957 {
1958 	strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1959 	strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1960 	strlcpy(info->bus_info, dev_name(dev->dev.parent),
1961 		sizeof(info->bus_info));
1962 }
1963 
1964 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1965 {
1966 	struct smsc911x_data *pdata = netdev_priv(dev);
1967 	return pdata->msg_enable;
1968 }
1969 
1970 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1971 {
1972 	struct smsc911x_data *pdata = netdev_priv(dev);
1973 	pdata->msg_enable = level;
1974 }
1975 
1976 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1977 {
1978 	return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1979 	    sizeof(u32);
1980 }
1981 
1982 static void
1983 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1984 			 void *buf)
1985 {
1986 	struct smsc911x_data *pdata = netdev_priv(dev);
1987 	struct phy_device *phy_dev = dev->phydev;
1988 	unsigned long flags;
1989 	unsigned int i;
1990 	unsigned int j = 0;
1991 	u32 *data = buf;
1992 
1993 	regs->version = pdata->idrev;
1994 	for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1995 		data[j++] = smsc911x_reg_read(pdata, i);
1996 
1997 	for (i = MAC_CR; i <= WUCSR; i++) {
1998 		spin_lock_irqsave(&pdata->mac_lock, flags);
1999 		data[j++] = smsc911x_mac_read(pdata, i);
2000 		spin_unlock_irqrestore(&pdata->mac_lock, flags);
2001 	}
2002 
2003 	for (i = 0; i <= 31; i++)
2004 		data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
2005 					      phy_dev->mdio.addr, i);
2006 }
2007 
2008 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2009 {
2010 	unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2011 	temp &= ~GPIO_CFG_EEPR_EN_;
2012 	smsc911x_reg_write(pdata, GPIO_CFG, temp);
2013 	msleep(1);
2014 }
2015 
2016 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2017 {
2018 	int timeout = 100;
2019 	u32 e2cmd;
2020 
2021 	SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2022 	if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2023 		SMSC_WARN(pdata, drv, "Busy at start");
2024 		return -EBUSY;
2025 	}
2026 
2027 	e2cmd = op | E2P_CMD_EPC_BUSY_;
2028 	smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2029 
2030 	do {
2031 		msleep(1);
2032 		e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2033 	} while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2034 
2035 	if (!timeout) {
2036 		SMSC_TRACE(pdata, drv, "TIMED OUT");
2037 		return -EAGAIN;
2038 	}
2039 
2040 	if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2041 		SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2042 		return -EINVAL;
2043 	}
2044 
2045 	return 0;
2046 }
2047 
2048 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2049 					 u8 address, u8 *data)
2050 {
2051 	u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2052 	int ret;
2053 
2054 	SMSC_TRACE(pdata, drv, "address 0x%x", address);
2055 	ret = smsc911x_eeprom_send_cmd(pdata, op);
2056 
2057 	if (!ret)
2058 		data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2059 
2060 	return ret;
2061 }
2062 
2063 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2064 					  u8 address, u8 data)
2065 {
2066 	u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2067 	u32 temp;
2068 	int ret;
2069 
2070 	SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2071 	ret = smsc911x_eeprom_send_cmd(pdata, op);
2072 
2073 	if (!ret) {
2074 		op = E2P_CMD_EPC_CMD_WRITE_ | address;
2075 		smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2076 
2077 		/* Workaround for hardware read-after-write restriction */
2078 		temp = smsc911x_reg_read(pdata, BYTE_TEST);
2079 
2080 		ret = smsc911x_eeprom_send_cmd(pdata, op);
2081 	}
2082 
2083 	return ret;
2084 }
2085 
2086 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2087 {
2088 	return SMSC911X_EEPROM_SIZE;
2089 }
2090 
2091 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2092 				       struct ethtool_eeprom *eeprom, u8 *data)
2093 {
2094 	struct smsc911x_data *pdata = netdev_priv(dev);
2095 	u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2096 	int len;
2097 	int i;
2098 
2099 	smsc911x_eeprom_enable_access(pdata);
2100 
2101 	len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2102 	for (i = 0; i < len; i++) {
2103 		int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2104 		if (ret < 0) {
2105 			eeprom->len = 0;
2106 			return ret;
2107 		}
2108 	}
2109 
2110 	memcpy(data, &eeprom_data[eeprom->offset], len);
2111 	eeprom->len = len;
2112 	return 0;
2113 }
2114 
2115 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2116 				       struct ethtool_eeprom *eeprom, u8 *data)
2117 {
2118 	int ret;
2119 	struct smsc911x_data *pdata = netdev_priv(dev);
2120 
2121 	smsc911x_eeprom_enable_access(pdata);
2122 	smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2123 	ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2124 	smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2125 
2126 	/* Single byte write, according to man page */
2127 	eeprom->len = 1;
2128 
2129 	return ret;
2130 }
2131 
2132 static const struct ethtool_ops smsc911x_ethtool_ops = {
2133 	.get_link = ethtool_op_get_link,
2134 	.get_drvinfo = smsc911x_ethtool_getdrvinfo,
2135 	.nway_reset = phy_ethtool_nway_reset,
2136 	.get_msglevel = smsc911x_ethtool_getmsglevel,
2137 	.set_msglevel = smsc911x_ethtool_setmsglevel,
2138 	.get_regs_len = smsc911x_ethtool_getregslen,
2139 	.get_regs = smsc911x_ethtool_getregs,
2140 	.get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2141 	.get_eeprom = smsc911x_ethtool_get_eeprom,
2142 	.set_eeprom = smsc911x_ethtool_set_eeprom,
2143 	.get_ts_info = ethtool_op_get_ts_info,
2144 	.get_link_ksettings = phy_ethtool_get_link_ksettings,
2145 	.set_link_ksettings = phy_ethtool_set_link_ksettings,
2146 };
2147 
2148 static const struct net_device_ops smsc911x_netdev_ops = {
2149 	.ndo_open		= smsc911x_open,
2150 	.ndo_stop		= smsc911x_stop,
2151 	.ndo_start_xmit		= smsc911x_hard_start_xmit,
2152 	.ndo_get_stats		= smsc911x_get_stats,
2153 	.ndo_set_rx_mode	= smsc911x_set_multicast_list,
2154 	.ndo_do_ioctl		= smsc911x_do_ioctl,
2155 	.ndo_validate_addr	= eth_validate_addr,
2156 	.ndo_set_mac_address 	= smsc911x_set_mac_address,
2157 #ifdef CONFIG_NET_POLL_CONTROLLER
2158 	.ndo_poll_controller	= smsc911x_poll_controller,
2159 #endif
2160 };
2161 
2162 /* copies the current mac address from hardware to dev->dev_addr */
2163 static void smsc911x_read_mac_address(struct net_device *dev)
2164 {
2165 	struct smsc911x_data *pdata = netdev_priv(dev);
2166 	u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2167 	u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2168 
2169 	dev->dev_addr[0] = (u8)(mac_low32);
2170 	dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2171 	dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2172 	dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2173 	dev->dev_addr[4] = (u8)(mac_high16);
2174 	dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2175 }
2176 
2177 /* Initializing private device structures, only called from probe */
2178 static int smsc911x_init(struct net_device *dev)
2179 {
2180 	struct smsc911x_data *pdata = netdev_priv(dev);
2181 	unsigned int byte_test, mask;
2182 	unsigned int to = 100;
2183 
2184 	SMSC_TRACE(pdata, probe, "Driver Parameters:");
2185 	SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2186 		   (unsigned long)pdata->ioaddr);
2187 	SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2188 	SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2189 
2190 	spin_lock_init(&pdata->dev_lock);
2191 	spin_lock_init(&pdata->mac_lock);
2192 
2193 	if (pdata->ioaddr == NULL) {
2194 		SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2195 		return -ENODEV;
2196 	}
2197 
2198 	/*
2199 	 * poll the READY bit in PMT_CTRL. Any other access to the device is
2200 	 * forbidden while this bit isn't set. Try for 100ms
2201 	 *
2202 	 * Note that this test is done before the WORD_SWAP register is
2203 	 * programmed. So in some configurations the READY bit is at 16 before
2204 	 * WORD_SWAP is written to. This issue is worked around by waiting
2205 	 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2206 	 *
2207 	 * SMSC has confirmed that checking bit 16 (marked as reserved in
2208 	 * the datasheet) is fine since these bits "will either never be set
2209 	 * or can only go high after READY does (so also indicate the device
2210 	 * is ready)".
2211 	 */
2212 
2213 	mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2214 	while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2215 		udelay(1000);
2216 
2217 	if (to == 0) {
2218 		netdev_err(dev, "Device not READY in 100ms aborting\n");
2219 		return -ENODEV;
2220 	}
2221 
2222 	/* Check byte ordering */
2223 	byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2224 	SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2225 	if (byte_test == 0x43218765) {
2226 		SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2227 			   "applying WORD_SWAP");
2228 		smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2229 
2230 		/* 1 dummy read of BYTE_TEST is needed after a write to
2231 		 * WORD_SWAP before its contents are valid */
2232 		byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2233 
2234 		byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2235 	}
2236 
2237 	if (byte_test != 0x87654321) {
2238 		SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2239 		if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2240 			SMSC_WARN(pdata, probe,
2241 				  "top 16 bits equal to bottom 16 bits");
2242 			SMSC_TRACE(pdata, probe,
2243 				   "This may mean the chip is set "
2244 				   "for 32 bit while the bus is reading 16 bit");
2245 		}
2246 		return -ENODEV;
2247 	}
2248 
2249 	/* Default generation to zero (all workarounds apply) */
2250 	pdata->generation = 0;
2251 
2252 	pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2253 	switch (pdata->idrev & 0xFFFF0000) {
2254 	case LAN9118:
2255 	case LAN9117:
2256 	case LAN9116:
2257 	case LAN9115:
2258 	case LAN89218:
2259 		/* LAN911[5678] family */
2260 		pdata->generation = pdata->idrev & 0x0000FFFF;
2261 		break;
2262 
2263 	case LAN9218:
2264 	case LAN9217:
2265 	case LAN9216:
2266 	case LAN9215:
2267 		/* LAN921[5678] family */
2268 		pdata->generation = 3;
2269 		break;
2270 
2271 	case LAN9210:
2272 	case LAN9211:
2273 	case LAN9220:
2274 	case LAN9221:
2275 	case LAN9250:
2276 		/* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
2277 		pdata->generation = 4;
2278 		break;
2279 
2280 	default:
2281 		SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2282 			  pdata->idrev);
2283 		return -ENODEV;
2284 	}
2285 
2286 	SMSC_TRACE(pdata, probe,
2287 		   "LAN911x identified, idrev: 0x%08X, generation: %d",
2288 		   pdata->idrev, pdata->generation);
2289 
2290 	if (pdata->generation == 0)
2291 		SMSC_WARN(pdata, probe,
2292 			  "This driver is not intended for this chip revision");
2293 
2294 	/* workaround for platforms without an eeprom, where the mac address
2295 	 * is stored elsewhere and set by the bootloader.  This saves the
2296 	 * mac address before resetting the device */
2297 	if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2298 		spin_lock_irq(&pdata->mac_lock);
2299 		smsc911x_read_mac_address(dev);
2300 		spin_unlock_irq(&pdata->mac_lock);
2301 	}
2302 
2303 	/* Reset the LAN911x */
2304 	if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2305 		return -ENODEV;
2306 
2307 	dev->flags |= IFF_MULTICAST;
2308 	netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2309 	dev->netdev_ops = &smsc911x_netdev_ops;
2310 	dev->ethtool_ops = &smsc911x_ethtool_ops;
2311 
2312 	return 0;
2313 }
2314 
2315 static int smsc911x_drv_remove(struct platform_device *pdev)
2316 {
2317 	struct net_device *dev;
2318 	struct smsc911x_data *pdata;
2319 	struct resource *res;
2320 
2321 	dev = platform_get_drvdata(pdev);
2322 	BUG_ON(!dev);
2323 	pdata = netdev_priv(dev);
2324 	BUG_ON(!pdata);
2325 	BUG_ON(!pdata->ioaddr);
2326 
2327 	SMSC_TRACE(pdata, ifdown, "Stopping driver");
2328 
2329 	unregister_netdev(dev);
2330 
2331 	mdiobus_unregister(pdata->mii_bus);
2332 	mdiobus_free(pdata->mii_bus);
2333 
2334 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2335 					   "smsc911x-memory");
2336 	if (!res)
2337 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2338 
2339 	release_mem_region(res->start, resource_size(res));
2340 
2341 	iounmap(pdata->ioaddr);
2342 
2343 	(void)smsc911x_disable_resources(pdev);
2344 	smsc911x_free_resources(pdev);
2345 
2346 	free_netdev(dev);
2347 
2348 	pm_runtime_put(&pdev->dev);
2349 	pm_runtime_disable(&pdev->dev);
2350 
2351 	return 0;
2352 }
2353 
2354 /* standard register acces */
2355 static const struct smsc911x_ops standard_smsc911x_ops = {
2356 	.reg_read = __smsc911x_reg_read,
2357 	.reg_write = __smsc911x_reg_write,
2358 	.rx_readfifo = smsc911x_rx_readfifo,
2359 	.tx_writefifo = smsc911x_tx_writefifo,
2360 };
2361 
2362 /* shifted register access */
2363 static const struct smsc911x_ops shifted_smsc911x_ops = {
2364 	.reg_read = __smsc911x_reg_read_shift,
2365 	.reg_write = __smsc911x_reg_write_shift,
2366 	.rx_readfifo = smsc911x_rx_readfifo_shift,
2367 	.tx_writefifo = smsc911x_tx_writefifo_shift,
2368 };
2369 
2370 static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2371 				 struct device *dev)
2372 {
2373 	int phy_interface;
2374 	u32 width = 0;
2375 	int err;
2376 
2377 	phy_interface = device_get_phy_mode(dev);
2378 	if (phy_interface < 0)
2379 		phy_interface = PHY_INTERFACE_MODE_NA;
2380 	config->phy_interface = phy_interface;
2381 
2382 	device_get_mac_address(dev, config->mac, ETH_ALEN);
2383 
2384 	err = device_property_read_u32(dev, "reg-io-width", &width);
2385 	if (err == -ENXIO)
2386 		return err;
2387 	if (!err && width == 4)
2388 		config->flags |= SMSC911X_USE_32BIT;
2389 	else
2390 		config->flags |= SMSC911X_USE_16BIT;
2391 
2392 	device_property_read_u32(dev, "reg-shift", &config->shift);
2393 
2394 	if (device_property_present(dev, "smsc,irq-active-high"))
2395 		config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2396 
2397 	if (device_property_present(dev, "smsc,irq-push-pull"))
2398 		config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2399 
2400 	if (device_property_present(dev, "smsc,force-internal-phy"))
2401 		config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2402 
2403 	if (device_property_present(dev, "smsc,force-external-phy"))
2404 		config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2405 
2406 	if (device_property_present(dev, "smsc,save-mac-address"))
2407 		config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2408 
2409 	return 0;
2410 }
2411 
2412 static int smsc911x_drv_probe(struct platform_device *pdev)
2413 {
2414 	struct net_device *dev;
2415 	struct smsc911x_data *pdata;
2416 	struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2417 	struct resource *res;
2418 	int res_size, irq;
2419 	int retval;
2420 
2421 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2422 					   "smsc911x-memory");
2423 	if (!res)
2424 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2425 	if (!res) {
2426 		pr_warn("Could not allocate resource\n");
2427 		retval = -ENODEV;
2428 		goto out_0;
2429 	}
2430 	res_size = resource_size(res);
2431 
2432 	irq = platform_get_irq(pdev, 0);
2433 	if (irq == -EPROBE_DEFER) {
2434 		retval = -EPROBE_DEFER;
2435 		goto out_0;
2436 	} else if (irq <= 0) {
2437 		pr_warn("Could not allocate irq resource\n");
2438 		retval = -ENODEV;
2439 		goto out_0;
2440 	}
2441 
2442 	if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2443 		retval = -EBUSY;
2444 		goto out_0;
2445 	}
2446 
2447 	dev = alloc_etherdev(sizeof(struct smsc911x_data));
2448 	if (!dev) {
2449 		retval = -ENOMEM;
2450 		goto out_release_io_1;
2451 	}
2452 
2453 	SET_NETDEV_DEV(dev, &pdev->dev);
2454 
2455 	pdata = netdev_priv(dev);
2456 	dev->irq = irq;
2457 	pdata->ioaddr = ioremap_nocache(res->start, res_size);
2458 	if (!pdata->ioaddr) {
2459 		retval = -ENOMEM;
2460 		goto out_ioremap_fail;
2461 	}
2462 
2463 	pdata->dev = dev;
2464 	pdata->msg_enable = ((1 << debug) - 1);
2465 
2466 	platform_set_drvdata(pdev, dev);
2467 
2468 	retval = smsc911x_request_resources(pdev);
2469 	if (retval)
2470 		goto out_request_resources_fail;
2471 
2472 	retval = smsc911x_enable_resources(pdev);
2473 	if (retval)
2474 		goto out_enable_resources_fail;
2475 
2476 	if (pdata->ioaddr == NULL) {
2477 		SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2478 		retval = -ENOMEM;
2479 		goto out_disable_resources;
2480 	}
2481 
2482 	retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2483 	if (retval && config) {
2484 		/* copy config parameters across to pdata */
2485 		memcpy(&pdata->config, config, sizeof(pdata->config));
2486 		retval = 0;
2487 	}
2488 
2489 	if (retval) {
2490 		SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2491 		goto out_disable_resources;
2492 	}
2493 
2494 	/* assume standard, non-shifted, access to HW registers */
2495 	pdata->ops = &standard_smsc911x_ops;
2496 	/* apply the right access if shifting is needed */
2497 	if (pdata->config.shift)
2498 		pdata->ops = &shifted_smsc911x_ops;
2499 
2500 	pm_runtime_enable(&pdev->dev);
2501 	pm_runtime_get_sync(&pdev->dev);
2502 
2503 	retval = smsc911x_init(dev);
2504 	if (retval < 0)
2505 		goto out_disable_resources;
2506 
2507 	netif_carrier_off(dev);
2508 
2509 	retval = smsc911x_mii_init(pdev, dev);
2510 	if (retval) {
2511 		SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2512 		goto out_disable_resources;
2513 	}
2514 
2515 	retval = register_netdev(dev);
2516 	if (retval) {
2517 		SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2518 		goto out_disable_resources;
2519 	} else {
2520 		SMSC_TRACE(pdata, probe,
2521 			   "Network interface: \"%s\"", dev->name);
2522 	}
2523 
2524 	spin_lock_irq(&pdata->mac_lock);
2525 
2526 	/* Check if mac address has been specified when bringing interface up */
2527 	if (is_valid_ether_addr(dev->dev_addr)) {
2528 		smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2529 		SMSC_TRACE(pdata, probe,
2530 			   "MAC Address is specified by configuration");
2531 	} else if (is_valid_ether_addr(pdata->config.mac)) {
2532 		memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2533 		SMSC_TRACE(pdata, probe,
2534 			   "MAC Address specified by platform data");
2535 	} else {
2536 		/* Try reading mac address from device. if EEPROM is present
2537 		 * it will already have been set */
2538 		smsc_get_mac(dev);
2539 
2540 		if (is_valid_ether_addr(dev->dev_addr)) {
2541 			/* eeprom values are valid  so use them */
2542 			SMSC_TRACE(pdata, probe,
2543 				   "Mac Address is read from LAN911x EEPROM");
2544 		} else {
2545 			/* eeprom values are invalid, generate random MAC */
2546 			eth_hw_addr_random(dev);
2547 			smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2548 			SMSC_TRACE(pdata, probe,
2549 				   "MAC Address is set to eth_random_addr");
2550 		}
2551 	}
2552 
2553 	spin_unlock_irq(&pdata->mac_lock);
2554 
2555 	netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2556 
2557 	return 0;
2558 
2559 out_disable_resources:
2560 	pm_runtime_put(&pdev->dev);
2561 	pm_runtime_disable(&pdev->dev);
2562 	(void)smsc911x_disable_resources(pdev);
2563 out_enable_resources_fail:
2564 	smsc911x_free_resources(pdev);
2565 out_request_resources_fail:
2566 	iounmap(pdata->ioaddr);
2567 out_ioremap_fail:
2568 	free_netdev(dev);
2569 out_release_io_1:
2570 	release_mem_region(res->start, resource_size(res));
2571 out_0:
2572 	return retval;
2573 }
2574 
2575 #ifdef CONFIG_PM
2576 /* This implementation assumes the devices remains powered on its VDDVARIO
2577  * pins during suspend. */
2578 
2579 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2580 
2581 static int smsc911x_suspend(struct device *dev)
2582 {
2583 	struct net_device *ndev = dev_get_drvdata(dev);
2584 	struct smsc911x_data *pdata = netdev_priv(ndev);
2585 
2586 	if (netif_running(ndev)) {
2587 		netif_stop_queue(ndev);
2588 		netif_device_detach(ndev);
2589 	}
2590 
2591 	/* enable wake on LAN, energy detection and the external PME
2592 	 * signal. */
2593 	smsc911x_reg_write(pdata, PMT_CTRL,
2594 		PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2595 		PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2596 
2597 	pm_runtime_disable(dev);
2598 	pm_runtime_set_suspended(dev);
2599 
2600 	return 0;
2601 }
2602 
2603 static int smsc911x_resume(struct device *dev)
2604 {
2605 	struct net_device *ndev = dev_get_drvdata(dev);
2606 	struct smsc911x_data *pdata = netdev_priv(ndev);
2607 	unsigned int to = 100;
2608 
2609 	pm_runtime_enable(dev);
2610 	pm_runtime_resume(dev);
2611 
2612 	/* Note 3.11 from the datasheet:
2613 	 * 	"When the LAN9220 is in a power saving state, a write of any
2614 	 * 	 data to the BYTE_TEST register will wake-up the device."
2615 	 */
2616 	smsc911x_reg_write(pdata, BYTE_TEST, 0);
2617 
2618 	/* poll the READY bit in PMT_CTRL. Any other access to the device is
2619 	 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2620 	 * if it failed. */
2621 	while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2622 		udelay(1000);
2623 
2624 	if (to == 0)
2625 		return -EIO;
2626 
2627 	if (netif_running(ndev)) {
2628 		netif_device_attach(ndev);
2629 		netif_start_queue(ndev);
2630 	}
2631 
2632 	return 0;
2633 }
2634 
2635 static const struct dev_pm_ops smsc911x_pm_ops = {
2636 	.suspend	= smsc911x_suspend,
2637 	.resume		= smsc911x_resume,
2638 };
2639 
2640 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2641 
2642 #else
2643 #define SMSC911X_PM_OPS NULL
2644 #endif
2645 
2646 #ifdef CONFIG_OF
2647 static const struct of_device_id smsc911x_dt_ids[] = {
2648 	{ .compatible = "smsc,lan9115", },
2649 	{ /* sentinel */ }
2650 };
2651 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2652 #endif
2653 
2654 static const struct acpi_device_id smsc911x_acpi_match[] = {
2655 	{ "ARMH9118", 0 },
2656 	{ }
2657 };
2658 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2659 
2660 static struct platform_driver smsc911x_driver = {
2661 	.probe = smsc911x_drv_probe,
2662 	.remove = smsc911x_drv_remove,
2663 	.driver = {
2664 		.name	= SMSC_CHIPNAME,
2665 		.pm	= SMSC911X_PM_OPS,
2666 		.of_match_table = of_match_ptr(smsc911x_dt_ids),
2667 		.acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2668 	},
2669 };
2670 
2671 /* Entry point for loading the module */
2672 static int __init smsc911x_init_module(void)
2673 {
2674 	SMSC_INITIALIZE();
2675 	return platform_driver_register(&smsc911x_driver);
2676 }
2677 
2678 /* entry point for unloading the module */
2679 static void __exit smsc911x_cleanup_module(void)
2680 {
2681 	platform_driver_unregister(&smsc911x_driver);
2682 }
2683 
2684 module_init(smsc911x_init_module);
2685 module_exit(smsc911x_cleanup_module);
2686