1 /*************************************************************************** 2 * 3 * Copyright (C) 2004-2008 SMSC 4 * Copyright (C) 2005-2008 ARM 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 *************************************************************************** 20 * Rewritten, heavily based on smsc911x simple driver by SMSC. 21 * Partly uses io macros from smc91x.c by Nicolas Pitre 22 * 23 * Supported devices: 24 * LAN9115, LAN9116, LAN9117, LAN9118 25 * LAN9215, LAN9216, LAN9217, LAN9218 26 * LAN9210, LAN9211 27 * LAN9220, LAN9221 28 * LAN89218 29 * 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/crc32.h> 35 #include <linux/clk.h> 36 #include <linux/delay.h> 37 #include <linux/errno.h> 38 #include <linux/etherdevice.h> 39 #include <linux/ethtool.h> 40 #include <linux/init.h> 41 #include <linux/interrupt.h> 42 #include <linux/ioport.h> 43 #include <linux/kernel.h> 44 #include <linux/module.h> 45 #include <linux/netdevice.h> 46 #include <linux/platform_device.h> 47 #include <linux/regulator/consumer.h> 48 #include <linux/sched.h> 49 #include <linux/timer.h> 50 #include <linux/bug.h> 51 #include <linux/bitops.h> 52 #include <linux/irq.h> 53 #include <linux/io.h> 54 #include <linux/swab.h> 55 #include <linux/phy.h> 56 #include <linux/smsc911x.h> 57 #include <linux/device.h> 58 #include <linux/of.h> 59 #include <linux/of_device.h> 60 #include <linux/of_gpio.h> 61 #include <linux/of_net.h> 62 #include "smsc911x.h" 63 64 #define SMSC_CHIPNAME "smsc911x" 65 #define SMSC_MDIONAME "smsc911x-mdio" 66 #define SMSC_DRV_VERSION "2008-10-21" 67 68 MODULE_LICENSE("GPL"); 69 MODULE_VERSION(SMSC_DRV_VERSION); 70 MODULE_ALIAS("platform:smsc911x"); 71 72 #if USE_DEBUG > 0 73 static int debug = 16; 74 #else 75 static int debug = 3; 76 #endif 77 78 module_param(debug, int, 0); 79 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 80 81 struct smsc911x_data; 82 83 struct smsc911x_ops { 84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); 85 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val); 86 void (*rx_readfifo)(struct smsc911x_data *pdata, 87 unsigned int *buf, unsigned int wordcount); 88 void (*tx_writefifo)(struct smsc911x_data *pdata, 89 unsigned int *buf, unsigned int wordcount); 90 }; 91 92 #define SMSC911X_NUM_SUPPLIES 2 93 94 struct smsc911x_data { 95 void __iomem *ioaddr; 96 97 unsigned int idrev; 98 99 /* used to decide which workarounds apply */ 100 unsigned int generation; 101 102 /* device configuration (copied from platform_data during probe) */ 103 struct smsc911x_platform_config config; 104 105 /* This needs to be acquired before calling any of below: 106 * smsc911x_mac_read(), smsc911x_mac_write() 107 */ 108 spinlock_t mac_lock; 109 110 /* spinlock to ensure register accesses are serialised */ 111 spinlock_t dev_lock; 112 113 struct phy_device *phy_dev; 114 struct mii_bus *mii_bus; 115 int phy_irq[PHY_MAX_ADDR]; 116 unsigned int using_extphy; 117 int last_duplex; 118 int last_carrier; 119 120 u32 msg_enable; 121 unsigned int gpio_setting; 122 unsigned int gpio_orig_setting; 123 struct net_device *dev; 124 struct napi_struct napi; 125 126 unsigned int software_irq_signal; 127 128 #ifdef USE_PHY_WORK_AROUND 129 #define MIN_PACKET_SIZE (64) 130 char loopback_tx_pkt[MIN_PACKET_SIZE]; 131 char loopback_rx_pkt[MIN_PACKET_SIZE]; 132 unsigned int resetcount; 133 #endif 134 135 /* Members for Multicast filter workaround */ 136 unsigned int multicast_update_pending; 137 unsigned int set_bits_mask; 138 unsigned int clear_bits_mask; 139 unsigned int hashhi; 140 unsigned int hashlo; 141 142 /* register access functions */ 143 const struct smsc911x_ops *ops; 144 145 /* regulators */ 146 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES]; 147 148 /* clock */ 149 struct clk *clk; 150 }; 151 152 /* Easy access to information */ 153 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift)) 154 155 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 156 { 157 if (pdata->config.flags & SMSC911X_USE_32BIT) 158 return readl(pdata->ioaddr + reg); 159 160 if (pdata->config.flags & SMSC911X_USE_16BIT) 161 return ((readw(pdata->ioaddr + reg) & 0xFFFF) | 162 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16)); 163 164 BUG(); 165 return 0; 166 } 167 168 static inline u32 169 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg) 170 { 171 if (pdata->config.flags & SMSC911X_USE_32BIT) 172 return readl(pdata->ioaddr + __smsc_shift(pdata, reg)); 173 174 if (pdata->config.flags & SMSC911X_USE_16BIT) 175 return (readw(pdata->ioaddr + 176 __smsc_shift(pdata, reg)) & 0xFFFF) | 177 ((readw(pdata->ioaddr + 178 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16); 179 180 BUG(); 181 return 0; 182 } 183 184 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg) 185 { 186 u32 data; 187 unsigned long flags; 188 189 spin_lock_irqsave(&pdata->dev_lock, flags); 190 data = pdata->ops->reg_read(pdata, reg); 191 spin_unlock_irqrestore(&pdata->dev_lock, flags); 192 193 return data; 194 } 195 196 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 197 u32 val) 198 { 199 if (pdata->config.flags & SMSC911X_USE_32BIT) { 200 writel(val, pdata->ioaddr + reg); 201 return; 202 } 203 204 if (pdata->config.flags & SMSC911X_USE_16BIT) { 205 writew(val & 0xFFFF, pdata->ioaddr + reg); 206 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2); 207 return; 208 } 209 210 BUG(); 211 } 212 213 static inline void 214 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val) 215 { 216 if (pdata->config.flags & SMSC911X_USE_32BIT) { 217 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg)); 218 return; 219 } 220 221 if (pdata->config.flags & SMSC911X_USE_16BIT) { 222 writew(val & 0xFFFF, 223 pdata->ioaddr + __smsc_shift(pdata, reg)); 224 writew((val >> 16) & 0xFFFF, 225 pdata->ioaddr + __smsc_shift(pdata, reg + 2)); 226 return; 227 } 228 229 BUG(); 230 } 231 232 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg, 233 u32 val) 234 { 235 unsigned long flags; 236 237 spin_lock_irqsave(&pdata->dev_lock, flags); 238 pdata->ops->reg_write(pdata, reg, val); 239 spin_unlock_irqrestore(&pdata->dev_lock, flags); 240 } 241 242 /* Writes a packet to the TX_DATA_FIFO */ 243 static inline void 244 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf, 245 unsigned int wordcount) 246 { 247 unsigned long flags; 248 249 spin_lock_irqsave(&pdata->dev_lock, flags); 250 251 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 252 while (wordcount--) 253 __smsc911x_reg_write(pdata, TX_DATA_FIFO, 254 swab32(*buf++)); 255 goto out; 256 } 257 258 if (pdata->config.flags & SMSC911X_USE_32BIT) { 259 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount); 260 goto out; 261 } 262 263 if (pdata->config.flags & SMSC911X_USE_16BIT) { 264 while (wordcount--) 265 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++); 266 goto out; 267 } 268 269 BUG(); 270 out: 271 spin_unlock_irqrestore(&pdata->dev_lock, flags); 272 } 273 274 /* Writes a packet to the TX_DATA_FIFO - shifted version */ 275 static inline void 276 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 277 unsigned int wordcount) 278 { 279 unsigned long flags; 280 281 spin_lock_irqsave(&pdata->dev_lock, flags); 282 283 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 284 while (wordcount--) 285 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO, 286 swab32(*buf++)); 287 goto out; 288 } 289 290 if (pdata->config.flags & SMSC911X_USE_32BIT) { 291 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata, 292 TX_DATA_FIFO), buf, wordcount); 293 goto out; 294 } 295 296 if (pdata->config.flags & SMSC911X_USE_16BIT) { 297 while (wordcount--) 298 __smsc911x_reg_write_shift(pdata, 299 TX_DATA_FIFO, *buf++); 300 goto out; 301 } 302 303 BUG(); 304 out: 305 spin_unlock_irqrestore(&pdata->dev_lock, flags); 306 } 307 308 /* Reads a packet out of the RX_DATA_FIFO */ 309 static inline void 310 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf, 311 unsigned int wordcount) 312 { 313 unsigned long flags; 314 315 spin_lock_irqsave(&pdata->dev_lock, flags); 316 317 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 318 while (wordcount--) 319 *buf++ = swab32(__smsc911x_reg_read(pdata, 320 RX_DATA_FIFO)); 321 goto out; 322 } 323 324 if (pdata->config.flags & SMSC911X_USE_32BIT) { 325 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount); 326 goto out; 327 } 328 329 if (pdata->config.flags & SMSC911X_USE_16BIT) { 330 while (wordcount--) 331 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO); 332 goto out; 333 } 334 335 BUG(); 336 out: 337 spin_unlock_irqrestore(&pdata->dev_lock, flags); 338 } 339 340 /* Reads a packet out of the RX_DATA_FIFO - shifted version */ 341 static inline void 342 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf, 343 unsigned int wordcount) 344 { 345 unsigned long flags; 346 347 spin_lock_irqsave(&pdata->dev_lock, flags); 348 349 if (pdata->config.flags & SMSC911X_SWAP_FIFO) { 350 while (wordcount--) 351 *buf++ = swab32(__smsc911x_reg_read_shift(pdata, 352 RX_DATA_FIFO)); 353 goto out; 354 } 355 356 if (pdata->config.flags & SMSC911X_USE_32BIT) { 357 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata, 358 RX_DATA_FIFO), buf, wordcount); 359 goto out; 360 } 361 362 if (pdata->config.flags & SMSC911X_USE_16BIT) { 363 while (wordcount--) 364 *buf++ = __smsc911x_reg_read_shift(pdata, 365 RX_DATA_FIFO); 366 goto out; 367 } 368 369 BUG(); 370 out: 371 spin_unlock_irqrestore(&pdata->dev_lock, flags); 372 } 373 374 /* 375 * enable regulator and clock resources. 376 */ 377 static int smsc911x_enable_resources(struct platform_device *pdev) 378 { 379 struct net_device *ndev = platform_get_drvdata(pdev); 380 struct smsc911x_data *pdata = netdev_priv(ndev); 381 int ret = 0; 382 383 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies), 384 pdata->supplies); 385 if (ret) 386 netdev_err(ndev, "failed to enable regulators %d\n", 387 ret); 388 389 if (!IS_ERR(pdata->clk)) { 390 ret = clk_prepare_enable(pdata->clk); 391 if (ret < 0) 392 netdev_err(ndev, "failed to enable clock %d\n", ret); 393 } 394 395 return ret; 396 } 397 398 /* 399 * disable resources, currently just regulators. 400 */ 401 static int smsc911x_disable_resources(struct platform_device *pdev) 402 { 403 struct net_device *ndev = platform_get_drvdata(pdev); 404 struct smsc911x_data *pdata = netdev_priv(ndev); 405 int ret = 0; 406 407 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies), 408 pdata->supplies); 409 410 if (!IS_ERR(pdata->clk)) 411 clk_disable_unprepare(pdata->clk); 412 413 return ret; 414 } 415 416 /* 417 * Request resources, currently just regulators. 418 * 419 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where 420 * these are not always-on we need to request regulators to be turned on 421 * before we can try to access the device registers. 422 */ 423 static int smsc911x_request_resources(struct platform_device *pdev) 424 { 425 struct net_device *ndev = platform_get_drvdata(pdev); 426 struct smsc911x_data *pdata = netdev_priv(ndev); 427 int ret = 0; 428 429 /* Request regulators */ 430 pdata->supplies[0].supply = "vdd33a"; 431 pdata->supplies[1].supply = "vddvario"; 432 ret = regulator_bulk_get(&pdev->dev, 433 ARRAY_SIZE(pdata->supplies), 434 pdata->supplies); 435 if (ret) 436 netdev_err(ndev, "couldn't get regulators %d\n", 437 ret); 438 439 /* Request clock */ 440 pdata->clk = clk_get(&pdev->dev, NULL); 441 if (IS_ERR(pdata->clk)) 442 dev_dbg(&pdev->dev, "couldn't get clock %li\n", 443 PTR_ERR(pdata->clk)); 444 445 return ret; 446 } 447 448 /* 449 * Free resources, currently just regulators. 450 * 451 */ 452 static void smsc911x_free_resources(struct platform_device *pdev) 453 { 454 struct net_device *ndev = platform_get_drvdata(pdev); 455 struct smsc911x_data *pdata = netdev_priv(ndev); 456 457 /* Free regulators */ 458 regulator_bulk_free(ARRAY_SIZE(pdata->supplies), 459 pdata->supplies); 460 461 /* Free clock */ 462 if (!IS_ERR(pdata->clk)) { 463 clk_put(pdata->clk); 464 pdata->clk = NULL; 465 } 466 } 467 468 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read 469 * and smsc911x_mac_write, so assumes mac_lock is held */ 470 static int smsc911x_mac_complete(struct smsc911x_data *pdata) 471 { 472 int i; 473 u32 val; 474 475 SMSC_ASSERT_MAC_LOCK(pdata); 476 477 for (i = 0; i < 40; i++) { 478 val = smsc911x_reg_read(pdata, MAC_CSR_CMD); 479 if (!(val & MAC_CSR_CMD_CSR_BUSY_)) 480 return 0; 481 } 482 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. " 483 "MAC_CSR_CMD: 0x%08X", val); 484 return -EIO; 485 } 486 487 /* Fetches a MAC register value. Assumes mac_lock is acquired */ 488 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset) 489 { 490 unsigned int temp; 491 492 SMSC_ASSERT_MAC_LOCK(pdata); 493 494 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 495 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 496 SMSC_WARN(pdata, hw, "MAC busy at entry"); 497 return 0xFFFFFFFF; 498 } 499 500 /* Send the MAC cmd */ 501 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 502 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_)); 503 504 /* Workaround for hardware read-after-write restriction */ 505 temp = smsc911x_reg_read(pdata, BYTE_TEST); 506 507 /* Wait for the read to complete */ 508 if (likely(smsc911x_mac_complete(pdata) == 0)) 509 return smsc911x_reg_read(pdata, MAC_CSR_DATA); 510 511 SMSC_WARN(pdata, hw, "MAC busy after read"); 512 return 0xFFFFFFFF; 513 } 514 515 /* Set a mac register, mac_lock must be acquired before calling */ 516 static void smsc911x_mac_write(struct smsc911x_data *pdata, 517 unsigned int offset, u32 val) 518 { 519 unsigned int temp; 520 521 SMSC_ASSERT_MAC_LOCK(pdata); 522 523 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD); 524 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) { 525 SMSC_WARN(pdata, hw, 526 "smsc911x_mac_write failed, MAC busy at entry"); 527 return; 528 } 529 530 /* Send data to write */ 531 smsc911x_reg_write(pdata, MAC_CSR_DATA, val); 532 533 /* Write the actual data */ 534 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) | 535 MAC_CSR_CMD_CSR_BUSY_)); 536 537 /* Workaround for hardware read-after-write restriction */ 538 temp = smsc911x_reg_read(pdata, BYTE_TEST); 539 540 /* Wait for the write to complete */ 541 if (likely(smsc911x_mac_complete(pdata) == 0)) 542 return; 543 544 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write"); 545 } 546 547 /* Get a phy register */ 548 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) 549 { 550 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 551 unsigned long flags; 552 unsigned int addr; 553 int i, reg; 554 555 spin_lock_irqsave(&pdata->mac_lock, flags); 556 557 /* Confirm MII not busy */ 558 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 559 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???"); 560 reg = -EIO; 561 goto out; 562 } 563 564 /* Set the address, index & direction (read from PHY) */ 565 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6); 566 smsc911x_mac_write(pdata, MII_ACC, addr); 567 568 /* Wait for read to complete w/ timeout */ 569 for (i = 0; i < 100; i++) 570 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 571 reg = smsc911x_mac_read(pdata, MII_DATA); 572 goto out; 573 } 574 575 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish"); 576 reg = -EIO; 577 578 out: 579 spin_unlock_irqrestore(&pdata->mac_lock, flags); 580 return reg; 581 } 582 583 /* Set a phy register */ 584 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, 585 u16 val) 586 { 587 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv; 588 unsigned long flags; 589 unsigned int addr; 590 int i, reg; 591 592 spin_lock_irqsave(&pdata->mac_lock, flags); 593 594 /* Confirm MII not busy */ 595 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 596 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???"); 597 reg = -EIO; 598 goto out; 599 } 600 601 /* Put the data to write in the MAC */ 602 smsc911x_mac_write(pdata, MII_DATA, val); 603 604 /* Set the address, index & direction (write to PHY) */ 605 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) | 606 MII_ACC_MII_WRITE_; 607 smsc911x_mac_write(pdata, MII_ACC, addr); 608 609 /* Wait for write to complete w/ timeout */ 610 for (i = 0; i < 100; i++) 611 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) { 612 reg = 0; 613 goto out; 614 } 615 616 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish"); 617 reg = -EIO; 618 619 out: 620 spin_unlock_irqrestore(&pdata->mac_lock, flags); 621 return reg; 622 } 623 624 /* Switch to external phy. Assumes tx and rx are stopped. */ 625 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata) 626 { 627 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 628 629 /* Disable phy clocks to the MAC */ 630 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 631 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 632 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 633 udelay(10); /* Enough time for clocks to stop */ 634 635 /* Switch to external phy */ 636 hwcfg |= HW_CFG_EXT_PHY_EN_; 637 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 638 639 /* Enable phy clocks to the MAC */ 640 hwcfg &= (~HW_CFG_PHY_CLK_SEL_); 641 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 642 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 643 udelay(10); /* Enough time for clocks to restart */ 644 645 hwcfg |= HW_CFG_SMI_SEL_; 646 smsc911x_reg_write(pdata, HW_CFG, hwcfg); 647 } 648 649 /* Autodetects and enables external phy if present on supported chips. 650 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY 651 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */ 652 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata) 653 { 654 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG); 655 656 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) { 657 SMSC_TRACE(pdata, hw, "Forcing internal PHY"); 658 pdata->using_extphy = 0; 659 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) { 660 SMSC_TRACE(pdata, hw, "Forcing external PHY"); 661 smsc911x_phy_enable_external(pdata); 662 pdata->using_extphy = 1; 663 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) { 664 SMSC_TRACE(pdata, hw, 665 "HW_CFG EXT_PHY_DET set, using external PHY"); 666 smsc911x_phy_enable_external(pdata); 667 pdata->using_extphy = 1; 668 } else { 669 SMSC_TRACE(pdata, hw, 670 "HW_CFG EXT_PHY_DET clear, using internal PHY"); 671 pdata->using_extphy = 0; 672 } 673 } 674 675 /* Fetches a tx status out of the status fifo */ 676 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata) 677 { 678 unsigned int result = 679 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_; 680 681 if (result != 0) 682 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO); 683 684 return result; 685 } 686 687 /* Fetches the next rx status */ 688 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata) 689 { 690 unsigned int result = 691 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_; 692 693 if (result != 0) 694 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO); 695 696 return result; 697 } 698 699 #ifdef USE_PHY_WORK_AROUND 700 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata) 701 { 702 unsigned int tries; 703 u32 wrsz; 704 u32 rdsz; 705 ulong bufp; 706 707 for (tries = 0; tries < 10; tries++) { 708 unsigned int txcmd_a; 709 unsigned int txcmd_b; 710 unsigned int status; 711 unsigned int pktlength; 712 unsigned int i; 713 714 /* Zero-out rx packet memory */ 715 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE); 716 717 /* Write tx packet to 118 */ 718 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16; 719 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 720 txcmd_a |= MIN_PACKET_SIZE; 721 722 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE; 723 724 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a); 725 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b); 726 727 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3); 728 wrsz = MIN_PACKET_SIZE + 3; 729 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3); 730 wrsz >>= 2; 731 732 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 733 734 /* Wait till transmit is done */ 735 i = 60; 736 do { 737 udelay(5); 738 status = smsc911x_tx_get_txstatus(pdata); 739 } while ((i--) && (!status)); 740 741 if (!status) { 742 SMSC_WARN(pdata, hw, 743 "Failed to transmit during loopback test"); 744 continue; 745 } 746 if (status & TX_STS_ES_) { 747 SMSC_WARN(pdata, hw, 748 "Transmit encountered errors during loopback test"); 749 continue; 750 } 751 752 /* Wait till receive is done */ 753 i = 60; 754 do { 755 udelay(5); 756 status = smsc911x_rx_get_rxstatus(pdata); 757 } while ((i--) && (!status)); 758 759 if (!status) { 760 SMSC_WARN(pdata, hw, 761 "Failed to receive during loopback test"); 762 continue; 763 } 764 if (status & RX_STS_ES_) { 765 SMSC_WARN(pdata, hw, 766 "Receive encountered errors during loopback test"); 767 continue; 768 } 769 770 pktlength = ((status & 0x3FFF0000UL) >> 16); 771 bufp = (ulong)pdata->loopback_rx_pkt; 772 rdsz = pktlength + 3; 773 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3); 774 rdsz >>= 2; 775 776 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz); 777 778 if (pktlength != (MIN_PACKET_SIZE + 4)) { 779 SMSC_WARN(pdata, hw, "Unexpected packet size " 780 "during loop back test, size=%d, will retry", 781 pktlength); 782 } else { 783 unsigned int j; 784 int mismatch = 0; 785 for (j = 0; j < MIN_PACKET_SIZE; j++) { 786 if (pdata->loopback_tx_pkt[j] 787 != pdata->loopback_rx_pkt[j]) { 788 mismatch = 1; 789 break; 790 } 791 } 792 if (!mismatch) { 793 SMSC_TRACE(pdata, hw, "Successfully verified " 794 "loopback packet"); 795 return 0; 796 } else { 797 SMSC_WARN(pdata, hw, "Data mismatch " 798 "during loop back test, will retry"); 799 } 800 } 801 } 802 803 return -EIO; 804 } 805 806 static int smsc911x_phy_reset(struct smsc911x_data *pdata) 807 { 808 struct phy_device *phy_dev = pdata->phy_dev; 809 unsigned int temp; 810 unsigned int i = 100000; 811 812 BUG_ON(!phy_dev); 813 BUG_ON(!phy_dev->bus); 814 815 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset"); 816 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET); 817 do { 818 msleep(1); 819 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, 820 MII_BMCR); 821 } while ((i--) && (temp & BMCR_RESET)); 822 823 if (temp & BMCR_RESET) { 824 SMSC_WARN(pdata, hw, "PHY reset failed to complete"); 825 return -EIO; 826 } 827 /* Extra delay required because the phy may not be completed with 828 * its reset when BMCR_RESET is cleared. Specs say 256 uS is 829 * enough delay but using 1ms here to be safe */ 830 msleep(1); 831 832 return 0; 833 } 834 835 static int smsc911x_phy_loopbacktest(struct net_device *dev) 836 { 837 struct smsc911x_data *pdata = netdev_priv(dev); 838 struct phy_device *phy_dev = pdata->phy_dev; 839 int result = -EIO; 840 unsigned int i, val; 841 unsigned long flags; 842 843 /* Initialise tx packet using broadcast destination address */ 844 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN); 845 846 /* Use incrementing source address */ 847 for (i = 6; i < 12; i++) 848 pdata->loopback_tx_pkt[i] = (char)i; 849 850 /* Set length type field */ 851 pdata->loopback_tx_pkt[12] = 0x00; 852 pdata->loopback_tx_pkt[13] = 0x00; 853 854 for (i = 14; i < MIN_PACKET_SIZE; i++) 855 pdata->loopback_tx_pkt[i] = (char)i; 856 857 val = smsc911x_reg_read(pdata, HW_CFG); 858 val &= HW_CFG_TX_FIF_SZ_; 859 val |= HW_CFG_SF_; 860 smsc911x_reg_write(pdata, HW_CFG, val); 861 862 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 863 smsc911x_reg_write(pdata, RX_CFG, 864 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8); 865 866 for (i = 0; i < 10; i++) { 867 /* Set PHY to 10/FD, no ANEG, and loopback mode */ 868 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 869 BMCR_LOOPBACK | BMCR_FULLDPLX); 870 871 /* Enable MAC tx/rx, FD */ 872 spin_lock_irqsave(&pdata->mac_lock, flags); 873 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_ 874 | MAC_CR_TXEN_ | MAC_CR_RXEN_); 875 spin_unlock_irqrestore(&pdata->mac_lock, flags); 876 877 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) { 878 result = 0; 879 break; 880 } 881 pdata->resetcount++; 882 883 /* Disable MAC rx */ 884 spin_lock_irqsave(&pdata->mac_lock, flags); 885 smsc911x_mac_write(pdata, MAC_CR, 0); 886 spin_unlock_irqrestore(&pdata->mac_lock, flags); 887 888 smsc911x_phy_reset(pdata); 889 } 890 891 /* Disable MAC */ 892 spin_lock_irqsave(&pdata->mac_lock, flags); 893 smsc911x_mac_write(pdata, MAC_CR, 0); 894 spin_unlock_irqrestore(&pdata->mac_lock, flags); 895 896 /* Cancel PHY loopback mode */ 897 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0); 898 899 smsc911x_reg_write(pdata, TX_CFG, 0); 900 smsc911x_reg_write(pdata, RX_CFG, 0); 901 902 return result; 903 } 904 #endif /* USE_PHY_WORK_AROUND */ 905 906 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata) 907 { 908 struct phy_device *phy_dev = pdata->phy_dev; 909 u32 afc = smsc911x_reg_read(pdata, AFC_CFG); 910 u32 flow; 911 unsigned long flags; 912 913 if (phy_dev->duplex == DUPLEX_FULL) { 914 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE); 915 u16 rmtadv = phy_read(phy_dev, MII_LPA); 916 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 917 918 if (cap & FLOW_CTRL_RX) 919 flow = 0xFFFF0002; 920 else 921 flow = 0; 922 923 if (cap & FLOW_CTRL_TX) 924 afc |= 0xF; 925 else 926 afc &= ~0xF; 927 928 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s", 929 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 930 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 931 } else { 932 SMSC_TRACE(pdata, hw, "half duplex"); 933 flow = 0; 934 afc |= 0xF; 935 } 936 937 spin_lock_irqsave(&pdata->mac_lock, flags); 938 smsc911x_mac_write(pdata, FLOW, flow); 939 spin_unlock_irqrestore(&pdata->mac_lock, flags); 940 941 smsc911x_reg_write(pdata, AFC_CFG, afc); 942 } 943 944 /* Update link mode if anything has changed. Called periodically when the 945 * PHY is in polling mode, even if nothing has changed. */ 946 static void smsc911x_phy_adjust_link(struct net_device *dev) 947 { 948 struct smsc911x_data *pdata = netdev_priv(dev); 949 struct phy_device *phy_dev = pdata->phy_dev; 950 unsigned long flags; 951 int carrier; 952 953 if (phy_dev->duplex != pdata->last_duplex) { 954 unsigned int mac_cr; 955 SMSC_TRACE(pdata, hw, "duplex state has changed"); 956 957 spin_lock_irqsave(&pdata->mac_lock, flags); 958 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 959 if (phy_dev->duplex) { 960 SMSC_TRACE(pdata, hw, 961 "configuring for full duplex mode"); 962 mac_cr |= MAC_CR_FDPX_; 963 } else { 964 SMSC_TRACE(pdata, hw, 965 "configuring for half duplex mode"); 966 mac_cr &= ~MAC_CR_FDPX_; 967 } 968 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 969 spin_unlock_irqrestore(&pdata->mac_lock, flags); 970 971 smsc911x_phy_update_flowcontrol(pdata); 972 pdata->last_duplex = phy_dev->duplex; 973 } 974 975 carrier = netif_carrier_ok(dev); 976 if (carrier != pdata->last_carrier) { 977 SMSC_TRACE(pdata, hw, "carrier state has changed"); 978 if (carrier) { 979 SMSC_TRACE(pdata, hw, "configuring for carrier OK"); 980 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) && 981 (!pdata->using_extphy)) { 982 /* Restore original GPIO configuration */ 983 pdata->gpio_setting = pdata->gpio_orig_setting; 984 smsc911x_reg_write(pdata, GPIO_CFG, 985 pdata->gpio_setting); 986 } 987 } else { 988 SMSC_TRACE(pdata, hw, "configuring for no carrier"); 989 /* Check global setting that LED1 990 * usage is 10/100 indicator */ 991 pdata->gpio_setting = smsc911x_reg_read(pdata, 992 GPIO_CFG); 993 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) && 994 (!pdata->using_extphy)) { 995 /* Force 10/100 LED off, after saving 996 * original GPIO configuration */ 997 pdata->gpio_orig_setting = pdata->gpio_setting; 998 999 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_; 1000 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_ 1001 | GPIO_CFG_GPIODIR0_ 1002 | GPIO_CFG_GPIOD0_); 1003 smsc911x_reg_write(pdata, GPIO_CFG, 1004 pdata->gpio_setting); 1005 } 1006 } 1007 pdata->last_carrier = carrier; 1008 } 1009 } 1010 1011 static int smsc911x_mii_probe(struct net_device *dev) 1012 { 1013 struct smsc911x_data *pdata = netdev_priv(dev); 1014 struct phy_device *phydev = NULL; 1015 int ret; 1016 1017 /* find the first phy */ 1018 phydev = phy_find_first(pdata->mii_bus); 1019 if (!phydev) { 1020 netdev_err(dev, "no PHY found\n"); 1021 return -ENODEV; 1022 } 1023 1024 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X", 1025 phydev->addr, phydev->phy_id); 1026 1027 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link, 1028 pdata->config.phy_interface); 1029 1030 if (ret) { 1031 netdev_err(dev, "Could not attach to PHY\n"); 1032 return ret; 1033 } 1034 1035 netdev_info(dev, 1036 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", 1037 phydev->drv->name, dev_name(&phydev->dev), phydev->irq); 1038 1039 /* mask with MAC supported features */ 1040 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause | 1041 SUPPORTED_Asym_Pause); 1042 phydev->advertising = phydev->supported; 1043 1044 pdata->phy_dev = phydev; 1045 pdata->last_duplex = -1; 1046 pdata->last_carrier = -1; 1047 1048 #ifdef USE_PHY_WORK_AROUND 1049 if (smsc911x_phy_loopbacktest(dev) < 0) { 1050 SMSC_WARN(pdata, hw, "Failed Loop Back Test"); 1051 return -ENODEV; 1052 } 1053 SMSC_TRACE(pdata, hw, "Passed Loop Back Test"); 1054 #endif /* USE_PHY_WORK_AROUND */ 1055 1056 SMSC_TRACE(pdata, hw, "phy initialised successfully"); 1057 return 0; 1058 } 1059 1060 static int smsc911x_mii_init(struct platform_device *pdev, 1061 struct net_device *dev) 1062 { 1063 struct smsc911x_data *pdata = netdev_priv(dev); 1064 int err = -ENXIO, i; 1065 1066 pdata->mii_bus = mdiobus_alloc(); 1067 if (!pdata->mii_bus) { 1068 err = -ENOMEM; 1069 goto err_out_1; 1070 } 1071 1072 pdata->mii_bus->name = SMSC_MDIONAME; 1073 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 1074 pdev->name, pdev->id); 1075 pdata->mii_bus->priv = pdata; 1076 pdata->mii_bus->read = smsc911x_mii_read; 1077 pdata->mii_bus->write = smsc911x_mii_write; 1078 pdata->mii_bus->irq = pdata->phy_irq; 1079 for (i = 0; i < PHY_MAX_ADDR; ++i) 1080 pdata->mii_bus->irq[i] = PHY_POLL; 1081 1082 pdata->mii_bus->parent = &pdev->dev; 1083 1084 switch (pdata->idrev & 0xFFFF0000) { 1085 case 0x01170000: 1086 case 0x01150000: 1087 case 0x117A0000: 1088 case 0x115A0000: 1089 /* External PHY supported, try to autodetect */ 1090 smsc911x_phy_initialise_external(pdata); 1091 break; 1092 default: 1093 SMSC_TRACE(pdata, hw, "External PHY is not supported, " 1094 "using internal PHY"); 1095 pdata->using_extphy = 0; 1096 break; 1097 } 1098 1099 if (!pdata->using_extphy) { 1100 /* Mask all PHYs except ID 1 (internal) */ 1101 pdata->mii_bus->phy_mask = ~(1 << 1); 1102 } 1103 1104 if (mdiobus_register(pdata->mii_bus)) { 1105 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1106 goto err_out_free_bus_2; 1107 } 1108 1109 if (smsc911x_mii_probe(dev) < 0) { 1110 SMSC_WARN(pdata, probe, "Error registering mii bus"); 1111 goto err_out_unregister_bus_3; 1112 } 1113 1114 return 0; 1115 1116 err_out_unregister_bus_3: 1117 mdiobus_unregister(pdata->mii_bus); 1118 err_out_free_bus_2: 1119 mdiobus_free(pdata->mii_bus); 1120 err_out_1: 1121 return err; 1122 } 1123 1124 /* Gets the number of tx statuses in the fifo */ 1125 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata) 1126 { 1127 return (smsc911x_reg_read(pdata, TX_FIFO_INF) 1128 & TX_FIFO_INF_TSUSED_) >> 16; 1129 } 1130 1131 /* Reads tx statuses and increments counters where necessary */ 1132 static void smsc911x_tx_update_txcounters(struct net_device *dev) 1133 { 1134 struct smsc911x_data *pdata = netdev_priv(dev); 1135 unsigned int tx_stat; 1136 1137 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) { 1138 if (unlikely(tx_stat & 0x80000000)) { 1139 /* In this driver the packet tag is used as the packet 1140 * length. Since a packet length can never reach the 1141 * size of 0x8000, this bit is reserved. It is worth 1142 * noting that the "reserved bit" in the warning above 1143 * does not reference a hardware defined reserved bit 1144 * but rather a driver defined one. 1145 */ 1146 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high"); 1147 } else { 1148 if (unlikely(tx_stat & TX_STS_ES_)) { 1149 dev->stats.tx_errors++; 1150 } else { 1151 dev->stats.tx_packets++; 1152 dev->stats.tx_bytes += (tx_stat >> 16); 1153 } 1154 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) { 1155 dev->stats.collisions += 16; 1156 dev->stats.tx_aborted_errors += 1; 1157 } else { 1158 dev->stats.collisions += 1159 ((tx_stat >> 3) & 0xF); 1160 } 1161 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_)) 1162 dev->stats.tx_carrier_errors += 1; 1163 if (unlikely(tx_stat & TX_STS_LATE_COL_)) { 1164 dev->stats.collisions++; 1165 dev->stats.tx_aborted_errors++; 1166 } 1167 } 1168 } 1169 } 1170 1171 /* Increments the Rx error counters */ 1172 static void 1173 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat) 1174 { 1175 int crc_err = 0; 1176 1177 if (unlikely(rxstat & RX_STS_ES_)) { 1178 dev->stats.rx_errors++; 1179 if (unlikely(rxstat & RX_STS_CRC_ERR_)) { 1180 dev->stats.rx_crc_errors++; 1181 crc_err = 1; 1182 } 1183 } 1184 if (likely(!crc_err)) { 1185 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) && 1186 (rxstat & RX_STS_LENGTH_ERR_))) 1187 dev->stats.rx_length_errors++; 1188 if (rxstat & RX_STS_MCAST_) 1189 dev->stats.multicast++; 1190 } 1191 } 1192 1193 /* Quickly dumps bad packets */ 1194 static void 1195 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords) 1196 { 1197 if (likely(pktwords >= 4)) { 1198 unsigned int timeout = 500; 1199 unsigned int val; 1200 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_); 1201 do { 1202 udelay(1); 1203 val = smsc911x_reg_read(pdata, RX_DP_CTRL); 1204 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout); 1205 1206 if (unlikely(timeout == 0)) 1207 SMSC_WARN(pdata, hw, "Timed out waiting for " 1208 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val); 1209 } else { 1210 unsigned int temp; 1211 while (pktwords--) 1212 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO); 1213 } 1214 } 1215 1216 /* NAPI poll function */ 1217 static int smsc911x_poll(struct napi_struct *napi, int budget) 1218 { 1219 struct smsc911x_data *pdata = 1220 container_of(napi, struct smsc911x_data, napi); 1221 struct net_device *dev = pdata->dev; 1222 int npackets = 0; 1223 1224 while (npackets < budget) { 1225 unsigned int pktlength; 1226 unsigned int pktwords; 1227 struct sk_buff *skb; 1228 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata); 1229 1230 if (!rxstat) { 1231 unsigned int temp; 1232 /* We processed all packets available. Tell NAPI it can 1233 * stop polling then re-enable rx interrupts */ 1234 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_); 1235 napi_complete(napi); 1236 temp = smsc911x_reg_read(pdata, INT_EN); 1237 temp |= INT_EN_RSFL_EN_; 1238 smsc911x_reg_write(pdata, INT_EN, temp); 1239 break; 1240 } 1241 1242 /* Count packet for NAPI scheduling, even if it has an error. 1243 * Error packets still require cycles to discard */ 1244 npackets++; 1245 1246 pktlength = ((rxstat & 0x3FFF0000) >> 16); 1247 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2; 1248 smsc911x_rx_counterrors(dev, rxstat); 1249 1250 if (unlikely(rxstat & RX_STS_ES_)) { 1251 SMSC_WARN(pdata, rx_err, 1252 "Discarding packet with error bit set"); 1253 /* Packet has an error, discard it and continue with 1254 * the next */ 1255 smsc911x_rx_fastforward(pdata, pktwords); 1256 dev->stats.rx_dropped++; 1257 continue; 1258 } 1259 1260 skb = netdev_alloc_skb(dev, pktwords << 2); 1261 if (unlikely(!skb)) { 1262 SMSC_WARN(pdata, rx_err, 1263 "Unable to allocate skb for rx packet"); 1264 /* Drop the packet and stop this polling iteration */ 1265 smsc911x_rx_fastforward(pdata, pktwords); 1266 dev->stats.rx_dropped++; 1267 break; 1268 } 1269 1270 pdata->ops->rx_readfifo(pdata, 1271 (unsigned int *)skb->data, pktwords); 1272 1273 /* Align IP on 16B boundary */ 1274 skb_reserve(skb, NET_IP_ALIGN); 1275 skb_put(skb, pktlength - 4); 1276 skb->protocol = eth_type_trans(skb, dev); 1277 skb_checksum_none_assert(skb); 1278 netif_receive_skb(skb); 1279 1280 /* Update counters */ 1281 dev->stats.rx_packets++; 1282 dev->stats.rx_bytes += (pktlength - 4); 1283 } 1284 1285 /* Return total received packets */ 1286 return npackets; 1287 } 1288 1289 /* Returns hash bit number for given MAC address 1290 * Example: 1291 * 01 00 5E 00 00 01 -> returns bit number 31 */ 1292 static unsigned int smsc911x_hash(char addr[ETH_ALEN]) 1293 { 1294 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 1295 } 1296 1297 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata) 1298 { 1299 /* Performs the multicast & mac_cr update. This is called when 1300 * safe on the current hardware, and with the mac_lock held */ 1301 unsigned int mac_cr; 1302 1303 SMSC_ASSERT_MAC_LOCK(pdata); 1304 1305 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1306 mac_cr |= pdata->set_bits_mask; 1307 mac_cr &= ~(pdata->clear_bits_mask); 1308 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1309 smsc911x_mac_write(pdata, HASHH, pdata->hashhi); 1310 smsc911x_mac_write(pdata, HASHL, pdata->hashlo); 1311 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X", 1312 mac_cr, pdata->hashhi, pdata->hashlo); 1313 } 1314 1315 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata) 1316 { 1317 unsigned int mac_cr; 1318 1319 /* This function is only called for older LAN911x devices 1320 * (revA or revB), where MAC_CR, HASHH and HASHL should not 1321 * be modified during Rx - newer devices immediately update the 1322 * registers. 1323 * 1324 * This is called from interrupt context */ 1325 1326 spin_lock(&pdata->mac_lock); 1327 1328 /* Check Rx has stopped */ 1329 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_) 1330 SMSC_WARN(pdata, drv, "Rx not stopped"); 1331 1332 /* Perform the update - safe to do now Rx has stopped */ 1333 smsc911x_rx_multicast_update(pdata); 1334 1335 /* Re-enable Rx */ 1336 mac_cr = smsc911x_mac_read(pdata, MAC_CR); 1337 mac_cr |= MAC_CR_RXEN_; 1338 smsc911x_mac_write(pdata, MAC_CR, mac_cr); 1339 1340 pdata->multicast_update_pending = 0; 1341 1342 spin_unlock(&pdata->mac_lock); 1343 } 1344 1345 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata) 1346 { 1347 int rc = 0; 1348 1349 if (!pdata->phy_dev) 1350 return rc; 1351 1352 /* If the internal PHY is in General Power-Down mode, all, except the 1353 * management interface, is powered-down and stays in that condition as 1354 * long as Phy register bit 0.11 is HIGH. 1355 * 1356 * In that case, clear the bit 0.11, so the PHY powers up and we can 1357 * access to the phy registers. 1358 */ 1359 rc = phy_read(pdata->phy_dev, MII_BMCR); 1360 if (rc < 0) { 1361 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1362 return rc; 1363 } 1364 1365 /* If the PHY general power-down bit is not set is not necessary to 1366 * disable the general power down-mode. 1367 */ 1368 if (rc & BMCR_PDOWN) { 1369 rc = phy_write(pdata->phy_dev, MII_BMCR, rc & ~BMCR_PDOWN); 1370 if (rc < 0) { 1371 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1372 return rc; 1373 } 1374 1375 usleep_range(1000, 1500); 1376 } 1377 1378 return 0; 1379 } 1380 1381 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata) 1382 { 1383 int rc = 0; 1384 1385 if (!pdata->phy_dev) 1386 return rc; 1387 1388 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS); 1389 1390 if (rc < 0) { 1391 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1392 return rc; 1393 } 1394 1395 /* Only disable if energy detect mode is already enabled */ 1396 if (rc & MII_LAN83C185_EDPWRDOWN) { 1397 /* Disable energy detect mode for this SMSC Transceivers */ 1398 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS, 1399 rc & (~MII_LAN83C185_EDPWRDOWN)); 1400 1401 if (rc < 0) { 1402 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1403 return rc; 1404 } 1405 /* Allow PHY to wakeup */ 1406 mdelay(2); 1407 } 1408 1409 return 0; 1410 } 1411 1412 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata) 1413 { 1414 int rc = 0; 1415 1416 if (!pdata->phy_dev) 1417 return rc; 1418 1419 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS); 1420 1421 if (rc < 0) { 1422 SMSC_WARN(pdata, drv, "Failed reading PHY control reg"); 1423 return rc; 1424 } 1425 1426 /* Only enable if energy detect mode is already disabled */ 1427 if (!(rc & MII_LAN83C185_EDPWRDOWN)) { 1428 /* Enable energy detect mode for this SMSC Transceivers */ 1429 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS, 1430 rc | MII_LAN83C185_EDPWRDOWN); 1431 1432 if (rc < 0) { 1433 SMSC_WARN(pdata, drv, "Failed writing PHY control reg"); 1434 return rc; 1435 } 1436 } 1437 return 0; 1438 } 1439 1440 static int smsc911x_soft_reset(struct smsc911x_data *pdata) 1441 { 1442 unsigned int timeout; 1443 unsigned int temp; 1444 int ret; 1445 1446 /* 1447 * Make sure to power-up the PHY chip before doing a reset, otherwise 1448 * the reset fails. 1449 */ 1450 ret = smsc911x_phy_general_power_up(pdata); 1451 if (ret) { 1452 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip"); 1453 return ret; 1454 } 1455 1456 /* 1457 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that 1458 * are initialized in a Energy Detect Power-Down mode that prevents 1459 * the MAC chip to be software reseted. So we have to wakeup the PHY 1460 * before. 1461 */ 1462 if (pdata->generation == 4) { 1463 ret = smsc911x_phy_disable_energy_detect(pdata); 1464 1465 if (ret) { 1466 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1467 return ret; 1468 } 1469 } 1470 1471 /* Reset the LAN911x */ 1472 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_); 1473 timeout = 10; 1474 do { 1475 udelay(10); 1476 temp = smsc911x_reg_read(pdata, HW_CFG); 1477 } while ((--timeout) && (temp & HW_CFG_SRST_)); 1478 1479 if (unlikely(temp & HW_CFG_SRST_)) { 1480 SMSC_WARN(pdata, drv, "Failed to complete reset"); 1481 return -EIO; 1482 } 1483 1484 if (pdata->generation == 4) { 1485 ret = smsc911x_phy_enable_energy_detect(pdata); 1486 1487 if (ret) { 1488 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip"); 1489 return ret; 1490 } 1491 } 1492 1493 return 0; 1494 } 1495 1496 /* Sets the device MAC address to dev_addr, called with mac_lock held */ 1497 static void 1498 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6]) 1499 { 1500 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4]; 1501 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) | 1502 (dev_addr[1] << 8) | dev_addr[0]; 1503 1504 SMSC_ASSERT_MAC_LOCK(pdata); 1505 1506 smsc911x_mac_write(pdata, ADDRH, mac_high16); 1507 smsc911x_mac_write(pdata, ADDRL, mac_low32); 1508 } 1509 1510 static void smsc911x_disable_irq_chip(struct net_device *dev) 1511 { 1512 struct smsc911x_data *pdata = netdev_priv(dev); 1513 1514 smsc911x_reg_write(pdata, INT_EN, 0); 1515 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF); 1516 } 1517 1518 static int smsc911x_open(struct net_device *dev) 1519 { 1520 struct smsc911x_data *pdata = netdev_priv(dev); 1521 unsigned int timeout; 1522 unsigned int temp; 1523 unsigned int intcfg; 1524 1525 /* if the phy is not yet registered, retry later*/ 1526 if (!pdata->phy_dev) { 1527 SMSC_WARN(pdata, hw, "phy_dev is NULL"); 1528 return -EAGAIN; 1529 } 1530 1531 /* Reset the LAN911x */ 1532 if (smsc911x_soft_reset(pdata)) { 1533 SMSC_WARN(pdata, hw, "soft reset failed"); 1534 return -EIO; 1535 } 1536 1537 smsc911x_reg_write(pdata, HW_CFG, 0x00050000); 1538 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740); 1539 1540 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */ 1541 spin_lock_irq(&pdata->mac_lock); 1542 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q); 1543 spin_unlock_irq(&pdata->mac_lock); 1544 1545 /* Make sure EEPROM has finished loading before setting GPIO_CFG */ 1546 timeout = 50; 1547 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) && 1548 --timeout) { 1549 udelay(10); 1550 } 1551 1552 if (unlikely(timeout == 0)) 1553 SMSC_WARN(pdata, ifup, 1554 "Timed out waiting for EEPROM busy bit to clear"); 1555 1556 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000); 1557 1558 /* The soft reset above cleared the device's MAC address, 1559 * restore it from local copy (set in probe) */ 1560 spin_lock_irq(&pdata->mac_lock); 1561 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1562 spin_unlock_irq(&pdata->mac_lock); 1563 1564 /* Initialise irqs, but leave all sources disabled */ 1565 smsc911x_disable_irq_chip(dev); 1566 1567 /* Set interrupt deassertion to 100uS */ 1568 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_); 1569 1570 if (pdata->config.irq_polarity) { 1571 SMSC_TRACE(pdata, ifup, "irq polarity: active high"); 1572 intcfg |= INT_CFG_IRQ_POL_; 1573 } else { 1574 SMSC_TRACE(pdata, ifup, "irq polarity: active low"); 1575 } 1576 1577 if (pdata->config.irq_type) { 1578 SMSC_TRACE(pdata, ifup, "irq type: push-pull"); 1579 intcfg |= INT_CFG_IRQ_TYPE_; 1580 } else { 1581 SMSC_TRACE(pdata, ifup, "irq type: open drain"); 1582 } 1583 1584 smsc911x_reg_write(pdata, INT_CFG, intcfg); 1585 1586 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq); 1587 pdata->software_irq_signal = 0; 1588 smp_wmb(); 1589 1590 temp = smsc911x_reg_read(pdata, INT_EN); 1591 temp |= INT_EN_SW_INT_EN_; 1592 smsc911x_reg_write(pdata, INT_EN, temp); 1593 1594 timeout = 1000; 1595 while (timeout--) { 1596 if (pdata->software_irq_signal) 1597 break; 1598 msleep(1); 1599 } 1600 1601 if (!pdata->software_irq_signal) { 1602 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n", 1603 dev->irq); 1604 return -ENODEV; 1605 } 1606 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d", 1607 dev->irq); 1608 1609 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n", 1610 (unsigned long)pdata->ioaddr, dev->irq); 1611 1612 /* Reset the last known duplex and carrier */ 1613 pdata->last_duplex = -1; 1614 pdata->last_carrier = -1; 1615 1616 /* Bring the PHY up */ 1617 phy_start(pdata->phy_dev); 1618 1619 temp = smsc911x_reg_read(pdata, HW_CFG); 1620 /* Preserve TX FIFO size and external PHY configuration */ 1621 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF); 1622 temp |= HW_CFG_SF_; 1623 smsc911x_reg_write(pdata, HW_CFG, temp); 1624 1625 temp = smsc911x_reg_read(pdata, FIFO_INT); 1626 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1627 temp &= ~(FIFO_INT_RX_STS_LEVEL_); 1628 smsc911x_reg_write(pdata, FIFO_INT, temp); 1629 1630 /* set RX Data offset to 2 bytes for alignment */ 1631 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8)); 1632 1633 /* enable NAPI polling before enabling RX interrupts */ 1634 napi_enable(&pdata->napi); 1635 1636 temp = smsc911x_reg_read(pdata, INT_EN); 1637 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_); 1638 smsc911x_reg_write(pdata, INT_EN, temp); 1639 1640 spin_lock_irq(&pdata->mac_lock); 1641 temp = smsc911x_mac_read(pdata, MAC_CR); 1642 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 1643 smsc911x_mac_write(pdata, MAC_CR, temp); 1644 spin_unlock_irq(&pdata->mac_lock); 1645 1646 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_); 1647 1648 netif_start_queue(dev); 1649 return 0; 1650 } 1651 1652 /* Entry point for stopping the interface */ 1653 static int smsc911x_stop(struct net_device *dev) 1654 { 1655 struct smsc911x_data *pdata = netdev_priv(dev); 1656 unsigned int temp; 1657 1658 /* Disable all device interrupts */ 1659 temp = smsc911x_reg_read(pdata, INT_CFG); 1660 temp &= ~INT_CFG_IRQ_EN_; 1661 smsc911x_reg_write(pdata, INT_CFG, temp); 1662 1663 /* Stop Tx and Rx polling */ 1664 netif_stop_queue(dev); 1665 napi_disable(&pdata->napi); 1666 1667 /* At this point all Rx and Tx activity is stopped */ 1668 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1669 smsc911x_tx_update_txcounters(dev); 1670 1671 /* Bring the PHY down */ 1672 if (pdata->phy_dev) 1673 phy_stop(pdata->phy_dev); 1674 1675 SMSC_TRACE(pdata, ifdown, "Interface stopped"); 1676 return 0; 1677 } 1678 1679 /* Entry point for transmitting a packet */ 1680 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 1681 { 1682 struct smsc911x_data *pdata = netdev_priv(dev); 1683 unsigned int freespace; 1684 unsigned int tx_cmd_a; 1685 unsigned int tx_cmd_b; 1686 unsigned int temp; 1687 u32 wrsz; 1688 ulong bufp; 1689 1690 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_; 1691 1692 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD)) 1693 SMSC_WARN(pdata, tx_err, 1694 "Tx data fifo low, space available: %d", freespace); 1695 1696 /* Word alignment adjustment */ 1697 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16; 1698 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; 1699 tx_cmd_a |= (unsigned int)skb->len; 1700 1701 tx_cmd_b = ((unsigned int)skb->len) << 16; 1702 tx_cmd_b |= (unsigned int)skb->len; 1703 1704 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a); 1705 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b); 1706 1707 bufp = (ulong)skb->data & (~0x3); 1708 wrsz = (u32)skb->len + 3; 1709 wrsz += (u32)((ulong)skb->data & 0x3); 1710 wrsz >>= 2; 1711 1712 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz); 1713 freespace -= (skb->len + 32); 1714 skb_tx_timestamp(skb); 1715 dev_consume_skb_any(skb); 1716 1717 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30)) 1718 smsc911x_tx_update_txcounters(dev); 1719 1720 if (freespace < TX_FIFO_LOW_THRESHOLD) { 1721 netif_stop_queue(dev); 1722 temp = smsc911x_reg_read(pdata, FIFO_INT); 1723 temp &= 0x00FFFFFF; 1724 temp |= 0x32000000; 1725 smsc911x_reg_write(pdata, FIFO_INT, temp); 1726 } 1727 1728 return NETDEV_TX_OK; 1729 } 1730 1731 /* Entry point for getting status counters */ 1732 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev) 1733 { 1734 struct smsc911x_data *pdata = netdev_priv(dev); 1735 smsc911x_tx_update_txcounters(dev); 1736 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP); 1737 return &dev->stats; 1738 } 1739 1740 /* Entry point for setting addressing modes */ 1741 static void smsc911x_set_multicast_list(struct net_device *dev) 1742 { 1743 struct smsc911x_data *pdata = netdev_priv(dev); 1744 unsigned long flags; 1745 1746 if (dev->flags & IFF_PROMISC) { 1747 /* Enabling promiscuous mode */ 1748 pdata->set_bits_mask = MAC_CR_PRMS_; 1749 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1750 pdata->hashhi = 0; 1751 pdata->hashlo = 0; 1752 } else if (dev->flags & IFF_ALLMULTI) { 1753 /* Enabling all multicast mode */ 1754 pdata->set_bits_mask = MAC_CR_MCPAS_; 1755 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_); 1756 pdata->hashhi = 0; 1757 pdata->hashlo = 0; 1758 } else if (!netdev_mc_empty(dev)) { 1759 /* Enabling specific multicast addresses */ 1760 unsigned int hash_high = 0; 1761 unsigned int hash_low = 0; 1762 struct netdev_hw_addr *ha; 1763 1764 pdata->set_bits_mask = MAC_CR_HPFILT_; 1765 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1766 1767 netdev_for_each_mc_addr(ha, dev) { 1768 unsigned int bitnum = smsc911x_hash(ha->addr); 1769 unsigned int mask = 0x01 << (bitnum & 0x1F); 1770 1771 if (bitnum & 0x20) 1772 hash_high |= mask; 1773 else 1774 hash_low |= mask; 1775 } 1776 1777 pdata->hashhi = hash_high; 1778 pdata->hashlo = hash_low; 1779 } else { 1780 /* Enabling local MAC address only */ 1781 pdata->set_bits_mask = 0; 1782 pdata->clear_bits_mask = 1783 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 1784 pdata->hashhi = 0; 1785 pdata->hashlo = 0; 1786 } 1787 1788 spin_lock_irqsave(&pdata->mac_lock, flags); 1789 1790 if (pdata->generation <= 1) { 1791 /* Older hardware revision - cannot change these flags while 1792 * receiving data */ 1793 if (!pdata->multicast_update_pending) { 1794 unsigned int temp; 1795 SMSC_TRACE(pdata, hw, "scheduling mcast update"); 1796 pdata->multicast_update_pending = 1; 1797 1798 /* Request the hardware to stop, then perform the 1799 * update when we get an RX_STOP interrupt */ 1800 temp = smsc911x_mac_read(pdata, MAC_CR); 1801 temp &= ~(MAC_CR_RXEN_); 1802 smsc911x_mac_write(pdata, MAC_CR, temp); 1803 } else { 1804 /* There is another update pending, this should now 1805 * use the newer values */ 1806 } 1807 } else { 1808 /* Newer hardware revision - can write immediately */ 1809 smsc911x_rx_multicast_update(pdata); 1810 } 1811 1812 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1813 } 1814 1815 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id) 1816 { 1817 struct net_device *dev = dev_id; 1818 struct smsc911x_data *pdata = netdev_priv(dev); 1819 u32 intsts = smsc911x_reg_read(pdata, INT_STS); 1820 u32 inten = smsc911x_reg_read(pdata, INT_EN); 1821 int serviced = IRQ_NONE; 1822 u32 temp; 1823 1824 if (unlikely(intsts & inten & INT_STS_SW_INT_)) { 1825 temp = smsc911x_reg_read(pdata, INT_EN); 1826 temp &= (~INT_EN_SW_INT_EN_); 1827 smsc911x_reg_write(pdata, INT_EN, temp); 1828 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_); 1829 pdata->software_irq_signal = 1; 1830 smp_wmb(); 1831 serviced = IRQ_HANDLED; 1832 } 1833 1834 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) { 1835 /* Called when there is a multicast update scheduled and 1836 * it is now safe to complete the update */ 1837 SMSC_TRACE(pdata, intr, "RX Stop interrupt"); 1838 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_); 1839 if (pdata->multicast_update_pending) 1840 smsc911x_rx_multicast_update_workaround(pdata); 1841 serviced = IRQ_HANDLED; 1842 } 1843 1844 if (intsts & inten & INT_STS_TDFA_) { 1845 temp = smsc911x_reg_read(pdata, FIFO_INT); 1846 temp |= FIFO_INT_TX_AVAIL_LEVEL_; 1847 smsc911x_reg_write(pdata, FIFO_INT, temp); 1848 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_); 1849 netif_wake_queue(dev); 1850 serviced = IRQ_HANDLED; 1851 } 1852 1853 if (unlikely(intsts & inten & INT_STS_RXE_)) { 1854 SMSC_TRACE(pdata, intr, "RX Error interrupt"); 1855 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_); 1856 serviced = IRQ_HANDLED; 1857 } 1858 1859 if (likely(intsts & inten & INT_STS_RSFL_)) { 1860 if (likely(napi_schedule_prep(&pdata->napi))) { 1861 /* Disable Rx interrupts */ 1862 temp = smsc911x_reg_read(pdata, INT_EN); 1863 temp &= (~INT_EN_RSFL_EN_); 1864 smsc911x_reg_write(pdata, INT_EN, temp); 1865 /* Schedule a NAPI poll */ 1866 __napi_schedule(&pdata->napi); 1867 } else { 1868 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed"); 1869 } 1870 serviced = IRQ_HANDLED; 1871 } 1872 1873 return serviced; 1874 } 1875 1876 #ifdef CONFIG_NET_POLL_CONTROLLER 1877 static void smsc911x_poll_controller(struct net_device *dev) 1878 { 1879 disable_irq(dev->irq); 1880 smsc911x_irqhandler(0, dev); 1881 enable_irq(dev->irq); 1882 } 1883 #endif /* CONFIG_NET_POLL_CONTROLLER */ 1884 1885 static int smsc911x_set_mac_address(struct net_device *dev, void *p) 1886 { 1887 struct smsc911x_data *pdata = netdev_priv(dev); 1888 struct sockaddr *addr = p; 1889 1890 /* On older hardware revisions we cannot change the mac address 1891 * registers while receiving data. Newer devices can safely change 1892 * this at any time. */ 1893 if (pdata->generation <= 1 && netif_running(dev)) 1894 return -EBUSY; 1895 1896 if (!is_valid_ether_addr(addr->sa_data)) 1897 return -EADDRNOTAVAIL; 1898 1899 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 1900 1901 spin_lock_irq(&pdata->mac_lock); 1902 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 1903 spin_unlock_irq(&pdata->mac_lock); 1904 1905 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 1906 1907 return 0; 1908 } 1909 1910 /* Standard ioctls for mii-tool */ 1911 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1912 { 1913 struct smsc911x_data *pdata = netdev_priv(dev); 1914 1915 if (!netif_running(dev) || !pdata->phy_dev) 1916 return -EINVAL; 1917 1918 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd); 1919 } 1920 1921 static int 1922 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1923 { 1924 struct smsc911x_data *pdata = netdev_priv(dev); 1925 1926 cmd->maxtxpkt = 1; 1927 cmd->maxrxpkt = 1; 1928 return phy_ethtool_gset(pdata->phy_dev, cmd); 1929 } 1930 1931 static int 1932 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1933 { 1934 struct smsc911x_data *pdata = netdev_priv(dev); 1935 1936 return phy_ethtool_sset(pdata->phy_dev, cmd); 1937 } 1938 1939 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev, 1940 struct ethtool_drvinfo *info) 1941 { 1942 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver)); 1943 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version)); 1944 strlcpy(info->bus_info, dev_name(dev->dev.parent), 1945 sizeof(info->bus_info)); 1946 } 1947 1948 static int smsc911x_ethtool_nwayreset(struct net_device *dev) 1949 { 1950 struct smsc911x_data *pdata = netdev_priv(dev); 1951 1952 return phy_start_aneg(pdata->phy_dev); 1953 } 1954 1955 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev) 1956 { 1957 struct smsc911x_data *pdata = netdev_priv(dev); 1958 return pdata->msg_enable; 1959 } 1960 1961 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1962 { 1963 struct smsc911x_data *pdata = netdev_priv(dev); 1964 pdata->msg_enable = level; 1965 } 1966 1967 static int smsc911x_ethtool_getregslen(struct net_device *dev) 1968 { 1969 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) * 1970 sizeof(u32); 1971 } 1972 1973 static void 1974 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs, 1975 void *buf) 1976 { 1977 struct smsc911x_data *pdata = netdev_priv(dev); 1978 struct phy_device *phy_dev = pdata->phy_dev; 1979 unsigned long flags; 1980 unsigned int i; 1981 unsigned int j = 0; 1982 u32 *data = buf; 1983 1984 regs->version = pdata->idrev; 1985 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32))) 1986 data[j++] = smsc911x_reg_read(pdata, i); 1987 1988 for (i = MAC_CR; i <= WUCSR; i++) { 1989 spin_lock_irqsave(&pdata->mac_lock, flags); 1990 data[j++] = smsc911x_mac_read(pdata, i); 1991 spin_unlock_irqrestore(&pdata->mac_lock, flags); 1992 } 1993 1994 for (i = 0; i <= 31; i++) 1995 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i); 1996 } 1997 1998 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata) 1999 { 2000 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG); 2001 temp &= ~GPIO_CFG_EEPR_EN_; 2002 smsc911x_reg_write(pdata, GPIO_CFG, temp); 2003 msleep(1); 2004 } 2005 2006 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op) 2007 { 2008 int timeout = 100; 2009 u32 e2cmd; 2010 2011 SMSC_TRACE(pdata, drv, "op 0x%08x", op); 2012 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) { 2013 SMSC_WARN(pdata, drv, "Busy at start"); 2014 return -EBUSY; 2015 } 2016 2017 e2cmd = op | E2P_CMD_EPC_BUSY_; 2018 smsc911x_reg_write(pdata, E2P_CMD, e2cmd); 2019 2020 do { 2021 msleep(1); 2022 e2cmd = smsc911x_reg_read(pdata, E2P_CMD); 2023 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout)); 2024 2025 if (!timeout) { 2026 SMSC_TRACE(pdata, drv, "TIMED OUT"); 2027 return -EAGAIN; 2028 } 2029 2030 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) { 2031 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation"); 2032 return -EINVAL; 2033 } 2034 2035 return 0; 2036 } 2037 2038 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata, 2039 u8 address, u8 *data) 2040 { 2041 u32 op = E2P_CMD_EPC_CMD_READ_ | address; 2042 int ret; 2043 2044 SMSC_TRACE(pdata, drv, "address 0x%x", address); 2045 ret = smsc911x_eeprom_send_cmd(pdata, op); 2046 2047 if (!ret) 2048 data[address] = smsc911x_reg_read(pdata, E2P_DATA); 2049 2050 return ret; 2051 } 2052 2053 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata, 2054 u8 address, u8 data) 2055 { 2056 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address; 2057 u32 temp; 2058 int ret; 2059 2060 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data); 2061 ret = smsc911x_eeprom_send_cmd(pdata, op); 2062 2063 if (!ret) { 2064 op = E2P_CMD_EPC_CMD_WRITE_ | address; 2065 smsc911x_reg_write(pdata, E2P_DATA, (u32)data); 2066 2067 /* Workaround for hardware read-after-write restriction */ 2068 temp = smsc911x_reg_read(pdata, BYTE_TEST); 2069 2070 ret = smsc911x_eeprom_send_cmd(pdata, op); 2071 } 2072 2073 return ret; 2074 } 2075 2076 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev) 2077 { 2078 return SMSC911X_EEPROM_SIZE; 2079 } 2080 2081 static int smsc911x_ethtool_get_eeprom(struct net_device *dev, 2082 struct ethtool_eeprom *eeprom, u8 *data) 2083 { 2084 struct smsc911x_data *pdata = netdev_priv(dev); 2085 u8 eeprom_data[SMSC911X_EEPROM_SIZE]; 2086 int len; 2087 int i; 2088 2089 smsc911x_eeprom_enable_access(pdata); 2090 2091 len = min(eeprom->len, SMSC911X_EEPROM_SIZE); 2092 for (i = 0; i < len; i++) { 2093 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data); 2094 if (ret < 0) { 2095 eeprom->len = 0; 2096 return ret; 2097 } 2098 } 2099 2100 memcpy(data, &eeprom_data[eeprom->offset], len); 2101 eeprom->len = len; 2102 return 0; 2103 } 2104 2105 static int smsc911x_ethtool_set_eeprom(struct net_device *dev, 2106 struct ethtool_eeprom *eeprom, u8 *data) 2107 { 2108 int ret; 2109 struct smsc911x_data *pdata = netdev_priv(dev); 2110 2111 smsc911x_eeprom_enable_access(pdata); 2112 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_); 2113 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data); 2114 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_); 2115 2116 /* Single byte write, according to man page */ 2117 eeprom->len = 1; 2118 2119 return ret; 2120 } 2121 2122 static const struct ethtool_ops smsc911x_ethtool_ops = { 2123 .get_settings = smsc911x_ethtool_getsettings, 2124 .set_settings = smsc911x_ethtool_setsettings, 2125 .get_link = ethtool_op_get_link, 2126 .get_drvinfo = smsc911x_ethtool_getdrvinfo, 2127 .nway_reset = smsc911x_ethtool_nwayreset, 2128 .get_msglevel = smsc911x_ethtool_getmsglevel, 2129 .set_msglevel = smsc911x_ethtool_setmsglevel, 2130 .get_regs_len = smsc911x_ethtool_getregslen, 2131 .get_regs = smsc911x_ethtool_getregs, 2132 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len, 2133 .get_eeprom = smsc911x_ethtool_get_eeprom, 2134 .set_eeprom = smsc911x_ethtool_set_eeprom, 2135 .get_ts_info = ethtool_op_get_ts_info, 2136 }; 2137 2138 static const struct net_device_ops smsc911x_netdev_ops = { 2139 .ndo_open = smsc911x_open, 2140 .ndo_stop = smsc911x_stop, 2141 .ndo_start_xmit = smsc911x_hard_start_xmit, 2142 .ndo_get_stats = smsc911x_get_stats, 2143 .ndo_set_rx_mode = smsc911x_set_multicast_list, 2144 .ndo_do_ioctl = smsc911x_do_ioctl, 2145 .ndo_change_mtu = eth_change_mtu, 2146 .ndo_validate_addr = eth_validate_addr, 2147 .ndo_set_mac_address = smsc911x_set_mac_address, 2148 #ifdef CONFIG_NET_POLL_CONTROLLER 2149 .ndo_poll_controller = smsc911x_poll_controller, 2150 #endif 2151 }; 2152 2153 /* copies the current mac address from hardware to dev->dev_addr */ 2154 static void smsc911x_read_mac_address(struct net_device *dev) 2155 { 2156 struct smsc911x_data *pdata = netdev_priv(dev); 2157 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH); 2158 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL); 2159 2160 dev->dev_addr[0] = (u8)(mac_low32); 2161 dev->dev_addr[1] = (u8)(mac_low32 >> 8); 2162 dev->dev_addr[2] = (u8)(mac_low32 >> 16); 2163 dev->dev_addr[3] = (u8)(mac_low32 >> 24); 2164 dev->dev_addr[4] = (u8)(mac_high16); 2165 dev->dev_addr[5] = (u8)(mac_high16 >> 8); 2166 } 2167 2168 /* Initializing private device structures, only called from probe */ 2169 static int smsc911x_init(struct net_device *dev) 2170 { 2171 struct smsc911x_data *pdata = netdev_priv(dev); 2172 unsigned int byte_test, mask; 2173 unsigned int to = 100; 2174 2175 SMSC_TRACE(pdata, probe, "Driver Parameters:"); 2176 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX", 2177 (unsigned long)pdata->ioaddr); 2178 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq); 2179 SMSC_TRACE(pdata, probe, "PHY will be autodetected."); 2180 2181 spin_lock_init(&pdata->dev_lock); 2182 spin_lock_init(&pdata->mac_lock); 2183 2184 if (pdata->ioaddr == NULL) { 2185 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000"); 2186 return -ENODEV; 2187 } 2188 2189 /* 2190 * poll the READY bit in PMT_CTRL. Any other access to the device is 2191 * forbidden while this bit isn't set. Try for 100ms 2192 * 2193 * Note that this test is done before the WORD_SWAP register is 2194 * programmed. So in some configurations the READY bit is at 16 before 2195 * WORD_SWAP is written to. This issue is worked around by waiting 2196 * until either bit 0 or bit 16 gets set in PMT_CTRL. 2197 * 2198 * SMSC has confirmed that checking bit 16 (marked as reserved in 2199 * the datasheet) is fine since these bits "will either never be set 2200 * or can only go high after READY does (so also indicate the device 2201 * is ready)". 2202 */ 2203 2204 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); 2205 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) 2206 udelay(1000); 2207 2208 if (to == 0) { 2209 netdev_err(dev, "Device not READY in 100ms aborting\n"); 2210 return -ENODEV; 2211 } 2212 2213 /* Check byte ordering */ 2214 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2215 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test); 2216 if (byte_test == 0x43218765) { 2217 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, " 2218 "applying WORD_SWAP"); 2219 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff); 2220 2221 /* 1 dummy read of BYTE_TEST is needed after a write to 2222 * WORD_SWAP before its contents are valid */ 2223 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2224 2225 byte_test = smsc911x_reg_read(pdata, BYTE_TEST); 2226 } 2227 2228 if (byte_test != 0x87654321) { 2229 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test); 2230 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) { 2231 SMSC_WARN(pdata, probe, 2232 "top 16 bits equal to bottom 16 bits"); 2233 SMSC_TRACE(pdata, probe, 2234 "This may mean the chip is set " 2235 "for 32 bit while the bus is reading 16 bit"); 2236 } 2237 return -ENODEV; 2238 } 2239 2240 /* Default generation to zero (all workarounds apply) */ 2241 pdata->generation = 0; 2242 2243 pdata->idrev = smsc911x_reg_read(pdata, ID_REV); 2244 switch (pdata->idrev & 0xFFFF0000) { 2245 case 0x01180000: 2246 case 0x01170000: 2247 case 0x01160000: 2248 case 0x01150000: 2249 case 0x218A0000: 2250 /* LAN911[5678] family */ 2251 pdata->generation = pdata->idrev & 0x0000FFFF; 2252 break; 2253 2254 case 0x118A0000: 2255 case 0x117A0000: 2256 case 0x116A0000: 2257 case 0x115A0000: 2258 /* LAN921[5678] family */ 2259 pdata->generation = 3; 2260 break; 2261 2262 case 0x92100000: 2263 case 0x92110000: 2264 case 0x92200000: 2265 case 0x92210000: 2266 /* LAN9210/LAN9211/LAN9220/LAN9221 */ 2267 pdata->generation = 4; 2268 break; 2269 2270 default: 2271 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X", 2272 pdata->idrev); 2273 return -ENODEV; 2274 } 2275 2276 SMSC_TRACE(pdata, probe, 2277 "LAN911x identified, idrev: 0x%08X, generation: %d", 2278 pdata->idrev, pdata->generation); 2279 2280 if (pdata->generation == 0) 2281 SMSC_WARN(pdata, probe, 2282 "This driver is not intended for this chip revision"); 2283 2284 /* workaround for platforms without an eeprom, where the mac address 2285 * is stored elsewhere and set by the bootloader. This saves the 2286 * mac address before resetting the device */ 2287 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) { 2288 spin_lock_irq(&pdata->mac_lock); 2289 smsc911x_read_mac_address(dev); 2290 spin_unlock_irq(&pdata->mac_lock); 2291 } 2292 2293 /* Reset the LAN911x */ 2294 if (smsc911x_soft_reset(pdata)) 2295 return -ENODEV; 2296 2297 dev->flags |= IFF_MULTICAST; 2298 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT); 2299 dev->netdev_ops = &smsc911x_netdev_ops; 2300 dev->ethtool_ops = &smsc911x_ethtool_ops; 2301 2302 return 0; 2303 } 2304 2305 static int smsc911x_drv_remove(struct platform_device *pdev) 2306 { 2307 struct net_device *dev; 2308 struct smsc911x_data *pdata; 2309 struct resource *res; 2310 2311 dev = platform_get_drvdata(pdev); 2312 BUG_ON(!dev); 2313 pdata = netdev_priv(dev); 2314 BUG_ON(!pdata); 2315 BUG_ON(!pdata->ioaddr); 2316 BUG_ON(!pdata->phy_dev); 2317 2318 SMSC_TRACE(pdata, ifdown, "Stopping driver"); 2319 2320 phy_disconnect(pdata->phy_dev); 2321 pdata->phy_dev = NULL; 2322 mdiobus_unregister(pdata->mii_bus); 2323 mdiobus_free(pdata->mii_bus); 2324 2325 unregister_netdev(dev); 2326 free_irq(dev->irq, dev); 2327 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2328 "smsc911x-memory"); 2329 if (!res) 2330 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2331 2332 release_mem_region(res->start, resource_size(res)); 2333 2334 iounmap(pdata->ioaddr); 2335 2336 (void)smsc911x_disable_resources(pdev); 2337 smsc911x_free_resources(pdev); 2338 2339 free_netdev(dev); 2340 2341 return 0; 2342 } 2343 2344 /* standard register acces */ 2345 static const struct smsc911x_ops standard_smsc911x_ops = { 2346 .reg_read = __smsc911x_reg_read, 2347 .reg_write = __smsc911x_reg_write, 2348 .rx_readfifo = smsc911x_rx_readfifo, 2349 .tx_writefifo = smsc911x_tx_writefifo, 2350 }; 2351 2352 /* shifted register access */ 2353 static const struct smsc911x_ops shifted_smsc911x_ops = { 2354 .reg_read = __smsc911x_reg_read_shift, 2355 .reg_write = __smsc911x_reg_write_shift, 2356 .rx_readfifo = smsc911x_rx_readfifo_shift, 2357 .tx_writefifo = smsc911x_tx_writefifo_shift, 2358 }; 2359 2360 #ifdef CONFIG_OF 2361 static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config, 2362 struct device_node *np) 2363 { 2364 const char *mac; 2365 u32 width = 0; 2366 2367 if (!np) 2368 return -ENODEV; 2369 2370 config->phy_interface = of_get_phy_mode(np); 2371 2372 mac = of_get_mac_address(np); 2373 if (mac) 2374 memcpy(config->mac, mac, ETH_ALEN); 2375 2376 of_property_read_u32(np, "reg-shift", &config->shift); 2377 2378 of_property_read_u32(np, "reg-io-width", &width); 2379 if (width == 4) 2380 config->flags |= SMSC911X_USE_32BIT; 2381 else 2382 config->flags |= SMSC911X_USE_16BIT; 2383 2384 if (of_get_property(np, "smsc,irq-active-high", NULL)) 2385 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH; 2386 2387 if (of_get_property(np, "smsc,irq-push-pull", NULL)) 2388 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL; 2389 2390 if (of_get_property(np, "smsc,force-internal-phy", NULL)) 2391 config->flags |= SMSC911X_FORCE_INTERNAL_PHY; 2392 2393 if (of_get_property(np, "smsc,force-external-phy", NULL)) 2394 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY; 2395 2396 if (of_get_property(np, "smsc,save-mac-address", NULL)) 2397 config->flags |= SMSC911X_SAVE_MAC_ADDRESS; 2398 2399 return 0; 2400 } 2401 #else 2402 static inline int smsc911x_probe_config_dt( 2403 struct smsc911x_platform_config *config, 2404 struct device_node *np) 2405 { 2406 return -ENODEV; 2407 } 2408 #endif /* CONFIG_OF */ 2409 2410 static int smsc911x_drv_probe(struct platform_device *pdev) 2411 { 2412 struct device_node *np = pdev->dev.of_node; 2413 struct net_device *dev; 2414 struct smsc911x_data *pdata; 2415 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev); 2416 struct resource *res, *irq_res; 2417 unsigned int intcfg = 0; 2418 int res_size, irq_flags; 2419 int retval; 2420 2421 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 2422 "smsc911x-memory"); 2423 if (!res) 2424 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2425 if (!res) { 2426 pr_warn("Could not allocate resource\n"); 2427 retval = -ENODEV; 2428 goto out_0; 2429 } 2430 res_size = resource_size(res); 2431 2432 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 2433 if (!irq_res) { 2434 pr_warn("Could not allocate irq resource\n"); 2435 retval = -ENODEV; 2436 goto out_0; 2437 } 2438 2439 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) { 2440 retval = -EBUSY; 2441 goto out_0; 2442 } 2443 2444 dev = alloc_etherdev(sizeof(struct smsc911x_data)); 2445 if (!dev) { 2446 retval = -ENOMEM; 2447 goto out_release_io_1; 2448 } 2449 2450 SET_NETDEV_DEV(dev, &pdev->dev); 2451 2452 pdata = netdev_priv(dev); 2453 dev->irq = irq_res->start; 2454 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK; 2455 pdata->ioaddr = ioremap_nocache(res->start, res_size); 2456 2457 pdata->dev = dev; 2458 pdata->msg_enable = ((1 << debug) - 1); 2459 2460 platform_set_drvdata(pdev, dev); 2461 2462 retval = smsc911x_request_resources(pdev); 2463 if (retval) 2464 goto out_request_resources_fail; 2465 2466 retval = smsc911x_enable_resources(pdev); 2467 if (retval) 2468 goto out_enable_resources_fail; 2469 2470 if (pdata->ioaddr == NULL) { 2471 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid"); 2472 retval = -ENOMEM; 2473 goto out_disable_resources; 2474 } 2475 2476 retval = smsc911x_probe_config_dt(&pdata->config, np); 2477 if (retval && config) { 2478 /* copy config parameters across to pdata */ 2479 memcpy(&pdata->config, config, sizeof(pdata->config)); 2480 retval = 0; 2481 } 2482 2483 if (retval) { 2484 SMSC_WARN(pdata, probe, "Error smsc911x config not found"); 2485 goto out_disable_resources; 2486 } 2487 2488 /* assume standard, non-shifted, access to HW registers */ 2489 pdata->ops = &standard_smsc911x_ops; 2490 /* apply the right access if shifting is needed */ 2491 if (pdata->config.shift) 2492 pdata->ops = &shifted_smsc911x_ops; 2493 2494 retval = smsc911x_init(dev); 2495 if (retval < 0) 2496 goto out_disable_resources; 2497 2498 /* configure irq polarity and type before connecting isr */ 2499 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) 2500 intcfg |= INT_CFG_IRQ_POL_; 2501 2502 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL) 2503 intcfg |= INT_CFG_IRQ_TYPE_; 2504 2505 smsc911x_reg_write(pdata, INT_CFG, intcfg); 2506 2507 /* Ensure interrupts are globally disabled before connecting ISR */ 2508 smsc911x_disable_irq_chip(dev); 2509 2510 retval = request_irq(dev->irq, smsc911x_irqhandler, 2511 irq_flags | IRQF_SHARED, dev->name, dev); 2512 if (retval) { 2513 SMSC_WARN(pdata, probe, 2514 "Unable to claim requested irq: %d", dev->irq); 2515 goto out_disable_resources; 2516 } 2517 2518 netif_carrier_off(dev); 2519 2520 retval = register_netdev(dev); 2521 if (retval) { 2522 SMSC_WARN(pdata, probe, "Error %i registering device", retval); 2523 goto out_free_irq; 2524 } else { 2525 SMSC_TRACE(pdata, probe, 2526 "Network interface: \"%s\"", dev->name); 2527 } 2528 2529 retval = smsc911x_mii_init(pdev, dev); 2530 if (retval) { 2531 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval); 2532 goto out_unregister_netdev_5; 2533 } 2534 2535 spin_lock_irq(&pdata->mac_lock); 2536 2537 /* Check if mac address has been specified when bringing interface up */ 2538 if (is_valid_ether_addr(dev->dev_addr)) { 2539 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2540 SMSC_TRACE(pdata, probe, 2541 "MAC Address is specified by configuration"); 2542 } else if (is_valid_ether_addr(pdata->config.mac)) { 2543 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN); 2544 SMSC_TRACE(pdata, probe, 2545 "MAC Address specified by platform data"); 2546 } else { 2547 /* Try reading mac address from device. if EEPROM is present 2548 * it will already have been set */ 2549 smsc_get_mac(dev); 2550 2551 if (is_valid_ether_addr(dev->dev_addr)) { 2552 /* eeprom values are valid so use them */ 2553 SMSC_TRACE(pdata, probe, 2554 "Mac Address is read from LAN911x EEPROM"); 2555 } else { 2556 /* eeprom values are invalid, generate random MAC */ 2557 eth_hw_addr_random(dev); 2558 smsc911x_set_hw_mac_address(pdata, dev->dev_addr); 2559 SMSC_TRACE(pdata, probe, 2560 "MAC Address is set to eth_random_addr"); 2561 } 2562 } 2563 2564 spin_unlock_irq(&pdata->mac_lock); 2565 2566 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr); 2567 2568 return 0; 2569 2570 out_unregister_netdev_5: 2571 unregister_netdev(dev); 2572 out_free_irq: 2573 free_irq(dev->irq, dev); 2574 out_disable_resources: 2575 (void)smsc911x_disable_resources(pdev); 2576 out_enable_resources_fail: 2577 smsc911x_free_resources(pdev); 2578 out_request_resources_fail: 2579 iounmap(pdata->ioaddr); 2580 free_netdev(dev); 2581 out_release_io_1: 2582 release_mem_region(res->start, resource_size(res)); 2583 out_0: 2584 return retval; 2585 } 2586 2587 #ifdef CONFIG_PM 2588 /* This implementation assumes the devices remains powered on its VDDVARIO 2589 * pins during suspend. */ 2590 2591 /* TODO: implement freeze/thaw callbacks for hibernation.*/ 2592 2593 static int smsc911x_suspend(struct device *dev) 2594 { 2595 struct net_device *ndev = dev_get_drvdata(dev); 2596 struct smsc911x_data *pdata = netdev_priv(ndev); 2597 2598 /* enable wake on LAN, energy detection and the external PME 2599 * signal. */ 2600 smsc911x_reg_write(pdata, PMT_CTRL, 2601 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ | 2602 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_); 2603 2604 return 0; 2605 } 2606 2607 static int smsc911x_resume(struct device *dev) 2608 { 2609 struct net_device *ndev = dev_get_drvdata(dev); 2610 struct smsc911x_data *pdata = netdev_priv(ndev); 2611 unsigned int to = 100; 2612 2613 /* Note 3.11 from the datasheet: 2614 * "When the LAN9220 is in a power saving state, a write of any 2615 * data to the BYTE_TEST register will wake-up the device." 2616 */ 2617 smsc911x_reg_write(pdata, BYTE_TEST, 0); 2618 2619 /* poll the READY bit in PMT_CTRL. Any other access to the device is 2620 * forbidden while this bit isn't set. Try for 100ms and return -EIO 2621 * if it failed. */ 2622 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) 2623 udelay(1000); 2624 2625 return (to == 0) ? -EIO : 0; 2626 } 2627 2628 static const struct dev_pm_ops smsc911x_pm_ops = { 2629 .suspend = smsc911x_suspend, 2630 .resume = smsc911x_resume, 2631 }; 2632 2633 #define SMSC911X_PM_OPS (&smsc911x_pm_ops) 2634 2635 #else 2636 #define SMSC911X_PM_OPS NULL 2637 #endif 2638 2639 #ifdef CONFIG_OF 2640 static const struct of_device_id smsc911x_dt_ids[] = { 2641 { .compatible = "smsc,lan9115", }, 2642 { /* sentinel */ } 2643 }; 2644 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids); 2645 #endif 2646 2647 static struct platform_driver smsc911x_driver = { 2648 .probe = smsc911x_drv_probe, 2649 .remove = smsc911x_drv_remove, 2650 .driver = { 2651 .name = SMSC_CHIPNAME, 2652 .owner = THIS_MODULE, 2653 .pm = SMSC911X_PM_OPS, 2654 .of_match_table = of_match_ptr(smsc911x_dt_ids), 2655 }, 2656 }; 2657 2658 /* Entry point for loading the module */ 2659 static int __init smsc911x_init_module(void) 2660 { 2661 SMSC_INITIALIZE(); 2662 return platform_driver_register(&smsc911x_driver); 2663 } 2664 2665 /* entry point for unloading the module */ 2666 static void __exit smsc911x_cleanup_module(void) 2667 { 2668 platform_driver_unregister(&smsc911x_driver); 2669 } 2670 2671 module_init(smsc911x_init_module); 2672 module_exit(smsc911x_cleanup_module); 2673