1 /*======================================================================
2 
3     A PCMCIA ethernet driver for SMC91c92-based cards.
4 
5     This driver supports Megahertz PCMCIA ethernet cards; and
6     Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7     multifunction cards.
8 
9     Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10 
11     smc91c92_cs.c 1.122 2002/10/25 06:26:39
12 
13     This driver contains code written by Donald Becker
14     (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15     David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16     (erik@vt.edu).  Donald wrote the SMC 91c92 code using parts of
17     Erik's SMC 91c94 driver.  Rowan wrote a similar driver, and I've
18     incorporated some parts of his driver here.  I (Dave) wrote most
19     of the PCMCIA glue code, and the Ositech support code.  Kelly
20     Stephens (kstephen@holli.com) added support for the Motorola
21     Mariner, with help from Allen Brost.
22 
23     This software may be used and distributed according to the terms of
24     the GNU General Public License, incorporated herein by reference.
25 
26 ======================================================================*/
27 
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29 
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/string.h>
34 #include <linux/timer.h>
35 #include <linux/interrupt.h>
36 #include <linux/delay.h>
37 #include <linux/crc32.h>
38 #include <linux/netdevice.h>
39 #include <linux/etherdevice.h>
40 #include <linux/skbuff.h>
41 #include <linux/if_arp.h>
42 #include <linux/ioport.h>
43 #include <linux/ethtool.h>
44 #include <linux/mii.h>
45 #include <linux/jiffies.h>
46 #include <linux/firmware.h>
47 
48 #include <pcmcia/cistpl.h>
49 #include <pcmcia/cisreg.h>
50 #include <pcmcia/ciscode.h>
51 #include <pcmcia/ds.h>
52 #include <pcmcia/ss.h>
53 
54 #include <asm/io.h>
55 #include <linux/uaccess.h>
56 
57 /*====================================================================*/
58 
59 static const char *if_names[] = { "auto", "10baseT", "10base2"};
60 
61 /* Firmware name */
62 #define FIRMWARE_NAME		"ositech/Xilinx7OD.bin"
63 
64 /* Module parameters */
65 
66 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67 MODULE_LICENSE("GPL");
68 MODULE_FIRMWARE(FIRMWARE_NAME);
69 
70 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71 
72 /*
73   Transceiver/media type.
74    0 = auto
75    1 = 10baseT (and autoselect if #define AUTOSELECT),
76    2 = AUI/10base2,
77 */
78 INT_MODULE_PARM(if_port, 0);
79 
80 
81 #define DRV_NAME	"smc91c92_cs"
82 #define DRV_VERSION	"1.123"
83 
84 /*====================================================================*/
85 
86 /* Operational parameter that usually are not changed. */
87 
88 /* Time in jiffies before concluding Tx hung */
89 #define TX_TIMEOUT		((400*HZ)/1000)
90 
91 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92 #define INTR_WORK		4
93 
94 /* Times to check the check the chip before concluding that it doesn't
95    currently have room for another Tx packet. */
96 #define MEMORY_WAIT_TIME       	8
97 
98 struct smc_private {
99 	struct pcmcia_device	*p_dev;
100     spinlock_t			lock;
101     u_short			manfid;
102     u_short			cardid;
103 
104     struct sk_buff		*saved_skb;
105     int				packets_waiting;
106     void			__iomem *base;
107     u_short			cfg;
108     struct timer_list		media;
109     int				watchdog, tx_err;
110     u_short			media_status;
111     u_short			fast_poll;
112     u_short			link_status;
113     struct mii_if_info		mii_if;
114     int				duplex;
115     int				rx_ovrn;
116     unsigned long		last_rx;
117 };
118 
119 /* Special definitions for Megahertz multifunction cards */
120 #define MEGAHERTZ_ISR		0x0380
121 
122 /* Special function registers for Motorola Mariner */
123 #define MOT_LAN			0x0000
124 #define MOT_UART		0x0020
125 #define MOT_EEPROM		0x20
126 
127 #define MOT_NORMAL \
128 (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129 
130 /* Special function registers for Ositech cards */
131 #define OSITECH_AUI_CTL		0x0c
132 #define OSITECH_PWRDOWN		0x0d
133 #define OSITECH_RESET		0x0e
134 #define OSITECH_ISR		0x0f
135 #define OSITECH_AUI_PWR		0x0c
136 #define OSITECH_RESET_ISR	0x0e
137 
138 #define OSI_AUI_PWR		0x40
139 #define OSI_LAN_PWRDOWN		0x02
140 #define OSI_MODEM_PWRDOWN	0x01
141 #define OSI_LAN_RESET		0x02
142 #define OSI_MODEM_RESET		0x01
143 
144 /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145 #define	BANK_SELECT		14		/* Window select register. */
146 #define SMC_SELECT_BANK(x)  { outw(x, ioaddr + BANK_SELECT); }
147 
148 /* Bank 0 registers. */
149 #define	TCR 		0	/* transmit control register */
150 #define	 TCR_CLEAR	0	/* do NOTHING */
151 #define  TCR_ENABLE	0x0001	/* if this is 1, we can transmit */
152 #define	 TCR_PAD_EN	0x0080	/* pads short packets to 64 bytes */
153 #define  TCR_MONCSN	0x0400  /* Monitor Carrier. */
154 #define  TCR_FDUPLX	0x0800  /* Full duplex mode. */
155 #define	 TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156 
157 #define EPH		2	/* Ethernet Protocol Handler report. */
158 #define  EPH_TX_SUC	0x0001
159 #define  EPH_SNGLCOL	0x0002
160 #define  EPH_MULCOL	0x0004
161 #define  EPH_LTX_MULT	0x0008
162 #define  EPH_16COL	0x0010
163 #define  EPH_SQET	0x0020
164 #define  EPH_LTX_BRD	0x0040
165 #define  EPH_TX_DEFR	0x0080
166 #define  EPH_LAT_COL	0x0200
167 #define  EPH_LOST_CAR	0x0400
168 #define  EPH_EXC_DEF	0x0800
169 #define  EPH_CTR_ROL	0x1000
170 #define  EPH_RX_OVRN	0x2000
171 #define  EPH_LINK_OK	0x4000
172 #define  EPH_TX_UNRN	0x8000
173 #define MEMINFO		8	/* Memory Information Register */
174 #define MEMCFG		10	/* Memory Configuration Register */
175 
176 /* Bank 1 registers. */
177 #define CONFIG			0
178 #define  CFG_MII_SELECT		0x8000	/* 91C100 only */
179 #define  CFG_NO_WAIT		0x1000
180 #define  CFG_FULL_STEP		0x0400
181 #define  CFG_SET_SQLCH		0x0200
182 #define  CFG_AUI_SELECT	 	0x0100
183 #define  CFG_16BIT		0x0080
184 #define  CFG_DIS_LINK		0x0040
185 #define  CFG_STATIC		0x0030
186 #define  CFG_IRQ_SEL_1		0x0004
187 #define  CFG_IRQ_SEL_0		0x0002
188 #define BASE_ADDR		2
189 #define	ADDR0			4
190 #define	GENERAL			10
191 #define	CONTROL			12
192 #define  CTL_STORE		0x0001
193 #define  CTL_RELOAD		0x0002
194 #define  CTL_EE_SELECT		0x0004
195 #define  CTL_TE_ENABLE		0x0020
196 #define  CTL_CR_ENABLE		0x0040
197 #define  CTL_LE_ENABLE		0x0080
198 #define  CTL_AUTO_RELEASE	0x0800
199 #define	 CTL_POWERDOWN		0x2000
200 
201 /* Bank 2 registers. */
202 #define MMU_CMD		0
203 #define	 MC_ALLOC	0x20  	/* or with number of 256 byte packets */
204 #define	 MC_RESET	0x40
205 #define  MC_RELEASE  	0x80  	/* remove and release the current rx packet */
206 #define  MC_FREEPKT  	0xA0  	/* Release packet in PNR register */
207 #define  MC_ENQUEUE	0xC0 	/* Enqueue the packet for transmit */
208 #define	PNR_ARR		2
209 #define FIFO_PORTS	4
210 #define  FP_RXEMPTY	0x8000
211 #define	POINTER		6
212 #define  PTR_AUTO_INC	0x0040
213 #define  PTR_READ	0x2000
214 #define	 PTR_AUTOINC 	0x4000
215 #define	 PTR_RCV	0x8000
216 #define	DATA_1		8
217 #define	INTERRUPT	12
218 #define  IM_RCV_INT		0x1
219 #define	 IM_TX_INT		0x2
220 #define	 IM_TX_EMPTY_INT	0x4
221 #define	 IM_ALLOC_INT		0x8
222 #define	 IM_RX_OVRN_INT		0x10
223 #define	 IM_EPH_INT		0x20
224 
225 #define	RCR		4
226 enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 	     RxEnable = 0x0100, RxStripCRC = 0x0200};
228 #define  RCR_SOFTRESET	0x8000 	/* resets the chip */
229 #define	 RCR_STRIP_CRC	0x200	/* strips CRC */
230 #define  RCR_ENABLE	0x100	/* IFF this is set, we can receive packets */
231 #define  RCR_ALMUL	0x4 	/* receive all multicast packets */
232 #define	 RCR_PROMISC	0x2	/* enable promiscuous mode */
233 
234 /* the normal settings for the RCR register : */
235 #define	 RCR_NORMAL	(RCR_STRIP_CRC | RCR_ENABLE)
236 #define  RCR_CLEAR	0x0		/* set it to a base state */
237 #define	COUNTER		6
238 
239 /* BANK 3 -- not the same values as in smc9194! */
240 #define	MULTICAST0	0
241 #define	MULTICAST2	2
242 #define	MULTICAST4	4
243 #define	MULTICAST6	6
244 #define MGMT    	8
245 #define REVISION	0x0a
246 
247 /* Transmit status bits. */
248 #define TS_SUCCESS 0x0001
249 #define TS_16COL   0x0010
250 #define TS_LATCOL  0x0200
251 #define TS_LOSTCAR 0x0400
252 
253 /* Receive status bits. */
254 #define RS_ALGNERR	0x8000
255 #define RS_BADCRC	0x2000
256 #define RS_ODDFRAME	0x1000
257 #define RS_TOOLONG	0x0800
258 #define RS_TOOSHORT	0x0400
259 #define RS_MULTICAST	0x0001
260 #define RS_ERRORS	(RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261 
262 #define set_bits(v, p) outw(inw(p)|(v), (p))
263 #define mask_bits(v, p) outw(inw(p)&(v), (p))
264 
265 /*====================================================================*/
266 
267 static void smc91c92_detach(struct pcmcia_device *p_dev);
268 static int smc91c92_config(struct pcmcia_device *link);
269 static void smc91c92_release(struct pcmcia_device *link);
270 
271 static int smc_open(struct net_device *dev);
272 static int smc_close(struct net_device *dev);
273 static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274 static void smc_tx_timeout(struct net_device *dev, unsigned int txqueue);
275 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 					struct net_device *dev);
277 static irqreturn_t smc_interrupt(int irq, void *dev_id);
278 static void smc_rx(struct net_device *dev);
279 static void set_rx_mode(struct net_device *dev);
280 static int s9k_config(struct net_device *dev, struct ifmap *map);
281 static void smc_set_xcvr(struct net_device *dev, int if_port);
282 static void smc_reset(struct net_device *dev);
283 static void media_check(struct timer_list *t);
284 static void mdio_sync(unsigned int addr);
285 static int mdio_read(struct net_device *dev, int phy_id, int loc);
286 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287 static int smc_link_ok(struct net_device *dev);
288 static const struct ethtool_ops ethtool_ops;
289 
290 static const struct net_device_ops smc_netdev_ops = {
291 	.ndo_open		= smc_open,
292 	.ndo_stop		= smc_close,
293 	.ndo_start_xmit		= smc_start_xmit,
294 	.ndo_tx_timeout 	= smc_tx_timeout,
295 	.ndo_set_config 	= s9k_config,
296 	.ndo_set_rx_mode	= set_rx_mode,
297 	.ndo_eth_ioctl		= smc_ioctl,
298 	.ndo_set_mac_address 	= eth_mac_addr,
299 	.ndo_validate_addr	= eth_validate_addr,
300 };
301 
302 static int smc91c92_probe(struct pcmcia_device *link)
303 {
304     struct smc_private *smc;
305     struct net_device *dev;
306 
307     dev_dbg(&link->dev, "smc91c92_attach()\n");
308 
309     /* Create new ethernet device */
310     dev = alloc_etherdev(sizeof(struct smc_private));
311     if (!dev)
312 	return -ENOMEM;
313     smc = netdev_priv(dev);
314     smc->p_dev = link;
315     link->priv = dev;
316 
317     spin_lock_init(&smc->lock);
318 
319     /* The SMC91c92-specific entries in the device structure. */
320     dev->netdev_ops = &smc_netdev_ops;
321     dev->ethtool_ops = &ethtool_ops;
322     dev->watchdog_timeo = TX_TIMEOUT;
323 
324     smc->mii_if.dev = dev;
325     smc->mii_if.mdio_read = mdio_read;
326     smc->mii_if.mdio_write = mdio_write;
327     smc->mii_if.phy_id_mask = 0x1f;
328     smc->mii_if.reg_num_mask = 0x1f;
329 
330     return smc91c92_config(link);
331 } /* smc91c92_attach */
332 
333 static void smc91c92_detach(struct pcmcia_device *link)
334 {
335     struct net_device *dev = link->priv;
336 
337     dev_dbg(&link->dev, "smc91c92_detach\n");
338 
339     unregister_netdev(dev);
340 
341     smc91c92_release(link);
342 
343     free_netdev(dev);
344 } /* smc91c92_detach */
345 
346 /*====================================================================*/
347 
348 static int cvt_ascii_address(struct net_device *dev, char *s)
349 {
350     u8 mac[ETH_ALEN];
351     int i, j, da, c;
352 
353     if (strlen(s) != 12)
354 	return -1;
355     for (i = 0; i < 6; i++) {
356 	da = 0;
357 	for (j = 0; j < 2; j++) {
358 	    c = *s++;
359 	    da <<= 4;
360 	    da += ((c >= '0') && (c <= '9')) ?
361 		(c - '0') : ((c & 0x0f) + 9);
362 	}
363 	mac[i] = da;
364     }
365     eth_hw_addr_set(dev, mac);
366     return 0;
367 }
368 
369 /*====================================================================
370 
371     Configuration stuff for Megahertz cards
372 
373     mhz_3288_power() is used to power up a 3288's ethernet chip.
374     mhz_mfc_config() handles socket setup for multifunction (1144
375     and 3288) cards.  mhz_setup() gets a card's hardware ethernet
376     address.
377 
378 ======================================================================*/
379 
380 static int mhz_3288_power(struct pcmcia_device *link)
381 {
382     struct net_device *dev = link->priv;
383     struct smc_private *smc = netdev_priv(dev);
384     u_char tmp;
385 
386     /* Read the ISR twice... */
387     readb(smc->base+MEGAHERTZ_ISR);
388     udelay(5);
389     readb(smc->base+MEGAHERTZ_ISR);
390 
391     /* Pause 200ms... */
392     mdelay(200);
393 
394     /* Now read and write the COR... */
395     tmp = readb(smc->base + link->config_base + CISREG_COR);
396     udelay(5);
397     writeb(tmp, smc->base + link->config_base + CISREG_COR);
398 
399     return 0;
400 }
401 
402 static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
403 {
404 	int k;
405 	p_dev->io_lines = 16;
406 	p_dev->resource[1]->start = p_dev->resource[0]->start;
407 	p_dev->resource[1]->end = 8;
408 	p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
409 	p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
410 	p_dev->resource[0]->end = 16;
411 	p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
412 	p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
413 	for (k = 0; k < 0x400; k += 0x10) {
414 		if (k & 0x80)
415 			continue;
416 		p_dev->resource[0]->start = k ^ 0x300;
417 		if (!pcmcia_request_io(p_dev))
418 			return 0;
419 	}
420 	return -ENODEV;
421 }
422 
423 static int mhz_mfc_config(struct pcmcia_device *link)
424 {
425     struct net_device *dev = link->priv;
426     struct smc_private *smc = netdev_priv(dev);
427     unsigned int offset;
428     int i;
429 
430     link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
431 	    CONF_AUTO_SET_IO;
432 
433     /* The Megahertz combo cards have modem-like CIS entries, so
434        we have to explicitly try a bunch of port combinations. */
435     if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
436 	    return -ENODEV;
437 
438     dev->base_addr = link->resource[0]->start;
439 
440     /* Allocate a memory window, for accessing the ISR */
441     link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
442     link->resource[2]->start = link->resource[2]->end = 0;
443     i = pcmcia_request_window(link, link->resource[2], 0);
444     if (i != 0)
445 	    return -ENODEV;
446 
447     smc->base = ioremap(link->resource[2]->start,
448 		    resource_size(link->resource[2]));
449     offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
450     i = pcmcia_map_mem_page(link, link->resource[2], offset);
451     if ((i == 0) &&
452 	(smc->manfid == MANFID_MEGAHERTZ) &&
453 	(smc->cardid == PRODID_MEGAHERTZ_EM3288))
454 	    mhz_3288_power(link);
455 
456     return 0;
457 }
458 
459 static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
460 			      tuple_t *tuple,
461 			      void *priv)
462 {
463 	struct net_device *dev = priv;
464 	cisparse_t parse;
465 	u8 *buf;
466 
467 	if (pcmcia_parse_tuple(tuple, &parse))
468 		return -EINVAL;
469 
470 	buf = parse.version_1.str + parse.version_1.ofs[3];
471 
472 	if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
473 		return 0;
474 
475 	return -EINVAL;
476 };
477 
478 static int mhz_setup(struct pcmcia_device *link)
479 {
480     struct net_device *dev = link->priv;
481     size_t len;
482     u8 *buf;
483     int rc;
484 
485     /* Read the station address from the CIS.  It is stored as the last
486        (fourth) string in the Version 1 Version/ID tuple. */
487     if ((link->prod_id[3]) &&
488 	(cvt_ascii_address(dev, link->prod_id[3]) == 0))
489 	    return 0;
490 
491     /* Workarounds for broken cards start here. */
492     /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
493     if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
494 	    return 0;
495 
496     /* Another possibility: for the EM3288, in a special tuple */
497     rc = -1;
498     len = pcmcia_get_tuple(link, 0x81, &buf);
499     if (buf && len >= 13) {
500 	    buf[12] = '\0';
501 	    if (cvt_ascii_address(dev, buf) == 0)
502 		    rc = 0;
503     }
504     kfree(buf);
505 
506     return rc;
507 };
508 
509 /*======================================================================
510 
511     Configuration stuff for the Motorola Mariner
512 
513     mot_config() writes directly to the Mariner configuration
514     registers because the CIS is just bogus.
515 
516 ======================================================================*/
517 
518 static void mot_config(struct pcmcia_device *link)
519 {
520     struct net_device *dev = link->priv;
521     struct smc_private *smc = netdev_priv(dev);
522     unsigned int ioaddr = dev->base_addr;
523     unsigned int iouart = link->resource[1]->start;
524 
525     /* Set UART base address and force map with COR bit 1 */
526     writeb(iouart & 0xff,        smc->base + MOT_UART + CISREG_IOBASE_0);
527     writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
528     writeb(MOT_NORMAL,           smc->base + MOT_UART + CISREG_COR);
529 
530     /* Set SMC base address and force map with COR bit 1 */
531     writeb(ioaddr & 0xff,        smc->base + MOT_LAN + CISREG_IOBASE_0);
532     writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
533     writeb(MOT_NORMAL,           smc->base + MOT_LAN + CISREG_COR);
534 
535     /* Wait for things to settle down */
536     mdelay(100);
537 }
538 
539 static int mot_setup(struct pcmcia_device *link)
540 {
541     struct net_device *dev = link->priv;
542     unsigned int ioaddr = dev->base_addr;
543     int i, wait, loop;
544     u8 mac[ETH_ALEN];
545     u_int addr;
546 
547     /* Read Ethernet address from Serial EEPROM */
548 
549     for (i = 0; i < 3; i++) {
550 	SMC_SELECT_BANK(2);
551 	outw(MOT_EEPROM + i, ioaddr + POINTER);
552 	SMC_SELECT_BANK(1);
553 	outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
554 
555 	for (loop = wait = 0; loop < 200; loop++) {
556 	    udelay(10);
557 	    wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
558 	    if (wait == 0) break;
559 	}
560 
561 	if (wait)
562 	    return -1;
563 
564 	addr = inw(ioaddr + GENERAL);
565 	mac[2*i]   = addr & 0xff;
566 	mac[2*i+1] = (addr >> 8) & 0xff;
567     }
568     eth_hw_addr_set(dev, mac);
569 
570     return 0;
571 }
572 
573 /*====================================================================*/
574 
575 static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
576 {
577 	p_dev->resource[0]->end = 16;
578 	p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
579 	p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
580 
581 	return pcmcia_request_io(p_dev);
582 }
583 
584 static int smc_config(struct pcmcia_device *link)
585 {
586     struct net_device *dev = link->priv;
587     int i;
588 
589     link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
590 
591     i = pcmcia_loop_config(link, smc_configcheck, NULL);
592     if (!i)
593 	    dev->base_addr = link->resource[0]->start;
594 
595     return i;
596 }
597 
598 
599 static int smc_setup(struct pcmcia_device *link)
600 {
601     struct net_device *dev = link->priv;
602 
603     /* Check for a LAN function extension tuple */
604     if (!pcmcia_get_mac_from_cis(link, dev))
605 	    return 0;
606 
607     /* Try the third string in the Version 1 Version/ID tuple. */
608     if (link->prod_id[2]) {
609 	    if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
610 		    return 0;
611     }
612     return -1;
613 }
614 
615 /*====================================================================*/
616 
617 static int osi_config(struct pcmcia_device *link)
618 {
619     struct net_device *dev = link->priv;
620     static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
621     int i, j;
622 
623     link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
624     link->resource[0]->end = 64;
625     link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
626     link->resource[1]->end = 8;
627 
628     /* Enable Hard Decode, LAN, Modem */
629     link->io_lines = 16;
630     link->config_index = 0x23;
631 
632     for (i = j = 0; j < 4; j++) {
633 	link->resource[1]->start = com[j];
634 	i = pcmcia_request_io(link);
635 	if (i == 0)
636 		break;
637     }
638     if (i != 0) {
639 	/* Fallback: turn off hard decode */
640 	link->config_index = 0x03;
641 	link->resource[1]->end = 0;
642 	i = pcmcia_request_io(link);
643     }
644     dev->base_addr = link->resource[0]->start + 0x10;
645     return i;
646 }
647 
648 static int osi_load_firmware(struct pcmcia_device *link)
649 {
650 	const struct firmware *fw;
651 	int i, err;
652 
653 	err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
654 	if (err) {
655 		pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
656 		return err;
657 	}
658 
659 	/* Download the Seven of Diamonds firmware */
660 	for (i = 0; i < fw->size; i++) {
661 	    outb(fw->data[i], link->resource[0]->start + 2);
662 	    udelay(50);
663 	}
664 	release_firmware(fw);
665 	return err;
666 }
667 
668 static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
669 			  tuple_t *tuple,
670 			  void *priv)
671 {
672 	struct net_device *dev = priv;
673 
674 	if (tuple->TupleDataLen < 8)
675 		return -EINVAL;
676 	if (tuple->TupleData[0] != 0x04)
677 		return -EINVAL;
678 
679 	eth_hw_addr_set(dev, &tuple->TupleData[2]);
680 	return 0;
681 };
682 
683 
684 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
685 {
686     struct net_device *dev = link->priv;
687     int rc;
688 
689     /* Read the station address from tuple 0x90, subtuple 0x04 */
690     if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
691 	    return -1;
692 
693     if (((manfid == MANFID_OSITECH) &&
694 	 (cardid == PRODID_OSITECH_SEVEN)) ||
695 	((manfid == MANFID_PSION) &&
696 	 (cardid == PRODID_PSION_NET100))) {
697 	rc = osi_load_firmware(link);
698 	if (rc)
699 		return rc;
700     } else if (manfid == MANFID_OSITECH) {
701 	/* Make sure both functions are powered up */
702 	set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
703 	/* Now, turn on the interrupt for both card functions */
704 	set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
705 	dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
706 	      inw(link->resource[0]->start + OSITECH_AUI_PWR),
707 	      inw(link->resource[0]->start + OSITECH_RESET_ISR));
708     }
709     return 0;
710 }
711 
712 static int smc91c92_suspend(struct pcmcia_device *link)
713 {
714 	struct net_device *dev = link->priv;
715 
716 	if (link->open)
717 		netif_device_detach(dev);
718 
719 	return 0;
720 }
721 
722 static int smc91c92_resume(struct pcmcia_device *link)
723 {
724 	struct net_device *dev = link->priv;
725 	struct smc_private *smc = netdev_priv(dev);
726 	int i;
727 
728 	if ((smc->manfid == MANFID_MEGAHERTZ) &&
729 	    (smc->cardid == PRODID_MEGAHERTZ_EM3288))
730 		mhz_3288_power(link);
731 	if (smc->manfid == MANFID_MOTOROLA)
732 		mot_config(link);
733 	if ((smc->manfid == MANFID_OSITECH) &&
734 	    (smc->cardid != PRODID_OSITECH_SEVEN)) {
735 		/* Power up the card and enable interrupts */
736 		set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
737 		set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
738 	}
739 	if (((smc->manfid == MANFID_OSITECH) &&
740 	     (smc->cardid == PRODID_OSITECH_SEVEN)) ||
741 	    ((smc->manfid == MANFID_PSION) &&
742 	     (smc->cardid == PRODID_PSION_NET100))) {
743 		i = osi_load_firmware(link);
744 		if (i) {
745 			netdev_err(dev, "Failed to load firmware\n");
746 			return i;
747 		}
748 	}
749 	if (link->open) {
750 		smc_reset(dev);
751 		netif_device_attach(dev);
752 	}
753 
754 	return 0;
755 }
756 
757 
758 /*======================================================================
759 
760     This verifies that the chip is some SMC91cXX variant, and returns
761     the revision code if successful.  Otherwise, it returns -ENODEV.
762 
763 ======================================================================*/
764 
765 static int check_sig(struct pcmcia_device *link)
766 {
767     struct net_device *dev = link->priv;
768     unsigned int ioaddr = dev->base_addr;
769     int width;
770     u_short s;
771 
772     SMC_SELECT_BANK(1);
773     if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
774 	/* Try powering up the chip */
775 	outw(0, ioaddr + CONTROL);
776 	mdelay(55);
777     }
778 
779     /* Try setting bus width */
780     width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
781     s = inb(ioaddr + CONFIG);
782     if (width)
783 	s |= CFG_16BIT;
784     else
785 	s &= ~CFG_16BIT;
786     outb(s, ioaddr + CONFIG);
787 
788     /* Check Base Address Register to make sure bus width is OK */
789     s = inw(ioaddr + BASE_ADDR);
790     if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
791 	((s >> 8) != (s & 0xff))) {
792 	SMC_SELECT_BANK(3);
793 	s = inw(ioaddr + REVISION);
794 	return s & 0xff;
795     }
796 
797     if (width) {
798 	    netdev_info(dev, "using 8-bit IO window\n");
799 
800 	    smc91c92_suspend(link);
801 	    pcmcia_fixup_iowidth(link);
802 	    smc91c92_resume(link);
803 	    return check_sig(link);
804     }
805     return -ENODEV;
806 }
807 
808 static int smc91c92_config(struct pcmcia_device *link)
809 {
810     struct net_device *dev = link->priv;
811     struct smc_private *smc = netdev_priv(dev);
812     char *name;
813     int i, rev, j = 0;
814     unsigned int ioaddr;
815     u_long mir;
816 
817     dev_dbg(&link->dev, "smc91c92_config\n");
818 
819     smc->manfid = link->manf_id;
820     smc->cardid = link->card_id;
821 
822     if ((smc->manfid == MANFID_OSITECH) &&
823 	(smc->cardid != PRODID_OSITECH_SEVEN)) {
824 	i = osi_config(link);
825     } else if ((smc->manfid == MANFID_MOTOROLA) ||
826 	       ((smc->manfid == MANFID_MEGAHERTZ) &&
827 		((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
828 		 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
829 	i = mhz_mfc_config(link);
830     } else {
831 	i = smc_config(link);
832     }
833     if (i)
834 	    goto config_failed;
835 
836     i = pcmcia_request_irq(link, smc_interrupt);
837     if (i)
838 	    goto config_failed;
839     i = pcmcia_enable_device(link);
840     if (i)
841 	    goto config_failed;
842 
843     if (smc->manfid == MANFID_MOTOROLA)
844 	mot_config(link);
845 
846     dev->irq = link->irq;
847 
848     if ((if_port >= 0) && (if_port <= 2))
849 	dev->if_port = if_port;
850     else
851 	dev_notice(&link->dev, "invalid if_port requested\n");
852 
853     switch (smc->manfid) {
854     case MANFID_OSITECH:
855     case MANFID_PSION:
856 	i = osi_setup(link, smc->manfid, smc->cardid); break;
857     case MANFID_SMC:
858     case MANFID_NEW_MEDIA:
859 	i = smc_setup(link); break;
860     case 0x128: /* For broken Megahertz cards */
861     case MANFID_MEGAHERTZ:
862 	i = mhz_setup(link); break;
863     case MANFID_MOTOROLA:
864     default: /* get the hw address from EEPROM */
865 	i = mot_setup(link); break;
866     }
867 
868     if (i != 0) {
869 	dev_notice(&link->dev, "Unable to find hardware address.\n");
870 	goto config_failed;
871     }
872 
873     smc->duplex = 0;
874     smc->rx_ovrn = 0;
875 
876     rev = check_sig(link);
877     name = "???";
878     if (rev > 0)
879 	switch (rev >> 4) {
880 	case 3: name = "92"; break;
881 	case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
882 	case 5: name = "95"; break;
883 	case 7: name = "100"; break;
884 	case 8: name = "100-FD"; break;
885 	case 9: name = "110"; break;
886 	}
887 
888     ioaddr = dev->base_addr;
889     if (rev > 0) {
890 	u_long mcr;
891 	SMC_SELECT_BANK(0);
892 	mir = inw(ioaddr + MEMINFO) & 0xff;
893 	if (mir == 0xff) mir++;
894 	/* Get scale factor for memory size */
895 	mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
896 	mir *= 128 * (1<<((mcr >> 9) & 7));
897 	SMC_SELECT_BANK(1);
898 	smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
899 	smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
900 	if (smc->manfid == MANFID_OSITECH)
901 	    smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
902 	if ((rev >> 4) >= 7)
903 	    smc->cfg |= CFG_MII_SELECT;
904     } else
905 	mir = 0;
906 
907     if (smc->cfg & CFG_MII_SELECT) {
908 	SMC_SELECT_BANK(3);
909 
910 	for (i = 0; i < 32; i++) {
911 	    j = mdio_read(dev, i, 1);
912 	    if ((j != 0) && (j != 0xffff)) break;
913 	}
914 	smc->mii_if.phy_id = (i < 32) ? i : -1;
915 
916 	SMC_SELECT_BANK(0);
917     }
918 
919     SET_NETDEV_DEV(dev, &link->dev);
920 
921     if (register_netdev(dev) != 0) {
922 	dev_err(&link->dev, "register_netdev() failed\n");
923 	goto config_undo;
924     }
925 
926     netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
927 		name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
928 
929     if (rev > 0) {
930 	if (mir & 0x3ff)
931 	    netdev_info(dev, "  %lu byte", mir);
932 	else
933 	    netdev_info(dev, "  %lu kb", mir>>10);
934 	pr_cont(" buffer, %s xcvr\n",
935 		(smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
936     }
937 
938     if (smc->cfg & CFG_MII_SELECT) {
939 	if (smc->mii_if.phy_id != -1) {
940 	    netdev_dbg(dev, "  MII transceiver at index %d, status %x\n",
941 		       smc->mii_if.phy_id, j);
942 	} else {
943 	    netdev_notice(dev, "  No MII transceivers found!\n");
944 	}
945     }
946     return 0;
947 
948 config_undo:
949     unregister_netdev(dev);
950 config_failed:
951     smc91c92_release(link);
952     free_netdev(dev);
953     return -ENODEV;
954 } /* smc91c92_config */
955 
956 static void smc91c92_release(struct pcmcia_device *link)
957 {
958 	dev_dbg(&link->dev, "smc91c92_release\n");
959 	if (link->resource[2]->end) {
960 		struct net_device *dev = link->priv;
961 		struct smc_private *smc = netdev_priv(dev);
962 		iounmap(smc->base);
963 	}
964 	pcmcia_disable_device(link);
965 }
966 
967 /*======================================================================
968 
969     MII interface support for SMC91cXX based cards
970 ======================================================================*/
971 
972 #define MDIO_SHIFT_CLK		0x04
973 #define MDIO_DATA_OUT		0x01
974 #define MDIO_DIR_WRITE		0x08
975 #define MDIO_DATA_WRITE0	(MDIO_DIR_WRITE)
976 #define MDIO_DATA_WRITE1	(MDIO_DIR_WRITE | MDIO_DATA_OUT)
977 #define MDIO_DATA_READ		0x02
978 
979 static void mdio_sync(unsigned int addr)
980 {
981     int bits;
982     for (bits = 0; bits < 32; bits++) {
983 	outb(MDIO_DATA_WRITE1, addr);
984 	outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
985     }
986 }
987 
988 static int mdio_read(struct net_device *dev, int phy_id, int loc)
989 {
990     unsigned int addr = dev->base_addr + MGMT;
991     u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
992     int i, retval = 0;
993 
994     mdio_sync(addr);
995     for (i = 13; i >= 0; i--) {
996 	int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
997 	outb(dat, addr);
998 	outb(dat | MDIO_SHIFT_CLK, addr);
999     }
1000     for (i = 19; i > 0; i--) {
1001 	outb(0, addr);
1002 	retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1003 	outb(MDIO_SHIFT_CLK, addr);
1004     }
1005     return (retval>>1) & 0xffff;
1006 }
1007 
1008 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1009 {
1010     unsigned int addr = dev->base_addr + MGMT;
1011     u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1012     int i;
1013 
1014     mdio_sync(addr);
1015     for (i = 31; i >= 0; i--) {
1016 	int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1017 	outb(dat, addr);
1018 	outb(dat | MDIO_SHIFT_CLK, addr);
1019     }
1020     for (i = 1; i >= 0; i--) {
1021 	outb(0, addr);
1022 	outb(MDIO_SHIFT_CLK, addr);
1023     }
1024 }
1025 
1026 /*======================================================================
1027 
1028     The driver core code, most of which should be common with a
1029     non-PCMCIA implementation.
1030 
1031 ======================================================================*/
1032 
1033 #ifdef PCMCIA_DEBUG
1034 static void smc_dump(struct net_device *dev)
1035 {
1036     unsigned int ioaddr = dev->base_addr;
1037     u_short i, w, save;
1038     save = inw(ioaddr + BANK_SELECT);
1039     for (w = 0; w < 4; w++) {
1040 	SMC_SELECT_BANK(w);
1041 	netdev_dbg(dev, "bank %d: ", w);
1042 	for (i = 0; i < 14; i += 2)
1043 	    pr_cont(" %04x", inw(ioaddr + i));
1044 	pr_cont("\n");
1045     }
1046     outw(save, ioaddr + BANK_SELECT);
1047 }
1048 #endif
1049 
1050 static int smc_open(struct net_device *dev)
1051 {
1052     struct smc_private *smc = netdev_priv(dev);
1053     struct pcmcia_device *link = smc->p_dev;
1054 
1055     dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1056 	  dev->name, dev, inw(dev->base_addr + BANK_SELECT));
1057 #ifdef PCMCIA_DEBUG
1058     smc_dump(dev);
1059 #endif
1060 
1061     /* Check that the PCMCIA card is still here. */
1062     if (!pcmcia_dev_present(link))
1063 	return -ENODEV;
1064     /* Physical device present signature. */
1065     if (check_sig(link) < 0) {
1066 	netdev_info(dev, "Yikes!  Bad chip signature!\n");
1067 	return -ENODEV;
1068     }
1069     link->open++;
1070 
1071     netif_start_queue(dev);
1072     smc->saved_skb = NULL;
1073     smc->packets_waiting = 0;
1074 
1075     smc_reset(dev);
1076     timer_setup(&smc->media, media_check, 0);
1077     mod_timer(&smc->media, jiffies + HZ);
1078 
1079     return 0;
1080 } /* smc_open */
1081 
1082 /*====================================================================*/
1083 
1084 static int smc_close(struct net_device *dev)
1085 {
1086     struct smc_private *smc = netdev_priv(dev);
1087     struct pcmcia_device *link = smc->p_dev;
1088     unsigned int ioaddr = dev->base_addr;
1089 
1090     dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1091 	  dev->name, inw(ioaddr + BANK_SELECT));
1092 
1093     netif_stop_queue(dev);
1094 
1095     /* Shut off all interrupts, and turn off the Tx and Rx sections.
1096        Don't bother to check for chip present. */
1097     SMC_SELECT_BANK(2);	/* Nominally paranoia, but do no assume... */
1098     outw(0, ioaddr + INTERRUPT);
1099     SMC_SELECT_BANK(0);
1100     mask_bits(0xff00, ioaddr + RCR);
1101     mask_bits(0xff00, ioaddr + TCR);
1102 
1103     /* Put the chip into power-down mode. */
1104     SMC_SELECT_BANK(1);
1105     outw(CTL_POWERDOWN, ioaddr + CONTROL );
1106 
1107     link->open--;
1108     del_timer_sync(&smc->media);
1109 
1110     return 0;
1111 } /* smc_close */
1112 
1113 /*======================================================================
1114 
1115    Transfer a packet to the hardware and trigger the packet send.
1116    This may be called at either from either the Tx queue code
1117    or the interrupt handler.
1118 
1119 ======================================================================*/
1120 
1121 static void smc_hardware_send_packet(struct net_device * dev)
1122 {
1123     struct smc_private *smc = netdev_priv(dev);
1124     struct sk_buff *skb = smc->saved_skb;
1125     unsigned int ioaddr = dev->base_addr;
1126     u_char packet_no;
1127 
1128     if (!skb) {
1129 	netdev_err(dev, "In XMIT with no packet to send\n");
1130 	return;
1131     }
1132 
1133     /* There should be a packet slot waiting. */
1134     packet_no = inw(ioaddr + PNR_ARR) >> 8;
1135     if (packet_no & 0x80) {
1136 	/* If not, there is a hardware problem!  Likely an ejected card. */
1137 	netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1138 		    packet_no);
1139 	dev_kfree_skb_irq(skb);
1140 	smc->saved_skb = NULL;
1141 	netif_start_queue(dev);
1142 	return;
1143     }
1144 
1145     dev->stats.tx_bytes += skb->len;
1146     /* The card should use the just-allocated buffer. */
1147     outw(packet_no, ioaddr + PNR_ARR);
1148     /* point to the beginning of the packet */
1149     outw(PTR_AUTOINC , ioaddr + POINTER);
1150 
1151     /* Send the packet length (+6 for status, length and ctl byte)
1152        and the status word (set to zeros). */
1153     {
1154 	u_char *buf = skb->data;
1155 	u_int length = skb->len; /* The chip will pad to ethernet min. */
1156 
1157 	netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1158 
1159 	/* send the packet length: +6 for status word, length, and ctl */
1160 	outw(0, ioaddr + DATA_1);
1161 	outw(length + 6, ioaddr + DATA_1);
1162 	outsw(ioaddr + DATA_1, buf, length >> 1);
1163 
1164 	/* The odd last byte, if there is one, goes in the control word. */
1165 	outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1166     }
1167 
1168     /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1169     outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1170 	 (inw(ioaddr + INTERRUPT) & 0xff00),
1171 	 ioaddr + INTERRUPT);
1172 
1173     /* The chip does the rest of the work. */
1174     outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1175 
1176     smc->saved_skb = NULL;
1177     dev_kfree_skb_irq(skb);
1178     netif_trans_update(dev);
1179     netif_start_queue(dev);
1180 }
1181 
1182 /*====================================================================*/
1183 
1184 static void smc_tx_timeout(struct net_device *dev, unsigned int txqueue)
1185 {
1186     struct smc_private *smc = netdev_priv(dev);
1187     unsigned int ioaddr = dev->base_addr;
1188 
1189     netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1190 		  inw(ioaddr)&0xff, inw(ioaddr + 2));
1191     dev->stats.tx_errors++;
1192     smc_reset(dev);
1193     netif_trans_update(dev); /* prevent tx timeout */
1194     smc->saved_skb = NULL;
1195     netif_wake_queue(dev);
1196 }
1197 
1198 static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1199 					struct net_device *dev)
1200 {
1201     struct smc_private *smc = netdev_priv(dev);
1202     unsigned int ioaddr = dev->base_addr;
1203     u_short num_pages;
1204     short time_out, ir;
1205     unsigned long flags;
1206 
1207     netif_stop_queue(dev);
1208 
1209     netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1210 	       skb->len, inw(ioaddr + 2));
1211 
1212     if (smc->saved_skb) {
1213 	/* THIS SHOULD NEVER HAPPEN. */
1214 	dev->stats.tx_aborted_errors++;
1215 	netdev_dbg(dev, "Internal error -- sent packet while busy\n");
1216 	return NETDEV_TX_BUSY;
1217     }
1218     smc->saved_skb = skb;
1219 
1220     num_pages = skb->len >> 8;
1221 
1222     if (num_pages > 7) {
1223 	netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1224 	dev_kfree_skb (skb);
1225 	smc->saved_skb = NULL;
1226 	dev->stats.tx_dropped++;
1227 	return NETDEV_TX_OK;		/* Do not re-queue this packet. */
1228     }
1229     /* A packet is now waiting. */
1230     smc->packets_waiting++;
1231 
1232     spin_lock_irqsave(&smc->lock, flags);
1233     SMC_SELECT_BANK(2);	/* Paranoia, we should always be in window 2 */
1234 
1235     /* need MC_RESET to keep the memory consistent. errata? */
1236     if (smc->rx_ovrn) {
1237 	outw(MC_RESET, ioaddr + MMU_CMD);
1238 	smc->rx_ovrn = 0;
1239     }
1240 
1241     /* Allocate the memory; send the packet now if we win. */
1242     outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1243     for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1244 	ir = inw(ioaddr+INTERRUPT);
1245 	if (ir & IM_ALLOC_INT) {
1246 	    /* Acknowledge the interrupt, send the packet. */
1247 	    outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1248 	    smc_hardware_send_packet(dev);	/* Send the packet now.. */
1249 	    spin_unlock_irqrestore(&smc->lock, flags);
1250 	    return NETDEV_TX_OK;
1251 	}
1252     }
1253 
1254     /* Otherwise defer until the Tx-space-allocated interrupt. */
1255     netdev_dbg(dev, "memory allocation deferred.\n");
1256     outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
1257     spin_unlock_irqrestore(&smc->lock, flags);
1258 
1259     return NETDEV_TX_OK;
1260 }
1261 
1262 /*======================================================================
1263 
1264     Handle a Tx anomalous event.  Entered while in Window 2.
1265 
1266 ======================================================================*/
1267 
1268 static void smc_tx_err(struct net_device * dev)
1269 {
1270     struct smc_private *smc = netdev_priv(dev);
1271     unsigned int ioaddr = dev->base_addr;
1272     int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1273     int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1274     int tx_status;
1275 
1276     /* select this as the packet to read from */
1277     outw(packet_no, ioaddr + PNR_ARR);
1278 
1279     /* read the first word from this packet */
1280     outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1281 
1282     tx_status = inw(ioaddr + DATA_1);
1283 
1284     dev->stats.tx_errors++;
1285     if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1286     if (tx_status & TS_LATCOL)  dev->stats.tx_window_errors++;
1287     if (tx_status & TS_16COL) {
1288 	dev->stats.tx_aborted_errors++;
1289 	smc->tx_err++;
1290     }
1291 
1292     if (tx_status & TS_SUCCESS) {
1293 	netdev_notice(dev, "Successful packet caused error interrupt?\n");
1294     }
1295     /* re-enable transmit */
1296     SMC_SELECT_BANK(0);
1297     outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1298     SMC_SELECT_BANK(2);
1299 
1300     outw(MC_FREEPKT, ioaddr + MMU_CMD); 	/* Free the packet memory. */
1301 
1302     /* one less packet waiting for me */
1303     smc->packets_waiting--;
1304 
1305     outw(saved_packet, ioaddr + PNR_ARR);
1306 }
1307 
1308 /*====================================================================*/
1309 
1310 static void smc_eph_irq(struct net_device *dev)
1311 {
1312     struct smc_private *smc = netdev_priv(dev);
1313     unsigned int ioaddr = dev->base_addr;
1314     u_short card_stats, ephs;
1315 
1316     SMC_SELECT_BANK(0);
1317     ephs = inw(ioaddr + EPH);
1318     netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n",
1319 	       ephs);
1320     /* Could be a counter roll-over warning: update stats. */
1321     card_stats = inw(ioaddr + COUNTER);
1322     /* single collisions */
1323     dev->stats.collisions += card_stats & 0xF;
1324     card_stats >>= 4;
1325     /* multiple collisions */
1326     dev->stats.collisions += card_stats & 0xF;
1327 #if 0 		/* These are for when linux supports these statistics */
1328     card_stats >>= 4;			/* deferred */
1329     card_stats >>= 4;			/* excess deferred */
1330 #endif
1331     /* If we had a transmit error we must re-enable the transmitter. */
1332     outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1333 
1334     /* Clear a link error interrupt. */
1335     SMC_SELECT_BANK(1);
1336     outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1337     outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1338 	 ioaddr + CONTROL);
1339     SMC_SELECT_BANK(2);
1340 }
1341 
1342 /*====================================================================*/
1343 
1344 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1345 {
1346     struct net_device *dev = dev_id;
1347     struct smc_private *smc = netdev_priv(dev);
1348     unsigned int ioaddr;
1349     u_short saved_bank, saved_pointer, mask, status;
1350     unsigned int handled = 1;
1351     char bogus_cnt = INTR_WORK;		/* Work we are willing to do. */
1352 
1353     if (!netif_device_present(dev))
1354 	return IRQ_NONE;
1355 
1356     ioaddr = dev->base_addr;
1357 
1358     netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n",
1359 	       irq, ioaddr);
1360 
1361     spin_lock(&smc->lock);
1362     smc->watchdog = 0;
1363     saved_bank = inw(ioaddr + BANK_SELECT);
1364     if ((saved_bank & 0xff00) != 0x3300) {
1365 	/* The device does not exist -- the card could be off-line, or
1366 	   maybe it has been ejected. */
1367 	netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n",
1368 		   irq);
1369 	handled = 0;
1370 	goto irq_done;
1371     }
1372 
1373     SMC_SELECT_BANK(2);
1374     saved_pointer = inw(ioaddr + POINTER);
1375     mask = inw(ioaddr + INTERRUPT) >> 8;
1376     /* clear all interrupts */
1377     outw(0, ioaddr + INTERRUPT);
1378 
1379     do { /* read the status flag, and mask it */
1380 	status = inw(ioaddr + INTERRUPT) & 0xff;
1381 	netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n",
1382 		   status, mask);
1383 	if ((status & mask) == 0) {
1384 	    if (bogus_cnt == INTR_WORK)
1385 		handled = 0;
1386 	    break;
1387 	}
1388 	if (status & IM_RCV_INT) {
1389 	    /* Got a packet(s). */
1390 	    smc_rx(dev);
1391 	}
1392 	if (status & IM_TX_INT) {
1393 	    smc_tx_err(dev);
1394 	    outw(IM_TX_INT, ioaddr + INTERRUPT);
1395 	}
1396 	status &= mask;
1397 	if (status & IM_TX_EMPTY_INT) {
1398 	    outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1399 	    mask &= ~IM_TX_EMPTY_INT;
1400 	    dev->stats.tx_packets += smc->packets_waiting;
1401 	    smc->packets_waiting = 0;
1402 	}
1403 	if (status & IM_ALLOC_INT) {
1404 	    /* Clear this interrupt so it doesn't happen again */
1405 	    mask &= ~IM_ALLOC_INT;
1406 
1407 	    smc_hardware_send_packet(dev);
1408 
1409 	    /* enable xmit interrupts based on this */
1410 	    mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1411 
1412 	    /* and let the card send more packets to me */
1413 	    netif_wake_queue(dev);
1414 	}
1415 	if (status & IM_RX_OVRN_INT) {
1416 	    dev->stats.rx_errors++;
1417 	    dev->stats.rx_fifo_errors++;
1418 	    if (smc->duplex)
1419 		smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1420 	    outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1421 	}
1422 	if (status & IM_EPH_INT)
1423 	    smc_eph_irq(dev);
1424     } while (--bogus_cnt);
1425 
1426     netdev_dbg(dev, "  Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n",
1427 	       mask, saved_bank, saved_pointer);
1428 
1429     /* restore state register */
1430     outw((mask<<8), ioaddr + INTERRUPT);
1431     outw(saved_pointer, ioaddr + POINTER);
1432     SMC_SELECT_BANK(saved_bank);
1433 
1434     netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq);
1435 
1436 irq_done:
1437 
1438     if ((smc->manfid == MANFID_OSITECH) &&
1439 	(smc->cardid != PRODID_OSITECH_SEVEN)) {
1440 	/* Retrigger interrupt if needed */
1441 	mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1442 	set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1443     }
1444     if (smc->manfid == MANFID_MOTOROLA) {
1445 	u_char cor;
1446 	cor = readb(smc->base + MOT_UART + CISREG_COR);
1447 	writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1448 	writeb(cor, smc->base + MOT_UART + CISREG_COR);
1449 	cor = readb(smc->base + MOT_LAN + CISREG_COR);
1450 	writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1451 	writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1452     }
1453 
1454     if ((smc->base != NULL) &&  /* Megahertz MFC's */
1455 	(smc->manfid == MANFID_MEGAHERTZ) &&
1456 	(smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1457 
1458 	u_char tmp;
1459 	tmp = readb(smc->base+MEGAHERTZ_ISR);
1460 	tmp = readb(smc->base+MEGAHERTZ_ISR);
1461 
1462 	/* Retrigger interrupt if needed */
1463 	writeb(tmp, smc->base + MEGAHERTZ_ISR);
1464 	writeb(tmp, smc->base + MEGAHERTZ_ISR);
1465     }
1466 
1467     spin_unlock(&smc->lock);
1468     return IRQ_RETVAL(handled);
1469 }
1470 
1471 /*====================================================================*/
1472 
1473 static void smc_rx(struct net_device *dev)
1474 {
1475     unsigned int ioaddr = dev->base_addr;
1476     int rx_status;
1477     int packet_length;	/* Caution: not frame length, rather words
1478 			   to transfer from the chip. */
1479 
1480     /* Assertion: we are in Window 2. */
1481 
1482     if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1483 	netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1484 	return;
1485     }
1486 
1487     /*  Reset the read pointer, and read the status and packet length. */
1488     outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1489     rx_status = inw(ioaddr + DATA_1);
1490     packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1491 
1492     netdev_dbg(dev, "Receive status %4.4x length %d.\n",
1493 	       rx_status, packet_length);
1494 
1495     if (!(rx_status & RS_ERRORS)) {
1496 	/* do stuff to make a new packet */
1497 	struct sk_buff *skb;
1498 	struct smc_private *smc = netdev_priv(dev);
1499 
1500 	/* Note: packet_length adds 5 or 6 extra bytes here! */
1501 	skb = netdev_alloc_skb(dev, packet_length+2);
1502 
1503 	if (skb == NULL) {
1504 	    netdev_dbg(dev, "Low memory, packet dropped.\n");
1505 	    dev->stats.rx_dropped++;
1506 	    outw(MC_RELEASE, ioaddr + MMU_CMD);
1507 	    return;
1508 	}
1509 
1510 	packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1511 	skb_reserve(skb, 2);
1512 	insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1513 	     (packet_length+1)>>1);
1514 	skb->protocol = eth_type_trans(skb, dev);
1515 
1516 	netif_rx(skb);
1517 	smc->last_rx = jiffies;
1518 	dev->stats.rx_packets++;
1519 	dev->stats.rx_bytes += packet_length;
1520 	if (rx_status & RS_MULTICAST)
1521 	    dev->stats.multicast++;
1522     } else {
1523 	/* error ... */
1524 	dev->stats.rx_errors++;
1525 
1526 	if (rx_status & RS_ALGNERR)  dev->stats.rx_frame_errors++;
1527 	if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
1528 	    dev->stats.rx_length_errors++;
1529 	if (rx_status & RS_BADCRC)	dev->stats.rx_crc_errors++;
1530     }
1531     /* Let the MMU free the memory of this packet. */
1532     outw(MC_RELEASE, ioaddr + MMU_CMD);
1533 }
1534 
1535 /*======================================================================
1536 
1537     Set the receive mode.
1538 
1539     This routine is used by both the protocol level to notify us of
1540     promiscuous/multicast mode changes, and by the open/reset code to
1541     initialize the Rx registers.  We always set the multicast list and
1542     leave the receiver running.
1543 
1544 ======================================================================*/
1545 
1546 static void set_rx_mode(struct net_device *dev)
1547 {
1548     unsigned int ioaddr = dev->base_addr;
1549     struct smc_private *smc = netdev_priv(dev);
1550     unsigned char multicast_table[8];
1551     unsigned long flags;
1552     u_short rx_cfg_setting;
1553     int i;
1554 
1555     memset(multicast_table, 0, sizeof(multicast_table));
1556 
1557     if (dev->flags & IFF_PROMISC) {
1558 	rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1559     } else if (dev->flags & IFF_ALLMULTI)
1560 	rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1561     else {
1562 	if (!netdev_mc_empty(dev)) {
1563 	    struct netdev_hw_addr *ha;
1564 
1565 	    netdev_for_each_mc_addr(ha, dev) {
1566 		u_int position = ether_crc(6, ha->addr);
1567 		multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1568 	    }
1569 	}
1570 	rx_cfg_setting = RxStripCRC | RxEnable;
1571     }
1572 
1573     /* Load MC table and Rx setting into the chip without interrupts. */
1574     spin_lock_irqsave(&smc->lock, flags);
1575     SMC_SELECT_BANK(3);
1576     for (i = 0; i < 8; i++)
1577 	outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1578     SMC_SELECT_BANK(0);
1579     outw(rx_cfg_setting, ioaddr + RCR);
1580     SMC_SELECT_BANK(2);
1581     spin_unlock_irqrestore(&smc->lock, flags);
1582 }
1583 
1584 /*======================================================================
1585 
1586     Senses when a card's config changes. Here, it's coax or TP.
1587 
1588 ======================================================================*/
1589 
1590 static int s9k_config(struct net_device *dev, struct ifmap *map)
1591 {
1592     struct smc_private *smc = netdev_priv(dev);
1593     if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1594 	if (smc->cfg & CFG_MII_SELECT)
1595 	    return -EOPNOTSUPP;
1596 	else if (map->port > 2)
1597 	    return -EINVAL;
1598 	dev->if_port = map->port;
1599 	netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1600 	smc_reset(dev);
1601     }
1602     return 0;
1603 }
1604 
1605 /*======================================================================
1606 
1607     Reset the chip, reloading every register that might be corrupted.
1608 
1609 ======================================================================*/
1610 
1611 /*
1612   Set transceiver type, perhaps to something other than what the user
1613   specified in dev->if_port.
1614 */
1615 static void smc_set_xcvr(struct net_device *dev, int if_port)
1616 {
1617     struct smc_private *smc = netdev_priv(dev);
1618     unsigned int ioaddr = dev->base_addr;
1619     u_short saved_bank;
1620 
1621     saved_bank = inw(ioaddr + BANK_SELECT);
1622     SMC_SELECT_BANK(1);
1623     if (if_port == 2) {
1624 	outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1625 	if ((smc->manfid == MANFID_OSITECH) &&
1626 	    (smc->cardid != PRODID_OSITECH_SEVEN))
1627 	    set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1628 	smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1629     } else {
1630 	outw(smc->cfg, ioaddr + CONFIG);
1631 	if ((smc->manfid == MANFID_OSITECH) &&
1632 	    (smc->cardid != PRODID_OSITECH_SEVEN))
1633 	    mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1634 	smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1635     }
1636     SMC_SELECT_BANK(saved_bank);
1637 }
1638 
1639 static void smc_reset(struct net_device *dev)
1640 {
1641     unsigned int ioaddr = dev->base_addr;
1642     struct smc_private *smc = netdev_priv(dev);
1643     int i;
1644 
1645     netdev_dbg(dev, "smc91c92 reset called.\n");
1646 
1647     /* The first interaction must be a write to bring the chip out
1648        of sleep mode. */
1649     SMC_SELECT_BANK(0);
1650     /* Reset the chip. */
1651     outw(RCR_SOFTRESET, ioaddr + RCR);
1652     udelay(10);
1653 
1654     /* Clear the transmit and receive configuration registers. */
1655     outw(RCR_CLEAR, ioaddr + RCR);
1656     outw(TCR_CLEAR, ioaddr + TCR);
1657 
1658     /* Set the Window 1 control, configuration and station addr registers.
1659        No point in writing the I/O base register ;-> */
1660     SMC_SELECT_BANK(1);
1661     /* Automatically release successfully transmitted packets,
1662        Accept link errors, counter and Tx error interrupts. */
1663     outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1664 	 ioaddr + CONTROL);
1665     smc_set_xcvr(dev, dev->if_port);
1666     if ((smc->manfid == MANFID_OSITECH) &&
1667 	(smc->cardid != PRODID_OSITECH_SEVEN))
1668 	outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1669 	     (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1670 	     ioaddr - 0x10 + OSITECH_AUI_PWR);
1671 
1672     /* Fill in the physical address.  The databook is wrong about the order! */
1673     for (i = 0; i < 6; i += 2)
1674 	outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1675 	     ioaddr + ADDR0 + i);
1676 
1677     /* Reset the MMU */
1678     SMC_SELECT_BANK(2);
1679     outw(MC_RESET, ioaddr + MMU_CMD);
1680     outw(0, ioaddr + INTERRUPT);
1681 
1682     /* Re-enable the chip. */
1683     SMC_SELECT_BANK(0);
1684     outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1685 	 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1686     set_rx_mode(dev);
1687 
1688     if (smc->cfg & CFG_MII_SELECT) {
1689 	SMC_SELECT_BANK(3);
1690 
1691 	/* Reset MII */
1692 	mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1693 
1694 	/* Advertise 100F, 100H, 10F, 10H */
1695 	mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1696 
1697 	/* Restart MII autonegotiation */
1698 	mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1699 	mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1700     }
1701 
1702     /* Enable interrupts. */
1703     SMC_SELECT_BANK(2);
1704     outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1705 	 ioaddr + INTERRUPT);
1706 }
1707 
1708 /*======================================================================
1709 
1710     Media selection timer routine
1711 
1712 ======================================================================*/
1713 
1714 static void media_check(struct timer_list *t)
1715 {
1716     struct smc_private *smc = from_timer(smc, t, media);
1717     struct net_device *dev = smc->mii_if.dev;
1718     unsigned int ioaddr = dev->base_addr;
1719     u_short i, media, saved_bank;
1720     u_short link;
1721     unsigned long flags;
1722 
1723     spin_lock_irqsave(&smc->lock, flags);
1724 
1725     saved_bank = inw(ioaddr + BANK_SELECT);
1726 
1727     if (!netif_device_present(dev))
1728 	goto reschedule;
1729 
1730     SMC_SELECT_BANK(2);
1731 
1732     /* need MC_RESET to keep the memory consistent. errata? */
1733     if (smc->rx_ovrn) {
1734 	outw(MC_RESET, ioaddr + MMU_CMD);
1735 	smc->rx_ovrn = 0;
1736     }
1737     i = inw(ioaddr + INTERRUPT);
1738     SMC_SELECT_BANK(0);
1739     media = inw(ioaddr + EPH) & EPH_LINK_OK;
1740     SMC_SELECT_BANK(1);
1741     media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1742 
1743     SMC_SELECT_BANK(saved_bank);
1744     spin_unlock_irqrestore(&smc->lock, flags);
1745 
1746     /* Check for pending interrupt with watchdog flag set: with
1747        this, we can limp along even if the interrupt is blocked */
1748     if (smc->watchdog++ && ((i>>8) & i)) {
1749 	if (!smc->fast_poll)
1750 	    netdev_info(dev, "interrupt(s) dropped!\n");
1751 	local_irq_save(flags);
1752 	smc_interrupt(dev->irq, dev);
1753 	local_irq_restore(flags);
1754 	smc->fast_poll = HZ;
1755     }
1756     if (smc->fast_poll) {
1757 	smc->fast_poll--;
1758 	smc->media.expires = jiffies + HZ/100;
1759 	add_timer(&smc->media);
1760 	return;
1761     }
1762 
1763     spin_lock_irqsave(&smc->lock, flags);
1764 
1765     saved_bank = inw(ioaddr + BANK_SELECT);
1766 
1767     if (smc->cfg & CFG_MII_SELECT) {
1768 	if (smc->mii_if.phy_id < 0)
1769 	    goto reschedule;
1770 
1771 	SMC_SELECT_BANK(3);
1772 	link = mdio_read(dev, smc->mii_if.phy_id, 1);
1773 	if (!link || (link == 0xffff)) {
1774 	    netdev_info(dev, "MII is missing!\n");
1775 	    smc->mii_if.phy_id = -1;
1776 	    goto reschedule;
1777 	}
1778 
1779 	link &= 0x0004;
1780 	if (link != smc->link_status) {
1781 	    u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1782 	    netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1783 	    smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1784 			   ? TCR_FDUPLX : 0);
1785 	    if (link) {
1786 		netdev_info(dev, "autonegotiation complete: "
1787 			    "%dbaseT-%cD selected\n",
1788 			    (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1789 	    }
1790 	    SMC_SELECT_BANK(0);
1791 	    outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1792 	    smc->link_status = link;
1793 	}
1794 	goto reschedule;
1795     }
1796 
1797     /* Ignore collisions unless we've had no rx's recently */
1798     if (time_after(jiffies, smc->last_rx + HZ)) {
1799 	if (smc->tx_err || (smc->media_status & EPH_16COL))
1800 	    media |= EPH_16COL;
1801     }
1802     smc->tx_err = 0;
1803 
1804     if (media != smc->media_status) {
1805 	if ((media & smc->media_status & 1) &&
1806 	    ((smc->media_status ^ media) & EPH_LINK_OK))
1807 	    netdev_info(dev, "%s link beat\n",
1808 			smc->media_status & EPH_LINK_OK ? "lost" : "found");
1809 	else if ((media & smc->media_status & 2) &&
1810 		 ((smc->media_status ^ media) & EPH_16COL))
1811 	    netdev_info(dev, "coax cable %s\n",
1812 			media & EPH_16COL ? "problem" : "ok");
1813 	if (dev->if_port == 0) {
1814 	    if (media & 1) {
1815 		if (media & EPH_LINK_OK)
1816 		    netdev_info(dev, "flipped to 10baseT\n");
1817 		else
1818 		    smc_set_xcvr(dev, 2);
1819 	    } else {
1820 		if (media & EPH_16COL)
1821 		    smc_set_xcvr(dev, 1);
1822 		else
1823 		    netdev_info(dev, "flipped to 10base2\n");
1824 	    }
1825 	}
1826 	smc->media_status = media;
1827     }
1828 
1829 reschedule:
1830     smc->media.expires = jiffies + HZ;
1831     add_timer(&smc->media);
1832     SMC_SELECT_BANK(saved_bank);
1833     spin_unlock_irqrestore(&smc->lock, flags);
1834 }
1835 
1836 static int smc_link_ok(struct net_device *dev)
1837 {
1838     unsigned int ioaddr = dev->base_addr;
1839     struct smc_private *smc = netdev_priv(dev);
1840 
1841     if (smc->cfg & CFG_MII_SELECT) {
1842 	return mii_link_ok(&smc->mii_if);
1843     } else {
1844         SMC_SELECT_BANK(0);
1845 	return inw(ioaddr + EPH) & EPH_LINK_OK;
1846     }
1847 }
1848 
1849 static void smc_netdev_get_ecmd(struct net_device *dev,
1850 				struct ethtool_link_ksettings *ecmd)
1851 {
1852 	u16 tmp;
1853 	unsigned int ioaddr = dev->base_addr;
1854 	u32 supported;
1855 
1856 	supported = (SUPPORTED_TP | SUPPORTED_AUI |
1857 		     SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1858 
1859 	SMC_SELECT_BANK(1);
1860 	tmp = inw(ioaddr + CONFIG);
1861 	ecmd->base.port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1862 	ecmd->base.speed = SPEED_10;
1863 	ecmd->base.phy_address = ioaddr + MGMT;
1864 
1865 	SMC_SELECT_BANK(0);
1866 	tmp = inw(ioaddr + TCR);
1867 	ecmd->base.duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1868 
1869 	ethtool_convert_legacy_u32_to_link_mode(ecmd->link_modes.supported,
1870 						supported);
1871 }
1872 
1873 static int smc_netdev_set_ecmd(struct net_device *dev,
1874 			       const struct ethtool_link_ksettings *ecmd)
1875 {
1876 	u16 tmp;
1877 	unsigned int ioaddr = dev->base_addr;
1878 
1879 	if (ecmd->base.speed != SPEED_10)
1880 		return -EINVAL;
1881 	if (ecmd->base.duplex != DUPLEX_HALF &&
1882 	    ecmd->base.duplex != DUPLEX_FULL)
1883 		return -EINVAL;
1884 	if (ecmd->base.port != PORT_TP && ecmd->base.port != PORT_AUI)
1885 		return -EINVAL;
1886 
1887 	if (ecmd->base.port == PORT_AUI)
1888 		smc_set_xcvr(dev, 1);
1889 	else
1890 		smc_set_xcvr(dev, 0);
1891 
1892 	SMC_SELECT_BANK(0);
1893 	tmp = inw(ioaddr + TCR);
1894 	if (ecmd->base.duplex == DUPLEX_FULL)
1895 		tmp |= TCR_FDUPLX;
1896 	else
1897 		tmp &= ~TCR_FDUPLX;
1898 	outw(tmp, ioaddr + TCR);
1899 
1900 	return 0;
1901 }
1902 
1903 static int check_if_running(struct net_device *dev)
1904 {
1905 	if (!netif_running(dev))
1906 		return -EINVAL;
1907 	return 0;
1908 }
1909 
1910 static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1911 {
1912 	strscpy(info->driver, DRV_NAME, sizeof(info->driver));
1913 	strscpy(info->version, DRV_VERSION, sizeof(info->version));
1914 }
1915 
1916 static int smc_get_link_ksettings(struct net_device *dev,
1917 				  struct ethtool_link_ksettings *ecmd)
1918 {
1919 	struct smc_private *smc = netdev_priv(dev);
1920 	unsigned int ioaddr = dev->base_addr;
1921 	u16 saved_bank = inw(ioaddr + BANK_SELECT);
1922 	unsigned long flags;
1923 
1924 	spin_lock_irqsave(&smc->lock, flags);
1925 	SMC_SELECT_BANK(3);
1926 	if (smc->cfg & CFG_MII_SELECT)
1927 		mii_ethtool_get_link_ksettings(&smc->mii_if, ecmd);
1928 	else
1929 		smc_netdev_get_ecmd(dev, ecmd);
1930 	SMC_SELECT_BANK(saved_bank);
1931 	spin_unlock_irqrestore(&smc->lock, flags);
1932 	return 0;
1933 }
1934 
1935 static int smc_set_link_ksettings(struct net_device *dev,
1936 				  const struct ethtool_link_ksettings *ecmd)
1937 {
1938 	struct smc_private *smc = netdev_priv(dev);
1939 	unsigned int ioaddr = dev->base_addr;
1940 	u16 saved_bank = inw(ioaddr + BANK_SELECT);
1941 	int ret;
1942 	unsigned long flags;
1943 
1944 	spin_lock_irqsave(&smc->lock, flags);
1945 	SMC_SELECT_BANK(3);
1946 	if (smc->cfg & CFG_MII_SELECT)
1947 		ret = mii_ethtool_set_link_ksettings(&smc->mii_if, ecmd);
1948 	else
1949 		ret = smc_netdev_set_ecmd(dev, ecmd);
1950 	SMC_SELECT_BANK(saved_bank);
1951 	spin_unlock_irqrestore(&smc->lock, flags);
1952 	return ret;
1953 }
1954 
1955 static u32 smc_get_link(struct net_device *dev)
1956 {
1957 	struct smc_private *smc = netdev_priv(dev);
1958 	unsigned int ioaddr = dev->base_addr;
1959 	u16 saved_bank = inw(ioaddr + BANK_SELECT);
1960 	u32 ret;
1961 	unsigned long flags;
1962 
1963 	spin_lock_irqsave(&smc->lock, flags);
1964 	SMC_SELECT_BANK(3);
1965 	ret = smc_link_ok(dev);
1966 	SMC_SELECT_BANK(saved_bank);
1967 	spin_unlock_irqrestore(&smc->lock, flags);
1968 	return ret;
1969 }
1970 
1971 static int smc_nway_reset(struct net_device *dev)
1972 {
1973 	struct smc_private *smc = netdev_priv(dev);
1974 	if (smc->cfg & CFG_MII_SELECT) {
1975 		unsigned int ioaddr = dev->base_addr;
1976 		u16 saved_bank = inw(ioaddr + BANK_SELECT);
1977 		int res;
1978 
1979 		SMC_SELECT_BANK(3);
1980 		res = mii_nway_restart(&smc->mii_if);
1981 		SMC_SELECT_BANK(saved_bank);
1982 
1983 		return res;
1984 	} else
1985 		return -EOPNOTSUPP;
1986 }
1987 
1988 static const struct ethtool_ops ethtool_ops = {
1989 	.begin = check_if_running,
1990 	.get_drvinfo = smc_get_drvinfo,
1991 	.get_link = smc_get_link,
1992 	.nway_reset = smc_nway_reset,
1993 	.get_link_ksettings = smc_get_link_ksettings,
1994 	.set_link_ksettings = smc_set_link_ksettings,
1995 };
1996 
1997 static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1998 {
1999 	struct smc_private *smc = netdev_priv(dev);
2000 	struct mii_ioctl_data *mii = if_mii(rq);
2001 	int rc = 0;
2002 	u16 saved_bank;
2003 	unsigned int ioaddr = dev->base_addr;
2004 	unsigned long flags;
2005 
2006 	if (!netif_running(dev))
2007 		return -EINVAL;
2008 
2009 	spin_lock_irqsave(&smc->lock, flags);
2010 	saved_bank = inw(ioaddr + BANK_SELECT);
2011 	SMC_SELECT_BANK(3);
2012 	rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2013 	SMC_SELECT_BANK(saved_bank);
2014 	spin_unlock_irqrestore(&smc->lock, flags);
2015 	return rc;
2016 }
2017 
2018 static const struct pcmcia_device_id smc91c92_ids[] = {
2019 	PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2020 	PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2021 	PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2022 	PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2023 	PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2024 	PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2025 	PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2026 	PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
2027 	PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2028 	PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
2029 	PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2030 	PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2031 	PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2032 	PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2033 	PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2034 	PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2035 	PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2036 	PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2037 	PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
2038 	PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2039 	PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
2040 	PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2041 	PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2042 	PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2043 	/* These conflict with other cards! */
2044 	/* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2045 	/* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2046 	PCMCIA_DEVICE_NULL,
2047 };
2048 MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2049 
2050 static struct pcmcia_driver smc91c92_cs_driver = {
2051 	.owner		= THIS_MODULE,
2052 	.name		= "smc91c92_cs",
2053 	.probe		= smc91c92_probe,
2054 	.remove		= smc91c92_detach,
2055 	.id_table       = smc91c92_ids,
2056 	.suspend	= smc91c92_suspend,
2057 	.resume		= smc91c92_resume,
2058 };
2059 module_pcmcia_driver(smc91c92_cs_driver);
2060