1 /*====================================================================== 2 3 A PCMCIA ethernet driver for SMC91c92-based cards. 4 5 This driver supports Megahertz PCMCIA ethernet cards; and 6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem 7 multifunction cards. 8 9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net 10 11 smc91c92_cs.c 1.122 2002/10/25 06:26:39 12 13 This driver contains code written by Donald Becker 14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au), 15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman 16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of 17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've 18 incorporated some parts of his driver here. I (Dave) wrote most 19 of the PCMCIA glue code, and the Ositech support code. Kelly 20 Stephens (kstephen@holli.com) added support for the Motorola 21 Mariner, with help from Allen Brost. 22 23 This software may be used and distributed according to the terms of 24 the GNU General Public License, incorporated herein by reference. 25 26 ======================================================================*/ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/module.h> 31 #include <linux/kernel.h> 32 #include <linux/slab.h> 33 #include <linux/string.h> 34 #include <linux/timer.h> 35 #include <linux/interrupt.h> 36 #include <linux/delay.h> 37 #include <linux/crc32.h> 38 #include <linux/netdevice.h> 39 #include <linux/etherdevice.h> 40 #include <linux/skbuff.h> 41 #include <linux/if_arp.h> 42 #include <linux/ioport.h> 43 #include <linux/ethtool.h> 44 #include <linux/mii.h> 45 #include <linux/jiffies.h> 46 #include <linux/firmware.h> 47 48 #include <pcmcia/cistpl.h> 49 #include <pcmcia/cisreg.h> 50 #include <pcmcia/ciscode.h> 51 #include <pcmcia/ds.h> 52 #include <pcmcia/ss.h> 53 54 #include <asm/io.h> 55 #include <linux/uaccess.h> 56 57 /*====================================================================*/ 58 59 static const char *if_names[] = { "auto", "10baseT", "10base2"}; 60 61 /* Firmware name */ 62 #define FIRMWARE_NAME "ositech/Xilinx7OD.bin" 63 64 /* Module parameters */ 65 66 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver"); 67 MODULE_LICENSE("GPL"); 68 MODULE_FIRMWARE(FIRMWARE_NAME); 69 70 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) 71 72 /* 73 Transceiver/media type. 74 0 = auto 75 1 = 10baseT (and autoselect if #define AUTOSELECT), 76 2 = AUI/10base2, 77 */ 78 INT_MODULE_PARM(if_port, 0); 79 80 81 #define DRV_NAME "smc91c92_cs" 82 #define DRV_VERSION "1.123" 83 84 /*====================================================================*/ 85 86 /* Operational parameter that usually are not changed. */ 87 88 /* Time in jiffies before concluding Tx hung */ 89 #define TX_TIMEOUT ((400*HZ)/1000) 90 91 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ 92 #define INTR_WORK 4 93 94 /* Times to check the check the chip before concluding that it doesn't 95 currently have room for another Tx packet. */ 96 #define MEMORY_WAIT_TIME 8 97 98 struct smc_private { 99 struct pcmcia_device *p_dev; 100 spinlock_t lock; 101 u_short manfid; 102 u_short cardid; 103 104 struct sk_buff *saved_skb; 105 int packets_waiting; 106 void __iomem *base; 107 u_short cfg; 108 struct timer_list media; 109 int watchdog, tx_err; 110 u_short media_status; 111 u_short fast_poll; 112 u_short link_status; 113 struct mii_if_info mii_if; 114 int duplex; 115 int rx_ovrn; 116 unsigned long last_rx; 117 }; 118 119 /* Special definitions for Megahertz multifunction cards */ 120 #define MEGAHERTZ_ISR 0x0380 121 122 /* Special function registers for Motorola Mariner */ 123 #define MOT_LAN 0x0000 124 #define MOT_UART 0x0020 125 #define MOT_EEPROM 0x20 126 127 #define MOT_NORMAL \ 128 (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA) 129 130 /* Special function registers for Ositech cards */ 131 #define OSITECH_AUI_CTL 0x0c 132 #define OSITECH_PWRDOWN 0x0d 133 #define OSITECH_RESET 0x0e 134 #define OSITECH_ISR 0x0f 135 #define OSITECH_AUI_PWR 0x0c 136 #define OSITECH_RESET_ISR 0x0e 137 138 #define OSI_AUI_PWR 0x40 139 #define OSI_LAN_PWRDOWN 0x02 140 #define OSI_MODEM_PWRDOWN 0x01 141 #define OSI_LAN_RESET 0x02 142 #define OSI_MODEM_RESET 0x01 143 144 /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */ 145 #define BANK_SELECT 14 /* Window select register. */ 146 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); } 147 148 /* Bank 0 registers. */ 149 #define TCR 0 /* transmit control register */ 150 #define TCR_CLEAR 0 /* do NOTHING */ 151 #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */ 152 #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */ 153 #define TCR_MONCSN 0x0400 /* Monitor Carrier. */ 154 #define TCR_FDUPLX 0x0800 /* Full duplex mode. */ 155 #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN 156 157 #define EPH 2 /* Ethernet Protocol Handler report. */ 158 #define EPH_TX_SUC 0x0001 159 #define EPH_SNGLCOL 0x0002 160 #define EPH_MULCOL 0x0004 161 #define EPH_LTX_MULT 0x0008 162 #define EPH_16COL 0x0010 163 #define EPH_SQET 0x0020 164 #define EPH_LTX_BRD 0x0040 165 #define EPH_TX_DEFR 0x0080 166 #define EPH_LAT_COL 0x0200 167 #define EPH_LOST_CAR 0x0400 168 #define EPH_EXC_DEF 0x0800 169 #define EPH_CTR_ROL 0x1000 170 #define EPH_RX_OVRN 0x2000 171 #define EPH_LINK_OK 0x4000 172 #define EPH_TX_UNRN 0x8000 173 #define MEMINFO 8 /* Memory Information Register */ 174 #define MEMCFG 10 /* Memory Configuration Register */ 175 176 /* Bank 1 registers. */ 177 #define CONFIG 0 178 #define CFG_MII_SELECT 0x8000 /* 91C100 only */ 179 #define CFG_NO_WAIT 0x1000 180 #define CFG_FULL_STEP 0x0400 181 #define CFG_SET_SQLCH 0x0200 182 #define CFG_AUI_SELECT 0x0100 183 #define CFG_16BIT 0x0080 184 #define CFG_DIS_LINK 0x0040 185 #define CFG_STATIC 0x0030 186 #define CFG_IRQ_SEL_1 0x0004 187 #define CFG_IRQ_SEL_0 0x0002 188 #define BASE_ADDR 2 189 #define ADDR0 4 190 #define GENERAL 10 191 #define CONTROL 12 192 #define CTL_STORE 0x0001 193 #define CTL_RELOAD 0x0002 194 #define CTL_EE_SELECT 0x0004 195 #define CTL_TE_ENABLE 0x0020 196 #define CTL_CR_ENABLE 0x0040 197 #define CTL_LE_ENABLE 0x0080 198 #define CTL_AUTO_RELEASE 0x0800 199 #define CTL_POWERDOWN 0x2000 200 201 /* Bank 2 registers. */ 202 #define MMU_CMD 0 203 #define MC_ALLOC 0x20 /* or with number of 256 byte packets */ 204 #define MC_RESET 0x40 205 #define MC_RELEASE 0x80 /* remove and release the current rx packet */ 206 #define MC_FREEPKT 0xA0 /* Release packet in PNR register */ 207 #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */ 208 #define PNR_ARR 2 209 #define FIFO_PORTS 4 210 #define FP_RXEMPTY 0x8000 211 #define POINTER 6 212 #define PTR_AUTO_INC 0x0040 213 #define PTR_READ 0x2000 214 #define PTR_AUTOINC 0x4000 215 #define PTR_RCV 0x8000 216 #define DATA_1 8 217 #define INTERRUPT 12 218 #define IM_RCV_INT 0x1 219 #define IM_TX_INT 0x2 220 #define IM_TX_EMPTY_INT 0x4 221 #define IM_ALLOC_INT 0x8 222 #define IM_RX_OVRN_INT 0x10 223 #define IM_EPH_INT 0x20 224 225 #define RCR 4 226 enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002, 227 RxEnable = 0x0100, RxStripCRC = 0x0200}; 228 #define RCR_SOFTRESET 0x8000 /* resets the chip */ 229 #define RCR_STRIP_CRC 0x200 /* strips CRC */ 230 #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */ 231 #define RCR_ALMUL 0x4 /* receive all multicast packets */ 232 #define RCR_PROMISC 0x2 /* enable promiscuous mode */ 233 234 /* the normal settings for the RCR register : */ 235 #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE) 236 #define RCR_CLEAR 0x0 /* set it to a base state */ 237 #define COUNTER 6 238 239 /* BANK 3 -- not the same values as in smc9194! */ 240 #define MULTICAST0 0 241 #define MULTICAST2 2 242 #define MULTICAST4 4 243 #define MULTICAST6 6 244 #define MGMT 8 245 #define REVISION 0x0a 246 247 /* Transmit status bits. */ 248 #define TS_SUCCESS 0x0001 249 #define TS_16COL 0x0010 250 #define TS_LATCOL 0x0200 251 #define TS_LOSTCAR 0x0400 252 253 /* Receive status bits. */ 254 #define RS_ALGNERR 0x8000 255 #define RS_BADCRC 0x2000 256 #define RS_ODDFRAME 0x1000 257 #define RS_TOOLONG 0x0800 258 #define RS_TOOSHORT 0x0400 259 #define RS_MULTICAST 0x0001 260 #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) 261 262 #define set_bits(v, p) outw(inw(p)|(v), (p)) 263 #define mask_bits(v, p) outw(inw(p)&(v), (p)) 264 265 /*====================================================================*/ 266 267 static void smc91c92_detach(struct pcmcia_device *p_dev); 268 static int smc91c92_config(struct pcmcia_device *link); 269 static void smc91c92_release(struct pcmcia_device *link); 270 271 static int smc_open(struct net_device *dev); 272 static int smc_close(struct net_device *dev); 273 static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 274 static void smc_tx_timeout(struct net_device *dev, unsigned int txqueue); 275 static netdev_tx_t smc_start_xmit(struct sk_buff *skb, 276 struct net_device *dev); 277 static irqreturn_t smc_interrupt(int irq, void *dev_id); 278 static void smc_rx(struct net_device *dev); 279 static void set_rx_mode(struct net_device *dev); 280 static int s9k_config(struct net_device *dev, struct ifmap *map); 281 static void smc_set_xcvr(struct net_device *dev, int if_port); 282 static void smc_reset(struct net_device *dev); 283 static void media_check(struct timer_list *t); 284 static void mdio_sync(unsigned int addr); 285 static int mdio_read(struct net_device *dev, int phy_id, int loc); 286 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value); 287 static int smc_link_ok(struct net_device *dev); 288 static const struct ethtool_ops ethtool_ops; 289 290 static const struct net_device_ops smc_netdev_ops = { 291 .ndo_open = smc_open, 292 .ndo_stop = smc_close, 293 .ndo_start_xmit = smc_start_xmit, 294 .ndo_tx_timeout = smc_tx_timeout, 295 .ndo_set_config = s9k_config, 296 .ndo_set_rx_mode = set_rx_mode, 297 .ndo_eth_ioctl = smc_ioctl, 298 .ndo_set_mac_address = eth_mac_addr, 299 .ndo_validate_addr = eth_validate_addr, 300 }; 301 302 static int smc91c92_probe(struct pcmcia_device *link) 303 { 304 struct smc_private *smc; 305 struct net_device *dev; 306 307 dev_dbg(&link->dev, "smc91c92_attach()\n"); 308 309 /* Create new ethernet device */ 310 dev = alloc_etherdev(sizeof(struct smc_private)); 311 if (!dev) 312 return -ENOMEM; 313 smc = netdev_priv(dev); 314 smc->p_dev = link; 315 link->priv = dev; 316 317 spin_lock_init(&smc->lock); 318 319 /* The SMC91c92-specific entries in the device structure. */ 320 dev->netdev_ops = &smc_netdev_ops; 321 dev->ethtool_ops = ðtool_ops; 322 dev->watchdog_timeo = TX_TIMEOUT; 323 324 smc->mii_if.dev = dev; 325 smc->mii_if.mdio_read = mdio_read; 326 smc->mii_if.mdio_write = mdio_write; 327 smc->mii_if.phy_id_mask = 0x1f; 328 smc->mii_if.reg_num_mask = 0x1f; 329 330 return smc91c92_config(link); 331 } /* smc91c92_attach */ 332 333 static void smc91c92_detach(struct pcmcia_device *link) 334 { 335 struct net_device *dev = link->priv; 336 337 dev_dbg(&link->dev, "smc91c92_detach\n"); 338 339 unregister_netdev(dev); 340 341 smc91c92_release(link); 342 343 free_netdev(dev); 344 } /* smc91c92_detach */ 345 346 /*====================================================================*/ 347 348 static int cvt_ascii_address(struct net_device *dev, char *s) 349 { 350 int i, j, da, c; 351 352 if (strlen(s) != 12) 353 return -1; 354 for (i = 0; i < 6; i++) { 355 da = 0; 356 for (j = 0; j < 2; j++) { 357 c = *s++; 358 da <<= 4; 359 da += ((c >= '0') && (c <= '9')) ? 360 (c - '0') : ((c & 0x0f) + 9); 361 } 362 dev->dev_addr[i] = da; 363 } 364 return 0; 365 } 366 367 /*==================================================================== 368 369 Configuration stuff for Megahertz cards 370 371 mhz_3288_power() is used to power up a 3288's ethernet chip. 372 mhz_mfc_config() handles socket setup for multifunction (1144 373 and 3288) cards. mhz_setup() gets a card's hardware ethernet 374 address. 375 376 ======================================================================*/ 377 378 static int mhz_3288_power(struct pcmcia_device *link) 379 { 380 struct net_device *dev = link->priv; 381 struct smc_private *smc = netdev_priv(dev); 382 u_char tmp; 383 384 /* Read the ISR twice... */ 385 readb(smc->base+MEGAHERTZ_ISR); 386 udelay(5); 387 readb(smc->base+MEGAHERTZ_ISR); 388 389 /* Pause 200ms... */ 390 mdelay(200); 391 392 /* Now read and write the COR... */ 393 tmp = readb(smc->base + link->config_base + CISREG_COR); 394 udelay(5); 395 writeb(tmp, smc->base + link->config_base + CISREG_COR); 396 397 return 0; 398 } 399 400 static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data) 401 { 402 int k; 403 p_dev->io_lines = 16; 404 p_dev->resource[1]->start = p_dev->resource[0]->start; 405 p_dev->resource[1]->end = 8; 406 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH; 407 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8; 408 p_dev->resource[0]->end = 16; 409 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; 410 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO; 411 for (k = 0; k < 0x400; k += 0x10) { 412 if (k & 0x80) 413 continue; 414 p_dev->resource[0]->start = k ^ 0x300; 415 if (!pcmcia_request_io(p_dev)) 416 return 0; 417 } 418 return -ENODEV; 419 } 420 421 static int mhz_mfc_config(struct pcmcia_device *link) 422 { 423 struct net_device *dev = link->priv; 424 struct smc_private *smc = netdev_priv(dev); 425 unsigned int offset; 426 int i; 427 428 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ | 429 CONF_AUTO_SET_IO; 430 431 /* The Megahertz combo cards have modem-like CIS entries, so 432 we have to explicitly try a bunch of port combinations. */ 433 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL)) 434 return -ENODEV; 435 436 dev->base_addr = link->resource[0]->start; 437 438 /* Allocate a memory window, for accessing the ISR */ 439 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE; 440 link->resource[2]->start = link->resource[2]->end = 0; 441 i = pcmcia_request_window(link, link->resource[2], 0); 442 if (i != 0) 443 return -ENODEV; 444 445 smc->base = ioremap(link->resource[2]->start, 446 resource_size(link->resource[2])); 447 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0; 448 i = pcmcia_map_mem_page(link, link->resource[2], offset); 449 if ((i == 0) && 450 (smc->manfid == MANFID_MEGAHERTZ) && 451 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) 452 mhz_3288_power(link); 453 454 return 0; 455 } 456 457 static int pcmcia_get_versmac(struct pcmcia_device *p_dev, 458 tuple_t *tuple, 459 void *priv) 460 { 461 struct net_device *dev = priv; 462 cisparse_t parse; 463 u8 *buf; 464 465 if (pcmcia_parse_tuple(tuple, &parse)) 466 return -EINVAL; 467 468 buf = parse.version_1.str + parse.version_1.ofs[3]; 469 470 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0)) 471 return 0; 472 473 return -EINVAL; 474 }; 475 476 static int mhz_setup(struct pcmcia_device *link) 477 { 478 struct net_device *dev = link->priv; 479 size_t len; 480 u8 *buf; 481 int rc; 482 483 /* Read the station address from the CIS. It is stored as the last 484 (fourth) string in the Version 1 Version/ID tuple. */ 485 if ((link->prod_id[3]) && 486 (cvt_ascii_address(dev, link->prod_id[3]) == 0)) 487 return 0; 488 489 /* Workarounds for broken cards start here. */ 490 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */ 491 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev)) 492 return 0; 493 494 /* Another possibility: for the EM3288, in a special tuple */ 495 rc = -1; 496 len = pcmcia_get_tuple(link, 0x81, &buf); 497 if (buf && len >= 13) { 498 buf[12] = '\0'; 499 if (cvt_ascii_address(dev, buf) == 0) 500 rc = 0; 501 } 502 kfree(buf); 503 504 return rc; 505 }; 506 507 /*====================================================================== 508 509 Configuration stuff for the Motorola Mariner 510 511 mot_config() writes directly to the Mariner configuration 512 registers because the CIS is just bogus. 513 514 ======================================================================*/ 515 516 static void mot_config(struct pcmcia_device *link) 517 { 518 struct net_device *dev = link->priv; 519 struct smc_private *smc = netdev_priv(dev); 520 unsigned int ioaddr = dev->base_addr; 521 unsigned int iouart = link->resource[1]->start; 522 523 /* Set UART base address and force map with COR bit 1 */ 524 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0); 525 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1); 526 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR); 527 528 /* Set SMC base address and force map with COR bit 1 */ 529 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0); 530 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1); 531 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR); 532 533 /* Wait for things to settle down */ 534 mdelay(100); 535 } 536 537 static int mot_setup(struct pcmcia_device *link) 538 { 539 struct net_device *dev = link->priv; 540 unsigned int ioaddr = dev->base_addr; 541 int i, wait, loop; 542 u_int addr; 543 544 /* Read Ethernet address from Serial EEPROM */ 545 546 for (i = 0; i < 3; i++) { 547 SMC_SELECT_BANK(2); 548 outw(MOT_EEPROM + i, ioaddr + POINTER); 549 SMC_SELECT_BANK(1); 550 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL); 551 552 for (loop = wait = 0; loop < 200; loop++) { 553 udelay(10); 554 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL)); 555 if (wait == 0) break; 556 } 557 558 if (wait) 559 return -1; 560 561 addr = inw(ioaddr + GENERAL); 562 dev->dev_addr[2*i] = addr & 0xff; 563 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff; 564 } 565 566 return 0; 567 } 568 569 /*====================================================================*/ 570 571 static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data) 572 { 573 p_dev->resource[0]->end = 16; 574 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; 575 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO; 576 577 return pcmcia_request_io(p_dev); 578 } 579 580 static int smc_config(struct pcmcia_device *link) 581 { 582 struct net_device *dev = link->priv; 583 int i; 584 585 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; 586 587 i = pcmcia_loop_config(link, smc_configcheck, NULL); 588 if (!i) 589 dev->base_addr = link->resource[0]->start; 590 591 return i; 592 } 593 594 595 static int smc_setup(struct pcmcia_device *link) 596 { 597 struct net_device *dev = link->priv; 598 599 /* Check for a LAN function extension tuple */ 600 if (!pcmcia_get_mac_from_cis(link, dev)) 601 return 0; 602 603 /* Try the third string in the Version 1 Version/ID tuple. */ 604 if (link->prod_id[2]) { 605 if (cvt_ascii_address(dev, link->prod_id[2]) == 0) 606 return 0; 607 } 608 return -1; 609 } 610 611 /*====================================================================*/ 612 613 static int osi_config(struct pcmcia_device *link) 614 { 615 struct net_device *dev = link->priv; 616 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 617 int i, j; 618 619 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ; 620 link->resource[0]->end = 64; 621 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8; 622 link->resource[1]->end = 8; 623 624 /* Enable Hard Decode, LAN, Modem */ 625 link->io_lines = 16; 626 link->config_index = 0x23; 627 628 for (i = j = 0; j < 4; j++) { 629 link->resource[1]->start = com[j]; 630 i = pcmcia_request_io(link); 631 if (i == 0) 632 break; 633 } 634 if (i != 0) { 635 /* Fallback: turn off hard decode */ 636 link->config_index = 0x03; 637 link->resource[1]->end = 0; 638 i = pcmcia_request_io(link); 639 } 640 dev->base_addr = link->resource[0]->start + 0x10; 641 return i; 642 } 643 644 static int osi_load_firmware(struct pcmcia_device *link) 645 { 646 const struct firmware *fw; 647 int i, err; 648 649 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev); 650 if (err) { 651 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME); 652 return err; 653 } 654 655 /* Download the Seven of Diamonds firmware */ 656 for (i = 0; i < fw->size; i++) { 657 outb(fw->data[i], link->resource[0]->start + 2); 658 udelay(50); 659 } 660 release_firmware(fw); 661 return err; 662 } 663 664 static int pcmcia_osi_mac(struct pcmcia_device *p_dev, 665 tuple_t *tuple, 666 void *priv) 667 { 668 struct net_device *dev = priv; 669 670 if (tuple->TupleDataLen < 8) 671 return -EINVAL; 672 if (tuple->TupleData[0] != 0x04) 673 return -EINVAL; 674 675 eth_hw_addr_set(dev, &tuple->TupleData[2]); 676 return 0; 677 }; 678 679 680 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid) 681 { 682 struct net_device *dev = link->priv; 683 int rc; 684 685 /* Read the station address from tuple 0x90, subtuple 0x04 */ 686 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev)) 687 return -1; 688 689 if (((manfid == MANFID_OSITECH) && 690 (cardid == PRODID_OSITECH_SEVEN)) || 691 ((manfid == MANFID_PSION) && 692 (cardid == PRODID_PSION_NET100))) { 693 rc = osi_load_firmware(link); 694 if (rc) 695 return rc; 696 } else if (manfid == MANFID_OSITECH) { 697 /* Make sure both functions are powered up */ 698 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR); 699 /* Now, turn on the interrupt for both card functions */ 700 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR); 701 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n", 702 inw(link->resource[0]->start + OSITECH_AUI_PWR), 703 inw(link->resource[0]->start + OSITECH_RESET_ISR)); 704 } 705 return 0; 706 } 707 708 static int smc91c92_suspend(struct pcmcia_device *link) 709 { 710 struct net_device *dev = link->priv; 711 712 if (link->open) 713 netif_device_detach(dev); 714 715 return 0; 716 } 717 718 static int smc91c92_resume(struct pcmcia_device *link) 719 { 720 struct net_device *dev = link->priv; 721 struct smc_private *smc = netdev_priv(dev); 722 int i; 723 724 if ((smc->manfid == MANFID_MEGAHERTZ) && 725 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) 726 mhz_3288_power(link); 727 if (smc->manfid == MANFID_MOTOROLA) 728 mot_config(link); 729 if ((smc->manfid == MANFID_OSITECH) && 730 (smc->cardid != PRODID_OSITECH_SEVEN)) { 731 /* Power up the card and enable interrupts */ 732 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR); 733 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR); 734 } 735 if (((smc->manfid == MANFID_OSITECH) && 736 (smc->cardid == PRODID_OSITECH_SEVEN)) || 737 ((smc->manfid == MANFID_PSION) && 738 (smc->cardid == PRODID_PSION_NET100))) { 739 i = osi_load_firmware(link); 740 if (i) { 741 netdev_err(dev, "Failed to load firmware\n"); 742 return i; 743 } 744 } 745 if (link->open) { 746 smc_reset(dev); 747 netif_device_attach(dev); 748 } 749 750 return 0; 751 } 752 753 754 /*====================================================================== 755 756 This verifies that the chip is some SMC91cXX variant, and returns 757 the revision code if successful. Otherwise, it returns -ENODEV. 758 759 ======================================================================*/ 760 761 static int check_sig(struct pcmcia_device *link) 762 { 763 struct net_device *dev = link->priv; 764 unsigned int ioaddr = dev->base_addr; 765 int width; 766 u_short s; 767 768 SMC_SELECT_BANK(1); 769 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) { 770 /* Try powering up the chip */ 771 outw(0, ioaddr + CONTROL); 772 mdelay(55); 773 } 774 775 /* Try setting bus width */ 776 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO); 777 s = inb(ioaddr + CONFIG); 778 if (width) 779 s |= CFG_16BIT; 780 else 781 s &= ~CFG_16BIT; 782 outb(s, ioaddr + CONFIG); 783 784 /* Check Base Address Register to make sure bus width is OK */ 785 s = inw(ioaddr + BASE_ADDR); 786 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) && 787 ((s >> 8) != (s & 0xff))) { 788 SMC_SELECT_BANK(3); 789 s = inw(ioaddr + REVISION); 790 return s & 0xff; 791 } 792 793 if (width) { 794 netdev_info(dev, "using 8-bit IO window\n"); 795 796 smc91c92_suspend(link); 797 pcmcia_fixup_iowidth(link); 798 smc91c92_resume(link); 799 return check_sig(link); 800 } 801 return -ENODEV; 802 } 803 804 static int smc91c92_config(struct pcmcia_device *link) 805 { 806 struct net_device *dev = link->priv; 807 struct smc_private *smc = netdev_priv(dev); 808 char *name; 809 int i, rev, j = 0; 810 unsigned int ioaddr; 811 u_long mir; 812 813 dev_dbg(&link->dev, "smc91c92_config\n"); 814 815 smc->manfid = link->manf_id; 816 smc->cardid = link->card_id; 817 818 if ((smc->manfid == MANFID_OSITECH) && 819 (smc->cardid != PRODID_OSITECH_SEVEN)) { 820 i = osi_config(link); 821 } else if ((smc->manfid == MANFID_MOTOROLA) || 822 ((smc->manfid == MANFID_MEGAHERTZ) && 823 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) || 824 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) { 825 i = mhz_mfc_config(link); 826 } else { 827 i = smc_config(link); 828 } 829 if (i) 830 goto config_failed; 831 832 i = pcmcia_request_irq(link, smc_interrupt); 833 if (i) 834 goto config_failed; 835 i = pcmcia_enable_device(link); 836 if (i) 837 goto config_failed; 838 839 if (smc->manfid == MANFID_MOTOROLA) 840 mot_config(link); 841 842 dev->irq = link->irq; 843 844 if ((if_port >= 0) && (if_port <= 2)) 845 dev->if_port = if_port; 846 else 847 dev_notice(&link->dev, "invalid if_port requested\n"); 848 849 switch (smc->manfid) { 850 case MANFID_OSITECH: 851 case MANFID_PSION: 852 i = osi_setup(link, smc->manfid, smc->cardid); break; 853 case MANFID_SMC: 854 case MANFID_NEW_MEDIA: 855 i = smc_setup(link); break; 856 case 0x128: /* For broken Megahertz cards */ 857 case MANFID_MEGAHERTZ: 858 i = mhz_setup(link); break; 859 case MANFID_MOTOROLA: 860 default: /* get the hw address from EEPROM */ 861 i = mot_setup(link); break; 862 } 863 864 if (i != 0) { 865 dev_notice(&link->dev, "Unable to find hardware address.\n"); 866 goto config_failed; 867 } 868 869 smc->duplex = 0; 870 smc->rx_ovrn = 0; 871 872 rev = check_sig(link); 873 name = "???"; 874 if (rev > 0) 875 switch (rev >> 4) { 876 case 3: name = "92"; break; 877 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break; 878 case 5: name = "95"; break; 879 case 7: name = "100"; break; 880 case 8: name = "100-FD"; break; 881 case 9: name = "110"; break; 882 } 883 884 ioaddr = dev->base_addr; 885 if (rev > 0) { 886 u_long mcr; 887 SMC_SELECT_BANK(0); 888 mir = inw(ioaddr + MEMINFO) & 0xff; 889 if (mir == 0xff) mir++; 890 /* Get scale factor for memory size */ 891 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200; 892 mir *= 128 * (1<<((mcr >> 9) & 7)); 893 SMC_SELECT_BANK(1); 894 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT; 895 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC; 896 if (smc->manfid == MANFID_OSITECH) 897 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0; 898 if ((rev >> 4) >= 7) 899 smc->cfg |= CFG_MII_SELECT; 900 } else 901 mir = 0; 902 903 if (smc->cfg & CFG_MII_SELECT) { 904 SMC_SELECT_BANK(3); 905 906 for (i = 0; i < 32; i++) { 907 j = mdio_read(dev, i, 1); 908 if ((j != 0) && (j != 0xffff)) break; 909 } 910 smc->mii_if.phy_id = (i < 32) ? i : -1; 911 912 SMC_SELECT_BANK(0); 913 } 914 915 SET_NETDEV_DEV(dev, &link->dev); 916 917 if (register_netdev(dev) != 0) { 918 dev_err(&link->dev, "register_netdev() failed\n"); 919 goto config_undo; 920 } 921 922 netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n", 923 name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr); 924 925 if (rev > 0) { 926 if (mir & 0x3ff) 927 netdev_info(dev, " %lu byte", mir); 928 else 929 netdev_info(dev, " %lu kb", mir>>10); 930 pr_cont(" buffer, %s xcvr\n", 931 (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]); 932 } 933 934 if (smc->cfg & CFG_MII_SELECT) { 935 if (smc->mii_if.phy_id != -1) { 936 netdev_dbg(dev, " MII transceiver at index %d, status %x\n", 937 smc->mii_if.phy_id, j); 938 } else { 939 netdev_notice(dev, " No MII transceivers found!\n"); 940 } 941 } 942 return 0; 943 944 config_undo: 945 unregister_netdev(dev); 946 config_failed: 947 smc91c92_release(link); 948 free_netdev(dev); 949 return -ENODEV; 950 } /* smc91c92_config */ 951 952 static void smc91c92_release(struct pcmcia_device *link) 953 { 954 dev_dbg(&link->dev, "smc91c92_release\n"); 955 if (link->resource[2]->end) { 956 struct net_device *dev = link->priv; 957 struct smc_private *smc = netdev_priv(dev); 958 iounmap(smc->base); 959 } 960 pcmcia_disable_device(link); 961 } 962 963 /*====================================================================== 964 965 MII interface support for SMC91cXX based cards 966 ======================================================================*/ 967 968 #define MDIO_SHIFT_CLK 0x04 969 #define MDIO_DATA_OUT 0x01 970 #define MDIO_DIR_WRITE 0x08 971 #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE) 972 #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT) 973 #define MDIO_DATA_READ 0x02 974 975 static void mdio_sync(unsigned int addr) 976 { 977 int bits; 978 for (bits = 0; bits < 32; bits++) { 979 outb(MDIO_DATA_WRITE1, addr); 980 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr); 981 } 982 } 983 984 static int mdio_read(struct net_device *dev, int phy_id, int loc) 985 { 986 unsigned int addr = dev->base_addr + MGMT; 987 u_int cmd = (0x06<<10)|(phy_id<<5)|loc; 988 int i, retval = 0; 989 990 mdio_sync(addr); 991 for (i = 13; i >= 0; i--) { 992 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; 993 outb(dat, addr); 994 outb(dat | MDIO_SHIFT_CLK, addr); 995 } 996 for (i = 19; i > 0; i--) { 997 outb(0, addr); 998 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0); 999 outb(MDIO_SHIFT_CLK, addr); 1000 } 1001 return (retval>>1) & 0xffff; 1002 } 1003 1004 static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) 1005 { 1006 unsigned int addr = dev->base_addr + MGMT; 1007 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value; 1008 int i; 1009 1010 mdio_sync(addr); 1011 for (i = 31; i >= 0; i--) { 1012 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; 1013 outb(dat, addr); 1014 outb(dat | MDIO_SHIFT_CLK, addr); 1015 } 1016 for (i = 1; i >= 0; i--) { 1017 outb(0, addr); 1018 outb(MDIO_SHIFT_CLK, addr); 1019 } 1020 } 1021 1022 /*====================================================================== 1023 1024 The driver core code, most of which should be common with a 1025 non-PCMCIA implementation. 1026 1027 ======================================================================*/ 1028 1029 #ifdef PCMCIA_DEBUG 1030 static void smc_dump(struct net_device *dev) 1031 { 1032 unsigned int ioaddr = dev->base_addr; 1033 u_short i, w, save; 1034 save = inw(ioaddr + BANK_SELECT); 1035 for (w = 0; w < 4; w++) { 1036 SMC_SELECT_BANK(w); 1037 netdev_dbg(dev, "bank %d: ", w); 1038 for (i = 0; i < 14; i += 2) 1039 pr_cont(" %04x", inw(ioaddr + i)); 1040 pr_cont("\n"); 1041 } 1042 outw(save, ioaddr + BANK_SELECT); 1043 } 1044 #endif 1045 1046 static int smc_open(struct net_device *dev) 1047 { 1048 struct smc_private *smc = netdev_priv(dev); 1049 struct pcmcia_device *link = smc->p_dev; 1050 1051 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n", 1052 dev->name, dev, inw(dev->base_addr + BANK_SELECT)); 1053 #ifdef PCMCIA_DEBUG 1054 smc_dump(dev); 1055 #endif 1056 1057 /* Check that the PCMCIA card is still here. */ 1058 if (!pcmcia_dev_present(link)) 1059 return -ENODEV; 1060 /* Physical device present signature. */ 1061 if (check_sig(link) < 0) { 1062 netdev_info(dev, "Yikes! Bad chip signature!\n"); 1063 return -ENODEV; 1064 } 1065 link->open++; 1066 1067 netif_start_queue(dev); 1068 smc->saved_skb = NULL; 1069 smc->packets_waiting = 0; 1070 1071 smc_reset(dev); 1072 timer_setup(&smc->media, media_check, 0); 1073 mod_timer(&smc->media, jiffies + HZ); 1074 1075 return 0; 1076 } /* smc_open */ 1077 1078 /*====================================================================*/ 1079 1080 static int smc_close(struct net_device *dev) 1081 { 1082 struct smc_private *smc = netdev_priv(dev); 1083 struct pcmcia_device *link = smc->p_dev; 1084 unsigned int ioaddr = dev->base_addr; 1085 1086 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n", 1087 dev->name, inw(ioaddr + BANK_SELECT)); 1088 1089 netif_stop_queue(dev); 1090 1091 /* Shut off all interrupts, and turn off the Tx and Rx sections. 1092 Don't bother to check for chip present. */ 1093 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */ 1094 outw(0, ioaddr + INTERRUPT); 1095 SMC_SELECT_BANK(0); 1096 mask_bits(0xff00, ioaddr + RCR); 1097 mask_bits(0xff00, ioaddr + TCR); 1098 1099 /* Put the chip into power-down mode. */ 1100 SMC_SELECT_BANK(1); 1101 outw(CTL_POWERDOWN, ioaddr + CONTROL ); 1102 1103 link->open--; 1104 del_timer_sync(&smc->media); 1105 1106 return 0; 1107 } /* smc_close */ 1108 1109 /*====================================================================== 1110 1111 Transfer a packet to the hardware and trigger the packet send. 1112 This may be called at either from either the Tx queue code 1113 or the interrupt handler. 1114 1115 ======================================================================*/ 1116 1117 static void smc_hardware_send_packet(struct net_device * dev) 1118 { 1119 struct smc_private *smc = netdev_priv(dev); 1120 struct sk_buff *skb = smc->saved_skb; 1121 unsigned int ioaddr = dev->base_addr; 1122 u_char packet_no; 1123 1124 if (!skb) { 1125 netdev_err(dev, "In XMIT with no packet to send\n"); 1126 return; 1127 } 1128 1129 /* There should be a packet slot waiting. */ 1130 packet_no = inw(ioaddr + PNR_ARR) >> 8; 1131 if (packet_no & 0x80) { 1132 /* If not, there is a hardware problem! Likely an ejected card. */ 1133 netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n", 1134 packet_no); 1135 dev_kfree_skb_irq(skb); 1136 smc->saved_skb = NULL; 1137 netif_start_queue(dev); 1138 return; 1139 } 1140 1141 dev->stats.tx_bytes += skb->len; 1142 /* The card should use the just-allocated buffer. */ 1143 outw(packet_no, ioaddr + PNR_ARR); 1144 /* point to the beginning of the packet */ 1145 outw(PTR_AUTOINC , ioaddr + POINTER); 1146 1147 /* Send the packet length (+6 for status, length and ctl byte) 1148 and the status word (set to zeros). */ 1149 { 1150 u_char *buf = skb->data; 1151 u_int length = skb->len; /* The chip will pad to ethernet min. */ 1152 1153 netdev_dbg(dev, "Trying to xmit packet of length %d\n", length); 1154 1155 /* send the packet length: +6 for status word, length, and ctl */ 1156 outw(0, ioaddr + DATA_1); 1157 outw(length + 6, ioaddr + DATA_1); 1158 outsw(ioaddr + DATA_1, buf, length >> 1); 1159 1160 /* The odd last byte, if there is one, goes in the control word. */ 1161 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1); 1162 } 1163 1164 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */ 1165 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) | 1166 (inw(ioaddr + INTERRUPT) & 0xff00), 1167 ioaddr + INTERRUPT); 1168 1169 /* The chip does the rest of the work. */ 1170 outw(MC_ENQUEUE , ioaddr + MMU_CMD); 1171 1172 smc->saved_skb = NULL; 1173 dev_kfree_skb_irq(skb); 1174 netif_trans_update(dev); 1175 netif_start_queue(dev); 1176 } 1177 1178 /*====================================================================*/ 1179 1180 static void smc_tx_timeout(struct net_device *dev, unsigned int txqueue) 1181 { 1182 struct smc_private *smc = netdev_priv(dev); 1183 unsigned int ioaddr = dev->base_addr; 1184 1185 netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n", 1186 inw(ioaddr)&0xff, inw(ioaddr + 2)); 1187 dev->stats.tx_errors++; 1188 smc_reset(dev); 1189 netif_trans_update(dev); /* prevent tx timeout */ 1190 smc->saved_skb = NULL; 1191 netif_wake_queue(dev); 1192 } 1193 1194 static netdev_tx_t smc_start_xmit(struct sk_buff *skb, 1195 struct net_device *dev) 1196 { 1197 struct smc_private *smc = netdev_priv(dev); 1198 unsigned int ioaddr = dev->base_addr; 1199 u_short num_pages; 1200 short time_out, ir; 1201 unsigned long flags; 1202 1203 netif_stop_queue(dev); 1204 1205 netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n", 1206 skb->len, inw(ioaddr + 2)); 1207 1208 if (smc->saved_skb) { 1209 /* THIS SHOULD NEVER HAPPEN. */ 1210 dev->stats.tx_aborted_errors++; 1211 netdev_dbg(dev, "Internal error -- sent packet while busy\n"); 1212 return NETDEV_TX_BUSY; 1213 } 1214 smc->saved_skb = skb; 1215 1216 num_pages = skb->len >> 8; 1217 1218 if (num_pages > 7) { 1219 netdev_err(dev, "Far too big packet error: %d pages\n", num_pages); 1220 dev_kfree_skb (skb); 1221 smc->saved_skb = NULL; 1222 dev->stats.tx_dropped++; 1223 return NETDEV_TX_OK; /* Do not re-queue this packet. */ 1224 } 1225 /* A packet is now waiting. */ 1226 smc->packets_waiting++; 1227 1228 spin_lock_irqsave(&smc->lock, flags); 1229 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */ 1230 1231 /* need MC_RESET to keep the memory consistent. errata? */ 1232 if (smc->rx_ovrn) { 1233 outw(MC_RESET, ioaddr + MMU_CMD); 1234 smc->rx_ovrn = 0; 1235 } 1236 1237 /* Allocate the memory; send the packet now if we win. */ 1238 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD); 1239 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) { 1240 ir = inw(ioaddr+INTERRUPT); 1241 if (ir & IM_ALLOC_INT) { 1242 /* Acknowledge the interrupt, send the packet. */ 1243 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT); 1244 smc_hardware_send_packet(dev); /* Send the packet now.. */ 1245 spin_unlock_irqrestore(&smc->lock, flags); 1246 return NETDEV_TX_OK; 1247 } 1248 } 1249 1250 /* Otherwise defer until the Tx-space-allocated interrupt. */ 1251 netdev_dbg(dev, "memory allocation deferred.\n"); 1252 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT); 1253 spin_unlock_irqrestore(&smc->lock, flags); 1254 1255 return NETDEV_TX_OK; 1256 } 1257 1258 /*====================================================================== 1259 1260 Handle a Tx anomalous event. Entered while in Window 2. 1261 1262 ======================================================================*/ 1263 1264 static void smc_tx_err(struct net_device * dev) 1265 { 1266 struct smc_private *smc = netdev_priv(dev); 1267 unsigned int ioaddr = dev->base_addr; 1268 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff; 1269 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f; 1270 int tx_status; 1271 1272 /* select this as the packet to read from */ 1273 outw(packet_no, ioaddr + PNR_ARR); 1274 1275 /* read the first word from this packet */ 1276 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER); 1277 1278 tx_status = inw(ioaddr + DATA_1); 1279 1280 dev->stats.tx_errors++; 1281 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++; 1282 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++; 1283 if (tx_status & TS_16COL) { 1284 dev->stats.tx_aborted_errors++; 1285 smc->tx_err++; 1286 } 1287 1288 if (tx_status & TS_SUCCESS) { 1289 netdev_notice(dev, "Successful packet caused error interrupt?\n"); 1290 } 1291 /* re-enable transmit */ 1292 SMC_SELECT_BANK(0); 1293 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); 1294 SMC_SELECT_BANK(2); 1295 1296 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */ 1297 1298 /* one less packet waiting for me */ 1299 smc->packets_waiting--; 1300 1301 outw(saved_packet, ioaddr + PNR_ARR); 1302 } 1303 1304 /*====================================================================*/ 1305 1306 static void smc_eph_irq(struct net_device *dev) 1307 { 1308 struct smc_private *smc = netdev_priv(dev); 1309 unsigned int ioaddr = dev->base_addr; 1310 u_short card_stats, ephs; 1311 1312 SMC_SELECT_BANK(0); 1313 ephs = inw(ioaddr + EPH); 1314 netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n", 1315 ephs); 1316 /* Could be a counter roll-over warning: update stats. */ 1317 card_stats = inw(ioaddr + COUNTER); 1318 /* single collisions */ 1319 dev->stats.collisions += card_stats & 0xF; 1320 card_stats >>= 4; 1321 /* multiple collisions */ 1322 dev->stats.collisions += card_stats & 0xF; 1323 #if 0 /* These are for when linux supports these statistics */ 1324 card_stats >>= 4; /* deferred */ 1325 card_stats >>= 4; /* excess deferred */ 1326 #endif 1327 /* If we had a transmit error we must re-enable the transmitter. */ 1328 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); 1329 1330 /* Clear a link error interrupt. */ 1331 SMC_SELECT_BANK(1); 1332 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL); 1333 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, 1334 ioaddr + CONTROL); 1335 SMC_SELECT_BANK(2); 1336 } 1337 1338 /*====================================================================*/ 1339 1340 static irqreturn_t smc_interrupt(int irq, void *dev_id) 1341 { 1342 struct net_device *dev = dev_id; 1343 struct smc_private *smc = netdev_priv(dev); 1344 unsigned int ioaddr; 1345 u_short saved_bank, saved_pointer, mask, status; 1346 unsigned int handled = 1; 1347 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */ 1348 1349 if (!netif_device_present(dev)) 1350 return IRQ_NONE; 1351 1352 ioaddr = dev->base_addr; 1353 1354 netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n", 1355 irq, ioaddr); 1356 1357 spin_lock(&smc->lock); 1358 smc->watchdog = 0; 1359 saved_bank = inw(ioaddr + BANK_SELECT); 1360 if ((saved_bank & 0xff00) != 0x3300) { 1361 /* The device does not exist -- the card could be off-line, or 1362 maybe it has been ejected. */ 1363 netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n", 1364 irq); 1365 handled = 0; 1366 goto irq_done; 1367 } 1368 1369 SMC_SELECT_BANK(2); 1370 saved_pointer = inw(ioaddr + POINTER); 1371 mask = inw(ioaddr + INTERRUPT) >> 8; 1372 /* clear all interrupts */ 1373 outw(0, ioaddr + INTERRUPT); 1374 1375 do { /* read the status flag, and mask it */ 1376 status = inw(ioaddr + INTERRUPT) & 0xff; 1377 netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n", 1378 status, mask); 1379 if ((status & mask) == 0) { 1380 if (bogus_cnt == INTR_WORK) 1381 handled = 0; 1382 break; 1383 } 1384 if (status & IM_RCV_INT) { 1385 /* Got a packet(s). */ 1386 smc_rx(dev); 1387 } 1388 if (status & IM_TX_INT) { 1389 smc_tx_err(dev); 1390 outw(IM_TX_INT, ioaddr + INTERRUPT); 1391 } 1392 status &= mask; 1393 if (status & IM_TX_EMPTY_INT) { 1394 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT); 1395 mask &= ~IM_TX_EMPTY_INT; 1396 dev->stats.tx_packets += smc->packets_waiting; 1397 smc->packets_waiting = 0; 1398 } 1399 if (status & IM_ALLOC_INT) { 1400 /* Clear this interrupt so it doesn't happen again */ 1401 mask &= ~IM_ALLOC_INT; 1402 1403 smc_hardware_send_packet(dev); 1404 1405 /* enable xmit interrupts based on this */ 1406 mask |= (IM_TX_EMPTY_INT | IM_TX_INT); 1407 1408 /* and let the card send more packets to me */ 1409 netif_wake_queue(dev); 1410 } 1411 if (status & IM_RX_OVRN_INT) { 1412 dev->stats.rx_errors++; 1413 dev->stats.rx_fifo_errors++; 1414 if (smc->duplex) 1415 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */ 1416 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT); 1417 } 1418 if (status & IM_EPH_INT) 1419 smc_eph_irq(dev); 1420 } while (--bogus_cnt); 1421 1422 netdev_dbg(dev, " Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n", 1423 mask, saved_bank, saved_pointer); 1424 1425 /* restore state register */ 1426 outw((mask<<8), ioaddr + INTERRUPT); 1427 outw(saved_pointer, ioaddr + POINTER); 1428 SMC_SELECT_BANK(saved_bank); 1429 1430 netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq); 1431 1432 irq_done: 1433 1434 if ((smc->manfid == MANFID_OSITECH) && 1435 (smc->cardid != PRODID_OSITECH_SEVEN)) { 1436 /* Retrigger interrupt if needed */ 1437 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR); 1438 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR); 1439 } 1440 if (smc->manfid == MANFID_MOTOROLA) { 1441 u_char cor; 1442 cor = readb(smc->base + MOT_UART + CISREG_COR); 1443 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR); 1444 writeb(cor, smc->base + MOT_UART + CISREG_COR); 1445 cor = readb(smc->base + MOT_LAN + CISREG_COR); 1446 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR); 1447 writeb(cor, smc->base + MOT_LAN + CISREG_COR); 1448 } 1449 1450 if ((smc->base != NULL) && /* Megahertz MFC's */ 1451 (smc->manfid == MANFID_MEGAHERTZ) && 1452 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) { 1453 1454 u_char tmp; 1455 tmp = readb(smc->base+MEGAHERTZ_ISR); 1456 tmp = readb(smc->base+MEGAHERTZ_ISR); 1457 1458 /* Retrigger interrupt if needed */ 1459 writeb(tmp, smc->base + MEGAHERTZ_ISR); 1460 writeb(tmp, smc->base + MEGAHERTZ_ISR); 1461 } 1462 1463 spin_unlock(&smc->lock); 1464 return IRQ_RETVAL(handled); 1465 } 1466 1467 /*====================================================================*/ 1468 1469 static void smc_rx(struct net_device *dev) 1470 { 1471 unsigned int ioaddr = dev->base_addr; 1472 int rx_status; 1473 int packet_length; /* Caution: not frame length, rather words 1474 to transfer from the chip. */ 1475 1476 /* Assertion: we are in Window 2. */ 1477 1478 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) { 1479 netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n"); 1480 return; 1481 } 1482 1483 /* Reset the read pointer, and read the status and packet length. */ 1484 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER); 1485 rx_status = inw(ioaddr + DATA_1); 1486 packet_length = inw(ioaddr + DATA_1) & 0x07ff; 1487 1488 netdev_dbg(dev, "Receive status %4.4x length %d.\n", 1489 rx_status, packet_length); 1490 1491 if (!(rx_status & RS_ERRORS)) { 1492 /* do stuff to make a new packet */ 1493 struct sk_buff *skb; 1494 struct smc_private *smc = netdev_priv(dev); 1495 1496 /* Note: packet_length adds 5 or 6 extra bytes here! */ 1497 skb = netdev_alloc_skb(dev, packet_length+2); 1498 1499 if (skb == NULL) { 1500 netdev_dbg(dev, "Low memory, packet dropped.\n"); 1501 dev->stats.rx_dropped++; 1502 outw(MC_RELEASE, ioaddr + MMU_CMD); 1503 return; 1504 } 1505 1506 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6); 1507 skb_reserve(skb, 2); 1508 insw(ioaddr+DATA_1, skb_put(skb, packet_length), 1509 (packet_length+1)>>1); 1510 skb->protocol = eth_type_trans(skb, dev); 1511 1512 netif_rx(skb); 1513 smc->last_rx = jiffies; 1514 dev->stats.rx_packets++; 1515 dev->stats.rx_bytes += packet_length; 1516 if (rx_status & RS_MULTICAST) 1517 dev->stats.multicast++; 1518 } else { 1519 /* error ... */ 1520 dev->stats.rx_errors++; 1521 1522 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++; 1523 if (rx_status & (RS_TOOSHORT | RS_TOOLONG)) 1524 dev->stats.rx_length_errors++; 1525 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++; 1526 } 1527 /* Let the MMU free the memory of this packet. */ 1528 outw(MC_RELEASE, ioaddr + MMU_CMD); 1529 } 1530 1531 /*====================================================================== 1532 1533 Set the receive mode. 1534 1535 This routine is used by both the protocol level to notify us of 1536 promiscuous/multicast mode changes, and by the open/reset code to 1537 initialize the Rx registers. We always set the multicast list and 1538 leave the receiver running. 1539 1540 ======================================================================*/ 1541 1542 static void set_rx_mode(struct net_device *dev) 1543 { 1544 unsigned int ioaddr = dev->base_addr; 1545 struct smc_private *smc = netdev_priv(dev); 1546 unsigned char multicast_table[8]; 1547 unsigned long flags; 1548 u_short rx_cfg_setting; 1549 int i; 1550 1551 memset(multicast_table, 0, sizeof(multicast_table)); 1552 1553 if (dev->flags & IFF_PROMISC) { 1554 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti; 1555 } else if (dev->flags & IFF_ALLMULTI) 1556 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti; 1557 else { 1558 if (!netdev_mc_empty(dev)) { 1559 struct netdev_hw_addr *ha; 1560 1561 netdev_for_each_mc_addr(ha, dev) { 1562 u_int position = ether_crc(6, ha->addr); 1563 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7); 1564 } 1565 } 1566 rx_cfg_setting = RxStripCRC | RxEnable; 1567 } 1568 1569 /* Load MC table and Rx setting into the chip without interrupts. */ 1570 spin_lock_irqsave(&smc->lock, flags); 1571 SMC_SELECT_BANK(3); 1572 for (i = 0; i < 8; i++) 1573 outb(multicast_table[i], ioaddr + MULTICAST0 + i); 1574 SMC_SELECT_BANK(0); 1575 outw(rx_cfg_setting, ioaddr + RCR); 1576 SMC_SELECT_BANK(2); 1577 spin_unlock_irqrestore(&smc->lock, flags); 1578 } 1579 1580 /*====================================================================== 1581 1582 Senses when a card's config changes. Here, it's coax or TP. 1583 1584 ======================================================================*/ 1585 1586 static int s9k_config(struct net_device *dev, struct ifmap *map) 1587 { 1588 struct smc_private *smc = netdev_priv(dev); 1589 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 1590 if (smc->cfg & CFG_MII_SELECT) 1591 return -EOPNOTSUPP; 1592 else if (map->port > 2) 1593 return -EINVAL; 1594 dev->if_port = map->port; 1595 netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]); 1596 smc_reset(dev); 1597 } 1598 return 0; 1599 } 1600 1601 /*====================================================================== 1602 1603 Reset the chip, reloading every register that might be corrupted. 1604 1605 ======================================================================*/ 1606 1607 /* 1608 Set transceiver type, perhaps to something other than what the user 1609 specified in dev->if_port. 1610 */ 1611 static void smc_set_xcvr(struct net_device *dev, int if_port) 1612 { 1613 struct smc_private *smc = netdev_priv(dev); 1614 unsigned int ioaddr = dev->base_addr; 1615 u_short saved_bank; 1616 1617 saved_bank = inw(ioaddr + BANK_SELECT); 1618 SMC_SELECT_BANK(1); 1619 if (if_port == 2) { 1620 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG); 1621 if ((smc->manfid == MANFID_OSITECH) && 1622 (smc->cardid != PRODID_OSITECH_SEVEN)) 1623 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); 1624 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002); 1625 } else { 1626 outw(smc->cfg, ioaddr + CONFIG); 1627 if ((smc->manfid == MANFID_OSITECH) && 1628 (smc->cardid != PRODID_OSITECH_SEVEN)) 1629 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); 1630 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001); 1631 } 1632 SMC_SELECT_BANK(saved_bank); 1633 } 1634 1635 static void smc_reset(struct net_device *dev) 1636 { 1637 unsigned int ioaddr = dev->base_addr; 1638 struct smc_private *smc = netdev_priv(dev); 1639 int i; 1640 1641 netdev_dbg(dev, "smc91c92 reset called.\n"); 1642 1643 /* The first interaction must be a write to bring the chip out 1644 of sleep mode. */ 1645 SMC_SELECT_BANK(0); 1646 /* Reset the chip. */ 1647 outw(RCR_SOFTRESET, ioaddr + RCR); 1648 udelay(10); 1649 1650 /* Clear the transmit and receive configuration registers. */ 1651 outw(RCR_CLEAR, ioaddr + RCR); 1652 outw(TCR_CLEAR, ioaddr + TCR); 1653 1654 /* Set the Window 1 control, configuration and station addr registers. 1655 No point in writing the I/O base register ;-> */ 1656 SMC_SELECT_BANK(1); 1657 /* Automatically release successfully transmitted packets, 1658 Accept link errors, counter and Tx error interrupts. */ 1659 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, 1660 ioaddr + CONTROL); 1661 smc_set_xcvr(dev, dev->if_port); 1662 if ((smc->manfid == MANFID_OSITECH) && 1663 (smc->cardid != PRODID_OSITECH_SEVEN)) 1664 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) | 1665 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00), 1666 ioaddr - 0x10 + OSITECH_AUI_PWR); 1667 1668 /* Fill in the physical address. The databook is wrong about the order! */ 1669 for (i = 0; i < 6; i += 2) 1670 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i], 1671 ioaddr + ADDR0 + i); 1672 1673 /* Reset the MMU */ 1674 SMC_SELECT_BANK(2); 1675 outw(MC_RESET, ioaddr + MMU_CMD); 1676 outw(0, ioaddr + INTERRUPT); 1677 1678 /* Re-enable the chip. */ 1679 SMC_SELECT_BANK(0); 1680 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) | 1681 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR); 1682 set_rx_mode(dev); 1683 1684 if (smc->cfg & CFG_MII_SELECT) { 1685 SMC_SELECT_BANK(3); 1686 1687 /* Reset MII */ 1688 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000); 1689 1690 /* Advertise 100F, 100H, 10F, 10H */ 1691 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1); 1692 1693 /* Restart MII autonegotiation */ 1694 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000); 1695 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200); 1696 } 1697 1698 /* Enable interrupts. */ 1699 SMC_SELECT_BANK(2); 1700 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8, 1701 ioaddr + INTERRUPT); 1702 } 1703 1704 /*====================================================================== 1705 1706 Media selection timer routine 1707 1708 ======================================================================*/ 1709 1710 static void media_check(struct timer_list *t) 1711 { 1712 struct smc_private *smc = from_timer(smc, t, media); 1713 struct net_device *dev = smc->mii_if.dev; 1714 unsigned int ioaddr = dev->base_addr; 1715 u_short i, media, saved_bank; 1716 u_short link; 1717 unsigned long flags; 1718 1719 spin_lock_irqsave(&smc->lock, flags); 1720 1721 saved_bank = inw(ioaddr + BANK_SELECT); 1722 1723 if (!netif_device_present(dev)) 1724 goto reschedule; 1725 1726 SMC_SELECT_BANK(2); 1727 1728 /* need MC_RESET to keep the memory consistent. errata? */ 1729 if (smc->rx_ovrn) { 1730 outw(MC_RESET, ioaddr + MMU_CMD); 1731 smc->rx_ovrn = 0; 1732 } 1733 i = inw(ioaddr + INTERRUPT); 1734 SMC_SELECT_BANK(0); 1735 media = inw(ioaddr + EPH) & EPH_LINK_OK; 1736 SMC_SELECT_BANK(1); 1737 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1; 1738 1739 SMC_SELECT_BANK(saved_bank); 1740 spin_unlock_irqrestore(&smc->lock, flags); 1741 1742 /* Check for pending interrupt with watchdog flag set: with 1743 this, we can limp along even if the interrupt is blocked */ 1744 if (smc->watchdog++ && ((i>>8) & i)) { 1745 if (!smc->fast_poll) 1746 netdev_info(dev, "interrupt(s) dropped!\n"); 1747 local_irq_save(flags); 1748 smc_interrupt(dev->irq, dev); 1749 local_irq_restore(flags); 1750 smc->fast_poll = HZ; 1751 } 1752 if (smc->fast_poll) { 1753 smc->fast_poll--; 1754 smc->media.expires = jiffies + HZ/100; 1755 add_timer(&smc->media); 1756 return; 1757 } 1758 1759 spin_lock_irqsave(&smc->lock, flags); 1760 1761 saved_bank = inw(ioaddr + BANK_SELECT); 1762 1763 if (smc->cfg & CFG_MII_SELECT) { 1764 if (smc->mii_if.phy_id < 0) 1765 goto reschedule; 1766 1767 SMC_SELECT_BANK(3); 1768 link = mdio_read(dev, smc->mii_if.phy_id, 1); 1769 if (!link || (link == 0xffff)) { 1770 netdev_info(dev, "MII is missing!\n"); 1771 smc->mii_if.phy_id = -1; 1772 goto reschedule; 1773 } 1774 1775 link &= 0x0004; 1776 if (link != smc->link_status) { 1777 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5); 1778 netdev_info(dev, "%s link beat\n", link ? "found" : "lost"); 1779 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40)) 1780 ? TCR_FDUPLX : 0); 1781 if (link) { 1782 netdev_info(dev, "autonegotiation complete: " 1783 "%dbaseT-%cD selected\n", 1784 (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H'); 1785 } 1786 SMC_SELECT_BANK(0); 1787 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR); 1788 smc->link_status = link; 1789 } 1790 goto reschedule; 1791 } 1792 1793 /* Ignore collisions unless we've had no rx's recently */ 1794 if (time_after(jiffies, smc->last_rx + HZ)) { 1795 if (smc->tx_err || (smc->media_status & EPH_16COL)) 1796 media |= EPH_16COL; 1797 } 1798 smc->tx_err = 0; 1799 1800 if (media != smc->media_status) { 1801 if ((media & smc->media_status & 1) && 1802 ((smc->media_status ^ media) & EPH_LINK_OK)) 1803 netdev_info(dev, "%s link beat\n", 1804 smc->media_status & EPH_LINK_OK ? "lost" : "found"); 1805 else if ((media & smc->media_status & 2) && 1806 ((smc->media_status ^ media) & EPH_16COL)) 1807 netdev_info(dev, "coax cable %s\n", 1808 media & EPH_16COL ? "problem" : "ok"); 1809 if (dev->if_port == 0) { 1810 if (media & 1) { 1811 if (media & EPH_LINK_OK) 1812 netdev_info(dev, "flipped to 10baseT\n"); 1813 else 1814 smc_set_xcvr(dev, 2); 1815 } else { 1816 if (media & EPH_16COL) 1817 smc_set_xcvr(dev, 1); 1818 else 1819 netdev_info(dev, "flipped to 10base2\n"); 1820 } 1821 } 1822 smc->media_status = media; 1823 } 1824 1825 reschedule: 1826 smc->media.expires = jiffies + HZ; 1827 add_timer(&smc->media); 1828 SMC_SELECT_BANK(saved_bank); 1829 spin_unlock_irqrestore(&smc->lock, flags); 1830 } 1831 1832 static int smc_link_ok(struct net_device *dev) 1833 { 1834 unsigned int ioaddr = dev->base_addr; 1835 struct smc_private *smc = netdev_priv(dev); 1836 1837 if (smc->cfg & CFG_MII_SELECT) { 1838 return mii_link_ok(&smc->mii_if); 1839 } else { 1840 SMC_SELECT_BANK(0); 1841 return inw(ioaddr + EPH) & EPH_LINK_OK; 1842 } 1843 } 1844 1845 static void smc_netdev_get_ecmd(struct net_device *dev, 1846 struct ethtool_link_ksettings *ecmd) 1847 { 1848 u16 tmp; 1849 unsigned int ioaddr = dev->base_addr; 1850 u32 supported; 1851 1852 supported = (SUPPORTED_TP | SUPPORTED_AUI | 1853 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full); 1854 1855 SMC_SELECT_BANK(1); 1856 tmp = inw(ioaddr + CONFIG); 1857 ecmd->base.port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP; 1858 ecmd->base.speed = SPEED_10; 1859 ecmd->base.phy_address = ioaddr + MGMT; 1860 1861 SMC_SELECT_BANK(0); 1862 tmp = inw(ioaddr + TCR); 1863 ecmd->base.duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF; 1864 1865 ethtool_convert_legacy_u32_to_link_mode(ecmd->link_modes.supported, 1866 supported); 1867 } 1868 1869 static int smc_netdev_set_ecmd(struct net_device *dev, 1870 const struct ethtool_link_ksettings *ecmd) 1871 { 1872 u16 tmp; 1873 unsigned int ioaddr = dev->base_addr; 1874 1875 if (ecmd->base.speed != SPEED_10) 1876 return -EINVAL; 1877 if (ecmd->base.duplex != DUPLEX_HALF && 1878 ecmd->base.duplex != DUPLEX_FULL) 1879 return -EINVAL; 1880 if (ecmd->base.port != PORT_TP && ecmd->base.port != PORT_AUI) 1881 return -EINVAL; 1882 1883 if (ecmd->base.port == PORT_AUI) 1884 smc_set_xcvr(dev, 1); 1885 else 1886 smc_set_xcvr(dev, 0); 1887 1888 SMC_SELECT_BANK(0); 1889 tmp = inw(ioaddr + TCR); 1890 if (ecmd->base.duplex == DUPLEX_FULL) 1891 tmp |= TCR_FDUPLX; 1892 else 1893 tmp &= ~TCR_FDUPLX; 1894 outw(tmp, ioaddr + TCR); 1895 1896 return 0; 1897 } 1898 1899 static int check_if_running(struct net_device *dev) 1900 { 1901 if (!netif_running(dev)) 1902 return -EINVAL; 1903 return 0; 1904 } 1905 1906 static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1907 { 1908 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); 1909 strlcpy(info->version, DRV_VERSION, sizeof(info->version)); 1910 } 1911 1912 static int smc_get_link_ksettings(struct net_device *dev, 1913 struct ethtool_link_ksettings *ecmd) 1914 { 1915 struct smc_private *smc = netdev_priv(dev); 1916 unsigned int ioaddr = dev->base_addr; 1917 u16 saved_bank = inw(ioaddr + BANK_SELECT); 1918 unsigned long flags; 1919 1920 spin_lock_irqsave(&smc->lock, flags); 1921 SMC_SELECT_BANK(3); 1922 if (smc->cfg & CFG_MII_SELECT) 1923 mii_ethtool_get_link_ksettings(&smc->mii_if, ecmd); 1924 else 1925 smc_netdev_get_ecmd(dev, ecmd); 1926 SMC_SELECT_BANK(saved_bank); 1927 spin_unlock_irqrestore(&smc->lock, flags); 1928 return 0; 1929 } 1930 1931 static int smc_set_link_ksettings(struct net_device *dev, 1932 const struct ethtool_link_ksettings *ecmd) 1933 { 1934 struct smc_private *smc = netdev_priv(dev); 1935 unsigned int ioaddr = dev->base_addr; 1936 u16 saved_bank = inw(ioaddr + BANK_SELECT); 1937 int ret; 1938 unsigned long flags; 1939 1940 spin_lock_irqsave(&smc->lock, flags); 1941 SMC_SELECT_BANK(3); 1942 if (smc->cfg & CFG_MII_SELECT) 1943 ret = mii_ethtool_set_link_ksettings(&smc->mii_if, ecmd); 1944 else 1945 ret = smc_netdev_set_ecmd(dev, ecmd); 1946 SMC_SELECT_BANK(saved_bank); 1947 spin_unlock_irqrestore(&smc->lock, flags); 1948 return ret; 1949 } 1950 1951 static u32 smc_get_link(struct net_device *dev) 1952 { 1953 struct smc_private *smc = netdev_priv(dev); 1954 unsigned int ioaddr = dev->base_addr; 1955 u16 saved_bank = inw(ioaddr + BANK_SELECT); 1956 u32 ret; 1957 unsigned long flags; 1958 1959 spin_lock_irqsave(&smc->lock, flags); 1960 SMC_SELECT_BANK(3); 1961 ret = smc_link_ok(dev); 1962 SMC_SELECT_BANK(saved_bank); 1963 spin_unlock_irqrestore(&smc->lock, flags); 1964 return ret; 1965 } 1966 1967 static int smc_nway_reset(struct net_device *dev) 1968 { 1969 struct smc_private *smc = netdev_priv(dev); 1970 if (smc->cfg & CFG_MII_SELECT) { 1971 unsigned int ioaddr = dev->base_addr; 1972 u16 saved_bank = inw(ioaddr + BANK_SELECT); 1973 int res; 1974 1975 SMC_SELECT_BANK(3); 1976 res = mii_nway_restart(&smc->mii_if); 1977 SMC_SELECT_BANK(saved_bank); 1978 1979 return res; 1980 } else 1981 return -EOPNOTSUPP; 1982 } 1983 1984 static const struct ethtool_ops ethtool_ops = { 1985 .begin = check_if_running, 1986 .get_drvinfo = smc_get_drvinfo, 1987 .get_link = smc_get_link, 1988 .nway_reset = smc_nway_reset, 1989 .get_link_ksettings = smc_get_link_ksettings, 1990 .set_link_ksettings = smc_set_link_ksettings, 1991 }; 1992 1993 static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) 1994 { 1995 struct smc_private *smc = netdev_priv(dev); 1996 struct mii_ioctl_data *mii = if_mii(rq); 1997 int rc = 0; 1998 u16 saved_bank; 1999 unsigned int ioaddr = dev->base_addr; 2000 unsigned long flags; 2001 2002 if (!netif_running(dev)) 2003 return -EINVAL; 2004 2005 spin_lock_irqsave(&smc->lock, flags); 2006 saved_bank = inw(ioaddr + BANK_SELECT); 2007 SMC_SELECT_BANK(3); 2008 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL); 2009 SMC_SELECT_BANK(saved_bank); 2010 spin_unlock_irqrestore(&smc->lock, flags); 2011 return rc; 2012 } 2013 2014 static const struct pcmcia_device_id smc91c92_ids[] = { 2015 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501), 2016 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a), 2017 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63), 2018 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63), 2019 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef), 2020 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef), 2021 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c), 2022 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e), 2023 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9), 2024 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed), 2025 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020), 2026 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023), 2027 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb), 2028 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc), 2029 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1), 2030 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5), 2031 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9), 2032 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953), 2033 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a), 2034 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314), 2035 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a), 2036 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc), 2037 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9), 2038 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d), 2039 /* These conflict with other cards! */ 2040 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */ 2041 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */ 2042 PCMCIA_DEVICE_NULL, 2043 }; 2044 MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids); 2045 2046 static struct pcmcia_driver smc91c92_cs_driver = { 2047 .owner = THIS_MODULE, 2048 .name = "smc91c92_cs", 2049 .probe = smc91c92_probe, 2050 .remove = smc91c92_detach, 2051 .id_table = smc91c92_ids, 2052 .suspend = smc91c92_suspend, 2053 .resume = smc91c92_resume, 2054 }; 2055 module_pcmcia_driver(smc91c92_cs_driver); 2056