1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <asm/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = { 110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 114 {0,} 115 }; 116 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 117 118 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 119 120 static const struct mii_chip_info { 121 const char * name; 122 u16 phy_id0; 123 u16 phy_id1; 124 u8 phy_types; 125 #define HOME 0x0001 126 #define LAN 0x0002 127 #define MIX 0x0003 128 #define UNKNOWN 0x0 129 } mii_chip_table[] = { 130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 137 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 143 {NULL,}, 144 }; 145 146 struct mii_phy { 147 struct mii_phy * next; 148 int phy_addr; 149 u16 phy_id0; 150 u16 phy_id1; 151 u16 status; 152 u8 phy_types; 153 }; 154 155 typedef struct _BufferDesc { 156 u32 link; 157 u32 cmdsts; 158 u32 bufptr; 159 } BufferDesc; 160 161 struct sis900_private { 162 struct pci_dev * pci_dev; 163 164 spinlock_t lock; 165 166 struct mii_phy * mii; 167 struct mii_phy * first_mii; /* record the first mii structure */ 168 unsigned int cur_phy; 169 struct mii_if_info mii_info; 170 171 void __iomem *ioaddr; 172 173 struct timer_list timer; /* Link status detection timer. */ 174 u8 autong_complete; /* 1: auto-negotiate complete */ 175 176 u32 msg_enable; 177 178 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */ 179 unsigned int cur_tx, dirty_tx; 180 181 /* The saved address of a sent/receive-in-place packet buffer */ 182 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 183 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 184 BufferDesc *tx_ring; 185 BufferDesc *rx_ring; 186 187 dma_addr_t tx_ring_dma; 188 dma_addr_t rx_ring_dma; 189 190 unsigned int tx_full; /* The Tx queue is full. */ 191 u8 host_bridge_rev; 192 u8 chipset_rev; 193 }; 194 195 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 196 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 197 MODULE_LICENSE("GPL"); 198 199 module_param(multicast_filter_limit, int, 0444); 200 module_param(max_interrupt_work, int, 0444); 201 module_param(sis900_debug, int, 0444); 202 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 203 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 204 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 205 206 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 207 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 208 #define sr32(reg) ioread32(ioaddr + (reg)) 209 #define sr16(reg) ioread16(ioaddr + (reg)) 210 211 #ifdef CONFIG_NET_POLL_CONTROLLER 212 static void sis900_poll(struct net_device *dev); 213 #endif 214 static int sis900_open(struct net_device *net_dev); 215 static int sis900_mii_probe (struct net_device * net_dev); 216 static void sis900_init_rxfilter (struct net_device * net_dev); 217 static u16 read_eeprom(void __iomem *ioaddr, int location); 218 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 219 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 220 static void sis900_timer(unsigned long data); 221 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 222 static void sis900_tx_timeout(struct net_device *net_dev); 223 static void sis900_init_tx_ring(struct net_device *net_dev); 224 static void sis900_init_rx_ring(struct net_device *net_dev); 225 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 226 struct net_device *net_dev); 227 static int sis900_rx(struct net_device *net_dev); 228 static void sis900_finish_xmit (struct net_device *net_dev); 229 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 230 static int sis900_close(struct net_device *net_dev); 231 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 232 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 233 static void set_rx_mode(struct net_device *net_dev); 234 static void sis900_reset(struct net_device *net_dev); 235 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 236 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 237 static u16 sis900_default_phy(struct net_device * net_dev); 238 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 239 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 240 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 241 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 242 static const struct ethtool_ops sis900_ethtool_ops; 243 244 /** 245 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 246 * @pci_dev: the sis900 pci device 247 * @net_dev: the net device to get address for 248 * 249 * Older SiS900 and friends, use EEPROM to store MAC address. 250 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 251 */ 252 253 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 254 struct net_device *net_dev) 255 { 256 struct sis900_private *sis_priv = netdev_priv(net_dev); 257 void __iomem *ioaddr = sis_priv->ioaddr; 258 u16 signature; 259 int i; 260 261 /* check to see if we have sane EEPROM */ 262 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 263 if (signature == 0xffff || signature == 0x0000) { 264 printk (KERN_WARNING "%s: Error EERPOM read %x\n", 265 pci_name(pci_dev), signature); 266 return 0; 267 } 268 269 /* get MAC address from EEPROM */ 270 for (i = 0; i < 3; i++) 271 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 272 273 return 1; 274 } 275 276 /** 277 * sis630e_get_mac_addr - Get MAC address for SiS630E model 278 * @pci_dev: the sis900 pci device 279 * @net_dev: the net device to get address for 280 * 281 * SiS630E model, use APC CMOS RAM to store MAC address. 282 * APC CMOS RAM is accessed through ISA bridge. 283 * MAC address is read into @net_dev->dev_addr. 284 */ 285 286 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 287 struct net_device *net_dev) 288 { 289 struct pci_dev *isa_bridge = NULL; 290 u8 reg; 291 int i; 292 293 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 294 if (!isa_bridge) 295 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 296 if (!isa_bridge) { 297 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 298 pci_name(pci_dev)); 299 return 0; 300 } 301 pci_read_config_byte(isa_bridge, 0x48, ®); 302 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 303 304 for (i = 0; i < 6; i++) { 305 outb(0x09 + i, 0x70); 306 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 307 } 308 309 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 310 pci_dev_put(isa_bridge); 311 312 return 1; 313 } 314 315 316 /** 317 * sis635_get_mac_addr - Get MAC address for SIS635 model 318 * @pci_dev: the sis900 pci device 319 * @net_dev: the net device to get address for 320 * 321 * SiS635 model, set MAC Reload Bit to load Mac address from APC 322 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 323 * @net_dev->dev_addr. 324 */ 325 326 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 327 struct net_device *net_dev) 328 { 329 struct sis900_private *sis_priv = netdev_priv(net_dev); 330 void __iomem *ioaddr = sis_priv->ioaddr; 331 u32 rfcrSave; 332 u32 i; 333 334 rfcrSave = sr32(rfcr); 335 336 sw32(cr, rfcrSave | RELOAD); 337 sw32(cr, 0); 338 339 /* disable packet filtering before setting filter */ 340 sw32(rfcr, rfcrSave & ~RFEN); 341 342 /* load MAC addr to filter data register */ 343 for (i = 0 ; i < 3 ; i++) { 344 sw32(rfcr, (i << RFADDR_shift)); 345 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr); 346 } 347 348 /* enable packet filtering */ 349 sw32(rfcr, rfcrSave | RFEN); 350 351 return 1; 352 } 353 354 /** 355 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 356 * @pci_dev: the sis900 pci device 357 * @net_dev: the net device to get address for 358 * 359 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 360 * is shared by 361 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first 362 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access 363 * by LAN, otherwise is not. After MAC address is read from EEPROM, send 364 * EEDONE signal to refuse EEPROM access by LAN. 365 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 366 * The signature field in SiS962 or SiS963 spec is meaningless. 367 * MAC address is read into @net_dev->dev_addr. 368 */ 369 370 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 371 struct net_device *net_dev) 372 { 373 struct sis900_private *sis_priv = netdev_priv(net_dev); 374 void __iomem *ioaddr = sis_priv->ioaddr; 375 int wait, rc = 0; 376 377 sw32(mear, EEREQ); 378 for (wait = 0; wait < 2000; wait++) { 379 if (sr32(mear) & EEGNT) { 380 u16 *mac = (u16 *)net_dev->dev_addr; 381 int i; 382 383 /* get MAC address from EEPROM */ 384 for (i = 0; i < 3; i++) 385 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 386 387 rc = 1; 388 break; 389 } 390 udelay(1); 391 } 392 sw32(mear, EEDONE); 393 return rc; 394 } 395 396 static const struct net_device_ops sis900_netdev_ops = { 397 .ndo_open = sis900_open, 398 .ndo_stop = sis900_close, 399 .ndo_start_xmit = sis900_start_xmit, 400 .ndo_set_config = sis900_set_config, 401 .ndo_set_rx_mode = set_rx_mode, 402 .ndo_change_mtu = eth_change_mtu, 403 .ndo_validate_addr = eth_validate_addr, 404 .ndo_set_mac_address = eth_mac_addr, 405 .ndo_do_ioctl = mii_ioctl, 406 .ndo_tx_timeout = sis900_tx_timeout, 407 #ifdef CONFIG_NET_POLL_CONTROLLER 408 .ndo_poll_controller = sis900_poll, 409 #endif 410 }; 411 412 /** 413 * sis900_probe - Probe for sis900 device 414 * @pci_dev: the sis900 pci device 415 * @pci_id: the pci device ID 416 * 417 * Check and probe sis900 net device for @pci_dev. 418 * Get mac address according to the chip revision, 419 * and assign SiS900-specific entries in the device structure. 420 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 421 */ 422 423 static int sis900_probe(struct pci_dev *pci_dev, 424 const struct pci_device_id *pci_id) 425 { 426 struct sis900_private *sis_priv; 427 struct net_device *net_dev; 428 struct pci_dev *dev; 429 dma_addr_t ring_dma; 430 void *ring_space; 431 void __iomem *ioaddr; 432 int i, ret; 433 const char *card_name = card_names[pci_id->driver_data]; 434 const char *dev_name = pci_name(pci_dev); 435 436 /* when built into the kernel, we only print version if device is found */ 437 #ifndef MODULE 438 static int printed_version; 439 if (!printed_version++) 440 printk(version); 441 #endif 442 443 /* setup various bits in PCI command register */ 444 ret = pci_enable_device(pci_dev); 445 if(ret) return ret; 446 447 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 448 if(i){ 449 printk(KERN_ERR "sis900.c: architecture does not support " 450 "32bit PCI busmaster DMA\n"); 451 return i; 452 } 453 454 pci_set_master(pci_dev); 455 456 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 457 if (!net_dev) 458 return -ENOMEM; 459 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 460 461 /* We do a request_region() to register /proc/ioports info. */ 462 ret = pci_request_regions(pci_dev, "sis900"); 463 if (ret) 464 goto err_out; 465 466 /* IO region. */ 467 ioaddr = pci_iomap(pci_dev, 0, 0); 468 if (!ioaddr) { 469 ret = -ENOMEM; 470 goto err_out_cleardev; 471 } 472 473 sis_priv = netdev_priv(net_dev); 474 sis_priv->ioaddr = ioaddr; 475 sis_priv->pci_dev = pci_dev; 476 spin_lock_init(&sis_priv->lock); 477 478 pci_set_drvdata(pci_dev, net_dev); 479 480 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); 481 if (!ring_space) { 482 ret = -ENOMEM; 483 goto err_out_unmap; 484 } 485 sis_priv->tx_ring = ring_space; 486 sis_priv->tx_ring_dma = ring_dma; 487 488 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); 489 if (!ring_space) { 490 ret = -ENOMEM; 491 goto err_unmap_tx; 492 } 493 sis_priv->rx_ring = ring_space; 494 sis_priv->rx_ring_dma = ring_dma; 495 496 /* The SiS900-specific entries in the device structure. */ 497 net_dev->netdev_ops = &sis900_netdev_ops; 498 net_dev->watchdog_timeo = TX_TIMEOUT; 499 net_dev->ethtool_ops = &sis900_ethtool_ops; 500 501 if (sis900_debug > 0) 502 sis_priv->msg_enable = sis900_debug; 503 else 504 sis_priv->msg_enable = SIS900_DEF_MSG; 505 506 sis_priv->mii_info.dev = net_dev; 507 sis_priv->mii_info.mdio_read = mdio_read; 508 sis_priv->mii_info.mdio_write = mdio_write; 509 sis_priv->mii_info.phy_id_mask = 0x1f; 510 sis_priv->mii_info.reg_num_mask = 0x1f; 511 512 /* Get Mac address according to the chip revision */ 513 sis_priv->chipset_rev = pci_dev->revision; 514 if(netif_msg_probe(sis_priv)) 515 printk(KERN_DEBUG "%s: detected revision %2.2x, " 516 "trying to get MAC address...\n", 517 dev_name, sis_priv->chipset_rev); 518 519 ret = 0; 520 if (sis_priv->chipset_rev == SIS630E_900_REV) 521 ret = sis630e_get_mac_addr(pci_dev, net_dev); 522 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 523 ret = sis635_get_mac_addr(pci_dev, net_dev); 524 else if (sis_priv->chipset_rev == SIS96x_900_REV) 525 ret = sis96x_get_mac_addr(pci_dev, net_dev); 526 else 527 ret = sis900_get_mac_addr(pci_dev, net_dev); 528 529 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 530 eth_hw_addr_random(net_dev); 531 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 532 "using random generated one\n", dev_name); 533 } 534 535 /* 630ET : set the mii access mode as software-mode */ 536 if (sis_priv->chipset_rev == SIS630ET_900_REV) 537 sw32(cr, ACCESSMODE | sr32(cr)); 538 539 /* probe for mii transceiver */ 540 if (sis900_mii_probe(net_dev) == 0) { 541 printk(KERN_WARNING "%s: Error probing MII device.\n", 542 dev_name); 543 ret = -ENODEV; 544 goto err_unmap_rx; 545 } 546 547 /* save our host bridge revision */ 548 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 549 if (dev) { 550 sis_priv->host_bridge_rev = dev->revision; 551 pci_dev_put(dev); 552 } 553 554 ret = register_netdev(net_dev); 555 if (ret) 556 goto err_unmap_rx; 557 558 /* print some information about our NIC */ 559 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 560 net_dev->name, card_name, ioaddr, pci_dev->irq, 561 net_dev->dev_addr); 562 563 /* Detect Wake on Lan support */ 564 ret = (sr32(CFGPMC) & PMESP) >> 27; 565 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 566 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 567 568 return 0; 569 570 err_unmap_rx: 571 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 572 sis_priv->rx_ring_dma); 573 err_unmap_tx: 574 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 575 sis_priv->tx_ring_dma); 576 err_out_unmap: 577 pci_iounmap(pci_dev, ioaddr); 578 err_out_cleardev: 579 pci_set_drvdata(pci_dev, NULL); 580 pci_release_regions(pci_dev); 581 err_out: 582 free_netdev(net_dev); 583 return ret; 584 } 585 586 /** 587 * sis900_mii_probe - Probe MII PHY for sis900 588 * @net_dev: the net device to probe for 589 * 590 * Search for total of 32 possible mii phy addresses. 591 * Identify and set current phy if found one, 592 * return error if it failed to found. 593 */ 594 595 static int sis900_mii_probe(struct net_device *net_dev) 596 { 597 struct sis900_private *sis_priv = netdev_priv(net_dev); 598 const char *dev_name = pci_name(sis_priv->pci_dev); 599 u16 poll_bit = MII_STAT_LINK, status = 0; 600 unsigned long timeout = jiffies + 5 * HZ; 601 int phy_addr; 602 603 sis_priv->mii = NULL; 604 605 /* search for total of 32 possible mii phy addresses */ 606 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 607 struct mii_phy * mii_phy = NULL; 608 u16 mii_status; 609 int i; 610 611 mii_phy = NULL; 612 for(i = 0; i < 2; i++) 613 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 614 615 if (mii_status == 0xffff || mii_status == 0x0000) { 616 if (netif_msg_probe(sis_priv)) 617 printk(KERN_DEBUG "%s: MII at address %d" 618 " not accessible\n", 619 dev_name, phy_addr); 620 continue; 621 } 622 623 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 624 mii_phy = sis_priv->first_mii; 625 while (mii_phy) { 626 struct mii_phy *phy; 627 phy = mii_phy; 628 mii_phy = mii_phy->next; 629 kfree(phy); 630 } 631 return 0; 632 } 633 634 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 635 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 636 mii_phy->phy_addr = phy_addr; 637 mii_phy->status = mii_status; 638 mii_phy->next = sis_priv->mii; 639 sis_priv->mii = mii_phy; 640 sis_priv->first_mii = mii_phy; 641 642 for (i = 0; mii_chip_table[i].phy_id1; i++) 643 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 644 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 645 mii_phy->phy_types = mii_chip_table[i].phy_types; 646 if (mii_chip_table[i].phy_types == MIX) 647 mii_phy->phy_types = 648 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 649 printk(KERN_INFO "%s: %s transceiver found " 650 "at address %d.\n", 651 dev_name, 652 mii_chip_table[i].name, 653 phy_addr); 654 break; 655 } 656 657 if( !mii_chip_table[i].phy_id1 ) { 658 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 659 dev_name, phy_addr); 660 mii_phy->phy_types = UNKNOWN; 661 } 662 } 663 664 if (sis_priv->mii == NULL) { 665 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 666 return 0; 667 } 668 669 /* select default PHY for mac */ 670 sis_priv->mii = NULL; 671 sis900_default_phy( net_dev ); 672 673 /* Reset phy if default phy is internal sis900 */ 674 if ((sis_priv->mii->phy_id0 == 0x001D) && 675 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 676 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 677 678 /* workaround for ICS1893 PHY */ 679 if ((sis_priv->mii->phy_id0 == 0x0015) && 680 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 681 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 682 683 if(status & MII_STAT_LINK){ 684 while (poll_bit) { 685 yield(); 686 687 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 688 if (time_after_eq(jiffies, timeout)) { 689 printk(KERN_WARNING "%s: reset phy and link down now\n", 690 dev_name); 691 return -ETIME; 692 } 693 } 694 } 695 696 if (sis_priv->chipset_rev == SIS630E_900_REV) { 697 /* SiS 630E has some bugs on default value of PHY registers */ 698 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 699 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 700 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 701 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 702 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 703 } 704 705 if (sis_priv->mii->status & MII_STAT_LINK) 706 netif_carrier_on(net_dev); 707 else 708 netif_carrier_off(net_dev); 709 710 return 1; 711 } 712 713 /** 714 * sis900_default_phy - Select default PHY for sis900 mac. 715 * @net_dev: the net device to probe for 716 * 717 * Select first detected PHY with link as default. 718 * If no one is link on, select PHY whose types is HOME as default. 719 * If HOME doesn't exist, select LAN. 720 */ 721 722 static u16 sis900_default_phy(struct net_device * net_dev) 723 { 724 struct sis900_private *sis_priv = netdev_priv(net_dev); 725 struct mii_phy *phy = NULL, *phy_home = NULL, 726 *default_phy = NULL, *phy_lan = NULL; 727 u16 status; 728 729 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 730 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 731 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 732 733 /* Link ON & Not select default PHY & not ghost PHY */ 734 if ((status & MII_STAT_LINK) && !default_phy && 735 (phy->phy_types != UNKNOWN)) 736 default_phy = phy; 737 else { 738 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 739 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 740 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 741 if (phy->phy_types == HOME) 742 phy_home = phy; 743 else if(phy->phy_types == LAN) 744 phy_lan = phy; 745 } 746 } 747 748 if (!default_phy && phy_home) 749 default_phy = phy_home; 750 else if (!default_phy && phy_lan) 751 default_phy = phy_lan; 752 else if (!default_phy) 753 default_phy = sis_priv->first_mii; 754 755 if (sis_priv->mii != default_phy) { 756 sis_priv->mii = default_phy; 757 sis_priv->cur_phy = default_phy->phy_addr; 758 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 759 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 760 } 761 762 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 763 764 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 765 status &= (~MII_CNTL_ISOLATE); 766 767 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 768 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 769 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 770 771 return status; 772 } 773 774 775 /** 776 * sis900_set_capability - set the media capability of network adapter. 777 * @net_dev : the net device to probe for 778 * @phy : default PHY 779 * 780 * Set the media capability of network adapter according to 781 * mii status register. It's necessary before auto-negotiate. 782 */ 783 784 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 785 { 786 u16 cap; 787 u16 status; 788 789 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 790 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 791 792 cap = MII_NWAY_CSMA_CD | 793 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 794 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 795 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 796 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 797 798 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 799 } 800 801 802 /* Delay between EEPROM clock transitions. */ 803 #define eeprom_delay() sr32(mear) 804 805 /** 806 * read_eeprom - Read Serial EEPROM 807 * @ioaddr: base i/o address 808 * @location: the EEPROM location to read 809 * 810 * Read Serial EEPROM through EEPROM Access Register. 811 * Note that location is in word (16 bits) unit 812 */ 813 814 static u16 read_eeprom(void __iomem *ioaddr, int location) 815 { 816 u32 read_cmd = location | EEread; 817 int i; 818 u16 retval = 0; 819 820 sw32(mear, 0); 821 eeprom_delay(); 822 sw32(mear, EECS); 823 eeprom_delay(); 824 825 /* Shift the read command (9) bits out. */ 826 for (i = 8; i >= 0; i--) { 827 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 828 829 sw32(mear, dataval); 830 eeprom_delay(); 831 sw32(mear, dataval | EECLK); 832 eeprom_delay(); 833 } 834 sw32(mear, EECS); 835 eeprom_delay(); 836 837 /* read the 16-bits data in */ 838 for (i = 16; i > 0; i--) { 839 sw32(mear, EECS); 840 eeprom_delay(); 841 sw32(mear, EECS | EECLK); 842 eeprom_delay(); 843 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 844 eeprom_delay(); 845 } 846 847 /* Terminate the EEPROM access. */ 848 sw32(mear, 0); 849 eeprom_delay(); 850 851 return retval; 852 } 853 854 /* Read and write the MII management registers using software-generated 855 serial MDIO protocol. Note that the command bits and data bits are 856 send out separately */ 857 #define mdio_delay() sr32(mear) 858 859 static void mdio_idle(struct sis900_private *sp) 860 { 861 void __iomem *ioaddr = sp->ioaddr; 862 863 sw32(mear, MDIO | MDDIR); 864 mdio_delay(); 865 sw32(mear, MDIO | MDDIR | MDC); 866 } 867 868 /* Synchronize the MII management interface by shifting 32 one bits out. */ 869 static void mdio_reset(struct sis900_private *sp) 870 { 871 void __iomem *ioaddr = sp->ioaddr; 872 int i; 873 874 for (i = 31; i >= 0; i--) { 875 sw32(mear, MDDIR | MDIO); 876 mdio_delay(); 877 sw32(mear, MDDIR | MDIO | MDC); 878 mdio_delay(); 879 } 880 } 881 882 /** 883 * mdio_read - read MII PHY register 884 * @net_dev: the net device to read 885 * @phy_id: the phy address to read 886 * @location: the phy regiester id to read 887 * 888 * Read MII registers through MDIO and MDC 889 * using MDIO management frame structure and protocol(defined by ISO/IEC). 890 * Please see SiS7014 or ICS spec 891 */ 892 893 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 894 { 895 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 896 struct sis900_private *sp = netdev_priv(net_dev); 897 void __iomem *ioaddr = sp->ioaddr; 898 u16 retval = 0; 899 int i; 900 901 mdio_reset(sp); 902 mdio_idle(sp); 903 904 for (i = 15; i >= 0; i--) { 905 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 906 907 sw32(mear, dataval); 908 mdio_delay(); 909 sw32(mear, dataval | MDC); 910 mdio_delay(); 911 } 912 913 /* Read the 16 data bits. */ 914 for (i = 16; i > 0; i--) { 915 sw32(mear, 0); 916 mdio_delay(); 917 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 918 sw32(mear, MDC); 919 mdio_delay(); 920 } 921 sw32(mear, 0x00); 922 923 return retval; 924 } 925 926 /** 927 * mdio_write - write MII PHY register 928 * @net_dev: the net device to write 929 * @phy_id: the phy address to write 930 * @location: the phy regiester id to write 931 * @value: the register value to write with 932 * 933 * Write MII registers with @value through MDIO and MDC 934 * using MDIO management frame structure and protocol(defined by ISO/IEC) 935 * please see SiS7014 or ICS spec 936 */ 937 938 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 939 int value) 940 { 941 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 942 struct sis900_private *sp = netdev_priv(net_dev); 943 void __iomem *ioaddr = sp->ioaddr; 944 int i; 945 946 mdio_reset(sp); 947 mdio_idle(sp); 948 949 /* Shift the command bits out. */ 950 for (i = 15; i >= 0; i--) { 951 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 952 953 sw8(mear, dataval); 954 mdio_delay(); 955 sw8(mear, dataval | MDC); 956 mdio_delay(); 957 } 958 mdio_delay(); 959 960 /* Shift the value bits out. */ 961 for (i = 15; i >= 0; i--) { 962 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 963 964 sw32(mear, dataval); 965 mdio_delay(); 966 sw32(mear, dataval | MDC); 967 mdio_delay(); 968 } 969 mdio_delay(); 970 971 /* Clear out extra bits. */ 972 for (i = 2; i > 0; i--) { 973 sw8(mear, 0); 974 mdio_delay(); 975 sw8(mear, MDC); 976 mdio_delay(); 977 } 978 sw32(mear, 0x00); 979 } 980 981 982 /** 983 * sis900_reset_phy - reset sis900 mii phy. 984 * @net_dev: the net device to write 985 * @phy_addr: default phy address 986 * 987 * Some specific phy can't work properly without reset. 988 * This function will be called during initialization and 989 * link status change from ON to DOWN. 990 */ 991 992 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 993 { 994 int i; 995 u16 status; 996 997 for (i = 0; i < 2; i++) 998 status = mdio_read(net_dev, phy_addr, MII_STATUS); 999 1000 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1001 1002 return status; 1003 } 1004 1005 #ifdef CONFIG_NET_POLL_CONTROLLER 1006 /* 1007 * Polling 'interrupt' - used by things like netconsole to send skbs 1008 * without having to re-enable interrupts. It's not called while 1009 * the interrupt routine is executing. 1010 */ 1011 static void sis900_poll(struct net_device *dev) 1012 { 1013 struct sis900_private *sp = netdev_priv(dev); 1014 const int irq = sp->pci_dev->irq; 1015 1016 disable_irq(irq); 1017 sis900_interrupt(irq, dev); 1018 enable_irq(irq); 1019 } 1020 #endif 1021 1022 /** 1023 * sis900_open - open sis900 device 1024 * @net_dev: the net device to open 1025 * 1026 * Do some initialization and start net interface. 1027 * enable interrupts and set sis900 timer. 1028 */ 1029 1030 static int 1031 sis900_open(struct net_device *net_dev) 1032 { 1033 struct sis900_private *sis_priv = netdev_priv(net_dev); 1034 void __iomem *ioaddr = sis_priv->ioaddr; 1035 int ret; 1036 1037 /* Soft reset the chip. */ 1038 sis900_reset(net_dev); 1039 1040 /* Equalizer workaround Rule */ 1041 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1042 1043 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1044 net_dev->name, net_dev); 1045 if (ret) 1046 return ret; 1047 1048 sis900_init_rxfilter(net_dev); 1049 1050 sis900_init_tx_ring(net_dev); 1051 sis900_init_rx_ring(net_dev); 1052 1053 set_rx_mode(net_dev); 1054 1055 netif_start_queue(net_dev); 1056 1057 /* Workaround for EDB */ 1058 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1059 1060 /* Enable all known interrupts by setting the interrupt mask. */ 1061 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 1062 sw32(cr, RxENA | sr32(cr)); 1063 sw32(ier, IE); 1064 1065 sis900_check_mode(net_dev, sis_priv->mii); 1066 1067 /* Set the timer to switch to check for link beat and perhaps switch 1068 to an alternate media type. */ 1069 init_timer(&sis_priv->timer); 1070 sis_priv->timer.expires = jiffies + HZ; 1071 sis_priv->timer.data = (unsigned long)net_dev; 1072 sis_priv->timer.function = sis900_timer; 1073 add_timer(&sis_priv->timer); 1074 1075 return 0; 1076 } 1077 1078 /** 1079 * sis900_init_rxfilter - Initialize the Rx filter 1080 * @net_dev: the net device to initialize for 1081 * 1082 * Set receive filter address to our MAC address 1083 * and enable packet filtering. 1084 */ 1085 1086 static void 1087 sis900_init_rxfilter (struct net_device * net_dev) 1088 { 1089 struct sis900_private *sis_priv = netdev_priv(net_dev); 1090 void __iomem *ioaddr = sis_priv->ioaddr; 1091 u32 rfcrSave; 1092 u32 i; 1093 1094 rfcrSave = sr32(rfcr); 1095 1096 /* disable packet filtering before setting filter */ 1097 sw32(rfcr, rfcrSave & ~RFEN); 1098 1099 /* load MAC addr to filter data register */ 1100 for (i = 0 ; i < 3 ; i++) { 1101 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1102 1103 sw32(rfcr, i << RFADDR_shift); 1104 sw32(rfdr, w); 1105 1106 if (netif_msg_hw(sis_priv)) { 1107 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", 1108 net_dev->name, i, sr32(rfdr)); 1109 } 1110 } 1111 1112 /* enable packet filtering */ 1113 sw32(rfcr, rfcrSave | RFEN); 1114 } 1115 1116 /** 1117 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1118 * @net_dev: the net device to initialize for 1119 * 1120 * Initialize the Tx descriptor ring, 1121 */ 1122 1123 static void 1124 sis900_init_tx_ring(struct net_device *net_dev) 1125 { 1126 struct sis900_private *sis_priv = netdev_priv(net_dev); 1127 void __iomem *ioaddr = sis_priv->ioaddr; 1128 int i; 1129 1130 sis_priv->tx_full = 0; 1131 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1132 1133 for (i = 0; i < NUM_TX_DESC; i++) { 1134 sis_priv->tx_skbuff[i] = NULL; 1135 1136 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1137 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1138 sis_priv->tx_ring[i].cmdsts = 0; 1139 sis_priv->tx_ring[i].bufptr = 0; 1140 } 1141 1142 /* load Transmit Descriptor Register */ 1143 sw32(txdp, sis_priv->tx_ring_dma); 1144 if (netif_msg_hw(sis_priv)) 1145 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1146 net_dev->name, sr32(txdp)); 1147 } 1148 1149 /** 1150 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1151 * @net_dev: the net device to initialize for 1152 * 1153 * Initialize the Rx descriptor ring, 1154 * and pre-allocate recevie buffers (socket buffer) 1155 */ 1156 1157 static void 1158 sis900_init_rx_ring(struct net_device *net_dev) 1159 { 1160 struct sis900_private *sis_priv = netdev_priv(net_dev); 1161 void __iomem *ioaddr = sis_priv->ioaddr; 1162 int i; 1163 1164 sis_priv->cur_rx = 0; 1165 sis_priv->dirty_rx = 0; 1166 1167 /* init RX descriptor */ 1168 for (i = 0; i < NUM_RX_DESC; i++) { 1169 sis_priv->rx_skbuff[i] = NULL; 1170 1171 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1172 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1173 sis_priv->rx_ring[i].cmdsts = 0; 1174 sis_priv->rx_ring[i].bufptr = 0; 1175 } 1176 1177 /* allocate sock buffers */ 1178 for (i = 0; i < NUM_RX_DESC; i++) { 1179 struct sk_buff *skb; 1180 1181 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1182 /* not enough memory for skbuff, this makes a "hole" 1183 on the buffer ring, it is not clear how the 1184 hardware will react to this kind of degenerated 1185 buffer */ 1186 break; 1187 } 1188 sis_priv->rx_skbuff[i] = skb; 1189 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1190 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, 1191 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1192 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, 1193 sis_priv->rx_ring[i].bufptr))) { 1194 dev_kfree_skb(skb); 1195 sis_priv->rx_skbuff[i] = NULL; 1196 break; 1197 } 1198 } 1199 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1200 1201 /* load Receive Descriptor Register */ 1202 sw32(rxdp, sis_priv->rx_ring_dma); 1203 if (netif_msg_hw(sis_priv)) 1204 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1205 net_dev->name, sr32(rxdp)); 1206 } 1207 1208 /** 1209 * sis630_set_eq - set phy equalizer value for 630 LAN 1210 * @net_dev: the net device to set equalizer value 1211 * @revision: 630 LAN revision number 1212 * 1213 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1214 * PHY register 14h(Test) 1215 * Bit 14: 0 -- Automatically detect (default) 1216 * 1 -- Manually set Equalizer filter 1217 * Bit 13: 0 -- (Default) 1218 * 1 -- Speed up convergence of equalizer setting 1219 * Bit 9 : 0 -- (Default) 1220 * 1 -- Disable Baseline Wander 1221 * Bit 3~7 -- Equalizer filter setting 1222 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1223 * Then calculate equalizer value 1224 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1225 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1226 * Calculate Equalizer value: 1227 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1228 * When the equalizer is stable, this value is not a fixed value. It will be within 1229 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1230 * 0 <= max <= 4 --> set equalizer to max 1231 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1232 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1233 */ 1234 1235 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1236 { 1237 struct sis900_private *sis_priv = netdev_priv(net_dev); 1238 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1239 int i, maxcount=10; 1240 1241 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1242 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1243 return; 1244 1245 if (netif_carrier_ok(net_dev)) { 1246 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1247 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1248 (0x2200 | reg14h) & 0xBFFF); 1249 for (i=0; i < maxcount; i++) { 1250 eq_value = (0x00F8 & mdio_read(net_dev, 1251 sis_priv->cur_phy, MII_RESV)) >> 3; 1252 if (i == 0) 1253 max_value=min_value=eq_value; 1254 max_value = (eq_value > max_value) ? 1255 eq_value : max_value; 1256 min_value = (eq_value < min_value) ? 1257 eq_value : min_value; 1258 } 1259 /* 630E rule to determine the equalizer value */ 1260 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1261 revision == SIS630ET_900_REV) { 1262 if (max_value < 5) 1263 eq_value = max_value; 1264 else if (max_value >= 5 && max_value < 15) 1265 eq_value = (max_value == min_value) ? 1266 max_value+2 : max_value+1; 1267 else if (max_value >= 15) 1268 eq_value=(max_value == min_value) ? 1269 max_value+6 : max_value+5; 1270 } 1271 /* 630B0&B1 rule to determine the equalizer value */ 1272 if (revision == SIS630A_900_REV && 1273 (sis_priv->host_bridge_rev == SIS630B0 || 1274 sis_priv->host_bridge_rev == SIS630B1)) { 1275 if (max_value == 0) 1276 eq_value = 3; 1277 else 1278 eq_value = (max_value + min_value + 1)/2; 1279 } 1280 /* write equalizer value and setting */ 1281 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1282 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1283 reg14h = (reg14h | 0x6000) & 0xFDFF; 1284 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1285 } else { 1286 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1287 if (revision == SIS630A_900_REV && 1288 (sis_priv->host_bridge_rev == SIS630B0 || 1289 sis_priv->host_bridge_rev == SIS630B1)) 1290 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1291 (reg14h | 0x2200) & 0xBFFF); 1292 else 1293 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1294 (reg14h | 0x2000) & 0xBFFF); 1295 } 1296 } 1297 1298 /** 1299 * sis900_timer - sis900 timer routine 1300 * @data: pointer to sis900 net device 1301 * 1302 * On each timer ticks we check two things, 1303 * link status (ON/OFF) and link mode (10/100/Full/Half) 1304 */ 1305 1306 static void sis900_timer(unsigned long data) 1307 { 1308 struct net_device *net_dev = (struct net_device *)data; 1309 struct sis900_private *sis_priv = netdev_priv(net_dev); 1310 struct mii_phy *mii_phy = sis_priv->mii; 1311 static const int next_tick = 5*HZ; 1312 u16 status; 1313 1314 if (!sis_priv->autong_complete){ 1315 int uninitialized_var(speed), duplex = 0; 1316 1317 sis900_read_mode(net_dev, &speed, &duplex); 1318 if (duplex){ 1319 sis900_set_mode(sis_priv, speed, duplex); 1320 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1321 netif_start_queue(net_dev); 1322 } 1323 1324 sis_priv->timer.expires = jiffies + HZ; 1325 add_timer(&sis_priv->timer); 1326 return; 1327 } 1328 1329 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1330 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1331 1332 /* Link OFF -> ON */ 1333 if (!netif_carrier_ok(net_dev)) { 1334 LookForLink: 1335 /* Search for new PHY */ 1336 status = sis900_default_phy(net_dev); 1337 mii_phy = sis_priv->mii; 1338 1339 if (status & MII_STAT_LINK){ 1340 sis900_check_mode(net_dev, mii_phy); 1341 netif_carrier_on(net_dev); 1342 } 1343 } else { 1344 /* Link ON -> OFF */ 1345 if (!(status & MII_STAT_LINK)){ 1346 netif_carrier_off(net_dev); 1347 if(netif_msg_link(sis_priv)) 1348 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1349 1350 /* Change mode issue */ 1351 if ((mii_phy->phy_id0 == 0x001D) && 1352 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1353 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1354 1355 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1356 1357 goto LookForLink; 1358 } 1359 } 1360 1361 sis_priv->timer.expires = jiffies + next_tick; 1362 add_timer(&sis_priv->timer); 1363 } 1364 1365 /** 1366 * sis900_check_mode - check the media mode for sis900 1367 * @net_dev: the net device to be checked 1368 * @mii_phy: the mii phy 1369 * 1370 * Older driver gets the media mode from mii status output 1371 * register. Now we set our media capability and auto-negotiate 1372 * to get the upper bound of speed and duplex between two ends. 1373 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1374 * and autong_complete should be set to 1. 1375 */ 1376 1377 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1378 { 1379 struct sis900_private *sis_priv = netdev_priv(net_dev); 1380 void __iomem *ioaddr = sis_priv->ioaddr; 1381 int speed, duplex; 1382 1383 if (mii_phy->phy_types == LAN) { 1384 sw32(cfg, ~EXD & sr32(cfg)); 1385 sis900_set_capability(net_dev , mii_phy); 1386 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1387 } else { 1388 sw32(cfg, EXD | sr32(cfg)); 1389 speed = HW_SPEED_HOME; 1390 duplex = FDX_CAPABLE_HALF_SELECTED; 1391 sis900_set_mode(sis_priv, speed, duplex); 1392 sis_priv->autong_complete = 1; 1393 } 1394 } 1395 1396 /** 1397 * sis900_set_mode - Set the media mode of mac register. 1398 * @sp: the device private data 1399 * @speed : the transmit speed to be determined 1400 * @duplex: the duplex mode to be determined 1401 * 1402 * Set the media mode of mac register txcfg/rxcfg according to 1403 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1404 * bus is used instead of PCI bus. When this bit is set 1, the 1405 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1406 * double words. 1407 */ 1408 1409 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1410 { 1411 void __iomem *ioaddr = sp->ioaddr; 1412 u32 tx_flags = 0, rx_flags = 0; 1413 1414 if (sr32( cfg) & EDB_MASTER_EN) { 1415 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1416 (TX_FILL_THRESH << TxFILLT_shift); 1417 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1418 } else { 1419 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1420 (TX_FILL_THRESH << TxFILLT_shift); 1421 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1422 } 1423 1424 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1425 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1426 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1427 } else { 1428 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1429 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1430 } 1431 1432 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1433 tx_flags |= (TxCSI | TxHBI); 1434 rx_flags |= RxATX; 1435 } 1436 1437 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1438 /* Can accept Jumbo packet */ 1439 rx_flags |= RxAJAB; 1440 #endif 1441 1442 sw32(txcfg, tx_flags); 1443 sw32(rxcfg, rx_flags); 1444 } 1445 1446 /** 1447 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1448 * @net_dev: the net device to read mode for 1449 * @phy_addr: mii phy address 1450 * 1451 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1452 * autong_complete should be set to 0 when starting auto-negotiation. 1453 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1454 * sis900_timer will wait for link on again if autong_complete = 0. 1455 */ 1456 1457 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1458 { 1459 struct sis900_private *sis_priv = netdev_priv(net_dev); 1460 int i = 0; 1461 u32 status; 1462 1463 for (i = 0; i < 2; i++) 1464 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1465 1466 if (!(status & MII_STAT_LINK)){ 1467 if(netif_msg_link(sis_priv)) 1468 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1469 sis_priv->autong_complete = 1; 1470 netif_carrier_off(net_dev); 1471 return; 1472 } 1473 1474 /* (Re)start AutoNegotiate */ 1475 mdio_write(net_dev, phy_addr, MII_CONTROL, 1476 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1477 sis_priv->autong_complete = 0; 1478 } 1479 1480 1481 /** 1482 * sis900_read_mode - read media mode for sis900 internal phy 1483 * @net_dev: the net device to read mode for 1484 * @speed : the transmit speed to be determined 1485 * @duplex : the duplex mode to be determined 1486 * 1487 * The capability of remote end will be put in mii register autorec 1488 * after auto-negotiation. Use AND operation to get the upper bound 1489 * of speed and duplex between two ends. 1490 */ 1491 1492 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1493 { 1494 struct sis900_private *sis_priv = netdev_priv(net_dev); 1495 struct mii_phy *phy = sis_priv->mii; 1496 int phy_addr = sis_priv->cur_phy; 1497 u32 status; 1498 u16 autoadv, autorec; 1499 int i; 1500 1501 for (i = 0; i < 2; i++) 1502 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1503 1504 if (!(status & MII_STAT_LINK)) 1505 return; 1506 1507 /* AutoNegotiate completed */ 1508 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1509 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1510 status = autoadv & autorec; 1511 1512 *speed = HW_SPEED_10_MBPS; 1513 *duplex = FDX_CAPABLE_HALF_SELECTED; 1514 1515 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1516 *speed = HW_SPEED_100_MBPS; 1517 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1518 *duplex = FDX_CAPABLE_FULL_SELECTED; 1519 1520 sis_priv->autong_complete = 1; 1521 1522 /* Workaround for Realtek RTL8201 PHY issue */ 1523 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1524 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1525 *duplex = FDX_CAPABLE_FULL_SELECTED; 1526 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1527 *speed = HW_SPEED_100_MBPS; 1528 } 1529 1530 if(netif_msg_link(sis_priv)) 1531 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1532 net_dev->name, 1533 *speed == HW_SPEED_100_MBPS ? 1534 "100mbps" : "10mbps", 1535 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1536 "full" : "half"); 1537 } 1538 1539 /** 1540 * sis900_tx_timeout - sis900 transmit timeout routine 1541 * @net_dev: the net device to transmit 1542 * 1543 * print transmit timeout status 1544 * disable interrupts and do some tasks 1545 */ 1546 1547 static void sis900_tx_timeout(struct net_device *net_dev) 1548 { 1549 struct sis900_private *sis_priv = netdev_priv(net_dev); 1550 void __iomem *ioaddr = sis_priv->ioaddr; 1551 unsigned long flags; 1552 int i; 1553 1554 if (netif_msg_tx_err(sis_priv)) { 1555 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1556 net_dev->name, sr32(cr), sr32(isr)); 1557 } 1558 1559 /* Disable interrupts by clearing the interrupt mask. */ 1560 sw32(imr, 0x0000); 1561 1562 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1563 spin_lock_irqsave(&sis_priv->lock, flags); 1564 1565 /* discard unsent packets */ 1566 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1567 for (i = 0; i < NUM_TX_DESC; i++) { 1568 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1569 1570 if (skb) { 1571 pci_unmap_single(sis_priv->pci_dev, 1572 sis_priv->tx_ring[i].bufptr, skb->len, 1573 PCI_DMA_TODEVICE); 1574 dev_kfree_skb_irq(skb); 1575 sis_priv->tx_skbuff[i] = NULL; 1576 sis_priv->tx_ring[i].cmdsts = 0; 1577 sis_priv->tx_ring[i].bufptr = 0; 1578 net_dev->stats.tx_dropped++; 1579 } 1580 } 1581 sis_priv->tx_full = 0; 1582 netif_wake_queue(net_dev); 1583 1584 spin_unlock_irqrestore(&sis_priv->lock, flags); 1585 1586 net_dev->trans_start = jiffies; /* prevent tx timeout */ 1587 1588 /* load Transmit Descriptor Register */ 1589 sw32(txdp, sis_priv->tx_ring_dma); 1590 1591 /* Enable all known interrupts by setting the interrupt mask. */ 1592 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 1593 } 1594 1595 /** 1596 * sis900_start_xmit - sis900 start transmit routine 1597 * @skb: socket buffer pointer to put the data being transmitted 1598 * @net_dev: the net device to transmit with 1599 * 1600 * Set the transmit buffer descriptor, 1601 * and write TxENA to enable transmit state machine. 1602 * tell upper layer if the buffer is full 1603 */ 1604 1605 static netdev_tx_t 1606 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1607 { 1608 struct sis900_private *sis_priv = netdev_priv(net_dev); 1609 void __iomem *ioaddr = sis_priv->ioaddr; 1610 unsigned int entry; 1611 unsigned long flags; 1612 unsigned int index_cur_tx, index_dirty_tx; 1613 unsigned int count_dirty_tx; 1614 1615 /* Don't transmit data before the complete of auto-negotiation */ 1616 if(!sis_priv->autong_complete){ 1617 netif_stop_queue(net_dev); 1618 return NETDEV_TX_BUSY; 1619 } 1620 1621 spin_lock_irqsave(&sis_priv->lock, flags); 1622 1623 /* Calculate the next Tx descriptor entry. */ 1624 entry = sis_priv->cur_tx % NUM_TX_DESC; 1625 sis_priv->tx_skbuff[entry] = skb; 1626 1627 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1628 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, 1629 skb->data, skb->len, PCI_DMA_TODEVICE); 1630 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, 1631 sis_priv->tx_ring[entry].bufptr))) { 1632 dev_kfree_skb(skb); 1633 sis_priv->tx_skbuff[entry] = NULL; 1634 net_dev->stats.tx_dropped++; 1635 spin_unlock_irqrestore(&sis_priv->lock, flags); 1636 return NETDEV_TX_OK; 1637 } 1638 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); 1639 sw32(cr, TxENA | sr32(cr)); 1640 1641 sis_priv->cur_tx ++; 1642 index_cur_tx = sis_priv->cur_tx; 1643 index_dirty_tx = sis_priv->dirty_tx; 1644 1645 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1646 count_dirty_tx ++; 1647 1648 if (index_cur_tx == index_dirty_tx) { 1649 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1650 sis_priv->tx_full = 1; 1651 netif_stop_queue(net_dev); 1652 } else if (count_dirty_tx < NUM_TX_DESC) { 1653 /* Typical path, tell upper layer that more transmission is possible */ 1654 netif_start_queue(net_dev); 1655 } else { 1656 /* buffer full, tell upper layer no more transmission */ 1657 sis_priv->tx_full = 1; 1658 netif_stop_queue(net_dev); 1659 } 1660 1661 spin_unlock_irqrestore(&sis_priv->lock, flags); 1662 1663 if (netif_msg_tx_queued(sis_priv)) 1664 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1665 "to slot %d.\n", 1666 net_dev->name, skb->data, (int)skb->len, entry); 1667 1668 return NETDEV_TX_OK; 1669 } 1670 1671 /** 1672 * sis900_interrupt - sis900 interrupt handler 1673 * @irq: the irq number 1674 * @dev_instance: the client data object 1675 * 1676 * The interrupt handler does all of the Rx thread work, 1677 * and cleans up after the Tx thread 1678 */ 1679 1680 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1681 { 1682 struct net_device *net_dev = dev_instance; 1683 struct sis900_private *sis_priv = netdev_priv(net_dev); 1684 int boguscnt = max_interrupt_work; 1685 void __iomem *ioaddr = sis_priv->ioaddr; 1686 u32 status; 1687 unsigned int handled = 0; 1688 1689 spin_lock (&sis_priv->lock); 1690 1691 do { 1692 status = sr32(isr); 1693 1694 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) 1695 /* nothing intresting happened */ 1696 break; 1697 handled = 1; 1698 1699 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1700 if (status & (RxORN | RxERR | RxOK)) 1701 /* Rx interrupt */ 1702 sis900_rx(net_dev); 1703 1704 if (status & (TxURN | TxERR | TxIDLE)) 1705 /* Tx interrupt */ 1706 sis900_finish_xmit(net_dev); 1707 1708 /* something strange happened !!! */ 1709 if (status & HIBERR) { 1710 if(netif_msg_intr(sis_priv)) 1711 printk(KERN_INFO "%s: Abnormal interrupt, " 1712 "status %#8.8x.\n", net_dev->name, status); 1713 break; 1714 } 1715 if (--boguscnt < 0) { 1716 if(netif_msg_intr(sis_priv)) 1717 printk(KERN_INFO "%s: Too much work at interrupt, " 1718 "interrupt status = %#8.8x.\n", 1719 net_dev->name, status); 1720 break; 1721 } 1722 } while (1); 1723 1724 if(netif_msg_intr(sis_priv)) 1725 printk(KERN_DEBUG "%s: exiting interrupt, " 1726 "interrupt status = 0x%#8.8x.\n", 1727 net_dev->name, sr32(isr)); 1728 1729 spin_unlock (&sis_priv->lock); 1730 return IRQ_RETVAL(handled); 1731 } 1732 1733 /** 1734 * sis900_rx - sis900 receive routine 1735 * @net_dev: the net device which receives data 1736 * 1737 * Process receive interrupt events, 1738 * put buffer to higher layer and refill buffer pool 1739 * Note: This function is called by interrupt handler, 1740 * don't do "too much" work here 1741 */ 1742 1743 static int sis900_rx(struct net_device *net_dev) 1744 { 1745 struct sis900_private *sis_priv = netdev_priv(net_dev); 1746 void __iomem *ioaddr = sis_priv->ioaddr; 1747 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1748 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1749 int rx_work_limit; 1750 1751 if (netif_msg_rx_status(sis_priv)) 1752 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1753 "status:0x%8.8x\n", 1754 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1755 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1756 1757 while (rx_status & OWN) { 1758 unsigned int rx_size; 1759 unsigned int data_size; 1760 1761 if (--rx_work_limit < 0) 1762 break; 1763 1764 data_size = rx_status & DSIZE; 1765 rx_size = data_size - CRC_SIZE; 1766 1767 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1768 /* ``TOOLONG'' flag means jumbo packet received. */ 1769 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1770 rx_status &= (~ ((unsigned int)TOOLONG)); 1771 #endif 1772 1773 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1774 /* corrupted packet received */ 1775 if (netif_msg_rx_err(sis_priv)) 1776 printk(KERN_DEBUG "%s: Corrupted packet " 1777 "received, buffer status = 0x%8.8x/%d.\n", 1778 net_dev->name, rx_status, data_size); 1779 net_dev->stats.rx_errors++; 1780 if (rx_status & OVERRUN) 1781 net_dev->stats.rx_over_errors++; 1782 if (rx_status & (TOOLONG|RUNT)) 1783 net_dev->stats.rx_length_errors++; 1784 if (rx_status & (RXISERR | FAERR)) 1785 net_dev->stats.rx_frame_errors++; 1786 if (rx_status & CRCERR) 1787 net_dev->stats.rx_crc_errors++; 1788 /* reset buffer descriptor state */ 1789 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1790 } else { 1791 struct sk_buff * skb; 1792 struct sk_buff * rx_skb; 1793 1794 pci_unmap_single(sis_priv->pci_dev, 1795 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, 1796 PCI_DMA_FROMDEVICE); 1797 1798 /* refill the Rx buffer, what if there is not enough 1799 * memory for new socket buffer ?? */ 1800 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1801 /* 1802 * Not enough memory to refill the buffer 1803 * so we need to recycle the old one so 1804 * as to avoid creating a memory hole 1805 * in the rx ring 1806 */ 1807 skb = sis_priv->rx_skbuff[entry]; 1808 net_dev->stats.rx_dropped++; 1809 goto refill_rx_ring; 1810 } 1811 1812 /* This situation should never happen, but due to 1813 some unknown bugs, it is possible that 1814 we are working on NULL sk_buff :-( */ 1815 if (sis_priv->rx_skbuff[entry] == NULL) { 1816 if (netif_msg_rx_err(sis_priv)) 1817 printk(KERN_WARNING "%s: NULL pointer " 1818 "encountered in Rx ring\n" 1819 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1820 net_dev->name, sis_priv->cur_rx, 1821 sis_priv->dirty_rx); 1822 dev_kfree_skb(skb); 1823 break; 1824 } 1825 1826 /* give the socket buffer to upper layers */ 1827 rx_skb = sis_priv->rx_skbuff[entry]; 1828 skb_put(rx_skb, rx_size); 1829 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1830 netif_rx(rx_skb); 1831 1832 /* some network statistics */ 1833 if ((rx_status & BCAST) == MCAST) 1834 net_dev->stats.multicast++; 1835 net_dev->stats.rx_bytes += rx_size; 1836 net_dev->stats.rx_packets++; 1837 sis_priv->dirty_rx++; 1838 refill_rx_ring: 1839 sis_priv->rx_skbuff[entry] = skb; 1840 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1841 sis_priv->rx_ring[entry].bufptr = 1842 pci_map_single(sis_priv->pci_dev, skb->data, 1843 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1844 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, 1845 sis_priv->rx_ring[entry].bufptr))) { 1846 dev_kfree_skb_irq(skb); 1847 sis_priv->rx_skbuff[entry] = NULL; 1848 break; 1849 } 1850 } 1851 sis_priv->cur_rx++; 1852 entry = sis_priv->cur_rx % NUM_RX_DESC; 1853 rx_status = sis_priv->rx_ring[entry].cmdsts; 1854 } // while 1855 1856 /* refill the Rx buffer, what if the rate of refilling is slower 1857 * than consuming ?? */ 1858 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1859 struct sk_buff *skb; 1860 1861 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1862 1863 if (sis_priv->rx_skbuff[entry] == NULL) { 1864 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE); 1865 if (skb == NULL) { 1866 /* not enough memory for skbuff, this makes a 1867 * "hole" on the buffer ring, it is not clear 1868 * how the hardware will react to this kind 1869 * of degenerated buffer */ 1870 net_dev->stats.rx_dropped++; 1871 break; 1872 } 1873 sis_priv->rx_skbuff[entry] = skb; 1874 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1875 sis_priv->rx_ring[entry].bufptr = 1876 pci_map_single(sis_priv->pci_dev, skb->data, 1877 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1878 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev, 1879 sis_priv->rx_ring[entry].bufptr))) { 1880 dev_kfree_skb_irq(skb); 1881 sis_priv->rx_skbuff[entry] = NULL; 1882 break; 1883 } 1884 } 1885 } 1886 /* re-enable the potentially idle receive state matchine */ 1887 sw32(cr , RxENA | sr32(cr)); 1888 1889 return 0; 1890 } 1891 1892 /** 1893 * sis900_finish_xmit - finish up transmission of packets 1894 * @net_dev: the net device to be transmitted on 1895 * 1896 * Check for error condition and free socket buffer etc 1897 * schedule for more transmission as needed 1898 * Note: This function is called by interrupt handler, 1899 * don't do "too much" work here 1900 */ 1901 1902 static void sis900_finish_xmit (struct net_device *net_dev) 1903 { 1904 struct sis900_private *sis_priv = netdev_priv(net_dev); 1905 1906 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1907 struct sk_buff *skb; 1908 unsigned int entry; 1909 u32 tx_status; 1910 1911 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1912 tx_status = sis_priv->tx_ring[entry].cmdsts; 1913 1914 if (tx_status & OWN) { 1915 /* The packet is not transmitted yet (owned by hardware) ! 1916 * Note: the interrupt is generated only when Tx Machine 1917 * is idle, so this is an almost impossible case */ 1918 break; 1919 } 1920 1921 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1922 /* packet unsuccessfully transmitted */ 1923 if (netif_msg_tx_err(sis_priv)) 1924 printk(KERN_DEBUG "%s: Transmit " 1925 "error, Tx status %8.8x.\n", 1926 net_dev->name, tx_status); 1927 net_dev->stats.tx_errors++; 1928 if (tx_status & UNDERRUN) 1929 net_dev->stats.tx_fifo_errors++; 1930 if (tx_status & ABORT) 1931 net_dev->stats.tx_aborted_errors++; 1932 if (tx_status & NOCARRIER) 1933 net_dev->stats.tx_carrier_errors++; 1934 if (tx_status & OWCOLL) 1935 net_dev->stats.tx_window_errors++; 1936 } else { 1937 /* packet successfully transmitted */ 1938 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1939 net_dev->stats.tx_bytes += tx_status & DSIZE; 1940 net_dev->stats.tx_packets++; 1941 } 1942 /* Free the original skb. */ 1943 skb = sis_priv->tx_skbuff[entry]; 1944 pci_unmap_single(sis_priv->pci_dev, 1945 sis_priv->tx_ring[entry].bufptr, skb->len, 1946 PCI_DMA_TODEVICE); 1947 dev_kfree_skb_irq(skb); 1948 sis_priv->tx_skbuff[entry] = NULL; 1949 sis_priv->tx_ring[entry].bufptr = 0; 1950 sis_priv->tx_ring[entry].cmdsts = 0; 1951 } 1952 1953 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1954 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1955 /* The ring is no longer full, clear tx_full and schedule 1956 * more transmission by netif_wake_queue(net_dev) */ 1957 sis_priv->tx_full = 0; 1958 netif_wake_queue (net_dev); 1959 } 1960 } 1961 1962 /** 1963 * sis900_close - close sis900 device 1964 * @net_dev: the net device to be closed 1965 * 1966 * Disable interrupts, stop the Tx and Rx Status Machine 1967 * free Tx and RX socket buffer 1968 */ 1969 1970 static int sis900_close(struct net_device *net_dev) 1971 { 1972 struct sis900_private *sis_priv = netdev_priv(net_dev); 1973 struct pci_dev *pdev = sis_priv->pci_dev; 1974 void __iomem *ioaddr = sis_priv->ioaddr; 1975 struct sk_buff *skb; 1976 int i; 1977 1978 netif_stop_queue(net_dev); 1979 1980 /* Disable interrupts by clearing the interrupt mask. */ 1981 sw32(imr, 0x0000); 1982 sw32(ier, 0x0000); 1983 1984 /* Stop the chip's Tx and Rx Status Machine */ 1985 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1986 1987 del_timer(&sis_priv->timer); 1988 1989 free_irq(pdev->irq, net_dev); 1990 1991 /* Free Tx and RX skbuff */ 1992 for (i = 0; i < NUM_RX_DESC; i++) { 1993 skb = sis_priv->rx_skbuff[i]; 1994 if (skb) { 1995 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr, 1996 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1997 dev_kfree_skb(skb); 1998 sis_priv->rx_skbuff[i] = NULL; 1999 } 2000 } 2001 for (i = 0; i < NUM_TX_DESC; i++) { 2002 skb = sis_priv->tx_skbuff[i]; 2003 if (skb) { 2004 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr, 2005 skb->len, PCI_DMA_TODEVICE); 2006 dev_kfree_skb(skb); 2007 sis_priv->tx_skbuff[i] = NULL; 2008 } 2009 } 2010 2011 /* Green! Put the chip in low-power mode. */ 2012 2013 return 0; 2014 } 2015 2016 /** 2017 * sis900_get_drvinfo - Return information about driver 2018 * @net_dev: the net device to probe 2019 * @info: container for info returned 2020 * 2021 * Process ethtool command such as "ehtool -i" to show information 2022 */ 2023 2024 static void sis900_get_drvinfo(struct net_device *net_dev, 2025 struct ethtool_drvinfo *info) 2026 { 2027 struct sis900_private *sis_priv = netdev_priv(net_dev); 2028 2029 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2030 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2031 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev), 2032 sizeof(info->bus_info)); 2033 } 2034 2035 static u32 sis900_get_msglevel(struct net_device *net_dev) 2036 { 2037 struct sis900_private *sis_priv = netdev_priv(net_dev); 2038 return sis_priv->msg_enable; 2039 } 2040 2041 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2042 { 2043 struct sis900_private *sis_priv = netdev_priv(net_dev); 2044 sis_priv->msg_enable = value; 2045 } 2046 2047 static u32 sis900_get_link(struct net_device *net_dev) 2048 { 2049 struct sis900_private *sis_priv = netdev_priv(net_dev); 2050 return mii_link_ok(&sis_priv->mii_info); 2051 } 2052 2053 static int sis900_get_settings(struct net_device *net_dev, 2054 struct ethtool_cmd *cmd) 2055 { 2056 struct sis900_private *sis_priv = netdev_priv(net_dev); 2057 spin_lock_irq(&sis_priv->lock); 2058 mii_ethtool_gset(&sis_priv->mii_info, cmd); 2059 spin_unlock_irq(&sis_priv->lock); 2060 return 0; 2061 } 2062 2063 static int sis900_set_settings(struct net_device *net_dev, 2064 struct ethtool_cmd *cmd) 2065 { 2066 struct sis900_private *sis_priv = netdev_priv(net_dev); 2067 int rt; 2068 spin_lock_irq(&sis_priv->lock); 2069 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd); 2070 spin_unlock_irq(&sis_priv->lock); 2071 return rt; 2072 } 2073 2074 static int sis900_nway_reset(struct net_device *net_dev) 2075 { 2076 struct sis900_private *sis_priv = netdev_priv(net_dev); 2077 return mii_nway_restart(&sis_priv->mii_info); 2078 } 2079 2080 /** 2081 * sis900_set_wol - Set up Wake on Lan registers 2082 * @net_dev: the net device to probe 2083 * @wol: container for info passed to the driver 2084 * 2085 * Process ethtool command "wol" to setup wake on lan features. 2086 * SiS900 supports sending WoL events if a correct packet is received, 2087 * but there is no simple way to filter them to only a subset (broadcast, 2088 * multicast, unicast or arp). 2089 */ 2090 2091 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2092 { 2093 struct sis900_private *sis_priv = netdev_priv(net_dev); 2094 void __iomem *ioaddr = sis_priv->ioaddr; 2095 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2096 2097 if (wol->wolopts == 0) { 2098 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2099 cfgpmcsr &= ~PME_EN; 2100 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2101 sw32(pmctrl, pmctrl_bits); 2102 if (netif_msg_wol(sis_priv)) 2103 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2104 return 0; 2105 } 2106 2107 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2108 | WAKE_BCAST | WAKE_ARP)) 2109 return -EINVAL; 2110 2111 if (wol->wolopts & WAKE_MAGIC) 2112 pmctrl_bits |= MAGICPKT; 2113 if (wol->wolopts & WAKE_PHY) 2114 pmctrl_bits |= LINKON; 2115 2116 sw32(pmctrl, pmctrl_bits); 2117 2118 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2119 cfgpmcsr |= PME_EN; 2120 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2121 if (netif_msg_wol(sis_priv)) 2122 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2123 2124 return 0; 2125 } 2126 2127 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2128 { 2129 struct sis900_private *sp = netdev_priv(net_dev); 2130 void __iomem *ioaddr = sp->ioaddr; 2131 u32 pmctrl_bits; 2132 2133 pmctrl_bits = sr32(pmctrl); 2134 if (pmctrl_bits & MAGICPKT) 2135 wol->wolopts |= WAKE_MAGIC; 2136 if (pmctrl_bits & LINKON) 2137 wol->wolopts |= WAKE_PHY; 2138 2139 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2140 } 2141 2142 static const struct ethtool_ops sis900_ethtool_ops = { 2143 .get_drvinfo = sis900_get_drvinfo, 2144 .get_msglevel = sis900_get_msglevel, 2145 .set_msglevel = sis900_set_msglevel, 2146 .get_link = sis900_get_link, 2147 .get_settings = sis900_get_settings, 2148 .set_settings = sis900_set_settings, 2149 .nway_reset = sis900_nway_reset, 2150 .get_wol = sis900_get_wol, 2151 .set_wol = sis900_set_wol 2152 }; 2153 2154 /** 2155 * mii_ioctl - process MII i/o control command 2156 * @net_dev: the net device to command for 2157 * @rq: parameter for command 2158 * @cmd: the i/o command 2159 * 2160 * Process MII command like read/write MII register 2161 */ 2162 2163 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2164 { 2165 struct sis900_private *sis_priv = netdev_priv(net_dev); 2166 struct mii_ioctl_data *data = if_mii(rq); 2167 2168 switch(cmd) { 2169 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2170 data->phy_id = sis_priv->mii->phy_addr; 2171 /* Fall Through */ 2172 2173 case SIOCGMIIREG: /* Read MII PHY register. */ 2174 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2175 return 0; 2176 2177 case SIOCSMIIREG: /* Write MII PHY register. */ 2178 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2179 return 0; 2180 default: 2181 return -EOPNOTSUPP; 2182 } 2183 } 2184 2185 /** 2186 * sis900_set_config - Set media type by net_device.set_config 2187 * @dev: the net device for media type change 2188 * @map: ifmap passed by ifconfig 2189 * 2190 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2191 * we support only port changes. All other runtime configuration 2192 * changes will be ignored 2193 */ 2194 2195 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2196 { 2197 struct sis900_private *sis_priv = netdev_priv(dev); 2198 struct mii_phy *mii_phy = sis_priv->mii; 2199 2200 u16 status; 2201 2202 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2203 /* we switch on the ifmap->port field. I couldn't find anything 2204 * like a definition or standard for the values of that field. 2205 * I think the meaning of those values is device specific. But 2206 * since I would like to change the media type via the ifconfig 2207 * command I use the definition from linux/netdevice.h 2208 * (which seems to be different from the ifport(pcmcia) definition) */ 2209 switch(map->port){ 2210 case IF_PORT_UNKNOWN: /* use auto here */ 2211 dev->if_port = map->port; 2212 /* we are going to change the media type, so the Link 2213 * will be temporary down and we need to reflect that 2214 * here. When the Link comes up again, it will be 2215 * sensed by the sis_timer procedure, which also does 2216 * all the rest for us */ 2217 netif_carrier_off(dev); 2218 2219 /* read current state */ 2220 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2221 2222 /* enable auto negotiation and reset the negotioation 2223 * (I don't really know what the auto negatiotiation 2224 * reset really means, but it sounds for me right to 2225 * do one here) */ 2226 mdio_write(dev, mii_phy->phy_addr, 2227 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2228 2229 break; 2230 2231 case IF_PORT_10BASET: /* 10BaseT */ 2232 dev->if_port = map->port; 2233 2234 /* we are going to change the media type, so the Link 2235 * will be temporary down and we need to reflect that 2236 * here. When the Link comes up again, it will be 2237 * sensed by the sis_timer procedure, which also does 2238 * all the rest for us */ 2239 netif_carrier_off(dev); 2240 2241 /* set Speed to 10Mbps */ 2242 /* read current state */ 2243 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2244 2245 /* disable auto negotiation and force 10MBit mode*/ 2246 mdio_write(dev, mii_phy->phy_addr, 2247 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2248 MII_CNTL_AUTO)); 2249 break; 2250 2251 case IF_PORT_100BASET: /* 100BaseT */ 2252 case IF_PORT_100BASETX: /* 100BaseTx */ 2253 dev->if_port = map->port; 2254 2255 /* we are going to change the media type, so the Link 2256 * will be temporary down and we need to reflect that 2257 * here. When the Link comes up again, it will be 2258 * sensed by the sis_timer procedure, which also does 2259 * all the rest for us */ 2260 netif_carrier_off(dev); 2261 2262 /* set Speed to 100Mbps */ 2263 /* disable auto negotiation and enable 100MBit Mode */ 2264 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2265 mdio_write(dev, mii_phy->phy_addr, 2266 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2267 MII_CNTL_SPEED); 2268 2269 break; 2270 2271 case IF_PORT_10BASE2: /* 10Base2 */ 2272 case IF_PORT_AUI: /* AUI */ 2273 case IF_PORT_100BASEFX: /* 100BaseFx */ 2274 /* These Modes are not supported (are they?)*/ 2275 return -EOPNOTSUPP; 2276 break; 2277 2278 default: 2279 return -EINVAL; 2280 } 2281 } 2282 return 0; 2283 } 2284 2285 /** 2286 * sis900_mcast_bitnr - compute hashtable index 2287 * @addr: multicast address 2288 * @revision: revision id of chip 2289 * 2290 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2291 * hash table, which makes this function a little bit different from other drivers 2292 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2293 * multicast hash table. 2294 */ 2295 2296 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2297 { 2298 2299 u32 crc = ether_crc(6, addr); 2300 2301 /* leave 8 or 7 most siginifant bits */ 2302 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2303 return (int)(crc >> 24); 2304 else 2305 return (int)(crc >> 25); 2306 } 2307 2308 /** 2309 * set_rx_mode - Set SiS900 receive mode 2310 * @net_dev: the net device to be set 2311 * 2312 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2313 * And set the appropriate multicast filter. 2314 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2315 */ 2316 2317 static void set_rx_mode(struct net_device *net_dev) 2318 { 2319 struct sis900_private *sis_priv = netdev_priv(net_dev); 2320 void __iomem *ioaddr = sis_priv->ioaddr; 2321 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2322 int i, table_entries; 2323 u32 rx_mode; 2324 2325 /* 635 Hash Table entries = 256(2^16) */ 2326 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2327 (sis_priv->chipset_rev == SIS900B_900_REV)) 2328 table_entries = 16; 2329 else 2330 table_entries = 8; 2331 2332 if (net_dev->flags & IFF_PROMISC) { 2333 /* Accept any kinds of packets */ 2334 rx_mode = RFPromiscuous; 2335 for (i = 0; i < table_entries; i++) 2336 mc_filter[i] = 0xffff; 2337 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2338 (net_dev->flags & IFF_ALLMULTI)) { 2339 /* too many multicast addresses or accept all multicast packet */ 2340 rx_mode = RFAAB | RFAAM; 2341 for (i = 0; i < table_entries; i++) 2342 mc_filter[i] = 0xffff; 2343 } else { 2344 /* Accept Broadcast packet, destination address matchs our 2345 * MAC address, use Receive Filter to reject unwanted MCAST 2346 * packets */ 2347 struct netdev_hw_addr *ha; 2348 rx_mode = RFAAB; 2349 2350 netdev_for_each_mc_addr(ha, net_dev) { 2351 unsigned int bit_nr; 2352 2353 bit_nr = sis900_mcast_bitnr(ha->addr, 2354 sis_priv->chipset_rev); 2355 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2356 } 2357 } 2358 2359 /* update Multicast Hash Table in Receive Filter */ 2360 for (i = 0; i < table_entries; i++) { 2361 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2362 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2363 sw32(rfdr, mc_filter[i]); 2364 } 2365 2366 sw32(rfcr, RFEN | rx_mode); 2367 2368 /* sis900 is capable of looping back packets at MAC level for 2369 * debugging purpose */ 2370 if (net_dev->flags & IFF_LOOPBACK) { 2371 u32 cr_saved; 2372 /* We must disable Tx/Rx before setting loopback mode */ 2373 cr_saved = sr32(cr); 2374 sw32(cr, cr_saved | TxDIS | RxDIS); 2375 /* enable loopback */ 2376 sw32(txcfg, sr32(txcfg) | TxMLB); 2377 sw32(rxcfg, sr32(rxcfg) | RxATX); 2378 /* restore cr */ 2379 sw32(cr, cr_saved); 2380 } 2381 } 2382 2383 /** 2384 * sis900_reset - Reset sis900 MAC 2385 * @net_dev: the net device to reset 2386 * 2387 * reset sis900 MAC and wait until finished 2388 * reset through command register 2389 * change backoff algorithm for 900B0 & 635 M/B 2390 */ 2391 2392 static void sis900_reset(struct net_device *net_dev) 2393 { 2394 struct sis900_private *sis_priv = netdev_priv(net_dev); 2395 void __iomem *ioaddr = sis_priv->ioaddr; 2396 u32 status = TxRCMP | RxRCMP; 2397 int i; 2398 2399 sw32(ier, 0); 2400 sw32(imr, 0); 2401 sw32(rfcr, 0); 2402 2403 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2404 2405 /* Check that the chip has finished the reset. */ 2406 for (i = 0; status && (i < 1000); i++) 2407 status ^= sr32(isr) & status; 2408 2409 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2410 sis_priv->chipset_rev == SIS900B_900_REV) 2411 sw32(cfg, PESEL | RND_CNT); 2412 else 2413 sw32(cfg, PESEL); 2414 } 2415 2416 /** 2417 * sis900_remove - Remove sis900 device 2418 * @pci_dev: the pci device to be removed 2419 * 2420 * remove and release SiS900 net device 2421 */ 2422 2423 static void sis900_remove(struct pci_dev *pci_dev) 2424 { 2425 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2426 struct sis900_private *sis_priv = netdev_priv(net_dev); 2427 2428 unregister_netdev(net_dev); 2429 2430 while (sis_priv->first_mii) { 2431 struct mii_phy *phy = sis_priv->first_mii; 2432 2433 sis_priv->first_mii = phy->next; 2434 kfree(phy); 2435 } 2436 2437 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2438 sis_priv->rx_ring_dma); 2439 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2440 sis_priv->tx_ring_dma); 2441 pci_iounmap(pci_dev, sis_priv->ioaddr); 2442 free_netdev(net_dev); 2443 pci_release_regions(pci_dev); 2444 pci_set_drvdata(pci_dev, NULL); 2445 } 2446 2447 #ifdef CONFIG_PM 2448 2449 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) 2450 { 2451 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2452 struct sis900_private *sis_priv = netdev_priv(net_dev); 2453 void __iomem *ioaddr = sis_priv->ioaddr; 2454 2455 if(!netif_running(net_dev)) 2456 return 0; 2457 2458 netif_stop_queue(net_dev); 2459 netif_device_detach(net_dev); 2460 2461 /* Stop the chip's Tx and Rx Status Machine */ 2462 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2463 2464 pci_set_power_state(pci_dev, PCI_D3hot); 2465 pci_save_state(pci_dev); 2466 2467 return 0; 2468 } 2469 2470 static int sis900_resume(struct pci_dev *pci_dev) 2471 { 2472 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2473 struct sis900_private *sis_priv = netdev_priv(net_dev); 2474 void __iomem *ioaddr = sis_priv->ioaddr; 2475 2476 if(!netif_running(net_dev)) 2477 return 0; 2478 pci_restore_state(pci_dev); 2479 pci_set_power_state(pci_dev, PCI_D0); 2480 2481 sis900_init_rxfilter(net_dev); 2482 2483 sis900_init_tx_ring(net_dev); 2484 sis900_init_rx_ring(net_dev); 2485 2486 set_rx_mode(net_dev); 2487 2488 netif_device_attach(net_dev); 2489 netif_start_queue(net_dev); 2490 2491 /* Workaround for EDB */ 2492 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2493 2494 /* Enable all known interrupts by setting the interrupt mask. */ 2495 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 2496 sw32(cr, RxENA | sr32(cr)); 2497 sw32(ier, IE); 2498 2499 sis900_check_mode(net_dev, sis_priv->mii); 2500 2501 return 0; 2502 } 2503 #endif /* CONFIG_PM */ 2504 2505 static struct pci_driver sis900_pci_driver = { 2506 .name = SIS900_MODULE_NAME, 2507 .id_table = sis900_pci_tbl, 2508 .probe = sis900_probe, 2509 .remove = sis900_remove, 2510 #ifdef CONFIG_PM 2511 .suspend = sis900_suspend, 2512 .resume = sis900_resume, 2513 #endif /* CONFIG_PM */ 2514 }; 2515 2516 static int __init sis900_init_module(void) 2517 { 2518 /* when a module, this is printed whether or not devices are found in probe */ 2519 #ifdef MODULE 2520 printk(version); 2521 #endif 2522 2523 return pci_register_driver(&sis900_pci_driver); 2524 } 2525 2526 static void __exit sis900_cleanup_module(void) 2527 { 2528 pci_unregister_driver(&sis900_pci_driver); 2529 } 2530 2531 module_init(sis900_init_module); 2532 module_exit(sis900_cleanup_module); 2533 2534