1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <linux/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 110 static const struct pci_device_id sis900_pci_tbl[] = { 111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 113 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 115 {0,} 116 }; 117 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 118 119 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 120 121 static const struct mii_chip_info { 122 const char * name; 123 u16 phy_id0; 124 u16 phy_id1; 125 u8 phy_types; 126 #define HOME 0x0001 127 #define LAN 0x0002 128 #define MIX 0x0003 129 #define UNKNOWN 0x0 130 } mii_chip_table[] = { 131 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 132 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 133 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 134 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 135 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 136 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 137 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 138 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 139 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 140 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 141 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 142 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 143 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 144 {NULL,}, 145 }; 146 147 struct mii_phy { 148 struct mii_phy * next; 149 int phy_addr; 150 u16 phy_id0; 151 u16 phy_id1; 152 u16 status; 153 u8 phy_types; 154 }; 155 156 typedef struct _BufferDesc { 157 u32 link; 158 u32 cmdsts; 159 u32 bufptr; 160 } BufferDesc; 161 162 struct sis900_private { 163 struct pci_dev * pci_dev; 164 165 spinlock_t lock; 166 167 struct mii_phy * mii; 168 struct mii_phy * first_mii; /* record the first mii structure */ 169 unsigned int cur_phy; 170 struct mii_if_info mii_info; 171 172 void __iomem *ioaddr; 173 174 struct timer_list timer; /* Link status detection timer. */ 175 u8 autong_complete; /* 1: auto-negotiate complete */ 176 177 u32 msg_enable; 178 179 unsigned int cur_rx, dirty_rx; /* producer/consumer pointers for Tx/Rx ring */ 180 unsigned int cur_tx, dirty_tx; 181 182 /* The saved address of a sent/receive-in-place packet buffer */ 183 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 184 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 185 BufferDesc *tx_ring; 186 BufferDesc *rx_ring; 187 188 dma_addr_t tx_ring_dma; 189 dma_addr_t rx_ring_dma; 190 191 unsigned int tx_full; /* The Tx queue is full. */ 192 u8 host_bridge_rev; 193 u8 chipset_rev; 194 /* EEPROM data */ 195 int eeprom_size; 196 }; 197 198 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 199 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 200 MODULE_LICENSE("GPL"); 201 202 module_param(multicast_filter_limit, int, 0444); 203 module_param(max_interrupt_work, int, 0444); 204 module_param(sis900_debug, int, 0444); 205 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 206 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 207 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 208 209 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 210 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 211 #define sr32(reg) ioread32(ioaddr + (reg)) 212 #define sr16(reg) ioread16(ioaddr + (reg)) 213 214 #ifdef CONFIG_NET_POLL_CONTROLLER 215 static void sis900_poll(struct net_device *dev); 216 #endif 217 static int sis900_open(struct net_device *net_dev); 218 static int sis900_mii_probe (struct net_device * net_dev); 219 static void sis900_init_rxfilter (struct net_device * net_dev); 220 static u16 read_eeprom(void __iomem *ioaddr, int location); 221 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 222 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 223 static void sis900_timer(struct timer_list *t); 224 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 225 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue); 226 static void sis900_init_tx_ring(struct net_device *net_dev); 227 static void sis900_init_rx_ring(struct net_device *net_dev); 228 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 229 struct net_device *net_dev); 230 static int sis900_rx(struct net_device *net_dev); 231 static void sis900_finish_xmit (struct net_device *net_dev); 232 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 233 static int sis900_close(struct net_device *net_dev); 234 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 235 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 236 static void set_rx_mode(struct net_device *net_dev); 237 static void sis900_reset(struct net_device *net_dev); 238 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 239 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 240 static u16 sis900_default_phy(struct net_device * net_dev); 241 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 242 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 243 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 244 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 245 static const struct ethtool_ops sis900_ethtool_ops; 246 247 /** 248 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 249 * @pci_dev: the sis900 pci device 250 * @net_dev: the net device to get address for 251 * 252 * Older SiS900 and friends, use EEPROM to store MAC address. 253 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 254 */ 255 256 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 257 struct net_device *net_dev) 258 { 259 struct sis900_private *sis_priv = netdev_priv(net_dev); 260 void __iomem *ioaddr = sis_priv->ioaddr; 261 u16 signature; 262 int i; 263 264 /* check to see if we have sane EEPROM */ 265 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 266 if (signature == 0xffff || signature == 0x0000) { 267 printk (KERN_WARNING "%s: Error EEPROM read %x\n", 268 pci_name(pci_dev), signature); 269 return 0; 270 } 271 272 /* get MAC address from EEPROM */ 273 for (i = 0; i < 3; i++) 274 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 275 276 return 1; 277 } 278 279 /** 280 * sis630e_get_mac_addr - Get MAC address for SiS630E model 281 * @pci_dev: the sis900 pci device 282 * @net_dev: the net device to get address for 283 * 284 * SiS630E model, use APC CMOS RAM to store MAC address. 285 * APC CMOS RAM is accessed through ISA bridge. 286 * MAC address is read into @net_dev->dev_addr. 287 */ 288 289 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 290 struct net_device *net_dev) 291 { 292 struct pci_dev *isa_bridge = NULL; 293 u8 reg; 294 int i; 295 296 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 297 if (!isa_bridge) 298 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 299 if (!isa_bridge) { 300 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 301 pci_name(pci_dev)); 302 return 0; 303 } 304 pci_read_config_byte(isa_bridge, 0x48, ®); 305 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 306 307 for (i = 0; i < 6; i++) { 308 outb(0x09 + i, 0x70); 309 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 310 } 311 312 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 313 pci_dev_put(isa_bridge); 314 315 return 1; 316 } 317 318 319 /** 320 * sis635_get_mac_addr - Get MAC address for SIS635 model 321 * @pci_dev: the sis900 pci device 322 * @net_dev: the net device to get address for 323 * 324 * SiS635 model, set MAC Reload Bit to load Mac address from APC 325 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 326 * @net_dev->dev_addr. 327 */ 328 329 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 330 struct net_device *net_dev) 331 { 332 struct sis900_private *sis_priv = netdev_priv(net_dev); 333 void __iomem *ioaddr = sis_priv->ioaddr; 334 u32 rfcrSave; 335 u32 i; 336 337 rfcrSave = sr32(rfcr); 338 339 sw32(cr, rfcrSave | RELOAD); 340 sw32(cr, 0); 341 342 /* disable packet filtering before setting filter */ 343 sw32(rfcr, rfcrSave & ~RFEN); 344 345 /* load MAC addr to filter data register */ 346 for (i = 0 ; i < 3 ; i++) { 347 sw32(rfcr, (i << RFADDR_shift)); 348 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr); 349 } 350 351 /* enable packet filtering */ 352 sw32(rfcr, rfcrSave | RFEN); 353 354 return 1; 355 } 356 357 /** 358 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 359 * @pci_dev: the sis900 pci device 360 * @net_dev: the net device to get address for 361 * 362 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 363 * is shared by 364 * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first 365 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed 366 * by LAN, otherwise it is not. After MAC address is read from EEPROM, send 367 * EEDONE signal to refuse EEPROM access by LAN. 368 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 369 * The signature field in SiS962 or SiS963 spec is meaningless. 370 * MAC address is read into @net_dev->dev_addr. 371 */ 372 373 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 374 struct net_device *net_dev) 375 { 376 struct sis900_private *sis_priv = netdev_priv(net_dev); 377 void __iomem *ioaddr = sis_priv->ioaddr; 378 int wait, rc = 0; 379 380 sw32(mear, EEREQ); 381 for (wait = 0; wait < 2000; wait++) { 382 if (sr32(mear) & EEGNT) { 383 u16 *mac = (u16 *)net_dev->dev_addr; 384 int i; 385 386 /* get MAC address from EEPROM */ 387 for (i = 0; i < 3; i++) 388 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 389 390 rc = 1; 391 break; 392 } 393 udelay(1); 394 } 395 sw32(mear, EEDONE); 396 return rc; 397 } 398 399 static const struct net_device_ops sis900_netdev_ops = { 400 .ndo_open = sis900_open, 401 .ndo_stop = sis900_close, 402 .ndo_start_xmit = sis900_start_xmit, 403 .ndo_set_config = sis900_set_config, 404 .ndo_set_rx_mode = set_rx_mode, 405 .ndo_validate_addr = eth_validate_addr, 406 .ndo_set_mac_address = eth_mac_addr, 407 .ndo_eth_ioctl = mii_ioctl, 408 .ndo_tx_timeout = sis900_tx_timeout, 409 #ifdef CONFIG_NET_POLL_CONTROLLER 410 .ndo_poll_controller = sis900_poll, 411 #endif 412 }; 413 414 /** 415 * sis900_probe - Probe for sis900 device 416 * @pci_dev: the sis900 pci device 417 * @pci_id: the pci device ID 418 * 419 * Check and probe sis900 net device for @pci_dev. 420 * Get mac address according to the chip revision, 421 * and assign SiS900-specific entries in the device structure. 422 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 423 */ 424 425 static int sis900_probe(struct pci_dev *pci_dev, 426 const struct pci_device_id *pci_id) 427 { 428 struct sis900_private *sis_priv; 429 struct net_device *net_dev; 430 struct pci_dev *dev; 431 dma_addr_t ring_dma; 432 void *ring_space; 433 void __iomem *ioaddr; 434 int i, ret; 435 const char *card_name = card_names[pci_id->driver_data]; 436 const char *dev_name = pci_name(pci_dev); 437 438 /* when built into the kernel, we only print version if device is found */ 439 #ifndef MODULE 440 static int printed_version; 441 if (!printed_version++) 442 printk(version); 443 #endif 444 445 /* setup various bits in PCI command register */ 446 ret = pcim_enable_device(pci_dev); 447 if(ret) return ret; 448 449 i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); 450 if(i){ 451 printk(KERN_ERR "sis900.c: architecture does not support " 452 "32bit PCI busmaster DMA\n"); 453 return i; 454 } 455 456 pci_set_master(pci_dev); 457 458 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 459 if (!net_dev) 460 return -ENOMEM; 461 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 462 463 /* We do a request_region() to register /proc/ioports info. */ 464 ret = pci_request_regions(pci_dev, "sis900"); 465 if (ret) 466 goto err_out; 467 468 /* IO region. */ 469 ioaddr = pci_iomap(pci_dev, 0, 0); 470 if (!ioaddr) { 471 ret = -ENOMEM; 472 goto err_out; 473 } 474 475 sis_priv = netdev_priv(net_dev); 476 sis_priv->ioaddr = ioaddr; 477 sis_priv->pci_dev = pci_dev; 478 spin_lock_init(&sis_priv->lock); 479 480 sis_priv->eeprom_size = 24; 481 482 pci_set_drvdata(pci_dev, net_dev); 483 484 ring_space = dma_alloc_coherent(&pci_dev->dev, TX_TOTAL_SIZE, 485 &ring_dma, GFP_KERNEL); 486 if (!ring_space) { 487 ret = -ENOMEM; 488 goto err_out_unmap; 489 } 490 sis_priv->tx_ring = ring_space; 491 sis_priv->tx_ring_dma = ring_dma; 492 493 ring_space = dma_alloc_coherent(&pci_dev->dev, RX_TOTAL_SIZE, 494 &ring_dma, GFP_KERNEL); 495 if (!ring_space) { 496 ret = -ENOMEM; 497 goto err_unmap_tx; 498 } 499 sis_priv->rx_ring = ring_space; 500 sis_priv->rx_ring_dma = ring_dma; 501 502 /* The SiS900-specific entries in the device structure. */ 503 net_dev->netdev_ops = &sis900_netdev_ops; 504 net_dev->watchdog_timeo = TX_TIMEOUT; 505 net_dev->ethtool_ops = &sis900_ethtool_ops; 506 507 if (sis900_debug > 0) 508 sis_priv->msg_enable = sis900_debug; 509 else 510 sis_priv->msg_enable = SIS900_DEF_MSG; 511 512 sis_priv->mii_info.dev = net_dev; 513 sis_priv->mii_info.mdio_read = mdio_read; 514 sis_priv->mii_info.mdio_write = mdio_write; 515 sis_priv->mii_info.phy_id_mask = 0x1f; 516 sis_priv->mii_info.reg_num_mask = 0x1f; 517 518 /* Get Mac address according to the chip revision */ 519 sis_priv->chipset_rev = pci_dev->revision; 520 if(netif_msg_probe(sis_priv)) 521 printk(KERN_DEBUG "%s: detected revision %2.2x, " 522 "trying to get MAC address...\n", 523 dev_name, sis_priv->chipset_rev); 524 525 ret = 0; 526 if (sis_priv->chipset_rev == SIS630E_900_REV) 527 ret = sis630e_get_mac_addr(pci_dev, net_dev); 528 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 529 ret = sis635_get_mac_addr(pci_dev, net_dev); 530 else if (sis_priv->chipset_rev == SIS96x_900_REV) 531 ret = sis96x_get_mac_addr(pci_dev, net_dev); 532 else 533 ret = sis900_get_mac_addr(pci_dev, net_dev); 534 535 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 536 eth_hw_addr_random(net_dev); 537 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 538 "using random generated one\n", dev_name); 539 } 540 541 /* 630ET : set the mii access mode as software-mode */ 542 if (sis_priv->chipset_rev == SIS630ET_900_REV) 543 sw32(cr, ACCESSMODE | sr32(cr)); 544 545 /* probe for mii transceiver */ 546 if (sis900_mii_probe(net_dev) == 0) { 547 printk(KERN_WARNING "%s: Error probing MII device.\n", 548 dev_name); 549 ret = -ENODEV; 550 goto err_unmap_rx; 551 } 552 553 /* save our host bridge revision */ 554 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 555 if (dev) { 556 sis_priv->host_bridge_rev = dev->revision; 557 pci_dev_put(dev); 558 } 559 560 ret = register_netdev(net_dev); 561 if (ret) 562 goto err_unmap_rx; 563 564 /* print some information about our NIC */ 565 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 566 net_dev->name, card_name, ioaddr, pci_dev->irq, 567 net_dev->dev_addr); 568 569 /* Detect Wake on Lan support */ 570 ret = (sr32(CFGPMC) & PMESP) >> 27; 571 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 572 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 573 574 return 0; 575 576 err_unmap_rx: 577 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 578 sis_priv->rx_ring_dma); 579 err_unmap_tx: 580 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 581 sis_priv->tx_ring_dma); 582 err_out_unmap: 583 pci_iounmap(pci_dev, ioaddr); 584 err_out: 585 free_netdev(net_dev); 586 return ret; 587 } 588 589 /** 590 * sis900_mii_probe - Probe MII PHY for sis900 591 * @net_dev: the net device to probe for 592 * 593 * Search for total of 32 possible mii phy addresses. 594 * Identify and set current phy if found one, 595 * return error if it failed to found. 596 */ 597 598 static int sis900_mii_probe(struct net_device *net_dev) 599 { 600 struct sis900_private *sis_priv = netdev_priv(net_dev); 601 const char *dev_name = pci_name(sis_priv->pci_dev); 602 u16 poll_bit = MII_STAT_LINK, status = 0; 603 unsigned long timeout = jiffies + 5 * HZ; 604 int phy_addr; 605 606 sis_priv->mii = NULL; 607 608 /* search for total of 32 possible mii phy addresses */ 609 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 610 struct mii_phy * mii_phy = NULL; 611 u16 mii_status; 612 int i; 613 614 mii_phy = NULL; 615 for(i = 0; i < 2; i++) 616 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 617 618 if (mii_status == 0xffff || mii_status == 0x0000) { 619 if (netif_msg_probe(sis_priv)) 620 printk(KERN_DEBUG "%s: MII at address %d" 621 " not accessible\n", 622 dev_name, phy_addr); 623 continue; 624 } 625 626 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 627 mii_phy = sis_priv->first_mii; 628 while (mii_phy) { 629 struct mii_phy *phy; 630 phy = mii_phy; 631 mii_phy = mii_phy->next; 632 kfree(phy); 633 } 634 return 0; 635 } 636 637 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 638 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 639 mii_phy->phy_addr = phy_addr; 640 mii_phy->status = mii_status; 641 mii_phy->next = sis_priv->mii; 642 sis_priv->mii = mii_phy; 643 sis_priv->first_mii = mii_phy; 644 645 for (i = 0; mii_chip_table[i].phy_id1; i++) 646 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 647 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 648 mii_phy->phy_types = mii_chip_table[i].phy_types; 649 if (mii_chip_table[i].phy_types == MIX) 650 mii_phy->phy_types = 651 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 652 printk(KERN_INFO "%s: %s transceiver found " 653 "at address %d.\n", 654 dev_name, 655 mii_chip_table[i].name, 656 phy_addr); 657 break; 658 } 659 660 if( !mii_chip_table[i].phy_id1 ) { 661 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 662 dev_name, phy_addr); 663 mii_phy->phy_types = UNKNOWN; 664 } 665 } 666 667 if (sis_priv->mii == NULL) { 668 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 669 return 0; 670 } 671 672 /* select default PHY for mac */ 673 sis_priv->mii = NULL; 674 sis900_default_phy( net_dev ); 675 676 /* Reset phy if default phy is internal sis900 */ 677 if ((sis_priv->mii->phy_id0 == 0x001D) && 678 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 679 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 680 681 /* workaround for ICS1893 PHY */ 682 if ((sis_priv->mii->phy_id0 == 0x0015) && 683 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 684 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 685 686 if(status & MII_STAT_LINK){ 687 while (poll_bit) { 688 yield(); 689 690 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 691 if (time_after_eq(jiffies, timeout)) { 692 printk(KERN_WARNING "%s: reset phy and link down now\n", 693 dev_name); 694 return -ETIME; 695 } 696 } 697 } 698 699 if (sis_priv->chipset_rev == SIS630E_900_REV) { 700 /* SiS 630E has some bugs on default value of PHY registers */ 701 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 702 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 703 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 704 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 705 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 706 } 707 708 if (sis_priv->mii->status & MII_STAT_LINK) 709 netif_carrier_on(net_dev); 710 else 711 netif_carrier_off(net_dev); 712 713 return 1; 714 } 715 716 /** 717 * sis900_default_phy - Select default PHY for sis900 mac. 718 * @net_dev: the net device to probe for 719 * 720 * Select first detected PHY with link as default. 721 * If no one is link on, select PHY whose types is HOME as default. 722 * If HOME doesn't exist, select LAN. 723 */ 724 725 static u16 sis900_default_phy(struct net_device * net_dev) 726 { 727 struct sis900_private *sis_priv = netdev_priv(net_dev); 728 struct mii_phy *phy = NULL, *phy_home = NULL, 729 *default_phy = NULL, *phy_lan = NULL; 730 u16 status; 731 732 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 733 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 734 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 735 736 /* Link ON & Not select default PHY & not ghost PHY */ 737 if ((status & MII_STAT_LINK) && !default_phy && 738 (phy->phy_types != UNKNOWN)) { 739 default_phy = phy; 740 } else { 741 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 742 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 743 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 744 if (phy->phy_types == HOME) 745 phy_home = phy; 746 else if(phy->phy_types == LAN) 747 phy_lan = phy; 748 } 749 } 750 751 if (!default_phy && phy_home) 752 default_phy = phy_home; 753 else if (!default_phy && phy_lan) 754 default_phy = phy_lan; 755 else if (!default_phy) 756 default_phy = sis_priv->first_mii; 757 758 if (sis_priv->mii != default_phy) { 759 sis_priv->mii = default_phy; 760 sis_priv->cur_phy = default_phy->phy_addr; 761 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 762 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 763 } 764 765 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 766 767 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 768 status &= (~MII_CNTL_ISOLATE); 769 770 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 771 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 772 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 773 774 return status; 775 } 776 777 778 /** 779 * sis900_set_capability - set the media capability of network adapter. 780 * @net_dev : the net device to probe for 781 * @phy : default PHY 782 * 783 * Set the media capability of network adapter according to 784 * mii status register. It's necessary before auto-negotiate. 785 */ 786 787 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 788 { 789 u16 cap; 790 791 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 792 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 793 794 cap = MII_NWAY_CSMA_CD | 795 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 796 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 797 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 798 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 799 800 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 801 } 802 803 804 /* Delay between EEPROM clock transitions. */ 805 #define eeprom_delay() sr32(mear) 806 807 /** 808 * read_eeprom - Read Serial EEPROM 809 * @ioaddr: base i/o address 810 * @location: the EEPROM location to read 811 * 812 * Read Serial EEPROM through EEPROM Access Register. 813 * Note that location is in word (16 bits) unit 814 */ 815 816 static u16 read_eeprom(void __iomem *ioaddr, int location) 817 { 818 u32 read_cmd = location | EEread; 819 int i; 820 u16 retval = 0; 821 822 sw32(mear, 0); 823 eeprom_delay(); 824 sw32(mear, EECS); 825 eeprom_delay(); 826 827 /* Shift the read command (9) bits out. */ 828 for (i = 8; i >= 0; i--) { 829 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 830 831 sw32(mear, dataval); 832 eeprom_delay(); 833 sw32(mear, dataval | EECLK); 834 eeprom_delay(); 835 } 836 sw32(mear, EECS); 837 eeprom_delay(); 838 839 /* read the 16-bits data in */ 840 for (i = 16; i > 0; i--) { 841 sw32(mear, EECS); 842 eeprom_delay(); 843 sw32(mear, EECS | EECLK); 844 eeprom_delay(); 845 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 846 eeprom_delay(); 847 } 848 849 /* Terminate the EEPROM access. */ 850 sw32(mear, 0); 851 eeprom_delay(); 852 853 return retval; 854 } 855 856 /* Read and write the MII management registers using software-generated 857 serial MDIO protocol. Note that the command bits and data bits are 858 send out separately */ 859 #define mdio_delay() sr32(mear) 860 861 static void mdio_idle(struct sis900_private *sp) 862 { 863 void __iomem *ioaddr = sp->ioaddr; 864 865 sw32(mear, MDIO | MDDIR); 866 mdio_delay(); 867 sw32(mear, MDIO | MDDIR | MDC); 868 } 869 870 /* Synchronize the MII management interface by shifting 32 one bits out. */ 871 static void mdio_reset(struct sis900_private *sp) 872 { 873 void __iomem *ioaddr = sp->ioaddr; 874 int i; 875 876 for (i = 31; i >= 0; i--) { 877 sw32(mear, MDDIR | MDIO); 878 mdio_delay(); 879 sw32(mear, MDDIR | MDIO | MDC); 880 mdio_delay(); 881 } 882 } 883 884 /** 885 * mdio_read - read MII PHY register 886 * @net_dev: the net device to read 887 * @phy_id: the phy address to read 888 * @location: the phy register id to read 889 * 890 * Read MII registers through MDIO and MDC 891 * using MDIO management frame structure and protocol(defined by ISO/IEC). 892 * Please see SiS7014 or ICS spec 893 */ 894 895 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 896 { 897 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 898 struct sis900_private *sp = netdev_priv(net_dev); 899 void __iomem *ioaddr = sp->ioaddr; 900 u16 retval = 0; 901 int i; 902 903 mdio_reset(sp); 904 mdio_idle(sp); 905 906 for (i = 15; i >= 0; i--) { 907 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 908 909 sw32(mear, dataval); 910 mdio_delay(); 911 sw32(mear, dataval | MDC); 912 mdio_delay(); 913 } 914 915 /* Read the 16 data bits. */ 916 for (i = 16; i > 0; i--) { 917 sw32(mear, 0); 918 mdio_delay(); 919 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 920 sw32(mear, MDC); 921 mdio_delay(); 922 } 923 sw32(mear, 0x00); 924 925 return retval; 926 } 927 928 /** 929 * mdio_write - write MII PHY register 930 * @net_dev: the net device to write 931 * @phy_id: the phy address to write 932 * @location: the phy register id to write 933 * @value: the register value to write with 934 * 935 * Write MII registers with @value through MDIO and MDC 936 * using MDIO management frame structure and protocol(defined by ISO/IEC) 937 * please see SiS7014 or ICS spec 938 */ 939 940 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 941 int value) 942 { 943 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 944 struct sis900_private *sp = netdev_priv(net_dev); 945 void __iomem *ioaddr = sp->ioaddr; 946 int i; 947 948 mdio_reset(sp); 949 mdio_idle(sp); 950 951 /* Shift the command bits out. */ 952 for (i = 15; i >= 0; i--) { 953 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 954 955 sw8(mear, dataval); 956 mdio_delay(); 957 sw8(mear, dataval | MDC); 958 mdio_delay(); 959 } 960 mdio_delay(); 961 962 /* Shift the value bits out. */ 963 for (i = 15; i >= 0; i--) { 964 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 965 966 sw32(mear, dataval); 967 mdio_delay(); 968 sw32(mear, dataval | MDC); 969 mdio_delay(); 970 } 971 mdio_delay(); 972 973 /* Clear out extra bits. */ 974 for (i = 2; i > 0; i--) { 975 sw8(mear, 0); 976 mdio_delay(); 977 sw8(mear, MDC); 978 mdio_delay(); 979 } 980 sw32(mear, 0x00); 981 } 982 983 984 /** 985 * sis900_reset_phy - reset sis900 mii phy. 986 * @net_dev: the net device to write 987 * @phy_addr: default phy address 988 * 989 * Some specific phy can't work properly without reset. 990 * This function will be called during initialization and 991 * link status change from ON to DOWN. 992 */ 993 994 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 995 { 996 int i; 997 u16 status; 998 999 for (i = 0; i < 2; i++) 1000 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1001 1002 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1003 1004 return status; 1005 } 1006 1007 #ifdef CONFIG_NET_POLL_CONTROLLER 1008 /* 1009 * Polling 'interrupt' - used by things like netconsole to send skbs 1010 * without having to re-enable interrupts. It's not called while 1011 * the interrupt routine is executing. 1012 */ 1013 static void sis900_poll(struct net_device *dev) 1014 { 1015 struct sis900_private *sp = netdev_priv(dev); 1016 const int irq = sp->pci_dev->irq; 1017 1018 disable_irq(irq); 1019 sis900_interrupt(irq, dev); 1020 enable_irq(irq); 1021 } 1022 #endif 1023 1024 /** 1025 * sis900_open - open sis900 device 1026 * @net_dev: the net device to open 1027 * 1028 * Do some initialization and start net interface. 1029 * enable interrupts and set sis900 timer. 1030 */ 1031 1032 static int 1033 sis900_open(struct net_device *net_dev) 1034 { 1035 struct sis900_private *sis_priv = netdev_priv(net_dev); 1036 void __iomem *ioaddr = sis_priv->ioaddr; 1037 int ret; 1038 1039 /* Soft reset the chip. */ 1040 sis900_reset(net_dev); 1041 1042 /* Equalizer workaround Rule */ 1043 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1044 1045 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1046 net_dev->name, net_dev); 1047 if (ret) 1048 return ret; 1049 1050 sis900_init_rxfilter(net_dev); 1051 1052 sis900_init_tx_ring(net_dev); 1053 sis900_init_rx_ring(net_dev); 1054 1055 set_rx_mode(net_dev); 1056 1057 netif_start_queue(net_dev); 1058 1059 /* Workaround for EDB */ 1060 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1061 1062 /* Enable all known interrupts by setting the interrupt mask. */ 1063 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1064 sw32(cr, RxENA | sr32(cr)); 1065 sw32(ier, IE); 1066 1067 sis900_check_mode(net_dev, sis_priv->mii); 1068 1069 /* Set the timer to switch to check for link beat and perhaps switch 1070 to an alternate media type. */ 1071 timer_setup(&sis_priv->timer, sis900_timer, 0); 1072 sis_priv->timer.expires = jiffies + HZ; 1073 add_timer(&sis_priv->timer); 1074 1075 return 0; 1076 } 1077 1078 /** 1079 * sis900_init_rxfilter - Initialize the Rx filter 1080 * @net_dev: the net device to initialize for 1081 * 1082 * Set receive filter address to our MAC address 1083 * and enable packet filtering. 1084 */ 1085 1086 static void 1087 sis900_init_rxfilter (struct net_device * net_dev) 1088 { 1089 struct sis900_private *sis_priv = netdev_priv(net_dev); 1090 void __iomem *ioaddr = sis_priv->ioaddr; 1091 u32 rfcrSave; 1092 u32 i; 1093 1094 rfcrSave = sr32(rfcr); 1095 1096 /* disable packet filtering before setting filter */ 1097 sw32(rfcr, rfcrSave & ~RFEN); 1098 1099 /* load MAC addr to filter data register */ 1100 for (i = 0 ; i < 3 ; i++) { 1101 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1102 1103 sw32(rfcr, i << RFADDR_shift); 1104 sw32(rfdr, w); 1105 1106 if (netif_msg_hw(sis_priv)) { 1107 printk(KERN_DEBUG "%s: Receive Filter Address[%d]=%x\n", 1108 net_dev->name, i, sr32(rfdr)); 1109 } 1110 } 1111 1112 /* enable packet filtering */ 1113 sw32(rfcr, rfcrSave | RFEN); 1114 } 1115 1116 /** 1117 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1118 * @net_dev: the net device to initialize for 1119 * 1120 * Initialize the Tx descriptor ring, 1121 */ 1122 1123 static void 1124 sis900_init_tx_ring(struct net_device *net_dev) 1125 { 1126 struct sis900_private *sis_priv = netdev_priv(net_dev); 1127 void __iomem *ioaddr = sis_priv->ioaddr; 1128 int i; 1129 1130 sis_priv->tx_full = 0; 1131 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1132 1133 for (i = 0; i < NUM_TX_DESC; i++) { 1134 sis_priv->tx_skbuff[i] = NULL; 1135 1136 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1137 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1138 sis_priv->tx_ring[i].cmdsts = 0; 1139 sis_priv->tx_ring[i].bufptr = 0; 1140 } 1141 1142 /* load Transmit Descriptor Register */ 1143 sw32(txdp, sis_priv->tx_ring_dma); 1144 if (netif_msg_hw(sis_priv)) 1145 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1146 net_dev->name, sr32(txdp)); 1147 } 1148 1149 /** 1150 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1151 * @net_dev: the net device to initialize for 1152 * 1153 * Initialize the Rx descriptor ring, 1154 * and pre-allocate receive buffers (socket buffer) 1155 */ 1156 1157 static void 1158 sis900_init_rx_ring(struct net_device *net_dev) 1159 { 1160 struct sis900_private *sis_priv = netdev_priv(net_dev); 1161 void __iomem *ioaddr = sis_priv->ioaddr; 1162 int i; 1163 1164 sis_priv->cur_rx = 0; 1165 sis_priv->dirty_rx = 0; 1166 1167 /* init RX descriptor */ 1168 for (i = 0; i < NUM_RX_DESC; i++) { 1169 sis_priv->rx_skbuff[i] = NULL; 1170 1171 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1172 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1173 sis_priv->rx_ring[i].cmdsts = 0; 1174 sis_priv->rx_ring[i].bufptr = 0; 1175 } 1176 1177 /* allocate sock buffers */ 1178 for (i = 0; i < NUM_RX_DESC; i++) { 1179 struct sk_buff *skb; 1180 1181 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1182 /* not enough memory for skbuff, this makes a "hole" 1183 on the buffer ring, it is not clear how the 1184 hardware will react to this kind of degenerated 1185 buffer */ 1186 break; 1187 } 1188 sis_priv->rx_skbuff[i] = skb; 1189 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1190 sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1191 skb->data, 1192 RX_BUF_SIZE, 1193 DMA_FROM_DEVICE); 1194 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1195 sis_priv->rx_ring[i].bufptr))) { 1196 dev_kfree_skb(skb); 1197 sis_priv->rx_skbuff[i] = NULL; 1198 break; 1199 } 1200 } 1201 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1202 1203 /* load Receive Descriptor Register */ 1204 sw32(rxdp, sis_priv->rx_ring_dma); 1205 if (netif_msg_hw(sis_priv)) 1206 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1207 net_dev->name, sr32(rxdp)); 1208 } 1209 1210 /** 1211 * sis630_set_eq - set phy equalizer value for 630 LAN 1212 * @net_dev: the net device to set equalizer value 1213 * @revision: 630 LAN revision number 1214 * 1215 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1216 * PHY register 14h(Test) 1217 * Bit 14: 0 -- Automatically detect (default) 1218 * 1 -- Manually set Equalizer filter 1219 * Bit 13: 0 -- (Default) 1220 * 1 -- Speed up convergence of equalizer setting 1221 * Bit 9 : 0 -- (Default) 1222 * 1 -- Disable Baseline Wander 1223 * Bit 3~7 -- Equalizer filter setting 1224 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1225 * Then calculate equalizer value 1226 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1227 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1228 * Calculate Equalizer value: 1229 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1230 * When the equalizer is stable, this value is not a fixed value. It will be within 1231 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1232 * 0 <= max <= 4 --> set equalizer to max 1233 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1234 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1235 */ 1236 1237 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1238 { 1239 struct sis900_private *sis_priv = netdev_priv(net_dev); 1240 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1241 int i, maxcount=10; 1242 1243 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1244 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1245 return; 1246 1247 if (netif_carrier_ok(net_dev)) { 1248 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1249 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1250 (0x2200 | reg14h) & 0xBFFF); 1251 for (i=0; i < maxcount; i++) { 1252 eq_value = (0x00F8 & mdio_read(net_dev, 1253 sis_priv->cur_phy, MII_RESV)) >> 3; 1254 if (i == 0) 1255 max_value=min_value=eq_value; 1256 max_value = (eq_value > max_value) ? 1257 eq_value : max_value; 1258 min_value = (eq_value < min_value) ? 1259 eq_value : min_value; 1260 } 1261 /* 630E rule to determine the equalizer value */ 1262 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1263 revision == SIS630ET_900_REV) { 1264 if (max_value < 5) 1265 eq_value = max_value; 1266 else if (max_value >= 5 && max_value < 15) 1267 eq_value = (max_value == min_value) ? 1268 max_value+2 : max_value+1; 1269 else if (max_value >= 15) 1270 eq_value=(max_value == min_value) ? 1271 max_value+6 : max_value+5; 1272 } 1273 /* 630B0&B1 rule to determine the equalizer value */ 1274 if (revision == SIS630A_900_REV && 1275 (sis_priv->host_bridge_rev == SIS630B0 || 1276 sis_priv->host_bridge_rev == SIS630B1)) { 1277 if (max_value == 0) 1278 eq_value = 3; 1279 else 1280 eq_value = (max_value + min_value + 1)/2; 1281 } 1282 /* write equalizer value and setting */ 1283 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1284 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1285 reg14h = (reg14h | 0x6000) & 0xFDFF; 1286 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1287 } else { 1288 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1289 if (revision == SIS630A_900_REV && 1290 (sis_priv->host_bridge_rev == SIS630B0 || 1291 sis_priv->host_bridge_rev == SIS630B1)) 1292 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1293 (reg14h | 0x2200) & 0xBFFF); 1294 else 1295 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1296 (reg14h | 0x2000) & 0xBFFF); 1297 } 1298 } 1299 1300 /** 1301 * sis900_timer - sis900 timer routine 1302 * @t: timer list containing a pointer to sis900 net device 1303 * 1304 * On each timer ticks we check two things, 1305 * link status (ON/OFF) and link mode (10/100/Full/Half) 1306 */ 1307 1308 static void sis900_timer(struct timer_list *t) 1309 { 1310 struct sis900_private *sis_priv = from_timer(sis_priv, t, timer); 1311 struct net_device *net_dev = sis_priv->mii_info.dev; 1312 struct mii_phy *mii_phy = sis_priv->mii; 1313 static const int next_tick = 5*HZ; 1314 int speed = 0, duplex = 0; 1315 u16 status; 1316 1317 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1318 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1319 1320 /* Link OFF -> ON */ 1321 if (!netif_carrier_ok(net_dev)) { 1322 LookForLink: 1323 /* Search for new PHY */ 1324 status = sis900_default_phy(net_dev); 1325 mii_phy = sis_priv->mii; 1326 1327 if (status & MII_STAT_LINK) { 1328 WARN_ON(!(status & MII_STAT_AUTO_DONE)); 1329 1330 sis900_read_mode(net_dev, &speed, &duplex); 1331 if (duplex) { 1332 sis900_set_mode(sis_priv, speed, duplex); 1333 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1334 netif_carrier_on(net_dev); 1335 } 1336 } 1337 } else { 1338 /* Link ON -> OFF */ 1339 if (!(status & MII_STAT_LINK)){ 1340 netif_carrier_off(net_dev); 1341 if(netif_msg_link(sis_priv)) 1342 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1343 1344 /* Change mode issue */ 1345 if ((mii_phy->phy_id0 == 0x001D) && 1346 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1347 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1348 1349 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1350 1351 goto LookForLink; 1352 } 1353 } 1354 1355 sis_priv->timer.expires = jiffies + next_tick; 1356 add_timer(&sis_priv->timer); 1357 } 1358 1359 /** 1360 * sis900_check_mode - check the media mode for sis900 1361 * @net_dev: the net device to be checked 1362 * @mii_phy: the mii phy 1363 * 1364 * Older driver gets the media mode from mii status output 1365 * register. Now we set our media capability and auto-negotiate 1366 * to get the upper bound of speed and duplex between two ends. 1367 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1368 * and autong_complete should be set to 1. 1369 */ 1370 1371 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1372 { 1373 struct sis900_private *sis_priv = netdev_priv(net_dev); 1374 void __iomem *ioaddr = sis_priv->ioaddr; 1375 int speed, duplex; 1376 1377 if (mii_phy->phy_types == LAN) { 1378 sw32(cfg, ~EXD & sr32(cfg)); 1379 sis900_set_capability(net_dev , mii_phy); 1380 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1381 } else { 1382 sw32(cfg, EXD | sr32(cfg)); 1383 speed = HW_SPEED_HOME; 1384 duplex = FDX_CAPABLE_HALF_SELECTED; 1385 sis900_set_mode(sis_priv, speed, duplex); 1386 sis_priv->autong_complete = 1; 1387 } 1388 } 1389 1390 /** 1391 * sis900_set_mode - Set the media mode of mac register. 1392 * @sp: the device private data 1393 * @speed : the transmit speed to be determined 1394 * @duplex: the duplex mode to be determined 1395 * 1396 * Set the media mode of mac register txcfg/rxcfg according to 1397 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1398 * bus is used instead of PCI bus. When this bit is set 1, the 1399 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1400 * double words. 1401 */ 1402 1403 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1404 { 1405 void __iomem *ioaddr = sp->ioaddr; 1406 u32 tx_flags = 0, rx_flags = 0; 1407 1408 if (sr32( cfg) & EDB_MASTER_EN) { 1409 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1410 (TX_FILL_THRESH << TxFILLT_shift); 1411 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1412 } else { 1413 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1414 (TX_FILL_THRESH << TxFILLT_shift); 1415 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1416 } 1417 1418 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1419 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1420 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1421 } else { 1422 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1423 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1424 } 1425 1426 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1427 tx_flags |= (TxCSI | TxHBI); 1428 rx_flags |= RxATX; 1429 } 1430 1431 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1432 /* Can accept Jumbo packet */ 1433 rx_flags |= RxAJAB; 1434 #endif 1435 1436 sw32(txcfg, tx_flags); 1437 sw32(rxcfg, rx_flags); 1438 } 1439 1440 /** 1441 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1442 * @net_dev: the net device to read mode for 1443 * @phy_addr: mii phy address 1444 * 1445 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1446 * autong_complete should be set to 0 when starting auto-negotiation. 1447 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1448 * sis900_timer will wait for link on again if autong_complete = 0. 1449 */ 1450 1451 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1452 { 1453 struct sis900_private *sis_priv = netdev_priv(net_dev); 1454 int i = 0; 1455 u32 status; 1456 1457 for (i = 0; i < 2; i++) 1458 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1459 1460 if (!(status & MII_STAT_LINK)){ 1461 if(netif_msg_link(sis_priv)) 1462 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1463 sis_priv->autong_complete = 1; 1464 netif_carrier_off(net_dev); 1465 return; 1466 } 1467 1468 /* (Re)start AutoNegotiate */ 1469 mdio_write(net_dev, phy_addr, MII_CONTROL, 1470 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1471 sis_priv->autong_complete = 0; 1472 } 1473 1474 1475 /** 1476 * sis900_read_mode - read media mode for sis900 internal phy 1477 * @net_dev: the net device to read mode for 1478 * @speed : the transmit speed to be determined 1479 * @duplex : the duplex mode to be determined 1480 * 1481 * The capability of remote end will be put in mii register autorec 1482 * after auto-negotiation. Use AND operation to get the upper bound 1483 * of speed and duplex between two ends. 1484 */ 1485 1486 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1487 { 1488 struct sis900_private *sis_priv = netdev_priv(net_dev); 1489 struct mii_phy *phy = sis_priv->mii; 1490 int phy_addr = sis_priv->cur_phy; 1491 u32 status; 1492 u16 autoadv, autorec; 1493 int i; 1494 1495 for (i = 0; i < 2; i++) 1496 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1497 1498 if (!(status & MII_STAT_LINK)) 1499 return; 1500 1501 /* AutoNegotiate completed */ 1502 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1503 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1504 status = autoadv & autorec; 1505 1506 *speed = HW_SPEED_10_MBPS; 1507 *duplex = FDX_CAPABLE_HALF_SELECTED; 1508 1509 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1510 *speed = HW_SPEED_100_MBPS; 1511 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1512 *duplex = FDX_CAPABLE_FULL_SELECTED; 1513 1514 sis_priv->autong_complete = 1; 1515 1516 /* Workaround for Realtek RTL8201 PHY issue */ 1517 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1518 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1519 *duplex = FDX_CAPABLE_FULL_SELECTED; 1520 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1521 *speed = HW_SPEED_100_MBPS; 1522 } 1523 1524 if(netif_msg_link(sis_priv)) 1525 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1526 net_dev->name, 1527 *speed == HW_SPEED_100_MBPS ? 1528 "100mbps" : "10mbps", 1529 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1530 "full" : "half"); 1531 } 1532 1533 /** 1534 * sis900_tx_timeout - sis900 transmit timeout routine 1535 * @net_dev: the net device to transmit 1536 * @txqueue: index of hanging queue 1537 * 1538 * print transmit timeout status 1539 * disable interrupts and do some tasks 1540 */ 1541 1542 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue) 1543 { 1544 struct sis900_private *sis_priv = netdev_priv(net_dev); 1545 void __iomem *ioaddr = sis_priv->ioaddr; 1546 unsigned long flags; 1547 int i; 1548 1549 if (netif_msg_tx_err(sis_priv)) { 1550 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1551 net_dev->name, sr32(cr), sr32(isr)); 1552 } 1553 1554 /* Disable interrupts by clearing the interrupt mask. */ 1555 sw32(imr, 0x0000); 1556 1557 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1558 spin_lock_irqsave(&sis_priv->lock, flags); 1559 1560 /* discard unsent packets */ 1561 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1562 for (i = 0; i < NUM_TX_DESC; i++) { 1563 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1564 1565 if (skb) { 1566 dma_unmap_single(&sis_priv->pci_dev->dev, 1567 sis_priv->tx_ring[i].bufptr, 1568 skb->len, DMA_TO_DEVICE); 1569 dev_kfree_skb_irq(skb); 1570 sis_priv->tx_skbuff[i] = NULL; 1571 sis_priv->tx_ring[i].cmdsts = 0; 1572 sis_priv->tx_ring[i].bufptr = 0; 1573 net_dev->stats.tx_dropped++; 1574 } 1575 } 1576 sis_priv->tx_full = 0; 1577 netif_wake_queue(net_dev); 1578 1579 spin_unlock_irqrestore(&sis_priv->lock, flags); 1580 1581 netif_trans_update(net_dev); /* prevent tx timeout */ 1582 1583 /* load Transmit Descriptor Register */ 1584 sw32(txdp, sis_priv->tx_ring_dma); 1585 1586 /* Enable all known interrupts by setting the interrupt mask. */ 1587 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1588 } 1589 1590 /** 1591 * sis900_start_xmit - sis900 start transmit routine 1592 * @skb: socket buffer pointer to put the data being transmitted 1593 * @net_dev: the net device to transmit with 1594 * 1595 * Set the transmit buffer descriptor, 1596 * and write TxENA to enable transmit state machine. 1597 * tell upper layer if the buffer is full 1598 */ 1599 1600 static netdev_tx_t 1601 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1602 { 1603 struct sis900_private *sis_priv = netdev_priv(net_dev); 1604 void __iomem *ioaddr = sis_priv->ioaddr; 1605 unsigned int entry; 1606 unsigned long flags; 1607 unsigned int index_cur_tx, index_dirty_tx; 1608 unsigned int count_dirty_tx; 1609 1610 spin_lock_irqsave(&sis_priv->lock, flags); 1611 1612 /* Calculate the next Tx descriptor entry. */ 1613 entry = sis_priv->cur_tx % NUM_TX_DESC; 1614 sis_priv->tx_skbuff[entry] = skb; 1615 1616 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1617 sis_priv->tx_ring[entry].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1618 skb->data, skb->len, 1619 DMA_TO_DEVICE); 1620 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1621 sis_priv->tx_ring[entry].bufptr))) { 1622 dev_kfree_skb_any(skb); 1623 sis_priv->tx_skbuff[entry] = NULL; 1624 net_dev->stats.tx_dropped++; 1625 spin_unlock_irqrestore(&sis_priv->lock, flags); 1626 return NETDEV_TX_OK; 1627 } 1628 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); 1629 sw32(cr, TxENA | sr32(cr)); 1630 1631 sis_priv->cur_tx ++; 1632 index_cur_tx = sis_priv->cur_tx; 1633 index_dirty_tx = sis_priv->dirty_tx; 1634 1635 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1636 count_dirty_tx ++; 1637 1638 if (index_cur_tx == index_dirty_tx) { 1639 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1640 sis_priv->tx_full = 1; 1641 netif_stop_queue(net_dev); 1642 } else if (count_dirty_tx < NUM_TX_DESC) { 1643 /* Typical path, tell upper layer that more transmission is possible */ 1644 netif_start_queue(net_dev); 1645 } else { 1646 /* buffer full, tell upper layer no more transmission */ 1647 sis_priv->tx_full = 1; 1648 netif_stop_queue(net_dev); 1649 } 1650 1651 spin_unlock_irqrestore(&sis_priv->lock, flags); 1652 1653 if (netif_msg_tx_queued(sis_priv)) 1654 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1655 "to slot %d.\n", 1656 net_dev->name, skb->data, (int)skb->len, entry); 1657 1658 return NETDEV_TX_OK; 1659 } 1660 1661 /** 1662 * sis900_interrupt - sis900 interrupt handler 1663 * @irq: the irq number 1664 * @dev_instance: the client data object 1665 * 1666 * The interrupt handler does all of the Rx thread work, 1667 * and cleans up after the Tx thread 1668 */ 1669 1670 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1671 { 1672 struct net_device *net_dev = dev_instance; 1673 struct sis900_private *sis_priv = netdev_priv(net_dev); 1674 int boguscnt = max_interrupt_work; 1675 void __iomem *ioaddr = sis_priv->ioaddr; 1676 u32 status; 1677 unsigned int handled = 0; 1678 1679 spin_lock (&sis_priv->lock); 1680 1681 do { 1682 status = sr32(isr); 1683 1684 if ((status & (HIBERR|TxURN|TxERR|TxDESC|RxORN|RxERR|RxOK)) == 0) 1685 /* nothing interesting happened */ 1686 break; 1687 handled = 1; 1688 1689 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1690 if (status & (RxORN | RxERR | RxOK)) 1691 /* Rx interrupt */ 1692 sis900_rx(net_dev); 1693 1694 if (status & (TxURN | TxERR | TxDESC)) 1695 /* Tx interrupt */ 1696 sis900_finish_xmit(net_dev); 1697 1698 /* something strange happened !!! */ 1699 if (status & HIBERR) { 1700 if(netif_msg_intr(sis_priv)) 1701 printk(KERN_INFO "%s: Abnormal interrupt, " 1702 "status %#8.8x.\n", net_dev->name, status); 1703 break; 1704 } 1705 if (--boguscnt < 0) { 1706 if(netif_msg_intr(sis_priv)) 1707 printk(KERN_INFO "%s: Too much work at interrupt, " 1708 "interrupt status = %#8.8x.\n", 1709 net_dev->name, status); 1710 break; 1711 } 1712 } while (1); 1713 1714 if(netif_msg_intr(sis_priv)) 1715 printk(KERN_DEBUG "%s: exiting interrupt, " 1716 "interrupt status = %#8.8x\n", 1717 net_dev->name, sr32(isr)); 1718 1719 spin_unlock (&sis_priv->lock); 1720 return IRQ_RETVAL(handled); 1721 } 1722 1723 /** 1724 * sis900_rx - sis900 receive routine 1725 * @net_dev: the net device which receives data 1726 * 1727 * Process receive interrupt events, 1728 * put buffer to higher layer and refill buffer pool 1729 * Note: This function is called by interrupt handler, 1730 * don't do "too much" work here 1731 */ 1732 1733 static int sis900_rx(struct net_device *net_dev) 1734 { 1735 struct sis900_private *sis_priv = netdev_priv(net_dev); 1736 void __iomem *ioaddr = sis_priv->ioaddr; 1737 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1738 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1739 int rx_work_limit; 1740 1741 if (netif_msg_rx_status(sis_priv)) 1742 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1743 "status:0x%8.8x\n", 1744 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1745 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1746 1747 while (rx_status & OWN) { 1748 unsigned int rx_size; 1749 unsigned int data_size; 1750 1751 if (--rx_work_limit < 0) 1752 break; 1753 1754 data_size = rx_status & DSIZE; 1755 rx_size = data_size - CRC_SIZE; 1756 1757 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1758 /* ``TOOLONG'' flag means jumbo packet received. */ 1759 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1760 rx_status &= (~ ((unsigned int)TOOLONG)); 1761 #endif 1762 1763 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1764 /* corrupted packet received */ 1765 if (netif_msg_rx_err(sis_priv)) 1766 printk(KERN_DEBUG "%s: Corrupted packet " 1767 "received, buffer status = 0x%8.8x/%d.\n", 1768 net_dev->name, rx_status, data_size); 1769 net_dev->stats.rx_errors++; 1770 if (rx_status & OVERRUN) 1771 net_dev->stats.rx_over_errors++; 1772 if (rx_status & (TOOLONG|RUNT)) 1773 net_dev->stats.rx_length_errors++; 1774 if (rx_status & (RXISERR | FAERR)) 1775 net_dev->stats.rx_frame_errors++; 1776 if (rx_status & CRCERR) 1777 net_dev->stats.rx_crc_errors++; 1778 /* reset buffer descriptor state */ 1779 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1780 } else { 1781 struct sk_buff * skb; 1782 struct sk_buff * rx_skb; 1783 1784 dma_unmap_single(&sis_priv->pci_dev->dev, 1785 sis_priv->rx_ring[entry].bufptr, 1786 RX_BUF_SIZE, DMA_FROM_DEVICE); 1787 1788 /* refill the Rx buffer, what if there is not enough 1789 * memory for new socket buffer ?? */ 1790 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1791 /* 1792 * Not enough memory to refill the buffer 1793 * so we need to recycle the old one so 1794 * as to avoid creating a memory hole 1795 * in the rx ring 1796 */ 1797 skb = sis_priv->rx_skbuff[entry]; 1798 net_dev->stats.rx_dropped++; 1799 goto refill_rx_ring; 1800 } 1801 1802 /* This situation should never happen, but due to 1803 some unknown bugs, it is possible that 1804 we are working on NULL sk_buff :-( */ 1805 if (sis_priv->rx_skbuff[entry] == NULL) { 1806 if (netif_msg_rx_err(sis_priv)) 1807 printk(KERN_WARNING "%s: NULL pointer " 1808 "encountered in Rx ring\n" 1809 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1810 net_dev->name, sis_priv->cur_rx, 1811 sis_priv->dirty_rx); 1812 dev_kfree_skb(skb); 1813 break; 1814 } 1815 1816 /* give the socket buffer to upper layers */ 1817 rx_skb = sis_priv->rx_skbuff[entry]; 1818 skb_put(rx_skb, rx_size); 1819 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1820 netif_rx(rx_skb); 1821 1822 /* some network statistics */ 1823 if ((rx_status & BCAST) == MCAST) 1824 net_dev->stats.multicast++; 1825 net_dev->stats.rx_bytes += rx_size; 1826 net_dev->stats.rx_packets++; 1827 sis_priv->dirty_rx++; 1828 refill_rx_ring: 1829 sis_priv->rx_skbuff[entry] = skb; 1830 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1831 sis_priv->rx_ring[entry].bufptr = 1832 dma_map_single(&sis_priv->pci_dev->dev, 1833 skb->data, RX_BUF_SIZE, 1834 DMA_FROM_DEVICE); 1835 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1836 sis_priv->rx_ring[entry].bufptr))) { 1837 dev_kfree_skb_irq(skb); 1838 sis_priv->rx_skbuff[entry] = NULL; 1839 break; 1840 } 1841 } 1842 sis_priv->cur_rx++; 1843 entry = sis_priv->cur_rx % NUM_RX_DESC; 1844 rx_status = sis_priv->rx_ring[entry].cmdsts; 1845 } // while 1846 1847 /* refill the Rx buffer, what if the rate of refilling is slower 1848 * than consuming ?? */ 1849 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1850 struct sk_buff *skb; 1851 1852 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1853 1854 if (sis_priv->rx_skbuff[entry] == NULL) { 1855 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE); 1856 if (skb == NULL) { 1857 /* not enough memory for skbuff, this makes a 1858 * "hole" on the buffer ring, it is not clear 1859 * how the hardware will react to this kind 1860 * of degenerated buffer */ 1861 net_dev->stats.rx_dropped++; 1862 break; 1863 } 1864 sis_priv->rx_skbuff[entry] = skb; 1865 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1866 sis_priv->rx_ring[entry].bufptr = 1867 dma_map_single(&sis_priv->pci_dev->dev, 1868 skb->data, RX_BUF_SIZE, 1869 DMA_FROM_DEVICE); 1870 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1871 sis_priv->rx_ring[entry].bufptr))) { 1872 dev_kfree_skb_irq(skb); 1873 sis_priv->rx_skbuff[entry] = NULL; 1874 break; 1875 } 1876 } 1877 } 1878 /* re-enable the potentially idle receive state matchine */ 1879 sw32(cr , RxENA | sr32(cr)); 1880 1881 return 0; 1882 } 1883 1884 /** 1885 * sis900_finish_xmit - finish up transmission of packets 1886 * @net_dev: the net device to be transmitted on 1887 * 1888 * Check for error condition and free socket buffer etc 1889 * schedule for more transmission as needed 1890 * Note: This function is called by interrupt handler, 1891 * don't do "too much" work here 1892 */ 1893 1894 static void sis900_finish_xmit (struct net_device *net_dev) 1895 { 1896 struct sis900_private *sis_priv = netdev_priv(net_dev); 1897 1898 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1899 struct sk_buff *skb; 1900 unsigned int entry; 1901 u32 tx_status; 1902 1903 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1904 tx_status = sis_priv->tx_ring[entry].cmdsts; 1905 1906 if (tx_status & OWN) { 1907 /* The packet is not transmitted yet (owned by hardware) ! 1908 * Note: this is an almost impossible condition 1909 * on TxDESC interrupt ('descriptor interrupt') */ 1910 break; 1911 } 1912 1913 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1914 /* packet unsuccessfully transmitted */ 1915 if (netif_msg_tx_err(sis_priv)) 1916 printk(KERN_DEBUG "%s: Transmit " 1917 "error, Tx status %8.8x.\n", 1918 net_dev->name, tx_status); 1919 net_dev->stats.tx_errors++; 1920 if (tx_status & UNDERRUN) 1921 net_dev->stats.tx_fifo_errors++; 1922 if (tx_status & ABORT) 1923 net_dev->stats.tx_aborted_errors++; 1924 if (tx_status & NOCARRIER) 1925 net_dev->stats.tx_carrier_errors++; 1926 if (tx_status & OWCOLL) 1927 net_dev->stats.tx_window_errors++; 1928 } else { 1929 /* packet successfully transmitted */ 1930 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1931 net_dev->stats.tx_bytes += tx_status & DSIZE; 1932 net_dev->stats.tx_packets++; 1933 } 1934 /* Free the original skb. */ 1935 skb = sis_priv->tx_skbuff[entry]; 1936 dma_unmap_single(&sis_priv->pci_dev->dev, 1937 sis_priv->tx_ring[entry].bufptr, skb->len, 1938 DMA_TO_DEVICE); 1939 dev_consume_skb_irq(skb); 1940 sis_priv->tx_skbuff[entry] = NULL; 1941 sis_priv->tx_ring[entry].bufptr = 0; 1942 sis_priv->tx_ring[entry].cmdsts = 0; 1943 } 1944 1945 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1946 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1947 /* The ring is no longer full, clear tx_full and schedule 1948 * more transmission by netif_wake_queue(net_dev) */ 1949 sis_priv->tx_full = 0; 1950 netif_wake_queue (net_dev); 1951 } 1952 } 1953 1954 /** 1955 * sis900_close - close sis900 device 1956 * @net_dev: the net device to be closed 1957 * 1958 * Disable interrupts, stop the Tx and Rx Status Machine 1959 * free Tx and RX socket buffer 1960 */ 1961 1962 static int sis900_close(struct net_device *net_dev) 1963 { 1964 struct sis900_private *sis_priv = netdev_priv(net_dev); 1965 struct pci_dev *pdev = sis_priv->pci_dev; 1966 void __iomem *ioaddr = sis_priv->ioaddr; 1967 struct sk_buff *skb; 1968 int i; 1969 1970 netif_stop_queue(net_dev); 1971 1972 /* Disable interrupts by clearing the interrupt mask. */ 1973 sw32(imr, 0x0000); 1974 sw32(ier, 0x0000); 1975 1976 /* Stop the chip's Tx and Rx Status Machine */ 1977 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1978 1979 del_timer(&sis_priv->timer); 1980 1981 free_irq(pdev->irq, net_dev); 1982 1983 /* Free Tx and RX skbuff */ 1984 for (i = 0; i < NUM_RX_DESC; i++) { 1985 skb = sis_priv->rx_skbuff[i]; 1986 if (skb) { 1987 dma_unmap_single(&pdev->dev, 1988 sis_priv->rx_ring[i].bufptr, 1989 RX_BUF_SIZE, DMA_FROM_DEVICE); 1990 dev_kfree_skb(skb); 1991 sis_priv->rx_skbuff[i] = NULL; 1992 } 1993 } 1994 for (i = 0; i < NUM_TX_DESC; i++) { 1995 skb = sis_priv->tx_skbuff[i]; 1996 if (skb) { 1997 dma_unmap_single(&pdev->dev, 1998 sis_priv->tx_ring[i].bufptr, 1999 skb->len, DMA_TO_DEVICE); 2000 dev_kfree_skb(skb); 2001 sis_priv->tx_skbuff[i] = NULL; 2002 } 2003 } 2004 2005 /* Green! Put the chip in low-power mode. */ 2006 2007 return 0; 2008 } 2009 2010 /** 2011 * sis900_get_drvinfo - Return information about driver 2012 * @net_dev: the net device to probe 2013 * @info: container for info returned 2014 * 2015 * Process ethtool command such as "ehtool -i" to show information 2016 */ 2017 2018 static void sis900_get_drvinfo(struct net_device *net_dev, 2019 struct ethtool_drvinfo *info) 2020 { 2021 struct sis900_private *sis_priv = netdev_priv(net_dev); 2022 2023 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2024 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2025 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev), 2026 sizeof(info->bus_info)); 2027 } 2028 2029 static u32 sis900_get_msglevel(struct net_device *net_dev) 2030 { 2031 struct sis900_private *sis_priv = netdev_priv(net_dev); 2032 return sis_priv->msg_enable; 2033 } 2034 2035 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2036 { 2037 struct sis900_private *sis_priv = netdev_priv(net_dev); 2038 sis_priv->msg_enable = value; 2039 } 2040 2041 static u32 sis900_get_link(struct net_device *net_dev) 2042 { 2043 struct sis900_private *sis_priv = netdev_priv(net_dev); 2044 return mii_link_ok(&sis_priv->mii_info); 2045 } 2046 2047 static int sis900_get_link_ksettings(struct net_device *net_dev, 2048 struct ethtool_link_ksettings *cmd) 2049 { 2050 struct sis900_private *sis_priv = netdev_priv(net_dev); 2051 spin_lock_irq(&sis_priv->lock); 2052 mii_ethtool_get_link_ksettings(&sis_priv->mii_info, cmd); 2053 spin_unlock_irq(&sis_priv->lock); 2054 return 0; 2055 } 2056 2057 static int sis900_set_link_ksettings(struct net_device *net_dev, 2058 const struct ethtool_link_ksettings *cmd) 2059 { 2060 struct sis900_private *sis_priv = netdev_priv(net_dev); 2061 int rt; 2062 spin_lock_irq(&sis_priv->lock); 2063 rt = mii_ethtool_set_link_ksettings(&sis_priv->mii_info, cmd); 2064 spin_unlock_irq(&sis_priv->lock); 2065 return rt; 2066 } 2067 2068 static int sis900_nway_reset(struct net_device *net_dev) 2069 { 2070 struct sis900_private *sis_priv = netdev_priv(net_dev); 2071 return mii_nway_restart(&sis_priv->mii_info); 2072 } 2073 2074 /** 2075 * sis900_set_wol - Set up Wake on Lan registers 2076 * @net_dev: the net device to probe 2077 * @wol: container for info passed to the driver 2078 * 2079 * Process ethtool command "wol" to setup wake on lan features. 2080 * SiS900 supports sending WoL events if a correct packet is received, 2081 * but there is no simple way to filter them to only a subset (broadcast, 2082 * multicast, unicast or arp). 2083 */ 2084 2085 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2086 { 2087 struct sis900_private *sis_priv = netdev_priv(net_dev); 2088 void __iomem *ioaddr = sis_priv->ioaddr; 2089 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2090 2091 if (wol->wolopts == 0) { 2092 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2093 cfgpmcsr &= ~PME_EN; 2094 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2095 sw32(pmctrl, pmctrl_bits); 2096 if (netif_msg_wol(sis_priv)) 2097 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2098 return 0; 2099 } 2100 2101 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2102 | WAKE_BCAST | WAKE_ARP)) 2103 return -EINVAL; 2104 2105 if (wol->wolopts & WAKE_MAGIC) 2106 pmctrl_bits |= MAGICPKT; 2107 if (wol->wolopts & WAKE_PHY) 2108 pmctrl_bits |= LINKON; 2109 2110 sw32(pmctrl, pmctrl_bits); 2111 2112 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2113 cfgpmcsr |= PME_EN; 2114 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2115 if (netif_msg_wol(sis_priv)) 2116 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2117 2118 return 0; 2119 } 2120 2121 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2122 { 2123 struct sis900_private *sp = netdev_priv(net_dev); 2124 void __iomem *ioaddr = sp->ioaddr; 2125 u32 pmctrl_bits; 2126 2127 pmctrl_bits = sr32(pmctrl); 2128 if (pmctrl_bits & MAGICPKT) 2129 wol->wolopts |= WAKE_MAGIC; 2130 if (pmctrl_bits & LINKON) 2131 wol->wolopts |= WAKE_PHY; 2132 2133 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2134 } 2135 2136 static int sis900_get_eeprom_len(struct net_device *dev) 2137 { 2138 struct sis900_private *sis_priv = netdev_priv(dev); 2139 2140 return sis_priv->eeprom_size; 2141 } 2142 2143 static int sis900_read_eeprom(struct net_device *net_dev, u8 *buf) 2144 { 2145 struct sis900_private *sis_priv = netdev_priv(net_dev); 2146 void __iomem *ioaddr = sis_priv->ioaddr; 2147 int wait, ret = -EAGAIN; 2148 u16 signature; 2149 u16 *ebuf = (u16 *)buf; 2150 int i; 2151 2152 if (sis_priv->chipset_rev == SIS96x_900_REV) { 2153 sw32(mear, EEREQ); 2154 for (wait = 0; wait < 2000; wait++) { 2155 if (sr32(mear) & EEGNT) { 2156 /* read 16 bits, and index by 16 bits */ 2157 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2158 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2159 ret = 0; 2160 break; 2161 } 2162 udelay(1); 2163 } 2164 sw32(mear, EEDONE); 2165 } else { 2166 signature = (u16)read_eeprom(ioaddr, EEPROMSignature); 2167 if (signature != 0xffff && signature != 0x0000) { 2168 /* read 16 bits, and index by 16 bits */ 2169 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2170 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2171 ret = 0; 2172 } 2173 } 2174 return ret; 2175 } 2176 2177 #define SIS900_EEPROM_MAGIC 0xBABE 2178 static int sis900_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 2179 { 2180 struct sis900_private *sis_priv = netdev_priv(dev); 2181 u8 *eebuf; 2182 int res; 2183 2184 eebuf = kmalloc(sis_priv->eeprom_size, GFP_KERNEL); 2185 if (!eebuf) 2186 return -ENOMEM; 2187 2188 eeprom->magic = SIS900_EEPROM_MAGIC; 2189 spin_lock_irq(&sis_priv->lock); 2190 res = sis900_read_eeprom(dev, eebuf); 2191 spin_unlock_irq(&sis_priv->lock); 2192 if (!res) 2193 memcpy(data, eebuf + eeprom->offset, eeprom->len); 2194 kfree(eebuf); 2195 return res; 2196 } 2197 2198 static const struct ethtool_ops sis900_ethtool_ops = { 2199 .get_drvinfo = sis900_get_drvinfo, 2200 .get_msglevel = sis900_get_msglevel, 2201 .set_msglevel = sis900_set_msglevel, 2202 .get_link = sis900_get_link, 2203 .nway_reset = sis900_nway_reset, 2204 .get_wol = sis900_get_wol, 2205 .set_wol = sis900_set_wol, 2206 .get_link_ksettings = sis900_get_link_ksettings, 2207 .set_link_ksettings = sis900_set_link_ksettings, 2208 .get_eeprom_len = sis900_get_eeprom_len, 2209 .get_eeprom = sis900_get_eeprom, 2210 }; 2211 2212 /** 2213 * mii_ioctl - process MII i/o control command 2214 * @net_dev: the net device to command for 2215 * @rq: parameter for command 2216 * @cmd: the i/o command 2217 * 2218 * Process MII command like read/write MII register 2219 */ 2220 2221 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2222 { 2223 struct sis900_private *sis_priv = netdev_priv(net_dev); 2224 struct mii_ioctl_data *data = if_mii(rq); 2225 2226 switch(cmd) { 2227 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2228 data->phy_id = sis_priv->mii->phy_addr; 2229 fallthrough; 2230 2231 case SIOCGMIIREG: /* Read MII PHY register. */ 2232 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2233 return 0; 2234 2235 case SIOCSMIIREG: /* Write MII PHY register. */ 2236 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2237 return 0; 2238 default: 2239 return -EOPNOTSUPP; 2240 } 2241 } 2242 2243 /** 2244 * sis900_set_config - Set media type by net_device.set_config 2245 * @dev: the net device for media type change 2246 * @map: ifmap passed by ifconfig 2247 * 2248 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2249 * we support only port changes. All other runtime configuration 2250 * changes will be ignored 2251 */ 2252 2253 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2254 { 2255 struct sis900_private *sis_priv = netdev_priv(dev); 2256 struct mii_phy *mii_phy = sis_priv->mii; 2257 2258 u16 status; 2259 2260 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2261 /* we switch on the ifmap->port field. I couldn't find anything 2262 * like a definition or standard for the values of that field. 2263 * I think the meaning of those values is device specific. But 2264 * since I would like to change the media type via the ifconfig 2265 * command I use the definition from linux/netdevice.h 2266 * (which seems to be different from the ifport(pcmcia) definition) */ 2267 switch(map->port){ 2268 case IF_PORT_UNKNOWN: /* use auto here */ 2269 dev->if_port = map->port; 2270 /* we are going to change the media type, so the Link 2271 * will be temporary down and we need to reflect that 2272 * here. When the Link comes up again, it will be 2273 * sensed by the sis_timer procedure, which also does 2274 * all the rest for us */ 2275 netif_carrier_off(dev); 2276 2277 /* read current state */ 2278 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2279 2280 /* enable auto negotiation and reset the negotioation 2281 * (I don't really know what the auto negatiotiation 2282 * reset really means, but it sounds for me right to 2283 * do one here) */ 2284 mdio_write(dev, mii_phy->phy_addr, 2285 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2286 2287 break; 2288 2289 case IF_PORT_10BASET: /* 10BaseT */ 2290 dev->if_port = map->port; 2291 2292 /* we are going to change the media type, so the Link 2293 * will be temporary down and we need to reflect that 2294 * here. When the Link comes up again, it will be 2295 * sensed by the sis_timer procedure, which also does 2296 * all the rest for us */ 2297 netif_carrier_off(dev); 2298 2299 /* set Speed to 10Mbps */ 2300 /* read current state */ 2301 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2302 2303 /* disable auto negotiation and force 10MBit mode*/ 2304 mdio_write(dev, mii_phy->phy_addr, 2305 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2306 MII_CNTL_AUTO)); 2307 break; 2308 2309 case IF_PORT_100BASET: /* 100BaseT */ 2310 case IF_PORT_100BASETX: /* 100BaseTx */ 2311 dev->if_port = map->port; 2312 2313 /* we are going to change the media type, so the Link 2314 * will be temporary down and we need to reflect that 2315 * here. When the Link comes up again, it will be 2316 * sensed by the sis_timer procedure, which also does 2317 * all the rest for us */ 2318 netif_carrier_off(dev); 2319 2320 /* set Speed to 100Mbps */ 2321 /* disable auto negotiation and enable 100MBit Mode */ 2322 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2323 mdio_write(dev, mii_phy->phy_addr, 2324 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2325 MII_CNTL_SPEED); 2326 2327 break; 2328 2329 case IF_PORT_10BASE2: /* 10Base2 */ 2330 case IF_PORT_AUI: /* AUI */ 2331 case IF_PORT_100BASEFX: /* 100BaseFx */ 2332 /* These Modes are not supported (are they?)*/ 2333 return -EOPNOTSUPP; 2334 2335 default: 2336 return -EINVAL; 2337 } 2338 } 2339 return 0; 2340 } 2341 2342 /** 2343 * sis900_mcast_bitnr - compute hashtable index 2344 * @addr: multicast address 2345 * @revision: revision id of chip 2346 * 2347 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2348 * hash table, which makes this function a little bit different from other drivers 2349 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2350 * multicast hash table. 2351 */ 2352 2353 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2354 { 2355 2356 u32 crc = ether_crc(6, addr); 2357 2358 /* leave 8 or 7 most siginifant bits */ 2359 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2360 return (int)(crc >> 24); 2361 else 2362 return (int)(crc >> 25); 2363 } 2364 2365 /** 2366 * set_rx_mode - Set SiS900 receive mode 2367 * @net_dev: the net device to be set 2368 * 2369 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2370 * And set the appropriate multicast filter. 2371 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2372 */ 2373 2374 static void set_rx_mode(struct net_device *net_dev) 2375 { 2376 struct sis900_private *sis_priv = netdev_priv(net_dev); 2377 void __iomem *ioaddr = sis_priv->ioaddr; 2378 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2379 int i, table_entries; 2380 u32 rx_mode; 2381 2382 /* 635 Hash Table entries = 256(2^16) */ 2383 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2384 (sis_priv->chipset_rev == SIS900B_900_REV)) 2385 table_entries = 16; 2386 else 2387 table_entries = 8; 2388 2389 if (net_dev->flags & IFF_PROMISC) { 2390 /* Accept any kinds of packets */ 2391 rx_mode = RFPromiscuous; 2392 for (i = 0; i < table_entries; i++) 2393 mc_filter[i] = 0xffff; 2394 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2395 (net_dev->flags & IFF_ALLMULTI)) { 2396 /* too many multicast addresses or accept all multicast packet */ 2397 rx_mode = RFAAB | RFAAM; 2398 for (i = 0; i < table_entries; i++) 2399 mc_filter[i] = 0xffff; 2400 } else { 2401 /* Accept Broadcast packet, destination address matchs our 2402 * MAC address, use Receive Filter to reject unwanted MCAST 2403 * packets */ 2404 struct netdev_hw_addr *ha; 2405 rx_mode = RFAAB; 2406 2407 netdev_for_each_mc_addr(ha, net_dev) { 2408 unsigned int bit_nr; 2409 2410 bit_nr = sis900_mcast_bitnr(ha->addr, 2411 sis_priv->chipset_rev); 2412 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2413 } 2414 } 2415 2416 /* update Multicast Hash Table in Receive Filter */ 2417 for (i = 0; i < table_entries; i++) { 2418 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2419 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2420 sw32(rfdr, mc_filter[i]); 2421 } 2422 2423 sw32(rfcr, RFEN | rx_mode); 2424 2425 /* sis900 is capable of looping back packets at MAC level for 2426 * debugging purpose */ 2427 if (net_dev->flags & IFF_LOOPBACK) { 2428 u32 cr_saved; 2429 /* We must disable Tx/Rx before setting loopback mode */ 2430 cr_saved = sr32(cr); 2431 sw32(cr, cr_saved | TxDIS | RxDIS); 2432 /* enable loopback */ 2433 sw32(txcfg, sr32(txcfg) | TxMLB); 2434 sw32(rxcfg, sr32(rxcfg) | RxATX); 2435 /* restore cr */ 2436 sw32(cr, cr_saved); 2437 } 2438 } 2439 2440 /** 2441 * sis900_reset - Reset sis900 MAC 2442 * @net_dev: the net device to reset 2443 * 2444 * reset sis900 MAC and wait until finished 2445 * reset through command register 2446 * change backoff algorithm for 900B0 & 635 M/B 2447 */ 2448 2449 static void sis900_reset(struct net_device *net_dev) 2450 { 2451 struct sis900_private *sis_priv = netdev_priv(net_dev); 2452 void __iomem *ioaddr = sis_priv->ioaddr; 2453 u32 status = TxRCMP | RxRCMP; 2454 int i; 2455 2456 sw32(ier, 0); 2457 sw32(imr, 0); 2458 sw32(rfcr, 0); 2459 2460 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2461 2462 /* Check that the chip has finished the reset. */ 2463 for (i = 0; status && (i < 1000); i++) 2464 status ^= sr32(isr) & status; 2465 2466 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2467 sis_priv->chipset_rev == SIS900B_900_REV) 2468 sw32(cfg, PESEL | RND_CNT); 2469 else 2470 sw32(cfg, PESEL); 2471 } 2472 2473 /** 2474 * sis900_remove - Remove sis900 device 2475 * @pci_dev: the pci device to be removed 2476 * 2477 * remove and release SiS900 net device 2478 */ 2479 2480 static void sis900_remove(struct pci_dev *pci_dev) 2481 { 2482 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2483 struct sis900_private *sis_priv = netdev_priv(net_dev); 2484 2485 unregister_netdev(net_dev); 2486 2487 while (sis_priv->first_mii) { 2488 struct mii_phy *phy = sis_priv->first_mii; 2489 2490 sis_priv->first_mii = phy->next; 2491 kfree(phy); 2492 } 2493 2494 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2495 sis_priv->rx_ring_dma); 2496 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2497 sis_priv->tx_ring_dma); 2498 pci_iounmap(pci_dev, sis_priv->ioaddr); 2499 free_netdev(net_dev); 2500 } 2501 2502 static int __maybe_unused sis900_suspend(struct device *dev) 2503 { 2504 struct net_device *net_dev = dev_get_drvdata(dev); 2505 struct sis900_private *sis_priv = netdev_priv(net_dev); 2506 void __iomem *ioaddr = sis_priv->ioaddr; 2507 2508 if(!netif_running(net_dev)) 2509 return 0; 2510 2511 netif_stop_queue(net_dev); 2512 netif_device_detach(net_dev); 2513 2514 /* Stop the chip's Tx and Rx Status Machine */ 2515 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2516 2517 return 0; 2518 } 2519 2520 static int __maybe_unused sis900_resume(struct device *dev) 2521 { 2522 struct net_device *net_dev = dev_get_drvdata(dev); 2523 struct sis900_private *sis_priv = netdev_priv(net_dev); 2524 void __iomem *ioaddr = sis_priv->ioaddr; 2525 2526 if(!netif_running(net_dev)) 2527 return 0; 2528 2529 sis900_init_rxfilter(net_dev); 2530 2531 sis900_init_tx_ring(net_dev); 2532 sis900_init_rx_ring(net_dev); 2533 2534 set_rx_mode(net_dev); 2535 2536 netif_device_attach(net_dev); 2537 netif_start_queue(net_dev); 2538 2539 /* Workaround for EDB */ 2540 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2541 2542 /* Enable all known interrupts by setting the interrupt mask. */ 2543 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 2544 sw32(cr, RxENA | sr32(cr)); 2545 sw32(ier, IE); 2546 2547 sis900_check_mode(net_dev, sis_priv->mii); 2548 2549 return 0; 2550 } 2551 2552 static SIMPLE_DEV_PM_OPS(sis900_pm_ops, sis900_suspend, sis900_resume); 2553 2554 static struct pci_driver sis900_pci_driver = { 2555 .name = SIS900_MODULE_NAME, 2556 .id_table = sis900_pci_tbl, 2557 .probe = sis900_probe, 2558 .remove = sis900_remove, 2559 .driver.pm = &sis900_pm_ops, 2560 }; 2561 2562 static int __init sis900_init_module(void) 2563 { 2564 /* when a module, this is printed whether or not devices are found in probe */ 2565 #ifdef MODULE 2566 printk(version); 2567 #endif 2568 2569 return pci_register_driver(&sis900_pci_driver); 2570 } 2571 2572 static void __exit sis900_cleanup_module(void) 2573 { 2574 pci_unregister_driver(&sis900_pci_driver); 2575 } 2576 2577 module_init(sis900_init_module); 2578 module_exit(sis900_cleanup_module); 2579 2580