1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <asm/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = { 110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 114 {0,} 115 }; 116 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 117 118 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 119 120 static const struct mii_chip_info { 121 const char * name; 122 u16 phy_id0; 123 u16 phy_id1; 124 u8 phy_types; 125 #define HOME 0x0001 126 #define LAN 0x0002 127 #define MIX 0x0003 128 #define UNKNOWN 0x0 129 } mii_chip_table[] = { 130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 137 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 143 {NULL,}, 144 }; 145 146 struct mii_phy { 147 struct mii_phy * next; 148 int phy_addr; 149 u16 phy_id0; 150 u16 phy_id1; 151 u16 status; 152 u8 phy_types; 153 }; 154 155 typedef struct _BufferDesc { 156 u32 link; 157 u32 cmdsts; 158 u32 bufptr; 159 } BufferDesc; 160 161 struct sis900_private { 162 struct pci_dev * pci_dev; 163 164 spinlock_t lock; 165 166 struct mii_phy * mii; 167 struct mii_phy * first_mii; /* record the first mii structure */ 168 unsigned int cur_phy; 169 struct mii_if_info mii_info; 170 171 void __iomem *ioaddr; 172 173 struct timer_list timer; /* Link status detection timer. */ 174 u8 autong_complete; /* 1: auto-negotiate complete */ 175 176 u32 msg_enable; 177 178 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */ 179 unsigned int cur_tx, dirty_tx; 180 181 /* The saved address of a sent/receive-in-place packet buffer */ 182 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 183 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 184 BufferDesc *tx_ring; 185 BufferDesc *rx_ring; 186 187 dma_addr_t tx_ring_dma; 188 dma_addr_t rx_ring_dma; 189 190 unsigned int tx_full; /* The Tx queue is full. */ 191 u8 host_bridge_rev; 192 u8 chipset_rev; 193 }; 194 195 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 196 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 197 MODULE_LICENSE("GPL"); 198 199 module_param(multicast_filter_limit, int, 0444); 200 module_param(max_interrupt_work, int, 0444); 201 module_param(sis900_debug, int, 0444); 202 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 203 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 204 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 205 206 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 207 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 208 #define sr32(reg) ioread32(ioaddr + (reg)) 209 #define sr16(reg) ioread16(ioaddr + (reg)) 210 211 #ifdef CONFIG_NET_POLL_CONTROLLER 212 static void sis900_poll(struct net_device *dev); 213 #endif 214 static int sis900_open(struct net_device *net_dev); 215 static int sis900_mii_probe (struct net_device * net_dev); 216 static void sis900_init_rxfilter (struct net_device * net_dev); 217 static u16 read_eeprom(void __iomem *ioaddr, int location); 218 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 219 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 220 static void sis900_timer(unsigned long data); 221 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 222 static void sis900_tx_timeout(struct net_device *net_dev); 223 static void sis900_init_tx_ring(struct net_device *net_dev); 224 static void sis900_init_rx_ring(struct net_device *net_dev); 225 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 226 struct net_device *net_dev); 227 static int sis900_rx(struct net_device *net_dev); 228 static void sis900_finish_xmit (struct net_device *net_dev); 229 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 230 static int sis900_close(struct net_device *net_dev); 231 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 232 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 233 static void set_rx_mode(struct net_device *net_dev); 234 static void sis900_reset(struct net_device *net_dev); 235 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 236 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 237 static u16 sis900_default_phy(struct net_device * net_dev); 238 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 239 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 240 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 241 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 242 static const struct ethtool_ops sis900_ethtool_ops; 243 244 /** 245 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 246 * @pci_dev: the sis900 pci device 247 * @net_dev: the net device to get address for 248 * 249 * Older SiS900 and friends, use EEPROM to store MAC address. 250 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 251 */ 252 253 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 254 struct net_device *net_dev) 255 { 256 struct sis900_private *sis_priv = netdev_priv(net_dev); 257 void __iomem *ioaddr = sis_priv->ioaddr; 258 u16 signature; 259 int i; 260 261 /* check to see if we have sane EEPROM */ 262 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 263 if (signature == 0xffff || signature == 0x0000) { 264 printk (KERN_WARNING "%s: Error EERPOM read %x\n", 265 pci_name(pci_dev), signature); 266 return 0; 267 } 268 269 /* get MAC address from EEPROM */ 270 for (i = 0; i < 3; i++) 271 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 272 273 return 1; 274 } 275 276 /** 277 * sis630e_get_mac_addr - Get MAC address for SiS630E model 278 * @pci_dev: the sis900 pci device 279 * @net_dev: the net device to get address for 280 * 281 * SiS630E model, use APC CMOS RAM to store MAC address. 282 * APC CMOS RAM is accessed through ISA bridge. 283 * MAC address is read into @net_dev->dev_addr. 284 */ 285 286 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 287 struct net_device *net_dev) 288 { 289 struct pci_dev *isa_bridge = NULL; 290 u8 reg; 291 int i; 292 293 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 294 if (!isa_bridge) 295 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 296 if (!isa_bridge) { 297 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 298 pci_name(pci_dev)); 299 return 0; 300 } 301 pci_read_config_byte(isa_bridge, 0x48, ®); 302 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 303 304 for (i = 0; i < 6; i++) { 305 outb(0x09 + i, 0x70); 306 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 307 } 308 309 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 310 pci_dev_put(isa_bridge); 311 312 return 1; 313 } 314 315 316 /** 317 * sis635_get_mac_addr - Get MAC address for SIS635 model 318 * @pci_dev: the sis900 pci device 319 * @net_dev: the net device to get address for 320 * 321 * SiS635 model, set MAC Reload Bit to load Mac address from APC 322 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 323 * @net_dev->dev_addr. 324 */ 325 326 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 327 struct net_device *net_dev) 328 { 329 struct sis900_private *sis_priv = netdev_priv(net_dev); 330 void __iomem *ioaddr = sis_priv->ioaddr; 331 u32 rfcrSave; 332 u32 i; 333 334 rfcrSave = sr32(rfcr); 335 336 sw32(cr, rfcrSave | RELOAD); 337 sw32(cr, 0); 338 339 /* disable packet filtering before setting filter */ 340 sw32(rfcr, rfcrSave & ~RFEN); 341 342 /* load MAC addr to filter data register */ 343 for (i = 0 ; i < 3 ; i++) { 344 sw32(rfcr, (i << RFADDR_shift)); 345 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr); 346 } 347 348 /* enable packet filtering */ 349 sw32(rfcr, rfcrSave | RFEN); 350 351 return 1; 352 } 353 354 /** 355 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 356 * @pci_dev: the sis900 pci device 357 * @net_dev: the net device to get address for 358 * 359 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 360 * is shared by 361 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first 362 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access 363 * by LAN, otherwise is not. After MAC address is read from EEPROM, send 364 * EEDONE signal to refuse EEPROM access by LAN. 365 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 366 * The signature field in SiS962 or SiS963 spec is meaningless. 367 * MAC address is read into @net_dev->dev_addr. 368 */ 369 370 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 371 struct net_device *net_dev) 372 { 373 struct sis900_private *sis_priv = netdev_priv(net_dev); 374 void __iomem *ioaddr = sis_priv->ioaddr; 375 int wait, rc = 0; 376 377 sw32(mear, EEREQ); 378 for (wait = 0; wait < 2000; wait++) { 379 if (sr32(mear) & EEGNT) { 380 u16 *mac = (u16 *)net_dev->dev_addr; 381 int i; 382 383 /* get MAC address from EEPROM */ 384 for (i = 0; i < 3; i++) 385 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 386 387 rc = 1; 388 break; 389 } 390 udelay(1); 391 } 392 sw32(mear, EEDONE); 393 return rc; 394 } 395 396 static const struct net_device_ops sis900_netdev_ops = { 397 .ndo_open = sis900_open, 398 .ndo_stop = sis900_close, 399 .ndo_start_xmit = sis900_start_xmit, 400 .ndo_set_config = sis900_set_config, 401 .ndo_set_rx_mode = set_rx_mode, 402 .ndo_change_mtu = eth_change_mtu, 403 .ndo_validate_addr = eth_validate_addr, 404 .ndo_set_mac_address = eth_mac_addr, 405 .ndo_do_ioctl = mii_ioctl, 406 .ndo_tx_timeout = sis900_tx_timeout, 407 #ifdef CONFIG_NET_POLL_CONTROLLER 408 .ndo_poll_controller = sis900_poll, 409 #endif 410 }; 411 412 /** 413 * sis900_probe - Probe for sis900 device 414 * @pci_dev: the sis900 pci device 415 * @pci_id: the pci device ID 416 * 417 * Check and probe sis900 net device for @pci_dev. 418 * Get mac address according to the chip revision, 419 * and assign SiS900-specific entries in the device structure. 420 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 421 */ 422 423 static int sis900_probe(struct pci_dev *pci_dev, 424 const struct pci_device_id *pci_id) 425 { 426 struct sis900_private *sis_priv; 427 struct net_device *net_dev; 428 struct pci_dev *dev; 429 dma_addr_t ring_dma; 430 void *ring_space; 431 void __iomem *ioaddr; 432 int i, ret; 433 const char *card_name = card_names[pci_id->driver_data]; 434 const char *dev_name = pci_name(pci_dev); 435 436 /* when built into the kernel, we only print version if device is found */ 437 #ifndef MODULE 438 static int printed_version; 439 if (!printed_version++) 440 printk(version); 441 #endif 442 443 /* setup various bits in PCI command register */ 444 ret = pci_enable_device(pci_dev); 445 if(ret) return ret; 446 447 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 448 if(i){ 449 printk(KERN_ERR "sis900.c: architecture does not support " 450 "32bit PCI busmaster DMA\n"); 451 return i; 452 } 453 454 pci_set_master(pci_dev); 455 456 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 457 if (!net_dev) 458 return -ENOMEM; 459 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 460 461 /* We do a request_region() to register /proc/ioports info. */ 462 ret = pci_request_regions(pci_dev, "sis900"); 463 if (ret) 464 goto err_out; 465 466 /* IO region. */ 467 ioaddr = pci_iomap(pci_dev, 0, 0); 468 if (!ioaddr) { 469 ret = -ENOMEM; 470 goto err_out_cleardev; 471 } 472 473 sis_priv = netdev_priv(net_dev); 474 sis_priv->ioaddr = ioaddr; 475 sis_priv->pci_dev = pci_dev; 476 spin_lock_init(&sis_priv->lock); 477 478 pci_set_drvdata(pci_dev, net_dev); 479 480 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); 481 if (!ring_space) { 482 ret = -ENOMEM; 483 goto err_out_unmap; 484 } 485 sis_priv->tx_ring = ring_space; 486 sis_priv->tx_ring_dma = ring_dma; 487 488 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); 489 if (!ring_space) { 490 ret = -ENOMEM; 491 goto err_unmap_tx; 492 } 493 sis_priv->rx_ring = ring_space; 494 sis_priv->rx_ring_dma = ring_dma; 495 496 /* The SiS900-specific entries in the device structure. */ 497 net_dev->netdev_ops = &sis900_netdev_ops; 498 net_dev->watchdog_timeo = TX_TIMEOUT; 499 net_dev->ethtool_ops = &sis900_ethtool_ops; 500 501 if (sis900_debug > 0) 502 sis_priv->msg_enable = sis900_debug; 503 else 504 sis_priv->msg_enable = SIS900_DEF_MSG; 505 506 sis_priv->mii_info.dev = net_dev; 507 sis_priv->mii_info.mdio_read = mdio_read; 508 sis_priv->mii_info.mdio_write = mdio_write; 509 sis_priv->mii_info.phy_id_mask = 0x1f; 510 sis_priv->mii_info.reg_num_mask = 0x1f; 511 512 /* Get Mac address according to the chip revision */ 513 sis_priv->chipset_rev = pci_dev->revision; 514 if(netif_msg_probe(sis_priv)) 515 printk(KERN_DEBUG "%s: detected revision %2.2x, " 516 "trying to get MAC address...\n", 517 dev_name, sis_priv->chipset_rev); 518 519 ret = 0; 520 if (sis_priv->chipset_rev == SIS630E_900_REV) 521 ret = sis630e_get_mac_addr(pci_dev, net_dev); 522 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 523 ret = sis635_get_mac_addr(pci_dev, net_dev); 524 else if (sis_priv->chipset_rev == SIS96x_900_REV) 525 ret = sis96x_get_mac_addr(pci_dev, net_dev); 526 else 527 ret = sis900_get_mac_addr(pci_dev, net_dev); 528 529 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 530 eth_hw_addr_random(net_dev); 531 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 532 "using random generated one\n", dev_name); 533 } 534 535 /* 630ET : set the mii access mode as software-mode */ 536 if (sis_priv->chipset_rev == SIS630ET_900_REV) 537 sw32(cr, ACCESSMODE | sr32(cr)); 538 539 /* probe for mii transceiver */ 540 if (sis900_mii_probe(net_dev) == 0) { 541 printk(KERN_WARNING "%s: Error probing MII device.\n", 542 dev_name); 543 ret = -ENODEV; 544 goto err_unmap_rx; 545 } 546 547 /* save our host bridge revision */ 548 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 549 if (dev) { 550 sis_priv->host_bridge_rev = dev->revision; 551 pci_dev_put(dev); 552 } 553 554 ret = register_netdev(net_dev); 555 if (ret) 556 goto err_unmap_rx; 557 558 /* print some information about our NIC */ 559 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 560 net_dev->name, card_name, ioaddr, pci_dev->irq, 561 net_dev->dev_addr); 562 563 /* Detect Wake on Lan support */ 564 ret = (sr32(CFGPMC) & PMESP) >> 27; 565 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 566 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 567 568 return 0; 569 570 err_unmap_rx: 571 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 572 sis_priv->rx_ring_dma); 573 err_unmap_tx: 574 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 575 sis_priv->tx_ring_dma); 576 err_out_unmap: 577 pci_iounmap(pci_dev, ioaddr); 578 err_out_cleardev: 579 pci_set_drvdata(pci_dev, NULL); 580 pci_release_regions(pci_dev); 581 err_out: 582 free_netdev(net_dev); 583 return ret; 584 } 585 586 /** 587 * sis900_mii_probe - Probe MII PHY for sis900 588 * @net_dev: the net device to probe for 589 * 590 * Search for total of 32 possible mii phy addresses. 591 * Identify and set current phy if found one, 592 * return error if it failed to found. 593 */ 594 595 static int sis900_mii_probe(struct net_device *net_dev) 596 { 597 struct sis900_private *sis_priv = netdev_priv(net_dev); 598 const char *dev_name = pci_name(sis_priv->pci_dev); 599 u16 poll_bit = MII_STAT_LINK, status = 0; 600 unsigned long timeout = jiffies + 5 * HZ; 601 int phy_addr; 602 603 sis_priv->mii = NULL; 604 605 /* search for total of 32 possible mii phy addresses */ 606 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 607 struct mii_phy * mii_phy = NULL; 608 u16 mii_status; 609 int i; 610 611 mii_phy = NULL; 612 for(i = 0; i < 2; i++) 613 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 614 615 if (mii_status == 0xffff || mii_status == 0x0000) { 616 if (netif_msg_probe(sis_priv)) 617 printk(KERN_DEBUG "%s: MII at address %d" 618 " not accessible\n", 619 dev_name, phy_addr); 620 continue; 621 } 622 623 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 624 mii_phy = sis_priv->first_mii; 625 while (mii_phy) { 626 struct mii_phy *phy; 627 phy = mii_phy; 628 mii_phy = mii_phy->next; 629 kfree(phy); 630 } 631 return 0; 632 } 633 634 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 635 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 636 mii_phy->phy_addr = phy_addr; 637 mii_phy->status = mii_status; 638 mii_phy->next = sis_priv->mii; 639 sis_priv->mii = mii_phy; 640 sis_priv->first_mii = mii_phy; 641 642 for (i = 0; mii_chip_table[i].phy_id1; i++) 643 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 644 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 645 mii_phy->phy_types = mii_chip_table[i].phy_types; 646 if (mii_chip_table[i].phy_types == MIX) 647 mii_phy->phy_types = 648 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 649 printk(KERN_INFO "%s: %s transceiver found " 650 "at address %d.\n", 651 dev_name, 652 mii_chip_table[i].name, 653 phy_addr); 654 break; 655 } 656 657 if( !mii_chip_table[i].phy_id1 ) { 658 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 659 dev_name, phy_addr); 660 mii_phy->phy_types = UNKNOWN; 661 } 662 } 663 664 if (sis_priv->mii == NULL) { 665 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 666 return 0; 667 } 668 669 /* select default PHY for mac */ 670 sis_priv->mii = NULL; 671 sis900_default_phy( net_dev ); 672 673 /* Reset phy if default phy is internal sis900 */ 674 if ((sis_priv->mii->phy_id0 == 0x001D) && 675 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 676 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 677 678 /* workaround for ICS1893 PHY */ 679 if ((sis_priv->mii->phy_id0 == 0x0015) && 680 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 681 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 682 683 if(status & MII_STAT_LINK){ 684 while (poll_bit) { 685 yield(); 686 687 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 688 if (time_after_eq(jiffies, timeout)) { 689 printk(KERN_WARNING "%s: reset phy and link down now\n", 690 dev_name); 691 return -ETIME; 692 } 693 } 694 } 695 696 if (sis_priv->chipset_rev == SIS630E_900_REV) { 697 /* SiS 630E has some bugs on default value of PHY registers */ 698 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 699 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 700 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 701 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 702 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 703 } 704 705 if (sis_priv->mii->status & MII_STAT_LINK) 706 netif_carrier_on(net_dev); 707 else 708 netif_carrier_off(net_dev); 709 710 return 1; 711 } 712 713 /** 714 * sis900_default_phy - Select default PHY for sis900 mac. 715 * @net_dev: the net device to probe for 716 * 717 * Select first detected PHY with link as default. 718 * If no one is link on, select PHY whose types is HOME as default. 719 * If HOME doesn't exist, select LAN. 720 */ 721 722 static u16 sis900_default_phy(struct net_device * net_dev) 723 { 724 struct sis900_private *sis_priv = netdev_priv(net_dev); 725 struct mii_phy *phy = NULL, *phy_home = NULL, 726 *default_phy = NULL, *phy_lan = NULL; 727 u16 status; 728 729 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 730 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 731 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 732 733 /* Link ON & Not select default PHY & not ghost PHY */ 734 if ((status & MII_STAT_LINK) && !default_phy && 735 (phy->phy_types != UNKNOWN)) 736 default_phy = phy; 737 else { 738 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 739 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 740 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 741 if (phy->phy_types == HOME) 742 phy_home = phy; 743 else if(phy->phy_types == LAN) 744 phy_lan = phy; 745 } 746 } 747 748 if (!default_phy && phy_home) 749 default_phy = phy_home; 750 else if (!default_phy && phy_lan) 751 default_phy = phy_lan; 752 else if (!default_phy) 753 default_phy = sis_priv->first_mii; 754 755 if (sis_priv->mii != default_phy) { 756 sis_priv->mii = default_phy; 757 sis_priv->cur_phy = default_phy->phy_addr; 758 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 759 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 760 } 761 762 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 763 764 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 765 status &= (~MII_CNTL_ISOLATE); 766 767 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 768 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 769 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 770 771 return status; 772 } 773 774 775 /** 776 * sis900_set_capability - set the media capability of network adapter. 777 * @net_dev : the net device to probe for 778 * @phy : default PHY 779 * 780 * Set the media capability of network adapter according to 781 * mii status register. It's necessary before auto-negotiate. 782 */ 783 784 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 785 { 786 u16 cap; 787 u16 status; 788 789 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 790 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 791 792 cap = MII_NWAY_CSMA_CD | 793 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 794 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 795 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 796 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 797 798 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 799 } 800 801 802 /* Delay between EEPROM clock transitions. */ 803 #define eeprom_delay() sr32(mear) 804 805 /** 806 * read_eeprom - Read Serial EEPROM 807 * @ioaddr: base i/o address 808 * @location: the EEPROM location to read 809 * 810 * Read Serial EEPROM through EEPROM Access Register. 811 * Note that location is in word (16 bits) unit 812 */ 813 814 static u16 read_eeprom(void __iomem *ioaddr, int location) 815 { 816 u32 read_cmd = location | EEread; 817 int i; 818 u16 retval = 0; 819 820 sw32(mear, 0); 821 eeprom_delay(); 822 sw32(mear, EECS); 823 eeprom_delay(); 824 825 /* Shift the read command (9) bits out. */ 826 for (i = 8; i >= 0; i--) { 827 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 828 829 sw32(mear, dataval); 830 eeprom_delay(); 831 sw32(mear, dataval | EECLK); 832 eeprom_delay(); 833 } 834 sw32(mear, EECS); 835 eeprom_delay(); 836 837 /* read the 16-bits data in */ 838 for (i = 16; i > 0; i--) { 839 sw32(mear, EECS); 840 eeprom_delay(); 841 sw32(mear, EECS | EECLK); 842 eeprom_delay(); 843 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 844 eeprom_delay(); 845 } 846 847 /* Terminate the EEPROM access. */ 848 sw32(mear, 0); 849 eeprom_delay(); 850 851 return retval; 852 } 853 854 /* Read and write the MII management registers using software-generated 855 serial MDIO protocol. Note that the command bits and data bits are 856 send out separately */ 857 #define mdio_delay() sr32(mear) 858 859 static void mdio_idle(struct sis900_private *sp) 860 { 861 void __iomem *ioaddr = sp->ioaddr; 862 863 sw32(mear, MDIO | MDDIR); 864 mdio_delay(); 865 sw32(mear, MDIO | MDDIR | MDC); 866 } 867 868 /* Synchronize the MII management interface by shifting 32 one bits out. */ 869 static void mdio_reset(struct sis900_private *sp) 870 { 871 void __iomem *ioaddr = sp->ioaddr; 872 int i; 873 874 for (i = 31; i >= 0; i--) { 875 sw32(mear, MDDIR | MDIO); 876 mdio_delay(); 877 sw32(mear, MDDIR | MDIO | MDC); 878 mdio_delay(); 879 } 880 } 881 882 /** 883 * mdio_read - read MII PHY register 884 * @net_dev: the net device to read 885 * @phy_id: the phy address to read 886 * @location: the phy regiester id to read 887 * 888 * Read MII registers through MDIO and MDC 889 * using MDIO management frame structure and protocol(defined by ISO/IEC). 890 * Please see SiS7014 or ICS spec 891 */ 892 893 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 894 { 895 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 896 struct sis900_private *sp = netdev_priv(net_dev); 897 void __iomem *ioaddr = sp->ioaddr; 898 u16 retval = 0; 899 int i; 900 901 mdio_reset(sp); 902 mdio_idle(sp); 903 904 for (i = 15; i >= 0; i--) { 905 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 906 907 sw32(mear, dataval); 908 mdio_delay(); 909 sw32(mear, dataval | MDC); 910 mdio_delay(); 911 } 912 913 /* Read the 16 data bits. */ 914 for (i = 16; i > 0; i--) { 915 sw32(mear, 0); 916 mdio_delay(); 917 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 918 sw32(mear, MDC); 919 mdio_delay(); 920 } 921 sw32(mear, 0x00); 922 923 return retval; 924 } 925 926 /** 927 * mdio_write - write MII PHY register 928 * @net_dev: the net device to write 929 * @phy_id: the phy address to write 930 * @location: the phy regiester id to write 931 * @value: the register value to write with 932 * 933 * Write MII registers with @value through MDIO and MDC 934 * using MDIO management frame structure and protocol(defined by ISO/IEC) 935 * please see SiS7014 or ICS spec 936 */ 937 938 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 939 int value) 940 { 941 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 942 struct sis900_private *sp = netdev_priv(net_dev); 943 void __iomem *ioaddr = sp->ioaddr; 944 int i; 945 946 mdio_reset(sp); 947 mdio_idle(sp); 948 949 /* Shift the command bits out. */ 950 for (i = 15; i >= 0; i--) { 951 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 952 953 sw8(mear, dataval); 954 mdio_delay(); 955 sw8(mear, dataval | MDC); 956 mdio_delay(); 957 } 958 mdio_delay(); 959 960 /* Shift the value bits out. */ 961 for (i = 15; i >= 0; i--) { 962 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 963 964 sw32(mear, dataval); 965 mdio_delay(); 966 sw32(mear, dataval | MDC); 967 mdio_delay(); 968 } 969 mdio_delay(); 970 971 /* Clear out extra bits. */ 972 for (i = 2; i > 0; i--) { 973 sw8(mear, 0); 974 mdio_delay(); 975 sw8(mear, MDC); 976 mdio_delay(); 977 } 978 sw32(mear, 0x00); 979 } 980 981 982 /** 983 * sis900_reset_phy - reset sis900 mii phy. 984 * @net_dev: the net device to write 985 * @phy_addr: default phy address 986 * 987 * Some specific phy can't work properly without reset. 988 * This function will be called during initialization and 989 * link status change from ON to DOWN. 990 */ 991 992 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 993 { 994 int i; 995 u16 status; 996 997 for (i = 0; i < 2; i++) 998 status = mdio_read(net_dev, phy_addr, MII_STATUS); 999 1000 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1001 1002 return status; 1003 } 1004 1005 #ifdef CONFIG_NET_POLL_CONTROLLER 1006 /* 1007 * Polling 'interrupt' - used by things like netconsole to send skbs 1008 * without having to re-enable interrupts. It's not called while 1009 * the interrupt routine is executing. 1010 */ 1011 static void sis900_poll(struct net_device *dev) 1012 { 1013 struct sis900_private *sp = netdev_priv(dev); 1014 const int irq = sp->pci_dev->irq; 1015 1016 disable_irq(irq); 1017 sis900_interrupt(irq, dev); 1018 enable_irq(irq); 1019 } 1020 #endif 1021 1022 /** 1023 * sis900_open - open sis900 device 1024 * @net_dev: the net device to open 1025 * 1026 * Do some initialization and start net interface. 1027 * enable interrupts and set sis900 timer. 1028 */ 1029 1030 static int 1031 sis900_open(struct net_device *net_dev) 1032 { 1033 struct sis900_private *sis_priv = netdev_priv(net_dev); 1034 void __iomem *ioaddr = sis_priv->ioaddr; 1035 int ret; 1036 1037 /* Soft reset the chip. */ 1038 sis900_reset(net_dev); 1039 1040 /* Equalizer workaround Rule */ 1041 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1042 1043 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1044 net_dev->name, net_dev); 1045 if (ret) 1046 return ret; 1047 1048 sis900_init_rxfilter(net_dev); 1049 1050 sis900_init_tx_ring(net_dev); 1051 sis900_init_rx_ring(net_dev); 1052 1053 set_rx_mode(net_dev); 1054 1055 netif_start_queue(net_dev); 1056 1057 /* Workaround for EDB */ 1058 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1059 1060 /* Enable all known interrupts by setting the interrupt mask. */ 1061 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 1062 sw32(cr, RxENA | sr32(cr)); 1063 sw32(ier, IE); 1064 1065 sis900_check_mode(net_dev, sis_priv->mii); 1066 1067 /* Set the timer to switch to check for link beat and perhaps switch 1068 to an alternate media type. */ 1069 init_timer(&sis_priv->timer); 1070 sis_priv->timer.expires = jiffies + HZ; 1071 sis_priv->timer.data = (unsigned long)net_dev; 1072 sis_priv->timer.function = sis900_timer; 1073 add_timer(&sis_priv->timer); 1074 1075 return 0; 1076 } 1077 1078 /** 1079 * sis900_init_rxfilter - Initialize the Rx filter 1080 * @net_dev: the net device to initialize for 1081 * 1082 * Set receive filter address to our MAC address 1083 * and enable packet filtering. 1084 */ 1085 1086 static void 1087 sis900_init_rxfilter (struct net_device * net_dev) 1088 { 1089 struct sis900_private *sis_priv = netdev_priv(net_dev); 1090 void __iomem *ioaddr = sis_priv->ioaddr; 1091 u32 rfcrSave; 1092 u32 i; 1093 1094 rfcrSave = sr32(rfcr); 1095 1096 /* disable packet filtering before setting filter */ 1097 sw32(rfcr, rfcrSave & ~RFEN); 1098 1099 /* load MAC addr to filter data register */ 1100 for (i = 0 ; i < 3 ; i++) { 1101 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1102 1103 sw32(rfcr, i << RFADDR_shift); 1104 sw32(rfdr, w); 1105 1106 if (netif_msg_hw(sis_priv)) { 1107 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", 1108 net_dev->name, i, sr32(rfdr)); 1109 } 1110 } 1111 1112 /* enable packet filtering */ 1113 sw32(rfcr, rfcrSave | RFEN); 1114 } 1115 1116 /** 1117 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1118 * @net_dev: the net device to initialize for 1119 * 1120 * Initialize the Tx descriptor ring, 1121 */ 1122 1123 static void 1124 sis900_init_tx_ring(struct net_device *net_dev) 1125 { 1126 struct sis900_private *sis_priv = netdev_priv(net_dev); 1127 void __iomem *ioaddr = sis_priv->ioaddr; 1128 int i; 1129 1130 sis_priv->tx_full = 0; 1131 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1132 1133 for (i = 0; i < NUM_TX_DESC; i++) { 1134 sis_priv->tx_skbuff[i] = NULL; 1135 1136 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1137 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1138 sis_priv->tx_ring[i].cmdsts = 0; 1139 sis_priv->tx_ring[i].bufptr = 0; 1140 } 1141 1142 /* load Transmit Descriptor Register */ 1143 sw32(txdp, sis_priv->tx_ring_dma); 1144 if (netif_msg_hw(sis_priv)) 1145 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1146 net_dev->name, sr32(txdp)); 1147 } 1148 1149 /** 1150 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1151 * @net_dev: the net device to initialize for 1152 * 1153 * Initialize the Rx descriptor ring, 1154 * and pre-allocate recevie buffers (socket buffer) 1155 */ 1156 1157 static void 1158 sis900_init_rx_ring(struct net_device *net_dev) 1159 { 1160 struct sis900_private *sis_priv = netdev_priv(net_dev); 1161 void __iomem *ioaddr = sis_priv->ioaddr; 1162 int i; 1163 1164 sis_priv->cur_rx = 0; 1165 sis_priv->dirty_rx = 0; 1166 1167 /* init RX descriptor */ 1168 for (i = 0; i < NUM_RX_DESC; i++) { 1169 sis_priv->rx_skbuff[i] = NULL; 1170 1171 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1172 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1173 sis_priv->rx_ring[i].cmdsts = 0; 1174 sis_priv->rx_ring[i].bufptr = 0; 1175 } 1176 1177 /* allocate sock buffers */ 1178 for (i = 0; i < NUM_RX_DESC; i++) { 1179 struct sk_buff *skb; 1180 1181 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1182 /* not enough memory for skbuff, this makes a "hole" 1183 on the buffer ring, it is not clear how the 1184 hardware will react to this kind of degenerated 1185 buffer */ 1186 break; 1187 } 1188 sis_priv->rx_skbuff[i] = skb; 1189 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1190 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, 1191 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1192 } 1193 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1194 1195 /* load Receive Descriptor Register */ 1196 sw32(rxdp, sis_priv->rx_ring_dma); 1197 if (netif_msg_hw(sis_priv)) 1198 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1199 net_dev->name, sr32(rxdp)); 1200 } 1201 1202 /** 1203 * sis630_set_eq - set phy equalizer value for 630 LAN 1204 * @net_dev: the net device to set equalizer value 1205 * @revision: 630 LAN revision number 1206 * 1207 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1208 * PHY register 14h(Test) 1209 * Bit 14: 0 -- Automatically detect (default) 1210 * 1 -- Manually set Equalizer filter 1211 * Bit 13: 0 -- (Default) 1212 * 1 -- Speed up convergence of equalizer setting 1213 * Bit 9 : 0 -- (Default) 1214 * 1 -- Disable Baseline Wander 1215 * Bit 3~7 -- Equalizer filter setting 1216 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1217 * Then calculate equalizer value 1218 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1219 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1220 * Calculate Equalizer value: 1221 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1222 * When the equalizer is stable, this value is not a fixed value. It will be within 1223 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1224 * 0 <= max <= 4 --> set equalizer to max 1225 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1226 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1227 */ 1228 1229 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1230 { 1231 struct sis900_private *sis_priv = netdev_priv(net_dev); 1232 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1233 int i, maxcount=10; 1234 1235 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1236 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1237 return; 1238 1239 if (netif_carrier_ok(net_dev)) { 1240 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1241 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1242 (0x2200 | reg14h) & 0xBFFF); 1243 for (i=0; i < maxcount; i++) { 1244 eq_value = (0x00F8 & mdio_read(net_dev, 1245 sis_priv->cur_phy, MII_RESV)) >> 3; 1246 if (i == 0) 1247 max_value=min_value=eq_value; 1248 max_value = (eq_value > max_value) ? 1249 eq_value : max_value; 1250 min_value = (eq_value < min_value) ? 1251 eq_value : min_value; 1252 } 1253 /* 630E rule to determine the equalizer value */ 1254 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1255 revision == SIS630ET_900_REV) { 1256 if (max_value < 5) 1257 eq_value = max_value; 1258 else if (max_value >= 5 && max_value < 15) 1259 eq_value = (max_value == min_value) ? 1260 max_value+2 : max_value+1; 1261 else if (max_value >= 15) 1262 eq_value=(max_value == min_value) ? 1263 max_value+6 : max_value+5; 1264 } 1265 /* 630B0&B1 rule to determine the equalizer value */ 1266 if (revision == SIS630A_900_REV && 1267 (sis_priv->host_bridge_rev == SIS630B0 || 1268 sis_priv->host_bridge_rev == SIS630B1)) { 1269 if (max_value == 0) 1270 eq_value = 3; 1271 else 1272 eq_value = (max_value + min_value + 1)/2; 1273 } 1274 /* write equalizer value and setting */ 1275 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1276 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1277 reg14h = (reg14h | 0x6000) & 0xFDFF; 1278 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1279 } else { 1280 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1281 if (revision == SIS630A_900_REV && 1282 (sis_priv->host_bridge_rev == SIS630B0 || 1283 sis_priv->host_bridge_rev == SIS630B1)) 1284 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1285 (reg14h | 0x2200) & 0xBFFF); 1286 else 1287 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1288 (reg14h | 0x2000) & 0xBFFF); 1289 } 1290 } 1291 1292 /** 1293 * sis900_timer - sis900 timer routine 1294 * @data: pointer to sis900 net device 1295 * 1296 * On each timer ticks we check two things, 1297 * link status (ON/OFF) and link mode (10/100/Full/Half) 1298 */ 1299 1300 static void sis900_timer(unsigned long data) 1301 { 1302 struct net_device *net_dev = (struct net_device *)data; 1303 struct sis900_private *sis_priv = netdev_priv(net_dev); 1304 struct mii_phy *mii_phy = sis_priv->mii; 1305 static const int next_tick = 5*HZ; 1306 u16 status; 1307 1308 if (!sis_priv->autong_complete){ 1309 int uninitialized_var(speed), duplex = 0; 1310 1311 sis900_read_mode(net_dev, &speed, &duplex); 1312 if (duplex){ 1313 sis900_set_mode(sis_priv, speed, duplex); 1314 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1315 netif_start_queue(net_dev); 1316 } 1317 1318 sis_priv->timer.expires = jiffies + HZ; 1319 add_timer(&sis_priv->timer); 1320 return; 1321 } 1322 1323 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1324 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1325 1326 /* Link OFF -> ON */ 1327 if (!netif_carrier_ok(net_dev)) { 1328 LookForLink: 1329 /* Search for new PHY */ 1330 status = sis900_default_phy(net_dev); 1331 mii_phy = sis_priv->mii; 1332 1333 if (status & MII_STAT_LINK){ 1334 sis900_check_mode(net_dev, mii_phy); 1335 netif_carrier_on(net_dev); 1336 } 1337 } else { 1338 /* Link ON -> OFF */ 1339 if (!(status & MII_STAT_LINK)){ 1340 netif_carrier_off(net_dev); 1341 if(netif_msg_link(sis_priv)) 1342 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1343 1344 /* Change mode issue */ 1345 if ((mii_phy->phy_id0 == 0x001D) && 1346 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1347 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1348 1349 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1350 1351 goto LookForLink; 1352 } 1353 } 1354 1355 sis_priv->timer.expires = jiffies + next_tick; 1356 add_timer(&sis_priv->timer); 1357 } 1358 1359 /** 1360 * sis900_check_mode - check the media mode for sis900 1361 * @net_dev: the net device to be checked 1362 * @mii_phy: the mii phy 1363 * 1364 * Older driver gets the media mode from mii status output 1365 * register. Now we set our media capability and auto-negotiate 1366 * to get the upper bound of speed and duplex between two ends. 1367 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1368 * and autong_complete should be set to 1. 1369 */ 1370 1371 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1372 { 1373 struct sis900_private *sis_priv = netdev_priv(net_dev); 1374 void __iomem *ioaddr = sis_priv->ioaddr; 1375 int speed, duplex; 1376 1377 if (mii_phy->phy_types == LAN) { 1378 sw32(cfg, ~EXD & sr32(cfg)); 1379 sis900_set_capability(net_dev , mii_phy); 1380 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1381 } else { 1382 sw32(cfg, EXD | sr32(cfg)); 1383 speed = HW_SPEED_HOME; 1384 duplex = FDX_CAPABLE_HALF_SELECTED; 1385 sis900_set_mode(sis_priv, speed, duplex); 1386 sis_priv->autong_complete = 1; 1387 } 1388 } 1389 1390 /** 1391 * sis900_set_mode - Set the media mode of mac register. 1392 * @sp: the device private data 1393 * @speed : the transmit speed to be determined 1394 * @duplex: the duplex mode to be determined 1395 * 1396 * Set the media mode of mac register txcfg/rxcfg according to 1397 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1398 * bus is used instead of PCI bus. When this bit is set 1, the 1399 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1400 * double words. 1401 */ 1402 1403 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1404 { 1405 void __iomem *ioaddr = sp->ioaddr; 1406 u32 tx_flags = 0, rx_flags = 0; 1407 1408 if (sr32( cfg) & EDB_MASTER_EN) { 1409 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1410 (TX_FILL_THRESH << TxFILLT_shift); 1411 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1412 } else { 1413 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1414 (TX_FILL_THRESH << TxFILLT_shift); 1415 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1416 } 1417 1418 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1419 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1420 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1421 } else { 1422 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1423 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1424 } 1425 1426 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1427 tx_flags |= (TxCSI | TxHBI); 1428 rx_flags |= RxATX; 1429 } 1430 1431 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1432 /* Can accept Jumbo packet */ 1433 rx_flags |= RxAJAB; 1434 #endif 1435 1436 sw32(txcfg, tx_flags); 1437 sw32(rxcfg, rx_flags); 1438 } 1439 1440 /** 1441 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1442 * @net_dev: the net device to read mode for 1443 * @phy_addr: mii phy address 1444 * 1445 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1446 * autong_complete should be set to 0 when starting auto-negotiation. 1447 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1448 * sis900_timer will wait for link on again if autong_complete = 0. 1449 */ 1450 1451 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1452 { 1453 struct sis900_private *sis_priv = netdev_priv(net_dev); 1454 int i = 0; 1455 u32 status; 1456 1457 for (i = 0; i < 2; i++) 1458 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1459 1460 if (!(status & MII_STAT_LINK)){ 1461 if(netif_msg_link(sis_priv)) 1462 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1463 sis_priv->autong_complete = 1; 1464 netif_carrier_off(net_dev); 1465 return; 1466 } 1467 1468 /* (Re)start AutoNegotiate */ 1469 mdio_write(net_dev, phy_addr, MII_CONTROL, 1470 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1471 sis_priv->autong_complete = 0; 1472 } 1473 1474 1475 /** 1476 * sis900_read_mode - read media mode for sis900 internal phy 1477 * @net_dev: the net device to read mode for 1478 * @speed : the transmit speed to be determined 1479 * @duplex : the duplex mode to be determined 1480 * 1481 * The capability of remote end will be put in mii register autorec 1482 * after auto-negotiation. Use AND operation to get the upper bound 1483 * of speed and duplex between two ends. 1484 */ 1485 1486 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1487 { 1488 struct sis900_private *sis_priv = netdev_priv(net_dev); 1489 struct mii_phy *phy = sis_priv->mii; 1490 int phy_addr = sis_priv->cur_phy; 1491 u32 status; 1492 u16 autoadv, autorec; 1493 int i; 1494 1495 for (i = 0; i < 2; i++) 1496 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1497 1498 if (!(status & MII_STAT_LINK)) 1499 return; 1500 1501 /* AutoNegotiate completed */ 1502 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1503 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1504 status = autoadv & autorec; 1505 1506 *speed = HW_SPEED_10_MBPS; 1507 *duplex = FDX_CAPABLE_HALF_SELECTED; 1508 1509 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1510 *speed = HW_SPEED_100_MBPS; 1511 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1512 *duplex = FDX_CAPABLE_FULL_SELECTED; 1513 1514 sis_priv->autong_complete = 1; 1515 1516 /* Workaround for Realtek RTL8201 PHY issue */ 1517 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1518 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1519 *duplex = FDX_CAPABLE_FULL_SELECTED; 1520 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1521 *speed = HW_SPEED_100_MBPS; 1522 } 1523 1524 if(netif_msg_link(sis_priv)) 1525 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1526 net_dev->name, 1527 *speed == HW_SPEED_100_MBPS ? 1528 "100mbps" : "10mbps", 1529 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1530 "full" : "half"); 1531 } 1532 1533 /** 1534 * sis900_tx_timeout - sis900 transmit timeout routine 1535 * @net_dev: the net device to transmit 1536 * 1537 * print transmit timeout status 1538 * disable interrupts and do some tasks 1539 */ 1540 1541 static void sis900_tx_timeout(struct net_device *net_dev) 1542 { 1543 struct sis900_private *sis_priv = netdev_priv(net_dev); 1544 void __iomem *ioaddr = sis_priv->ioaddr; 1545 unsigned long flags; 1546 int i; 1547 1548 if (netif_msg_tx_err(sis_priv)) { 1549 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1550 net_dev->name, sr32(cr), sr32(isr)); 1551 } 1552 1553 /* Disable interrupts by clearing the interrupt mask. */ 1554 sw32(imr, 0x0000); 1555 1556 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1557 spin_lock_irqsave(&sis_priv->lock, flags); 1558 1559 /* discard unsent packets */ 1560 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1561 for (i = 0; i < NUM_TX_DESC; i++) { 1562 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1563 1564 if (skb) { 1565 pci_unmap_single(sis_priv->pci_dev, 1566 sis_priv->tx_ring[i].bufptr, skb->len, 1567 PCI_DMA_TODEVICE); 1568 dev_kfree_skb_irq(skb); 1569 sis_priv->tx_skbuff[i] = NULL; 1570 sis_priv->tx_ring[i].cmdsts = 0; 1571 sis_priv->tx_ring[i].bufptr = 0; 1572 net_dev->stats.tx_dropped++; 1573 } 1574 } 1575 sis_priv->tx_full = 0; 1576 netif_wake_queue(net_dev); 1577 1578 spin_unlock_irqrestore(&sis_priv->lock, flags); 1579 1580 net_dev->trans_start = jiffies; /* prevent tx timeout */ 1581 1582 /* load Transmit Descriptor Register */ 1583 sw32(txdp, sis_priv->tx_ring_dma); 1584 1585 /* Enable all known interrupts by setting the interrupt mask. */ 1586 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 1587 } 1588 1589 /** 1590 * sis900_start_xmit - sis900 start transmit routine 1591 * @skb: socket buffer pointer to put the data being transmitted 1592 * @net_dev: the net device to transmit with 1593 * 1594 * Set the transmit buffer descriptor, 1595 * and write TxENA to enable transmit state machine. 1596 * tell upper layer if the buffer is full 1597 */ 1598 1599 static netdev_tx_t 1600 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1601 { 1602 struct sis900_private *sis_priv = netdev_priv(net_dev); 1603 void __iomem *ioaddr = sis_priv->ioaddr; 1604 unsigned int entry; 1605 unsigned long flags; 1606 unsigned int index_cur_tx, index_dirty_tx; 1607 unsigned int count_dirty_tx; 1608 1609 /* Don't transmit data before the complete of auto-negotiation */ 1610 if(!sis_priv->autong_complete){ 1611 netif_stop_queue(net_dev); 1612 return NETDEV_TX_BUSY; 1613 } 1614 1615 spin_lock_irqsave(&sis_priv->lock, flags); 1616 1617 /* Calculate the next Tx descriptor entry. */ 1618 entry = sis_priv->cur_tx % NUM_TX_DESC; 1619 sis_priv->tx_skbuff[entry] = skb; 1620 1621 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1622 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, 1623 skb->data, skb->len, PCI_DMA_TODEVICE); 1624 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); 1625 sw32(cr, TxENA | sr32(cr)); 1626 1627 sis_priv->cur_tx ++; 1628 index_cur_tx = sis_priv->cur_tx; 1629 index_dirty_tx = sis_priv->dirty_tx; 1630 1631 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1632 count_dirty_tx ++; 1633 1634 if (index_cur_tx == index_dirty_tx) { 1635 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1636 sis_priv->tx_full = 1; 1637 netif_stop_queue(net_dev); 1638 } else if (count_dirty_tx < NUM_TX_DESC) { 1639 /* Typical path, tell upper layer that more transmission is possible */ 1640 netif_start_queue(net_dev); 1641 } else { 1642 /* buffer full, tell upper layer no more transmission */ 1643 sis_priv->tx_full = 1; 1644 netif_stop_queue(net_dev); 1645 } 1646 1647 spin_unlock_irqrestore(&sis_priv->lock, flags); 1648 1649 if (netif_msg_tx_queued(sis_priv)) 1650 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1651 "to slot %d.\n", 1652 net_dev->name, skb->data, (int)skb->len, entry); 1653 1654 return NETDEV_TX_OK; 1655 } 1656 1657 /** 1658 * sis900_interrupt - sis900 interrupt handler 1659 * @irq: the irq number 1660 * @dev_instance: the client data object 1661 * 1662 * The interrupt handler does all of the Rx thread work, 1663 * and cleans up after the Tx thread 1664 */ 1665 1666 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1667 { 1668 struct net_device *net_dev = dev_instance; 1669 struct sis900_private *sis_priv = netdev_priv(net_dev); 1670 int boguscnt = max_interrupt_work; 1671 void __iomem *ioaddr = sis_priv->ioaddr; 1672 u32 status; 1673 unsigned int handled = 0; 1674 1675 spin_lock (&sis_priv->lock); 1676 1677 do { 1678 status = sr32(isr); 1679 1680 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) 1681 /* nothing intresting happened */ 1682 break; 1683 handled = 1; 1684 1685 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1686 if (status & (RxORN | RxERR | RxOK)) 1687 /* Rx interrupt */ 1688 sis900_rx(net_dev); 1689 1690 if (status & (TxURN | TxERR | TxIDLE)) 1691 /* Tx interrupt */ 1692 sis900_finish_xmit(net_dev); 1693 1694 /* something strange happened !!! */ 1695 if (status & HIBERR) { 1696 if(netif_msg_intr(sis_priv)) 1697 printk(KERN_INFO "%s: Abnormal interrupt, " 1698 "status %#8.8x.\n", net_dev->name, status); 1699 break; 1700 } 1701 if (--boguscnt < 0) { 1702 if(netif_msg_intr(sis_priv)) 1703 printk(KERN_INFO "%s: Too much work at interrupt, " 1704 "interrupt status = %#8.8x.\n", 1705 net_dev->name, status); 1706 break; 1707 } 1708 } while (1); 1709 1710 if(netif_msg_intr(sis_priv)) 1711 printk(KERN_DEBUG "%s: exiting interrupt, " 1712 "interrupt status = 0x%#8.8x.\n", 1713 net_dev->name, sr32(isr)); 1714 1715 spin_unlock (&sis_priv->lock); 1716 return IRQ_RETVAL(handled); 1717 } 1718 1719 /** 1720 * sis900_rx - sis900 receive routine 1721 * @net_dev: the net device which receives data 1722 * 1723 * Process receive interrupt events, 1724 * put buffer to higher layer and refill buffer pool 1725 * Note: This function is called by interrupt handler, 1726 * don't do "too much" work here 1727 */ 1728 1729 static int sis900_rx(struct net_device *net_dev) 1730 { 1731 struct sis900_private *sis_priv = netdev_priv(net_dev); 1732 void __iomem *ioaddr = sis_priv->ioaddr; 1733 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1734 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1735 int rx_work_limit; 1736 1737 if (netif_msg_rx_status(sis_priv)) 1738 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1739 "status:0x%8.8x\n", 1740 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1741 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1742 1743 while (rx_status & OWN) { 1744 unsigned int rx_size; 1745 unsigned int data_size; 1746 1747 if (--rx_work_limit < 0) 1748 break; 1749 1750 data_size = rx_status & DSIZE; 1751 rx_size = data_size - CRC_SIZE; 1752 1753 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1754 /* ``TOOLONG'' flag means jumbo packet received. */ 1755 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1756 rx_status &= (~ ((unsigned int)TOOLONG)); 1757 #endif 1758 1759 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1760 /* corrupted packet received */ 1761 if (netif_msg_rx_err(sis_priv)) 1762 printk(KERN_DEBUG "%s: Corrupted packet " 1763 "received, buffer status = 0x%8.8x/%d.\n", 1764 net_dev->name, rx_status, data_size); 1765 net_dev->stats.rx_errors++; 1766 if (rx_status & OVERRUN) 1767 net_dev->stats.rx_over_errors++; 1768 if (rx_status & (TOOLONG|RUNT)) 1769 net_dev->stats.rx_length_errors++; 1770 if (rx_status & (RXISERR | FAERR)) 1771 net_dev->stats.rx_frame_errors++; 1772 if (rx_status & CRCERR) 1773 net_dev->stats.rx_crc_errors++; 1774 /* reset buffer descriptor state */ 1775 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1776 } else { 1777 struct sk_buff * skb; 1778 struct sk_buff * rx_skb; 1779 1780 pci_unmap_single(sis_priv->pci_dev, 1781 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, 1782 PCI_DMA_FROMDEVICE); 1783 1784 /* refill the Rx buffer, what if there is not enough 1785 * memory for new socket buffer ?? */ 1786 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1787 /* 1788 * Not enough memory to refill the buffer 1789 * so we need to recycle the old one so 1790 * as to avoid creating a memory hole 1791 * in the rx ring 1792 */ 1793 skb = sis_priv->rx_skbuff[entry]; 1794 net_dev->stats.rx_dropped++; 1795 goto refill_rx_ring; 1796 } 1797 1798 /* This situation should never happen, but due to 1799 some unknown bugs, it is possible that 1800 we are working on NULL sk_buff :-( */ 1801 if (sis_priv->rx_skbuff[entry] == NULL) { 1802 if (netif_msg_rx_err(sis_priv)) 1803 printk(KERN_WARNING "%s: NULL pointer " 1804 "encountered in Rx ring\n" 1805 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1806 net_dev->name, sis_priv->cur_rx, 1807 sis_priv->dirty_rx); 1808 dev_kfree_skb(skb); 1809 break; 1810 } 1811 1812 /* give the socket buffer to upper layers */ 1813 rx_skb = sis_priv->rx_skbuff[entry]; 1814 skb_put(rx_skb, rx_size); 1815 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1816 netif_rx(rx_skb); 1817 1818 /* some network statistics */ 1819 if ((rx_status & BCAST) == MCAST) 1820 net_dev->stats.multicast++; 1821 net_dev->stats.rx_bytes += rx_size; 1822 net_dev->stats.rx_packets++; 1823 sis_priv->dirty_rx++; 1824 refill_rx_ring: 1825 sis_priv->rx_skbuff[entry] = skb; 1826 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1827 sis_priv->rx_ring[entry].bufptr = 1828 pci_map_single(sis_priv->pci_dev, skb->data, 1829 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1830 } 1831 sis_priv->cur_rx++; 1832 entry = sis_priv->cur_rx % NUM_RX_DESC; 1833 rx_status = sis_priv->rx_ring[entry].cmdsts; 1834 } // while 1835 1836 /* refill the Rx buffer, what if the rate of refilling is slower 1837 * than consuming ?? */ 1838 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1839 struct sk_buff *skb; 1840 1841 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1842 1843 if (sis_priv->rx_skbuff[entry] == NULL) { 1844 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1845 /* not enough memory for skbuff, this makes a 1846 * "hole" on the buffer ring, it is not clear 1847 * how the hardware will react to this kind 1848 * of degenerated buffer */ 1849 if (netif_msg_rx_err(sis_priv)) 1850 printk(KERN_INFO "%s: Memory squeeze, " 1851 "deferring packet.\n", 1852 net_dev->name); 1853 net_dev->stats.rx_dropped++; 1854 break; 1855 } 1856 sis_priv->rx_skbuff[entry] = skb; 1857 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1858 sis_priv->rx_ring[entry].bufptr = 1859 pci_map_single(sis_priv->pci_dev, skb->data, 1860 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1861 } 1862 } 1863 /* re-enable the potentially idle receive state matchine */ 1864 sw32(cr , RxENA | sr32(cr)); 1865 1866 return 0; 1867 } 1868 1869 /** 1870 * sis900_finish_xmit - finish up transmission of packets 1871 * @net_dev: the net device to be transmitted on 1872 * 1873 * Check for error condition and free socket buffer etc 1874 * schedule for more transmission as needed 1875 * Note: This function is called by interrupt handler, 1876 * don't do "too much" work here 1877 */ 1878 1879 static void sis900_finish_xmit (struct net_device *net_dev) 1880 { 1881 struct sis900_private *sis_priv = netdev_priv(net_dev); 1882 1883 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1884 struct sk_buff *skb; 1885 unsigned int entry; 1886 u32 tx_status; 1887 1888 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1889 tx_status = sis_priv->tx_ring[entry].cmdsts; 1890 1891 if (tx_status & OWN) { 1892 /* The packet is not transmitted yet (owned by hardware) ! 1893 * Note: the interrupt is generated only when Tx Machine 1894 * is idle, so this is an almost impossible case */ 1895 break; 1896 } 1897 1898 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1899 /* packet unsuccessfully transmitted */ 1900 if (netif_msg_tx_err(sis_priv)) 1901 printk(KERN_DEBUG "%s: Transmit " 1902 "error, Tx status %8.8x.\n", 1903 net_dev->name, tx_status); 1904 net_dev->stats.tx_errors++; 1905 if (tx_status & UNDERRUN) 1906 net_dev->stats.tx_fifo_errors++; 1907 if (tx_status & ABORT) 1908 net_dev->stats.tx_aborted_errors++; 1909 if (tx_status & NOCARRIER) 1910 net_dev->stats.tx_carrier_errors++; 1911 if (tx_status & OWCOLL) 1912 net_dev->stats.tx_window_errors++; 1913 } else { 1914 /* packet successfully transmitted */ 1915 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1916 net_dev->stats.tx_bytes += tx_status & DSIZE; 1917 net_dev->stats.tx_packets++; 1918 } 1919 /* Free the original skb. */ 1920 skb = sis_priv->tx_skbuff[entry]; 1921 pci_unmap_single(sis_priv->pci_dev, 1922 sis_priv->tx_ring[entry].bufptr, skb->len, 1923 PCI_DMA_TODEVICE); 1924 dev_kfree_skb_irq(skb); 1925 sis_priv->tx_skbuff[entry] = NULL; 1926 sis_priv->tx_ring[entry].bufptr = 0; 1927 sis_priv->tx_ring[entry].cmdsts = 0; 1928 } 1929 1930 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1931 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1932 /* The ring is no longer full, clear tx_full and schedule 1933 * more transmission by netif_wake_queue(net_dev) */ 1934 sis_priv->tx_full = 0; 1935 netif_wake_queue (net_dev); 1936 } 1937 } 1938 1939 /** 1940 * sis900_close - close sis900 device 1941 * @net_dev: the net device to be closed 1942 * 1943 * Disable interrupts, stop the Tx and Rx Status Machine 1944 * free Tx and RX socket buffer 1945 */ 1946 1947 static int sis900_close(struct net_device *net_dev) 1948 { 1949 struct sis900_private *sis_priv = netdev_priv(net_dev); 1950 struct pci_dev *pdev = sis_priv->pci_dev; 1951 void __iomem *ioaddr = sis_priv->ioaddr; 1952 struct sk_buff *skb; 1953 int i; 1954 1955 netif_stop_queue(net_dev); 1956 1957 /* Disable interrupts by clearing the interrupt mask. */ 1958 sw32(imr, 0x0000); 1959 sw32(ier, 0x0000); 1960 1961 /* Stop the chip's Tx and Rx Status Machine */ 1962 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1963 1964 del_timer(&sis_priv->timer); 1965 1966 free_irq(pdev->irq, net_dev); 1967 1968 /* Free Tx and RX skbuff */ 1969 for (i = 0; i < NUM_RX_DESC; i++) { 1970 skb = sis_priv->rx_skbuff[i]; 1971 if (skb) { 1972 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr, 1973 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1974 dev_kfree_skb(skb); 1975 sis_priv->rx_skbuff[i] = NULL; 1976 } 1977 } 1978 for (i = 0; i < NUM_TX_DESC; i++) { 1979 skb = sis_priv->tx_skbuff[i]; 1980 if (skb) { 1981 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr, 1982 skb->len, PCI_DMA_TODEVICE); 1983 dev_kfree_skb(skb); 1984 sis_priv->tx_skbuff[i] = NULL; 1985 } 1986 } 1987 1988 /* Green! Put the chip in low-power mode. */ 1989 1990 return 0; 1991 } 1992 1993 /** 1994 * sis900_get_drvinfo - Return information about driver 1995 * @net_dev: the net device to probe 1996 * @info: container for info returned 1997 * 1998 * Process ethtool command such as "ehtool -i" to show information 1999 */ 2000 2001 static void sis900_get_drvinfo(struct net_device *net_dev, 2002 struct ethtool_drvinfo *info) 2003 { 2004 struct sis900_private *sis_priv = netdev_priv(net_dev); 2005 2006 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2007 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2008 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev), 2009 sizeof(info->bus_info)); 2010 } 2011 2012 static u32 sis900_get_msglevel(struct net_device *net_dev) 2013 { 2014 struct sis900_private *sis_priv = netdev_priv(net_dev); 2015 return sis_priv->msg_enable; 2016 } 2017 2018 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2019 { 2020 struct sis900_private *sis_priv = netdev_priv(net_dev); 2021 sis_priv->msg_enable = value; 2022 } 2023 2024 static u32 sis900_get_link(struct net_device *net_dev) 2025 { 2026 struct sis900_private *sis_priv = netdev_priv(net_dev); 2027 return mii_link_ok(&sis_priv->mii_info); 2028 } 2029 2030 static int sis900_get_settings(struct net_device *net_dev, 2031 struct ethtool_cmd *cmd) 2032 { 2033 struct sis900_private *sis_priv = netdev_priv(net_dev); 2034 spin_lock_irq(&sis_priv->lock); 2035 mii_ethtool_gset(&sis_priv->mii_info, cmd); 2036 spin_unlock_irq(&sis_priv->lock); 2037 return 0; 2038 } 2039 2040 static int sis900_set_settings(struct net_device *net_dev, 2041 struct ethtool_cmd *cmd) 2042 { 2043 struct sis900_private *sis_priv = netdev_priv(net_dev); 2044 int rt; 2045 spin_lock_irq(&sis_priv->lock); 2046 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd); 2047 spin_unlock_irq(&sis_priv->lock); 2048 return rt; 2049 } 2050 2051 static int sis900_nway_reset(struct net_device *net_dev) 2052 { 2053 struct sis900_private *sis_priv = netdev_priv(net_dev); 2054 return mii_nway_restart(&sis_priv->mii_info); 2055 } 2056 2057 /** 2058 * sis900_set_wol - Set up Wake on Lan registers 2059 * @net_dev: the net device to probe 2060 * @wol: container for info passed to the driver 2061 * 2062 * Process ethtool command "wol" to setup wake on lan features. 2063 * SiS900 supports sending WoL events if a correct packet is received, 2064 * but there is no simple way to filter them to only a subset (broadcast, 2065 * multicast, unicast or arp). 2066 */ 2067 2068 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2069 { 2070 struct sis900_private *sis_priv = netdev_priv(net_dev); 2071 void __iomem *ioaddr = sis_priv->ioaddr; 2072 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2073 2074 if (wol->wolopts == 0) { 2075 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2076 cfgpmcsr &= ~PME_EN; 2077 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2078 sw32(pmctrl, pmctrl_bits); 2079 if (netif_msg_wol(sis_priv)) 2080 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2081 return 0; 2082 } 2083 2084 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2085 | WAKE_BCAST | WAKE_ARP)) 2086 return -EINVAL; 2087 2088 if (wol->wolopts & WAKE_MAGIC) 2089 pmctrl_bits |= MAGICPKT; 2090 if (wol->wolopts & WAKE_PHY) 2091 pmctrl_bits |= LINKON; 2092 2093 sw32(pmctrl, pmctrl_bits); 2094 2095 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2096 cfgpmcsr |= PME_EN; 2097 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2098 if (netif_msg_wol(sis_priv)) 2099 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2100 2101 return 0; 2102 } 2103 2104 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2105 { 2106 struct sis900_private *sp = netdev_priv(net_dev); 2107 void __iomem *ioaddr = sp->ioaddr; 2108 u32 pmctrl_bits; 2109 2110 pmctrl_bits = sr32(pmctrl); 2111 if (pmctrl_bits & MAGICPKT) 2112 wol->wolopts |= WAKE_MAGIC; 2113 if (pmctrl_bits & LINKON) 2114 wol->wolopts |= WAKE_PHY; 2115 2116 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2117 } 2118 2119 static const struct ethtool_ops sis900_ethtool_ops = { 2120 .get_drvinfo = sis900_get_drvinfo, 2121 .get_msglevel = sis900_get_msglevel, 2122 .set_msglevel = sis900_set_msglevel, 2123 .get_link = sis900_get_link, 2124 .get_settings = sis900_get_settings, 2125 .set_settings = sis900_set_settings, 2126 .nway_reset = sis900_nway_reset, 2127 .get_wol = sis900_get_wol, 2128 .set_wol = sis900_set_wol 2129 }; 2130 2131 /** 2132 * mii_ioctl - process MII i/o control command 2133 * @net_dev: the net device to command for 2134 * @rq: parameter for command 2135 * @cmd: the i/o command 2136 * 2137 * Process MII command like read/write MII register 2138 */ 2139 2140 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2141 { 2142 struct sis900_private *sis_priv = netdev_priv(net_dev); 2143 struct mii_ioctl_data *data = if_mii(rq); 2144 2145 switch(cmd) { 2146 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2147 data->phy_id = sis_priv->mii->phy_addr; 2148 /* Fall Through */ 2149 2150 case SIOCGMIIREG: /* Read MII PHY register. */ 2151 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2152 return 0; 2153 2154 case SIOCSMIIREG: /* Write MII PHY register. */ 2155 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2156 return 0; 2157 default: 2158 return -EOPNOTSUPP; 2159 } 2160 } 2161 2162 /** 2163 * sis900_set_config - Set media type by net_device.set_config 2164 * @dev: the net device for media type change 2165 * @map: ifmap passed by ifconfig 2166 * 2167 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2168 * we support only port changes. All other runtime configuration 2169 * changes will be ignored 2170 */ 2171 2172 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2173 { 2174 struct sis900_private *sis_priv = netdev_priv(dev); 2175 struct mii_phy *mii_phy = sis_priv->mii; 2176 2177 u16 status; 2178 2179 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2180 /* we switch on the ifmap->port field. I couldn't find anything 2181 * like a definition or standard for the values of that field. 2182 * I think the meaning of those values is device specific. But 2183 * since I would like to change the media type via the ifconfig 2184 * command I use the definition from linux/netdevice.h 2185 * (which seems to be different from the ifport(pcmcia) definition) */ 2186 switch(map->port){ 2187 case IF_PORT_UNKNOWN: /* use auto here */ 2188 dev->if_port = map->port; 2189 /* we are going to change the media type, so the Link 2190 * will be temporary down and we need to reflect that 2191 * here. When the Link comes up again, it will be 2192 * sensed by the sis_timer procedure, which also does 2193 * all the rest for us */ 2194 netif_carrier_off(dev); 2195 2196 /* read current state */ 2197 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2198 2199 /* enable auto negotiation and reset the negotioation 2200 * (I don't really know what the auto negatiotiation 2201 * reset really means, but it sounds for me right to 2202 * do one here) */ 2203 mdio_write(dev, mii_phy->phy_addr, 2204 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2205 2206 break; 2207 2208 case IF_PORT_10BASET: /* 10BaseT */ 2209 dev->if_port = map->port; 2210 2211 /* we are going to change the media type, so the Link 2212 * will be temporary down and we need to reflect that 2213 * here. When the Link comes up again, it will be 2214 * sensed by the sis_timer procedure, which also does 2215 * all the rest for us */ 2216 netif_carrier_off(dev); 2217 2218 /* set Speed to 10Mbps */ 2219 /* read current state */ 2220 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2221 2222 /* disable auto negotiation and force 10MBit mode*/ 2223 mdio_write(dev, mii_phy->phy_addr, 2224 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2225 MII_CNTL_AUTO)); 2226 break; 2227 2228 case IF_PORT_100BASET: /* 100BaseT */ 2229 case IF_PORT_100BASETX: /* 100BaseTx */ 2230 dev->if_port = map->port; 2231 2232 /* we are going to change the media type, so the Link 2233 * will be temporary down and we need to reflect that 2234 * here. When the Link comes up again, it will be 2235 * sensed by the sis_timer procedure, which also does 2236 * all the rest for us */ 2237 netif_carrier_off(dev); 2238 2239 /* set Speed to 100Mbps */ 2240 /* disable auto negotiation and enable 100MBit Mode */ 2241 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2242 mdio_write(dev, mii_phy->phy_addr, 2243 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2244 MII_CNTL_SPEED); 2245 2246 break; 2247 2248 case IF_PORT_10BASE2: /* 10Base2 */ 2249 case IF_PORT_AUI: /* AUI */ 2250 case IF_PORT_100BASEFX: /* 100BaseFx */ 2251 /* These Modes are not supported (are they?)*/ 2252 return -EOPNOTSUPP; 2253 break; 2254 2255 default: 2256 return -EINVAL; 2257 } 2258 } 2259 return 0; 2260 } 2261 2262 /** 2263 * sis900_mcast_bitnr - compute hashtable index 2264 * @addr: multicast address 2265 * @revision: revision id of chip 2266 * 2267 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2268 * hash table, which makes this function a little bit different from other drivers 2269 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2270 * multicast hash table. 2271 */ 2272 2273 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2274 { 2275 2276 u32 crc = ether_crc(6, addr); 2277 2278 /* leave 8 or 7 most siginifant bits */ 2279 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2280 return (int)(crc >> 24); 2281 else 2282 return (int)(crc >> 25); 2283 } 2284 2285 /** 2286 * set_rx_mode - Set SiS900 receive mode 2287 * @net_dev: the net device to be set 2288 * 2289 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2290 * And set the appropriate multicast filter. 2291 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2292 */ 2293 2294 static void set_rx_mode(struct net_device *net_dev) 2295 { 2296 struct sis900_private *sis_priv = netdev_priv(net_dev); 2297 void __iomem *ioaddr = sis_priv->ioaddr; 2298 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2299 int i, table_entries; 2300 u32 rx_mode; 2301 2302 /* 635 Hash Table entries = 256(2^16) */ 2303 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2304 (sis_priv->chipset_rev == SIS900B_900_REV)) 2305 table_entries = 16; 2306 else 2307 table_entries = 8; 2308 2309 if (net_dev->flags & IFF_PROMISC) { 2310 /* Accept any kinds of packets */ 2311 rx_mode = RFPromiscuous; 2312 for (i = 0; i < table_entries; i++) 2313 mc_filter[i] = 0xffff; 2314 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2315 (net_dev->flags & IFF_ALLMULTI)) { 2316 /* too many multicast addresses or accept all multicast packet */ 2317 rx_mode = RFAAB | RFAAM; 2318 for (i = 0; i < table_entries; i++) 2319 mc_filter[i] = 0xffff; 2320 } else { 2321 /* Accept Broadcast packet, destination address matchs our 2322 * MAC address, use Receive Filter to reject unwanted MCAST 2323 * packets */ 2324 struct netdev_hw_addr *ha; 2325 rx_mode = RFAAB; 2326 2327 netdev_for_each_mc_addr(ha, net_dev) { 2328 unsigned int bit_nr; 2329 2330 bit_nr = sis900_mcast_bitnr(ha->addr, 2331 sis_priv->chipset_rev); 2332 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2333 } 2334 } 2335 2336 /* update Multicast Hash Table in Receive Filter */ 2337 for (i = 0; i < table_entries; i++) { 2338 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2339 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2340 sw32(rfdr, mc_filter[i]); 2341 } 2342 2343 sw32(rfcr, RFEN | rx_mode); 2344 2345 /* sis900 is capable of looping back packets at MAC level for 2346 * debugging purpose */ 2347 if (net_dev->flags & IFF_LOOPBACK) { 2348 u32 cr_saved; 2349 /* We must disable Tx/Rx before setting loopback mode */ 2350 cr_saved = sr32(cr); 2351 sw32(cr, cr_saved | TxDIS | RxDIS); 2352 /* enable loopback */ 2353 sw32(txcfg, sr32(txcfg) | TxMLB); 2354 sw32(rxcfg, sr32(rxcfg) | RxATX); 2355 /* restore cr */ 2356 sw32(cr, cr_saved); 2357 } 2358 } 2359 2360 /** 2361 * sis900_reset - Reset sis900 MAC 2362 * @net_dev: the net device to reset 2363 * 2364 * reset sis900 MAC and wait until finished 2365 * reset through command register 2366 * change backoff algorithm for 900B0 & 635 M/B 2367 */ 2368 2369 static void sis900_reset(struct net_device *net_dev) 2370 { 2371 struct sis900_private *sis_priv = netdev_priv(net_dev); 2372 void __iomem *ioaddr = sis_priv->ioaddr; 2373 u32 status = TxRCMP | RxRCMP; 2374 int i; 2375 2376 sw32(ier, 0); 2377 sw32(imr, 0); 2378 sw32(rfcr, 0); 2379 2380 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2381 2382 /* Check that the chip has finished the reset. */ 2383 for (i = 0; status && (i < 1000); i++) 2384 status ^= sr32(isr) & status; 2385 2386 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2387 sis_priv->chipset_rev == SIS900B_900_REV) 2388 sw32(cfg, PESEL | RND_CNT); 2389 else 2390 sw32(cfg, PESEL); 2391 } 2392 2393 /** 2394 * sis900_remove - Remove sis900 device 2395 * @pci_dev: the pci device to be removed 2396 * 2397 * remove and release SiS900 net device 2398 */ 2399 2400 static void sis900_remove(struct pci_dev *pci_dev) 2401 { 2402 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2403 struct sis900_private *sis_priv = netdev_priv(net_dev); 2404 2405 unregister_netdev(net_dev); 2406 2407 while (sis_priv->first_mii) { 2408 struct mii_phy *phy = sis_priv->first_mii; 2409 2410 sis_priv->first_mii = phy->next; 2411 kfree(phy); 2412 } 2413 2414 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2415 sis_priv->rx_ring_dma); 2416 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2417 sis_priv->tx_ring_dma); 2418 pci_iounmap(pci_dev, sis_priv->ioaddr); 2419 free_netdev(net_dev); 2420 pci_release_regions(pci_dev); 2421 pci_set_drvdata(pci_dev, NULL); 2422 } 2423 2424 #ifdef CONFIG_PM 2425 2426 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) 2427 { 2428 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2429 struct sis900_private *sis_priv = netdev_priv(net_dev); 2430 void __iomem *ioaddr = sis_priv->ioaddr; 2431 2432 if(!netif_running(net_dev)) 2433 return 0; 2434 2435 netif_stop_queue(net_dev); 2436 netif_device_detach(net_dev); 2437 2438 /* Stop the chip's Tx and Rx Status Machine */ 2439 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2440 2441 pci_set_power_state(pci_dev, PCI_D3hot); 2442 pci_save_state(pci_dev); 2443 2444 return 0; 2445 } 2446 2447 static int sis900_resume(struct pci_dev *pci_dev) 2448 { 2449 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2450 struct sis900_private *sis_priv = netdev_priv(net_dev); 2451 void __iomem *ioaddr = sis_priv->ioaddr; 2452 2453 if(!netif_running(net_dev)) 2454 return 0; 2455 pci_restore_state(pci_dev); 2456 pci_set_power_state(pci_dev, PCI_D0); 2457 2458 sis900_init_rxfilter(net_dev); 2459 2460 sis900_init_tx_ring(net_dev); 2461 sis900_init_rx_ring(net_dev); 2462 2463 set_rx_mode(net_dev); 2464 2465 netif_device_attach(net_dev); 2466 netif_start_queue(net_dev); 2467 2468 /* Workaround for EDB */ 2469 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2470 2471 /* Enable all known interrupts by setting the interrupt mask. */ 2472 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE); 2473 sw32(cr, RxENA | sr32(cr)); 2474 sw32(ier, IE); 2475 2476 sis900_check_mode(net_dev, sis_priv->mii); 2477 2478 return 0; 2479 } 2480 #endif /* CONFIG_PM */ 2481 2482 static struct pci_driver sis900_pci_driver = { 2483 .name = SIS900_MODULE_NAME, 2484 .id_table = sis900_pci_tbl, 2485 .probe = sis900_probe, 2486 .remove = sis900_remove, 2487 #ifdef CONFIG_PM 2488 .suspend = sis900_suspend, 2489 .resume = sis900_resume, 2490 #endif /* CONFIG_PM */ 2491 }; 2492 2493 static int __init sis900_init_module(void) 2494 { 2495 /* when a module, this is printed whether or not devices are found in probe */ 2496 #ifdef MODULE 2497 printk(version); 2498 #endif 2499 2500 return pci_register_driver(&sis900_pci_driver); 2501 } 2502 2503 static void __exit sis900_cleanup_module(void) 2504 { 2505 pci_unregister_driver(&sis900_pci_driver); 2506 } 2507 2508 module_init(sis900_init_module); 2509 module_exit(sis900_cleanup_module); 2510 2511