1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50 */ 51 52 #include <linux/module.h> 53 #include <linux/moduleparam.h> 54 #include <linux/kernel.h> 55 #include <linux/sched.h> 56 #include <linux/string.h> 57 #include <linux/timer.h> 58 #include <linux/errno.h> 59 #include <linux/ioport.h> 60 #include <linux/slab.h> 61 #include <linux/interrupt.h> 62 #include <linux/pci.h> 63 #include <linux/netdevice.h> 64 #include <linux/init.h> 65 #include <linux/mii.h> 66 #include <linux/etherdevice.h> 67 #include <linux/skbuff.h> 68 #include <linux/delay.h> 69 #include <linux/ethtool.h> 70 #include <linux/crc32.h> 71 #include <linux/bitops.h> 72 #include <linux/dma-mapping.h> 73 74 #include <asm/processor.h> /* Processor type for cache alignment. */ 75 #include <asm/io.h> 76 #include <asm/irq.h> 77 #include <linux/uaccess.h> /* User space memory access functions */ 78 79 #include "sis900.h" 80 81 #define SIS900_MODULE_NAME "sis900" 82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 83 84 static const char version[] = 85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 86 87 static int max_interrupt_work = 40; 88 static int multicast_filter_limit = 128; 89 90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 91 92 #define SIS900_DEF_MSG \ 93 (NETIF_MSG_DRV | \ 94 NETIF_MSG_LINK | \ 95 NETIF_MSG_RX_ERR | \ 96 NETIF_MSG_TX_ERR) 97 98 /* Time in jiffies before concluding the transmitter is hung. */ 99 #define TX_TIMEOUT (4*HZ) 100 101 enum { 102 SIS_900 = 0, 103 SIS_7016 104 }; 105 static const char * card_names[] = { 106 "SiS 900 PCI Fast Ethernet", 107 "SiS 7016 PCI Fast Ethernet" 108 }; 109 110 static const struct pci_device_id sis900_pci_tbl[] = { 111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 113 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 115 {0,} 116 }; 117 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 118 119 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 120 121 static const struct mii_chip_info { 122 const char * name; 123 u16 phy_id0; 124 u16 phy_id1; 125 u8 phy_types; 126 #define HOME 0x0001 127 #define LAN 0x0002 128 #define MIX 0x0003 129 #define UNKNOWN 0x0 130 } mii_chip_table[] = { 131 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 132 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 133 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 134 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 135 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 136 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 137 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 138 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 139 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 140 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 141 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 142 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 143 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 144 {NULL,}, 145 }; 146 147 struct mii_phy { 148 struct mii_phy * next; 149 int phy_addr; 150 u16 phy_id0; 151 u16 phy_id1; 152 u16 status; 153 u8 phy_types; 154 }; 155 156 typedef struct _BufferDesc { 157 u32 link; 158 u32 cmdsts; 159 u32 bufptr; 160 } BufferDesc; 161 162 struct sis900_private { 163 struct pci_dev * pci_dev; 164 165 spinlock_t lock; 166 167 struct mii_phy * mii; 168 struct mii_phy * first_mii; /* record the first mii structure */ 169 unsigned int cur_phy; 170 struct mii_if_info mii_info; 171 172 void __iomem *ioaddr; 173 174 struct timer_list timer; /* Link status detection timer. */ 175 u8 autong_complete; /* 1: auto-negotiate complete */ 176 177 u32 msg_enable; 178 179 unsigned int cur_rx, dirty_rx; /* producer/consumer pointers for Tx/Rx ring */ 180 unsigned int cur_tx, dirty_tx; 181 182 /* The saved address of a sent/receive-in-place packet buffer */ 183 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 184 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 185 BufferDesc *tx_ring; 186 BufferDesc *rx_ring; 187 188 dma_addr_t tx_ring_dma; 189 dma_addr_t rx_ring_dma; 190 191 unsigned int tx_full; /* The Tx queue is full. */ 192 u8 host_bridge_rev; 193 u8 chipset_rev; 194 /* EEPROM data */ 195 int eeprom_size; 196 }; 197 198 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 199 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 200 MODULE_LICENSE("GPL"); 201 202 module_param(multicast_filter_limit, int, 0444); 203 module_param(max_interrupt_work, int, 0444); 204 module_param(sis900_debug, int, 0444); 205 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 206 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 207 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 208 209 #define sw32(reg, val) iowrite32(val, ioaddr + (reg)) 210 #define sw8(reg, val) iowrite8(val, ioaddr + (reg)) 211 #define sr32(reg) ioread32(ioaddr + (reg)) 212 #define sr16(reg) ioread16(ioaddr + (reg)) 213 214 #ifdef CONFIG_NET_POLL_CONTROLLER 215 static void sis900_poll(struct net_device *dev); 216 #endif 217 static int sis900_open(struct net_device *net_dev); 218 static int sis900_mii_probe (struct net_device * net_dev); 219 static void sis900_init_rxfilter (struct net_device * net_dev); 220 static u16 read_eeprom(void __iomem *ioaddr, int location); 221 static int mdio_read(struct net_device *net_dev, int phy_id, int location); 222 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 223 static void sis900_timer(struct timer_list *t); 224 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 225 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue); 226 static void sis900_init_tx_ring(struct net_device *net_dev); 227 static void sis900_init_rx_ring(struct net_device *net_dev); 228 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 229 struct net_device *net_dev); 230 static int sis900_rx(struct net_device *net_dev); 231 static void sis900_finish_xmit (struct net_device *net_dev); 232 static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 233 static int sis900_close(struct net_device *net_dev); 234 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 235 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 236 static void set_rx_mode(struct net_device *net_dev); 237 static void sis900_reset(struct net_device *net_dev); 238 static void sis630_set_eq(struct net_device *net_dev, u8 revision); 239 static int sis900_set_config(struct net_device *dev, struct ifmap *map); 240 static u16 sis900_default_phy(struct net_device * net_dev); 241 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 242 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 243 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 244 static void sis900_set_mode(struct sis900_private *, int speed, int duplex); 245 static const struct ethtool_ops sis900_ethtool_ops; 246 247 /** 248 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 249 * @pci_dev: the sis900 pci device 250 * @net_dev: the net device to get address for 251 * 252 * Older SiS900 and friends, use EEPROM to store MAC address. 253 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 254 */ 255 256 static int sis900_get_mac_addr(struct pci_dev *pci_dev, 257 struct net_device *net_dev) 258 { 259 struct sis900_private *sis_priv = netdev_priv(net_dev); 260 void __iomem *ioaddr = sis_priv->ioaddr; 261 u16 addr[ETH_ALEN / 2]; 262 u16 signature; 263 int i; 264 265 /* check to see if we have sane EEPROM */ 266 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 267 if (signature == 0xffff || signature == 0x0000) { 268 printk (KERN_WARNING "%s: Error EEPROM read %x\n", 269 pci_name(pci_dev), signature); 270 return 0; 271 } 272 273 /* get MAC address from EEPROM */ 274 for (i = 0; i < 3; i++) 275 addr[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 276 eth_hw_addr_set(net_dev, (u8 *)addr); 277 278 return 1; 279 } 280 281 /** 282 * sis630e_get_mac_addr - Get MAC address for SiS630E model 283 * @pci_dev: the sis900 pci device 284 * @net_dev: the net device to get address for 285 * 286 * SiS630E model, use APC CMOS RAM to store MAC address. 287 * APC CMOS RAM is accessed through ISA bridge. 288 * MAC address is read into @net_dev->dev_addr. 289 */ 290 291 static int sis630e_get_mac_addr(struct pci_dev *pci_dev, 292 struct net_device *net_dev) 293 { 294 struct pci_dev *isa_bridge = NULL; 295 u8 reg; 296 int i; 297 298 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 299 if (!isa_bridge) 300 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 301 if (!isa_bridge) { 302 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 303 pci_name(pci_dev)); 304 return 0; 305 } 306 pci_read_config_byte(isa_bridge, 0x48, ®); 307 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 308 309 for (i = 0; i < 6; i++) { 310 outb(0x09 + i, 0x70); 311 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 312 } 313 314 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 315 pci_dev_put(isa_bridge); 316 317 return 1; 318 } 319 320 321 /** 322 * sis635_get_mac_addr - Get MAC address for SIS635 model 323 * @pci_dev: the sis900 pci device 324 * @net_dev: the net device to get address for 325 * 326 * SiS635 model, set MAC Reload Bit to load Mac address from APC 327 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 328 * @net_dev->dev_addr. 329 */ 330 331 static int sis635_get_mac_addr(struct pci_dev *pci_dev, 332 struct net_device *net_dev) 333 { 334 struct sis900_private *sis_priv = netdev_priv(net_dev); 335 void __iomem *ioaddr = sis_priv->ioaddr; 336 u16 addr[ETH_ALEN / 2]; 337 u32 rfcrSave; 338 u32 i; 339 340 rfcrSave = sr32(rfcr); 341 342 sw32(cr, rfcrSave | RELOAD); 343 sw32(cr, 0); 344 345 /* disable packet filtering before setting filter */ 346 sw32(rfcr, rfcrSave & ~RFEN); 347 348 /* load MAC addr to filter data register */ 349 for (i = 0 ; i < 3 ; i++) { 350 sw32(rfcr, (i << RFADDR_shift)); 351 addr[i] = sr16(rfdr); 352 } 353 eth_hw_addr_set(net_dev, (u8 *)addr); 354 355 /* enable packet filtering */ 356 sw32(rfcr, rfcrSave | RFEN); 357 358 return 1; 359 } 360 361 /** 362 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 363 * @pci_dev: the sis900 pci device 364 * @net_dev: the net device to get address for 365 * 366 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 367 * is shared by 368 * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first 369 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed 370 * by LAN, otherwise it is not. After MAC address is read from EEPROM, send 371 * EEDONE signal to refuse EEPROM access by LAN. 372 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 373 * The signature field in SiS962 or SiS963 spec is meaningless. 374 * MAC address is read into @net_dev->dev_addr. 375 */ 376 377 static int sis96x_get_mac_addr(struct pci_dev *pci_dev, 378 struct net_device *net_dev) 379 { 380 struct sis900_private *sis_priv = netdev_priv(net_dev); 381 void __iomem *ioaddr = sis_priv->ioaddr; 382 u16 addr[ETH_ALEN / 2]; 383 int wait, rc = 0; 384 385 sw32(mear, EEREQ); 386 for (wait = 0; wait < 2000; wait++) { 387 if (sr32(mear) & EEGNT) { 388 int i; 389 390 /* get MAC address from EEPROM */ 391 for (i = 0; i < 3; i++) 392 addr[i] = read_eeprom(ioaddr, i + EEPROMMACAddr); 393 eth_hw_addr_set(net_dev, (u8 *)addr); 394 395 rc = 1; 396 break; 397 } 398 udelay(1); 399 } 400 sw32(mear, EEDONE); 401 return rc; 402 } 403 404 static const struct net_device_ops sis900_netdev_ops = { 405 .ndo_open = sis900_open, 406 .ndo_stop = sis900_close, 407 .ndo_start_xmit = sis900_start_xmit, 408 .ndo_set_config = sis900_set_config, 409 .ndo_set_rx_mode = set_rx_mode, 410 .ndo_validate_addr = eth_validate_addr, 411 .ndo_set_mac_address = eth_mac_addr, 412 .ndo_eth_ioctl = mii_ioctl, 413 .ndo_tx_timeout = sis900_tx_timeout, 414 #ifdef CONFIG_NET_POLL_CONTROLLER 415 .ndo_poll_controller = sis900_poll, 416 #endif 417 }; 418 419 /** 420 * sis900_probe - Probe for sis900 device 421 * @pci_dev: the sis900 pci device 422 * @pci_id: the pci device ID 423 * 424 * Check and probe sis900 net device for @pci_dev. 425 * Get mac address according to the chip revision, 426 * and assign SiS900-specific entries in the device structure. 427 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 428 */ 429 430 static int sis900_probe(struct pci_dev *pci_dev, 431 const struct pci_device_id *pci_id) 432 { 433 struct sis900_private *sis_priv; 434 struct net_device *net_dev; 435 struct pci_dev *dev; 436 dma_addr_t ring_dma; 437 void *ring_space; 438 void __iomem *ioaddr; 439 int i, ret; 440 const char *card_name = card_names[pci_id->driver_data]; 441 const char *dev_name = pci_name(pci_dev); 442 443 /* when built into the kernel, we only print version if device is found */ 444 #ifndef MODULE 445 static int printed_version; 446 if (!printed_version++) 447 printk(version); 448 #endif 449 450 /* setup various bits in PCI command register */ 451 ret = pcim_enable_device(pci_dev); 452 if(ret) return ret; 453 454 i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); 455 if(i){ 456 printk(KERN_ERR "sis900.c: architecture does not support " 457 "32bit PCI busmaster DMA\n"); 458 return i; 459 } 460 461 pci_set_master(pci_dev); 462 463 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 464 if (!net_dev) 465 return -ENOMEM; 466 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 467 468 /* We do a request_region() to register /proc/ioports info. */ 469 ret = pci_request_regions(pci_dev, "sis900"); 470 if (ret) 471 goto err_out; 472 473 /* IO region. */ 474 ioaddr = pci_iomap(pci_dev, 0, 0); 475 if (!ioaddr) { 476 ret = -ENOMEM; 477 goto err_out; 478 } 479 480 sis_priv = netdev_priv(net_dev); 481 sis_priv->ioaddr = ioaddr; 482 sis_priv->pci_dev = pci_dev; 483 spin_lock_init(&sis_priv->lock); 484 485 sis_priv->eeprom_size = 24; 486 487 pci_set_drvdata(pci_dev, net_dev); 488 489 ring_space = dma_alloc_coherent(&pci_dev->dev, TX_TOTAL_SIZE, 490 &ring_dma, GFP_KERNEL); 491 if (!ring_space) { 492 ret = -ENOMEM; 493 goto err_out_unmap; 494 } 495 sis_priv->tx_ring = ring_space; 496 sis_priv->tx_ring_dma = ring_dma; 497 498 ring_space = dma_alloc_coherent(&pci_dev->dev, RX_TOTAL_SIZE, 499 &ring_dma, GFP_KERNEL); 500 if (!ring_space) { 501 ret = -ENOMEM; 502 goto err_unmap_tx; 503 } 504 sis_priv->rx_ring = ring_space; 505 sis_priv->rx_ring_dma = ring_dma; 506 507 /* The SiS900-specific entries in the device structure. */ 508 net_dev->netdev_ops = &sis900_netdev_ops; 509 net_dev->watchdog_timeo = TX_TIMEOUT; 510 net_dev->ethtool_ops = &sis900_ethtool_ops; 511 512 if (sis900_debug > 0) 513 sis_priv->msg_enable = sis900_debug; 514 else 515 sis_priv->msg_enable = SIS900_DEF_MSG; 516 517 sis_priv->mii_info.dev = net_dev; 518 sis_priv->mii_info.mdio_read = mdio_read; 519 sis_priv->mii_info.mdio_write = mdio_write; 520 sis_priv->mii_info.phy_id_mask = 0x1f; 521 sis_priv->mii_info.reg_num_mask = 0x1f; 522 523 /* Get Mac address according to the chip revision */ 524 sis_priv->chipset_rev = pci_dev->revision; 525 if(netif_msg_probe(sis_priv)) 526 printk(KERN_DEBUG "%s: detected revision %2.2x, " 527 "trying to get MAC address...\n", 528 dev_name, sis_priv->chipset_rev); 529 530 ret = 0; 531 if (sis_priv->chipset_rev == SIS630E_900_REV) 532 ret = sis630e_get_mac_addr(pci_dev, net_dev); 533 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 534 ret = sis635_get_mac_addr(pci_dev, net_dev); 535 else if (sis_priv->chipset_rev == SIS96x_900_REV) 536 ret = sis96x_get_mac_addr(pci_dev, net_dev); 537 else 538 ret = sis900_get_mac_addr(pci_dev, net_dev); 539 540 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 541 eth_hw_addr_random(net_dev); 542 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 543 "using random generated one\n", dev_name); 544 } 545 546 /* 630ET : set the mii access mode as software-mode */ 547 if (sis_priv->chipset_rev == SIS630ET_900_REV) 548 sw32(cr, ACCESSMODE | sr32(cr)); 549 550 /* probe for mii transceiver */ 551 if (sis900_mii_probe(net_dev) == 0) { 552 printk(KERN_WARNING "%s: Error probing MII device.\n", 553 dev_name); 554 ret = -ENODEV; 555 goto err_unmap_rx; 556 } 557 558 /* save our host bridge revision */ 559 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 560 if (dev) { 561 sis_priv->host_bridge_rev = dev->revision; 562 pci_dev_put(dev); 563 } 564 565 ret = register_netdev(net_dev); 566 if (ret) 567 goto err_unmap_rx; 568 569 /* print some information about our NIC */ 570 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n", 571 net_dev->name, card_name, ioaddr, pci_dev->irq, 572 net_dev->dev_addr); 573 574 /* Detect Wake on Lan support */ 575 ret = (sr32(CFGPMC) & PMESP) >> 27; 576 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 577 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 578 579 return 0; 580 581 err_unmap_rx: 582 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 583 sis_priv->rx_ring_dma); 584 err_unmap_tx: 585 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 586 sis_priv->tx_ring_dma); 587 err_out_unmap: 588 pci_iounmap(pci_dev, ioaddr); 589 err_out: 590 free_netdev(net_dev); 591 return ret; 592 } 593 594 /** 595 * sis900_mii_probe - Probe MII PHY for sis900 596 * @net_dev: the net device to probe for 597 * 598 * Search for total of 32 possible mii phy addresses. 599 * Identify and set current phy if found one, 600 * return error if it failed to found. 601 */ 602 603 static int sis900_mii_probe(struct net_device *net_dev) 604 { 605 struct sis900_private *sis_priv = netdev_priv(net_dev); 606 const char *dev_name = pci_name(sis_priv->pci_dev); 607 u16 poll_bit = MII_STAT_LINK, status = 0; 608 unsigned long timeout = jiffies + 5 * HZ; 609 int phy_addr; 610 611 sis_priv->mii = NULL; 612 613 /* search for total of 32 possible mii phy addresses */ 614 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 615 struct mii_phy * mii_phy = NULL; 616 u16 mii_status; 617 int i; 618 619 mii_phy = NULL; 620 for(i = 0; i < 2; i++) 621 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 622 623 if (mii_status == 0xffff || mii_status == 0x0000) { 624 if (netif_msg_probe(sis_priv)) 625 printk(KERN_DEBUG "%s: MII at address %d" 626 " not accessible\n", 627 dev_name, phy_addr); 628 continue; 629 } 630 631 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 632 mii_phy = sis_priv->first_mii; 633 while (mii_phy) { 634 struct mii_phy *phy; 635 phy = mii_phy; 636 mii_phy = mii_phy->next; 637 kfree(phy); 638 } 639 return 0; 640 } 641 642 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 643 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 644 mii_phy->phy_addr = phy_addr; 645 mii_phy->status = mii_status; 646 mii_phy->next = sis_priv->mii; 647 sis_priv->mii = mii_phy; 648 sis_priv->first_mii = mii_phy; 649 650 for (i = 0; mii_chip_table[i].phy_id1; i++) 651 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 652 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 653 mii_phy->phy_types = mii_chip_table[i].phy_types; 654 if (mii_chip_table[i].phy_types == MIX) 655 mii_phy->phy_types = 656 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 657 printk(KERN_INFO "%s: %s transceiver found " 658 "at address %d.\n", 659 dev_name, 660 mii_chip_table[i].name, 661 phy_addr); 662 break; 663 } 664 665 if( !mii_chip_table[i].phy_id1 ) { 666 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 667 dev_name, phy_addr); 668 mii_phy->phy_types = UNKNOWN; 669 } 670 } 671 672 if (sis_priv->mii == NULL) { 673 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 674 return 0; 675 } 676 677 /* select default PHY for mac */ 678 sis_priv->mii = NULL; 679 sis900_default_phy( net_dev ); 680 681 /* Reset phy if default phy is internal sis900 */ 682 if ((sis_priv->mii->phy_id0 == 0x001D) && 683 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 684 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 685 686 /* workaround for ICS1893 PHY */ 687 if ((sis_priv->mii->phy_id0 == 0x0015) && 688 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 689 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 690 691 if(status & MII_STAT_LINK){ 692 while (poll_bit) { 693 yield(); 694 695 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 696 if (time_after_eq(jiffies, timeout)) { 697 printk(KERN_WARNING "%s: reset phy and link down now\n", 698 dev_name); 699 return -ETIME; 700 } 701 } 702 } 703 704 if (sis_priv->chipset_rev == SIS630E_900_REV) { 705 /* SiS 630E has some bugs on default value of PHY registers */ 706 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 707 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 708 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 709 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 710 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 711 } 712 713 if (sis_priv->mii->status & MII_STAT_LINK) 714 netif_carrier_on(net_dev); 715 else 716 netif_carrier_off(net_dev); 717 718 return 1; 719 } 720 721 /** 722 * sis900_default_phy - Select default PHY for sis900 mac. 723 * @net_dev: the net device to probe for 724 * 725 * Select first detected PHY with link as default. 726 * If no one is link on, select PHY whose types is HOME as default. 727 * If HOME doesn't exist, select LAN. 728 */ 729 730 static u16 sis900_default_phy(struct net_device * net_dev) 731 { 732 struct sis900_private *sis_priv = netdev_priv(net_dev); 733 struct mii_phy *phy = NULL, *phy_home = NULL, 734 *default_phy = NULL, *phy_lan = NULL; 735 u16 status; 736 737 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 738 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 739 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 740 741 /* Link ON & Not select default PHY & not ghost PHY */ 742 if ((status & MII_STAT_LINK) && !default_phy && 743 (phy->phy_types != UNKNOWN)) { 744 default_phy = phy; 745 } else { 746 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 747 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 748 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 749 if (phy->phy_types == HOME) 750 phy_home = phy; 751 else if(phy->phy_types == LAN) 752 phy_lan = phy; 753 } 754 } 755 756 if (!default_phy && phy_home) 757 default_phy = phy_home; 758 else if (!default_phy && phy_lan) 759 default_phy = phy_lan; 760 else if (!default_phy) 761 default_phy = sis_priv->first_mii; 762 763 if (sis_priv->mii != default_phy) { 764 sis_priv->mii = default_phy; 765 sis_priv->cur_phy = default_phy->phy_addr; 766 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 767 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 768 } 769 770 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 771 772 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 773 status &= (~MII_CNTL_ISOLATE); 774 775 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 776 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 777 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 778 779 return status; 780 } 781 782 783 /** 784 * sis900_set_capability - set the media capability of network adapter. 785 * @net_dev : the net device to probe for 786 * @phy : default PHY 787 * 788 * Set the media capability of network adapter according to 789 * mii status register. It's necessary before auto-negotiate. 790 */ 791 792 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 793 { 794 u16 cap; 795 796 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 797 mdio_read(net_dev, phy->phy_addr, MII_STATUS); 798 799 cap = MII_NWAY_CSMA_CD | 800 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 801 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 802 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 803 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 804 805 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 806 } 807 808 809 /* Delay between EEPROM clock transitions. */ 810 #define eeprom_delay() sr32(mear) 811 812 /** 813 * read_eeprom - Read Serial EEPROM 814 * @ioaddr: base i/o address 815 * @location: the EEPROM location to read 816 * 817 * Read Serial EEPROM through EEPROM Access Register. 818 * Note that location is in word (16 bits) unit 819 */ 820 821 static u16 read_eeprom(void __iomem *ioaddr, int location) 822 { 823 u32 read_cmd = location | EEread; 824 int i; 825 u16 retval = 0; 826 827 sw32(mear, 0); 828 eeprom_delay(); 829 sw32(mear, EECS); 830 eeprom_delay(); 831 832 /* Shift the read command (9) bits out. */ 833 for (i = 8; i >= 0; i--) { 834 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 835 836 sw32(mear, dataval); 837 eeprom_delay(); 838 sw32(mear, dataval | EECLK); 839 eeprom_delay(); 840 } 841 sw32(mear, EECS); 842 eeprom_delay(); 843 844 /* read the 16-bits data in */ 845 for (i = 16; i > 0; i--) { 846 sw32(mear, EECS); 847 eeprom_delay(); 848 sw32(mear, EECS | EECLK); 849 eeprom_delay(); 850 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0); 851 eeprom_delay(); 852 } 853 854 /* Terminate the EEPROM access. */ 855 sw32(mear, 0); 856 eeprom_delay(); 857 858 return retval; 859 } 860 861 /* Read and write the MII management registers using software-generated 862 serial MDIO protocol. Note that the command bits and data bits are 863 send out separately */ 864 #define mdio_delay() sr32(mear) 865 866 static void mdio_idle(struct sis900_private *sp) 867 { 868 void __iomem *ioaddr = sp->ioaddr; 869 870 sw32(mear, MDIO | MDDIR); 871 mdio_delay(); 872 sw32(mear, MDIO | MDDIR | MDC); 873 } 874 875 /* Synchronize the MII management interface by shifting 32 one bits out. */ 876 static void mdio_reset(struct sis900_private *sp) 877 { 878 void __iomem *ioaddr = sp->ioaddr; 879 int i; 880 881 for (i = 31; i >= 0; i--) { 882 sw32(mear, MDDIR | MDIO); 883 mdio_delay(); 884 sw32(mear, MDDIR | MDIO | MDC); 885 mdio_delay(); 886 } 887 } 888 889 /** 890 * mdio_read - read MII PHY register 891 * @net_dev: the net device to read 892 * @phy_id: the phy address to read 893 * @location: the phy register id to read 894 * 895 * Read MII registers through MDIO and MDC 896 * using MDIO management frame structure and protocol(defined by ISO/IEC). 897 * Please see SiS7014 or ICS spec 898 */ 899 900 static int mdio_read(struct net_device *net_dev, int phy_id, int location) 901 { 902 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 903 struct sis900_private *sp = netdev_priv(net_dev); 904 void __iomem *ioaddr = sp->ioaddr; 905 u16 retval = 0; 906 int i; 907 908 mdio_reset(sp); 909 mdio_idle(sp); 910 911 for (i = 15; i >= 0; i--) { 912 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 913 914 sw32(mear, dataval); 915 mdio_delay(); 916 sw32(mear, dataval | MDC); 917 mdio_delay(); 918 } 919 920 /* Read the 16 data bits. */ 921 for (i = 16; i > 0; i--) { 922 sw32(mear, 0); 923 mdio_delay(); 924 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0); 925 sw32(mear, MDC); 926 mdio_delay(); 927 } 928 sw32(mear, 0x00); 929 930 return retval; 931 } 932 933 /** 934 * mdio_write - write MII PHY register 935 * @net_dev: the net device to write 936 * @phy_id: the phy address to write 937 * @location: the phy register id to write 938 * @value: the register value to write with 939 * 940 * Write MII registers with @value through MDIO and MDC 941 * using MDIO management frame structure and protocol(defined by ISO/IEC) 942 * please see SiS7014 or ICS spec 943 */ 944 945 static void mdio_write(struct net_device *net_dev, int phy_id, int location, 946 int value) 947 { 948 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 949 struct sis900_private *sp = netdev_priv(net_dev); 950 void __iomem *ioaddr = sp->ioaddr; 951 int i; 952 953 mdio_reset(sp); 954 mdio_idle(sp); 955 956 /* Shift the command bits out. */ 957 for (i = 15; i >= 0; i--) { 958 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 959 960 sw8(mear, dataval); 961 mdio_delay(); 962 sw8(mear, dataval | MDC); 963 mdio_delay(); 964 } 965 mdio_delay(); 966 967 /* Shift the value bits out. */ 968 for (i = 15; i >= 0; i--) { 969 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 970 971 sw32(mear, dataval); 972 mdio_delay(); 973 sw32(mear, dataval | MDC); 974 mdio_delay(); 975 } 976 mdio_delay(); 977 978 /* Clear out extra bits. */ 979 for (i = 2; i > 0; i--) { 980 sw8(mear, 0); 981 mdio_delay(); 982 sw8(mear, MDC); 983 mdio_delay(); 984 } 985 sw32(mear, 0x00); 986 } 987 988 989 /** 990 * sis900_reset_phy - reset sis900 mii phy. 991 * @net_dev: the net device to write 992 * @phy_addr: default phy address 993 * 994 * Some specific phy can't work properly without reset. 995 * This function will be called during initialization and 996 * link status change from ON to DOWN. 997 */ 998 999 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 1000 { 1001 int i; 1002 u16 status; 1003 1004 for (i = 0; i < 2; i++) 1005 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1006 1007 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 1008 1009 return status; 1010 } 1011 1012 #ifdef CONFIG_NET_POLL_CONTROLLER 1013 /* 1014 * Polling 'interrupt' - used by things like netconsole to send skbs 1015 * without having to re-enable interrupts. It's not called while 1016 * the interrupt routine is executing. 1017 */ 1018 static void sis900_poll(struct net_device *dev) 1019 { 1020 struct sis900_private *sp = netdev_priv(dev); 1021 const int irq = sp->pci_dev->irq; 1022 1023 disable_irq(irq); 1024 sis900_interrupt(irq, dev); 1025 enable_irq(irq); 1026 } 1027 #endif 1028 1029 /** 1030 * sis900_open - open sis900 device 1031 * @net_dev: the net device to open 1032 * 1033 * Do some initialization and start net interface. 1034 * enable interrupts and set sis900 timer. 1035 */ 1036 1037 static int 1038 sis900_open(struct net_device *net_dev) 1039 { 1040 struct sis900_private *sis_priv = netdev_priv(net_dev); 1041 void __iomem *ioaddr = sis_priv->ioaddr; 1042 int ret; 1043 1044 /* Soft reset the chip. */ 1045 sis900_reset(net_dev); 1046 1047 /* Equalizer workaround Rule */ 1048 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1049 1050 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED, 1051 net_dev->name, net_dev); 1052 if (ret) 1053 return ret; 1054 1055 sis900_init_rxfilter(net_dev); 1056 1057 sis900_init_tx_ring(net_dev); 1058 sis900_init_rx_ring(net_dev); 1059 1060 set_rx_mode(net_dev); 1061 1062 netif_start_queue(net_dev); 1063 1064 /* Workaround for EDB */ 1065 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1066 1067 /* Enable all known interrupts by setting the interrupt mask. */ 1068 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1069 sw32(cr, RxENA | sr32(cr)); 1070 sw32(ier, IE); 1071 1072 sis900_check_mode(net_dev, sis_priv->mii); 1073 1074 /* Set the timer to switch to check for link beat and perhaps switch 1075 to an alternate media type. */ 1076 timer_setup(&sis_priv->timer, sis900_timer, 0); 1077 sis_priv->timer.expires = jiffies + HZ; 1078 add_timer(&sis_priv->timer); 1079 1080 return 0; 1081 } 1082 1083 /** 1084 * sis900_init_rxfilter - Initialize the Rx filter 1085 * @net_dev: the net device to initialize for 1086 * 1087 * Set receive filter address to our MAC address 1088 * and enable packet filtering. 1089 */ 1090 1091 static void 1092 sis900_init_rxfilter (struct net_device * net_dev) 1093 { 1094 struct sis900_private *sis_priv = netdev_priv(net_dev); 1095 void __iomem *ioaddr = sis_priv->ioaddr; 1096 u32 rfcrSave; 1097 u32 i; 1098 1099 rfcrSave = sr32(rfcr); 1100 1101 /* disable packet filtering before setting filter */ 1102 sw32(rfcr, rfcrSave & ~RFEN); 1103 1104 /* load MAC addr to filter data register */ 1105 for (i = 0 ; i < 3 ; i++) { 1106 u32 w = (u32) *((const u16 *)(net_dev->dev_addr)+i); 1107 1108 sw32(rfcr, i << RFADDR_shift); 1109 sw32(rfdr, w); 1110 1111 if (netif_msg_hw(sis_priv)) { 1112 printk(KERN_DEBUG "%s: Receive Filter Address[%d]=%x\n", 1113 net_dev->name, i, sr32(rfdr)); 1114 } 1115 } 1116 1117 /* enable packet filtering */ 1118 sw32(rfcr, rfcrSave | RFEN); 1119 } 1120 1121 /** 1122 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1123 * @net_dev: the net device to initialize for 1124 * 1125 * Initialize the Tx descriptor ring, 1126 */ 1127 1128 static void 1129 sis900_init_tx_ring(struct net_device *net_dev) 1130 { 1131 struct sis900_private *sis_priv = netdev_priv(net_dev); 1132 void __iomem *ioaddr = sis_priv->ioaddr; 1133 int i; 1134 1135 sis_priv->tx_full = 0; 1136 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1137 1138 for (i = 0; i < NUM_TX_DESC; i++) { 1139 sis_priv->tx_skbuff[i] = NULL; 1140 1141 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1142 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1143 sis_priv->tx_ring[i].cmdsts = 0; 1144 sis_priv->tx_ring[i].bufptr = 0; 1145 } 1146 1147 /* load Transmit Descriptor Register */ 1148 sw32(txdp, sis_priv->tx_ring_dma); 1149 if (netif_msg_hw(sis_priv)) 1150 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1151 net_dev->name, sr32(txdp)); 1152 } 1153 1154 /** 1155 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1156 * @net_dev: the net device to initialize for 1157 * 1158 * Initialize the Rx descriptor ring, 1159 * and pre-allocate receive buffers (socket buffer) 1160 */ 1161 1162 static void 1163 sis900_init_rx_ring(struct net_device *net_dev) 1164 { 1165 struct sis900_private *sis_priv = netdev_priv(net_dev); 1166 void __iomem *ioaddr = sis_priv->ioaddr; 1167 int i; 1168 1169 sis_priv->cur_rx = 0; 1170 sis_priv->dirty_rx = 0; 1171 1172 /* init RX descriptor */ 1173 for (i = 0; i < NUM_RX_DESC; i++) { 1174 sis_priv->rx_skbuff[i] = NULL; 1175 1176 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1177 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1178 sis_priv->rx_ring[i].cmdsts = 0; 1179 sis_priv->rx_ring[i].bufptr = 0; 1180 } 1181 1182 /* allocate sock buffers */ 1183 for (i = 0; i < NUM_RX_DESC; i++) { 1184 struct sk_buff *skb; 1185 1186 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1187 /* not enough memory for skbuff, this makes a "hole" 1188 on the buffer ring, it is not clear how the 1189 hardware will react to this kind of degenerated 1190 buffer */ 1191 break; 1192 } 1193 sis_priv->rx_skbuff[i] = skb; 1194 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1195 sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1196 skb->data, 1197 RX_BUF_SIZE, 1198 DMA_FROM_DEVICE); 1199 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1200 sis_priv->rx_ring[i].bufptr))) { 1201 dev_kfree_skb(skb); 1202 sis_priv->rx_skbuff[i] = NULL; 1203 break; 1204 } 1205 } 1206 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1207 1208 /* load Receive Descriptor Register */ 1209 sw32(rxdp, sis_priv->rx_ring_dma); 1210 if (netif_msg_hw(sis_priv)) 1211 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1212 net_dev->name, sr32(rxdp)); 1213 } 1214 1215 /** 1216 * sis630_set_eq - set phy equalizer value for 630 LAN 1217 * @net_dev: the net device to set equalizer value 1218 * @revision: 630 LAN revision number 1219 * 1220 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1221 * PHY register 14h(Test) 1222 * Bit 14: 0 -- Automatically detect (default) 1223 * 1 -- Manually set Equalizer filter 1224 * Bit 13: 0 -- (Default) 1225 * 1 -- Speed up convergence of equalizer setting 1226 * Bit 9 : 0 -- (Default) 1227 * 1 -- Disable Baseline Wander 1228 * Bit 3~7 -- Equalizer filter setting 1229 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1230 * Then calculate equalizer value 1231 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1232 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1233 * Calculate Equalizer value: 1234 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. 1235 * When the equalizer is stable, this value is not a fixed value. It will be within 1236 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1237 * 0 <= max <= 4 --> set equalizer to max 1238 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1239 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1240 */ 1241 1242 static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1243 { 1244 struct sis900_private *sis_priv = netdev_priv(net_dev); 1245 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1246 int i, maxcount=10; 1247 1248 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1249 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1250 return; 1251 1252 if (netif_carrier_ok(net_dev)) { 1253 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1254 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1255 (0x2200 | reg14h) & 0xBFFF); 1256 for (i=0; i < maxcount; i++) { 1257 eq_value = (0x00F8 & mdio_read(net_dev, 1258 sis_priv->cur_phy, MII_RESV)) >> 3; 1259 if (i == 0) 1260 max_value=min_value=eq_value; 1261 max_value = (eq_value > max_value) ? 1262 eq_value : max_value; 1263 min_value = (eq_value < min_value) ? 1264 eq_value : min_value; 1265 } 1266 /* 630E rule to determine the equalizer value */ 1267 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1268 revision == SIS630ET_900_REV) { 1269 if (max_value < 5) 1270 eq_value = max_value; 1271 else if (max_value >= 5 && max_value < 15) 1272 eq_value = (max_value == min_value) ? 1273 max_value+2 : max_value+1; 1274 else if (max_value >= 15) 1275 eq_value=(max_value == min_value) ? 1276 max_value+6 : max_value+5; 1277 } 1278 /* 630B0&B1 rule to determine the equalizer value */ 1279 if (revision == SIS630A_900_REV && 1280 (sis_priv->host_bridge_rev == SIS630B0 || 1281 sis_priv->host_bridge_rev == SIS630B1)) { 1282 if (max_value == 0) 1283 eq_value = 3; 1284 else 1285 eq_value = (max_value + min_value + 1)/2; 1286 } 1287 /* write equalizer value and setting */ 1288 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1289 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1290 reg14h = (reg14h | 0x6000) & 0xFDFF; 1291 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1292 } else { 1293 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1294 if (revision == SIS630A_900_REV && 1295 (sis_priv->host_bridge_rev == SIS630B0 || 1296 sis_priv->host_bridge_rev == SIS630B1)) 1297 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1298 (reg14h | 0x2200) & 0xBFFF); 1299 else 1300 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1301 (reg14h | 0x2000) & 0xBFFF); 1302 } 1303 } 1304 1305 /** 1306 * sis900_timer - sis900 timer routine 1307 * @t: timer list containing a pointer to sis900 net device 1308 * 1309 * On each timer ticks we check two things, 1310 * link status (ON/OFF) and link mode (10/100/Full/Half) 1311 */ 1312 1313 static void sis900_timer(struct timer_list *t) 1314 { 1315 struct sis900_private *sis_priv = from_timer(sis_priv, t, timer); 1316 struct net_device *net_dev = sis_priv->mii_info.dev; 1317 struct mii_phy *mii_phy = sis_priv->mii; 1318 static const int next_tick = 5*HZ; 1319 int speed = 0, duplex = 0; 1320 u16 status; 1321 1322 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1323 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1324 1325 /* Link OFF -> ON */ 1326 if (!netif_carrier_ok(net_dev)) { 1327 LookForLink: 1328 /* Search for new PHY */ 1329 status = sis900_default_phy(net_dev); 1330 mii_phy = sis_priv->mii; 1331 1332 if (status & MII_STAT_LINK) { 1333 WARN_ON(!(status & MII_STAT_AUTO_DONE)); 1334 1335 sis900_read_mode(net_dev, &speed, &duplex); 1336 if (duplex) { 1337 sis900_set_mode(sis_priv, speed, duplex); 1338 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1339 netif_carrier_on(net_dev); 1340 } 1341 } 1342 } else { 1343 /* Link ON -> OFF */ 1344 if (!(status & MII_STAT_LINK)){ 1345 netif_carrier_off(net_dev); 1346 if(netif_msg_link(sis_priv)) 1347 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1348 1349 /* Change mode issue */ 1350 if ((mii_phy->phy_id0 == 0x001D) && 1351 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1352 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1353 1354 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1355 1356 goto LookForLink; 1357 } 1358 } 1359 1360 sis_priv->timer.expires = jiffies + next_tick; 1361 add_timer(&sis_priv->timer); 1362 } 1363 1364 /** 1365 * sis900_check_mode - check the media mode for sis900 1366 * @net_dev: the net device to be checked 1367 * @mii_phy: the mii phy 1368 * 1369 * Older driver gets the media mode from mii status output 1370 * register. Now we set our media capability and auto-negotiate 1371 * to get the upper bound of speed and duplex between two ends. 1372 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1373 * and autong_complete should be set to 1. 1374 */ 1375 1376 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1377 { 1378 struct sis900_private *sis_priv = netdev_priv(net_dev); 1379 void __iomem *ioaddr = sis_priv->ioaddr; 1380 int speed, duplex; 1381 1382 if (mii_phy->phy_types == LAN) { 1383 sw32(cfg, ~EXD & sr32(cfg)); 1384 sis900_set_capability(net_dev , mii_phy); 1385 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1386 } else { 1387 sw32(cfg, EXD | sr32(cfg)); 1388 speed = HW_SPEED_HOME; 1389 duplex = FDX_CAPABLE_HALF_SELECTED; 1390 sis900_set_mode(sis_priv, speed, duplex); 1391 sis_priv->autong_complete = 1; 1392 } 1393 } 1394 1395 /** 1396 * sis900_set_mode - Set the media mode of mac register. 1397 * @sp: the device private data 1398 * @speed : the transmit speed to be determined 1399 * @duplex: the duplex mode to be determined 1400 * 1401 * Set the media mode of mac register txcfg/rxcfg according to 1402 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1403 * bus is used instead of PCI bus. When this bit is set 1, the 1404 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1405 * double words. 1406 */ 1407 1408 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex) 1409 { 1410 void __iomem *ioaddr = sp->ioaddr; 1411 u32 tx_flags = 0, rx_flags = 0; 1412 1413 if (sr32( cfg) & EDB_MASTER_EN) { 1414 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1415 (TX_FILL_THRESH << TxFILLT_shift); 1416 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1417 } else { 1418 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1419 (TX_FILL_THRESH << TxFILLT_shift); 1420 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1421 } 1422 1423 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1424 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1425 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1426 } else { 1427 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1428 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1429 } 1430 1431 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1432 tx_flags |= (TxCSI | TxHBI); 1433 rx_flags |= RxATX; 1434 } 1435 1436 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1437 /* Can accept Jumbo packet */ 1438 rx_flags |= RxAJAB; 1439 #endif 1440 1441 sw32(txcfg, tx_flags); 1442 sw32(rxcfg, rx_flags); 1443 } 1444 1445 /** 1446 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1447 * @net_dev: the net device to read mode for 1448 * @phy_addr: mii phy address 1449 * 1450 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1451 * autong_complete should be set to 0 when starting auto-negotiation. 1452 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1453 * sis900_timer will wait for link on again if autong_complete = 0. 1454 */ 1455 1456 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1457 { 1458 struct sis900_private *sis_priv = netdev_priv(net_dev); 1459 int i = 0; 1460 u32 status; 1461 1462 for (i = 0; i < 2; i++) 1463 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1464 1465 if (!(status & MII_STAT_LINK)){ 1466 if(netif_msg_link(sis_priv)) 1467 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1468 sis_priv->autong_complete = 1; 1469 netif_carrier_off(net_dev); 1470 return; 1471 } 1472 1473 /* (Re)start AutoNegotiate */ 1474 mdio_write(net_dev, phy_addr, MII_CONTROL, 1475 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1476 sis_priv->autong_complete = 0; 1477 } 1478 1479 1480 /** 1481 * sis900_read_mode - read media mode for sis900 internal phy 1482 * @net_dev: the net device to read mode for 1483 * @speed : the transmit speed to be determined 1484 * @duplex : the duplex mode to be determined 1485 * 1486 * The capability of remote end will be put in mii register autorec 1487 * after auto-negotiation. Use AND operation to get the upper bound 1488 * of speed and duplex between two ends. 1489 */ 1490 1491 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1492 { 1493 struct sis900_private *sis_priv = netdev_priv(net_dev); 1494 struct mii_phy *phy = sis_priv->mii; 1495 int phy_addr = sis_priv->cur_phy; 1496 u32 status; 1497 u16 autoadv, autorec; 1498 int i; 1499 1500 for (i = 0; i < 2; i++) 1501 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1502 1503 if (!(status & MII_STAT_LINK)) 1504 return; 1505 1506 /* AutoNegotiate completed */ 1507 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1508 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1509 status = autoadv & autorec; 1510 1511 *speed = HW_SPEED_10_MBPS; 1512 *duplex = FDX_CAPABLE_HALF_SELECTED; 1513 1514 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1515 *speed = HW_SPEED_100_MBPS; 1516 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1517 *duplex = FDX_CAPABLE_FULL_SELECTED; 1518 1519 sis_priv->autong_complete = 1; 1520 1521 /* Workaround for Realtek RTL8201 PHY issue */ 1522 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1523 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1524 *duplex = FDX_CAPABLE_FULL_SELECTED; 1525 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1526 *speed = HW_SPEED_100_MBPS; 1527 } 1528 1529 if(netif_msg_link(sis_priv)) 1530 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n", 1531 net_dev->name, 1532 *speed == HW_SPEED_100_MBPS ? 1533 "100mbps" : "10mbps", 1534 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1535 "full" : "half"); 1536 } 1537 1538 /** 1539 * sis900_tx_timeout - sis900 transmit timeout routine 1540 * @net_dev: the net device to transmit 1541 * @txqueue: index of hanging queue 1542 * 1543 * print transmit timeout status 1544 * disable interrupts and do some tasks 1545 */ 1546 1547 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue) 1548 { 1549 struct sis900_private *sis_priv = netdev_priv(net_dev); 1550 void __iomem *ioaddr = sis_priv->ioaddr; 1551 unsigned long flags; 1552 int i; 1553 1554 if (netif_msg_tx_err(sis_priv)) { 1555 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n", 1556 net_dev->name, sr32(cr), sr32(isr)); 1557 } 1558 1559 /* Disable interrupts by clearing the interrupt mask. */ 1560 sw32(imr, 0x0000); 1561 1562 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1563 spin_lock_irqsave(&sis_priv->lock, flags); 1564 1565 /* discard unsent packets */ 1566 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1567 for (i = 0; i < NUM_TX_DESC; i++) { 1568 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1569 1570 if (skb) { 1571 dma_unmap_single(&sis_priv->pci_dev->dev, 1572 sis_priv->tx_ring[i].bufptr, 1573 skb->len, DMA_TO_DEVICE); 1574 dev_kfree_skb_irq(skb); 1575 sis_priv->tx_skbuff[i] = NULL; 1576 sis_priv->tx_ring[i].cmdsts = 0; 1577 sis_priv->tx_ring[i].bufptr = 0; 1578 net_dev->stats.tx_dropped++; 1579 } 1580 } 1581 sis_priv->tx_full = 0; 1582 netif_wake_queue(net_dev); 1583 1584 spin_unlock_irqrestore(&sis_priv->lock, flags); 1585 1586 netif_trans_update(net_dev); /* prevent tx timeout */ 1587 1588 /* load Transmit Descriptor Register */ 1589 sw32(txdp, sis_priv->tx_ring_dma); 1590 1591 /* Enable all known interrupts by setting the interrupt mask. */ 1592 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 1593 } 1594 1595 /** 1596 * sis900_start_xmit - sis900 start transmit routine 1597 * @skb: socket buffer pointer to put the data being transmitted 1598 * @net_dev: the net device to transmit with 1599 * 1600 * Set the transmit buffer descriptor, 1601 * and write TxENA to enable transmit state machine. 1602 * tell upper layer if the buffer is full 1603 */ 1604 1605 static netdev_tx_t 1606 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1607 { 1608 struct sis900_private *sis_priv = netdev_priv(net_dev); 1609 void __iomem *ioaddr = sis_priv->ioaddr; 1610 unsigned int entry; 1611 unsigned long flags; 1612 unsigned int index_cur_tx, index_dirty_tx; 1613 unsigned int count_dirty_tx; 1614 1615 spin_lock_irqsave(&sis_priv->lock, flags); 1616 1617 /* Calculate the next Tx descriptor entry. */ 1618 entry = sis_priv->cur_tx % NUM_TX_DESC; 1619 sis_priv->tx_skbuff[entry] = skb; 1620 1621 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1622 sis_priv->tx_ring[entry].bufptr = dma_map_single(&sis_priv->pci_dev->dev, 1623 skb->data, skb->len, 1624 DMA_TO_DEVICE); 1625 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1626 sis_priv->tx_ring[entry].bufptr))) { 1627 dev_kfree_skb_any(skb); 1628 sis_priv->tx_skbuff[entry] = NULL; 1629 net_dev->stats.tx_dropped++; 1630 spin_unlock_irqrestore(&sis_priv->lock, flags); 1631 return NETDEV_TX_OK; 1632 } 1633 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); 1634 sw32(cr, TxENA | sr32(cr)); 1635 1636 sis_priv->cur_tx ++; 1637 index_cur_tx = sis_priv->cur_tx; 1638 index_dirty_tx = sis_priv->dirty_tx; 1639 1640 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1641 count_dirty_tx ++; 1642 1643 if (index_cur_tx == index_dirty_tx) { 1644 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1645 sis_priv->tx_full = 1; 1646 netif_stop_queue(net_dev); 1647 } else if (count_dirty_tx < NUM_TX_DESC) { 1648 /* Typical path, tell upper layer that more transmission is possible */ 1649 netif_start_queue(net_dev); 1650 } else { 1651 /* buffer full, tell upper layer no more transmission */ 1652 sis_priv->tx_full = 1; 1653 netif_stop_queue(net_dev); 1654 } 1655 1656 spin_unlock_irqrestore(&sis_priv->lock, flags); 1657 1658 if (netif_msg_tx_queued(sis_priv)) 1659 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1660 "to slot %d.\n", 1661 net_dev->name, skb->data, (int)skb->len, entry); 1662 1663 return NETDEV_TX_OK; 1664 } 1665 1666 /** 1667 * sis900_interrupt - sis900 interrupt handler 1668 * @irq: the irq number 1669 * @dev_instance: the client data object 1670 * 1671 * The interrupt handler does all of the Rx thread work, 1672 * and cleans up after the Tx thread 1673 */ 1674 1675 static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1676 { 1677 struct net_device *net_dev = dev_instance; 1678 struct sis900_private *sis_priv = netdev_priv(net_dev); 1679 int boguscnt = max_interrupt_work; 1680 void __iomem *ioaddr = sis_priv->ioaddr; 1681 u32 status; 1682 unsigned int handled = 0; 1683 1684 spin_lock (&sis_priv->lock); 1685 1686 do { 1687 status = sr32(isr); 1688 1689 if ((status & (HIBERR|TxURN|TxERR|TxDESC|RxORN|RxERR|RxOK)) == 0) 1690 /* nothing interesting happened */ 1691 break; 1692 handled = 1; 1693 1694 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1695 if (status & (RxORN | RxERR | RxOK)) 1696 /* Rx interrupt */ 1697 sis900_rx(net_dev); 1698 1699 if (status & (TxURN | TxERR | TxDESC)) 1700 /* Tx interrupt */ 1701 sis900_finish_xmit(net_dev); 1702 1703 /* something strange happened !!! */ 1704 if (status & HIBERR) { 1705 if(netif_msg_intr(sis_priv)) 1706 printk(KERN_INFO "%s: Abnormal interrupt, " 1707 "status %#8.8x.\n", net_dev->name, status); 1708 break; 1709 } 1710 if (--boguscnt < 0) { 1711 if(netif_msg_intr(sis_priv)) 1712 printk(KERN_INFO "%s: Too much work at interrupt, " 1713 "interrupt status = %#8.8x.\n", 1714 net_dev->name, status); 1715 break; 1716 } 1717 } while (1); 1718 1719 if(netif_msg_intr(sis_priv)) 1720 printk(KERN_DEBUG "%s: exiting interrupt, " 1721 "interrupt status = %#8.8x\n", 1722 net_dev->name, sr32(isr)); 1723 1724 spin_unlock (&sis_priv->lock); 1725 return IRQ_RETVAL(handled); 1726 } 1727 1728 /** 1729 * sis900_rx - sis900 receive routine 1730 * @net_dev: the net device which receives data 1731 * 1732 * Process receive interrupt events, 1733 * put buffer to higher layer and refill buffer pool 1734 * Note: This function is called by interrupt handler, 1735 * don't do "too much" work here 1736 */ 1737 1738 static int sis900_rx(struct net_device *net_dev) 1739 { 1740 struct sis900_private *sis_priv = netdev_priv(net_dev); 1741 void __iomem *ioaddr = sis_priv->ioaddr; 1742 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1743 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1744 int rx_work_limit; 1745 1746 if (netif_msg_rx_status(sis_priv)) 1747 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1748 "status:0x%8.8x\n", 1749 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1750 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1751 1752 while (rx_status & OWN) { 1753 unsigned int rx_size; 1754 unsigned int data_size; 1755 1756 if (--rx_work_limit < 0) 1757 break; 1758 1759 data_size = rx_status & DSIZE; 1760 rx_size = data_size - CRC_SIZE; 1761 1762 #if IS_ENABLED(CONFIG_VLAN_8021Q) 1763 /* ``TOOLONG'' flag means jumbo packet received. */ 1764 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1765 rx_status &= (~ ((unsigned int)TOOLONG)); 1766 #endif 1767 1768 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1769 /* corrupted packet received */ 1770 if (netif_msg_rx_err(sis_priv)) 1771 printk(KERN_DEBUG "%s: Corrupted packet " 1772 "received, buffer status = 0x%8.8x/%d.\n", 1773 net_dev->name, rx_status, data_size); 1774 net_dev->stats.rx_errors++; 1775 if (rx_status & OVERRUN) 1776 net_dev->stats.rx_over_errors++; 1777 if (rx_status & (TOOLONG|RUNT)) 1778 net_dev->stats.rx_length_errors++; 1779 if (rx_status & (RXISERR | FAERR)) 1780 net_dev->stats.rx_frame_errors++; 1781 if (rx_status & CRCERR) 1782 net_dev->stats.rx_crc_errors++; 1783 /* reset buffer descriptor state */ 1784 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1785 } else { 1786 struct sk_buff * skb; 1787 struct sk_buff * rx_skb; 1788 1789 dma_unmap_single(&sis_priv->pci_dev->dev, 1790 sis_priv->rx_ring[entry].bufptr, 1791 RX_BUF_SIZE, DMA_FROM_DEVICE); 1792 1793 /* refill the Rx buffer, what if there is not enough 1794 * memory for new socket buffer ?? */ 1795 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { 1796 /* 1797 * Not enough memory to refill the buffer 1798 * so we need to recycle the old one so 1799 * as to avoid creating a memory hole 1800 * in the rx ring 1801 */ 1802 skb = sis_priv->rx_skbuff[entry]; 1803 net_dev->stats.rx_dropped++; 1804 goto refill_rx_ring; 1805 } 1806 1807 /* This situation should never happen, but due to 1808 some unknown bugs, it is possible that 1809 we are working on NULL sk_buff :-( */ 1810 if (sis_priv->rx_skbuff[entry] == NULL) { 1811 if (netif_msg_rx_err(sis_priv)) 1812 printk(KERN_WARNING "%s: NULL pointer " 1813 "encountered in Rx ring\n" 1814 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1815 net_dev->name, sis_priv->cur_rx, 1816 sis_priv->dirty_rx); 1817 dev_kfree_skb(skb); 1818 break; 1819 } 1820 1821 /* give the socket buffer to upper layers */ 1822 rx_skb = sis_priv->rx_skbuff[entry]; 1823 skb_put(rx_skb, rx_size); 1824 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1825 netif_rx(rx_skb); 1826 1827 /* some network statistics */ 1828 if ((rx_status & BCAST) == MCAST) 1829 net_dev->stats.multicast++; 1830 net_dev->stats.rx_bytes += rx_size; 1831 net_dev->stats.rx_packets++; 1832 sis_priv->dirty_rx++; 1833 refill_rx_ring: 1834 sis_priv->rx_skbuff[entry] = skb; 1835 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1836 sis_priv->rx_ring[entry].bufptr = 1837 dma_map_single(&sis_priv->pci_dev->dev, 1838 skb->data, RX_BUF_SIZE, 1839 DMA_FROM_DEVICE); 1840 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1841 sis_priv->rx_ring[entry].bufptr))) { 1842 dev_kfree_skb_irq(skb); 1843 sis_priv->rx_skbuff[entry] = NULL; 1844 break; 1845 } 1846 } 1847 sis_priv->cur_rx++; 1848 entry = sis_priv->cur_rx % NUM_RX_DESC; 1849 rx_status = sis_priv->rx_ring[entry].cmdsts; 1850 } // while 1851 1852 /* refill the Rx buffer, what if the rate of refilling is slower 1853 * than consuming ?? */ 1854 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1855 struct sk_buff *skb; 1856 1857 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1858 1859 if (sis_priv->rx_skbuff[entry] == NULL) { 1860 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE); 1861 if (skb == NULL) { 1862 /* not enough memory for skbuff, this makes a 1863 * "hole" on the buffer ring, it is not clear 1864 * how the hardware will react to this kind 1865 * of degenerated buffer */ 1866 net_dev->stats.rx_dropped++; 1867 break; 1868 } 1869 sis_priv->rx_skbuff[entry] = skb; 1870 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1871 sis_priv->rx_ring[entry].bufptr = 1872 dma_map_single(&sis_priv->pci_dev->dev, 1873 skb->data, RX_BUF_SIZE, 1874 DMA_FROM_DEVICE); 1875 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev, 1876 sis_priv->rx_ring[entry].bufptr))) { 1877 dev_kfree_skb_irq(skb); 1878 sis_priv->rx_skbuff[entry] = NULL; 1879 break; 1880 } 1881 } 1882 } 1883 /* re-enable the potentially idle receive state matchine */ 1884 sw32(cr , RxENA | sr32(cr)); 1885 1886 return 0; 1887 } 1888 1889 /** 1890 * sis900_finish_xmit - finish up transmission of packets 1891 * @net_dev: the net device to be transmitted on 1892 * 1893 * Check for error condition and free socket buffer etc 1894 * schedule for more transmission as needed 1895 * Note: This function is called by interrupt handler, 1896 * don't do "too much" work here 1897 */ 1898 1899 static void sis900_finish_xmit (struct net_device *net_dev) 1900 { 1901 struct sis900_private *sis_priv = netdev_priv(net_dev); 1902 1903 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1904 struct sk_buff *skb; 1905 unsigned int entry; 1906 u32 tx_status; 1907 1908 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1909 tx_status = sis_priv->tx_ring[entry].cmdsts; 1910 1911 if (tx_status & OWN) { 1912 /* The packet is not transmitted yet (owned by hardware) ! 1913 * Note: this is an almost impossible condition 1914 * on TxDESC interrupt ('descriptor interrupt') */ 1915 break; 1916 } 1917 1918 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1919 /* packet unsuccessfully transmitted */ 1920 if (netif_msg_tx_err(sis_priv)) 1921 printk(KERN_DEBUG "%s: Transmit " 1922 "error, Tx status %8.8x.\n", 1923 net_dev->name, tx_status); 1924 net_dev->stats.tx_errors++; 1925 if (tx_status & UNDERRUN) 1926 net_dev->stats.tx_fifo_errors++; 1927 if (tx_status & ABORT) 1928 net_dev->stats.tx_aborted_errors++; 1929 if (tx_status & NOCARRIER) 1930 net_dev->stats.tx_carrier_errors++; 1931 if (tx_status & OWCOLL) 1932 net_dev->stats.tx_window_errors++; 1933 } else { 1934 /* packet successfully transmitted */ 1935 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1936 net_dev->stats.tx_bytes += tx_status & DSIZE; 1937 net_dev->stats.tx_packets++; 1938 } 1939 /* Free the original skb. */ 1940 skb = sis_priv->tx_skbuff[entry]; 1941 dma_unmap_single(&sis_priv->pci_dev->dev, 1942 sis_priv->tx_ring[entry].bufptr, skb->len, 1943 DMA_TO_DEVICE); 1944 dev_consume_skb_irq(skb); 1945 sis_priv->tx_skbuff[entry] = NULL; 1946 sis_priv->tx_ring[entry].bufptr = 0; 1947 sis_priv->tx_ring[entry].cmdsts = 0; 1948 } 1949 1950 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1951 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1952 /* The ring is no longer full, clear tx_full and schedule 1953 * more transmission by netif_wake_queue(net_dev) */ 1954 sis_priv->tx_full = 0; 1955 netif_wake_queue (net_dev); 1956 } 1957 } 1958 1959 /** 1960 * sis900_close - close sis900 device 1961 * @net_dev: the net device to be closed 1962 * 1963 * Disable interrupts, stop the Tx and Rx Status Machine 1964 * free Tx and RX socket buffer 1965 */ 1966 1967 static int sis900_close(struct net_device *net_dev) 1968 { 1969 struct sis900_private *sis_priv = netdev_priv(net_dev); 1970 struct pci_dev *pdev = sis_priv->pci_dev; 1971 void __iomem *ioaddr = sis_priv->ioaddr; 1972 struct sk_buff *skb; 1973 int i; 1974 1975 netif_stop_queue(net_dev); 1976 1977 /* Disable interrupts by clearing the interrupt mask. */ 1978 sw32(imr, 0x0000); 1979 sw32(ier, 0x0000); 1980 1981 /* Stop the chip's Tx and Rx Status Machine */ 1982 sw32(cr, RxDIS | TxDIS | sr32(cr)); 1983 1984 del_timer(&sis_priv->timer); 1985 1986 free_irq(pdev->irq, net_dev); 1987 1988 /* Free Tx and RX skbuff */ 1989 for (i = 0; i < NUM_RX_DESC; i++) { 1990 skb = sis_priv->rx_skbuff[i]; 1991 if (skb) { 1992 dma_unmap_single(&pdev->dev, 1993 sis_priv->rx_ring[i].bufptr, 1994 RX_BUF_SIZE, DMA_FROM_DEVICE); 1995 dev_kfree_skb(skb); 1996 sis_priv->rx_skbuff[i] = NULL; 1997 } 1998 } 1999 for (i = 0; i < NUM_TX_DESC; i++) { 2000 skb = sis_priv->tx_skbuff[i]; 2001 if (skb) { 2002 dma_unmap_single(&pdev->dev, 2003 sis_priv->tx_ring[i].bufptr, 2004 skb->len, DMA_TO_DEVICE); 2005 dev_kfree_skb(skb); 2006 sis_priv->tx_skbuff[i] = NULL; 2007 } 2008 } 2009 2010 /* Green! Put the chip in low-power mode. */ 2011 2012 return 0; 2013 } 2014 2015 /** 2016 * sis900_get_drvinfo - Return information about driver 2017 * @net_dev: the net device to probe 2018 * @info: container for info returned 2019 * 2020 * Process ethtool command such as "ehtool -i" to show information 2021 */ 2022 2023 static void sis900_get_drvinfo(struct net_device *net_dev, 2024 struct ethtool_drvinfo *info) 2025 { 2026 struct sis900_private *sis_priv = netdev_priv(net_dev); 2027 2028 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver)); 2029 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version)); 2030 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev), 2031 sizeof(info->bus_info)); 2032 } 2033 2034 static u32 sis900_get_msglevel(struct net_device *net_dev) 2035 { 2036 struct sis900_private *sis_priv = netdev_priv(net_dev); 2037 return sis_priv->msg_enable; 2038 } 2039 2040 static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 2041 { 2042 struct sis900_private *sis_priv = netdev_priv(net_dev); 2043 sis_priv->msg_enable = value; 2044 } 2045 2046 static u32 sis900_get_link(struct net_device *net_dev) 2047 { 2048 struct sis900_private *sis_priv = netdev_priv(net_dev); 2049 return mii_link_ok(&sis_priv->mii_info); 2050 } 2051 2052 static int sis900_get_link_ksettings(struct net_device *net_dev, 2053 struct ethtool_link_ksettings *cmd) 2054 { 2055 struct sis900_private *sis_priv = netdev_priv(net_dev); 2056 spin_lock_irq(&sis_priv->lock); 2057 mii_ethtool_get_link_ksettings(&sis_priv->mii_info, cmd); 2058 spin_unlock_irq(&sis_priv->lock); 2059 return 0; 2060 } 2061 2062 static int sis900_set_link_ksettings(struct net_device *net_dev, 2063 const struct ethtool_link_ksettings *cmd) 2064 { 2065 struct sis900_private *sis_priv = netdev_priv(net_dev); 2066 int rt; 2067 spin_lock_irq(&sis_priv->lock); 2068 rt = mii_ethtool_set_link_ksettings(&sis_priv->mii_info, cmd); 2069 spin_unlock_irq(&sis_priv->lock); 2070 return rt; 2071 } 2072 2073 static int sis900_nway_reset(struct net_device *net_dev) 2074 { 2075 struct sis900_private *sis_priv = netdev_priv(net_dev); 2076 return mii_nway_restart(&sis_priv->mii_info); 2077 } 2078 2079 /** 2080 * sis900_set_wol - Set up Wake on Lan registers 2081 * @net_dev: the net device to probe 2082 * @wol: container for info passed to the driver 2083 * 2084 * Process ethtool command "wol" to setup wake on lan features. 2085 * SiS900 supports sending WoL events if a correct packet is received, 2086 * but there is no simple way to filter them to only a subset (broadcast, 2087 * multicast, unicast or arp). 2088 */ 2089 2090 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2091 { 2092 struct sis900_private *sis_priv = netdev_priv(net_dev); 2093 void __iomem *ioaddr = sis_priv->ioaddr; 2094 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2095 2096 if (wol->wolopts == 0) { 2097 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2098 cfgpmcsr &= ~PME_EN; 2099 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2100 sw32(pmctrl, pmctrl_bits); 2101 if (netif_msg_wol(sis_priv)) 2102 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2103 return 0; 2104 } 2105 2106 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2107 | WAKE_BCAST | WAKE_ARP)) 2108 return -EINVAL; 2109 2110 if (wol->wolopts & WAKE_MAGIC) 2111 pmctrl_bits |= MAGICPKT; 2112 if (wol->wolopts & WAKE_PHY) 2113 pmctrl_bits |= LINKON; 2114 2115 sw32(pmctrl, pmctrl_bits); 2116 2117 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2118 cfgpmcsr |= PME_EN; 2119 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2120 if (netif_msg_wol(sis_priv)) 2121 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2122 2123 return 0; 2124 } 2125 2126 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2127 { 2128 struct sis900_private *sp = netdev_priv(net_dev); 2129 void __iomem *ioaddr = sp->ioaddr; 2130 u32 pmctrl_bits; 2131 2132 pmctrl_bits = sr32(pmctrl); 2133 if (pmctrl_bits & MAGICPKT) 2134 wol->wolopts |= WAKE_MAGIC; 2135 if (pmctrl_bits & LINKON) 2136 wol->wolopts |= WAKE_PHY; 2137 2138 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2139 } 2140 2141 static int sis900_get_eeprom_len(struct net_device *dev) 2142 { 2143 struct sis900_private *sis_priv = netdev_priv(dev); 2144 2145 return sis_priv->eeprom_size; 2146 } 2147 2148 static int sis900_read_eeprom(struct net_device *net_dev, u8 *buf) 2149 { 2150 struct sis900_private *sis_priv = netdev_priv(net_dev); 2151 void __iomem *ioaddr = sis_priv->ioaddr; 2152 int wait, ret = -EAGAIN; 2153 u16 signature; 2154 u16 *ebuf = (u16 *)buf; 2155 int i; 2156 2157 if (sis_priv->chipset_rev == SIS96x_900_REV) { 2158 sw32(mear, EEREQ); 2159 for (wait = 0; wait < 2000; wait++) { 2160 if (sr32(mear) & EEGNT) { 2161 /* read 16 bits, and index by 16 bits */ 2162 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2163 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2164 ret = 0; 2165 break; 2166 } 2167 udelay(1); 2168 } 2169 sw32(mear, EEDONE); 2170 } else { 2171 signature = (u16)read_eeprom(ioaddr, EEPROMSignature); 2172 if (signature != 0xffff && signature != 0x0000) { 2173 /* read 16 bits, and index by 16 bits */ 2174 for (i = 0; i < sis_priv->eeprom_size / 2; i++) 2175 ebuf[i] = (u16)read_eeprom(ioaddr, i); 2176 ret = 0; 2177 } 2178 } 2179 return ret; 2180 } 2181 2182 #define SIS900_EEPROM_MAGIC 0xBABE 2183 static int sis900_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 2184 { 2185 struct sis900_private *sis_priv = netdev_priv(dev); 2186 u8 *eebuf; 2187 int res; 2188 2189 eebuf = kmalloc(sis_priv->eeprom_size, GFP_KERNEL); 2190 if (!eebuf) 2191 return -ENOMEM; 2192 2193 eeprom->magic = SIS900_EEPROM_MAGIC; 2194 spin_lock_irq(&sis_priv->lock); 2195 res = sis900_read_eeprom(dev, eebuf); 2196 spin_unlock_irq(&sis_priv->lock); 2197 if (!res) 2198 memcpy(data, eebuf + eeprom->offset, eeprom->len); 2199 kfree(eebuf); 2200 return res; 2201 } 2202 2203 static const struct ethtool_ops sis900_ethtool_ops = { 2204 .get_drvinfo = sis900_get_drvinfo, 2205 .get_msglevel = sis900_get_msglevel, 2206 .set_msglevel = sis900_set_msglevel, 2207 .get_link = sis900_get_link, 2208 .nway_reset = sis900_nway_reset, 2209 .get_wol = sis900_get_wol, 2210 .set_wol = sis900_set_wol, 2211 .get_link_ksettings = sis900_get_link_ksettings, 2212 .set_link_ksettings = sis900_set_link_ksettings, 2213 .get_eeprom_len = sis900_get_eeprom_len, 2214 .get_eeprom = sis900_get_eeprom, 2215 }; 2216 2217 /** 2218 * mii_ioctl - process MII i/o control command 2219 * @net_dev: the net device to command for 2220 * @rq: parameter for command 2221 * @cmd: the i/o command 2222 * 2223 * Process MII command like read/write MII register 2224 */ 2225 2226 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2227 { 2228 struct sis900_private *sis_priv = netdev_priv(net_dev); 2229 struct mii_ioctl_data *data = if_mii(rq); 2230 2231 switch(cmd) { 2232 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2233 data->phy_id = sis_priv->mii->phy_addr; 2234 fallthrough; 2235 2236 case SIOCGMIIREG: /* Read MII PHY register. */ 2237 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2238 return 0; 2239 2240 case SIOCSMIIREG: /* Write MII PHY register. */ 2241 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2242 return 0; 2243 default: 2244 return -EOPNOTSUPP; 2245 } 2246 } 2247 2248 /** 2249 * sis900_set_config - Set media type by net_device.set_config 2250 * @dev: the net device for media type change 2251 * @map: ifmap passed by ifconfig 2252 * 2253 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2254 * we support only port changes. All other runtime configuration 2255 * changes will be ignored 2256 */ 2257 2258 static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2259 { 2260 struct sis900_private *sis_priv = netdev_priv(dev); 2261 struct mii_phy *mii_phy = sis_priv->mii; 2262 2263 u16 status; 2264 2265 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2266 /* we switch on the ifmap->port field. I couldn't find anything 2267 * like a definition or standard for the values of that field. 2268 * I think the meaning of those values is device specific. But 2269 * since I would like to change the media type via the ifconfig 2270 * command I use the definition from linux/netdevice.h 2271 * (which seems to be different from the ifport(pcmcia) definition) */ 2272 switch(map->port){ 2273 case IF_PORT_UNKNOWN: /* use auto here */ 2274 dev->if_port = map->port; 2275 /* we are going to change the media type, so the Link 2276 * will be temporary down and we need to reflect that 2277 * here. When the Link comes up again, it will be 2278 * sensed by the sis_timer procedure, which also does 2279 * all the rest for us */ 2280 netif_carrier_off(dev); 2281 2282 /* read current state */ 2283 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2284 2285 /* enable auto negotiation and reset the negotioation 2286 * (I don't really know what the auto negatiotiation 2287 * reset really means, but it sounds for me right to 2288 * do one here) */ 2289 mdio_write(dev, mii_phy->phy_addr, 2290 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2291 2292 break; 2293 2294 case IF_PORT_10BASET: /* 10BaseT */ 2295 dev->if_port = map->port; 2296 2297 /* we are going to change the media type, so the Link 2298 * will be temporary down and we need to reflect that 2299 * here. When the Link comes up again, it will be 2300 * sensed by the sis_timer procedure, which also does 2301 * all the rest for us */ 2302 netif_carrier_off(dev); 2303 2304 /* set Speed to 10Mbps */ 2305 /* read current state */ 2306 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2307 2308 /* disable auto negotiation and force 10MBit mode*/ 2309 mdio_write(dev, mii_phy->phy_addr, 2310 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2311 MII_CNTL_AUTO)); 2312 break; 2313 2314 case IF_PORT_100BASET: /* 100BaseT */ 2315 case IF_PORT_100BASETX: /* 100BaseTx */ 2316 dev->if_port = map->port; 2317 2318 /* we are going to change the media type, so the Link 2319 * will be temporary down and we need to reflect that 2320 * here. When the Link comes up again, it will be 2321 * sensed by the sis_timer procedure, which also does 2322 * all the rest for us */ 2323 netif_carrier_off(dev); 2324 2325 /* set Speed to 100Mbps */ 2326 /* disable auto negotiation and enable 100MBit Mode */ 2327 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2328 mdio_write(dev, mii_phy->phy_addr, 2329 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2330 MII_CNTL_SPEED); 2331 2332 break; 2333 2334 case IF_PORT_10BASE2: /* 10Base2 */ 2335 case IF_PORT_AUI: /* AUI */ 2336 case IF_PORT_100BASEFX: /* 100BaseFx */ 2337 /* These Modes are not supported (are they?)*/ 2338 return -EOPNOTSUPP; 2339 2340 default: 2341 return -EINVAL; 2342 } 2343 } 2344 return 0; 2345 } 2346 2347 /** 2348 * sis900_mcast_bitnr - compute hashtable index 2349 * @addr: multicast address 2350 * @revision: revision id of chip 2351 * 2352 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2353 * hash table, which makes this function a little bit different from other drivers 2354 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2355 * multicast hash table. 2356 */ 2357 2358 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2359 { 2360 2361 u32 crc = ether_crc(6, addr); 2362 2363 /* leave 8 or 7 most siginifant bits */ 2364 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2365 return (int)(crc >> 24); 2366 else 2367 return (int)(crc >> 25); 2368 } 2369 2370 /** 2371 * set_rx_mode - Set SiS900 receive mode 2372 * @net_dev: the net device to be set 2373 * 2374 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2375 * And set the appropriate multicast filter. 2376 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2377 */ 2378 2379 static void set_rx_mode(struct net_device *net_dev) 2380 { 2381 struct sis900_private *sis_priv = netdev_priv(net_dev); 2382 void __iomem *ioaddr = sis_priv->ioaddr; 2383 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2384 int i, table_entries; 2385 u32 rx_mode; 2386 2387 /* 635 Hash Table entries = 256(2^16) */ 2388 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2389 (sis_priv->chipset_rev == SIS900B_900_REV)) 2390 table_entries = 16; 2391 else 2392 table_entries = 8; 2393 2394 if (net_dev->flags & IFF_PROMISC) { 2395 /* Accept any kinds of packets */ 2396 rx_mode = RFPromiscuous; 2397 for (i = 0; i < table_entries; i++) 2398 mc_filter[i] = 0xffff; 2399 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) || 2400 (net_dev->flags & IFF_ALLMULTI)) { 2401 /* too many multicast addresses or accept all multicast packet */ 2402 rx_mode = RFAAB | RFAAM; 2403 for (i = 0; i < table_entries; i++) 2404 mc_filter[i] = 0xffff; 2405 } else { 2406 /* Accept Broadcast packet, destination address matchs our 2407 * MAC address, use Receive Filter to reject unwanted MCAST 2408 * packets */ 2409 struct netdev_hw_addr *ha; 2410 rx_mode = RFAAB; 2411 2412 netdev_for_each_mc_addr(ha, net_dev) { 2413 unsigned int bit_nr; 2414 2415 bit_nr = sis900_mcast_bitnr(ha->addr, 2416 sis_priv->chipset_rev); 2417 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2418 } 2419 } 2420 2421 /* update Multicast Hash Table in Receive Filter */ 2422 for (i = 0; i < table_entries; i++) { 2423 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2424 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift); 2425 sw32(rfdr, mc_filter[i]); 2426 } 2427 2428 sw32(rfcr, RFEN | rx_mode); 2429 2430 /* sis900 is capable of looping back packets at MAC level for 2431 * debugging purpose */ 2432 if (net_dev->flags & IFF_LOOPBACK) { 2433 u32 cr_saved; 2434 /* We must disable Tx/Rx before setting loopback mode */ 2435 cr_saved = sr32(cr); 2436 sw32(cr, cr_saved | TxDIS | RxDIS); 2437 /* enable loopback */ 2438 sw32(txcfg, sr32(txcfg) | TxMLB); 2439 sw32(rxcfg, sr32(rxcfg) | RxATX); 2440 /* restore cr */ 2441 sw32(cr, cr_saved); 2442 } 2443 } 2444 2445 /** 2446 * sis900_reset - Reset sis900 MAC 2447 * @net_dev: the net device to reset 2448 * 2449 * reset sis900 MAC and wait until finished 2450 * reset through command register 2451 * change backoff algorithm for 900B0 & 635 M/B 2452 */ 2453 2454 static void sis900_reset(struct net_device *net_dev) 2455 { 2456 struct sis900_private *sis_priv = netdev_priv(net_dev); 2457 void __iomem *ioaddr = sis_priv->ioaddr; 2458 u32 status = TxRCMP | RxRCMP; 2459 int i; 2460 2461 sw32(ier, 0); 2462 sw32(imr, 0); 2463 sw32(rfcr, 0); 2464 2465 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr)); 2466 2467 /* Check that the chip has finished the reset. */ 2468 for (i = 0; status && (i < 1000); i++) 2469 status ^= sr32(isr) & status; 2470 2471 if (sis_priv->chipset_rev >= SIS635A_900_REV || 2472 sis_priv->chipset_rev == SIS900B_900_REV) 2473 sw32(cfg, PESEL | RND_CNT); 2474 else 2475 sw32(cfg, PESEL); 2476 } 2477 2478 /** 2479 * sis900_remove - Remove sis900 device 2480 * @pci_dev: the pci device to be removed 2481 * 2482 * remove and release SiS900 net device 2483 */ 2484 2485 static void sis900_remove(struct pci_dev *pci_dev) 2486 { 2487 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2488 struct sis900_private *sis_priv = netdev_priv(net_dev); 2489 2490 unregister_netdev(net_dev); 2491 2492 while (sis_priv->first_mii) { 2493 struct mii_phy *phy = sis_priv->first_mii; 2494 2495 sis_priv->first_mii = phy->next; 2496 kfree(phy); 2497 } 2498 2499 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2500 sis_priv->rx_ring_dma); 2501 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2502 sis_priv->tx_ring_dma); 2503 pci_iounmap(pci_dev, sis_priv->ioaddr); 2504 free_netdev(net_dev); 2505 } 2506 2507 static int __maybe_unused sis900_suspend(struct device *dev) 2508 { 2509 struct net_device *net_dev = dev_get_drvdata(dev); 2510 struct sis900_private *sis_priv = netdev_priv(net_dev); 2511 void __iomem *ioaddr = sis_priv->ioaddr; 2512 2513 if(!netif_running(net_dev)) 2514 return 0; 2515 2516 netif_stop_queue(net_dev); 2517 netif_device_detach(net_dev); 2518 2519 /* Stop the chip's Tx and Rx Status Machine */ 2520 sw32(cr, RxDIS | TxDIS | sr32(cr)); 2521 2522 return 0; 2523 } 2524 2525 static int __maybe_unused sis900_resume(struct device *dev) 2526 { 2527 struct net_device *net_dev = dev_get_drvdata(dev); 2528 struct sis900_private *sis_priv = netdev_priv(net_dev); 2529 void __iomem *ioaddr = sis_priv->ioaddr; 2530 2531 if(!netif_running(net_dev)) 2532 return 0; 2533 2534 sis900_init_rxfilter(net_dev); 2535 2536 sis900_init_tx_ring(net_dev); 2537 sis900_init_rx_ring(net_dev); 2538 2539 set_rx_mode(net_dev); 2540 2541 netif_device_attach(net_dev); 2542 netif_start_queue(net_dev); 2543 2544 /* Workaround for EDB */ 2545 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2546 2547 /* Enable all known interrupts by setting the interrupt mask. */ 2548 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC); 2549 sw32(cr, RxENA | sr32(cr)); 2550 sw32(ier, IE); 2551 2552 sis900_check_mode(net_dev, sis_priv->mii); 2553 2554 return 0; 2555 } 2556 2557 static SIMPLE_DEV_PM_OPS(sis900_pm_ops, sis900_suspend, sis900_resume); 2558 2559 static struct pci_driver sis900_pci_driver = { 2560 .name = SIS900_MODULE_NAME, 2561 .id_table = sis900_pci_tbl, 2562 .probe = sis900_probe, 2563 .remove = sis900_remove, 2564 .driver.pm = &sis900_pm_ops, 2565 }; 2566 2567 static int __init sis900_init_module(void) 2568 { 2569 /* when a module, this is printed whether or not devices are found in probe */ 2570 #ifdef MODULE 2571 printk(version); 2572 #endif 2573 2574 return pci_register_driver(&sis900_pci_driver); 2575 } 2576 2577 static void __exit sis900_cleanup_module(void) 2578 { 2579 pci_unregister_driver(&sis900_pci_driver); 2580 } 2581 2582 module_init(sis900_init_module); 2583 module_exit(sis900_cleanup_module); 2584 2585