1874aeea5SJeff Kirsher /**************************************************************************** 2f7a6d2c4SBen Hutchings * Driver for Solarflare network controllers and boards 3874aeea5SJeff Kirsher * Copyright 2005-2006 Fen Systems Ltd. 4f7a6d2c4SBen Hutchings * Copyright 2005-2013 Solarflare Communications Inc. 5874aeea5SJeff Kirsher * 6874aeea5SJeff Kirsher * This program is free software; you can redistribute it and/or modify it 7874aeea5SJeff Kirsher * under the terms of the GNU General Public License version 2 as published 8874aeea5SJeff Kirsher * by the Free Software Foundation, incorporated herein by reference. 9874aeea5SJeff Kirsher */ 10874aeea5SJeff Kirsher 11874aeea5SJeff Kirsher #include <linux/pci.h> 12874aeea5SJeff Kirsher #include <linux/tcp.h> 13874aeea5SJeff Kirsher #include <linux/ip.h> 14874aeea5SJeff Kirsher #include <linux/in.h> 15874aeea5SJeff Kirsher #include <linux/ipv6.h> 16874aeea5SJeff Kirsher #include <linux/slab.h> 17874aeea5SJeff Kirsher #include <net/ipv6.h> 18874aeea5SJeff Kirsher #include <linux/if_ether.h> 19874aeea5SJeff Kirsher #include <linux/highmem.h> 20183233beSBen Hutchings #include <linux/cache.h> 21874aeea5SJeff Kirsher #include "net_driver.h" 22874aeea5SJeff Kirsher #include "efx.h" 23183233beSBen Hutchings #include "io.h" 24874aeea5SJeff Kirsher #include "nic.h" 25874aeea5SJeff Kirsher #include "workarounds.h" 26dfa50be9SBen Hutchings #include "ef10_regs.h" 27874aeea5SJeff Kirsher 28183233beSBen Hutchings #ifdef EFX_USE_PIO 29183233beSBen Hutchings 30183233beSBen Hutchings #define EFX_PIOBUF_SIZE_MAX ER_DZ_TX_PIOBUF_SIZE 31183233beSBen Hutchings #define EFX_PIOBUF_SIZE_DEF ALIGN(256, L1_CACHE_BYTES) 32183233beSBen Hutchings unsigned int efx_piobuf_size __read_mostly = EFX_PIOBUF_SIZE_DEF; 33183233beSBen Hutchings 34183233beSBen Hutchings #endif /* EFX_USE_PIO */ 35183233beSBen Hutchings 360fe5565bSBen Hutchings static inline unsigned int 370fe5565bSBen Hutchings efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue) 380fe5565bSBen Hutchings { 390fe5565bSBen Hutchings return tx_queue->insert_count & tx_queue->ptr_mask; 400fe5565bSBen Hutchings } 410fe5565bSBen Hutchings 420fe5565bSBen Hutchings static inline struct efx_tx_buffer * 430fe5565bSBen Hutchings __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 440fe5565bSBen Hutchings { 450fe5565bSBen Hutchings return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; 460fe5565bSBen Hutchings } 470fe5565bSBen Hutchings 480fe5565bSBen Hutchings static inline struct efx_tx_buffer * 490fe5565bSBen Hutchings efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 500fe5565bSBen Hutchings { 510fe5565bSBen Hutchings struct efx_tx_buffer *buffer = 520fe5565bSBen Hutchings __efx_tx_queue_get_insert_buffer(tx_queue); 530fe5565bSBen Hutchings 540fe5565bSBen Hutchings EFX_BUG_ON_PARANOID(buffer->len); 550fe5565bSBen Hutchings EFX_BUG_ON_PARANOID(buffer->flags); 560fe5565bSBen Hutchings EFX_BUG_ON_PARANOID(buffer->unmap_len); 570fe5565bSBen Hutchings 580fe5565bSBen Hutchings return buffer; 590fe5565bSBen Hutchings } 600fe5565bSBen Hutchings 61874aeea5SJeff Kirsher static void efx_dequeue_buffer(struct efx_tx_queue *tx_queue, 62c3940999STom Herbert struct efx_tx_buffer *buffer, 63c3940999STom Herbert unsigned int *pkts_compl, 64c3940999STom Herbert unsigned int *bytes_compl) 65874aeea5SJeff Kirsher { 66874aeea5SJeff Kirsher if (buffer->unmap_len) { 670e33d870SBen Hutchings struct device *dma_dev = &tx_queue->efx->pci_dev->dev; 682acdb92eSAlexandre Rames dma_addr_t unmap_addr = buffer->dma_addr - buffer->dma_offset; 697668ff9cSBen Hutchings if (buffer->flags & EFX_TX_BUF_MAP_SINGLE) 700e33d870SBen Hutchings dma_unmap_single(dma_dev, unmap_addr, buffer->unmap_len, 710e33d870SBen Hutchings DMA_TO_DEVICE); 72874aeea5SJeff Kirsher else 730e33d870SBen Hutchings dma_unmap_page(dma_dev, unmap_addr, buffer->unmap_len, 740e33d870SBen Hutchings DMA_TO_DEVICE); 75874aeea5SJeff Kirsher buffer->unmap_len = 0; 76874aeea5SJeff Kirsher } 77874aeea5SJeff Kirsher 787668ff9cSBen Hutchings if (buffer->flags & EFX_TX_BUF_SKB) { 79c3940999STom Herbert (*pkts_compl)++; 80c3940999STom Herbert (*bytes_compl) += buffer->skb->len; 814ef6dae4SRick Jones dev_consume_skb_any((struct sk_buff *)buffer->skb); 82874aeea5SJeff Kirsher netif_vdbg(tx_queue->efx, tx_done, tx_queue->efx->net_dev, 83874aeea5SJeff Kirsher "TX queue %d transmission id %x complete\n", 84874aeea5SJeff Kirsher tx_queue->queue, tx_queue->read_count); 85f7251a9cSBen Hutchings } else if (buffer->flags & EFX_TX_BUF_HEAP) { 86f7251a9cSBen Hutchings kfree(buffer->heap_buf); 87874aeea5SJeff Kirsher } 887668ff9cSBen Hutchings 89f7251a9cSBen Hutchings buffer->len = 0; 90f7251a9cSBen Hutchings buffer->flags = 0; 91874aeea5SJeff Kirsher } 92874aeea5SJeff Kirsher 93874aeea5SJeff Kirsher static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue, 94874aeea5SJeff Kirsher struct sk_buff *skb); 95874aeea5SJeff Kirsher 96874aeea5SJeff Kirsher static inline unsigned 97874aeea5SJeff Kirsher efx_max_tx_len(struct efx_nic *efx, dma_addr_t dma_addr) 98874aeea5SJeff Kirsher { 99874aeea5SJeff Kirsher /* Depending on the NIC revision, we can use descriptor 100874aeea5SJeff Kirsher * lengths up to 8K or 8K-1. However, since PCI Express 101874aeea5SJeff Kirsher * devices must split read requests at 4K boundaries, there is 102874aeea5SJeff Kirsher * little benefit from using descriptors that cross those 103874aeea5SJeff Kirsher * boundaries and we keep things simple by not doing so. 104874aeea5SJeff Kirsher */ 1055b6262d0SBen Hutchings unsigned len = (~dma_addr & (EFX_PAGE_SIZE - 1)) + 1; 106874aeea5SJeff Kirsher 107874aeea5SJeff Kirsher /* Work around hardware bug for unaligned buffers. */ 108874aeea5SJeff Kirsher if (EFX_WORKAROUND_5391(efx) && (dma_addr & 0xf)) 109874aeea5SJeff Kirsher len = min_t(unsigned, len, 512 - (dma_addr & 0xf)); 110874aeea5SJeff Kirsher 111874aeea5SJeff Kirsher return len; 112874aeea5SJeff Kirsher } 113874aeea5SJeff Kirsher 1147e6d06f0SBen Hutchings unsigned int efx_tx_max_skb_descs(struct efx_nic *efx) 1157e6d06f0SBen Hutchings { 1167e6d06f0SBen Hutchings /* Header and payload descriptor for each output segment, plus 1177e6d06f0SBen Hutchings * one for every input fragment boundary within a segment 1187e6d06f0SBen Hutchings */ 1197e6d06f0SBen Hutchings unsigned int max_descs = EFX_TSO_MAX_SEGS * 2 + MAX_SKB_FRAGS; 1207e6d06f0SBen Hutchings 121dfa50be9SBen Hutchings /* Possibly one more per segment for the alignment workaround, 122dfa50be9SBen Hutchings * or for option descriptors 123dfa50be9SBen Hutchings */ 124dfa50be9SBen Hutchings if (EFX_WORKAROUND_5391(efx) || efx_nic_rev(efx) >= EFX_REV_HUNT_A0) 1257e6d06f0SBen Hutchings max_descs += EFX_TSO_MAX_SEGS; 1267e6d06f0SBen Hutchings 1277e6d06f0SBen Hutchings /* Possibly more for PCIe page boundaries within input fragments */ 1287e6d06f0SBen Hutchings if (PAGE_SIZE > EFX_PAGE_SIZE) 1297e6d06f0SBen Hutchings max_descs += max_t(unsigned int, MAX_SKB_FRAGS, 1307e6d06f0SBen Hutchings DIV_ROUND_UP(GSO_MAX_SIZE, EFX_PAGE_SIZE)); 1317e6d06f0SBen Hutchings 1327e6d06f0SBen Hutchings return max_descs; 1337e6d06f0SBen Hutchings } 1347e6d06f0SBen Hutchings 13514bf718fSBen Hutchings static void efx_tx_maybe_stop_queue(struct efx_tx_queue *txq1) 13614bf718fSBen Hutchings { 13714bf718fSBen Hutchings /* We need to consider both queues that the net core sees as one */ 13814bf718fSBen Hutchings struct efx_tx_queue *txq2 = efx_tx_queue_partner(txq1); 13914bf718fSBen Hutchings struct efx_nic *efx = txq1->efx; 14014bf718fSBen Hutchings unsigned int fill_level; 14114bf718fSBen Hutchings 14214bf718fSBen Hutchings fill_level = max(txq1->insert_count - txq1->old_read_count, 14314bf718fSBen Hutchings txq2->insert_count - txq2->old_read_count); 14414bf718fSBen Hutchings if (likely(fill_level < efx->txq_stop_thresh)) 14514bf718fSBen Hutchings return; 14614bf718fSBen Hutchings 14714bf718fSBen Hutchings /* We used the stale old_read_count above, which gives us a 14814bf718fSBen Hutchings * pessimistic estimate of the fill level (which may even 14914bf718fSBen Hutchings * validly be >= efx->txq_entries). Now try again using 15014bf718fSBen Hutchings * read_count (more likely to be a cache miss). 15114bf718fSBen Hutchings * 15214bf718fSBen Hutchings * If we read read_count and then conditionally stop the 15314bf718fSBen Hutchings * queue, it is possible for the completion path to race with 15414bf718fSBen Hutchings * us and complete all outstanding descriptors in the middle, 15514bf718fSBen Hutchings * after which there will be no more completions to wake it. 15614bf718fSBen Hutchings * Therefore we stop the queue first, then read read_count 15714bf718fSBen Hutchings * (with a memory barrier to ensure the ordering), then 15814bf718fSBen Hutchings * restart the queue if the fill level turns out to be low 15914bf718fSBen Hutchings * enough. 16014bf718fSBen Hutchings */ 16114bf718fSBen Hutchings netif_tx_stop_queue(txq1->core_txq); 16214bf718fSBen Hutchings smp_mb(); 16314bf718fSBen Hutchings txq1->old_read_count = ACCESS_ONCE(txq1->read_count); 16414bf718fSBen Hutchings txq2->old_read_count = ACCESS_ONCE(txq2->read_count); 16514bf718fSBen Hutchings 16614bf718fSBen Hutchings fill_level = max(txq1->insert_count - txq1->old_read_count, 16714bf718fSBen Hutchings txq2->insert_count - txq2->old_read_count); 16814bf718fSBen Hutchings EFX_BUG_ON_PARANOID(fill_level >= efx->txq_entries); 16914bf718fSBen Hutchings if (likely(fill_level < efx->txq_stop_thresh)) { 17014bf718fSBen Hutchings smp_mb(); 17114bf718fSBen Hutchings if (likely(!efx->loopback_selftest)) 17214bf718fSBen Hutchings netif_tx_start_queue(txq1->core_txq); 17314bf718fSBen Hutchings } 17414bf718fSBen Hutchings } 17514bf718fSBen Hutchings 176ee45fd92SJon Cooper #ifdef EFX_USE_PIO 177ee45fd92SJon Cooper 178ee45fd92SJon Cooper struct efx_short_copy_buffer { 179ee45fd92SJon Cooper int used; 180ee45fd92SJon Cooper u8 buf[L1_CACHE_BYTES]; 181ee45fd92SJon Cooper }; 182ee45fd92SJon Cooper 183ee45fd92SJon Cooper /* Copy to PIO, respecting that writes to PIO buffers must be dword aligned. 184ee45fd92SJon Cooper * Advances piobuf pointer. Leaves additional data in the copy buffer. 185ee45fd92SJon Cooper */ 186ee45fd92SJon Cooper static void efx_memcpy_toio_aligned(struct efx_nic *efx, u8 __iomem **piobuf, 187ee45fd92SJon Cooper u8 *data, int len, 188ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 189ee45fd92SJon Cooper { 190ee45fd92SJon Cooper int block_len = len & ~(sizeof(copy_buf->buf) - 1); 191ee45fd92SJon Cooper 1924984c237SBen Hutchings __iowrite64_copy(*piobuf, data, block_len >> 3); 193ee45fd92SJon Cooper *piobuf += block_len; 194ee45fd92SJon Cooper len -= block_len; 195ee45fd92SJon Cooper 196ee45fd92SJon Cooper if (len) { 197ee45fd92SJon Cooper data += block_len; 198ee45fd92SJon Cooper BUG_ON(copy_buf->used); 199ee45fd92SJon Cooper BUG_ON(len > sizeof(copy_buf->buf)); 200ee45fd92SJon Cooper memcpy(copy_buf->buf, data, len); 201ee45fd92SJon Cooper copy_buf->used = len; 202ee45fd92SJon Cooper } 203ee45fd92SJon Cooper } 204ee45fd92SJon Cooper 205ee45fd92SJon Cooper /* Copy to PIO, respecting dword alignment, popping data from copy buffer first. 206ee45fd92SJon Cooper * Advances piobuf pointer. Leaves additional data in the copy buffer. 207ee45fd92SJon Cooper */ 208ee45fd92SJon Cooper static void efx_memcpy_toio_aligned_cb(struct efx_nic *efx, u8 __iomem **piobuf, 209ee45fd92SJon Cooper u8 *data, int len, 210ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 211ee45fd92SJon Cooper { 212ee45fd92SJon Cooper if (copy_buf->used) { 213ee45fd92SJon Cooper /* if the copy buffer is partially full, fill it up and write */ 214ee45fd92SJon Cooper int copy_to_buf = 215ee45fd92SJon Cooper min_t(int, sizeof(copy_buf->buf) - copy_buf->used, len); 216ee45fd92SJon Cooper 217ee45fd92SJon Cooper memcpy(copy_buf->buf + copy_buf->used, data, copy_to_buf); 218ee45fd92SJon Cooper copy_buf->used += copy_to_buf; 219ee45fd92SJon Cooper 220ee45fd92SJon Cooper /* if we didn't fill it up then we're done for now */ 221ee45fd92SJon Cooper if (copy_buf->used < sizeof(copy_buf->buf)) 222ee45fd92SJon Cooper return; 223ee45fd92SJon Cooper 2244984c237SBen Hutchings __iowrite64_copy(*piobuf, copy_buf->buf, 2254984c237SBen Hutchings sizeof(copy_buf->buf) >> 3); 226ee45fd92SJon Cooper *piobuf += sizeof(copy_buf->buf); 227ee45fd92SJon Cooper data += copy_to_buf; 228ee45fd92SJon Cooper len -= copy_to_buf; 229ee45fd92SJon Cooper copy_buf->used = 0; 230ee45fd92SJon Cooper } 231ee45fd92SJon Cooper 232ee45fd92SJon Cooper efx_memcpy_toio_aligned(efx, piobuf, data, len, copy_buf); 233ee45fd92SJon Cooper } 234ee45fd92SJon Cooper 235ee45fd92SJon Cooper static void efx_flush_copy_buffer(struct efx_nic *efx, u8 __iomem *piobuf, 236ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 237ee45fd92SJon Cooper { 238ee45fd92SJon Cooper /* if there's anything in it, write the whole buffer, including junk */ 239ee45fd92SJon Cooper if (copy_buf->used) 2404984c237SBen Hutchings __iowrite64_copy(piobuf, copy_buf->buf, 2414984c237SBen Hutchings sizeof(copy_buf->buf) >> 3); 242ee45fd92SJon Cooper } 243ee45fd92SJon Cooper 244ee45fd92SJon Cooper /* Traverse skb structure and copy fragments in to PIO buffer. 245ee45fd92SJon Cooper * Advances piobuf pointer. 246ee45fd92SJon Cooper */ 247ee45fd92SJon Cooper static void efx_skb_copy_bits_to_pio(struct efx_nic *efx, struct sk_buff *skb, 248ee45fd92SJon Cooper u8 __iomem **piobuf, 249ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 250ee45fd92SJon Cooper { 251ee45fd92SJon Cooper int i; 252ee45fd92SJon Cooper 253ee45fd92SJon Cooper efx_memcpy_toio_aligned(efx, piobuf, skb->data, skb_headlen(skb), 254ee45fd92SJon Cooper copy_buf); 255ee45fd92SJon Cooper 256ee45fd92SJon Cooper for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i) { 257ee45fd92SJon Cooper skb_frag_t *f = &skb_shinfo(skb)->frags[i]; 258ee45fd92SJon Cooper u8 *vaddr; 259ee45fd92SJon Cooper 260ee45fd92SJon Cooper vaddr = kmap_atomic(skb_frag_page(f)); 261ee45fd92SJon Cooper 262ee45fd92SJon Cooper efx_memcpy_toio_aligned_cb(efx, piobuf, vaddr + f->page_offset, 263ee45fd92SJon Cooper skb_frag_size(f), copy_buf); 264ee45fd92SJon Cooper kunmap_atomic(vaddr); 265ee45fd92SJon Cooper } 266ee45fd92SJon Cooper 267ee45fd92SJon Cooper EFX_BUG_ON_PARANOID(skb_shinfo(skb)->frag_list); 268ee45fd92SJon Cooper } 269ee45fd92SJon Cooper 270ee45fd92SJon Cooper static struct efx_tx_buffer * 271ee45fd92SJon Cooper efx_enqueue_skb_pio(struct efx_tx_queue *tx_queue, struct sk_buff *skb) 272ee45fd92SJon Cooper { 273ee45fd92SJon Cooper struct efx_tx_buffer *buffer = 274ee45fd92SJon Cooper efx_tx_queue_get_insert_buffer(tx_queue); 275ee45fd92SJon Cooper u8 __iomem *piobuf = tx_queue->piobuf; 276ee45fd92SJon Cooper 277ee45fd92SJon Cooper /* Copy to PIO buffer. Ensure the writes are padded to the end 278ee45fd92SJon Cooper * of a cache line, as this is required for write-combining to be 279ee45fd92SJon Cooper * effective on at least x86. 280ee45fd92SJon Cooper */ 281ee45fd92SJon Cooper 282ee45fd92SJon Cooper if (skb_shinfo(skb)->nr_frags) { 283ee45fd92SJon Cooper /* The size of the copy buffer will ensure all writes 284ee45fd92SJon Cooper * are the size of a cache line. 285ee45fd92SJon Cooper */ 286ee45fd92SJon Cooper struct efx_short_copy_buffer copy_buf; 287ee45fd92SJon Cooper 288ee45fd92SJon Cooper copy_buf.used = 0; 289ee45fd92SJon Cooper 290ee45fd92SJon Cooper efx_skb_copy_bits_to_pio(tx_queue->efx, skb, 291ee45fd92SJon Cooper &piobuf, ©_buf); 292ee45fd92SJon Cooper efx_flush_copy_buffer(tx_queue->efx, piobuf, ©_buf); 293ee45fd92SJon Cooper } else { 294ee45fd92SJon Cooper /* Pad the write to the size of a cache line. 295ee45fd92SJon Cooper * We can do this because we know the skb_shared_info sruct is 296ee45fd92SJon Cooper * after the source, and the destination buffer is big enough. 297ee45fd92SJon Cooper */ 298ee45fd92SJon Cooper BUILD_BUG_ON(L1_CACHE_BYTES > 299ee45fd92SJon Cooper SKB_DATA_ALIGN(sizeof(struct skb_shared_info))); 3004984c237SBen Hutchings __iowrite64_copy(tx_queue->piobuf, skb->data, 3014984c237SBen Hutchings ALIGN(skb->len, L1_CACHE_BYTES) >> 3); 302ee45fd92SJon Cooper } 303ee45fd92SJon Cooper 304ee45fd92SJon Cooper EFX_POPULATE_QWORD_5(buffer->option, 305ee45fd92SJon Cooper ESF_DZ_TX_DESC_IS_OPT, 1, 306ee45fd92SJon Cooper ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_PIO, 307ee45fd92SJon Cooper ESF_DZ_TX_PIO_CONT, 0, 308ee45fd92SJon Cooper ESF_DZ_TX_PIO_BYTE_CNT, skb->len, 309ee45fd92SJon Cooper ESF_DZ_TX_PIO_BUF_ADDR, 310ee45fd92SJon Cooper tx_queue->piobuf_offset); 311ee45fd92SJon Cooper ++tx_queue->pio_packets; 312ee45fd92SJon Cooper ++tx_queue->insert_count; 313ee45fd92SJon Cooper return buffer; 314ee45fd92SJon Cooper } 315ee45fd92SJon Cooper #endif /* EFX_USE_PIO */ 316ee45fd92SJon Cooper 317874aeea5SJeff Kirsher /* 318874aeea5SJeff Kirsher * Add a socket buffer to a TX queue 319874aeea5SJeff Kirsher * 320874aeea5SJeff Kirsher * This maps all fragments of a socket buffer for DMA and adds them to 321874aeea5SJeff Kirsher * the TX queue. The queue's insert pointer will be incremented by 322874aeea5SJeff Kirsher * the number of fragments in the socket buffer. 323874aeea5SJeff Kirsher * 324874aeea5SJeff Kirsher * If any DMA mapping fails, any mapped fragments will be unmapped, 325874aeea5SJeff Kirsher * the queue's insert pointer will be restored to its original value. 326874aeea5SJeff Kirsher * 327874aeea5SJeff Kirsher * This function is split out from efx_hard_start_xmit to allow the 328874aeea5SJeff Kirsher * loopback test to direct packets via specific TX queues. 329874aeea5SJeff Kirsher * 33014bf718fSBen Hutchings * Returns NETDEV_TX_OK. 331874aeea5SJeff Kirsher * You must hold netif_tx_lock() to call this function. 332874aeea5SJeff Kirsher */ 333874aeea5SJeff Kirsher netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb) 334874aeea5SJeff Kirsher { 335874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 3360e33d870SBen Hutchings struct device *dma_dev = &efx->pci_dev->dev; 337874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 33870b33fb0SEdward Cree unsigned int old_insert_count = tx_queue->insert_count; 339874aeea5SJeff Kirsher skb_frag_t *fragment; 3400fe5565bSBen Hutchings unsigned int len, unmap_len = 0; 341874aeea5SJeff Kirsher dma_addr_t dma_addr, unmap_addr = 0; 342874aeea5SJeff Kirsher unsigned int dma_len; 3437668ff9cSBen Hutchings unsigned short dma_flags; 34414bf718fSBen Hutchings int i = 0; 345874aeea5SJeff Kirsher 34670b33fb0SEdward Cree EFX_BUG_ON_PARANOID(tx_queue->write_count > tx_queue->insert_count); 347874aeea5SJeff Kirsher 348874aeea5SJeff Kirsher if (skb_shinfo(skb)->gso_size) 349874aeea5SJeff Kirsher return efx_enqueue_skb_tso(tx_queue, skb); 350874aeea5SJeff Kirsher 351874aeea5SJeff Kirsher /* Get size of the initial fragment */ 352874aeea5SJeff Kirsher len = skb_headlen(skb); 353874aeea5SJeff Kirsher 354874aeea5SJeff Kirsher /* Pad if necessary */ 355874aeea5SJeff Kirsher if (EFX_WORKAROUND_15592(efx) && skb->len <= 32) { 356874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(skb->data_len); 357874aeea5SJeff Kirsher len = 32 + 1; 358874aeea5SJeff Kirsher if (skb_pad(skb, len - skb->len)) 359874aeea5SJeff Kirsher return NETDEV_TX_OK; 360874aeea5SJeff Kirsher } 361874aeea5SJeff Kirsher 362ee45fd92SJon Cooper /* Consider using PIO for short packets */ 363ee45fd92SJon Cooper #ifdef EFX_USE_PIO 36470b33fb0SEdward Cree if (skb->len <= efx_piobuf_size && !skb->xmit_more && 36570b33fb0SEdward Cree efx_nic_may_tx_pio(tx_queue)) { 366ee45fd92SJon Cooper buffer = efx_enqueue_skb_pio(tx_queue, skb); 367ee45fd92SJon Cooper dma_flags = EFX_TX_BUF_OPTION; 368ee45fd92SJon Cooper goto finish_packet; 369ee45fd92SJon Cooper } 370ee45fd92SJon Cooper #endif 371ee45fd92SJon Cooper 3720e33d870SBen Hutchings /* Map for DMA. Use dma_map_single rather than dma_map_page 373874aeea5SJeff Kirsher * since this is more efficient on machines with sparse 374874aeea5SJeff Kirsher * memory. 375874aeea5SJeff Kirsher */ 3767668ff9cSBen Hutchings dma_flags = EFX_TX_BUF_MAP_SINGLE; 3770e33d870SBen Hutchings dma_addr = dma_map_single(dma_dev, skb->data, len, PCI_DMA_TODEVICE); 378874aeea5SJeff Kirsher 379874aeea5SJeff Kirsher /* Process all fragments */ 380874aeea5SJeff Kirsher while (1) { 3810e33d870SBen Hutchings if (unlikely(dma_mapping_error(dma_dev, dma_addr))) 3820e33d870SBen Hutchings goto dma_err; 383874aeea5SJeff Kirsher 384874aeea5SJeff Kirsher /* Store fields for marking in the per-fragment final 385874aeea5SJeff Kirsher * descriptor */ 386874aeea5SJeff Kirsher unmap_len = len; 387874aeea5SJeff Kirsher unmap_addr = dma_addr; 388874aeea5SJeff Kirsher 389874aeea5SJeff Kirsher /* Add to TX queue, splitting across DMA boundaries */ 390874aeea5SJeff Kirsher do { 3910fe5565bSBen Hutchings buffer = efx_tx_queue_get_insert_buffer(tx_queue); 392874aeea5SJeff Kirsher 393874aeea5SJeff Kirsher dma_len = efx_max_tx_len(efx, dma_addr); 394874aeea5SJeff Kirsher if (likely(dma_len >= len)) 395874aeea5SJeff Kirsher dma_len = len; 396874aeea5SJeff Kirsher 397874aeea5SJeff Kirsher /* Fill out per descriptor fields */ 398874aeea5SJeff Kirsher buffer->len = dma_len; 399874aeea5SJeff Kirsher buffer->dma_addr = dma_addr; 4007668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 401874aeea5SJeff Kirsher len -= dma_len; 402874aeea5SJeff Kirsher dma_addr += dma_len; 403874aeea5SJeff Kirsher ++tx_queue->insert_count; 404874aeea5SJeff Kirsher } while (len); 405874aeea5SJeff Kirsher 406874aeea5SJeff Kirsher /* Transfer ownership of the unmapping to the final buffer */ 4077668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT | dma_flags; 408874aeea5SJeff Kirsher buffer->unmap_len = unmap_len; 4092acdb92eSAlexandre Rames buffer->dma_offset = buffer->dma_addr - unmap_addr; 410874aeea5SJeff Kirsher unmap_len = 0; 411874aeea5SJeff Kirsher 412874aeea5SJeff Kirsher /* Get address and size of next fragment */ 413874aeea5SJeff Kirsher if (i >= skb_shinfo(skb)->nr_frags) 414874aeea5SJeff Kirsher break; 415874aeea5SJeff Kirsher fragment = &skb_shinfo(skb)->frags[i]; 4169e903e08SEric Dumazet len = skb_frag_size(fragment); 417874aeea5SJeff Kirsher i++; 418874aeea5SJeff Kirsher /* Map for DMA */ 4197668ff9cSBen Hutchings dma_flags = 0; 4200e33d870SBen Hutchings dma_addr = skb_frag_dma_map(dma_dev, fragment, 0, len, 4215d6bcdfeSIan Campbell DMA_TO_DEVICE); 422874aeea5SJeff Kirsher } 423874aeea5SJeff Kirsher 424874aeea5SJeff Kirsher /* Transfer ownership of the skb to the final buffer */ 425440b87eaSPaul Gortmaker #ifdef EFX_USE_PIO 426ee45fd92SJon Cooper finish_packet: 427440b87eaSPaul Gortmaker #endif 428874aeea5SJeff Kirsher buffer->skb = skb; 4297668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_SKB | dma_flags; 430874aeea5SJeff Kirsher 431c3940999STom Herbert netdev_tx_sent_queue(tx_queue->core_txq, skb->len); 432c3940999STom Herbert 43370b33fb0SEdward Cree efx_tx_maybe_stop_queue(tx_queue); 43470b33fb0SEdward Cree 435874aeea5SJeff Kirsher /* Pass off to hardware */ 43670b33fb0SEdward Cree if (!skb->xmit_more || netif_xmit_stopped(tx_queue->core_txq)) 437874aeea5SJeff Kirsher efx_nic_push_buffers(tx_queue); 438874aeea5SJeff Kirsher 4398ccf3800SAndrew Rybchenko tx_queue->tx_packets++; 4408ccf3800SAndrew Rybchenko 441874aeea5SJeff Kirsher return NETDEV_TX_OK; 442874aeea5SJeff Kirsher 4430e33d870SBen Hutchings dma_err: 444874aeea5SJeff Kirsher netif_err(efx, tx_err, efx->net_dev, 445874aeea5SJeff Kirsher " TX queue %d could not map skb with %d bytes %d " 446874aeea5SJeff Kirsher "fragments for DMA\n", tx_queue->queue, skb->len, 447874aeea5SJeff Kirsher skb_shinfo(skb)->nr_frags + 1); 448874aeea5SJeff Kirsher 449874aeea5SJeff Kirsher /* Mark the packet as transmitted, and free the SKB ourselves */ 450874aeea5SJeff Kirsher dev_kfree_skb_any(skb); 451874aeea5SJeff Kirsher 452874aeea5SJeff Kirsher /* Work backwards until we hit the original insert pointer value */ 45370b33fb0SEdward Cree while (tx_queue->insert_count != old_insert_count) { 454c3940999STom Herbert unsigned int pkts_compl = 0, bytes_compl = 0; 455874aeea5SJeff Kirsher --tx_queue->insert_count; 4560fe5565bSBen Hutchings buffer = __efx_tx_queue_get_insert_buffer(tx_queue); 457c3940999STom Herbert efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl); 458874aeea5SJeff Kirsher } 459874aeea5SJeff Kirsher 460874aeea5SJeff Kirsher /* Free the fragment we were mid-way through pushing */ 461874aeea5SJeff Kirsher if (unmap_len) { 4627668ff9cSBen Hutchings if (dma_flags & EFX_TX_BUF_MAP_SINGLE) 4630e33d870SBen Hutchings dma_unmap_single(dma_dev, unmap_addr, unmap_len, 4640e33d870SBen Hutchings DMA_TO_DEVICE); 465874aeea5SJeff Kirsher else 4660e33d870SBen Hutchings dma_unmap_page(dma_dev, unmap_addr, unmap_len, 4670e33d870SBen Hutchings DMA_TO_DEVICE); 468874aeea5SJeff Kirsher } 469874aeea5SJeff Kirsher 47014bf718fSBen Hutchings return NETDEV_TX_OK; 471874aeea5SJeff Kirsher } 472874aeea5SJeff Kirsher 473874aeea5SJeff Kirsher /* Remove packets from the TX queue 474874aeea5SJeff Kirsher * 475874aeea5SJeff Kirsher * This removes packets from the TX queue, up to and including the 476874aeea5SJeff Kirsher * specified index. 477874aeea5SJeff Kirsher */ 478874aeea5SJeff Kirsher static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue, 479c3940999STom Herbert unsigned int index, 480c3940999STom Herbert unsigned int *pkts_compl, 481c3940999STom Herbert unsigned int *bytes_compl) 482874aeea5SJeff Kirsher { 483874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 484874aeea5SJeff Kirsher unsigned int stop_index, read_ptr; 485874aeea5SJeff Kirsher 486874aeea5SJeff Kirsher stop_index = (index + 1) & tx_queue->ptr_mask; 487874aeea5SJeff Kirsher read_ptr = tx_queue->read_count & tx_queue->ptr_mask; 488874aeea5SJeff Kirsher 489874aeea5SJeff Kirsher while (read_ptr != stop_index) { 490874aeea5SJeff Kirsher struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr]; 491ba8977bdSBen Hutchings 492ba8977bdSBen Hutchings if (!(buffer->flags & EFX_TX_BUF_OPTION) && 493ba8977bdSBen Hutchings unlikely(buffer->len == 0)) { 494874aeea5SJeff Kirsher netif_err(efx, tx_err, efx->net_dev, 495874aeea5SJeff Kirsher "TX queue %d spurious TX completion id %x\n", 496874aeea5SJeff Kirsher tx_queue->queue, read_ptr); 497874aeea5SJeff Kirsher efx_schedule_reset(efx, RESET_TYPE_TX_SKIP); 498874aeea5SJeff Kirsher return; 499874aeea5SJeff Kirsher } 500874aeea5SJeff Kirsher 501c3940999STom Herbert efx_dequeue_buffer(tx_queue, buffer, pkts_compl, bytes_compl); 502874aeea5SJeff Kirsher 503874aeea5SJeff Kirsher ++tx_queue->read_count; 504874aeea5SJeff Kirsher read_ptr = tx_queue->read_count & tx_queue->ptr_mask; 505874aeea5SJeff Kirsher } 506874aeea5SJeff Kirsher } 507874aeea5SJeff Kirsher 508874aeea5SJeff Kirsher /* Initiate a packet transmission. We use one channel per CPU 509874aeea5SJeff Kirsher * (sharing when we have more CPUs than channels). On Falcon, the TX 510874aeea5SJeff Kirsher * completion events will be directed back to the CPU that transmitted 511874aeea5SJeff Kirsher * the packet, which should be cache-efficient. 512874aeea5SJeff Kirsher * 513874aeea5SJeff Kirsher * Context: non-blocking. 514874aeea5SJeff Kirsher * Note that returning anything other than NETDEV_TX_OK will cause the 515874aeea5SJeff Kirsher * OS to free the skb. 516874aeea5SJeff Kirsher */ 517874aeea5SJeff Kirsher netdev_tx_t efx_hard_start_xmit(struct sk_buff *skb, 518874aeea5SJeff Kirsher struct net_device *net_dev) 519874aeea5SJeff Kirsher { 520874aeea5SJeff Kirsher struct efx_nic *efx = netdev_priv(net_dev); 521874aeea5SJeff Kirsher struct efx_tx_queue *tx_queue; 522874aeea5SJeff Kirsher unsigned index, type; 523874aeea5SJeff Kirsher 524874aeea5SJeff Kirsher EFX_WARN_ON_PARANOID(!netif_device_present(net_dev)); 525874aeea5SJeff Kirsher 5267c236c43SStuart Hodgson /* PTP "event" packet */ 5277c236c43SStuart Hodgson if (unlikely(efx_xmit_with_hwtstamp(skb)) && 5287c236c43SStuart Hodgson unlikely(efx_ptp_is_ptp_tx(efx, skb))) { 5297c236c43SStuart Hodgson return efx_ptp_tx(efx, skb); 5307c236c43SStuart Hodgson } 5317c236c43SStuart Hodgson 532874aeea5SJeff Kirsher index = skb_get_queue_mapping(skb); 533874aeea5SJeff Kirsher type = skb->ip_summed == CHECKSUM_PARTIAL ? EFX_TXQ_TYPE_OFFLOAD : 0; 534874aeea5SJeff Kirsher if (index >= efx->n_tx_channels) { 535874aeea5SJeff Kirsher index -= efx->n_tx_channels; 536874aeea5SJeff Kirsher type |= EFX_TXQ_TYPE_HIGHPRI; 537874aeea5SJeff Kirsher } 538874aeea5SJeff Kirsher tx_queue = efx_get_tx_queue(efx, index, type); 539874aeea5SJeff Kirsher 540874aeea5SJeff Kirsher return efx_enqueue_skb(tx_queue, skb); 541874aeea5SJeff Kirsher } 542874aeea5SJeff Kirsher 543874aeea5SJeff Kirsher void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue) 544874aeea5SJeff Kirsher { 545874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 546874aeea5SJeff Kirsher 547874aeea5SJeff Kirsher /* Must be inverse of queue lookup in efx_hard_start_xmit() */ 548874aeea5SJeff Kirsher tx_queue->core_txq = 549874aeea5SJeff Kirsher netdev_get_tx_queue(efx->net_dev, 550874aeea5SJeff Kirsher tx_queue->queue / EFX_TXQ_TYPES + 551874aeea5SJeff Kirsher ((tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI) ? 552874aeea5SJeff Kirsher efx->n_tx_channels : 0)); 553874aeea5SJeff Kirsher } 554874aeea5SJeff Kirsher 555874aeea5SJeff Kirsher int efx_setup_tc(struct net_device *net_dev, u8 num_tc) 556874aeea5SJeff Kirsher { 557874aeea5SJeff Kirsher struct efx_nic *efx = netdev_priv(net_dev); 558874aeea5SJeff Kirsher struct efx_channel *channel; 559874aeea5SJeff Kirsher struct efx_tx_queue *tx_queue; 560874aeea5SJeff Kirsher unsigned tc; 561874aeea5SJeff Kirsher int rc; 562874aeea5SJeff Kirsher 563874aeea5SJeff Kirsher if (efx_nic_rev(efx) < EFX_REV_FALCON_B0 || num_tc > EFX_MAX_TX_TC) 564874aeea5SJeff Kirsher return -EINVAL; 565874aeea5SJeff Kirsher 566874aeea5SJeff Kirsher if (num_tc == net_dev->num_tc) 567874aeea5SJeff Kirsher return 0; 568874aeea5SJeff Kirsher 569874aeea5SJeff Kirsher for (tc = 0; tc < num_tc; tc++) { 570874aeea5SJeff Kirsher net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels; 571874aeea5SJeff Kirsher net_dev->tc_to_txq[tc].count = efx->n_tx_channels; 572874aeea5SJeff Kirsher } 573874aeea5SJeff Kirsher 574874aeea5SJeff Kirsher if (num_tc > net_dev->num_tc) { 575874aeea5SJeff Kirsher /* Initialise high-priority queues as necessary */ 576874aeea5SJeff Kirsher efx_for_each_channel(channel, efx) { 577874aeea5SJeff Kirsher efx_for_each_possible_channel_tx_queue(tx_queue, 578874aeea5SJeff Kirsher channel) { 579874aeea5SJeff Kirsher if (!(tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI)) 580874aeea5SJeff Kirsher continue; 581874aeea5SJeff Kirsher if (!tx_queue->buffer) { 582874aeea5SJeff Kirsher rc = efx_probe_tx_queue(tx_queue); 583874aeea5SJeff Kirsher if (rc) 584874aeea5SJeff Kirsher return rc; 585874aeea5SJeff Kirsher } 586874aeea5SJeff Kirsher if (!tx_queue->initialised) 587874aeea5SJeff Kirsher efx_init_tx_queue(tx_queue); 588874aeea5SJeff Kirsher efx_init_tx_queue_core_txq(tx_queue); 589874aeea5SJeff Kirsher } 590874aeea5SJeff Kirsher } 591874aeea5SJeff Kirsher } else { 592874aeea5SJeff Kirsher /* Reduce number of classes before number of queues */ 593874aeea5SJeff Kirsher net_dev->num_tc = num_tc; 594874aeea5SJeff Kirsher } 595874aeea5SJeff Kirsher 596874aeea5SJeff Kirsher rc = netif_set_real_num_tx_queues(net_dev, 597874aeea5SJeff Kirsher max_t(int, num_tc, 1) * 598874aeea5SJeff Kirsher efx->n_tx_channels); 599874aeea5SJeff Kirsher if (rc) 600874aeea5SJeff Kirsher return rc; 601874aeea5SJeff Kirsher 602874aeea5SJeff Kirsher /* Do not destroy high-priority queues when they become 603874aeea5SJeff Kirsher * unused. We would have to flush them first, and it is 604874aeea5SJeff Kirsher * fairly difficult to flush a subset of TX queues. Leave 605874aeea5SJeff Kirsher * it to efx_fini_channels(). 606874aeea5SJeff Kirsher */ 607874aeea5SJeff Kirsher 608874aeea5SJeff Kirsher net_dev->num_tc = num_tc; 609874aeea5SJeff Kirsher return 0; 610874aeea5SJeff Kirsher } 611874aeea5SJeff Kirsher 612874aeea5SJeff Kirsher void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index) 613874aeea5SJeff Kirsher { 614874aeea5SJeff Kirsher unsigned fill_level; 615874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 61614bf718fSBen Hutchings struct efx_tx_queue *txq2; 617c3940999STom Herbert unsigned int pkts_compl = 0, bytes_compl = 0; 618874aeea5SJeff Kirsher 619874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(index > tx_queue->ptr_mask); 620874aeea5SJeff Kirsher 621c3940999STom Herbert efx_dequeue_buffers(tx_queue, index, &pkts_compl, &bytes_compl); 622c3940999STom Herbert netdev_tx_completed_queue(tx_queue->core_txq, pkts_compl, bytes_compl); 623874aeea5SJeff Kirsher 62402e12165SBen Hutchings if (pkts_compl > 1) 62502e12165SBen Hutchings ++tx_queue->merge_events; 62602e12165SBen Hutchings 62714bf718fSBen Hutchings /* See if we need to restart the netif queue. This memory 62814bf718fSBen Hutchings * barrier ensures that we write read_count (inside 62914bf718fSBen Hutchings * efx_dequeue_buffers()) before reading the queue status. 63014bf718fSBen Hutchings */ 631874aeea5SJeff Kirsher smp_mb(); 632874aeea5SJeff Kirsher if (unlikely(netif_tx_queue_stopped(tx_queue->core_txq)) && 633874aeea5SJeff Kirsher likely(efx->port_enabled) && 634874aeea5SJeff Kirsher likely(netif_device_present(efx->net_dev))) { 63514bf718fSBen Hutchings txq2 = efx_tx_queue_partner(tx_queue); 63614bf718fSBen Hutchings fill_level = max(tx_queue->insert_count - tx_queue->read_count, 63714bf718fSBen Hutchings txq2->insert_count - txq2->read_count); 63814bf718fSBen Hutchings if (fill_level <= efx->txq_wake_thresh) 639874aeea5SJeff Kirsher netif_tx_wake_queue(tx_queue->core_txq); 640874aeea5SJeff Kirsher } 641874aeea5SJeff Kirsher 642874aeea5SJeff Kirsher /* Check whether the hardware queue is now empty */ 643874aeea5SJeff Kirsher if ((int)(tx_queue->read_count - tx_queue->old_write_count) >= 0) { 644874aeea5SJeff Kirsher tx_queue->old_write_count = ACCESS_ONCE(tx_queue->write_count); 645874aeea5SJeff Kirsher if (tx_queue->read_count == tx_queue->old_write_count) { 646874aeea5SJeff Kirsher smp_mb(); 647874aeea5SJeff Kirsher tx_queue->empty_read_count = 648874aeea5SJeff Kirsher tx_queue->read_count | EFX_EMPTY_COUNT_VALID; 649874aeea5SJeff Kirsher } 650874aeea5SJeff Kirsher } 651874aeea5SJeff Kirsher } 652874aeea5SJeff Kirsher 653f7251a9cSBen Hutchings /* Size of page-based TSO header buffers. Larger blocks must be 654f7251a9cSBen Hutchings * allocated from the heap. 655f7251a9cSBen Hutchings */ 656f7251a9cSBen Hutchings #define TSOH_STD_SIZE 128 657f7251a9cSBen Hutchings #define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) 658f7251a9cSBen Hutchings 659f7251a9cSBen Hutchings /* At most half the descriptors in the queue at any time will refer to 660f7251a9cSBen Hutchings * a TSO header buffer, since they must always be followed by a 661f7251a9cSBen Hutchings * payload descriptor referring to an skb. 662f7251a9cSBen Hutchings */ 663f7251a9cSBen Hutchings static unsigned int efx_tsoh_page_count(struct efx_tx_queue *tx_queue) 664f7251a9cSBen Hutchings { 665f7251a9cSBen Hutchings return DIV_ROUND_UP(tx_queue->ptr_mask + 1, 2 * TSOH_PER_PAGE); 666f7251a9cSBen Hutchings } 667f7251a9cSBen Hutchings 668874aeea5SJeff Kirsher int efx_probe_tx_queue(struct efx_tx_queue *tx_queue) 669874aeea5SJeff Kirsher { 670874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 671874aeea5SJeff Kirsher unsigned int entries; 6727668ff9cSBen Hutchings int rc; 673874aeea5SJeff Kirsher 674874aeea5SJeff Kirsher /* Create the smallest power-of-two aligned ring */ 675874aeea5SJeff Kirsher entries = max(roundup_pow_of_two(efx->txq_entries), EFX_MIN_DMAQ_SIZE); 676874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE); 677874aeea5SJeff Kirsher tx_queue->ptr_mask = entries - 1; 678874aeea5SJeff Kirsher 679874aeea5SJeff Kirsher netif_dbg(efx, probe, efx->net_dev, 680874aeea5SJeff Kirsher "creating TX queue %d size %#x mask %#x\n", 681874aeea5SJeff Kirsher tx_queue->queue, efx->txq_entries, tx_queue->ptr_mask); 682874aeea5SJeff Kirsher 683874aeea5SJeff Kirsher /* Allocate software ring */ 684c2e4e25aSThomas Meyer tx_queue->buffer = kcalloc(entries, sizeof(*tx_queue->buffer), 685874aeea5SJeff Kirsher GFP_KERNEL); 686874aeea5SJeff Kirsher if (!tx_queue->buffer) 687874aeea5SJeff Kirsher return -ENOMEM; 688874aeea5SJeff Kirsher 689f7251a9cSBen Hutchings if (tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD) { 690f7251a9cSBen Hutchings tx_queue->tsoh_page = 691f7251a9cSBen Hutchings kcalloc(efx_tsoh_page_count(tx_queue), 692f7251a9cSBen Hutchings sizeof(tx_queue->tsoh_page[0]), GFP_KERNEL); 693f7251a9cSBen Hutchings if (!tx_queue->tsoh_page) { 694f7251a9cSBen Hutchings rc = -ENOMEM; 695f7251a9cSBen Hutchings goto fail1; 696f7251a9cSBen Hutchings } 697f7251a9cSBen Hutchings } 698f7251a9cSBen Hutchings 699874aeea5SJeff Kirsher /* Allocate hardware ring */ 700874aeea5SJeff Kirsher rc = efx_nic_probe_tx(tx_queue); 701874aeea5SJeff Kirsher if (rc) 702f7251a9cSBen Hutchings goto fail2; 703874aeea5SJeff Kirsher 704874aeea5SJeff Kirsher return 0; 705874aeea5SJeff Kirsher 706f7251a9cSBen Hutchings fail2: 707f7251a9cSBen Hutchings kfree(tx_queue->tsoh_page); 708f7251a9cSBen Hutchings tx_queue->tsoh_page = NULL; 709f7251a9cSBen Hutchings fail1: 710874aeea5SJeff Kirsher kfree(tx_queue->buffer); 711874aeea5SJeff Kirsher tx_queue->buffer = NULL; 712874aeea5SJeff Kirsher return rc; 713874aeea5SJeff Kirsher } 714874aeea5SJeff Kirsher 715874aeea5SJeff Kirsher void efx_init_tx_queue(struct efx_tx_queue *tx_queue) 716874aeea5SJeff Kirsher { 717874aeea5SJeff Kirsher netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 718874aeea5SJeff Kirsher "initialising TX queue %d\n", tx_queue->queue); 719874aeea5SJeff Kirsher 720874aeea5SJeff Kirsher tx_queue->insert_count = 0; 721874aeea5SJeff Kirsher tx_queue->write_count = 0; 722874aeea5SJeff Kirsher tx_queue->old_write_count = 0; 723874aeea5SJeff Kirsher tx_queue->read_count = 0; 724874aeea5SJeff Kirsher tx_queue->old_read_count = 0; 725874aeea5SJeff Kirsher tx_queue->empty_read_count = 0 | EFX_EMPTY_COUNT_VALID; 726874aeea5SJeff Kirsher 727874aeea5SJeff Kirsher /* Set up TX descriptor ring */ 728874aeea5SJeff Kirsher efx_nic_init_tx(tx_queue); 729874aeea5SJeff Kirsher 730874aeea5SJeff Kirsher tx_queue->initialised = true; 731874aeea5SJeff Kirsher } 732874aeea5SJeff Kirsher 733e42c3d85SBen Hutchings void efx_fini_tx_queue(struct efx_tx_queue *tx_queue) 734874aeea5SJeff Kirsher { 735874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 736874aeea5SJeff Kirsher 737e42c3d85SBen Hutchings netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 738e42c3d85SBen Hutchings "shutting down TX queue %d\n", tx_queue->queue); 739e42c3d85SBen Hutchings 740874aeea5SJeff Kirsher if (!tx_queue->buffer) 741874aeea5SJeff Kirsher return; 742874aeea5SJeff Kirsher 743874aeea5SJeff Kirsher /* Free any buffers left in the ring */ 744874aeea5SJeff Kirsher while (tx_queue->read_count != tx_queue->write_count) { 745c3940999STom Herbert unsigned int pkts_compl = 0, bytes_compl = 0; 746874aeea5SJeff Kirsher buffer = &tx_queue->buffer[tx_queue->read_count & tx_queue->ptr_mask]; 747c3940999STom Herbert efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl); 748874aeea5SJeff Kirsher 749874aeea5SJeff Kirsher ++tx_queue->read_count; 750874aeea5SJeff Kirsher } 751c3940999STom Herbert netdev_tx_reset_queue(tx_queue->core_txq); 752874aeea5SJeff Kirsher } 753874aeea5SJeff Kirsher 754874aeea5SJeff Kirsher void efx_remove_tx_queue(struct efx_tx_queue *tx_queue) 755874aeea5SJeff Kirsher { 756f7251a9cSBen Hutchings int i; 757f7251a9cSBen Hutchings 758874aeea5SJeff Kirsher if (!tx_queue->buffer) 759874aeea5SJeff Kirsher return; 760874aeea5SJeff Kirsher 761874aeea5SJeff Kirsher netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 762874aeea5SJeff Kirsher "destroying TX queue %d\n", tx_queue->queue); 763874aeea5SJeff Kirsher efx_nic_remove_tx(tx_queue); 764874aeea5SJeff Kirsher 765f7251a9cSBen Hutchings if (tx_queue->tsoh_page) { 766f7251a9cSBen Hutchings for (i = 0; i < efx_tsoh_page_count(tx_queue); i++) 767f7251a9cSBen Hutchings efx_nic_free_buffer(tx_queue->efx, 768f7251a9cSBen Hutchings &tx_queue->tsoh_page[i]); 769f7251a9cSBen Hutchings kfree(tx_queue->tsoh_page); 770f7251a9cSBen Hutchings tx_queue->tsoh_page = NULL; 771f7251a9cSBen Hutchings } 772f7251a9cSBen Hutchings 773874aeea5SJeff Kirsher kfree(tx_queue->buffer); 774874aeea5SJeff Kirsher tx_queue->buffer = NULL; 775874aeea5SJeff Kirsher } 776874aeea5SJeff Kirsher 777874aeea5SJeff Kirsher 778874aeea5SJeff Kirsher /* Efx TCP segmentation acceleration. 779874aeea5SJeff Kirsher * 780874aeea5SJeff Kirsher * Why? Because by doing it here in the driver we can go significantly 781874aeea5SJeff Kirsher * faster than the GSO. 782874aeea5SJeff Kirsher * 783874aeea5SJeff Kirsher * Requires TX checksum offload support. 784874aeea5SJeff Kirsher */ 785874aeea5SJeff Kirsher 786874aeea5SJeff Kirsher #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2)) 787874aeea5SJeff Kirsher 788874aeea5SJeff Kirsher /** 789874aeea5SJeff Kirsher * struct tso_state - TSO state for an SKB 790874aeea5SJeff Kirsher * @out_len: Remaining length in current segment 791874aeea5SJeff Kirsher * @seqnum: Current sequence number 792874aeea5SJeff Kirsher * @ipv4_id: Current IPv4 ID, host endian 793874aeea5SJeff Kirsher * @packet_space: Remaining space in current packet 794874aeea5SJeff Kirsher * @dma_addr: DMA address of current position 795874aeea5SJeff Kirsher * @in_len: Remaining length in current SKB fragment 796874aeea5SJeff Kirsher * @unmap_len: Length of SKB fragment 797874aeea5SJeff Kirsher * @unmap_addr: DMA address of SKB fragment 7987668ff9cSBen Hutchings * @dma_flags: TX buffer flags for DMA mapping - %EFX_TX_BUF_MAP_SINGLE or 0 799874aeea5SJeff Kirsher * @protocol: Network protocol (after any VLAN header) 8009714284fSBen Hutchings * @ip_off: Offset of IP header 8019714284fSBen Hutchings * @tcp_off: Offset of TCP header 802874aeea5SJeff Kirsher * @header_len: Number of bytes of header 80353cb13c6SBen Hutchings * @ip_base_len: IPv4 tot_len or IPv6 payload_len, before TCP payload 804dfa50be9SBen Hutchings * @header_dma_addr: Header DMA address, when using option descriptors 805dfa50be9SBen Hutchings * @header_unmap_len: Header DMA mapped length, or 0 if not using option 806dfa50be9SBen Hutchings * descriptors 807874aeea5SJeff Kirsher * 808874aeea5SJeff Kirsher * The state used during segmentation. It is put into this data structure 809874aeea5SJeff Kirsher * just to make it easy to pass into inline functions. 810874aeea5SJeff Kirsher */ 811874aeea5SJeff Kirsher struct tso_state { 812874aeea5SJeff Kirsher /* Output position */ 813874aeea5SJeff Kirsher unsigned out_len; 814874aeea5SJeff Kirsher unsigned seqnum; 815dfa50be9SBen Hutchings u16 ipv4_id; 816874aeea5SJeff Kirsher unsigned packet_space; 817874aeea5SJeff Kirsher 818874aeea5SJeff Kirsher /* Input position */ 819874aeea5SJeff Kirsher dma_addr_t dma_addr; 820874aeea5SJeff Kirsher unsigned in_len; 821874aeea5SJeff Kirsher unsigned unmap_len; 822874aeea5SJeff Kirsher dma_addr_t unmap_addr; 8237668ff9cSBen Hutchings unsigned short dma_flags; 824874aeea5SJeff Kirsher 825874aeea5SJeff Kirsher __be16 protocol; 8269714284fSBen Hutchings unsigned int ip_off; 8279714284fSBen Hutchings unsigned int tcp_off; 828874aeea5SJeff Kirsher unsigned header_len; 82953cb13c6SBen Hutchings unsigned int ip_base_len; 830dfa50be9SBen Hutchings dma_addr_t header_dma_addr; 831dfa50be9SBen Hutchings unsigned int header_unmap_len; 832874aeea5SJeff Kirsher }; 833874aeea5SJeff Kirsher 834874aeea5SJeff Kirsher 835874aeea5SJeff Kirsher /* 836874aeea5SJeff Kirsher * Verify that our various assumptions about sk_buffs and the conditions 837874aeea5SJeff Kirsher * under which TSO will be attempted hold true. Return the protocol number. 838874aeea5SJeff Kirsher */ 839874aeea5SJeff Kirsher static __be16 efx_tso_check_protocol(struct sk_buff *skb) 840874aeea5SJeff Kirsher { 841874aeea5SJeff Kirsher __be16 protocol = skb->protocol; 842874aeea5SJeff Kirsher 843874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(((struct ethhdr *)skb->data)->h_proto != 844874aeea5SJeff Kirsher protocol); 845874aeea5SJeff Kirsher if (protocol == htons(ETH_P_8021Q)) { 846874aeea5SJeff Kirsher struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data; 847874aeea5SJeff Kirsher protocol = veh->h_vlan_encapsulated_proto; 848874aeea5SJeff Kirsher } 849874aeea5SJeff Kirsher 850874aeea5SJeff Kirsher if (protocol == htons(ETH_P_IP)) { 851874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP); 852874aeea5SJeff Kirsher } else { 853874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IPV6)); 854874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(ipv6_hdr(skb)->nexthdr != NEXTHDR_TCP); 855874aeea5SJeff Kirsher } 856874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data) 857874aeea5SJeff Kirsher + (tcp_hdr(skb)->doff << 2u)) > 858874aeea5SJeff Kirsher skb_headlen(skb)); 859874aeea5SJeff Kirsher 860874aeea5SJeff Kirsher return protocol; 861874aeea5SJeff Kirsher } 862874aeea5SJeff Kirsher 863f7251a9cSBen Hutchings static u8 *efx_tsoh_get_buffer(struct efx_tx_queue *tx_queue, 864f7251a9cSBen Hutchings struct efx_tx_buffer *buffer, unsigned int len) 865874aeea5SJeff Kirsher { 866f7251a9cSBen Hutchings u8 *result; 867874aeea5SJeff Kirsher 868f7251a9cSBen Hutchings EFX_BUG_ON_PARANOID(buffer->len); 869f7251a9cSBen Hutchings EFX_BUG_ON_PARANOID(buffer->flags); 870f7251a9cSBen Hutchings EFX_BUG_ON_PARANOID(buffer->unmap_len); 871874aeea5SJeff Kirsher 8720bdadad1SBen Hutchings if (likely(len <= TSOH_STD_SIZE - NET_IP_ALIGN)) { 873f7251a9cSBen Hutchings unsigned index = 874f7251a9cSBen Hutchings (tx_queue->insert_count & tx_queue->ptr_mask) / 2; 875f7251a9cSBen Hutchings struct efx_buffer *page_buf = 876f7251a9cSBen Hutchings &tx_queue->tsoh_page[index / TSOH_PER_PAGE]; 877f7251a9cSBen Hutchings unsigned offset = 8780bdadad1SBen Hutchings TSOH_STD_SIZE * (index % TSOH_PER_PAGE) + NET_IP_ALIGN; 879874aeea5SJeff Kirsher 880f7251a9cSBen Hutchings if (unlikely(!page_buf->addr) && 8810d19a540SBen Hutchings efx_nic_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE, 8820d19a540SBen Hutchings GFP_ATOMIC)) 883874aeea5SJeff Kirsher return NULL; 884874aeea5SJeff Kirsher 885f7251a9cSBen Hutchings result = (u8 *)page_buf->addr + offset; 886f7251a9cSBen Hutchings buffer->dma_addr = page_buf->dma_addr + offset; 887f7251a9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 888f7251a9cSBen Hutchings } else { 889f7251a9cSBen Hutchings tx_queue->tso_long_headers++; 890f7251a9cSBen Hutchings 8910bdadad1SBen Hutchings buffer->heap_buf = kmalloc(NET_IP_ALIGN + len, GFP_ATOMIC); 892f7251a9cSBen Hutchings if (unlikely(!buffer->heap_buf)) 893874aeea5SJeff Kirsher return NULL; 8940bdadad1SBen Hutchings result = (u8 *)buffer->heap_buf + NET_IP_ALIGN; 895f7251a9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT | EFX_TX_BUF_HEAP; 896874aeea5SJeff Kirsher } 897874aeea5SJeff Kirsher 898f7251a9cSBen Hutchings buffer->len = len; 899874aeea5SJeff Kirsher 900f7251a9cSBen Hutchings return result; 901874aeea5SJeff Kirsher } 902874aeea5SJeff Kirsher 903874aeea5SJeff Kirsher /** 904874aeea5SJeff Kirsher * efx_tx_queue_insert - push descriptors onto the TX queue 905874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 906874aeea5SJeff Kirsher * @dma_addr: DMA address of fragment 907874aeea5SJeff Kirsher * @len: Length of fragment 908874aeea5SJeff Kirsher * @final_buffer: The final buffer inserted into the queue 909874aeea5SJeff Kirsher * 91014bf718fSBen Hutchings * Push descriptors onto the TX queue. 911874aeea5SJeff Kirsher */ 91214bf718fSBen Hutchings static void efx_tx_queue_insert(struct efx_tx_queue *tx_queue, 913874aeea5SJeff Kirsher dma_addr_t dma_addr, unsigned len, 914874aeea5SJeff Kirsher struct efx_tx_buffer **final_buffer) 915874aeea5SJeff Kirsher { 916874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 917874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 9180fe5565bSBen Hutchings unsigned dma_len; 919874aeea5SJeff Kirsher 920874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(len <= 0); 921874aeea5SJeff Kirsher 922874aeea5SJeff Kirsher while (1) { 9230fe5565bSBen Hutchings buffer = efx_tx_queue_get_insert_buffer(tx_queue); 924874aeea5SJeff Kirsher ++tx_queue->insert_count; 925874aeea5SJeff Kirsher 926874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tx_queue->insert_count - 927874aeea5SJeff Kirsher tx_queue->read_count >= 928874aeea5SJeff Kirsher efx->txq_entries); 929874aeea5SJeff Kirsher 930874aeea5SJeff Kirsher buffer->dma_addr = dma_addr; 931874aeea5SJeff Kirsher 932874aeea5SJeff Kirsher dma_len = efx_max_tx_len(efx, dma_addr); 933874aeea5SJeff Kirsher 934874aeea5SJeff Kirsher /* If there is enough space to send then do so */ 935874aeea5SJeff Kirsher if (dma_len >= len) 936874aeea5SJeff Kirsher break; 937874aeea5SJeff Kirsher 9387668ff9cSBen Hutchings buffer->len = dma_len; 9397668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 940874aeea5SJeff Kirsher dma_addr += dma_len; 941874aeea5SJeff Kirsher len -= dma_len; 942874aeea5SJeff Kirsher } 943874aeea5SJeff Kirsher 944874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(!len); 945874aeea5SJeff Kirsher buffer->len = len; 946874aeea5SJeff Kirsher *final_buffer = buffer; 947874aeea5SJeff Kirsher } 948874aeea5SJeff Kirsher 949874aeea5SJeff Kirsher 950874aeea5SJeff Kirsher /* 951874aeea5SJeff Kirsher * Put a TSO header into the TX queue. 952874aeea5SJeff Kirsher * 953874aeea5SJeff Kirsher * This is special-cased because we know that it is small enough to fit in 954874aeea5SJeff Kirsher * a single fragment, and we know it doesn't cross a page boundary. It 955874aeea5SJeff Kirsher * also allows us to not worry about end-of-packet etc. 956874aeea5SJeff Kirsher */ 957f7251a9cSBen Hutchings static int efx_tso_put_header(struct efx_tx_queue *tx_queue, 958f7251a9cSBen Hutchings struct efx_tx_buffer *buffer, u8 *header) 959874aeea5SJeff Kirsher { 960f7251a9cSBen Hutchings if (unlikely(buffer->flags & EFX_TX_BUF_HEAP)) { 961f7251a9cSBen Hutchings buffer->dma_addr = dma_map_single(&tx_queue->efx->pci_dev->dev, 962f7251a9cSBen Hutchings header, buffer->len, 963f7251a9cSBen Hutchings DMA_TO_DEVICE); 964f7251a9cSBen Hutchings if (unlikely(dma_mapping_error(&tx_queue->efx->pci_dev->dev, 965f7251a9cSBen Hutchings buffer->dma_addr))) { 966f7251a9cSBen Hutchings kfree(buffer->heap_buf); 967f7251a9cSBen Hutchings buffer->len = 0; 968f7251a9cSBen Hutchings buffer->flags = 0; 969f7251a9cSBen Hutchings return -ENOMEM; 970f7251a9cSBen Hutchings } 971f7251a9cSBen Hutchings buffer->unmap_len = buffer->len; 9722acdb92eSAlexandre Rames buffer->dma_offset = 0; 973f7251a9cSBen Hutchings buffer->flags |= EFX_TX_BUF_MAP_SINGLE; 974f7251a9cSBen Hutchings } 975874aeea5SJeff Kirsher 976874aeea5SJeff Kirsher ++tx_queue->insert_count; 977f7251a9cSBen Hutchings return 0; 978874aeea5SJeff Kirsher } 979874aeea5SJeff Kirsher 980874aeea5SJeff Kirsher 981f7251a9cSBen Hutchings /* Remove buffers put into a tx_queue. None of the buffers must have 982f7251a9cSBen Hutchings * an skb attached. 983f7251a9cSBen Hutchings */ 98470b33fb0SEdward Cree static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue, 98570b33fb0SEdward Cree unsigned int insert_count) 986874aeea5SJeff Kirsher { 987874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 988874aeea5SJeff Kirsher 989874aeea5SJeff Kirsher /* Work backwards until we hit the original insert pointer value */ 99070b33fb0SEdward Cree while (tx_queue->insert_count != insert_count) { 991874aeea5SJeff Kirsher --tx_queue->insert_count; 9920fe5565bSBen Hutchings buffer = __efx_tx_queue_get_insert_buffer(tx_queue); 993f7251a9cSBen Hutchings efx_dequeue_buffer(tx_queue, buffer, NULL, NULL); 994874aeea5SJeff Kirsher } 995874aeea5SJeff Kirsher } 996874aeea5SJeff Kirsher 997874aeea5SJeff Kirsher 998874aeea5SJeff Kirsher /* Parse the SKB header and initialise state. */ 999c78c39e6SBen Hutchings static int tso_start(struct tso_state *st, struct efx_nic *efx, 1000c78c39e6SBen Hutchings const struct sk_buff *skb) 1001874aeea5SJeff Kirsher { 100293413f50SBen Hutchings bool use_opt_desc = efx_nic_rev(efx) >= EFX_REV_HUNT_A0; 1003dfa50be9SBen Hutchings struct device *dma_dev = &efx->pci_dev->dev; 1004c78c39e6SBen Hutchings unsigned int header_len, in_len; 1005dfa50be9SBen Hutchings dma_addr_t dma_addr; 1006c78c39e6SBen Hutchings 10079714284fSBen Hutchings st->ip_off = skb_network_header(skb) - skb->data; 10089714284fSBen Hutchings st->tcp_off = skb_transport_header(skb) - skb->data; 1009c78c39e6SBen Hutchings header_len = st->tcp_off + (tcp_hdr(skb)->doff << 2u); 1010c78c39e6SBen Hutchings in_len = skb_headlen(skb) - header_len; 1011c78c39e6SBen Hutchings st->header_len = header_len; 1012c78c39e6SBen Hutchings st->in_len = in_len; 101353cb13c6SBen Hutchings if (st->protocol == htons(ETH_P_IP)) { 10149714284fSBen Hutchings st->ip_base_len = st->header_len - st->ip_off; 1015874aeea5SJeff Kirsher st->ipv4_id = ntohs(ip_hdr(skb)->id); 101653cb13c6SBen Hutchings } else { 10179714284fSBen Hutchings st->ip_base_len = st->header_len - st->tcp_off; 1018874aeea5SJeff Kirsher st->ipv4_id = 0; 101953cb13c6SBen Hutchings } 1020874aeea5SJeff Kirsher st->seqnum = ntohl(tcp_hdr(skb)->seq); 1021874aeea5SJeff Kirsher 1022874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg); 1023874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tcp_hdr(skb)->syn); 1024874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tcp_hdr(skb)->rst); 1025874aeea5SJeff Kirsher 1026c78c39e6SBen Hutchings st->out_len = skb->len - header_len; 1027c78c39e6SBen Hutchings 102893413f50SBen Hutchings if (!use_opt_desc) { 1029dfa50be9SBen Hutchings st->header_unmap_len = 0; 1030dfa50be9SBen Hutchings 1031c78c39e6SBen Hutchings if (likely(in_len == 0)) { 10327668ff9cSBen Hutchings st->dma_flags = 0; 1033dfa50be9SBen Hutchings st->unmap_len = 0; 1034c78c39e6SBen Hutchings return 0; 1035c78c39e6SBen Hutchings } 1036c78c39e6SBen Hutchings 1037dfa50be9SBen Hutchings dma_addr = dma_map_single(dma_dev, skb->data + header_len, 1038dfa50be9SBen Hutchings in_len, DMA_TO_DEVICE); 1039c78c39e6SBen Hutchings st->dma_flags = EFX_TX_BUF_MAP_SINGLE; 1040dfa50be9SBen Hutchings st->dma_addr = dma_addr; 1041dfa50be9SBen Hutchings st->unmap_addr = dma_addr; 1042c78c39e6SBen Hutchings st->unmap_len = in_len; 1043dfa50be9SBen Hutchings } else { 1044dfa50be9SBen Hutchings dma_addr = dma_map_single(dma_dev, skb->data, 1045dfa50be9SBen Hutchings skb_headlen(skb), DMA_TO_DEVICE); 1046dfa50be9SBen Hutchings st->header_dma_addr = dma_addr; 1047dfa50be9SBen Hutchings st->header_unmap_len = skb_headlen(skb); 1048dfa50be9SBen Hutchings st->dma_flags = 0; 1049dfa50be9SBen Hutchings st->dma_addr = dma_addr + header_len; 1050dfa50be9SBen Hutchings st->unmap_len = 0; 1051dfa50be9SBen Hutchings } 1052dfa50be9SBen Hutchings 1053dfa50be9SBen Hutchings return unlikely(dma_mapping_error(dma_dev, dma_addr)) ? -ENOMEM : 0; 1054874aeea5SJeff Kirsher } 1055874aeea5SJeff Kirsher 1056874aeea5SJeff Kirsher static int tso_get_fragment(struct tso_state *st, struct efx_nic *efx, 1057874aeea5SJeff Kirsher skb_frag_t *frag) 1058874aeea5SJeff Kirsher { 10594a22c4c9SIan Campbell st->unmap_addr = skb_frag_dma_map(&efx->pci_dev->dev, frag, 0, 10609e903e08SEric Dumazet skb_frag_size(frag), DMA_TO_DEVICE); 10615d6bcdfeSIan Campbell if (likely(!dma_mapping_error(&efx->pci_dev->dev, st->unmap_addr))) { 10627668ff9cSBen Hutchings st->dma_flags = 0; 10639e903e08SEric Dumazet st->unmap_len = skb_frag_size(frag); 10649e903e08SEric Dumazet st->in_len = skb_frag_size(frag); 1065874aeea5SJeff Kirsher st->dma_addr = st->unmap_addr; 1066874aeea5SJeff Kirsher return 0; 1067874aeea5SJeff Kirsher } 1068874aeea5SJeff Kirsher return -ENOMEM; 1069874aeea5SJeff Kirsher } 1070874aeea5SJeff Kirsher 1071874aeea5SJeff Kirsher 1072874aeea5SJeff Kirsher /** 1073874aeea5SJeff Kirsher * tso_fill_packet_with_fragment - form descriptors for the current fragment 1074874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 1075874aeea5SJeff Kirsher * @skb: Socket buffer 1076874aeea5SJeff Kirsher * @st: TSO state 1077874aeea5SJeff Kirsher * 1078874aeea5SJeff Kirsher * Form descriptors for the current fragment, until we reach the end 107914bf718fSBen Hutchings * of fragment or end-of-packet. 1080874aeea5SJeff Kirsher */ 108114bf718fSBen Hutchings static void tso_fill_packet_with_fragment(struct efx_tx_queue *tx_queue, 1082874aeea5SJeff Kirsher const struct sk_buff *skb, 1083874aeea5SJeff Kirsher struct tso_state *st) 1084874aeea5SJeff Kirsher { 1085874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 108614bf718fSBen Hutchings int n; 1087874aeea5SJeff Kirsher 1088874aeea5SJeff Kirsher if (st->in_len == 0) 108914bf718fSBen Hutchings return; 1090874aeea5SJeff Kirsher if (st->packet_space == 0) 109114bf718fSBen Hutchings return; 1092874aeea5SJeff Kirsher 1093874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(st->in_len <= 0); 1094874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(st->packet_space <= 0); 1095874aeea5SJeff Kirsher 1096874aeea5SJeff Kirsher n = min(st->in_len, st->packet_space); 1097874aeea5SJeff Kirsher 1098874aeea5SJeff Kirsher st->packet_space -= n; 1099874aeea5SJeff Kirsher st->out_len -= n; 1100874aeea5SJeff Kirsher st->in_len -= n; 1101874aeea5SJeff Kirsher 110214bf718fSBen Hutchings efx_tx_queue_insert(tx_queue, st->dma_addr, n, &buffer); 110314bf718fSBen Hutchings 11047668ff9cSBen Hutchings if (st->out_len == 0) { 1105874aeea5SJeff Kirsher /* Transfer ownership of the skb */ 1106874aeea5SJeff Kirsher buffer->skb = skb; 11077668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_SKB; 11087668ff9cSBen Hutchings } else if (st->packet_space != 0) { 11097668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 11107668ff9cSBen Hutchings } 1111874aeea5SJeff Kirsher 1112874aeea5SJeff Kirsher if (st->in_len == 0) { 11130e33d870SBen Hutchings /* Transfer ownership of the DMA mapping */ 1114874aeea5SJeff Kirsher buffer->unmap_len = st->unmap_len; 11152acdb92eSAlexandre Rames buffer->dma_offset = buffer->unmap_len - buffer->len; 11167668ff9cSBen Hutchings buffer->flags |= st->dma_flags; 1117874aeea5SJeff Kirsher st->unmap_len = 0; 1118874aeea5SJeff Kirsher } 1119874aeea5SJeff Kirsher 1120874aeea5SJeff Kirsher st->dma_addr += n; 1121874aeea5SJeff Kirsher } 1122874aeea5SJeff Kirsher 1123874aeea5SJeff Kirsher 1124874aeea5SJeff Kirsher /** 1125874aeea5SJeff Kirsher * tso_start_new_packet - generate a new header and prepare for the new packet 1126874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 1127874aeea5SJeff Kirsher * @skb: Socket buffer 1128874aeea5SJeff Kirsher * @st: TSO state 1129874aeea5SJeff Kirsher * 1130874aeea5SJeff Kirsher * Generate a new header and prepare for the new packet. Return 0 on 1131f7251a9cSBen Hutchings * success, or -%ENOMEM if failed to alloc header. 1132874aeea5SJeff Kirsher */ 1133874aeea5SJeff Kirsher static int tso_start_new_packet(struct efx_tx_queue *tx_queue, 1134874aeea5SJeff Kirsher const struct sk_buff *skb, 1135874aeea5SJeff Kirsher struct tso_state *st) 1136874aeea5SJeff Kirsher { 1137f7251a9cSBen Hutchings struct efx_tx_buffer *buffer = 11380fe5565bSBen Hutchings efx_tx_queue_get_insert_buffer(tx_queue); 1139dfa50be9SBen Hutchings bool is_last = st->out_len <= skb_shinfo(skb)->gso_size; 1140dfa50be9SBen Hutchings u8 tcp_flags_clear; 1141dfa50be9SBen Hutchings 1142dfa50be9SBen Hutchings if (!is_last) { 1143dfa50be9SBen Hutchings st->packet_space = skb_shinfo(skb)->gso_size; 1144dfa50be9SBen Hutchings tcp_flags_clear = 0x09; /* mask out FIN and PSH */ 1145dfa50be9SBen Hutchings } else { 1146dfa50be9SBen Hutchings st->packet_space = st->out_len; 1147dfa50be9SBen Hutchings tcp_flags_clear = 0x00; 1148dfa50be9SBen Hutchings } 1149dfa50be9SBen Hutchings 1150dfa50be9SBen Hutchings if (!st->header_unmap_len) { 1151dfa50be9SBen Hutchings /* Allocate and insert a DMA-mapped header buffer. */ 1152874aeea5SJeff Kirsher struct tcphdr *tsoh_th; 1153874aeea5SJeff Kirsher unsigned ip_length; 1154874aeea5SJeff Kirsher u8 *header; 1155f7251a9cSBen Hutchings int rc; 1156874aeea5SJeff Kirsher 1157f7251a9cSBen Hutchings header = efx_tsoh_get_buffer(tx_queue, buffer, st->header_len); 1158f7251a9cSBen Hutchings if (!header) 1159f7251a9cSBen Hutchings return -ENOMEM; 1160874aeea5SJeff Kirsher 11619714284fSBen Hutchings tsoh_th = (struct tcphdr *)(header + st->tcp_off); 1162874aeea5SJeff Kirsher 1163874aeea5SJeff Kirsher /* Copy and update the headers. */ 1164874aeea5SJeff Kirsher memcpy(header, skb->data, st->header_len); 1165874aeea5SJeff Kirsher 1166874aeea5SJeff Kirsher tsoh_th->seq = htonl(st->seqnum); 1167dfa50be9SBen Hutchings ((u8 *)tsoh_th)[13] &= ~tcp_flags_clear; 1168dfa50be9SBen Hutchings 116953cb13c6SBen Hutchings ip_length = st->ip_base_len + st->packet_space; 1170874aeea5SJeff Kirsher 1171874aeea5SJeff Kirsher if (st->protocol == htons(ETH_P_IP)) { 1172dfa50be9SBen Hutchings struct iphdr *tsoh_iph = 1173dfa50be9SBen Hutchings (struct iphdr *)(header + st->ip_off); 1174874aeea5SJeff Kirsher 1175874aeea5SJeff Kirsher tsoh_iph->tot_len = htons(ip_length); 1176874aeea5SJeff Kirsher tsoh_iph->id = htons(st->ipv4_id); 1177874aeea5SJeff Kirsher } else { 1178874aeea5SJeff Kirsher struct ipv6hdr *tsoh_iph = 11799714284fSBen Hutchings (struct ipv6hdr *)(header + st->ip_off); 1180874aeea5SJeff Kirsher 118153cb13c6SBen Hutchings tsoh_iph->payload_len = htons(ip_length); 1182874aeea5SJeff Kirsher } 1183874aeea5SJeff Kirsher 1184f7251a9cSBen Hutchings rc = efx_tso_put_header(tx_queue, buffer, header); 1185f7251a9cSBen Hutchings if (unlikely(rc)) 1186f7251a9cSBen Hutchings return rc; 1187dfa50be9SBen Hutchings } else { 1188dfa50be9SBen Hutchings /* Send the original headers with a TSO option descriptor 1189dfa50be9SBen Hutchings * in front 1190dfa50be9SBen Hutchings */ 1191dfa50be9SBen Hutchings u8 tcp_flags = ((u8 *)tcp_hdr(skb))[13] & ~tcp_flags_clear; 1192dfa50be9SBen Hutchings 1193dfa50be9SBen Hutchings buffer->flags = EFX_TX_BUF_OPTION; 1194dfa50be9SBen Hutchings buffer->len = 0; 1195dfa50be9SBen Hutchings buffer->unmap_len = 0; 1196dfa50be9SBen Hutchings EFX_POPULATE_QWORD_5(buffer->option, 1197dfa50be9SBen Hutchings ESF_DZ_TX_DESC_IS_OPT, 1, 1198dfa50be9SBen Hutchings ESF_DZ_TX_OPTION_TYPE, 1199dfa50be9SBen Hutchings ESE_DZ_TX_OPTION_DESC_TSO, 1200dfa50be9SBen Hutchings ESF_DZ_TX_TSO_TCP_FLAGS, tcp_flags, 1201dfa50be9SBen Hutchings ESF_DZ_TX_TSO_IP_ID, st->ipv4_id, 1202dfa50be9SBen Hutchings ESF_DZ_TX_TSO_TCP_SEQNO, st->seqnum); 1203dfa50be9SBen Hutchings ++tx_queue->insert_count; 1204dfa50be9SBen Hutchings 1205dfa50be9SBen Hutchings /* We mapped the headers in tso_start(). Unmap them 1206dfa50be9SBen Hutchings * when the last segment is completed. 1207dfa50be9SBen Hutchings */ 12080fe5565bSBen Hutchings buffer = efx_tx_queue_get_insert_buffer(tx_queue); 1209dfa50be9SBen Hutchings buffer->dma_addr = st->header_dma_addr; 1210dfa50be9SBen Hutchings buffer->len = st->header_len; 1211dfa50be9SBen Hutchings if (is_last) { 1212dfa50be9SBen Hutchings buffer->flags = EFX_TX_BUF_CONT | EFX_TX_BUF_MAP_SINGLE; 1213dfa50be9SBen Hutchings buffer->unmap_len = st->header_unmap_len; 12142acdb92eSAlexandre Rames buffer->dma_offset = 0; 1215dfa50be9SBen Hutchings /* Ensure we only unmap them once in case of a 1216dfa50be9SBen Hutchings * later DMA mapping error and rollback 1217dfa50be9SBen Hutchings */ 1218dfa50be9SBen Hutchings st->header_unmap_len = 0; 1219dfa50be9SBen Hutchings } else { 1220dfa50be9SBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 1221dfa50be9SBen Hutchings buffer->unmap_len = 0; 1222dfa50be9SBen Hutchings } 1223dfa50be9SBen Hutchings ++tx_queue->insert_count; 1224dfa50be9SBen Hutchings } 1225dfa50be9SBen Hutchings 1226dfa50be9SBen Hutchings st->seqnum += skb_shinfo(skb)->gso_size; 1227dfa50be9SBen Hutchings 1228dfa50be9SBen Hutchings /* Linux leaves suitable gaps in the IP ID space for us to fill. */ 1229dfa50be9SBen Hutchings ++st->ipv4_id; 1230f7251a9cSBen Hutchings 1231874aeea5SJeff Kirsher ++tx_queue->tso_packets; 1232874aeea5SJeff Kirsher 12338ccf3800SAndrew Rybchenko ++tx_queue->tx_packets; 12348ccf3800SAndrew Rybchenko 1235874aeea5SJeff Kirsher return 0; 1236874aeea5SJeff Kirsher } 1237874aeea5SJeff Kirsher 1238874aeea5SJeff Kirsher 1239874aeea5SJeff Kirsher /** 1240874aeea5SJeff Kirsher * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer 1241874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 1242874aeea5SJeff Kirsher * @skb: Socket buffer 1243874aeea5SJeff Kirsher * 1244874aeea5SJeff Kirsher * Context: You must hold netif_tx_lock() to call this function. 1245874aeea5SJeff Kirsher * 1246874aeea5SJeff Kirsher * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if 1247874aeea5SJeff Kirsher * @skb was not enqueued. In all cases @skb is consumed. Return 124814bf718fSBen Hutchings * %NETDEV_TX_OK. 1249874aeea5SJeff Kirsher */ 1250874aeea5SJeff Kirsher static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue, 1251874aeea5SJeff Kirsher struct sk_buff *skb) 1252874aeea5SJeff Kirsher { 1253874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 125470b33fb0SEdward Cree unsigned int old_insert_count = tx_queue->insert_count; 125514bf718fSBen Hutchings int frag_i, rc; 1256874aeea5SJeff Kirsher struct tso_state state; 1257874aeea5SJeff Kirsher 1258874aeea5SJeff Kirsher /* Find the packet protocol and sanity-check it */ 1259874aeea5SJeff Kirsher state.protocol = efx_tso_check_protocol(skb); 1260874aeea5SJeff Kirsher 126170b33fb0SEdward Cree EFX_BUG_ON_PARANOID(tx_queue->write_count > tx_queue->insert_count); 1262874aeea5SJeff Kirsher 1263c78c39e6SBen Hutchings rc = tso_start(&state, efx, skb); 1264c78c39e6SBen Hutchings if (rc) 1265c78c39e6SBen Hutchings goto mem_err; 1266874aeea5SJeff Kirsher 1267c78c39e6SBen Hutchings if (likely(state.in_len == 0)) { 1268874aeea5SJeff Kirsher /* Grab the first payload fragment. */ 1269874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags < 1); 1270874aeea5SJeff Kirsher frag_i = 0; 1271874aeea5SJeff Kirsher rc = tso_get_fragment(&state, efx, 1272874aeea5SJeff Kirsher skb_shinfo(skb)->frags + frag_i); 1273874aeea5SJeff Kirsher if (rc) 1274874aeea5SJeff Kirsher goto mem_err; 1275874aeea5SJeff Kirsher } else { 1276c78c39e6SBen Hutchings /* Payload starts in the header area. */ 1277874aeea5SJeff Kirsher frag_i = -1; 1278874aeea5SJeff Kirsher } 1279874aeea5SJeff Kirsher 1280874aeea5SJeff Kirsher if (tso_start_new_packet(tx_queue, skb, &state) < 0) 1281874aeea5SJeff Kirsher goto mem_err; 1282874aeea5SJeff Kirsher 1283874aeea5SJeff Kirsher while (1) { 128414bf718fSBen Hutchings tso_fill_packet_with_fragment(tx_queue, skb, &state); 1285874aeea5SJeff Kirsher 1286874aeea5SJeff Kirsher /* Move onto the next fragment? */ 1287874aeea5SJeff Kirsher if (state.in_len == 0) { 1288874aeea5SJeff Kirsher if (++frag_i >= skb_shinfo(skb)->nr_frags) 1289874aeea5SJeff Kirsher /* End of payload reached. */ 1290874aeea5SJeff Kirsher break; 1291874aeea5SJeff Kirsher rc = tso_get_fragment(&state, efx, 1292874aeea5SJeff Kirsher skb_shinfo(skb)->frags + frag_i); 1293874aeea5SJeff Kirsher if (rc) 1294874aeea5SJeff Kirsher goto mem_err; 1295874aeea5SJeff Kirsher } 1296874aeea5SJeff Kirsher 1297874aeea5SJeff Kirsher /* Start at new packet? */ 1298874aeea5SJeff Kirsher if (state.packet_space == 0 && 1299874aeea5SJeff Kirsher tso_start_new_packet(tx_queue, skb, &state) < 0) 1300874aeea5SJeff Kirsher goto mem_err; 1301874aeea5SJeff Kirsher } 1302874aeea5SJeff Kirsher 1303449fa023SEric Dumazet netdev_tx_sent_queue(tx_queue->core_txq, skb->len); 1304449fa023SEric Dumazet 130514bf718fSBen Hutchings efx_tx_maybe_stop_queue(tx_queue); 130614bf718fSBen Hutchings 130770b33fb0SEdward Cree /* Pass off to hardware */ 130870b33fb0SEdward Cree if (!skb->xmit_more || netif_xmit_stopped(tx_queue->core_txq)) 130970b33fb0SEdward Cree efx_nic_push_buffers(tx_queue); 131070b33fb0SEdward Cree 1311874aeea5SJeff Kirsher tx_queue->tso_bursts++; 1312874aeea5SJeff Kirsher return NETDEV_TX_OK; 1313874aeea5SJeff Kirsher 1314874aeea5SJeff Kirsher mem_err: 1315874aeea5SJeff Kirsher netif_err(efx, tx_err, efx->net_dev, 13160e33d870SBen Hutchings "Out of memory for TSO headers, or DMA mapping error\n"); 1317874aeea5SJeff Kirsher dev_kfree_skb_any(skb); 1318874aeea5SJeff Kirsher 1319874aeea5SJeff Kirsher /* Free the DMA mapping we were in the process of writing out */ 1320874aeea5SJeff Kirsher if (state.unmap_len) { 13217668ff9cSBen Hutchings if (state.dma_flags & EFX_TX_BUF_MAP_SINGLE) 13220e33d870SBen Hutchings dma_unmap_single(&efx->pci_dev->dev, state.unmap_addr, 13230e33d870SBen Hutchings state.unmap_len, DMA_TO_DEVICE); 1324874aeea5SJeff Kirsher else 13250e33d870SBen Hutchings dma_unmap_page(&efx->pci_dev->dev, state.unmap_addr, 13260e33d870SBen Hutchings state.unmap_len, DMA_TO_DEVICE); 1327874aeea5SJeff Kirsher } 1328874aeea5SJeff Kirsher 1329dfa50be9SBen Hutchings /* Free the header DMA mapping, if using option descriptors */ 1330dfa50be9SBen Hutchings if (state.header_unmap_len) 1331dfa50be9SBen Hutchings dma_unmap_single(&efx->pci_dev->dev, state.header_dma_addr, 1332dfa50be9SBen Hutchings state.header_unmap_len, DMA_TO_DEVICE); 1333dfa50be9SBen Hutchings 133470b33fb0SEdward Cree efx_enqueue_unwind(tx_queue, old_insert_count); 133514bf718fSBen Hutchings return NETDEV_TX_OK; 1336874aeea5SJeff Kirsher } 1337