1874aeea5SJeff Kirsher /**************************************************************************** 2f7a6d2c4SBen Hutchings * Driver for Solarflare network controllers and boards 3874aeea5SJeff Kirsher * Copyright 2005-2006 Fen Systems Ltd. 4f7a6d2c4SBen Hutchings * Copyright 2005-2013 Solarflare Communications Inc. 5874aeea5SJeff Kirsher * 6874aeea5SJeff Kirsher * This program is free software; you can redistribute it and/or modify it 7874aeea5SJeff Kirsher * under the terms of the GNU General Public License version 2 as published 8874aeea5SJeff Kirsher * by the Free Software Foundation, incorporated herein by reference. 9874aeea5SJeff Kirsher */ 10874aeea5SJeff Kirsher 11874aeea5SJeff Kirsher #include <linux/pci.h> 12874aeea5SJeff Kirsher #include <linux/tcp.h> 13874aeea5SJeff Kirsher #include <linux/ip.h> 14874aeea5SJeff Kirsher #include <linux/in.h> 15874aeea5SJeff Kirsher #include <linux/ipv6.h> 16874aeea5SJeff Kirsher #include <linux/slab.h> 17874aeea5SJeff Kirsher #include <net/ipv6.h> 18874aeea5SJeff Kirsher #include <linux/if_ether.h> 19874aeea5SJeff Kirsher #include <linux/highmem.h> 20183233beSBen Hutchings #include <linux/cache.h> 21874aeea5SJeff Kirsher #include "net_driver.h" 22874aeea5SJeff Kirsher #include "efx.h" 23183233beSBen Hutchings #include "io.h" 24874aeea5SJeff Kirsher #include "nic.h" 25874aeea5SJeff Kirsher #include "workarounds.h" 26dfa50be9SBen Hutchings #include "ef10_regs.h" 27874aeea5SJeff Kirsher 28183233beSBen Hutchings #ifdef EFX_USE_PIO 29183233beSBen Hutchings 30183233beSBen Hutchings #define EFX_PIOBUF_SIZE_MAX ER_DZ_TX_PIOBUF_SIZE 31183233beSBen Hutchings #define EFX_PIOBUF_SIZE_DEF ALIGN(256, L1_CACHE_BYTES) 32183233beSBen Hutchings unsigned int efx_piobuf_size __read_mostly = EFX_PIOBUF_SIZE_DEF; 33183233beSBen Hutchings 34183233beSBen Hutchings #endif /* EFX_USE_PIO */ 35183233beSBen Hutchings 360fe5565bSBen Hutchings static inline unsigned int 370fe5565bSBen Hutchings efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue) 380fe5565bSBen Hutchings { 390fe5565bSBen Hutchings return tx_queue->insert_count & tx_queue->ptr_mask; 400fe5565bSBen Hutchings } 410fe5565bSBen Hutchings 420fe5565bSBen Hutchings static inline struct efx_tx_buffer * 430fe5565bSBen Hutchings __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 440fe5565bSBen Hutchings { 450fe5565bSBen Hutchings return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; 460fe5565bSBen Hutchings } 470fe5565bSBen Hutchings 480fe5565bSBen Hutchings static inline struct efx_tx_buffer * 490fe5565bSBen Hutchings efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 500fe5565bSBen Hutchings { 510fe5565bSBen Hutchings struct efx_tx_buffer *buffer = 520fe5565bSBen Hutchings __efx_tx_queue_get_insert_buffer(tx_queue); 530fe5565bSBen Hutchings 540fe5565bSBen Hutchings EFX_BUG_ON_PARANOID(buffer->len); 550fe5565bSBen Hutchings EFX_BUG_ON_PARANOID(buffer->flags); 560fe5565bSBen Hutchings EFX_BUG_ON_PARANOID(buffer->unmap_len); 570fe5565bSBen Hutchings 580fe5565bSBen Hutchings return buffer; 590fe5565bSBen Hutchings } 600fe5565bSBen Hutchings 61874aeea5SJeff Kirsher static void efx_dequeue_buffer(struct efx_tx_queue *tx_queue, 62c3940999STom Herbert struct efx_tx_buffer *buffer, 63c3940999STom Herbert unsigned int *pkts_compl, 64c3940999STom Herbert unsigned int *bytes_compl) 65874aeea5SJeff Kirsher { 66874aeea5SJeff Kirsher if (buffer->unmap_len) { 670e33d870SBen Hutchings struct device *dma_dev = &tx_queue->efx->pci_dev->dev; 682acdb92eSAlexandre Rames dma_addr_t unmap_addr = buffer->dma_addr - buffer->dma_offset; 697668ff9cSBen Hutchings if (buffer->flags & EFX_TX_BUF_MAP_SINGLE) 700e33d870SBen Hutchings dma_unmap_single(dma_dev, unmap_addr, buffer->unmap_len, 710e33d870SBen Hutchings DMA_TO_DEVICE); 72874aeea5SJeff Kirsher else 730e33d870SBen Hutchings dma_unmap_page(dma_dev, unmap_addr, buffer->unmap_len, 740e33d870SBen Hutchings DMA_TO_DEVICE); 75874aeea5SJeff Kirsher buffer->unmap_len = 0; 76874aeea5SJeff Kirsher } 77874aeea5SJeff Kirsher 787668ff9cSBen Hutchings if (buffer->flags & EFX_TX_BUF_SKB) { 79c3940999STom Herbert (*pkts_compl)++; 80c3940999STom Herbert (*bytes_compl) += buffer->skb->len; 81874aeea5SJeff Kirsher dev_kfree_skb_any((struct sk_buff *) buffer->skb); 82874aeea5SJeff Kirsher netif_vdbg(tx_queue->efx, tx_done, tx_queue->efx->net_dev, 83874aeea5SJeff Kirsher "TX queue %d transmission id %x complete\n", 84874aeea5SJeff Kirsher tx_queue->queue, tx_queue->read_count); 85f7251a9cSBen Hutchings } else if (buffer->flags & EFX_TX_BUF_HEAP) { 86f7251a9cSBen Hutchings kfree(buffer->heap_buf); 87874aeea5SJeff Kirsher } 887668ff9cSBen Hutchings 89f7251a9cSBen Hutchings buffer->len = 0; 90f7251a9cSBen Hutchings buffer->flags = 0; 91874aeea5SJeff Kirsher } 92874aeea5SJeff Kirsher 93874aeea5SJeff Kirsher static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue, 94874aeea5SJeff Kirsher struct sk_buff *skb); 95874aeea5SJeff Kirsher 96874aeea5SJeff Kirsher static inline unsigned 97874aeea5SJeff Kirsher efx_max_tx_len(struct efx_nic *efx, dma_addr_t dma_addr) 98874aeea5SJeff Kirsher { 99874aeea5SJeff Kirsher /* Depending on the NIC revision, we can use descriptor 100874aeea5SJeff Kirsher * lengths up to 8K or 8K-1. However, since PCI Express 101874aeea5SJeff Kirsher * devices must split read requests at 4K boundaries, there is 102874aeea5SJeff Kirsher * little benefit from using descriptors that cross those 103874aeea5SJeff Kirsher * boundaries and we keep things simple by not doing so. 104874aeea5SJeff Kirsher */ 1055b6262d0SBen Hutchings unsigned len = (~dma_addr & (EFX_PAGE_SIZE - 1)) + 1; 106874aeea5SJeff Kirsher 107874aeea5SJeff Kirsher /* Work around hardware bug for unaligned buffers. */ 108874aeea5SJeff Kirsher if (EFX_WORKAROUND_5391(efx) && (dma_addr & 0xf)) 109874aeea5SJeff Kirsher len = min_t(unsigned, len, 512 - (dma_addr & 0xf)); 110874aeea5SJeff Kirsher 111874aeea5SJeff Kirsher return len; 112874aeea5SJeff Kirsher } 113874aeea5SJeff Kirsher 1147e6d06f0SBen Hutchings unsigned int efx_tx_max_skb_descs(struct efx_nic *efx) 1157e6d06f0SBen Hutchings { 1167e6d06f0SBen Hutchings /* Header and payload descriptor for each output segment, plus 1177e6d06f0SBen Hutchings * one for every input fragment boundary within a segment 1187e6d06f0SBen Hutchings */ 1197e6d06f0SBen Hutchings unsigned int max_descs = EFX_TSO_MAX_SEGS * 2 + MAX_SKB_FRAGS; 1207e6d06f0SBen Hutchings 121dfa50be9SBen Hutchings /* Possibly one more per segment for the alignment workaround, 122dfa50be9SBen Hutchings * or for option descriptors 123dfa50be9SBen Hutchings */ 124dfa50be9SBen Hutchings if (EFX_WORKAROUND_5391(efx) || efx_nic_rev(efx) >= EFX_REV_HUNT_A0) 1257e6d06f0SBen Hutchings max_descs += EFX_TSO_MAX_SEGS; 1267e6d06f0SBen Hutchings 1277e6d06f0SBen Hutchings /* Possibly more for PCIe page boundaries within input fragments */ 1287e6d06f0SBen Hutchings if (PAGE_SIZE > EFX_PAGE_SIZE) 1297e6d06f0SBen Hutchings max_descs += max_t(unsigned int, MAX_SKB_FRAGS, 1307e6d06f0SBen Hutchings DIV_ROUND_UP(GSO_MAX_SIZE, EFX_PAGE_SIZE)); 1317e6d06f0SBen Hutchings 1327e6d06f0SBen Hutchings return max_descs; 1337e6d06f0SBen Hutchings } 1347e6d06f0SBen Hutchings 13514bf718fSBen Hutchings /* Get partner of a TX queue, seen as part of the same net core queue */ 13614bf718fSBen Hutchings static struct efx_tx_queue *efx_tx_queue_partner(struct efx_tx_queue *tx_queue) 13714bf718fSBen Hutchings { 13814bf718fSBen Hutchings if (tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD) 13914bf718fSBen Hutchings return tx_queue - EFX_TXQ_TYPE_OFFLOAD; 14014bf718fSBen Hutchings else 14114bf718fSBen Hutchings return tx_queue + EFX_TXQ_TYPE_OFFLOAD; 14214bf718fSBen Hutchings } 14314bf718fSBen Hutchings 14414bf718fSBen Hutchings static void efx_tx_maybe_stop_queue(struct efx_tx_queue *txq1) 14514bf718fSBen Hutchings { 14614bf718fSBen Hutchings /* We need to consider both queues that the net core sees as one */ 14714bf718fSBen Hutchings struct efx_tx_queue *txq2 = efx_tx_queue_partner(txq1); 14814bf718fSBen Hutchings struct efx_nic *efx = txq1->efx; 14914bf718fSBen Hutchings unsigned int fill_level; 15014bf718fSBen Hutchings 15114bf718fSBen Hutchings fill_level = max(txq1->insert_count - txq1->old_read_count, 15214bf718fSBen Hutchings txq2->insert_count - txq2->old_read_count); 15314bf718fSBen Hutchings if (likely(fill_level < efx->txq_stop_thresh)) 15414bf718fSBen Hutchings return; 15514bf718fSBen Hutchings 15614bf718fSBen Hutchings /* We used the stale old_read_count above, which gives us a 15714bf718fSBen Hutchings * pessimistic estimate of the fill level (which may even 15814bf718fSBen Hutchings * validly be >= efx->txq_entries). Now try again using 15914bf718fSBen Hutchings * read_count (more likely to be a cache miss). 16014bf718fSBen Hutchings * 16114bf718fSBen Hutchings * If we read read_count and then conditionally stop the 16214bf718fSBen Hutchings * queue, it is possible for the completion path to race with 16314bf718fSBen Hutchings * us and complete all outstanding descriptors in the middle, 16414bf718fSBen Hutchings * after which there will be no more completions to wake it. 16514bf718fSBen Hutchings * Therefore we stop the queue first, then read read_count 16614bf718fSBen Hutchings * (with a memory barrier to ensure the ordering), then 16714bf718fSBen Hutchings * restart the queue if the fill level turns out to be low 16814bf718fSBen Hutchings * enough. 16914bf718fSBen Hutchings */ 17014bf718fSBen Hutchings netif_tx_stop_queue(txq1->core_txq); 17114bf718fSBen Hutchings smp_mb(); 17214bf718fSBen Hutchings txq1->old_read_count = ACCESS_ONCE(txq1->read_count); 17314bf718fSBen Hutchings txq2->old_read_count = ACCESS_ONCE(txq2->read_count); 17414bf718fSBen Hutchings 17514bf718fSBen Hutchings fill_level = max(txq1->insert_count - txq1->old_read_count, 17614bf718fSBen Hutchings txq2->insert_count - txq2->old_read_count); 17714bf718fSBen Hutchings EFX_BUG_ON_PARANOID(fill_level >= efx->txq_entries); 17814bf718fSBen Hutchings if (likely(fill_level < efx->txq_stop_thresh)) { 17914bf718fSBen Hutchings smp_mb(); 18014bf718fSBen Hutchings if (likely(!efx->loopback_selftest)) 18114bf718fSBen Hutchings netif_tx_start_queue(txq1->core_txq); 18214bf718fSBen Hutchings } 18314bf718fSBen Hutchings } 18414bf718fSBen Hutchings 185ee45fd92SJon Cooper #ifdef EFX_USE_PIO 186ee45fd92SJon Cooper 187ee45fd92SJon Cooper struct efx_short_copy_buffer { 188ee45fd92SJon Cooper int used; 189ee45fd92SJon Cooper u8 buf[L1_CACHE_BYTES]; 190ee45fd92SJon Cooper }; 191ee45fd92SJon Cooper 192ee45fd92SJon Cooper /* Copy to PIO, respecting that writes to PIO buffers must be dword aligned. 193ee45fd92SJon Cooper * Advances piobuf pointer. Leaves additional data in the copy buffer. 194ee45fd92SJon Cooper */ 195ee45fd92SJon Cooper static void efx_memcpy_toio_aligned(struct efx_nic *efx, u8 __iomem **piobuf, 196ee45fd92SJon Cooper u8 *data, int len, 197ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 198ee45fd92SJon Cooper { 199ee45fd92SJon Cooper int block_len = len & ~(sizeof(copy_buf->buf) - 1); 200ee45fd92SJon Cooper 201ee45fd92SJon Cooper memcpy_toio(*piobuf, data, block_len); 202ee45fd92SJon Cooper *piobuf += block_len; 203ee45fd92SJon Cooper len -= block_len; 204ee45fd92SJon Cooper 205ee45fd92SJon Cooper if (len) { 206ee45fd92SJon Cooper data += block_len; 207ee45fd92SJon Cooper BUG_ON(copy_buf->used); 208ee45fd92SJon Cooper BUG_ON(len > sizeof(copy_buf->buf)); 209ee45fd92SJon Cooper memcpy(copy_buf->buf, data, len); 210ee45fd92SJon Cooper copy_buf->used = len; 211ee45fd92SJon Cooper } 212ee45fd92SJon Cooper } 213ee45fd92SJon Cooper 214ee45fd92SJon Cooper /* Copy to PIO, respecting dword alignment, popping data from copy buffer first. 215ee45fd92SJon Cooper * Advances piobuf pointer. Leaves additional data in the copy buffer. 216ee45fd92SJon Cooper */ 217ee45fd92SJon Cooper static void efx_memcpy_toio_aligned_cb(struct efx_nic *efx, u8 __iomem **piobuf, 218ee45fd92SJon Cooper u8 *data, int len, 219ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 220ee45fd92SJon Cooper { 221ee45fd92SJon Cooper if (copy_buf->used) { 222ee45fd92SJon Cooper /* if the copy buffer is partially full, fill it up and write */ 223ee45fd92SJon Cooper int copy_to_buf = 224ee45fd92SJon Cooper min_t(int, sizeof(copy_buf->buf) - copy_buf->used, len); 225ee45fd92SJon Cooper 226ee45fd92SJon Cooper memcpy(copy_buf->buf + copy_buf->used, data, copy_to_buf); 227ee45fd92SJon Cooper copy_buf->used += copy_to_buf; 228ee45fd92SJon Cooper 229ee45fd92SJon Cooper /* if we didn't fill it up then we're done for now */ 230ee45fd92SJon Cooper if (copy_buf->used < sizeof(copy_buf->buf)) 231ee45fd92SJon Cooper return; 232ee45fd92SJon Cooper 233ee45fd92SJon Cooper memcpy_toio(*piobuf, copy_buf->buf, sizeof(copy_buf->buf)); 234ee45fd92SJon Cooper *piobuf += sizeof(copy_buf->buf); 235ee45fd92SJon Cooper data += copy_to_buf; 236ee45fd92SJon Cooper len -= copy_to_buf; 237ee45fd92SJon Cooper copy_buf->used = 0; 238ee45fd92SJon Cooper } 239ee45fd92SJon Cooper 240ee45fd92SJon Cooper efx_memcpy_toio_aligned(efx, piobuf, data, len, copy_buf); 241ee45fd92SJon Cooper } 242ee45fd92SJon Cooper 243ee45fd92SJon Cooper static void efx_flush_copy_buffer(struct efx_nic *efx, u8 __iomem *piobuf, 244ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 245ee45fd92SJon Cooper { 246ee45fd92SJon Cooper /* if there's anything in it, write the whole buffer, including junk */ 247ee45fd92SJon Cooper if (copy_buf->used) 248ee45fd92SJon Cooper memcpy_toio(piobuf, copy_buf->buf, sizeof(copy_buf->buf)); 249ee45fd92SJon Cooper } 250ee45fd92SJon Cooper 251ee45fd92SJon Cooper /* Traverse skb structure and copy fragments in to PIO buffer. 252ee45fd92SJon Cooper * Advances piobuf pointer. 253ee45fd92SJon Cooper */ 254ee45fd92SJon Cooper static void efx_skb_copy_bits_to_pio(struct efx_nic *efx, struct sk_buff *skb, 255ee45fd92SJon Cooper u8 __iomem **piobuf, 256ee45fd92SJon Cooper struct efx_short_copy_buffer *copy_buf) 257ee45fd92SJon Cooper { 258ee45fd92SJon Cooper int i; 259ee45fd92SJon Cooper 260ee45fd92SJon Cooper efx_memcpy_toio_aligned(efx, piobuf, skb->data, skb_headlen(skb), 261ee45fd92SJon Cooper copy_buf); 262ee45fd92SJon Cooper 263ee45fd92SJon Cooper for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i) { 264ee45fd92SJon Cooper skb_frag_t *f = &skb_shinfo(skb)->frags[i]; 265ee45fd92SJon Cooper u8 *vaddr; 266ee45fd92SJon Cooper 267ee45fd92SJon Cooper vaddr = kmap_atomic(skb_frag_page(f)); 268ee45fd92SJon Cooper 269ee45fd92SJon Cooper efx_memcpy_toio_aligned_cb(efx, piobuf, vaddr + f->page_offset, 270ee45fd92SJon Cooper skb_frag_size(f), copy_buf); 271ee45fd92SJon Cooper kunmap_atomic(vaddr); 272ee45fd92SJon Cooper } 273ee45fd92SJon Cooper 274ee45fd92SJon Cooper EFX_BUG_ON_PARANOID(skb_shinfo(skb)->frag_list); 275ee45fd92SJon Cooper } 276ee45fd92SJon Cooper 277ee45fd92SJon Cooper static struct efx_tx_buffer * 278ee45fd92SJon Cooper efx_enqueue_skb_pio(struct efx_tx_queue *tx_queue, struct sk_buff *skb) 279ee45fd92SJon Cooper { 280ee45fd92SJon Cooper struct efx_tx_buffer *buffer = 281ee45fd92SJon Cooper efx_tx_queue_get_insert_buffer(tx_queue); 282ee45fd92SJon Cooper u8 __iomem *piobuf = tx_queue->piobuf; 283ee45fd92SJon Cooper 284ee45fd92SJon Cooper /* Copy to PIO buffer. Ensure the writes are padded to the end 285ee45fd92SJon Cooper * of a cache line, as this is required for write-combining to be 286ee45fd92SJon Cooper * effective on at least x86. 287ee45fd92SJon Cooper */ 288ee45fd92SJon Cooper 289ee45fd92SJon Cooper if (skb_shinfo(skb)->nr_frags) { 290ee45fd92SJon Cooper /* The size of the copy buffer will ensure all writes 291ee45fd92SJon Cooper * are the size of a cache line. 292ee45fd92SJon Cooper */ 293ee45fd92SJon Cooper struct efx_short_copy_buffer copy_buf; 294ee45fd92SJon Cooper 295ee45fd92SJon Cooper copy_buf.used = 0; 296ee45fd92SJon Cooper 297ee45fd92SJon Cooper efx_skb_copy_bits_to_pio(tx_queue->efx, skb, 298ee45fd92SJon Cooper &piobuf, ©_buf); 299ee45fd92SJon Cooper efx_flush_copy_buffer(tx_queue->efx, piobuf, ©_buf); 300ee45fd92SJon Cooper } else { 301ee45fd92SJon Cooper /* Pad the write to the size of a cache line. 302ee45fd92SJon Cooper * We can do this because we know the skb_shared_info sruct is 303ee45fd92SJon Cooper * after the source, and the destination buffer is big enough. 304ee45fd92SJon Cooper */ 305ee45fd92SJon Cooper BUILD_BUG_ON(L1_CACHE_BYTES > 306ee45fd92SJon Cooper SKB_DATA_ALIGN(sizeof(struct skb_shared_info))); 307ee45fd92SJon Cooper memcpy_toio(tx_queue->piobuf, skb->data, 308ee45fd92SJon Cooper ALIGN(skb->len, L1_CACHE_BYTES)); 309ee45fd92SJon Cooper } 310ee45fd92SJon Cooper 311ee45fd92SJon Cooper EFX_POPULATE_QWORD_5(buffer->option, 312ee45fd92SJon Cooper ESF_DZ_TX_DESC_IS_OPT, 1, 313ee45fd92SJon Cooper ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_PIO, 314ee45fd92SJon Cooper ESF_DZ_TX_PIO_CONT, 0, 315ee45fd92SJon Cooper ESF_DZ_TX_PIO_BYTE_CNT, skb->len, 316ee45fd92SJon Cooper ESF_DZ_TX_PIO_BUF_ADDR, 317ee45fd92SJon Cooper tx_queue->piobuf_offset); 318ee45fd92SJon Cooper ++tx_queue->pio_packets; 319ee45fd92SJon Cooper ++tx_queue->insert_count; 320ee45fd92SJon Cooper return buffer; 321ee45fd92SJon Cooper } 322ee45fd92SJon Cooper #endif /* EFX_USE_PIO */ 323ee45fd92SJon Cooper 324874aeea5SJeff Kirsher /* 325874aeea5SJeff Kirsher * Add a socket buffer to a TX queue 326874aeea5SJeff Kirsher * 327874aeea5SJeff Kirsher * This maps all fragments of a socket buffer for DMA and adds them to 328874aeea5SJeff Kirsher * the TX queue. The queue's insert pointer will be incremented by 329874aeea5SJeff Kirsher * the number of fragments in the socket buffer. 330874aeea5SJeff Kirsher * 331874aeea5SJeff Kirsher * If any DMA mapping fails, any mapped fragments will be unmapped, 332874aeea5SJeff Kirsher * the queue's insert pointer will be restored to its original value. 333874aeea5SJeff Kirsher * 334874aeea5SJeff Kirsher * This function is split out from efx_hard_start_xmit to allow the 335874aeea5SJeff Kirsher * loopback test to direct packets via specific TX queues. 336874aeea5SJeff Kirsher * 33714bf718fSBen Hutchings * Returns NETDEV_TX_OK. 338874aeea5SJeff Kirsher * You must hold netif_tx_lock() to call this function. 339874aeea5SJeff Kirsher */ 340874aeea5SJeff Kirsher netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb) 341874aeea5SJeff Kirsher { 342874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 3430e33d870SBen Hutchings struct device *dma_dev = &efx->pci_dev->dev; 344874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 345874aeea5SJeff Kirsher skb_frag_t *fragment; 3460fe5565bSBen Hutchings unsigned int len, unmap_len = 0; 347874aeea5SJeff Kirsher dma_addr_t dma_addr, unmap_addr = 0; 348874aeea5SJeff Kirsher unsigned int dma_len; 3497668ff9cSBen Hutchings unsigned short dma_flags; 35014bf718fSBen Hutchings int i = 0; 351874aeea5SJeff Kirsher 352874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count); 353874aeea5SJeff Kirsher 354874aeea5SJeff Kirsher if (skb_shinfo(skb)->gso_size) 355874aeea5SJeff Kirsher return efx_enqueue_skb_tso(tx_queue, skb); 356874aeea5SJeff Kirsher 357874aeea5SJeff Kirsher /* Get size of the initial fragment */ 358874aeea5SJeff Kirsher len = skb_headlen(skb); 359874aeea5SJeff Kirsher 360874aeea5SJeff Kirsher /* Pad if necessary */ 361874aeea5SJeff Kirsher if (EFX_WORKAROUND_15592(efx) && skb->len <= 32) { 362874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(skb->data_len); 363874aeea5SJeff Kirsher len = 32 + 1; 364874aeea5SJeff Kirsher if (skb_pad(skb, len - skb->len)) 365874aeea5SJeff Kirsher return NETDEV_TX_OK; 366874aeea5SJeff Kirsher } 367874aeea5SJeff Kirsher 368ee45fd92SJon Cooper /* Consider using PIO for short packets */ 369ee45fd92SJon Cooper #ifdef EFX_USE_PIO 370ee45fd92SJon Cooper if (skb->len <= efx_piobuf_size && tx_queue->piobuf && 371ee45fd92SJon Cooper efx_nic_tx_is_empty(tx_queue) && 372ee45fd92SJon Cooper efx_nic_tx_is_empty(efx_tx_queue_partner(tx_queue))) { 373ee45fd92SJon Cooper buffer = efx_enqueue_skb_pio(tx_queue, skb); 374ee45fd92SJon Cooper dma_flags = EFX_TX_BUF_OPTION; 375ee45fd92SJon Cooper goto finish_packet; 376ee45fd92SJon Cooper } 377ee45fd92SJon Cooper #endif 378ee45fd92SJon Cooper 3790e33d870SBen Hutchings /* Map for DMA. Use dma_map_single rather than dma_map_page 380874aeea5SJeff Kirsher * since this is more efficient on machines with sparse 381874aeea5SJeff Kirsher * memory. 382874aeea5SJeff Kirsher */ 3837668ff9cSBen Hutchings dma_flags = EFX_TX_BUF_MAP_SINGLE; 3840e33d870SBen Hutchings dma_addr = dma_map_single(dma_dev, skb->data, len, PCI_DMA_TODEVICE); 385874aeea5SJeff Kirsher 386874aeea5SJeff Kirsher /* Process all fragments */ 387874aeea5SJeff Kirsher while (1) { 3880e33d870SBen Hutchings if (unlikely(dma_mapping_error(dma_dev, dma_addr))) 3890e33d870SBen Hutchings goto dma_err; 390874aeea5SJeff Kirsher 391874aeea5SJeff Kirsher /* Store fields for marking in the per-fragment final 392874aeea5SJeff Kirsher * descriptor */ 393874aeea5SJeff Kirsher unmap_len = len; 394874aeea5SJeff Kirsher unmap_addr = dma_addr; 395874aeea5SJeff Kirsher 396874aeea5SJeff Kirsher /* Add to TX queue, splitting across DMA boundaries */ 397874aeea5SJeff Kirsher do { 3980fe5565bSBen Hutchings buffer = efx_tx_queue_get_insert_buffer(tx_queue); 399874aeea5SJeff Kirsher 400874aeea5SJeff Kirsher dma_len = efx_max_tx_len(efx, dma_addr); 401874aeea5SJeff Kirsher if (likely(dma_len >= len)) 402874aeea5SJeff Kirsher dma_len = len; 403874aeea5SJeff Kirsher 404874aeea5SJeff Kirsher /* Fill out per descriptor fields */ 405874aeea5SJeff Kirsher buffer->len = dma_len; 406874aeea5SJeff Kirsher buffer->dma_addr = dma_addr; 4077668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 408874aeea5SJeff Kirsher len -= dma_len; 409874aeea5SJeff Kirsher dma_addr += dma_len; 410874aeea5SJeff Kirsher ++tx_queue->insert_count; 411874aeea5SJeff Kirsher } while (len); 412874aeea5SJeff Kirsher 413874aeea5SJeff Kirsher /* Transfer ownership of the unmapping to the final buffer */ 4147668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT | dma_flags; 415874aeea5SJeff Kirsher buffer->unmap_len = unmap_len; 4162acdb92eSAlexandre Rames buffer->dma_offset = buffer->dma_addr - unmap_addr; 417874aeea5SJeff Kirsher unmap_len = 0; 418874aeea5SJeff Kirsher 419874aeea5SJeff Kirsher /* Get address and size of next fragment */ 420874aeea5SJeff Kirsher if (i >= skb_shinfo(skb)->nr_frags) 421874aeea5SJeff Kirsher break; 422874aeea5SJeff Kirsher fragment = &skb_shinfo(skb)->frags[i]; 4239e903e08SEric Dumazet len = skb_frag_size(fragment); 424874aeea5SJeff Kirsher i++; 425874aeea5SJeff Kirsher /* Map for DMA */ 4267668ff9cSBen Hutchings dma_flags = 0; 4270e33d870SBen Hutchings dma_addr = skb_frag_dma_map(dma_dev, fragment, 0, len, 4285d6bcdfeSIan Campbell DMA_TO_DEVICE); 429874aeea5SJeff Kirsher } 430874aeea5SJeff Kirsher 431874aeea5SJeff Kirsher /* Transfer ownership of the skb to the final buffer */ 432ee45fd92SJon Cooper finish_packet: 433874aeea5SJeff Kirsher buffer->skb = skb; 4347668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_SKB | dma_flags; 435874aeea5SJeff Kirsher 436c3940999STom Herbert netdev_tx_sent_queue(tx_queue->core_txq, skb->len); 437c3940999STom Herbert 438874aeea5SJeff Kirsher /* Pass off to hardware */ 439874aeea5SJeff Kirsher efx_nic_push_buffers(tx_queue); 440874aeea5SJeff Kirsher 44114bf718fSBen Hutchings efx_tx_maybe_stop_queue(tx_queue); 44214bf718fSBen Hutchings 443874aeea5SJeff Kirsher return NETDEV_TX_OK; 444874aeea5SJeff Kirsher 4450e33d870SBen Hutchings dma_err: 446874aeea5SJeff Kirsher netif_err(efx, tx_err, efx->net_dev, 447874aeea5SJeff Kirsher " TX queue %d could not map skb with %d bytes %d " 448874aeea5SJeff Kirsher "fragments for DMA\n", tx_queue->queue, skb->len, 449874aeea5SJeff Kirsher skb_shinfo(skb)->nr_frags + 1); 450874aeea5SJeff Kirsher 451874aeea5SJeff Kirsher /* Mark the packet as transmitted, and free the SKB ourselves */ 452874aeea5SJeff Kirsher dev_kfree_skb_any(skb); 453874aeea5SJeff Kirsher 454874aeea5SJeff Kirsher /* Work backwards until we hit the original insert pointer value */ 455874aeea5SJeff Kirsher while (tx_queue->insert_count != tx_queue->write_count) { 456c3940999STom Herbert unsigned int pkts_compl = 0, bytes_compl = 0; 457874aeea5SJeff Kirsher --tx_queue->insert_count; 4580fe5565bSBen Hutchings buffer = __efx_tx_queue_get_insert_buffer(tx_queue); 459c3940999STom Herbert efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl); 460874aeea5SJeff Kirsher } 461874aeea5SJeff Kirsher 462874aeea5SJeff Kirsher /* Free the fragment we were mid-way through pushing */ 463874aeea5SJeff Kirsher if (unmap_len) { 4647668ff9cSBen Hutchings if (dma_flags & EFX_TX_BUF_MAP_SINGLE) 4650e33d870SBen Hutchings dma_unmap_single(dma_dev, unmap_addr, unmap_len, 4660e33d870SBen Hutchings DMA_TO_DEVICE); 467874aeea5SJeff Kirsher else 4680e33d870SBen Hutchings dma_unmap_page(dma_dev, unmap_addr, unmap_len, 4690e33d870SBen Hutchings DMA_TO_DEVICE); 470874aeea5SJeff Kirsher } 471874aeea5SJeff Kirsher 47214bf718fSBen Hutchings return NETDEV_TX_OK; 473874aeea5SJeff Kirsher } 474874aeea5SJeff Kirsher 475874aeea5SJeff Kirsher /* Remove packets from the TX queue 476874aeea5SJeff Kirsher * 477874aeea5SJeff Kirsher * This removes packets from the TX queue, up to and including the 478874aeea5SJeff Kirsher * specified index. 479874aeea5SJeff Kirsher */ 480874aeea5SJeff Kirsher static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue, 481c3940999STom Herbert unsigned int index, 482c3940999STom Herbert unsigned int *pkts_compl, 483c3940999STom Herbert unsigned int *bytes_compl) 484874aeea5SJeff Kirsher { 485874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 486874aeea5SJeff Kirsher unsigned int stop_index, read_ptr; 487874aeea5SJeff Kirsher 488874aeea5SJeff Kirsher stop_index = (index + 1) & tx_queue->ptr_mask; 489874aeea5SJeff Kirsher read_ptr = tx_queue->read_count & tx_queue->ptr_mask; 490874aeea5SJeff Kirsher 491874aeea5SJeff Kirsher while (read_ptr != stop_index) { 492874aeea5SJeff Kirsher struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr]; 493ba8977bdSBen Hutchings 494ba8977bdSBen Hutchings if (!(buffer->flags & EFX_TX_BUF_OPTION) && 495ba8977bdSBen Hutchings unlikely(buffer->len == 0)) { 496874aeea5SJeff Kirsher netif_err(efx, tx_err, efx->net_dev, 497874aeea5SJeff Kirsher "TX queue %d spurious TX completion id %x\n", 498874aeea5SJeff Kirsher tx_queue->queue, read_ptr); 499874aeea5SJeff Kirsher efx_schedule_reset(efx, RESET_TYPE_TX_SKIP); 500874aeea5SJeff Kirsher return; 501874aeea5SJeff Kirsher } 502874aeea5SJeff Kirsher 503c3940999STom Herbert efx_dequeue_buffer(tx_queue, buffer, pkts_compl, bytes_compl); 504874aeea5SJeff Kirsher 505874aeea5SJeff Kirsher ++tx_queue->read_count; 506874aeea5SJeff Kirsher read_ptr = tx_queue->read_count & tx_queue->ptr_mask; 507874aeea5SJeff Kirsher } 508874aeea5SJeff Kirsher } 509874aeea5SJeff Kirsher 510874aeea5SJeff Kirsher /* Initiate a packet transmission. We use one channel per CPU 511874aeea5SJeff Kirsher * (sharing when we have more CPUs than channels). On Falcon, the TX 512874aeea5SJeff Kirsher * completion events will be directed back to the CPU that transmitted 513874aeea5SJeff Kirsher * the packet, which should be cache-efficient. 514874aeea5SJeff Kirsher * 515874aeea5SJeff Kirsher * Context: non-blocking. 516874aeea5SJeff Kirsher * Note that returning anything other than NETDEV_TX_OK will cause the 517874aeea5SJeff Kirsher * OS to free the skb. 518874aeea5SJeff Kirsher */ 519874aeea5SJeff Kirsher netdev_tx_t efx_hard_start_xmit(struct sk_buff *skb, 520874aeea5SJeff Kirsher struct net_device *net_dev) 521874aeea5SJeff Kirsher { 522874aeea5SJeff Kirsher struct efx_nic *efx = netdev_priv(net_dev); 523874aeea5SJeff Kirsher struct efx_tx_queue *tx_queue; 524874aeea5SJeff Kirsher unsigned index, type; 525874aeea5SJeff Kirsher 526874aeea5SJeff Kirsher EFX_WARN_ON_PARANOID(!netif_device_present(net_dev)); 527874aeea5SJeff Kirsher 5287c236c43SStuart Hodgson /* PTP "event" packet */ 5297c236c43SStuart Hodgson if (unlikely(efx_xmit_with_hwtstamp(skb)) && 5307c236c43SStuart Hodgson unlikely(efx_ptp_is_ptp_tx(efx, skb))) { 5317c236c43SStuart Hodgson return efx_ptp_tx(efx, skb); 5327c236c43SStuart Hodgson } 5337c236c43SStuart Hodgson 534874aeea5SJeff Kirsher index = skb_get_queue_mapping(skb); 535874aeea5SJeff Kirsher type = skb->ip_summed == CHECKSUM_PARTIAL ? EFX_TXQ_TYPE_OFFLOAD : 0; 536874aeea5SJeff Kirsher if (index >= efx->n_tx_channels) { 537874aeea5SJeff Kirsher index -= efx->n_tx_channels; 538874aeea5SJeff Kirsher type |= EFX_TXQ_TYPE_HIGHPRI; 539874aeea5SJeff Kirsher } 540874aeea5SJeff Kirsher tx_queue = efx_get_tx_queue(efx, index, type); 541874aeea5SJeff Kirsher 542874aeea5SJeff Kirsher return efx_enqueue_skb(tx_queue, skb); 543874aeea5SJeff Kirsher } 544874aeea5SJeff Kirsher 545874aeea5SJeff Kirsher void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue) 546874aeea5SJeff Kirsher { 547874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 548874aeea5SJeff Kirsher 549874aeea5SJeff Kirsher /* Must be inverse of queue lookup in efx_hard_start_xmit() */ 550874aeea5SJeff Kirsher tx_queue->core_txq = 551874aeea5SJeff Kirsher netdev_get_tx_queue(efx->net_dev, 552874aeea5SJeff Kirsher tx_queue->queue / EFX_TXQ_TYPES + 553874aeea5SJeff Kirsher ((tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI) ? 554874aeea5SJeff Kirsher efx->n_tx_channels : 0)); 555874aeea5SJeff Kirsher } 556874aeea5SJeff Kirsher 557874aeea5SJeff Kirsher int efx_setup_tc(struct net_device *net_dev, u8 num_tc) 558874aeea5SJeff Kirsher { 559874aeea5SJeff Kirsher struct efx_nic *efx = netdev_priv(net_dev); 560874aeea5SJeff Kirsher struct efx_channel *channel; 561874aeea5SJeff Kirsher struct efx_tx_queue *tx_queue; 562874aeea5SJeff Kirsher unsigned tc; 563874aeea5SJeff Kirsher int rc; 564874aeea5SJeff Kirsher 565874aeea5SJeff Kirsher if (efx_nic_rev(efx) < EFX_REV_FALCON_B0 || num_tc > EFX_MAX_TX_TC) 566874aeea5SJeff Kirsher return -EINVAL; 567874aeea5SJeff Kirsher 568874aeea5SJeff Kirsher if (num_tc == net_dev->num_tc) 569874aeea5SJeff Kirsher return 0; 570874aeea5SJeff Kirsher 571874aeea5SJeff Kirsher for (tc = 0; tc < num_tc; tc++) { 572874aeea5SJeff Kirsher net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels; 573874aeea5SJeff Kirsher net_dev->tc_to_txq[tc].count = efx->n_tx_channels; 574874aeea5SJeff Kirsher } 575874aeea5SJeff Kirsher 576874aeea5SJeff Kirsher if (num_tc > net_dev->num_tc) { 577874aeea5SJeff Kirsher /* Initialise high-priority queues as necessary */ 578874aeea5SJeff Kirsher efx_for_each_channel(channel, efx) { 579874aeea5SJeff Kirsher efx_for_each_possible_channel_tx_queue(tx_queue, 580874aeea5SJeff Kirsher channel) { 581874aeea5SJeff Kirsher if (!(tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI)) 582874aeea5SJeff Kirsher continue; 583874aeea5SJeff Kirsher if (!tx_queue->buffer) { 584874aeea5SJeff Kirsher rc = efx_probe_tx_queue(tx_queue); 585874aeea5SJeff Kirsher if (rc) 586874aeea5SJeff Kirsher return rc; 587874aeea5SJeff Kirsher } 588874aeea5SJeff Kirsher if (!tx_queue->initialised) 589874aeea5SJeff Kirsher efx_init_tx_queue(tx_queue); 590874aeea5SJeff Kirsher efx_init_tx_queue_core_txq(tx_queue); 591874aeea5SJeff Kirsher } 592874aeea5SJeff Kirsher } 593874aeea5SJeff Kirsher } else { 594874aeea5SJeff Kirsher /* Reduce number of classes before number of queues */ 595874aeea5SJeff Kirsher net_dev->num_tc = num_tc; 596874aeea5SJeff Kirsher } 597874aeea5SJeff Kirsher 598874aeea5SJeff Kirsher rc = netif_set_real_num_tx_queues(net_dev, 599874aeea5SJeff Kirsher max_t(int, num_tc, 1) * 600874aeea5SJeff Kirsher efx->n_tx_channels); 601874aeea5SJeff Kirsher if (rc) 602874aeea5SJeff Kirsher return rc; 603874aeea5SJeff Kirsher 604874aeea5SJeff Kirsher /* Do not destroy high-priority queues when they become 605874aeea5SJeff Kirsher * unused. We would have to flush them first, and it is 606874aeea5SJeff Kirsher * fairly difficult to flush a subset of TX queues. Leave 607874aeea5SJeff Kirsher * it to efx_fini_channels(). 608874aeea5SJeff Kirsher */ 609874aeea5SJeff Kirsher 610874aeea5SJeff Kirsher net_dev->num_tc = num_tc; 611874aeea5SJeff Kirsher return 0; 612874aeea5SJeff Kirsher } 613874aeea5SJeff Kirsher 614874aeea5SJeff Kirsher void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index) 615874aeea5SJeff Kirsher { 616874aeea5SJeff Kirsher unsigned fill_level; 617874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 61814bf718fSBen Hutchings struct efx_tx_queue *txq2; 619c3940999STom Herbert unsigned int pkts_compl = 0, bytes_compl = 0; 620874aeea5SJeff Kirsher 621874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(index > tx_queue->ptr_mask); 622874aeea5SJeff Kirsher 623c3940999STom Herbert efx_dequeue_buffers(tx_queue, index, &pkts_compl, &bytes_compl); 624c3940999STom Herbert netdev_tx_completed_queue(tx_queue->core_txq, pkts_compl, bytes_compl); 625874aeea5SJeff Kirsher 62602e12165SBen Hutchings if (pkts_compl > 1) 62702e12165SBen Hutchings ++tx_queue->merge_events; 62802e12165SBen Hutchings 62914bf718fSBen Hutchings /* See if we need to restart the netif queue. This memory 63014bf718fSBen Hutchings * barrier ensures that we write read_count (inside 63114bf718fSBen Hutchings * efx_dequeue_buffers()) before reading the queue status. 63214bf718fSBen Hutchings */ 633874aeea5SJeff Kirsher smp_mb(); 634874aeea5SJeff Kirsher if (unlikely(netif_tx_queue_stopped(tx_queue->core_txq)) && 635874aeea5SJeff Kirsher likely(efx->port_enabled) && 636874aeea5SJeff Kirsher likely(netif_device_present(efx->net_dev))) { 63714bf718fSBen Hutchings txq2 = efx_tx_queue_partner(tx_queue); 63814bf718fSBen Hutchings fill_level = max(tx_queue->insert_count - tx_queue->read_count, 63914bf718fSBen Hutchings txq2->insert_count - txq2->read_count); 64014bf718fSBen Hutchings if (fill_level <= efx->txq_wake_thresh) 641874aeea5SJeff Kirsher netif_tx_wake_queue(tx_queue->core_txq); 642874aeea5SJeff Kirsher } 643874aeea5SJeff Kirsher 644874aeea5SJeff Kirsher /* Check whether the hardware queue is now empty */ 645874aeea5SJeff Kirsher if ((int)(tx_queue->read_count - tx_queue->old_write_count) >= 0) { 646874aeea5SJeff Kirsher tx_queue->old_write_count = ACCESS_ONCE(tx_queue->write_count); 647874aeea5SJeff Kirsher if (tx_queue->read_count == tx_queue->old_write_count) { 648874aeea5SJeff Kirsher smp_mb(); 649874aeea5SJeff Kirsher tx_queue->empty_read_count = 650874aeea5SJeff Kirsher tx_queue->read_count | EFX_EMPTY_COUNT_VALID; 651874aeea5SJeff Kirsher } 652874aeea5SJeff Kirsher } 653874aeea5SJeff Kirsher } 654874aeea5SJeff Kirsher 655f7251a9cSBen Hutchings /* Size of page-based TSO header buffers. Larger blocks must be 656f7251a9cSBen Hutchings * allocated from the heap. 657f7251a9cSBen Hutchings */ 658f7251a9cSBen Hutchings #define TSOH_STD_SIZE 128 659f7251a9cSBen Hutchings #define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE) 660f7251a9cSBen Hutchings 661f7251a9cSBen Hutchings /* At most half the descriptors in the queue at any time will refer to 662f7251a9cSBen Hutchings * a TSO header buffer, since they must always be followed by a 663f7251a9cSBen Hutchings * payload descriptor referring to an skb. 664f7251a9cSBen Hutchings */ 665f7251a9cSBen Hutchings static unsigned int efx_tsoh_page_count(struct efx_tx_queue *tx_queue) 666f7251a9cSBen Hutchings { 667f7251a9cSBen Hutchings return DIV_ROUND_UP(tx_queue->ptr_mask + 1, 2 * TSOH_PER_PAGE); 668f7251a9cSBen Hutchings } 669f7251a9cSBen Hutchings 670874aeea5SJeff Kirsher int efx_probe_tx_queue(struct efx_tx_queue *tx_queue) 671874aeea5SJeff Kirsher { 672874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 673874aeea5SJeff Kirsher unsigned int entries; 6747668ff9cSBen Hutchings int rc; 675874aeea5SJeff Kirsher 676874aeea5SJeff Kirsher /* Create the smallest power-of-two aligned ring */ 677874aeea5SJeff Kirsher entries = max(roundup_pow_of_two(efx->txq_entries), EFX_MIN_DMAQ_SIZE); 678874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE); 679874aeea5SJeff Kirsher tx_queue->ptr_mask = entries - 1; 680874aeea5SJeff Kirsher 681874aeea5SJeff Kirsher netif_dbg(efx, probe, efx->net_dev, 682874aeea5SJeff Kirsher "creating TX queue %d size %#x mask %#x\n", 683874aeea5SJeff Kirsher tx_queue->queue, efx->txq_entries, tx_queue->ptr_mask); 684874aeea5SJeff Kirsher 685874aeea5SJeff Kirsher /* Allocate software ring */ 686c2e4e25aSThomas Meyer tx_queue->buffer = kcalloc(entries, sizeof(*tx_queue->buffer), 687874aeea5SJeff Kirsher GFP_KERNEL); 688874aeea5SJeff Kirsher if (!tx_queue->buffer) 689874aeea5SJeff Kirsher return -ENOMEM; 690874aeea5SJeff Kirsher 691f7251a9cSBen Hutchings if (tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD) { 692f7251a9cSBen Hutchings tx_queue->tsoh_page = 693f7251a9cSBen Hutchings kcalloc(efx_tsoh_page_count(tx_queue), 694f7251a9cSBen Hutchings sizeof(tx_queue->tsoh_page[0]), GFP_KERNEL); 695f7251a9cSBen Hutchings if (!tx_queue->tsoh_page) { 696f7251a9cSBen Hutchings rc = -ENOMEM; 697f7251a9cSBen Hutchings goto fail1; 698f7251a9cSBen Hutchings } 699f7251a9cSBen Hutchings } 700f7251a9cSBen Hutchings 701874aeea5SJeff Kirsher /* Allocate hardware ring */ 702874aeea5SJeff Kirsher rc = efx_nic_probe_tx(tx_queue); 703874aeea5SJeff Kirsher if (rc) 704f7251a9cSBen Hutchings goto fail2; 705874aeea5SJeff Kirsher 706874aeea5SJeff Kirsher return 0; 707874aeea5SJeff Kirsher 708f7251a9cSBen Hutchings fail2: 709f7251a9cSBen Hutchings kfree(tx_queue->tsoh_page); 710f7251a9cSBen Hutchings tx_queue->tsoh_page = NULL; 711f7251a9cSBen Hutchings fail1: 712874aeea5SJeff Kirsher kfree(tx_queue->buffer); 713874aeea5SJeff Kirsher tx_queue->buffer = NULL; 714874aeea5SJeff Kirsher return rc; 715874aeea5SJeff Kirsher } 716874aeea5SJeff Kirsher 717874aeea5SJeff Kirsher void efx_init_tx_queue(struct efx_tx_queue *tx_queue) 718874aeea5SJeff Kirsher { 719874aeea5SJeff Kirsher netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 720874aeea5SJeff Kirsher "initialising TX queue %d\n", tx_queue->queue); 721874aeea5SJeff Kirsher 722874aeea5SJeff Kirsher tx_queue->insert_count = 0; 723874aeea5SJeff Kirsher tx_queue->write_count = 0; 724874aeea5SJeff Kirsher tx_queue->old_write_count = 0; 725874aeea5SJeff Kirsher tx_queue->read_count = 0; 726874aeea5SJeff Kirsher tx_queue->old_read_count = 0; 727874aeea5SJeff Kirsher tx_queue->empty_read_count = 0 | EFX_EMPTY_COUNT_VALID; 728874aeea5SJeff Kirsher 729874aeea5SJeff Kirsher /* Set up TX descriptor ring */ 730874aeea5SJeff Kirsher efx_nic_init_tx(tx_queue); 731874aeea5SJeff Kirsher 732874aeea5SJeff Kirsher tx_queue->initialised = true; 733874aeea5SJeff Kirsher } 734874aeea5SJeff Kirsher 735e42c3d85SBen Hutchings void efx_fini_tx_queue(struct efx_tx_queue *tx_queue) 736874aeea5SJeff Kirsher { 737874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 738874aeea5SJeff Kirsher 739e42c3d85SBen Hutchings netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 740e42c3d85SBen Hutchings "shutting down TX queue %d\n", tx_queue->queue); 741e42c3d85SBen Hutchings 742874aeea5SJeff Kirsher if (!tx_queue->buffer) 743874aeea5SJeff Kirsher return; 744874aeea5SJeff Kirsher 745874aeea5SJeff Kirsher /* Free any buffers left in the ring */ 746874aeea5SJeff Kirsher while (tx_queue->read_count != tx_queue->write_count) { 747c3940999STom Herbert unsigned int pkts_compl = 0, bytes_compl = 0; 748874aeea5SJeff Kirsher buffer = &tx_queue->buffer[tx_queue->read_count & tx_queue->ptr_mask]; 749c3940999STom Herbert efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl); 750874aeea5SJeff Kirsher 751874aeea5SJeff Kirsher ++tx_queue->read_count; 752874aeea5SJeff Kirsher } 753c3940999STom Herbert netdev_tx_reset_queue(tx_queue->core_txq); 754874aeea5SJeff Kirsher } 755874aeea5SJeff Kirsher 756874aeea5SJeff Kirsher void efx_remove_tx_queue(struct efx_tx_queue *tx_queue) 757874aeea5SJeff Kirsher { 758f7251a9cSBen Hutchings int i; 759f7251a9cSBen Hutchings 760874aeea5SJeff Kirsher if (!tx_queue->buffer) 761874aeea5SJeff Kirsher return; 762874aeea5SJeff Kirsher 763874aeea5SJeff Kirsher netif_dbg(tx_queue->efx, drv, tx_queue->efx->net_dev, 764874aeea5SJeff Kirsher "destroying TX queue %d\n", tx_queue->queue); 765874aeea5SJeff Kirsher efx_nic_remove_tx(tx_queue); 766874aeea5SJeff Kirsher 767f7251a9cSBen Hutchings if (tx_queue->tsoh_page) { 768f7251a9cSBen Hutchings for (i = 0; i < efx_tsoh_page_count(tx_queue); i++) 769f7251a9cSBen Hutchings efx_nic_free_buffer(tx_queue->efx, 770f7251a9cSBen Hutchings &tx_queue->tsoh_page[i]); 771f7251a9cSBen Hutchings kfree(tx_queue->tsoh_page); 772f7251a9cSBen Hutchings tx_queue->tsoh_page = NULL; 773f7251a9cSBen Hutchings } 774f7251a9cSBen Hutchings 775874aeea5SJeff Kirsher kfree(tx_queue->buffer); 776874aeea5SJeff Kirsher tx_queue->buffer = NULL; 777874aeea5SJeff Kirsher } 778874aeea5SJeff Kirsher 779874aeea5SJeff Kirsher 780874aeea5SJeff Kirsher /* Efx TCP segmentation acceleration. 781874aeea5SJeff Kirsher * 782874aeea5SJeff Kirsher * Why? Because by doing it here in the driver we can go significantly 783874aeea5SJeff Kirsher * faster than the GSO. 784874aeea5SJeff Kirsher * 785874aeea5SJeff Kirsher * Requires TX checksum offload support. 786874aeea5SJeff Kirsher */ 787874aeea5SJeff Kirsher 788874aeea5SJeff Kirsher /* Number of bytes inserted at the start of a TSO header buffer, 789874aeea5SJeff Kirsher * similar to NET_IP_ALIGN. 790874aeea5SJeff Kirsher */ 791874aeea5SJeff Kirsher #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 792874aeea5SJeff Kirsher #define TSOH_OFFSET 0 793874aeea5SJeff Kirsher #else 794874aeea5SJeff Kirsher #define TSOH_OFFSET NET_IP_ALIGN 795874aeea5SJeff Kirsher #endif 796874aeea5SJeff Kirsher 797874aeea5SJeff Kirsher #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2)) 798874aeea5SJeff Kirsher 799874aeea5SJeff Kirsher /** 800874aeea5SJeff Kirsher * struct tso_state - TSO state for an SKB 801874aeea5SJeff Kirsher * @out_len: Remaining length in current segment 802874aeea5SJeff Kirsher * @seqnum: Current sequence number 803874aeea5SJeff Kirsher * @ipv4_id: Current IPv4 ID, host endian 804874aeea5SJeff Kirsher * @packet_space: Remaining space in current packet 805874aeea5SJeff Kirsher * @dma_addr: DMA address of current position 806874aeea5SJeff Kirsher * @in_len: Remaining length in current SKB fragment 807874aeea5SJeff Kirsher * @unmap_len: Length of SKB fragment 808874aeea5SJeff Kirsher * @unmap_addr: DMA address of SKB fragment 8097668ff9cSBen Hutchings * @dma_flags: TX buffer flags for DMA mapping - %EFX_TX_BUF_MAP_SINGLE or 0 810874aeea5SJeff Kirsher * @protocol: Network protocol (after any VLAN header) 8119714284fSBen Hutchings * @ip_off: Offset of IP header 8129714284fSBen Hutchings * @tcp_off: Offset of TCP header 813874aeea5SJeff Kirsher * @header_len: Number of bytes of header 81453cb13c6SBen Hutchings * @ip_base_len: IPv4 tot_len or IPv6 payload_len, before TCP payload 815dfa50be9SBen Hutchings * @header_dma_addr: Header DMA address, when using option descriptors 816dfa50be9SBen Hutchings * @header_unmap_len: Header DMA mapped length, or 0 if not using option 817dfa50be9SBen Hutchings * descriptors 818874aeea5SJeff Kirsher * 819874aeea5SJeff Kirsher * The state used during segmentation. It is put into this data structure 820874aeea5SJeff Kirsher * just to make it easy to pass into inline functions. 821874aeea5SJeff Kirsher */ 822874aeea5SJeff Kirsher struct tso_state { 823874aeea5SJeff Kirsher /* Output position */ 824874aeea5SJeff Kirsher unsigned out_len; 825874aeea5SJeff Kirsher unsigned seqnum; 826dfa50be9SBen Hutchings u16 ipv4_id; 827874aeea5SJeff Kirsher unsigned packet_space; 828874aeea5SJeff Kirsher 829874aeea5SJeff Kirsher /* Input position */ 830874aeea5SJeff Kirsher dma_addr_t dma_addr; 831874aeea5SJeff Kirsher unsigned in_len; 832874aeea5SJeff Kirsher unsigned unmap_len; 833874aeea5SJeff Kirsher dma_addr_t unmap_addr; 8347668ff9cSBen Hutchings unsigned short dma_flags; 835874aeea5SJeff Kirsher 836874aeea5SJeff Kirsher __be16 protocol; 8379714284fSBen Hutchings unsigned int ip_off; 8389714284fSBen Hutchings unsigned int tcp_off; 839874aeea5SJeff Kirsher unsigned header_len; 84053cb13c6SBen Hutchings unsigned int ip_base_len; 841dfa50be9SBen Hutchings dma_addr_t header_dma_addr; 842dfa50be9SBen Hutchings unsigned int header_unmap_len; 843874aeea5SJeff Kirsher }; 844874aeea5SJeff Kirsher 845874aeea5SJeff Kirsher 846874aeea5SJeff Kirsher /* 847874aeea5SJeff Kirsher * Verify that our various assumptions about sk_buffs and the conditions 848874aeea5SJeff Kirsher * under which TSO will be attempted hold true. Return the protocol number. 849874aeea5SJeff Kirsher */ 850874aeea5SJeff Kirsher static __be16 efx_tso_check_protocol(struct sk_buff *skb) 851874aeea5SJeff Kirsher { 852874aeea5SJeff Kirsher __be16 protocol = skb->protocol; 853874aeea5SJeff Kirsher 854874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(((struct ethhdr *)skb->data)->h_proto != 855874aeea5SJeff Kirsher protocol); 856874aeea5SJeff Kirsher if (protocol == htons(ETH_P_8021Q)) { 857874aeea5SJeff Kirsher struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data; 858874aeea5SJeff Kirsher protocol = veh->h_vlan_encapsulated_proto; 859874aeea5SJeff Kirsher } 860874aeea5SJeff Kirsher 861874aeea5SJeff Kirsher if (protocol == htons(ETH_P_IP)) { 862874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP); 863874aeea5SJeff Kirsher } else { 864874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IPV6)); 865874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(ipv6_hdr(skb)->nexthdr != NEXTHDR_TCP); 866874aeea5SJeff Kirsher } 867874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data) 868874aeea5SJeff Kirsher + (tcp_hdr(skb)->doff << 2u)) > 869874aeea5SJeff Kirsher skb_headlen(skb)); 870874aeea5SJeff Kirsher 871874aeea5SJeff Kirsher return protocol; 872874aeea5SJeff Kirsher } 873874aeea5SJeff Kirsher 874f7251a9cSBen Hutchings static u8 *efx_tsoh_get_buffer(struct efx_tx_queue *tx_queue, 875f7251a9cSBen Hutchings struct efx_tx_buffer *buffer, unsigned int len) 876874aeea5SJeff Kirsher { 877f7251a9cSBen Hutchings u8 *result; 878874aeea5SJeff Kirsher 879f7251a9cSBen Hutchings EFX_BUG_ON_PARANOID(buffer->len); 880f7251a9cSBen Hutchings EFX_BUG_ON_PARANOID(buffer->flags); 881f7251a9cSBen Hutchings EFX_BUG_ON_PARANOID(buffer->unmap_len); 882874aeea5SJeff Kirsher 883f7251a9cSBen Hutchings if (likely(len <= TSOH_STD_SIZE - TSOH_OFFSET)) { 884f7251a9cSBen Hutchings unsigned index = 885f7251a9cSBen Hutchings (tx_queue->insert_count & tx_queue->ptr_mask) / 2; 886f7251a9cSBen Hutchings struct efx_buffer *page_buf = 887f7251a9cSBen Hutchings &tx_queue->tsoh_page[index / TSOH_PER_PAGE]; 888f7251a9cSBen Hutchings unsigned offset = 889f7251a9cSBen Hutchings TSOH_STD_SIZE * (index % TSOH_PER_PAGE) + TSOH_OFFSET; 890874aeea5SJeff Kirsher 891f7251a9cSBen Hutchings if (unlikely(!page_buf->addr) && 8920d19a540SBen Hutchings efx_nic_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE, 8930d19a540SBen Hutchings GFP_ATOMIC)) 894874aeea5SJeff Kirsher return NULL; 895874aeea5SJeff Kirsher 896f7251a9cSBen Hutchings result = (u8 *)page_buf->addr + offset; 897f7251a9cSBen Hutchings buffer->dma_addr = page_buf->dma_addr + offset; 898f7251a9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 899f7251a9cSBen Hutchings } else { 900f7251a9cSBen Hutchings tx_queue->tso_long_headers++; 901f7251a9cSBen Hutchings 902f7251a9cSBen Hutchings buffer->heap_buf = kmalloc(TSOH_OFFSET + len, GFP_ATOMIC); 903f7251a9cSBen Hutchings if (unlikely(!buffer->heap_buf)) 904874aeea5SJeff Kirsher return NULL; 905f7251a9cSBen Hutchings result = (u8 *)buffer->heap_buf + TSOH_OFFSET; 906f7251a9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT | EFX_TX_BUF_HEAP; 907874aeea5SJeff Kirsher } 908874aeea5SJeff Kirsher 909f7251a9cSBen Hutchings buffer->len = len; 910874aeea5SJeff Kirsher 911f7251a9cSBen Hutchings return result; 912874aeea5SJeff Kirsher } 913874aeea5SJeff Kirsher 914874aeea5SJeff Kirsher /** 915874aeea5SJeff Kirsher * efx_tx_queue_insert - push descriptors onto the TX queue 916874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 917874aeea5SJeff Kirsher * @dma_addr: DMA address of fragment 918874aeea5SJeff Kirsher * @len: Length of fragment 919874aeea5SJeff Kirsher * @final_buffer: The final buffer inserted into the queue 920874aeea5SJeff Kirsher * 92114bf718fSBen Hutchings * Push descriptors onto the TX queue. 922874aeea5SJeff Kirsher */ 92314bf718fSBen Hutchings static void efx_tx_queue_insert(struct efx_tx_queue *tx_queue, 924874aeea5SJeff Kirsher dma_addr_t dma_addr, unsigned len, 925874aeea5SJeff Kirsher struct efx_tx_buffer **final_buffer) 926874aeea5SJeff Kirsher { 927874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 928874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 9290fe5565bSBen Hutchings unsigned dma_len; 930874aeea5SJeff Kirsher 931874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(len <= 0); 932874aeea5SJeff Kirsher 933874aeea5SJeff Kirsher while (1) { 9340fe5565bSBen Hutchings buffer = efx_tx_queue_get_insert_buffer(tx_queue); 935874aeea5SJeff Kirsher ++tx_queue->insert_count; 936874aeea5SJeff Kirsher 937874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tx_queue->insert_count - 938874aeea5SJeff Kirsher tx_queue->read_count >= 939874aeea5SJeff Kirsher efx->txq_entries); 940874aeea5SJeff Kirsher 941874aeea5SJeff Kirsher buffer->dma_addr = dma_addr; 942874aeea5SJeff Kirsher 943874aeea5SJeff Kirsher dma_len = efx_max_tx_len(efx, dma_addr); 944874aeea5SJeff Kirsher 945874aeea5SJeff Kirsher /* If there is enough space to send then do so */ 946874aeea5SJeff Kirsher if (dma_len >= len) 947874aeea5SJeff Kirsher break; 948874aeea5SJeff Kirsher 9497668ff9cSBen Hutchings buffer->len = dma_len; 9507668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 951874aeea5SJeff Kirsher dma_addr += dma_len; 952874aeea5SJeff Kirsher len -= dma_len; 953874aeea5SJeff Kirsher } 954874aeea5SJeff Kirsher 955874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(!len); 956874aeea5SJeff Kirsher buffer->len = len; 957874aeea5SJeff Kirsher *final_buffer = buffer; 958874aeea5SJeff Kirsher } 959874aeea5SJeff Kirsher 960874aeea5SJeff Kirsher 961874aeea5SJeff Kirsher /* 962874aeea5SJeff Kirsher * Put a TSO header into the TX queue. 963874aeea5SJeff Kirsher * 964874aeea5SJeff Kirsher * This is special-cased because we know that it is small enough to fit in 965874aeea5SJeff Kirsher * a single fragment, and we know it doesn't cross a page boundary. It 966874aeea5SJeff Kirsher * also allows us to not worry about end-of-packet etc. 967874aeea5SJeff Kirsher */ 968f7251a9cSBen Hutchings static int efx_tso_put_header(struct efx_tx_queue *tx_queue, 969f7251a9cSBen Hutchings struct efx_tx_buffer *buffer, u8 *header) 970874aeea5SJeff Kirsher { 971f7251a9cSBen Hutchings if (unlikely(buffer->flags & EFX_TX_BUF_HEAP)) { 972f7251a9cSBen Hutchings buffer->dma_addr = dma_map_single(&tx_queue->efx->pci_dev->dev, 973f7251a9cSBen Hutchings header, buffer->len, 974f7251a9cSBen Hutchings DMA_TO_DEVICE); 975f7251a9cSBen Hutchings if (unlikely(dma_mapping_error(&tx_queue->efx->pci_dev->dev, 976f7251a9cSBen Hutchings buffer->dma_addr))) { 977f7251a9cSBen Hutchings kfree(buffer->heap_buf); 978f7251a9cSBen Hutchings buffer->len = 0; 979f7251a9cSBen Hutchings buffer->flags = 0; 980f7251a9cSBen Hutchings return -ENOMEM; 981f7251a9cSBen Hutchings } 982f7251a9cSBen Hutchings buffer->unmap_len = buffer->len; 9832acdb92eSAlexandre Rames buffer->dma_offset = 0; 984f7251a9cSBen Hutchings buffer->flags |= EFX_TX_BUF_MAP_SINGLE; 985f7251a9cSBen Hutchings } 986874aeea5SJeff Kirsher 987874aeea5SJeff Kirsher ++tx_queue->insert_count; 988f7251a9cSBen Hutchings return 0; 989874aeea5SJeff Kirsher } 990874aeea5SJeff Kirsher 991874aeea5SJeff Kirsher 992f7251a9cSBen Hutchings /* Remove buffers put into a tx_queue. None of the buffers must have 993f7251a9cSBen Hutchings * an skb attached. 994f7251a9cSBen Hutchings */ 995874aeea5SJeff Kirsher static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue) 996874aeea5SJeff Kirsher { 997874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 998874aeea5SJeff Kirsher 999874aeea5SJeff Kirsher /* Work backwards until we hit the original insert pointer value */ 1000874aeea5SJeff Kirsher while (tx_queue->insert_count != tx_queue->write_count) { 1001874aeea5SJeff Kirsher --tx_queue->insert_count; 10020fe5565bSBen Hutchings buffer = __efx_tx_queue_get_insert_buffer(tx_queue); 1003f7251a9cSBen Hutchings efx_dequeue_buffer(tx_queue, buffer, NULL, NULL); 1004874aeea5SJeff Kirsher } 1005874aeea5SJeff Kirsher } 1006874aeea5SJeff Kirsher 1007874aeea5SJeff Kirsher 1008874aeea5SJeff Kirsher /* Parse the SKB header and initialise state. */ 1009c78c39e6SBen Hutchings static int tso_start(struct tso_state *st, struct efx_nic *efx, 1010c78c39e6SBen Hutchings const struct sk_buff *skb) 1011874aeea5SJeff Kirsher { 1012dfa50be9SBen Hutchings bool use_options = efx_nic_rev(efx) >= EFX_REV_HUNT_A0; 1013dfa50be9SBen Hutchings struct device *dma_dev = &efx->pci_dev->dev; 1014c78c39e6SBen Hutchings unsigned int header_len, in_len; 1015dfa50be9SBen Hutchings dma_addr_t dma_addr; 1016c78c39e6SBen Hutchings 10179714284fSBen Hutchings st->ip_off = skb_network_header(skb) - skb->data; 10189714284fSBen Hutchings st->tcp_off = skb_transport_header(skb) - skb->data; 1019c78c39e6SBen Hutchings header_len = st->tcp_off + (tcp_hdr(skb)->doff << 2u); 1020c78c39e6SBen Hutchings in_len = skb_headlen(skb) - header_len; 1021c78c39e6SBen Hutchings st->header_len = header_len; 1022c78c39e6SBen Hutchings st->in_len = in_len; 102353cb13c6SBen Hutchings if (st->protocol == htons(ETH_P_IP)) { 10249714284fSBen Hutchings st->ip_base_len = st->header_len - st->ip_off; 1025874aeea5SJeff Kirsher st->ipv4_id = ntohs(ip_hdr(skb)->id); 102653cb13c6SBen Hutchings } else { 10279714284fSBen Hutchings st->ip_base_len = st->header_len - st->tcp_off; 1028874aeea5SJeff Kirsher st->ipv4_id = 0; 102953cb13c6SBen Hutchings } 1030874aeea5SJeff Kirsher st->seqnum = ntohl(tcp_hdr(skb)->seq); 1031874aeea5SJeff Kirsher 1032874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg); 1033874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tcp_hdr(skb)->syn); 1034874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tcp_hdr(skb)->rst); 1035874aeea5SJeff Kirsher 1036c78c39e6SBen Hutchings st->out_len = skb->len - header_len; 1037c78c39e6SBen Hutchings 1038dfa50be9SBen Hutchings if (!use_options) { 1039dfa50be9SBen Hutchings st->header_unmap_len = 0; 1040dfa50be9SBen Hutchings 1041c78c39e6SBen Hutchings if (likely(in_len == 0)) { 10427668ff9cSBen Hutchings st->dma_flags = 0; 1043dfa50be9SBen Hutchings st->unmap_len = 0; 1044c78c39e6SBen Hutchings return 0; 1045c78c39e6SBen Hutchings } 1046c78c39e6SBen Hutchings 1047dfa50be9SBen Hutchings dma_addr = dma_map_single(dma_dev, skb->data + header_len, 1048dfa50be9SBen Hutchings in_len, DMA_TO_DEVICE); 1049c78c39e6SBen Hutchings st->dma_flags = EFX_TX_BUF_MAP_SINGLE; 1050dfa50be9SBen Hutchings st->dma_addr = dma_addr; 1051dfa50be9SBen Hutchings st->unmap_addr = dma_addr; 1052c78c39e6SBen Hutchings st->unmap_len = in_len; 1053dfa50be9SBen Hutchings } else { 1054dfa50be9SBen Hutchings dma_addr = dma_map_single(dma_dev, skb->data, 1055dfa50be9SBen Hutchings skb_headlen(skb), DMA_TO_DEVICE); 1056dfa50be9SBen Hutchings st->header_dma_addr = dma_addr; 1057dfa50be9SBen Hutchings st->header_unmap_len = skb_headlen(skb); 1058dfa50be9SBen Hutchings st->dma_flags = 0; 1059dfa50be9SBen Hutchings st->dma_addr = dma_addr + header_len; 1060dfa50be9SBen Hutchings st->unmap_len = 0; 1061dfa50be9SBen Hutchings } 1062dfa50be9SBen Hutchings 1063dfa50be9SBen Hutchings return unlikely(dma_mapping_error(dma_dev, dma_addr)) ? -ENOMEM : 0; 1064874aeea5SJeff Kirsher } 1065874aeea5SJeff Kirsher 1066874aeea5SJeff Kirsher static int tso_get_fragment(struct tso_state *st, struct efx_nic *efx, 1067874aeea5SJeff Kirsher skb_frag_t *frag) 1068874aeea5SJeff Kirsher { 10694a22c4c9SIan Campbell st->unmap_addr = skb_frag_dma_map(&efx->pci_dev->dev, frag, 0, 10709e903e08SEric Dumazet skb_frag_size(frag), DMA_TO_DEVICE); 10715d6bcdfeSIan Campbell if (likely(!dma_mapping_error(&efx->pci_dev->dev, st->unmap_addr))) { 10727668ff9cSBen Hutchings st->dma_flags = 0; 10739e903e08SEric Dumazet st->unmap_len = skb_frag_size(frag); 10749e903e08SEric Dumazet st->in_len = skb_frag_size(frag); 1075874aeea5SJeff Kirsher st->dma_addr = st->unmap_addr; 1076874aeea5SJeff Kirsher return 0; 1077874aeea5SJeff Kirsher } 1078874aeea5SJeff Kirsher return -ENOMEM; 1079874aeea5SJeff Kirsher } 1080874aeea5SJeff Kirsher 1081874aeea5SJeff Kirsher 1082874aeea5SJeff Kirsher /** 1083874aeea5SJeff Kirsher * tso_fill_packet_with_fragment - form descriptors for the current fragment 1084874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 1085874aeea5SJeff Kirsher * @skb: Socket buffer 1086874aeea5SJeff Kirsher * @st: TSO state 1087874aeea5SJeff Kirsher * 1088874aeea5SJeff Kirsher * Form descriptors for the current fragment, until we reach the end 108914bf718fSBen Hutchings * of fragment or end-of-packet. 1090874aeea5SJeff Kirsher */ 109114bf718fSBen Hutchings static void tso_fill_packet_with_fragment(struct efx_tx_queue *tx_queue, 1092874aeea5SJeff Kirsher const struct sk_buff *skb, 1093874aeea5SJeff Kirsher struct tso_state *st) 1094874aeea5SJeff Kirsher { 1095874aeea5SJeff Kirsher struct efx_tx_buffer *buffer; 109614bf718fSBen Hutchings int n; 1097874aeea5SJeff Kirsher 1098874aeea5SJeff Kirsher if (st->in_len == 0) 109914bf718fSBen Hutchings return; 1100874aeea5SJeff Kirsher if (st->packet_space == 0) 110114bf718fSBen Hutchings return; 1102874aeea5SJeff Kirsher 1103874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(st->in_len <= 0); 1104874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(st->packet_space <= 0); 1105874aeea5SJeff Kirsher 1106874aeea5SJeff Kirsher n = min(st->in_len, st->packet_space); 1107874aeea5SJeff Kirsher 1108874aeea5SJeff Kirsher st->packet_space -= n; 1109874aeea5SJeff Kirsher st->out_len -= n; 1110874aeea5SJeff Kirsher st->in_len -= n; 1111874aeea5SJeff Kirsher 111214bf718fSBen Hutchings efx_tx_queue_insert(tx_queue, st->dma_addr, n, &buffer); 111314bf718fSBen Hutchings 11147668ff9cSBen Hutchings if (st->out_len == 0) { 1115874aeea5SJeff Kirsher /* Transfer ownership of the skb */ 1116874aeea5SJeff Kirsher buffer->skb = skb; 11177668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_SKB; 11187668ff9cSBen Hutchings } else if (st->packet_space != 0) { 11197668ff9cSBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 11207668ff9cSBen Hutchings } 1121874aeea5SJeff Kirsher 1122874aeea5SJeff Kirsher if (st->in_len == 0) { 11230e33d870SBen Hutchings /* Transfer ownership of the DMA mapping */ 1124874aeea5SJeff Kirsher buffer->unmap_len = st->unmap_len; 11252acdb92eSAlexandre Rames buffer->dma_offset = buffer->unmap_len - buffer->len; 11267668ff9cSBen Hutchings buffer->flags |= st->dma_flags; 1127874aeea5SJeff Kirsher st->unmap_len = 0; 1128874aeea5SJeff Kirsher } 1129874aeea5SJeff Kirsher 1130874aeea5SJeff Kirsher st->dma_addr += n; 1131874aeea5SJeff Kirsher } 1132874aeea5SJeff Kirsher 1133874aeea5SJeff Kirsher 1134874aeea5SJeff Kirsher /** 1135874aeea5SJeff Kirsher * tso_start_new_packet - generate a new header and prepare for the new packet 1136874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 1137874aeea5SJeff Kirsher * @skb: Socket buffer 1138874aeea5SJeff Kirsher * @st: TSO state 1139874aeea5SJeff Kirsher * 1140874aeea5SJeff Kirsher * Generate a new header and prepare for the new packet. Return 0 on 1141f7251a9cSBen Hutchings * success, or -%ENOMEM if failed to alloc header. 1142874aeea5SJeff Kirsher */ 1143874aeea5SJeff Kirsher static int tso_start_new_packet(struct efx_tx_queue *tx_queue, 1144874aeea5SJeff Kirsher const struct sk_buff *skb, 1145874aeea5SJeff Kirsher struct tso_state *st) 1146874aeea5SJeff Kirsher { 1147f7251a9cSBen Hutchings struct efx_tx_buffer *buffer = 11480fe5565bSBen Hutchings efx_tx_queue_get_insert_buffer(tx_queue); 1149dfa50be9SBen Hutchings bool is_last = st->out_len <= skb_shinfo(skb)->gso_size; 1150dfa50be9SBen Hutchings u8 tcp_flags_clear; 1151dfa50be9SBen Hutchings 1152dfa50be9SBen Hutchings if (!is_last) { 1153dfa50be9SBen Hutchings st->packet_space = skb_shinfo(skb)->gso_size; 1154dfa50be9SBen Hutchings tcp_flags_clear = 0x09; /* mask out FIN and PSH */ 1155dfa50be9SBen Hutchings } else { 1156dfa50be9SBen Hutchings st->packet_space = st->out_len; 1157dfa50be9SBen Hutchings tcp_flags_clear = 0x00; 1158dfa50be9SBen Hutchings } 1159dfa50be9SBen Hutchings 1160dfa50be9SBen Hutchings if (!st->header_unmap_len) { 1161dfa50be9SBen Hutchings /* Allocate and insert a DMA-mapped header buffer. */ 1162874aeea5SJeff Kirsher struct tcphdr *tsoh_th; 1163874aeea5SJeff Kirsher unsigned ip_length; 1164874aeea5SJeff Kirsher u8 *header; 1165f7251a9cSBen Hutchings int rc; 1166874aeea5SJeff Kirsher 1167f7251a9cSBen Hutchings header = efx_tsoh_get_buffer(tx_queue, buffer, st->header_len); 1168f7251a9cSBen Hutchings if (!header) 1169f7251a9cSBen Hutchings return -ENOMEM; 1170874aeea5SJeff Kirsher 11719714284fSBen Hutchings tsoh_th = (struct tcphdr *)(header + st->tcp_off); 1172874aeea5SJeff Kirsher 1173874aeea5SJeff Kirsher /* Copy and update the headers. */ 1174874aeea5SJeff Kirsher memcpy(header, skb->data, st->header_len); 1175874aeea5SJeff Kirsher 1176874aeea5SJeff Kirsher tsoh_th->seq = htonl(st->seqnum); 1177dfa50be9SBen Hutchings ((u8 *)tsoh_th)[13] &= ~tcp_flags_clear; 1178dfa50be9SBen Hutchings 117953cb13c6SBen Hutchings ip_length = st->ip_base_len + st->packet_space; 1180874aeea5SJeff Kirsher 1181874aeea5SJeff Kirsher if (st->protocol == htons(ETH_P_IP)) { 1182dfa50be9SBen Hutchings struct iphdr *tsoh_iph = 1183dfa50be9SBen Hutchings (struct iphdr *)(header + st->ip_off); 1184874aeea5SJeff Kirsher 1185874aeea5SJeff Kirsher tsoh_iph->tot_len = htons(ip_length); 1186874aeea5SJeff Kirsher tsoh_iph->id = htons(st->ipv4_id); 1187874aeea5SJeff Kirsher } else { 1188874aeea5SJeff Kirsher struct ipv6hdr *tsoh_iph = 11899714284fSBen Hutchings (struct ipv6hdr *)(header + st->ip_off); 1190874aeea5SJeff Kirsher 119153cb13c6SBen Hutchings tsoh_iph->payload_len = htons(ip_length); 1192874aeea5SJeff Kirsher } 1193874aeea5SJeff Kirsher 1194f7251a9cSBen Hutchings rc = efx_tso_put_header(tx_queue, buffer, header); 1195f7251a9cSBen Hutchings if (unlikely(rc)) 1196f7251a9cSBen Hutchings return rc; 1197dfa50be9SBen Hutchings } else { 1198dfa50be9SBen Hutchings /* Send the original headers with a TSO option descriptor 1199dfa50be9SBen Hutchings * in front 1200dfa50be9SBen Hutchings */ 1201dfa50be9SBen Hutchings u8 tcp_flags = ((u8 *)tcp_hdr(skb))[13] & ~tcp_flags_clear; 1202dfa50be9SBen Hutchings 1203dfa50be9SBen Hutchings buffer->flags = EFX_TX_BUF_OPTION; 1204dfa50be9SBen Hutchings buffer->len = 0; 1205dfa50be9SBen Hutchings buffer->unmap_len = 0; 1206dfa50be9SBen Hutchings EFX_POPULATE_QWORD_5(buffer->option, 1207dfa50be9SBen Hutchings ESF_DZ_TX_DESC_IS_OPT, 1, 1208dfa50be9SBen Hutchings ESF_DZ_TX_OPTION_TYPE, 1209dfa50be9SBen Hutchings ESE_DZ_TX_OPTION_DESC_TSO, 1210dfa50be9SBen Hutchings ESF_DZ_TX_TSO_TCP_FLAGS, tcp_flags, 1211dfa50be9SBen Hutchings ESF_DZ_TX_TSO_IP_ID, st->ipv4_id, 1212dfa50be9SBen Hutchings ESF_DZ_TX_TSO_TCP_SEQNO, st->seqnum); 1213dfa50be9SBen Hutchings ++tx_queue->insert_count; 1214dfa50be9SBen Hutchings 1215dfa50be9SBen Hutchings /* We mapped the headers in tso_start(). Unmap them 1216dfa50be9SBen Hutchings * when the last segment is completed. 1217dfa50be9SBen Hutchings */ 12180fe5565bSBen Hutchings buffer = efx_tx_queue_get_insert_buffer(tx_queue); 1219dfa50be9SBen Hutchings buffer->dma_addr = st->header_dma_addr; 1220dfa50be9SBen Hutchings buffer->len = st->header_len; 1221dfa50be9SBen Hutchings if (is_last) { 1222dfa50be9SBen Hutchings buffer->flags = EFX_TX_BUF_CONT | EFX_TX_BUF_MAP_SINGLE; 1223dfa50be9SBen Hutchings buffer->unmap_len = st->header_unmap_len; 12242acdb92eSAlexandre Rames buffer->dma_offset = 0; 1225dfa50be9SBen Hutchings /* Ensure we only unmap them once in case of a 1226dfa50be9SBen Hutchings * later DMA mapping error and rollback 1227dfa50be9SBen Hutchings */ 1228dfa50be9SBen Hutchings st->header_unmap_len = 0; 1229dfa50be9SBen Hutchings } else { 1230dfa50be9SBen Hutchings buffer->flags = EFX_TX_BUF_CONT; 1231dfa50be9SBen Hutchings buffer->unmap_len = 0; 1232dfa50be9SBen Hutchings } 1233dfa50be9SBen Hutchings ++tx_queue->insert_count; 1234dfa50be9SBen Hutchings } 1235dfa50be9SBen Hutchings 1236dfa50be9SBen Hutchings st->seqnum += skb_shinfo(skb)->gso_size; 1237dfa50be9SBen Hutchings 1238dfa50be9SBen Hutchings /* Linux leaves suitable gaps in the IP ID space for us to fill. */ 1239dfa50be9SBen Hutchings ++st->ipv4_id; 1240f7251a9cSBen Hutchings 1241874aeea5SJeff Kirsher ++tx_queue->tso_packets; 1242874aeea5SJeff Kirsher 1243874aeea5SJeff Kirsher return 0; 1244874aeea5SJeff Kirsher } 1245874aeea5SJeff Kirsher 1246874aeea5SJeff Kirsher 1247874aeea5SJeff Kirsher /** 1248874aeea5SJeff Kirsher * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer 1249874aeea5SJeff Kirsher * @tx_queue: Efx TX queue 1250874aeea5SJeff Kirsher * @skb: Socket buffer 1251874aeea5SJeff Kirsher * 1252874aeea5SJeff Kirsher * Context: You must hold netif_tx_lock() to call this function. 1253874aeea5SJeff Kirsher * 1254874aeea5SJeff Kirsher * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if 1255874aeea5SJeff Kirsher * @skb was not enqueued. In all cases @skb is consumed. Return 125614bf718fSBen Hutchings * %NETDEV_TX_OK. 1257874aeea5SJeff Kirsher */ 1258874aeea5SJeff Kirsher static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue, 1259874aeea5SJeff Kirsher struct sk_buff *skb) 1260874aeea5SJeff Kirsher { 1261874aeea5SJeff Kirsher struct efx_nic *efx = tx_queue->efx; 126214bf718fSBen Hutchings int frag_i, rc; 1263874aeea5SJeff Kirsher struct tso_state state; 1264874aeea5SJeff Kirsher 1265874aeea5SJeff Kirsher /* Find the packet protocol and sanity-check it */ 1266874aeea5SJeff Kirsher state.protocol = efx_tso_check_protocol(skb); 1267874aeea5SJeff Kirsher 1268874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count); 1269874aeea5SJeff Kirsher 1270c78c39e6SBen Hutchings rc = tso_start(&state, efx, skb); 1271c78c39e6SBen Hutchings if (rc) 1272c78c39e6SBen Hutchings goto mem_err; 1273874aeea5SJeff Kirsher 1274c78c39e6SBen Hutchings if (likely(state.in_len == 0)) { 1275874aeea5SJeff Kirsher /* Grab the first payload fragment. */ 1276874aeea5SJeff Kirsher EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags < 1); 1277874aeea5SJeff Kirsher frag_i = 0; 1278874aeea5SJeff Kirsher rc = tso_get_fragment(&state, efx, 1279874aeea5SJeff Kirsher skb_shinfo(skb)->frags + frag_i); 1280874aeea5SJeff Kirsher if (rc) 1281874aeea5SJeff Kirsher goto mem_err; 1282874aeea5SJeff Kirsher } else { 1283c78c39e6SBen Hutchings /* Payload starts in the header area. */ 1284874aeea5SJeff Kirsher frag_i = -1; 1285874aeea5SJeff Kirsher } 1286874aeea5SJeff Kirsher 1287874aeea5SJeff Kirsher if (tso_start_new_packet(tx_queue, skb, &state) < 0) 1288874aeea5SJeff Kirsher goto mem_err; 1289874aeea5SJeff Kirsher 1290874aeea5SJeff Kirsher while (1) { 129114bf718fSBen Hutchings tso_fill_packet_with_fragment(tx_queue, skb, &state); 1292874aeea5SJeff Kirsher 1293874aeea5SJeff Kirsher /* Move onto the next fragment? */ 1294874aeea5SJeff Kirsher if (state.in_len == 0) { 1295874aeea5SJeff Kirsher if (++frag_i >= skb_shinfo(skb)->nr_frags) 1296874aeea5SJeff Kirsher /* End of payload reached. */ 1297874aeea5SJeff Kirsher break; 1298874aeea5SJeff Kirsher rc = tso_get_fragment(&state, efx, 1299874aeea5SJeff Kirsher skb_shinfo(skb)->frags + frag_i); 1300874aeea5SJeff Kirsher if (rc) 1301874aeea5SJeff Kirsher goto mem_err; 1302874aeea5SJeff Kirsher } 1303874aeea5SJeff Kirsher 1304874aeea5SJeff Kirsher /* Start at new packet? */ 1305874aeea5SJeff Kirsher if (state.packet_space == 0 && 1306874aeea5SJeff Kirsher tso_start_new_packet(tx_queue, skb, &state) < 0) 1307874aeea5SJeff Kirsher goto mem_err; 1308874aeea5SJeff Kirsher } 1309874aeea5SJeff Kirsher 1310449fa023SEric Dumazet netdev_tx_sent_queue(tx_queue->core_txq, skb->len); 1311449fa023SEric Dumazet 1312874aeea5SJeff Kirsher /* Pass off to hardware */ 1313874aeea5SJeff Kirsher efx_nic_push_buffers(tx_queue); 1314874aeea5SJeff Kirsher 131514bf718fSBen Hutchings efx_tx_maybe_stop_queue(tx_queue); 131614bf718fSBen Hutchings 1317874aeea5SJeff Kirsher tx_queue->tso_bursts++; 1318874aeea5SJeff Kirsher return NETDEV_TX_OK; 1319874aeea5SJeff Kirsher 1320874aeea5SJeff Kirsher mem_err: 1321874aeea5SJeff Kirsher netif_err(efx, tx_err, efx->net_dev, 13220e33d870SBen Hutchings "Out of memory for TSO headers, or DMA mapping error\n"); 1323874aeea5SJeff Kirsher dev_kfree_skb_any(skb); 1324874aeea5SJeff Kirsher 1325874aeea5SJeff Kirsher /* Free the DMA mapping we were in the process of writing out */ 1326874aeea5SJeff Kirsher if (state.unmap_len) { 13277668ff9cSBen Hutchings if (state.dma_flags & EFX_TX_BUF_MAP_SINGLE) 13280e33d870SBen Hutchings dma_unmap_single(&efx->pci_dev->dev, state.unmap_addr, 13290e33d870SBen Hutchings state.unmap_len, DMA_TO_DEVICE); 1330874aeea5SJeff Kirsher else 13310e33d870SBen Hutchings dma_unmap_page(&efx->pci_dev->dev, state.unmap_addr, 13320e33d870SBen Hutchings state.unmap_len, DMA_TO_DEVICE); 1333874aeea5SJeff Kirsher } 1334874aeea5SJeff Kirsher 1335dfa50be9SBen Hutchings /* Free the header DMA mapping, if using option descriptors */ 1336dfa50be9SBen Hutchings if (state.header_unmap_len) 1337dfa50be9SBen Hutchings dma_unmap_single(&efx->pci_dev->dev, state.header_dma_addr, 1338dfa50be9SBen Hutchings state.header_unmap_len, DMA_TO_DEVICE); 1339dfa50be9SBen Hutchings 1340874aeea5SJeff Kirsher efx_enqueue_unwind(tx_queue); 134114bf718fSBen Hutchings return NETDEV_TX_OK; 1342874aeea5SJeff Kirsher } 1343