1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2019 Solarflare Communications Inc. 5 * Copyright 2020-2022 Xilinx Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation, incorporated herein by reference. 10 */ 11 12 #ifndef EFX_TC_H 13 #define EFX_TC_H 14 #include <net/flow_offload.h> 15 #include <linux/rhashtable.h> 16 #include "net_driver.h" 17 #include "tc_counters.h" 18 19 #define IS_ALL_ONES(v) (!(typeof (v))~(v)) 20 21 static inline bool efx_ipv6_addr_all_ones(struct in6_addr *addr) 22 { 23 return !memchr_inv(addr, 0xff, sizeof(*addr)); 24 } 25 26 struct efx_tc_encap_action; /* see tc_encap_actions.h */ 27 28 struct efx_tc_action_set { 29 u16 vlan_push:2; 30 u16 vlan_pop:2; 31 u16 decap:1; 32 u16 deliver:1; 33 __be16 vlan_tci[2]; /* TCIs for vlan_push */ 34 __be16 vlan_proto[2]; /* Ethertypes for vlan_push */ 35 struct efx_tc_counter_index *count; 36 struct efx_tc_encap_action *encap_md; /* entry in tc_encap_ht table */ 37 struct list_head encap_user; /* entry on encap_md->users list */ 38 struct efx_tc_action_set_list *user; /* Only populated if encap_md */ 39 struct list_head count_user; /* entry on counter->users list, if encap */ 40 u32 dest_mport; 41 u32 fw_id; /* index of this entry in firmware actions table */ 42 struct list_head list; 43 }; 44 45 struct efx_tc_match_fields { 46 /* L1 */ 47 u32 ingress_port; 48 u8 recirc_id; /* mapped from (u32) TC chain_index to smaller space */ 49 /* L2 (inner when encap) */ 50 __be16 eth_proto; 51 __be16 vlan_tci[2], vlan_proto[2]; 52 u8 eth_saddr[ETH_ALEN], eth_daddr[ETH_ALEN]; 53 /* L3 (when IP) */ 54 u8 ip_proto, ip_tos, ip_ttl; 55 __be32 src_ip, dst_ip; 56 #ifdef CONFIG_IPV6 57 struct in6_addr src_ip6, dst_ip6; 58 #endif 59 bool ip_frag, ip_firstfrag; 60 /* L4 */ 61 __be16 l4_sport, l4_dport; /* Ports (UDP, TCP) */ 62 __be16 tcp_flags; 63 bool tcp_syn_fin_rst; /* true if ANY of SYN/FIN/RST are set */ 64 /* Encap. The following are *outer* fields. Note that there are no 65 * outer eth (L2) fields; this is because TC doesn't have them. 66 */ 67 __be32 enc_src_ip, enc_dst_ip; 68 struct in6_addr enc_src_ip6, enc_dst_ip6; 69 u8 enc_ip_tos, enc_ip_ttl; 70 __be16 enc_sport, enc_dport; 71 __be32 enc_keyid; /* e.g. VNI, VSID */ 72 /* Conntrack. */ 73 u16 ct_state_trk:1, ct_state_est:1; 74 u32 ct_mark; 75 u16 ct_zone; 76 }; 77 78 static inline bool efx_tc_match_is_encap(const struct efx_tc_match_fields *mask) 79 { 80 return mask->enc_src_ip || mask->enc_dst_ip || 81 !ipv6_addr_any(&mask->enc_src_ip6) || 82 !ipv6_addr_any(&mask->enc_dst_ip6) || mask->enc_ip_tos || 83 mask->enc_ip_ttl || mask->enc_sport || mask->enc_dport; 84 } 85 86 /** 87 * enum efx_tc_em_pseudo_type - &struct efx_tc_encap_match pseudo type 88 * 89 * These are used to classify "pseudo" encap matches, which don't refer 90 * to an entry in hardware but rather indicate that a section of the 91 * match space is in use by another Outer Rule. 92 * 93 * @EFX_TC_EM_DIRECT: real HW entry in Outer Rule table; not a pseudo. 94 * Hardware index in &struct efx_tc_encap_match.fw_id is valid. 95 * @EFX_TC_EM_PSEUDO_MASK: registered by an encap match which includes a 96 * match on an optional field (currently ip_tos and/or udp_sport), 97 * to prevent an overlapping encap match _without_ optional fields. 98 * The pseudo encap match may be referenced again by an encap match 99 * with different values for these fields, but all masks must match the 100 * first (stored in our child_* fields). 101 */ 102 enum efx_tc_em_pseudo_type { 103 EFX_TC_EM_DIRECT, 104 EFX_TC_EM_PSEUDO_MASK, 105 }; 106 107 struct efx_tc_encap_match { 108 __be32 src_ip, dst_ip; 109 struct in6_addr src_ip6, dst_ip6; 110 __be16 udp_dport; 111 __be16 udp_sport, udp_sport_mask; 112 u8 ip_tos, ip_tos_mask; 113 struct rhash_head linkage; 114 enum efx_encap_type tun_type; 115 u8 child_ip_tos_mask; 116 __be16 child_udp_sport_mask; 117 refcount_t ref; 118 enum efx_tc_em_pseudo_type type; 119 u32 fw_id; /* index of this entry in firmware encap match table */ 120 struct efx_tc_encap_match *pseudo; /* Referenced pseudo EM if needed */ 121 }; 122 123 struct efx_tc_recirc_id { 124 u32 chain_index; 125 struct net_device *net_dev; 126 struct rhash_head linkage; 127 refcount_t ref; 128 u8 fw_id; /* index allocated for use in the MAE */ 129 }; 130 131 struct efx_tc_match { 132 struct efx_tc_match_fields value; 133 struct efx_tc_match_fields mask; 134 struct efx_tc_encap_match *encap; 135 struct efx_tc_recirc_id *rid; 136 }; 137 138 struct efx_tc_action_set_list { 139 struct list_head list; 140 u32 fw_id; 141 }; 142 143 struct efx_tc_lhs_action { 144 struct efx_tc_recirc_id *rid; 145 struct efx_tc_ct_zone *zone; 146 struct efx_tc_counter_index *count; 147 }; 148 149 struct efx_tc_flow_rule { 150 unsigned long cookie; 151 struct rhash_head linkage; 152 struct efx_tc_match match; 153 struct efx_tc_action_set_list acts; 154 struct efx_tc_action_set_list *fallback; /* what to use when unready? */ 155 u32 fw_id; 156 }; 157 158 struct efx_tc_lhs_rule { 159 unsigned long cookie; 160 struct efx_tc_match match; 161 struct efx_tc_lhs_action lhs_act; 162 struct rhash_head linkage; 163 u32 fw_id; 164 }; 165 166 enum efx_tc_rule_prios { 167 EFX_TC_PRIO_TC, /* Rule inserted by TC */ 168 EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */ 169 EFX_TC_PRIO__NUM 170 }; 171 172 struct efx_tc_table_field_fmt { 173 u16 field_id; 174 u16 lbn; 175 u16 width; 176 u8 masking; 177 u8 scheme; 178 }; 179 180 struct efx_tc_table_desc { 181 u16 type; 182 u16 key_width; 183 u16 resp_width; 184 u16 n_keys; 185 u16 n_resps; 186 u16 n_prios; 187 u8 flags; 188 u8 scheme; 189 struct efx_tc_table_field_fmt *keys; 190 struct efx_tc_table_field_fmt *resps; 191 }; 192 193 struct efx_tc_table_ct { /* TABLE_ID_CONNTRACK_TABLE */ 194 struct efx_tc_table_desc desc; 195 bool hooked; 196 struct { /* indices of named fields within @desc.keys */ 197 u8 eth_proto_idx; 198 u8 ip_proto_idx; 199 u8 src_ip_idx; /* either v4 or v6 */ 200 u8 dst_ip_idx; 201 u8 l4_sport_idx; 202 u8 l4_dport_idx; 203 u8 zone_idx; /* for TABLE_FIELD_ID_DOMAIN */ 204 } keys; 205 struct { /* indices of named fields within @desc.resps */ 206 u8 dnat_idx; 207 u8 nat_ip_idx; 208 u8 l4_natport_idx; 209 u8 mark_idx; 210 u8 counter_id_idx; 211 } resps; 212 }; 213 214 /** 215 * struct efx_tc_state - control plane data for TC offload 216 * 217 * @caps: MAE capabilities reported by MCDI 218 * @block_list: List of &struct efx_tc_block_binding 219 * @mutex: Used to serialise operations on TC hashtables 220 * @counter_ht: Hashtable of TC counters (FW IDs and counter values) 221 * @counter_id_ht: Hashtable mapping TC counter cookies to counters 222 * @encap_ht: Hashtable of TC encap actions 223 * @encap_match_ht: Hashtable of TC encap matches 224 * @match_action_ht: Hashtable of TC match-action rules 225 * @lhs_rule_ht: Hashtable of TC left-hand (act ct & goto chain) rules 226 * @ct_zone_ht: Hashtable of TC conntrack flowtable bindings 227 * @ct_ht: Hashtable of TC conntrack flow entries 228 * @neigh_ht: Hashtable of neighbour watches (&struct efx_neigh_binder) 229 * @recirc_ht: Hashtable of recirculation ID mappings (&struct efx_tc_recirc_id) 230 * @recirc_ida: Recirculation ID allocator 231 * @meta_ct: MAE table layout for conntrack table 232 * @reps_mport_id: MAE port allocated for representor RX 233 * @reps_filter_uc: VNIC filter for representor unicast RX (promisc) 234 * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti) 235 * @reps_mport_vport_id: vport_id for representor RX filters 236 * @flush_counters: counters have been stopped, waiting for drain 237 * @flush_gen: final generation count per type array as reported by 238 * MC_CMD_MAE_COUNTERS_STREAM_STOP 239 * @seen_gen: most recent generation count per type as seen by efx_tc_rx() 240 * @flush_wq: wait queue used by efx_mae_stop_counters() to wait for 241 * MAE counters RXQ to finish draining 242 * @dflt: Match-action rules for default switching; at priority 243 * %EFX_TC_PRIO_DFLT. Named by *ingress* port 244 * @dflt.pf: rule for traffic ingressing from PF (egresses to wire) 245 * @dflt.wire: rule for traffic ingressing from wire (egresses to PF) 246 * @facts: Fallback action-set-lists for unready rules. Named by *egress* port 247 * @facts.pf: action-set-list for unready rules on PF netdev, hence applying to 248 * traffic from wire, and egressing to PF 249 * @facts.reps: action-set-list for unready rules on representors, hence 250 * applying to traffic from representees, and egressing to the reps mport 251 * @up: have TC datastructures been set up? 252 */ 253 struct efx_tc_state { 254 struct mae_caps *caps; 255 struct list_head block_list; 256 struct mutex mutex; 257 struct rhashtable counter_ht; 258 struct rhashtable counter_id_ht; 259 struct rhashtable encap_ht; 260 struct rhashtable encap_match_ht; 261 struct rhashtable match_action_ht; 262 struct rhashtable lhs_rule_ht; 263 struct rhashtable ct_zone_ht; 264 struct rhashtable ct_ht; 265 struct rhashtable neigh_ht; 266 struct rhashtable recirc_ht; 267 struct ida recirc_ida; 268 struct efx_tc_table_ct meta_ct; 269 u32 reps_mport_id, reps_mport_vport_id; 270 s32 reps_filter_uc, reps_filter_mc; 271 bool flush_counters; 272 u32 flush_gen[EFX_TC_COUNTER_TYPE_MAX]; 273 u32 seen_gen[EFX_TC_COUNTER_TYPE_MAX]; 274 wait_queue_head_t flush_wq; 275 struct { 276 struct efx_tc_flow_rule pf; 277 struct efx_tc_flow_rule wire; 278 } dflt; 279 struct { 280 struct efx_tc_action_set_list pf; 281 struct efx_tc_action_set_list reps; 282 } facts; 283 bool up; 284 }; 285 286 struct efx_rep; 287 288 enum efx_encap_type efx_tc_indr_netdev_type(struct net_device *net_dev); 289 struct efx_rep *efx_tc_flower_lookup_efv(struct efx_nic *efx, 290 struct net_device *dev); 291 s64 efx_tc_flower_external_mport(struct efx_nic *efx, struct efx_rep *efv); 292 int efx_tc_configure_default_rule_rep(struct efx_rep *efv); 293 void efx_tc_deconfigure_default_rule(struct efx_nic *efx, 294 struct efx_tc_flow_rule *rule); 295 int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev, 296 struct flow_cls_offload *tc, struct efx_rep *efv); 297 298 int efx_tc_insert_rep_filters(struct efx_nic *efx); 299 void efx_tc_remove_rep_filters(struct efx_nic *efx); 300 301 int efx_init_tc(struct efx_nic *efx); 302 void efx_fini_tc(struct efx_nic *efx); 303 304 int efx_init_struct_tc(struct efx_nic *efx); 305 void efx_fini_struct_tc(struct efx_nic *efx); 306 307 #endif /* EFX_TC_H */ 308