1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2015 Solarflare Communications Inc. 5 */ 6 7 #ifndef SIENA_SRIOV_H 8 #define SIENA_SRIOV_H 9 10 #include "net_driver.h" 11 12 /* On the SFC9000 family each port is associated with 1 PCI physical 13 * function (PF) handled by sfc and a configurable number of virtual 14 * functions (VFs) that may be handled by some other driver, often in 15 * a VM guest. The queue pointer registers are mapped in both PF and 16 * VF BARs such that an 8K region provides access to a single RX, TX 17 * and event queue (collectively a Virtual Interface, VI or VNIC). 18 * 19 * The PF has access to all 1024 VIs while VFs are mapped to VIs 20 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered 21 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE). 22 * The number of VIs and the VI_SCALE value are configurable but must 23 * be established at boot time by firmware. 24 */ 25 26 /* Maximum VI_SCALE parameter supported by Siena */ 27 #define EFX_VI_SCALE_MAX 6 28 /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX), 29 * so this is the smallest allowed value. 30 */ 31 #define EFX_VI_BASE 128U 32 /* Maximum number of VFs allowed */ 33 #define EFX_VF_COUNT_MAX 127 34 /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */ 35 #define EFX_MAX_VF_EVQ_SIZE 8192UL 36 /* The number of buffer table entries reserved for each VI on a VF */ 37 #define EFX_VF_BUFTBL_PER_VI \ 38 ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \ 39 sizeof(efx_qword_t) / EFX_BUF_SIZE) 40 41 int efx_siena_sriov_configure(struct efx_nic *efx, int num_vfs); 42 int efx_siena_sriov_init(struct efx_nic *efx); 43 void efx_siena_sriov_fini(struct efx_nic *efx); 44 int efx_siena_sriov_mac_address_changed(struct efx_nic *efx); 45 bool efx_siena_sriov_wanted(struct efx_nic *efx); 46 void efx_siena_sriov_reset(struct efx_nic *efx); 47 void efx_siena_sriov_flr(struct efx_nic *efx, unsigned flr); 48 49 int efx_siena_sriov_set_vf_mac(struct efx_nic *efx, int vf, const u8 *mac); 50 int efx_siena_sriov_set_vf_vlan(struct efx_nic *efx, int vf, 51 u16 vlan, u8 qos); 52 int efx_siena_sriov_set_vf_spoofchk(struct efx_nic *efx, int vf, 53 bool spoofchk); 54 int efx_siena_sriov_get_vf_config(struct efx_nic *efx, int vf, 55 struct ifla_vf_info *ivf); 56 57 #ifdef CONFIG_SFC_SIENA_SRIOV 58 59 static inline bool efx_siena_sriov_enabled(struct efx_nic *efx) 60 { 61 return efx->vf_init_count != 0; 62 } 63 64 int efx_init_sriov(void); 65 void efx_fini_sriov(void); 66 #else /* !CONFIG_SFC_SIENA_SRIOV */ 67 static inline bool efx_siena_sriov_enabled(struct efx_nic *efx) 68 { 69 return false; 70 } 71 #endif /* CONFIG_SFC_SIENA_SRIOV */ 72 73 void efx_siena_sriov_probe(struct efx_nic *efx); 74 void efx_siena_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event); 75 void efx_siena_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event); 76 void efx_siena_sriov_event(struct efx_channel *channel, efx_qword_t *event); 77 void efx_siena_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq); 78 79 #endif /* SIENA_SRIOV_H */ 80