xref: /openbmc/linux/drivers/net/ethernet/sfc/rx.c (revision 63dc02bd)
1 /****************************************************************************
2  * Driver for Solarflare Solarstorm network controllers and boards
3  * Copyright 2005-2006 Fen Systems Ltd.
4  * Copyright 2005-2011 Solarflare Communications Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License version 2 as published
8  * by the Free Software Foundation, incorporated herein by reference.
9  */
10 
11 #include <linux/socket.h>
12 #include <linux/in.h>
13 #include <linux/slab.h>
14 #include <linux/ip.h>
15 #include <linux/tcp.h>
16 #include <linux/udp.h>
17 #include <linux/prefetch.h>
18 #include <linux/moduleparam.h>
19 #include <net/ip.h>
20 #include <net/checksum.h>
21 #include "net_driver.h"
22 #include "efx.h"
23 #include "nic.h"
24 #include "selftest.h"
25 #include "workarounds.h"
26 
27 /* Number of RX descriptors pushed at once. */
28 #define EFX_RX_BATCH  8
29 
30 /* Maximum size of a buffer sharing a page */
31 #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
32 
33 /* Size of buffer allocated for skb header area. */
34 #define EFX_SKB_HEADERS  64u
35 
36 /*
37  * rx_alloc_method - RX buffer allocation method
38  *
39  * This driver supports two methods for allocating and using RX buffers:
40  * each RX buffer may be backed by an skb or by an order-n page.
41  *
42  * When GRO is in use then the second method has a lower overhead,
43  * since we don't have to allocate then free skbs on reassembled frames.
44  *
45  * Values:
46  *   - RX_ALLOC_METHOD_AUTO = 0
47  *   - RX_ALLOC_METHOD_SKB  = 1
48  *   - RX_ALLOC_METHOD_PAGE = 2
49  *
50  * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
51  * controlled by the parameters below.
52  *
53  *   - Since pushing and popping descriptors are separated by the rx_queue
54  *     size, so the watermarks should be ~rxd_size.
55  *   - The performance win by using page-based allocation for GRO is less
56  *     than the performance hit of using page-based allocation of non-GRO,
57  *     so the watermarks should reflect this.
58  *
59  * Per channel we maintain a single variable, updated by each channel:
60  *
61  *   rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO :
62  *                      RX_ALLOC_FACTOR_SKB)
63  * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
64  * limits the hysteresis), and update the allocation strategy:
65  *
66  *   rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ?
67  *                      RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
68  */
69 static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
70 
71 #define RX_ALLOC_LEVEL_GRO 0x2000
72 #define RX_ALLOC_LEVEL_MAX 0x3000
73 #define RX_ALLOC_FACTOR_GRO 1
74 #define RX_ALLOC_FACTOR_SKB (-2)
75 
76 /* This is the percentage fill level below which new RX descriptors
77  * will be added to the RX descriptor ring.
78  */
79 static unsigned int rx_refill_threshold = 90;
80 
81 /* This is the percentage fill level to which an RX queue will be refilled
82  * when the "RX refill threshold" is reached.
83  */
84 static unsigned int rx_refill_limit = 95;
85 
86 /*
87  * RX maximum head room required.
88  *
89  * This must be at least 1 to prevent overflow and at least 2 to allow
90  * pipelined receives.
91  */
92 #define EFX_RXD_HEAD_ROOM 2
93 
94 /* Offset of ethernet header within page */
95 static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx,
96 					     struct efx_rx_buffer *buf)
97 {
98 	/* Offset is always within one page, so we don't need to consider
99 	 * the page order.
100 	 */
101 	return ((unsigned int) buf->dma_addr & (PAGE_SIZE - 1)) +
102 		efx->type->rx_buffer_hash_size;
103 }
104 static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
105 {
106 	return PAGE_SIZE << efx->rx_buffer_order;
107 }
108 
109 static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf)
110 {
111 	if (buf->flags & EFX_RX_BUF_PAGE)
112 		return page_address(buf->u.page) + efx_rx_buf_offset(efx, buf);
113 	else
114 		return (u8 *)buf->u.skb->data + efx->type->rx_buffer_hash_size;
115 }
116 
117 static inline u32 efx_rx_buf_hash(const u8 *eh)
118 {
119 	/* The ethernet header is always directly after any hash. */
120 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0
121 	return __le32_to_cpup((const __le32 *)(eh - 4));
122 #else
123 	const u8 *data = eh - 4;
124 	return (u32)data[0]	  |
125 	       (u32)data[1] << 8  |
126 	       (u32)data[2] << 16 |
127 	       (u32)data[3] << 24;
128 #endif
129 }
130 
131 /**
132  * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
133  *
134  * @rx_queue:		Efx RX queue
135  *
136  * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
137  * struct efx_rx_buffer for each one. Return a negative error code or 0
138  * on success. May fail having only inserted fewer than EFX_RX_BATCH
139  * buffers.
140  */
141 static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
142 {
143 	struct efx_nic *efx = rx_queue->efx;
144 	struct net_device *net_dev = efx->net_dev;
145 	struct efx_rx_buffer *rx_buf;
146 	struct sk_buff *skb;
147 	int skb_len = efx->rx_buffer_len;
148 	unsigned index, count;
149 
150 	for (count = 0; count < EFX_RX_BATCH; ++count) {
151 		index = rx_queue->added_count & rx_queue->ptr_mask;
152 		rx_buf = efx_rx_buffer(rx_queue, index);
153 
154 		rx_buf->u.skb = skb = netdev_alloc_skb(net_dev, skb_len);
155 		if (unlikely(!skb))
156 			return -ENOMEM;
157 
158 		/* Adjust the SKB for padding */
159 		skb_reserve(skb, NET_IP_ALIGN);
160 		rx_buf->len = skb_len - NET_IP_ALIGN;
161 		rx_buf->flags = 0;
162 
163 		rx_buf->dma_addr = pci_map_single(efx->pci_dev,
164 						  skb->data, rx_buf->len,
165 						  PCI_DMA_FROMDEVICE);
166 		if (unlikely(pci_dma_mapping_error(efx->pci_dev,
167 						   rx_buf->dma_addr))) {
168 			dev_kfree_skb_any(skb);
169 			rx_buf->u.skb = NULL;
170 			return -EIO;
171 		}
172 
173 		++rx_queue->added_count;
174 		++rx_queue->alloc_skb_count;
175 	}
176 
177 	return 0;
178 }
179 
180 /**
181  * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
182  *
183  * @rx_queue:		Efx RX queue
184  *
185  * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
186  * and populates struct efx_rx_buffers for each one. Return a negative error
187  * code or 0 on success. If a single page can be split between two buffers,
188  * then the page will either be inserted fully, or not at at all.
189  */
190 static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
191 {
192 	struct efx_nic *efx = rx_queue->efx;
193 	struct efx_rx_buffer *rx_buf;
194 	struct page *page;
195 	void *page_addr;
196 	struct efx_rx_page_state *state;
197 	dma_addr_t dma_addr;
198 	unsigned index, count;
199 
200 	/* We can split a page between two buffers */
201 	BUILD_BUG_ON(EFX_RX_BATCH & 1);
202 
203 	for (count = 0; count < EFX_RX_BATCH; ++count) {
204 		page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
205 				   efx->rx_buffer_order);
206 		if (unlikely(page == NULL))
207 			return -ENOMEM;
208 		dma_addr = pci_map_page(efx->pci_dev, page, 0,
209 					efx_rx_buf_size(efx),
210 					PCI_DMA_FROMDEVICE);
211 		if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) {
212 			__free_pages(page, efx->rx_buffer_order);
213 			return -EIO;
214 		}
215 		page_addr = page_address(page);
216 		state = page_addr;
217 		state->refcnt = 0;
218 		state->dma_addr = dma_addr;
219 
220 		page_addr += sizeof(struct efx_rx_page_state);
221 		dma_addr += sizeof(struct efx_rx_page_state);
222 
223 	split:
224 		index = rx_queue->added_count & rx_queue->ptr_mask;
225 		rx_buf = efx_rx_buffer(rx_queue, index);
226 		rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
227 		rx_buf->u.page = page;
228 		rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
229 		rx_buf->flags = EFX_RX_BUF_PAGE;
230 		++rx_queue->added_count;
231 		++rx_queue->alloc_page_count;
232 		++state->refcnt;
233 
234 		if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
235 			/* Use the second half of the page */
236 			get_page(page);
237 			dma_addr += (PAGE_SIZE >> 1);
238 			page_addr += (PAGE_SIZE >> 1);
239 			++count;
240 			goto split;
241 		}
242 	}
243 
244 	return 0;
245 }
246 
247 static void efx_unmap_rx_buffer(struct efx_nic *efx,
248 				struct efx_rx_buffer *rx_buf)
249 {
250 	if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
251 		struct efx_rx_page_state *state;
252 
253 		state = page_address(rx_buf->u.page);
254 		if (--state->refcnt == 0) {
255 			pci_unmap_page(efx->pci_dev,
256 				       state->dma_addr,
257 				       efx_rx_buf_size(efx),
258 				       PCI_DMA_FROMDEVICE);
259 		}
260 	} else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
261 		pci_unmap_single(efx->pci_dev, rx_buf->dma_addr,
262 				 rx_buf->len, PCI_DMA_FROMDEVICE);
263 	}
264 }
265 
266 static void efx_free_rx_buffer(struct efx_nic *efx,
267 			       struct efx_rx_buffer *rx_buf)
268 {
269 	if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
270 		__free_pages(rx_buf->u.page, efx->rx_buffer_order);
271 		rx_buf->u.page = NULL;
272 	} else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
273 		dev_kfree_skb_any(rx_buf->u.skb);
274 		rx_buf->u.skb = NULL;
275 	}
276 }
277 
278 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
279 			       struct efx_rx_buffer *rx_buf)
280 {
281 	efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
282 	efx_free_rx_buffer(rx_queue->efx, rx_buf);
283 }
284 
285 /* Attempt to resurrect the other receive buffer that used to share this page,
286  * which had previously been passed up to the kernel and freed. */
287 static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
288 				    struct efx_rx_buffer *rx_buf)
289 {
290 	struct efx_rx_page_state *state = page_address(rx_buf->u.page);
291 	struct efx_rx_buffer *new_buf;
292 	unsigned fill_level, index;
293 
294 	/* +1 because efx_rx_packet() incremented removed_count. +1 because
295 	 * we'd like to insert an additional descriptor whilst leaving
296 	 * EFX_RXD_HEAD_ROOM for the non-recycle path */
297 	fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
298 	if (unlikely(fill_level > rx_queue->max_fill)) {
299 		/* We could place "state" on a list, and drain the list in
300 		 * efx_fast_push_rx_descriptors(). For now, this will do. */
301 		return;
302 	}
303 
304 	++state->refcnt;
305 	get_page(rx_buf->u.page);
306 
307 	index = rx_queue->added_count & rx_queue->ptr_mask;
308 	new_buf = efx_rx_buffer(rx_queue, index);
309 	new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
310 	new_buf->u.page = rx_buf->u.page;
311 	new_buf->len = rx_buf->len;
312 	new_buf->flags = EFX_RX_BUF_PAGE;
313 	++rx_queue->added_count;
314 }
315 
316 /* Recycle the given rx buffer directly back into the rx_queue. There is
317  * always room to add this buffer, because we've just popped a buffer. */
318 static void efx_recycle_rx_buffer(struct efx_channel *channel,
319 				  struct efx_rx_buffer *rx_buf)
320 {
321 	struct efx_nic *efx = channel->efx;
322 	struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
323 	struct efx_rx_buffer *new_buf;
324 	unsigned index;
325 
326 	rx_buf->flags &= EFX_RX_BUF_PAGE;
327 
328 	if ((rx_buf->flags & EFX_RX_BUF_PAGE) &&
329 	    efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
330 	    page_count(rx_buf->u.page) == 1)
331 		efx_resurrect_rx_buffer(rx_queue, rx_buf);
332 
333 	index = rx_queue->added_count & rx_queue->ptr_mask;
334 	new_buf = efx_rx_buffer(rx_queue, index);
335 
336 	memcpy(new_buf, rx_buf, sizeof(*new_buf));
337 	rx_buf->u.page = NULL;
338 	++rx_queue->added_count;
339 }
340 
341 /**
342  * efx_fast_push_rx_descriptors - push new RX descriptors quickly
343  * @rx_queue:		RX descriptor queue
344  * This will aim to fill the RX descriptor queue up to
345  * @rx_queue->@fast_fill_limit. If there is insufficient atomic
346  * memory to do so, a slow fill will be scheduled.
347  *
348  * The caller must provide serialisation (none is used here). In practise,
349  * this means this function must run from the NAPI handler, or be called
350  * when NAPI is disabled.
351  */
352 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
353 {
354 	struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
355 	unsigned fill_level;
356 	int space, rc = 0;
357 
358 	/* Calculate current fill level, and exit if we don't need to fill */
359 	fill_level = (rx_queue->added_count - rx_queue->removed_count);
360 	EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
361 	if (fill_level >= rx_queue->fast_fill_trigger)
362 		goto out;
363 
364 	/* Record minimum fill level */
365 	if (unlikely(fill_level < rx_queue->min_fill)) {
366 		if (fill_level)
367 			rx_queue->min_fill = fill_level;
368 	}
369 
370 	space = rx_queue->fast_fill_limit - fill_level;
371 	if (space < EFX_RX_BATCH)
372 		goto out;
373 
374 	netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
375 		   "RX queue %d fast-filling descriptor ring from"
376 		   " level %d to level %d using %s allocation\n",
377 		   efx_rx_queue_index(rx_queue), fill_level,
378 		   rx_queue->fast_fill_limit,
379 		   channel->rx_alloc_push_pages ? "page" : "skb");
380 
381 	do {
382 		if (channel->rx_alloc_push_pages)
383 			rc = efx_init_rx_buffers_page(rx_queue);
384 		else
385 			rc = efx_init_rx_buffers_skb(rx_queue);
386 		if (unlikely(rc)) {
387 			/* Ensure that we don't leave the rx queue empty */
388 			if (rx_queue->added_count == rx_queue->removed_count)
389 				efx_schedule_slow_fill(rx_queue);
390 			goto out;
391 		}
392 	} while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
393 
394 	netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
395 		   "RX queue %d fast-filled descriptor ring "
396 		   "to level %d\n", efx_rx_queue_index(rx_queue),
397 		   rx_queue->added_count - rx_queue->removed_count);
398 
399  out:
400 	if (rx_queue->notified_count != rx_queue->added_count)
401 		efx_nic_notify_rx_desc(rx_queue);
402 }
403 
404 void efx_rx_slow_fill(unsigned long context)
405 {
406 	struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
407 
408 	/* Post an event to cause NAPI to run and refill the queue */
409 	efx_nic_generate_fill_event(rx_queue);
410 	++rx_queue->slow_fill_count;
411 }
412 
413 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
414 				     struct efx_rx_buffer *rx_buf,
415 				     int len, bool *leak_packet)
416 {
417 	struct efx_nic *efx = rx_queue->efx;
418 	unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
419 
420 	if (likely(len <= max_len))
421 		return;
422 
423 	/* The packet must be discarded, but this is only a fatal error
424 	 * if the caller indicated it was
425 	 */
426 	rx_buf->flags |= EFX_RX_PKT_DISCARD;
427 
428 	if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
429 		if (net_ratelimit())
430 			netif_err(efx, rx_err, efx->net_dev,
431 				  " RX queue %d seriously overlength "
432 				  "RX event (0x%x > 0x%x+0x%x). Leaking\n",
433 				  efx_rx_queue_index(rx_queue), len, max_len,
434 				  efx->type->rx_buffer_padding);
435 		/* If this buffer was skb-allocated, then the meta
436 		 * data at the end of the skb will be trashed. So
437 		 * we have no choice but to leak the fragment.
438 		 */
439 		*leak_packet = !(rx_buf->flags & EFX_RX_BUF_PAGE);
440 		efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
441 	} else {
442 		if (net_ratelimit())
443 			netif_err(efx, rx_err, efx->net_dev,
444 				  " RX queue %d overlength RX event "
445 				  "(0x%x > 0x%x)\n",
446 				  efx_rx_queue_index(rx_queue), len, max_len);
447 	}
448 
449 	efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
450 }
451 
452 /* Pass a received packet up through GRO.  GRO can handle pages
453  * regardless of checksum state and skbs with a good checksum.
454  */
455 static void efx_rx_packet_gro(struct efx_channel *channel,
456 			      struct efx_rx_buffer *rx_buf,
457 			      const u8 *eh)
458 {
459 	struct napi_struct *napi = &channel->napi_str;
460 	gro_result_t gro_result;
461 
462 	if (rx_buf->flags & EFX_RX_BUF_PAGE) {
463 		struct efx_nic *efx = channel->efx;
464 		struct page *page = rx_buf->u.page;
465 		struct sk_buff *skb;
466 
467 		rx_buf->u.page = NULL;
468 
469 		skb = napi_get_frags(napi);
470 		if (!skb) {
471 			put_page(page);
472 			return;
473 		}
474 
475 		if (efx->net_dev->features & NETIF_F_RXHASH)
476 			skb->rxhash = efx_rx_buf_hash(eh);
477 
478 		skb_fill_page_desc(skb, 0, page,
479 				   efx_rx_buf_offset(efx, rx_buf), rx_buf->len);
480 
481 		skb->len = rx_buf->len;
482 		skb->data_len = rx_buf->len;
483 		skb->truesize += rx_buf->len;
484 		skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
485 				  CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
486 
487 		skb_record_rx_queue(skb, channel->channel);
488 
489 		gro_result = napi_gro_frags(napi);
490 	} else {
491 		struct sk_buff *skb = rx_buf->u.skb;
492 
493 		EFX_BUG_ON_PARANOID(!(rx_buf->flags & EFX_RX_PKT_CSUMMED));
494 		rx_buf->u.skb = NULL;
495 		skb->ip_summed = CHECKSUM_UNNECESSARY;
496 
497 		gro_result = napi_gro_receive(napi, skb);
498 	}
499 
500 	if (gro_result == GRO_NORMAL) {
501 		channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
502 	} else if (gro_result != GRO_DROP) {
503 		channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO;
504 		channel->irq_mod_score += 2;
505 	}
506 }
507 
508 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
509 		   unsigned int len, u16 flags)
510 {
511 	struct efx_nic *efx = rx_queue->efx;
512 	struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
513 	struct efx_rx_buffer *rx_buf;
514 	bool leak_packet = false;
515 
516 	rx_buf = efx_rx_buffer(rx_queue, index);
517 	rx_buf->flags |= flags;
518 
519 	/* This allows the refill path to post another buffer.
520 	 * EFX_RXD_HEAD_ROOM ensures that the slot we are using
521 	 * isn't overwritten yet.
522 	 */
523 	rx_queue->removed_count++;
524 
525 	/* Validate the length encoded in the event vs the descriptor pushed */
526 	efx_rx_packet__check_len(rx_queue, rx_buf, len, &leak_packet);
527 
528 	netif_vdbg(efx, rx_status, efx->net_dev,
529 		   "RX queue %d received id %x at %llx+%x %s%s\n",
530 		   efx_rx_queue_index(rx_queue), index,
531 		   (unsigned long long)rx_buf->dma_addr, len,
532 		   (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
533 		   (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
534 
535 	/* Discard packet, if instructed to do so */
536 	if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
537 		if (unlikely(leak_packet))
538 			channel->n_skbuff_leaks++;
539 		else
540 			efx_recycle_rx_buffer(channel, rx_buf);
541 
542 		/* Don't hold off the previous receive */
543 		rx_buf = NULL;
544 		goto out;
545 	}
546 
547 	/* Release card resources - assumes all RX buffers consumed in-order
548 	 * per RX queue
549 	 */
550 	efx_unmap_rx_buffer(efx, rx_buf);
551 
552 	/* Prefetch nice and early so data will (hopefully) be in cache by
553 	 * the time we look at it.
554 	 */
555 	prefetch(efx_rx_buf_eh(efx, rx_buf));
556 
557 	/* Pipeline receives so that we give time for packet headers to be
558 	 * prefetched into cache.
559 	 */
560 	rx_buf->len = len - efx->type->rx_buffer_hash_size;
561 out:
562 	if (channel->rx_pkt)
563 		__efx_rx_packet(channel, channel->rx_pkt);
564 	channel->rx_pkt = rx_buf;
565 }
566 
567 static void efx_rx_deliver(struct efx_channel *channel,
568 			   struct efx_rx_buffer *rx_buf)
569 {
570 	struct sk_buff *skb;
571 
572 	/* We now own the SKB */
573 	skb = rx_buf->u.skb;
574 	rx_buf->u.skb = NULL;
575 
576 	/* Set the SKB flags */
577 	skb_checksum_none_assert(skb);
578 
579 	/* Pass the packet up */
580 	netif_receive_skb(skb);
581 
582 	/* Update allocation strategy method */
583 	channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
584 }
585 
586 /* Handle a received packet.  Second half: Touches packet payload. */
587 void __efx_rx_packet(struct efx_channel *channel, struct efx_rx_buffer *rx_buf)
588 {
589 	struct efx_nic *efx = channel->efx;
590 	u8 *eh = efx_rx_buf_eh(efx, rx_buf);
591 
592 	/* If we're in loopback test, then pass the packet directly to the
593 	 * loopback layer, and free the rx_buf here
594 	 */
595 	if (unlikely(efx->loopback_selftest)) {
596 		efx_loopback_rx_packet(efx, eh, rx_buf->len);
597 		efx_free_rx_buffer(efx, rx_buf);
598 		return;
599 	}
600 
601 	if (!(rx_buf->flags & EFX_RX_BUF_PAGE)) {
602 		struct sk_buff *skb = rx_buf->u.skb;
603 
604 		prefetch(skb_shinfo(skb));
605 
606 		skb_reserve(skb, efx->type->rx_buffer_hash_size);
607 		skb_put(skb, rx_buf->len);
608 
609 		if (efx->net_dev->features & NETIF_F_RXHASH)
610 			skb->rxhash = efx_rx_buf_hash(eh);
611 
612 		/* Move past the ethernet header. rx_buf->data still points
613 		 * at the ethernet header */
614 		skb->protocol = eth_type_trans(skb, efx->net_dev);
615 
616 		skb_record_rx_queue(skb, channel->channel);
617 	}
618 
619 	if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
620 		rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
621 
622 	if (likely(rx_buf->flags & (EFX_RX_BUF_PAGE | EFX_RX_PKT_CSUMMED)))
623 		efx_rx_packet_gro(channel, rx_buf, eh);
624 	else
625 		efx_rx_deliver(channel, rx_buf);
626 }
627 
628 void efx_rx_strategy(struct efx_channel *channel)
629 {
630 	enum efx_rx_alloc_method method = rx_alloc_method;
631 
632 	/* Only makes sense to use page based allocation if GRO is enabled */
633 	if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
634 		method = RX_ALLOC_METHOD_SKB;
635 	} else if (method == RX_ALLOC_METHOD_AUTO) {
636 		/* Constrain the rx_alloc_level */
637 		if (channel->rx_alloc_level < 0)
638 			channel->rx_alloc_level = 0;
639 		else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
640 			channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
641 
642 		/* Decide on the allocation method */
643 		method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ?
644 			  RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
645 	}
646 
647 	/* Push the option */
648 	channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
649 }
650 
651 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
652 {
653 	struct efx_nic *efx = rx_queue->efx;
654 	unsigned int entries;
655 	int rc;
656 
657 	/* Create the smallest power-of-two aligned ring */
658 	entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
659 	EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
660 	rx_queue->ptr_mask = entries - 1;
661 
662 	netif_dbg(efx, probe, efx->net_dev,
663 		  "creating RX queue %d size %#x mask %#x\n",
664 		  efx_rx_queue_index(rx_queue), efx->rxq_entries,
665 		  rx_queue->ptr_mask);
666 
667 	/* Allocate RX buffers */
668 	rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
669 				   GFP_KERNEL);
670 	if (!rx_queue->buffer)
671 		return -ENOMEM;
672 
673 	rc = efx_nic_probe_rx(rx_queue);
674 	if (rc) {
675 		kfree(rx_queue->buffer);
676 		rx_queue->buffer = NULL;
677 	}
678 	return rc;
679 }
680 
681 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
682 {
683 	struct efx_nic *efx = rx_queue->efx;
684 	unsigned int max_fill, trigger, limit;
685 
686 	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
687 		  "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
688 
689 	/* Initialise ptr fields */
690 	rx_queue->added_count = 0;
691 	rx_queue->notified_count = 0;
692 	rx_queue->removed_count = 0;
693 	rx_queue->min_fill = -1U;
694 
695 	/* Initialise limit fields */
696 	max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
697 	trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
698 	limit = max_fill * min(rx_refill_limit, 100U) / 100U;
699 
700 	rx_queue->max_fill = max_fill;
701 	rx_queue->fast_fill_trigger = trigger;
702 	rx_queue->fast_fill_limit = limit;
703 
704 	/* Set up RX descriptor ring */
705 	rx_queue->enabled = true;
706 	efx_nic_init_rx(rx_queue);
707 }
708 
709 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
710 {
711 	int i;
712 	struct efx_rx_buffer *rx_buf;
713 
714 	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
715 		  "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
716 
717 	/* A flush failure might have left rx_queue->enabled */
718 	rx_queue->enabled = false;
719 
720 	del_timer_sync(&rx_queue->slow_fill);
721 	efx_nic_fini_rx(rx_queue);
722 
723 	/* Release RX buffers NB start at index 0 not current HW ptr */
724 	if (rx_queue->buffer) {
725 		for (i = 0; i <= rx_queue->ptr_mask; i++) {
726 			rx_buf = efx_rx_buffer(rx_queue, i);
727 			efx_fini_rx_buffer(rx_queue, rx_buf);
728 		}
729 	}
730 }
731 
732 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
733 {
734 	netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
735 		  "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
736 
737 	efx_nic_remove_rx(rx_queue);
738 
739 	kfree(rx_queue->buffer);
740 	rx_queue->buffer = NULL;
741 }
742 
743 
744 module_param(rx_alloc_method, int, 0644);
745 MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
746 
747 module_param(rx_refill_threshold, uint, 0444);
748 MODULE_PARM_DESC(rx_refill_threshold,
749 		 "RX descriptor ring fast/slow fill threshold (%)");
750 
751