1 /**************************************************************************** 2 * Driver for Solarflare Solarstorm network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2011 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include <linux/socket.h> 12 #include <linux/in.h> 13 #include <linux/slab.h> 14 #include <linux/ip.h> 15 #include <linux/tcp.h> 16 #include <linux/udp.h> 17 #include <linux/prefetch.h> 18 #include <linux/moduleparam.h> 19 #include <net/ip.h> 20 #include <net/checksum.h> 21 #include "net_driver.h" 22 #include "efx.h" 23 #include "nic.h" 24 #include "selftest.h" 25 #include "workarounds.h" 26 27 /* Number of RX descriptors pushed at once. */ 28 #define EFX_RX_BATCH 8 29 30 /* Maximum size of a buffer sharing a page */ 31 #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state)) 32 33 /* Size of buffer allocated for skb header area. */ 34 #define EFX_SKB_HEADERS 64u 35 36 /* 37 * rx_alloc_method - RX buffer allocation method 38 * 39 * This driver supports two methods for allocating and using RX buffers: 40 * each RX buffer may be backed by an skb or by an order-n page. 41 * 42 * When GRO is in use then the second method has a lower overhead, 43 * since we don't have to allocate then free skbs on reassembled frames. 44 * 45 * Values: 46 * - RX_ALLOC_METHOD_AUTO = 0 47 * - RX_ALLOC_METHOD_SKB = 1 48 * - RX_ALLOC_METHOD_PAGE = 2 49 * 50 * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count 51 * controlled by the parameters below. 52 * 53 * - Since pushing and popping descriptors are separated by the rx_queue 54 * size, so the watermarks should be ~rxd_size. 55 * - The performance win by using page-based allocation for GRO is less 56 * than the performance hit of using page-based allocation of non-GRO, 57 * so the watermarks should reflect this. 58 * 59 * Per channel we maintain a single variable, updated by each channel: 60 * 61 * rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO : 62 * RX_ALLOC_FACTOR_SKB) 63 * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which 64 * limits the hysteresis), and update the allocation strategy: 65 * 66 * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ? 67 * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB) 68 */ 69 static int rx_alloc_method = RX_ALLOC_METHOD_AUTO; 70 71 #define RX_ALLOC_LEVEL_GRO 0x2000 72 #define RX_ALLOC_LEVEL_MAX 0x3000 73 #define RX_ALLOC_FACTOR_GRO 1 74 #define RX_ALLOC_FACTOR_SKB (-2) 75 76 /* This is the percentage fill level below which new RX descriptors 77 * will be added to the RX descriptor ring. 78 */ 79 static unsigned int rx_refill_threshold; 80 81 /* 82 * RX maximum head room required. 83 * 84 * This must be at least 1 to prevent overflow and at least 2 to allow 85 * pipelined receives. 86 */ 87 #define EFX_RXD_HEAD_ROOM 2 88 89 /* Offset of ethernet header within page */ 90 static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx, 91 struct efx_rx_buffer *buf) 92 { 93 /* Offset is always within one page, so we don't need to consider 94 * the page order. 95 */ 96 return ((unsigned int) buf->dma_addr & (PAGE_SIZE - 1)) + 97 efx->type->rx_buffer_hash_size; 98 } 99 static inline unsigned int efx_rx_buf_size(struct efx_nic *efx) 100 { 101 return PAGE_SIZE << efx->rx_buffer_order; 102 } 103 104 static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf) 105 { 106 if (buf->flags & EFX_RX_BUF_PAGE) 107 return page_address(buf->u.page) + efx_rx_buf_offset(efx, buf); 108 else 109 return (u8 *)buf->u.skb->data + efx->type->rx_buffer_hash_size; 110 } 111 112 static inline u32 efx_rx_buf_hash(const u8 *eh) 113 { 114 /* The ethernet header is always directly after any hash. */ 115 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0 116 return __le32_to_cpup((const __le32 *)(eh - 4)); 117 #else 118 const u8 *data = eh - 4; 119 return (u32)data[0] | 120 (u32)data[1] << 8 | 121 (u32)data[2] << 16 | 122 (u32)data[3] << 24; 123 #endif 124 } 125 126 /** 127 * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers 128 * 129 * @rx_queue: Efx RX queue 130 * 131 * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a 132 * struct efx_rx_buffer for each one. Return a negative error code or 0 133 * on success. May fail having only inserted fewer than EFX_RX_BATCH 134 * buffers. 135 */ 136 static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue) 137 { 138 struct efx_nic *efx = rx_queue->efx; 139 struct net_device *net_dev = efx->net_dev; 140 struct efx_rx_buffer *rx_buf; 141 struct sk_buff *skb; 142 int skb_len = efx->rx_buffer_len; 143 unsigned index, count; 144 145 for (count = 0; count < EFX_RX_BATCH; ++count) { 146 index = rx_queue->added_count & rx_queue->ptr_mask; 147 rx_buf = efx_rx_buffer(rx_queue, index); 148 149 rx_buf->u.skb = skb = netdev_alloc_skb(net_dev, skb_len); 150 if (unlikely(!skb)) 151 return -ENOMEM; 152 153 /* Adjust the SKB for padding */ 154 skb_reserve(skb, NET_IP_ALIGN); 155 rx_buf->len = skb_len - NET_IP_ALIGN; 156 rx_buf->flags = 0; 157 158 rx_buf->dma_addr = dma_map_single(&efx->pci_dev->dev, 159 skb->data, rx_buf->len, 160 DMA_FROM_DEVICE); 161 if (unlikely(dma_mapping_error(&efx->pci_dev->dev, 162 rx_buf->dma_addr))) { 163 dev_kfree_skb_any(skb); 164 rx_buf->u.skb = NULL; 165 return -EIO; 166 } 167 168 ++rx_queue->added_count; 169 ++rx_queue->alloc_skb_count; 170 } 171 172 return 0; 173 } 174 175 /** 176 * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers 177 * 178 * @rx_queue: Efx RX queue 179 * 180 * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA, 181 * and populates struct efx_rx_buffers for each one. Return a negative error 182 * code or 0 on success. If a single page can be split between two buffers, 183 * then the page will either be inserted fully, or not at at all. 184 */ 185 static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue) 186 { 187 struct efx_nic *efx = rx_queue->efx; 188 struct efx_rx_buffer *rx_buf; 189 struct page *page; 190 struct efx_rx_page_state *state; 191 dma_addr_t dma_addr; 192 unsigned index, count; 193 194 /* We can split a page between two buffers */ 195 BUILD_BUG_ON(EFX_RX_BATCH & 1); 196 197 for (count = 0; count < EFX_RX_BATCH; ++count) { 198 page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC, 199 efx->rx_buffer_order); 200 if (unlikely(page == NULL)) 201 return -ENOMEM; 202 dma_addr = dma_map_page(&efx->pci_dev->dev, page, 0, 203 efx_rx_buf_size(efx), 204 DMA_FROM_DEVICE); 205 if (unlikely(dma_mapping_error(&efx->pci_dev->dev, dma_addr))) { 206 __free_pages(page, efx->rx_buffer_order); 207 return -EIO; 208 } 209 state = page_address(page); 210 state->refcnt = 0; 211 state->dma_addr = dma_addr; 212 213 dma_addr += sizeof(struct efx_rx_page_state); 214 215 split: 216 index = rx_queue->added_count & rx_queue->ptr_mask; 217 rx_buf = efx_rx_buffer(rx_queue, index); 218 rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN; 219 rx_buf->u.page = page; 220 rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN; 221 rx_buf->flags = EFX_RX_BUF_PAGE; 222 ++rx_queue->added_count; 223 ++rx_queue->alloc_page_count; 224 ++state->refcnt; 225 226 if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) { 227 /* Use the second half of the page */ 228 get_page(page); 229 dma_addr += (PAGE_SIZE >> 1); 230 ++count; 231 goto split; 232 } 233 } 234 235 return 0; 236 } 237 238 static void efx_unmap_rx_buffer(struct efx_nic *efx, 239 struct efx_rx_buffer *rx_buf) 240 { 241 if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) { 242 struct efx_rx_page_state *state; 243 244 state = page_address(rx_buf->u.page); 245 if (--state->refcnt == 0) { 246 dma_unmap_page(&efx->pci_dev->dev, 247 state->dma_addr, 248 efx_rx_buf_size(efx), 249 DMA_FROM_DEVICE); 250 } 251 } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) { 252 dma_unmap_single(&efx->pci_dev->dev, rx_buf->dma_addr, 253 rx_buf->len, DMA_FROM_DEVICE); 254 } 255 } 256 257 static void efx_free_rx_buffer(struct efx_nic *efx, 258 struct efx_rx_buffer *rx_buf) 259 { 260 if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) { 261 __free_pages(rx_buf->u.page, efx->rx_buffer_order); 262 rx_buf->u.page = NULL; 263 } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) { 264 dev_kfree_skb_any(rx_buf->u.skb); 265 rx_buf->u.skb = NULL; 266 } 267 } 268 269 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue, 270 struct efx_rx_buffer *rx_buf) 271 { 272 efx_unmap_rx_buffer(rx_queue->efx, rx_buf); 273 efx_free_rx_buffer(rx_queue->efx, rx_buf); 274 } 275 276 /* Attempt to resurrect the other receive buffer that used to share this page, 277 * which had previously been passed up to the kernel and freed. */ 278 static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue, 279 struct efx_rx_buffer *rx_buf) 280 { 281 struct efx_rx_page_state *state = page_address(rx_buf->u.page); 282 struct efx_rx_buffer *new_buf; 283 unsigned fill_level, index; 284 285 /* +1 because efx_rx_packet() incremented removed_count. +1 because 286 * we'd like to insert an additional descriptor whilst leaving 287 * EFX_RXD_HEAD_ROOM for the non-recycle path */ 288 fill_level = (rx_queue->added_count - rx_queue->removed_count + 2); 289 if (unlikely(fill_level > rx_queue->max_fill)) { 290 /* We could place "state" on a list, and drain the list in 291 * efx_fast_push_rx_descriptors(). For now, this will do. */ 292 return; 293 } 294 295 ++state->refcnt; 296 get_page(rx_buf->u.page); 297 298 index = rx_queue->added_count & rx_queue->ptr_mask; 299 new_buf = efx_rx_buffer(rx_queue, index); 300 new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1); 301 new_buf->u.page = rx_buf->u.page; 302 new_buf->len = rx_buf->len; 303 new_buf->flags = EFX_RX_BUF_PAGE; 304 ++rx_queue->added_count; 305 } 306 307 /* Recycle the given rx buffer directly back into the rx_queue. There is 308 * always room to add this buffer, because we've just popped a buffer. */ 309 static void efx_recycle_rx_buffer(struct efx_channel *channel, 310 struct efx_rx_buffer *rx_buf) 311 { 312 struct efx_nic *efx = channel->efx; 313 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel); 314 struct efx_rx_buffer *new_buf; 315 unsigned index; 316 317 rx_buf->flags &= EFX_RX_BUF_PAGE; 318 319 if ((rx_buf->flags & EFX_RX_BUF_PAGE) && 320 efx->rx_buffer_len <= EFX_RX_HALF_PAGE && 321 page_count(rx_buf->u.page) == 1) 322 efx_resurrect_rx_buffer(rx_queue, rx_buf); 323 324 index = rx_queue->added_count & rx_queue->ptr_mask; 325 new_buf = efx_rx_buffer(rx_queue, index); 326 327 memcpy(new_buf, rx_buf, sizeof(*new_buf)); 328 rx_buf->u.page = NULL; 329 ++rx_queue->added_count; 330 } 331 332 /** 333 * efx_fast_push_rx_descriptors - push new RX descriptors quickly 334 * @rx_queue: RX descriptor queue 335 * 336 * This will aim to fill the RX descriptor queue up to 337 * @rx_queue->@max_fill. If there is insufficient atomic 338 * memory to do so, a slow fill will be scheduled. 339 * 340 * The caller must provide serialisation (none is used here). In practise, 341 * this means this function must run from the NAPI handler, or be called 342 * when NAPI is disabled. 343 */ 344 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue) 345 { 346 struct efx_channel *channel = efx_rx_queue_channel(rx_queue); 347 unsigned fill_level; 348 int space, rc = 0; 349 350 /* Calculate current fill level, and exit if we don't need to fill */ 351 fill_level = (rx_queue->added_count - rx_queue->removed_count); 352 EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries); 353 if (fill_level >= rx_queue->fast_fill_trigger) 354 goto out; 355 356 /* Record minimum fill level */ 357 if (unlikely(fill_level < rx_queue->min_fill)) { 358 if (fill_level) 359 rx_queue->min_fill = fill_level; 360 } 361 362 space = rx_queue->max_fill - fill_level; 363 EFX_BUG_ON_PARANOID(space < EFX_RX_BATCH); 364 365 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev, 366 "RX queue %d fast-filling descriptor ring from" 367 " level %d to level %d using %s allocation\n", 368 efx_rx_queue_index(rx_queue), fill_level, 369 rx_queue->max_fill, 370 channel->rx_alloc_push_pages ? "page" : "skb"); 371 372 do { 373 if (channel->rx_alloc_push_pages) 374 rc = efx_init_rx_buffers_page(rx_queue); 375 else 376 rc = efx_init_rx_buffers_skb(rx_queue); 377 if (unlikely(rc)) { 378 /* Ensure that we don't leave the rx queue empty */ 379 if (rx_queue->added_count == rx_queue->removed_count) 380 efx_schedule_slow_fill(rx_queue); 381 goto out; 382 } 383 } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH); 384 385 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev, 386 "RX queue %d fast-filled descriptor ring " 387 "to level %d\n", efx_rx_queue_index(rx_queue), 388 rx_queue->added_count - rx_queue->removed_count); 389 390 out: 391 if (rx_queue->notified_count != rx_queue->added_count) 392 efx_nic_notify_rx_desc(rx_queue); 393 } 394 395 void efx_rx_slow_fill(unsigned long context) 396 { 397 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context; 398 399 /* Post an event to cause NAPI to run and refill the queue */ 400 efx_nic_generate_fill_event(rx_queue); 401 ++rx_queue->slow_fill_count; 402 } 403 404 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, 405 struct efx_rx_buffer *rx_buf, 406 int len, bool *leak_packet) 407 { 408 struct efx_nic *efx = rx_queue->efx; 409 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding; 410 411 if (likely(len <= max_len)) 412 return; 413 414 /* The packet must be discarded, but this is only a fatal error 415 * if the caller indicated it was 416 */ 417 rx_buf->flags |= EFX_RX_PKT_DISCARD; 418 419 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) { 420 if (net_ratelimit()) 421 netif_err(efx, rx_err, efx->net_dev, 422 " RX queue %d seriously overlength " 423 "RX event (0x%x > 0x%x+0x%x). Leaking\n", 424 efx_rx_queue_index(rx_queue), len, max_len, 425 efx->type->rx_buffer_padding); 426 /* If this buffer was skb-allocated, then the meta 427 * data at the end of the skb will be trashed. So 428 * we have no choice but to leak the fragment. 429 */ 430 *leak_packet = !(rx_buf->flags & EFX_RX_BUF_PAGE); 431 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY); 432 } else { 433 if (net_ratelimit()) 434 netif_err(efx, rx_err, efx->net_dev, 435 " RX queue %d overlength RX event " 436 "(0x%x > 0x%x)\n", 437 efx_rx_queue_index(rx_queue), len, max_len); 438 } 439 440 efx_rx_queue_channel(rx_queue)->n_rx_overlength++; 441 } 442 443 /* Pass a received packet up through GRO. GRO can handle pages 444 * regardless of checksum state and skbs with a good checksum. 445 */ 446 static void efx_rx_packet_gro(struct efx_channel *channel, 447 struct efx_rx_buffer *rx_buf, 448 const u8 *eh) 449 { 450 struct napi_struct *napi = &channel->napi_str; 451 gro_result_t gro_result; 452 453 if (rx_buf->flags & EFX_RX_BUF_PAGE) { 454 struct efx_nic *efx = channel->efx; 455 struct page *page = rx_buf->u.page; 456 struct sk_buff *skb; 457 458 rx_buf->u.page = NULL; 459 460 skb = napi_get_frags(napi); 461 if (!skb) { 462 put_page(page); 463 return; 464 } 465 466 if (efx->net_dev->features & NETIF_F_RXHASH) 467 skb->rxhash = efx_rx_buf_hash(eh); 468 469 skb_fill_page_desc(skb, 0, page, 470 efx_rx_buf_offset(efx, rx_buf), rx_buf->len); 471 472 skb->len = rx_buf->len; 473 skb->data_len = rx_buf->len; 474 skb->truesize += rx_buf->len; 475 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ? 476 CHECKSUM_UNNECESSARY : CHECKSUM_NONE); 477 478 skb_record_rx_queue(skb, channel->rx_queue.core_index); 479 480 gro_result = napi_gro_frags(napi); 481 } else { 482 struct sk_buff *skb = rx_buf->u.skb; 483 484 EFX_BUG_ON_PARANOID(!(rx_buf->flags & EFX_RX_PKT_CSUMMED)); 485 rx_buf->u.skb = NULL; 486 skb->ip_summed = CHECKSUM_UNNECESSARY; 487 488 gro_result = napi_gro_receive(napi, skb); 489 } 490 491 if (gro_result == GRO_NORMAL) { 492 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB; 493 } else if (gro_result != GRO_DROP) { 494 channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO; 495 channel->irq_mod_score += 2; 496 } 497 } 498 499 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, 500 unsigned int len, u16 flags) 501 { 502 struct efx_nic *efx = rx_queue->efx; 503 struct efx_channel *channel = efx_rx_queue_channel(rx_queue); 504 struct efx_rx_buffer *rx_buf; 505 bool leak_packet = false; 506 507 rx_buf = efx_rx_buffer(rx_queue, index); 508 rx_buf->flags |= flags; 509 510 /* This allows the refill path to post another buffer. 511 * EFX_RXD_HEAD_ROOM ensures that the slot we are using 512 * isn't overwritten yet. 513 */ 514 rx_queue->removed_count++; 515 516 /* Validate the length encoded in the event vs the descriptor pushed */ 517 efx_rx_packet__check_len(rx_queue, rx_buf, len, &leak_packet); 518 519 netif_vdbg(efx, rx_status, efx->net_dev, 520 "RX queue %d received id %x at %llx+%x %s%s\n", 521 efx_rx_queue_index(rx_queue), index, 522 (unsigned long long)rx_buf->dma_addr, len, 523 (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "", 524 (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : ""); 525 526 /* Discard packet, if instructed to do so */ 527 if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) { 528 if (unlikely(leak_packet)) 529 channel->n_skbuff_leaks++; 530 else 531 efx_recycle_rx_buffer(channel, rx_buf); 532 533 /* Don't hold off the previous receive */ 534 rx_buf = NULL; 535 goto out; 536 } 537 538 /* Release card resources - assumes all RX buffers consumed in-order 539 * per RX queue 540 */ 541 efx_unmap_rx_buffer(efx, rx_buf); 542 543 /* Prefetch nice and early so data will (hopefully) be in cache by 544 * the time we look at it. 545 */ 546 prefetch(efx_rx_buf_eh(efx, rx_buf)); 547 548 /* Pipeline receives so that we give time for packet headers to be 549 * prefetched into cache. 550 */ 551 rx_buf->len = len - efx->type->rx_buffer_hash_size; 552 out: 553 if (channel->rx_pkt) 554 __efx_rx_packet(channel, channel->rx_pkt); 555 channel->rx_pkt = rx_buf; 556 } 557 558 static void efx_rx_deliver(struct efx_channel *channel, 559 struct efx_rx_buffer *rx_buf) 560 { 561 struct sk_buff *skb; 562 563 /* We now own the SKB */ 564 skb = rx_buf->u.skb; 565 rx_buf->u.skb = NULL; 566 567 /* Set the SKB flags */ 568 skb_checksum_none_assert(skb); 569 570 /* Record the rx_queue */ 571 skb_record_rx_queue(skb, channel->rx_queue.core_index); 572 573 /* Pass the packet up */ 574 if (channel->type->receive_skb) 575 channel->type->receive_skb(channel, skb); 576 else 577 netif_receive_skb(skb); 578 579 /* Update allocation strategy method */ 580 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB; 581 } 582 583 /* Handle a received packet. Second half: Touches packet payload. */ 584 void __efx_rx_packet(struct efx_channel *channel, struct efx_rx_buffer *rx_buf) 585 { 586 struct efx_nic *efx = channel->efx; 587 u8 *eh = efx_rx_buf_eh(efx, rx_buf); 588 589 /* If we're in loopback test, then pass the packet directly to the 590 * loopback layer, and free the rx_buf here 591 */ 592 if (unlikely(efx->loopback_selftest)) { 593 efx_loopback_rx_packet(efx, eh, rx_buf->len); 594 efx_free_rx_buffer(efx, rx_buf); 595 return; 596 } 597 598 if (!(rx_buf->flags & EFX_RX_BUF_PAGE)) { 599 struct sk_buff *skb = rx_buf->u.skb; 600 601 prefetch(skb_shinfo(skb)); 602 603 skb_reserve(skb, efx->type->rx_buffer_hash_size); 604 skb_put(skb, rx_buf->len); 605 606 if (efx->net_dev->features & NETIF_F_RXHASH) 607 skb->rxhash = efx_rx_buf_hash(eh); 608 609 /* Move past the ethernet header. rx_buf->data still points 610 * at the ethernet header */ 611 skb->protocol = eth_type_trans(skb, efx->net_dev); 612 613 skb_record_rx_queue(skb, channel->rx_queue.core_index); 614 } 615 616 if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM))) 617 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED; 618 619 if (likely(rx_buf->flags & (EFX_RX_BUF_PAGE | EFX_RX_PKT_CSUMMED)) && 620 !channel->type->receive_skb) 621 efx_rx_packet_gro(channel, rx_buf, eh); 622 else 623 efx_rx_deliver(channel, rx_buf); 624 } 625 626 void efx_rx_strategy(struct efx_channel *channel) 627 { 628 enum efx_rx_alloc_method method = rx_alloc_method; 629 630 if (channel->type->receive_skb) { 631 channel->rx_alloc_push_pages = false; 632 return; 633 } 634 635 /* Only makes sense to use page based allocation if GRO is enabled */ 636 if (!(channel->efx->net_dev->features & NETIF_F_GRO)) { 637 method = RX_ALLOC_METHOD_SKB; 638 } else if (method == RX_ALLOC_METHOD_AUTO) { 639 /* Constrain the rx_alloc_level */ 640 if (channel->rx_alloc_level < 0) 641 channel->rx_alloc_level = 0; 642 else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX) 643 channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX; 644 645 /* Decide on the allocation method */ 646 method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ? 647 RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB); 648 } 649 650 /* Push the option */ 651 channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE); 652 } 653 654 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue) 655 { 656 struct efx_nic *efx = rx_queue->efx; 657 unsigned int entries; 658 int rc; 659 660 /* Create the smallest power-of-two aligned ring */ 661 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE); 662 EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE); 663 rx_queue->ptr_mask = entries - 1; 664 665 netif_dbg(efx, probe, efx->net_dev, 666 "creating RX queue %d size %#x mask %#x\n", 667 efx_rx_queue_index(rx_queue), efx->rxq_entries, 668 rx_queue->ptr_mask); 669 670 /* Allocate RX buffers */ 671 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer), 672 GFP_KERNEL); 673 if (!rx_queue->buffer) 674 return -ENOMEM; 675 676 rc = efx_nic_probe_rx(rx_queue); 677 if (rc) { 678 kfree(rx_queue->buffer); 679 rx_queue->buffer = NULL; 680 } 681 return rc; 682 } 683 684 void efx_init_rx_queue(struct efx_rx_queue *rx_queue) 685 { 686 struct efx_nic *efx = rx_queue->efx; 687 unsigned int max_fill, trigger, max_trigger; 688 689 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev, 690 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue)); 691 692 /* Initialise ptr fields */ 693 rx_queue->added_count = 0; 694 rx_queue->notified_count = 0; 695 rx_queue->removed_count = 0; 696 rx_queue->min_fill = -1U; 697 698 /* Initialise limit fields */ 699 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM; 700 max_trigger = max_fill - EFX_RX_BATCH; 701 if (rx_refill_threshold != 0) { 702 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U; 703 if (trigger > max_trigger) 704 trigger = max_trigger; 705 } else { 706 trigger = max_trigger; 707 } 708 709 rx_queue->max_fill = max_fill; 710 rx_queue->fast_fill_trigger = trigger; 711 712 /* Set up RX descriptor ring */ 713 rx_queue->enabled = true; 714 efx_nic_init_rx(rx_queue); 715 } 716 717 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue) 718 { 719 int i; 720 struct efx_rx_buffer *rx_buf; 721 722 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev, 723 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue)); 724 725 /* A flush failure might have left rx_queue->enabled */ 726 rx_queue->enabled = false; 727 728 del_timer_sync(&rx_queue->slow_fill); 729 efx_nic_fini_rx(rx_queue); 730 731 /* Release RX buffers NB start at index 0 not current HW ptr */ 732 if (rx_queue->buffer) { 733 for (i = 0; i <= rx_queue->ptr_mask; i++) { 734 rx_buf = efx_rx_buffer(rx_queue, i); 735 efx_fini_rx_buffer(rx_queue, rx_buf); 736 } 737 } 738 } 739 740 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue) 741 { 742 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev, 743 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue)); 744 745 efx_nic_remove_rx(rx_queue); 746 747 kfree(rx_queue->buffer); 748 rx_queue->buffer = NULL; 749 } 750 751 752 module_param(rx_alloc_method, int, 0644); 753 MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers"); 754 755 module_param(rx_refill_threshold, uint, 0444); 756 MODULE_PARM_DESC(rx_refill_threshold, 757 "RX descriptor ring refill threshold (%)"); 758 759