1 /**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2011-2013 Solarflare Communications Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 as published 7 * by the Free Software Foundation, incorporated herein by reference. 8 */ 9 10 /* Theory of operation: 11 * 12 * PTP support is assisted by firmware running on the MC, which provides 13 * the hardware timestamping capabilities. Both transmitted and received 14 * PTP event packets are queued onto internal queues for subsequent processing; 15 * this is because the MC operations are relatively long and would block 16 * block NAPI/interrupt operation. 17 * 18 * Receive event processing: 19 * The event contains the packet's UUID and sequence number, together 20 * with the hardware timestamp. The PTP receive packet queue is searched 21 * for this UUID/sequence number and, if found, put on a pending queue. 22 * Packets not matching are delivered without timestamps (MCDI events will 23 * always arrive after the actual packet). 24 * It is important for the operation of the PTP protocol that the ordering 25 * of packets between the event and general port is maintained. 26 * 27 * Work queue processing: 28 * If work waiting, synchronise host/hardware time 29 * 30 * Transmit: send packet through MC, which returns the transmission time 31 * that is converted to an appropriate timestamp. 32 * 33 * Receive: the packet's reception time is converted to an appropriate 34 * timestamp. 35 */ 36 #include <linux/ip.h> 37 #include <linux/udp.h> 38 #include <linux/time.h> 39 #include <linux/ktime.h> 40 #include <linux/module.h> 41 #include <linux/net_tstamp.h> 42 #include <linux/pps_kernel.h> 43 #include <linux/ptp_clock_kernel.h> 44 #include "net_driver.h" 45 #include "efx.h" 46 #include "mcdi.h" 47 #include "mcdi_pcol.h" 48 #include "io.h" 49 #include "farch_regs.h" 50 #include "nic.h" 51 52 /* Maximum number of events expected to make up a PTP event */ 53 #define MAX_EVENT_FRAGS 3 54 55 /* Maximum delay, ms, to begin synchronisation */ 56 #define MAX_SYNCHRONISE_WAIT_MS 2 57 58 /* How long, at most, to spend synchronising */ 59 #define SYNCHRONISE_PERIOD_NS 250000 60 61 /* How often to update the shared memory time */ 62 #define SYNCHRONISATION_GRANULARITY_NS 200 63 64 /* Minimum permitted length of a (corrected) synchronisation time */ 65 #define MIN_SYNCHRONISATION_NS 120 66 67 /* Maximum permitted length of a (corrected) synchronisation time */ 68 #define MAX_SYNCHRONISATION_NS 1000 69 70 /* How many (MC) receive events that can be queued */ 71 #define MAX_RECEIVE_EVENTS 8 72 73 /* Length of (modified) moving average. */ 74 #define AVERAGE_LENGTH 16 75 76 /* How long an unmatched event or packet can be held */ 77 #define PKT_EVENT_LIFETIME_MS 10 78 79 /* Offsets into PTP packet for identification. These offsets are from the 80 * start of the IP header, not the MAC header. Note that neither PTP V1 nor 81 * PTP V2 permit the use of IPV4 options. 82 */ 83 #define PTP_DPORT_OFFSET 22 84 85 #define PTP_V1_VERSION_LENGTH 2 86 #define PTP_V1_VERSION_OFFSET 28 87 88 #define PTP_V1_UUID_LENGTH 6 89 #define PTP_V1_UUID_OFFSET 50 90 91 #define PTP_V1_SEQUENCE_LENGTH 2 92 #define PTP_V1_SEQUENCE_OFFSET 58 93 94 /* The minimum length of a PTP V1 packet for offsets, etc. to be valid: 95 * includes IP header. 96 */ 97 #define PTP_V1_MIN_LENGTH 64 98 99 #define PTP_V2_VERSION_LENGTH 1 100 #define PTP_V2_VERSION_OFFSET 29 101 102 #define PTP_V2_UUID_LENGTH 8 103 #define PTP_V2_UUID_OFFSET 48 104 105 /* Although PTP V2 UUIDs are comprised a ClockIdentity (8) and PortNumber (2), 106 * the MC only captures the last six bytes of the clock identity. These values 107 * reflect those, not the ones used in the standard. The standard permits 108 * mapping of V1 UUIDs to V2 UUIDs with these same values. 109 */ 110 #define PTP_V2_MC_UUID_LENGTH 6 111 #define PTP_V2_MC_UUID_OFFSET 50 112 113 #define PTP_V2_SEQUENCE_LENGTH 2 114 #define PTP_V2_SEQUENCE_OFFSET 58 115 116 /* The minimum length of a PTP V2 packet for offsets, etc. to be valid: 117 * includes IP header. 118 */ 119 #define PTP_V2_MIN_LENGTH 63 120 121 #define PTP_MIN_LENGTH 63 122 123 #define PTP_ADDRESS 0xe0000181 /* 224.0.1.129 */ 124 #define PTP_EVENT_PORT 319 125 #define PTP_GENERAL_PORT 320 126 127 /* Annoyingly the format of the version numbers are different between 128 * versions 1 and 2 so it isn't possible to simply look for 1 or 2. 129 */ 130 #define PTP_VERSION_V1 1 131 132 #define PTP_VERSION_V2 2 133 #define PTP_VERSION_V2_MASK 0x0f 134 135 enum ptp_packet_state { 136 PTP_PACKET_STATE_UNMATCHED = 0, 137 PTP_PACKET_STATE_MATCHED, 138 PTP_PACKET_STATE_TIMED_OUT, 139 PTP_PACKET_STATE_MATCH_UNWANTED 140 }; 141 142 /* NIC synchronised with single word of time only comprising 143 * partial seconds and full nanoseconds: 10^9 ~ 2^30 so 2 bits for seconds. 144 */ 145 #define MC_NANOSECOND_BITS 30 146 #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1) 147 #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1) 148 149 /* Maximum parts-per-billion adjustment that is acceptable */ 150 #define MAX_PPB 1000000 151 152 /* Number of bits required to hold the above */ 153 #define MAX_PPB_BITS 20 154 155 /* Number of extra bits allowed when calculating fractional ns. 156 * EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should 157 * be less than 63. 158 */ 159 #define PPB_EXTRA_BITS 2 160 161 /* Precalculate scale word to avoid long long division at runtime */ 162 #define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\ 163 MAX_PPB_BITS)) / 1000000000LL) 164 165 #define PTP_SYNC_ATTEMPTS 4 166 167 /** 168 * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area. 169 * @words: UUID and (partial) sequence number 170 * @expiry: Time after which the packet should be delivered irrespective of 171 * event arrival. 172 * @state: The state of the packet - whether it is ready for processing or 173 * whether that is of no interest. 174 */ 175 struct efx_ptp_match { 176 u32 words[DIV_ROUND_UP(PTP_V1_UUID_LENGTH, 4)]; 177 unsigned long expiry; 178 enum ptp_packet_state state; 179 }; 180 181 /** 182 * struct efx_ptp_event_rx - A PTP receive event (from MC) 183 * @seq0: First part of (PTP) UUID 184 * @seq1: Second part of (PTP) UUID and sequence number 185 * @hwtimestamp: Event timestamp 186 */ 187 struct efx_ptp_event_rx { 188 struct list_head link; 189 u32 seq0; 190 u32 seq1; 191 ktime_t hwtimestamp; 192 unsigned long expiry; 193 }; 194 195 /** 196 * struct efx_ptp_timeset - Synchronisation between host and MC 197 * @host_start: Host time immediately before hardware timestamp taken 198 * @seconds: Hardware timestamp, seconds 199 * @nanoseconds: Hardware timestamp, nanoseconds 200 * @host_end: Host time immediately after hardware timestamp taken 201 * @waitns: Number of nanoseconds between hardware timestamp being read and 202 * host end time being seen 203 * @window: Difference of host_end and host_start 204 * @valid: Whether this timeset is valid 205 */ 206 struct efx_ptp_timeset { 207 u32 host_start; 208 u32 seconds; 209 u32 nanoseconds; 210 u32 host_end; 211 u32 waitns; 212 u32 window; /* Derived: end - start, allowing for wrap */ 213 }; 214 215 /** 216 * struct efx_ptp_data - Precision Time Protocol (PTP) state 217 * @channel: The PTP channel 218 * @rxq: Receive queue (awaiting timestamps) 219 * @txq: Transmit queue 220 * @evt_list: List of MC receive events awaiting packets 221 * @evt_free_list: List of free events 222 * @evt_lock: Lock for manipulating evt_list and evt_free_list 223 * @rx_evts: Instantiated events (on evt_list and evt_free_list) 224 * @workwq: Work queue for processing pending PTP operations 225 * @work: Work task 226 * @reset_required: A serious error has occurred and the PTP task needs to be 227 * reset (disable, enable). 228 * @rxfilter_event: Receive filter when operating 229 * @rxfilter_general: Receive filter when operating 230 * @config: Current timestamp configuration 231 * @enabled: PTP operation enabled 232 * @mode: Mode in which PTP operating (PTP version) 233 * @evt_frags: Partly assembled PTP events 234 * @evt_frag_idx: Current fragment number 235 * @evt_code: Last event code 236 * @start: Address at which MC indicates ready for synchronisation 237 * @host_time_pps: Host time at last PPS 238 * @last_sync_ns: Last number of nanoseconds between readings when synchronising 239 * @base_sync_ns: Number of nanoseconds for last synchronisation. 240 * @base_sync_valid: Whether base_sync_time is valid. 241 * @current_adjfreq: Current ppb adjustment. 242 * @phc_clock: Pointer to registered phc device 243 * @phc_clock_info: Registration structure for phc device 244 * @pps_work: pps work task for handling pps events 245 * @pps_workwq: pps work queue 246 * @nic_ts_enabled: Flag indicating if NIC generated TS events are handled 247 * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids 248 * allocations in main data path). 249 * @debug_ptp_dir: PTP debugfs directory 250 * @missed_rx_sync: Number of packets received without syncrhonisation. 251 * @good_syncs: Number of successful synchronisations. 252 * @no_time_syncs: Number of synchronisations with no good times. 253 * @bad_sync_durations: Number of synchronisations with bad durations. 254 * @bad_syncs: Number of failed synchronisations. 255 * @last_sync_time: Number of nanoseconds for last synchronisation. 256 * @sync_timeouts: Number of synchronisation timeouts 257 * @fast_syncs: Number of synchronisations requiring short delay 258 * @min_sync_delta: Minimum time between event and synchronisation 259 * @max_sync_delta: Maximum time between event and synchronisation 260 * @average_sync_delta: Average time between event and synchronisation. 261 * Modified moving average. 262 * @last_sync_delta: Last time between event and synchronisation 263 * @mc_stats: Context value for MC statistics 264 * @timeset: Last set of synchronisation statistics. 265 */ 266 struct efx_ptp_data { 267 struct efx_channel *channel; 268 struct sk_buff_head rxq; 269 struct sk_buff_head txq; 270 struct list_head evt_list; 271 struct list_head evt_free_list; 272 spinlock_t evt_lock; 273 struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS]; 274 struct workqueue_struct *workwq; 275 struct work_struct work; 276 bool reset_required; 277 u32 rxfilter_event; 278 u32 rxfilter_general; 279 bool rxfilter_installed; 280 struct hwtstamp_config config; 281 bool enabled; 282 unsigned int mode; 283 efx_qword_t evt_frags[MAX_EVENT_FRAGS]; 284 int evt_frag_idx; 285 int evt_code; 286 struct efx_buffer start; 287 struct pps_event_time host_time_pps; 288 unsigned last_sync_ns; 289 unsigned base_sync_ns; 290 bool base_sync_valid; 291 s64 current_adjfreq; 292 struct ptp_clock *phc_clock; 293 struct ptp_clock_info phc_clock_info; 294 struct work_struct pps_work; 295 struct workqueue_struct *pps_workwq; 296 bool nic_ts_enabled; 297 MCDI_DECLARE_BUF(txbuf, MC_CMD_PTP_IN_TRANSMIT_LENMAX); 298 struct efx_ptp_timeset 299 timeset[MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM]; 300 }; 301 302 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); 303 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); 304 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts); 305 static int efx_phc_settime(struct ptp_clock_info *ptp, 306 const struct timespec *e_ts); 307 static int efx_phc_enable(struct ptp_clock_info *ptp, 308 struct ptp_clock_request *request, int on); 309 310 /* Enable MCDI PTP support. */ 311 static int efx_ptp_enable(struct efx_nic *efx) 312 { 313 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ENABLE_LEN); 314 315 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ENABLE); 316 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 317 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_QUEUE, 318 efx->ptp_data->channel->channel); 319 MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_MODE, efx->ptp_data->mode); 320 321 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 322 NULL, 0, NULL); 323 } 324 325 /* Disable MCDI PTP support. 326 * 327 * Note that this function should never rely on the presence of ptp_data - 328 * may be called before that exists. 329 */ 330 static int efx_ptp_disable(struct efx_nic *efx) 331 { 332 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_DISABLE_LEN); 333 334 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_DISABLE); 335 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 336 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 337 NULL, 0, NULL); 338 } 339 340 static void efx_ptp_deliver_rx_queue(struct sk_buff_head *q) 341 { 342 struct sk_buff *skb; 343 344 while ((skb = skb_dequeue(q))) { 345 local_bh_disable(); 346 netif_receive_skb(skb); 347 local_bh_enable(); 348 } 349 } 350 351 static void efx_ptp_handle_no_channel(struct efx_nic *efx) 352 { 353 netif_err(efx, drv, efx->net_dev, 354 "ERROR: PTP requires MSI-X and 1 additional interrupt" 355 "vector. PTP disabled\n"); 356 } 357 358 /* Repeatedly send the host time to the MC which will capture the hardware 359 * time. 360 */ 361 static void efx_ptp_send_times(struct efx_nic *efx, 362 struct pps_event_time *last_time) 363 { 364 struct pps_event_time now; 365 struct timespec limit; 366 struct efx_ptp_data *ptp = efx->ptp_data; 367 struct timespec start; 368 int *mc_running = ptp->start.addr; 369 370 pps_get_ts(&now); 371 start = now.ts_real; 372 limit = now.ts_real; 373 timespec_add_ns(&limit, SYNCHRONISE_PERIOD_NS); 374 375 /* Write host time for specified period or until MC is done */ 376 while ((timespec_compare(&now.ts_real, &limit) < 0) && 377 ACCESS_ONCE(*mc_running)) { 378 struct timespec update_time; 379 unsigned int host_time; 380 381 /* Don't update continuously to avoid saturating the PCIe bus */ 382 update_time = now.ts_real; 383 timespec_add_ns(&update_time, SYNCHRONISATION_GRANULARITY_NS); 384 do { 385 pps_get_ts(&now); 386 } while ((timespec_compare(&now.ts_real, &update_time) < 0) && 387 ACCESS_ONCE(*mc_running)); 388 389 /* Synchronise NIC with single word of time only */ 390 host_time = (now.ts_real.tv_sec << MC_NANOSECOND_BITS | 391 now.ts_real.tv_nsec); 392 /* Update host time in NIC memory */ 393 efx->type->ptp_write_host_time(efx, host_time); 394 } 395 *last_time = now; 396 } 397 398 /* Read a timeset from the MC's results and partial process. */ 399 static void efx_ptp_read_timeset(MCDI_DECLARE_STRUCT_PTR(data), 400 struct efx_ptp_timeset *timeset) 401 { 402 unsigned start_ns, end_ns; 403 404 timeset->host_start = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTSTART); 405 timeset->seconds = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_SECONDS); 406 timeset->nanoseconds = MCDI_DWORD(data, 407 PTP_OUT_SYNCHRONIZE_NANOSECONDS); 408 timeset->host_end = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTEND), 409 timeset->waitns = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_WAITNS); 410 411 /* Ignore seconds */ 412 start_ns = timeset->host_start & MC_NANOSECOND_MASK; 413 end_ns = timeset->host_end & MC_NANOSECOND_MASK; 414 /* Allow for rollover */ 415 if (end_ns < start_ns) 416 end_ns += NSEC_PER_SEC; 417 /* Determine duration of operation */ 418 timeset->window = end_ns - start_ns; 419 } 420 421 /* Process times received from MC. 422 * 423 * Extract times from returned results, and establish the minimum value 424 * seen. The minimum value represents the "best" possible time and events 425 * too much greater than this are rejected - the machine is, perhaps, too 426 * busy. A number of readings are taken so that, hopefully, at least one good 427 * synchronisation will be seen in the results. 428 */ 429 static int 430 efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf), 431 size_t response_length, 432 const struct pps_event_time *last_time) 433 { 434 unsigned number_readings = 435 MCDI_VAR_ARRAY_LEN(response_length, 436 PTP_OUT_SYNCHRONIZE_TIMESET); 437 unsigned i; 438 unsigned total; 439 unsigned ngood = 0; 440 unsigned last_good = 0; 441 struct efx_ptp_data *ptp = efx->ptp_data; 442 u32 last_sec; 443 u32 start_sec; 444 struct timespec delta; 445 446 if (number_readings == 0) 447 return -EAGAIN; 448 449 /* Read the set of results and increment stats for any results that 450 * appera to be erroneous. 451 */ 452 for (i = 0; i < number_readings; i++) { 453 efx_ptp_read_timeset( 454 MCDI_ARRAY_STRUCT_PTR(synch_buf, 455 PTP_OUT_SYNCHRONIZE_TIMESET, i), 456 &ptp->timeset[i]); 457 } 458 459 /* Find the last good host-MC synchronization result. The MC times 460 * when it finishes reading the host time so the corrected window time 461 * should be fairly constant for a given platform. 462 */ 463 total = 0; 464 for (i = 0; i < number_readings; i++) 465 if (ptp->timeset[i].window > ptp->timeset[i].waitns) { 466 unsigned win; 467 468 win = ptp->timeset[i].window - ptp->timeset[i].waitns; 469 if (win >= MIN_SYNCHRONISATION_NS && 470 win < MAX_SYNCHRONISATION_NS) { 471 total += ptp->timeset[i].window; 472 ngood++; 473 last_good = i; 474 } 475 } 476 477 if (ngood == 0) { 478 netif_warn(efx, drv, efx->net_dev, 479 "PTP no suitable synchronisations %dns\n", 480 ptp->base_sync_ns); 481 return -EAGAIN; 482 } 483 484 /* Average minimum this synchronisation */ 485 ptp->last_sync_ns = DIV_ROUND_UP(total, ngood); 486 if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) { 487 ptp->base_sync_valid = true; 488 ptp->base_sync_ns = ptp->last_sync_ns; 489 } 490 491 /* Calculate delay from actual PPS to last_time */ 492 delta.tv_nsec = 493 ptp->timeset[last_good].nanoseconds + 494 last_time->ts_real.tv_nsec - 495 (ptp->timeset[last_good].host_start & MC_NANOSECOND_MASK); 496 497 /* It is possible that the seconds rolled over between taking 498 * the start reading and the last value written by the host. The 499 * timescales are such that a gap of more than one second is never 500 * expected. 501 */ 502 start_sec = ptp->timeset[last_good].host_start >> MC_NANOSECOND_BITS; 503 last_sec = last_time->ts_real.tv_sec & MC_SECOND_MASK; 504 if (start_sec != last_sec) { 505 if (((start_sec + 1) & MC_SECOND_MASK) != last_sec) { 506 netif_warn(efx, hw, efx->net_dev, 507 "PTP bad synchronisation seconds\n"); 508 return -EAGAIN; 509 } else { 510 delta.tv_sec = 1; 511 } 512 } else { 513 delta.tv_sec = 0; 514 } 515 516 ptp->host_time_pps = *last_time; 517 pps_sub_ts(&ptp->host_time_pps, delta); 518 519 return 0; 520 } 521 522 /* Synchronize times between the host and the MC */ 523 static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings) 524 { 525 struct efx_ptp_data *ptp = efx->ptp_data; 526 MCDI_DECLARE_BUF(synch_buf, MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX); 527 size_t response_length; 528 int rc; 529 unsigned long timeout; 530 struct pps_event_time last_time = {}; 531 unsigned int loops = 0; 532 int *start = ptp->start.addr; 533 534 MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE); 535 MCDI_SET_DWORD(synch_buf, PTP_IN_PERIPH_ID, 0); 536 MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS, 537 num_readings); 538 MCDI_SET_QWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR, 539 ptp->start.dma_addr); 540 541 /* Clear flag that signals MC ready */ 542 ACCESS_ONCE(*start) = 0; 543 rc = efx_mcdi_rpc_start(efx, MC_CMD_PTP, synch_buf, 544 MC_CMD_PTP_IN_SYNCHRONIZE_LEN); 545 EFX_BUG_ON_PARANOID(rc); 546 547 /* Wait for start from MCDI (or timeout) */ 548 timeout = jiffies + msecs_to_jiffies(MAX_SYNCHRONISE_WAIT_MS); 549 while (!ACCESS_ONCE(*start) && (time_before(jiffies, timeout))) { 550 udelay(20); /* Usually start MCDI execution quickly */ 551 loops++; 552 } 553 554 if (ACCESS_ONCE(*start)) 555 efx_ptp_send_times(efx, &last_time); 556 557 /* Collect results */ 558 rc = efx_mcdi_rpc_finish(efx, MC_CMD_PTP, 559 MC_CMD_PTP_IN_SYNCHRONIZE_LEN, 560 synch_buf, sizeof(synch_buf), 561 &response_length); 562 if (rc == 0) 563 rc = efx_ptp_process_times(efx, synch_buf, response_length, 564 &last_time); 565 566 return rc; 567 } 568 569 /* Transmit a PTP packet, via the MCDI interface, to the wire. */ 570 static int efx_ptp_xmit_skb(struct efx_nic *efx, struct sk_buff *skb) 571 { 572 struct efx_ptp_data *ptp_data = efx->ptp_data; 573 struct skb_shared_hwtstamps timestamps; 574 int rc = -EIO; 575 MCDI_DECLARE_BUF(txtime, MC_CMD_PTP_OUT_TRANSMIT_LEN); 576 size_t len; 577 578 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_OP, MC_CMD_PTP_OP_TRANSMIT); 579 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_PERIPH_ID, 0); 580 MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_TRANSMIT_LENGTH, skb->len); 581 if (skb_shinfo(skb)->nr_frags != 0) { 582 rc = skb_linearize(skb); 583 if (rc != 0) 584 goto fail; 585 } 586 587 if (skb->ip_summed == CHECKSUM_PARTIAL) { 588 rc = skb_checksum_help(skb); 589 if (rc != 0) 590 goto fail; 591 } 592 skb_copy_from_linear_data(skb, 593 MCDI_PTR(ptp_data->txbuf, 594 PTP_IN_TRANSMIT_PACKET), 595 skb->len); 596 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, 597 ptp_data->txbuf, MC_CMD_PTP_IN_TRANSMIT_LEN(skb->len), 598 txtime, sizeof(txtime), &len); 599 if (rc != 0) 600 goto fail; 601 602 memset(×tamps, 0, sizeof(timestamps)); 603 timestamps.hwtstamp = ktime_set( 604 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_SECONDS), 605 MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_NANOSECONDS)); 606 607 skb_tstamp_tx(skb, ×tamps); 608 609 rc = 0; 610 611 fail: 612 dev_kfree_skb(skb); 613 614 return rc; 615 } 616 617 static void efx_ptp_drop_time_expired_events(struct efx_nic *efx) 618 { 619 struct efx_ptp_data *ptp = efx->ptp_data; 620 struct list_head *cursor; 621 struct list_head *next; 622 623 /* Drop time-expired events */ 624 spin_lock_bh(&ptp->evt_lock); 625 if (!list_empty(&ptp->evt_list)) { 626 list_for_each_safe(cursor, next, &ptp->evt_list) { 627 struct efx_ptp_event_rx *evt; 628 629 evt = list_entry(cursor, struct efx_ptp_event_rx, 630 link); 631 if (time_after(jiffies, evt->expiry)) { 632 list_move(&evt->link, &ptp->evt_free_list); 633 netif_warn(efx, hw, efx->net_dev, 634 "PTP rx event dropped\n"); 635 } 636 } 637 } 638 spin_unlock_bh(&ptp->evt_lock); 639 } 640 641 static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx, 642 struct sk_buff *skb) 643 { 644 struct efx_ptp_data *ptp = efx->ptp_data; 645 bool evts_waiting; 646 struct list_head *cursor; 647 struct list_head *next; 648 struct efx_ptp_match *match; 649 enum ptp_packet_state rc = PTP_PACKET_STATE_UNMATCHED; 650 651 spin_lock_bh(&ptp->evt_lock); 652 evts_waiting = !list_empty(&ptp->evt_list); 653 spin_unlock_bh(&ptp->evt_lock); 654 655 if (!evts_waiting) 656 return PTP_PACKET_STATE_UNMATCHED; 657 658 match = (struct efx_ptp_match *)skb->cb; 659 /* Look for a matching timestamp in the event queue */ 660 spin_lock_bh(&ptp->evt_lock); 661 list_for_each_safe(cursor, next, &ptp->evt_list) { 662 struct efx_ptp_event_rx *evt; 663 664 evt = list_entry(cursor, struct efx_ptp_event_rx, link); 665 if ((evt->seq0 == match->words[0]) && 666 (evt->seq1 == match->words[1])) { 667 struct skb_shared_hwtstamps *timestamps; 668 669 /* Match - add in hardware timestamp */ 670 timestamps = skb_hwtstamps(skb); 671 timestamps->hwtstamp = evt->hwtimestamp; 672 673 match->state = PTP_PACKET_STATE_MATCHED; 674 rc = PTP_PACKET_STATE_MATCHED; 675 list_move(&evt->link, &ptp->evt_free_list); 676 break; 677 } 678 } 679 spin_unlock_bh(&ptp->evt_lock); 680 681 return rc; 682 } 683 684 /* Process any queued receive events and corresponding packets 685 * 686 * q is returned with all the packets that are ready for delivery. 687 * true is returned if at least one of those packets requires 688 * synchronisation. 689 */ 690 static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q) 691 { 692 struct efx_ptp_data *ptp = efx->ptp_data; 693 bool rc = false; 694 struct sk_buff *skb; 695 696 while ((skb = skb_dequeue(&ptp->rxq))) { 697 struct efx_ptp_match *match; 698 699 match = (struct efx_ptp_match *)skb->cb; 700 if (match->state == PTP_PACKET_STATE_MATCH_UNWANTED) { 701 __skb_queue_tail(q, skb); 702 } else if (efx_ptp_match_rx(efx, skb) == 703 PTP_PACKET_STATE_MATCHED) { 704 rc = true; 705 __skb_queue_tail(q, skb); 706 } else if (time_after(jiffies, match->expiry)) { 707 match->state = PTP_PACKET_STATE_TIMED_OUT; 708 netif_warn(efx, rx_err, efx->net_dev, 709 "PTP packet - no timestamp seen\n"); 710 __skb_queue_tail(q, skb); 711 } else { 712 /* Replace unprocessed entry and stop */ 713 skb_queue_head(&ptp->rxq, skb); 714 break; 715 } 716 } 717 718 return rc; 719 } 720 721 /* Complete processing of a received packet */ 722 static inline void efx_ptp_process_rx(struct efx_nic *efx, struct sk_buff *skb) 723 { 724 local_bh_disable(); 725 netif_receive_skb(skb); 726 local_bh_enable(); 727 } 728 729 static int efx_ptp_start(struct efx_nic *efx) 730 { 731 struct efx_ptp_data *ptp = efx->ptp_data; 732 struct efx_filter_spec rxfilter; 733 int rc; 734 735 ptp->reset_required = false; 736 737 /* Must filter on both event and general ports to ensure 738 * that there is no packet re-ordering. 739 */ 740 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0, 741 efx_rx_queue_index( 742 efx_channel_get_rx_queue(ptp->channel))); 743 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP, 744 htonl(PTP_ADDRESS), 745 htons(PTP_EVENT_PORT)); 746 if (rc != 0) 747 return rc; 748 749 rc = efx_filter_insert_filter(efx, &rxfilter, true); 750 if (rc < 0) 751 return rc; 752 ptp->rxfilter_event = rc; 753 754 efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0, 755 efx_rx_queue_index( 756 efx_channel_get_rx_queue(ptp->channel))); 757 rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP, 758 htonl(PTP_ADDRESS), 759 htons(PTP_GENERAL_PORT)); 760 if (rc != 0) 761 goto fail; 762 763 rc = efx_filter_insert_filter(efx, &rxfilter, true); 764 if (rc < 0) 765 goto fail; 766 ptp->rxfilter_general = rc; 767 768 rc = efx_ptp_enable(efx); 769 if (rc != 0) 770 goto fail2; 771 772 ptp->evt_frag_idx = 0; 773 ptp->current_adjfreq = 0; 774 ptp->rxfilter_installed = true; 775 776 return 0; 777 778 fail2: 779 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 780 ptp->rxfilter_general); 781 fail: 782 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 783 ptp->rxfilter_event); 784 785 return rc; 786 } 787 788 static int efx_ptp_stop(struct efx_nic *efx) 789 { 790 struct efx_ptp_data *ptp = efx->ptp_data; 791 int rc = efx_ptp_disable(efx); 792 struct list_head *cursor; 793 struct list_head *next; 794 795 if (ptp->rxfilter_installed) { 796 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 797 ptp->rxfilter_general); 798 efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, 799 ptp->rxfilter_event); 800 ptp->rxfilter_installed = false; 801 } 802 803 /* Make sure RX packets are really delivered */ 804 efx_ptp_deliver_rx_queue(&efx->ptp_data->rxq); 805 skb_queue_purge(&efx->ptp_data->txq); 806 807 /* Drop any pending receive events */ 808 spin_lock_bh(&efx->ptp_data->evt_lock); 809 list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) { 810 list_move(cursor, &efx->ptp_data->evt_free_list); 811 } 812 spin_unlock_bh(&efx->ptp_data->evt_lock); 813 814 return rc; 815 } 816 817 static void efx_ptp_pps_worker(struct work_struct *work) 818 { 819 struct efx_ptp_data *ptp = 820 container_of(work, struct efx_ptp_data, pps_work); 821 struct efx_nic *efx = ptp->channel->efx; 822 struct ptp_clock_event ptp_evt; 823 824 if (efx_ptp_synchronize(efx, PTP_SYNC_ATTEMPTS)) 825 return; 826 827 ptp_evt.type = PTP_CLOCK_PPSUSR; 828 ptp_evt.pps_times = ptp->host_time_pps; 829 ptp_clock_event(ptp->phc_clock, &ptp_evt); 830 } 831 832 /* Process any pending transmissions and timestamp any received packets. 833 */ 834 static void efx_ptp_worker(struct work_struct *work) 835 { 836 struct efx_ptp_data *ptp_data = 837 container_of(work, struct efx_ptp_data, work); 838 struct efx_nic *efx = ptp_data->channel->efx; 839 struct sk_buff *skb; 840 struct sk_buff_head tempq; 841 842 if (ptp_data->reset_required) { 843 efx_ptp_stop(efx); 844 efx_ptp_start(efx); 845 return; 846 } 847 848 efx_ptp_drop_time_expired_events(efx); 849 850 __skb_queue_head_init(&tempq); 851 if (efx_ptp_process_events(efx, &tempq) || 852 !skb_queue_empty(&ptp_data->txq)) { 853 854 while ((skb = skb_dequeue(&ptp_data->txq))) 855 efx_ptp_xmit_skb(efx, skb); 856 } 857 858 while ((skb = __skb_dequeue(&tempq))) 859 efx_ptp_process_rx(efx, skb); 860 } 861 862 /* Initialise PTP channel and state. 863 * 864 * Setting core_index to zero causes the queue to be initialised and doesn't 865 * overlap with 'rxq0' because ptp.c doesn't use skb_record_rx_queue. 866 */ 867 static int efx_ptp_probe_channel(struct efx_channel *channel) 868 { 869 struct efx_nic *efx = channel->efx; 870 struct efx_ptp_data *ptp; 871 int rc = 0; 872 unsigned int pos; 873 874 channel->irq_moderation = 0; 875 channel->rx_queue.core_index = 0; 876 877 ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL); 878 efx->ptp_data = ptp; 879 if (!efx->ptp_data) 880 return -ENOMEM; 881 882 rc = efx_nic_alloc_buffer(efx, &ptp->start, sizeof(int), GFP_KERNEL); 883 if (rc != 0) 884 goto fail1; 885 886 ptp->channel = channel; 887 skb_queue_head_init(&ptp->rxq); 888 skb_queue_head_init(&ptp->txq); 889 ptp->workwq = create_singlethread_workqueue("sfc_ptp"); 890 if (!ptp->workwq) { 891 rc = -ENOMEM; 892 goto fail2; 893 } 894 895 INIT_WORK(&ptp->work, efx_ptp_worker); 896 ptp->config.flags = 0; 897 ptp->config.tx_type = HWTSTAMP_TX_OFF; 898 ptp->config.rx_filter = HWTSTAMP_FILTER_NONE; 899 INIT_LIST_HEAD(&ptp->evt_list); 900 INIT_LIST_HEAD(&ptp->evt_free_list); 901 spin_lock_init(&ptp->evt_lock); 902 for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++) 903 list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list); 904 905 ptp->phc_clock_info.owner = THIS_MODULE; 906 snprintf(ptp->phc_clock_info.name, 907 sizeof(ptp->phc_clock_info.name), 908 "%pm", efx->net_dev->perm_addr); 909 ptp->phc_clock_info.max_adj = MAX_PPB; 910 ptp->phc_clock_info.n_alarm = 0; 911 ptp->phc_clock_info.n_ext_ts = 0; 912 ptp->phc_clock_info.n_per_out = 0; 913 ptp->phc_clock_info.pps = 1; 914 ptp->phc_clock_info.adjfreq = efx_phc_adjfreq; 915 ptp->phc_clock_info.adjtime = efx_phc_adjtime; 916 ptp->phc_clock_info.gettime = efx_phc_gettime; 917 ptp->phc_clock_info.settime = efx_phc_settime; 918 ptp->phc_clock_info.enable = efx_phc_enable; 919 920 ptp->phc_clock = ptp_clock_register(&ptp->phc_clock_info, 921 &efx->pci_dev->dev); 922 if (IS_ERR(ptp->phc_clock)) { 923 rc = PTR_ERR(ptp->phc_clock); 924 goto fail3; 925 } 926 927 INIT_WORK(&ptp->pps_work, efx_ptp_pps_worker); 928 ptp->pps_workwq = create_singlethread_workqueue("sfc_pps"); 929 if (!ptp->pps_workwq) { 930 rc = -ENOMEM; 931 goto fail4; 932 } 933 ptp->nic_ts_enabled = false; 934 935 return 0; 936 fail4: 937 ptp_clock_unregister(efx->ptp_data->phc_clock); 938 939 fail3: 940 destroy_workqueue(efx->ptp_data->workwq); 941 942 fail2: 943 efx_nic_free_buffer(efx, &ptp->start); 944 945 fail1: 946 kfree(efx->ptp_data); 947 efx->ptp_data = NULL; 948 949 return rc; 950 } 951 952 static void efx_ptp_remove_channel(struct efx_channel *channel) 953 { 954 struct efx_nic *efx = channel->efx; 955 956 if (!efx->ptp_data) 957 return; 958 959 (void)efx_ptp_disable(channel->efx); 960 961 cancel_work_sync(&efx->ptp_data->work); 962 cancel_work_sync(&efx->ptp_data->pps_work); 963 964 skb_queue_purge(&efx->ptp_data->rxq); 965 skb_queue_purge(&efx->ptp_data->txq); 966 967 ptp_clock_unregister(efx->ptp_data->phc_clock); 968 969 destroy_workqueue(efx->ptp_data->workwq); 970 destroy_workqueue(efx->ptp_data->pps_workwq); 971 972 efx_nic_free_buffer(efx, &efx->ptp_data->start); 973 kfree(efx->ptp_data); 974 } 975 976 static void efx_ptp_get_channel_name(struct efx_channel *channel, 977 char *buf, size_t len) 978 { 979 snprintf(buf, len, "%s-ptp", channel->efx->name); 980 } 981 982 /* Determine whether this packet should be processed by the PTP module 983 * or transmitted conventionally. 984 */ 985 bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb) 986 { 987 return efx->ptp_data && 988 efx->ptp_data->enabled && 989 skb->len >= PTP_MIN_LENGTH && 990 skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM && 991 likely(skb->protocol == htons(ETH_P_IP)) && 992 ip_hdr(skb)->protocol == IPPROTO_UDP && 993 udp_hdr(skb)->dest == htons(PTP_EVENT_PORT); 994 } 995 996 /* Receive a PTP packet. Packets are queued until the arrival of 997 * the receive timestamp from the MC - this will probably occur after the 998 * packet arrival because of the processing in the MC. 999 */ 1000 static bool efx_ptp_rx(struct efx_channel *channel, struct sk_buff *skb) 1001 { 1002 struct efx_nic *efx = channel->efx; 1003 struct efx_ptp_data *ptp = efx->ptp_data; 1004 struct efx_ptp_match *match = (struct efx_ptp_match *)skb->cb; 1005 u8 *match_data_012, *match_data_345; 1006 unsigned int version; 1007 1008 match->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS); 1009 1010 /* Correct version? */ 1011 if (ptp->mode == MC_CMD_PTP_MODE_V1) { 1012 if (!pskb_may_pull(skb, PTP_V1_MIN_LENGTH)) { 1013 return false; 1014 } 1015 version = ntohs(*(__be16 *)&skb->data[PTP_V1_VERSION_OFFSET]); 1016 if (version != PTP_VERSION_V1) { 1017 return false; 1018 } 1019 1020 /* PTP V1 uses all six bytes of the UUID to match the packet 1021 * to the timestamp 1022 */ 1023 match_data_012 = skb->data + PTP_V1_UUID_OFFSET; 1024 match_data_345 = skb->data + PTP_V1_UUID_OFFSET + 3; 1025 } else { 1026 if (!pskb_may_pull(skb, PTP_V2_MIN_LENGTH)) { 1027 return false; 1028 } 1029 version = skb->data[PTP_V2_VERSION_OFFSET]; 1030 if ((version & PTP_VERSION_V2_MASK) != PTP_VERSION_V2) { 1031 return false; 1032 } 1033 1034 /* The original V2 implementation uses bytes 2-7 of 1035 * the UUID to match the packet to the timestamp. This 1036 * discards two of the bytes of the MAC address used 1037 * to create the UUID (SF bug 33070). The PTP V2 1038 * enhanced mode fixes this issue and uses bytes 0-2 1039 * and byte 5-7 of the UUID. 1040 */ 1041 match_data_345 = skb->data + PTP_V2_UUID_OFFSET + 5; 1042 if (ptp->mode == MC_CMD_PTP_MODE_V2) { 1043 match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 2; 1044 } else { 1045 match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 0; 1046 BUG_ON(ptp->mode != MC_CMD_PTP_MODE_V2_ENHANCED); 1047 } 1048 } 1049 1050 /* Does this packet require timestamping? */ 1051 if (ntohs(*(__be16 *)&skb->data[PTP_DPORT_OFFSET]) == PTP_EVENT_PORT) { 1052 struct skb_shared_hwtstamps *timestamps; 1053 1054 match->state = PTP_PACKET_STATE_UNMATCHED; 1055 1056 /* Clear all timestamps held: filled in later */ 1057 timestamps = skb_hwtstamps(skb); 1058 memset(timestamps, 0, sizeof(*timestamps)); 1059 1060 /* We expect the sequence number to be in the same position in 1061 * the packet for PTP V1 and V2 1062 */ 1063 BUILD_BUG_ON(PTP_V1_SEQUENCE_OFFSET != PTP_V2_SEQUENCE_OFFSET); 1064 BUILD_BUG_ON(PTP_V1_SEQUENCE_LENGTH != PTP_V2_SEQUENCE_LENGTH); 1065 1066 /* Extract UUID/Sequence information */ 1067 match->words[0] = (match_data_012[0] | 1068 (match_data_012[1] << 8) | 1069 (match_data_012[2] << 16) | 1070 (match_data_345[0] << 24)); 1071 match->words[1] = (match_data_345[1] | 1072 (match_data_345[2] << 8) | 1073 (skb->data[PTP_V1_SEQUENCE_OFFSET + 1074 PTP_V1_SEQUENCE_LENGTH - 1] << 1075 16)); 1076 } else { 1077 match->state = PTP_PACKET_STATE_MATCH_UNWANTED; 1078 } 1079 1080 skb_queue_tail(&ptp->rxq, skb); 1081 queue_work(ptp->workwq, &ptp->work); 1082 1083 return true; 1084 } 1085 1086 /* Transmit a PTP packet. This has to be transmitted by the MC 1087 * itself, through an MCDI call. MCDI calls aren't permitted 1088 * in the transmit path so defer the actual transmission to a suitable worker. 1089 */ 1090 int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb) 1091 { 1092 struct efx_ptp_data *ptp = efx->ptp_data; 1093 1094 skb_queue_tail(&ptp->txq, skb); 1095 1096 if ((udp_hdr(skb)->dest == htons(PTP_EVENT_PORT)) && 1097 (skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM)) 1098 efx_xmit_hwtstamp_pending(skb); 1099 queue_work(ptp->workwq, &ptp->work); 1100 1101 return NETDEV_TX_OK; 1102 } 1103 1104 static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted, 1105 unsigned int new_mode) 1106 { 1107 if ((enable_wanted != efx->ptp_data->enabled) || 1108 (enable_wanted && (efx->ptp_data->mode != new_mode))) { 1109 int rc; 1110 1111 if (enable_wanted) { 1112 /* Change of mode requires disable */ 1113 if (efx->ptp_data->enabled && 1114 (efx->ptp_data->mode != new_mode)) { 1115 efx->ptp_data->enabled = false; 1116 rc = efx_ptp_stop(efx); 1117 if (rc != 0) 1118 return rc; 1119 } 1120 1121 /* Set new operating mode and establish 1122 * baseline synchronisation, which must 1123 * succeed. 1124 */ 1125 efx->ptp_data->mode = new_mode; 1126 rc = efx_ptp_start(efx); 1127 if (rc == 0) { 1128 rc = efx_ptp_synchronize(efx, 1129 PTP_SYNC_ATTEMPTS * 2); 1130 if (rc != 0) 1131 efx_ptp_stop(efx); 1132 } 1133 } else { 1134 rc = efx_ptp_stop(efx); 1135 } 1136 1137 if (rc != 0) 1138 return rc; 1139 1140 efx->ptp_data->enabled = enable_wanted; 1141 } 1142 1143 return 0; 1144 } 1145 1146 static int efx_ptp_ts_init(struct efx_nic *efx, struct hwtstamp_config *init) 1147 { 1148 bool enable_wanted = false; 1149 unsigned int new_mode; 1150 int rc; 1151 1152 if (init->flags) 1153 return -EINVAL; 1154 1155 if ((init->tx_type != HWTSTAMP_TX_OFF) && 1156 (init->tx_type != HWTSTAMP_TX_ON)) 1157 return -ERANGE; 1158 1159 new_mode = efx->ptp_data->mode; 1160 /* Determine whether any PTP HW operations are required */ 1161 switch (init->rx_filter) { 1162 case HWTSTAMP_FILTER_NONE: 1163 break; 1164 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 1165 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 1166 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 1167 init->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; 1168 new_mode = MC_CMD_PTP_MODE_V1; 1169 enable_wanted = true; 1170 break; 1171 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 1172 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 1173 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 1174 /* Although these three are accepted only IPV4 packets will be 1175 * timestamped 1176 */ 1177 init->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; 1178 new_mode = MC_CMD_PTP_MODE_V2_ENHANCED; 1179 enable_wanted = true; 1180 break; 1181 case HWTSTAMP_FILTER_PTP_V2_EVENT: 1182 case HWTSTAMP_FILTER_PTP_V2_SYNC: 1183 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1184 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 1185 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 1186 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 1187 /* Non-IP + IPv6 timestamping not supported */ 1188 return -ERANGE; 1189 break; 1190 default: 1191 return -ERANGE; 1192 } 1193 1194 if (init->tx_type != HWTSTAMP_TX_OFF) 1195 enable_wanted = true; 1196 1197 /* Old versions of the firmware do not support the improved 1198 * UUID filtering option (SF bug 33070). If the firmware does 1199 * not accept the enhanced mode, fall back to the standard PTP 1200 * v2 UUID filtering. 1201 */ 1202 rc = efx_ptp_change_mode(efx, enable_wanted, new_mode); 1203 if ((rc != 0) && (new_mode == MC_CMD_PTP_MODE_V2_ENHANCED)) 1204 rc = efx_ptp_change_mode(efx, enable_wanted, MC_CMD_PTP_MODE_V2); 1205 if (rc != 0) 1206 return rc; 1207 1208 efx->ptp_data->config = *init; 1209 1210 return 0; 1211 } 1212 1213 void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info) 1214 { 1215 struct efx_ptp_data *ptp = efx->ptp_data; 1216 1217 if (!ptp) 1218 return; 1219 1220 ts_info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE | 1221 SOF_TIMESTAMPING_RX_HARDWARE | 1222 SOF_TIMESTAMPING_RAW_HARDWARE); 1223 ts_info->phc_index = ptp_clock_index(ptp->phc_clock); 1224 ts_info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON; 1225 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE | 1226 1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT | 1227 1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC | 1228 1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ | 1229 1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT | 1230 1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC | 1231 1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1232 } 1233 1234 int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd) 1235 { 1236 struct hwtstamp_config config; 1237 int rc; 1238 1239 /* Not a PTP enabled port */ 1240 if (!efx->ptp_data) 1241 return -EOPNOTSUPP; 1242 1243 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 1244 return -EFAULT; 1245 1246 rc = efx_ptp_ts_init(efx, &config); 1247 if (rc != 0) 1248 return rc; 1249 1250 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) 1251 ? -EFAULT : 0; 1252 } 1253 1254 static void ptp_event_failure(struct efx_nic *efx, int expected_frag_len) 1255 { 1256 struct efx_ptp_data *ptp = efx->ptp_data; 1257 1258 netif_err(efx, hw, efx->net_dev, 1259 "PTP unexpected event length: got %d expected %d\n", 1260 ptp->evt_frag_idx, expected_frag_len); 1261 ptp->reset_required = true; 1262 queue_work(ptp->workwq, &ptp->work); 1263 } 1264 1265 /* Process a completed receive event. Put it on the event queue and 1266 * start worker thread. This is required because event and their 1267 * correspoding packets may come in either order. 1268 */ 1269 static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp) 1270 { 1271 struct efx_ptp_event_rx *evt = NULL; 1272 1273 if (ptp->evt_frag_idx != 3) { 1274 ptp_event_failure(efx, 3); 1275 return; 1276 } 1277 1278 spin_lock_bh(&ptp->evt_lock); 1279 if (!list_empty(&ptp->evt_free_list)) { 1280 evt = list_first_entry(&ptp->evt_free_list, 1281 struct efx_ptp_event_rx, link); 1282 list_del(&evt->link); 1283 1284 evt->seq0 = EFX_QWORD_FIELD(ptp->evt_frags[2], MCDI_EVENT_DATA); 1285 evt->seq1 = (EFX_QWORD_FIELD(ptp->evt_frags[2], 1286 MCDI_EVENT_SRC) | 1287 (EFX_QWORD_FIELD(ptp->evt_frags[1], 1288 MCDI_EVENT_SRC) << 8) | 1289 (EFX_QWORD_FIELD(ptp->evt_frags[0], 1290 MCDI_EVENT_SRC) << 16)); 1291 evt->hwtimestamp = ktime_set( 1292 EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA), 1293 EFX_QWORD_FIELD(ptp->evt_frags[1], MCDI_EVENT_DATA)); 1294 evt->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS); 1295 list_add_tail(&evt->link, &ptp->evt_list); 1296 1297 queue_work(ptp->workwq, &ptp->work); 1298 } else { 1299 netif_err(efx, rx_err, efx->net_dev, "No free PTP event"); 1300 } 1301 spin_unlock_bh(&ptp->evt_lock); 1302 } 1303 1304 static void ptp_event_fault(struct efx_nic *efx, struct efx_ptp_data *ptp) 1305 { 1306 int code = EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA); 1307 if (ptp->evt_frag_idx != 1) { 1308 ptp_event_failure(efx, 1); 1309 return; 1310 } 1311 1312 netif_err(efx, hw, efx->net_dev, "PTP error %d\n", code); 1313 } 1314 1315 static void ptp_event_pps(struct efx_nic *efx, struct efx_ptp_data *ptp) 1316 { 1317 if (ptp->nic_ts_enabled) 1318 queue_work(ptp->pps_workwq, &ptp->pps_work); 1319 } 1320 1321 void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev) 1322 { 1323 struct efx_ptp_data *ptp = efx->ptp_data; 1324 int code = EFX_QWORD_FIELD(*ev, MCDI_EVENT_CODE); 1325 1326 if (!ptp->enabled) 1327 return; 1328 1329 if (ptp->evt_frag_idx == 0) { 1330 ptp->evt_code = code; 1331 } else if (ptp->evt_code != code) { 1332 netif_err(efx, hw, efx->net_dev, 1333 "PTP out of sequence event %d\n", code); 1334 ptp->evt_frag_idx = 0; 1335 } 1336 1337 ptp->evt_frags[ptp->evt_frag_idx++] = *ev; 1338 if (!MCDI_EVENT_FIELD(*ev, CONT)) { 1339 /* Process resulting event */ 1340 switch (code) { 1341 case MCDI_EVENT_CODE_PTP_RX: 1342 ptp_event_rx(efx, ptp); 1343 break; 1344 case MCDI_EVENT_CODE_PTP_FAULT: 1345 ptp_event_fault(efx, ptp); 1346 break; 1347 case MCDI_EVENT_CODE_PTP_PPS: 1348 ptp_event_pps(efx, ptp); 1349 break; 1350 default: 1351 netif_err(efx, hw, efx->net_dev, 1352 "PTP unknown event %d\n", code); 1353 break; 1354 } 1355 ptp->evt_frag_idx = 0; 1356 } else if (MAX_EVENT_FRAGS == ptp->evt_frag_idx) { 1357 netif_err(efx, hw, efx->net_dev, 1358 "PTP too many event fragments\n"); 1359 ptp->evt_frag_idx = 0; 1360 } 1361 } 1362 1363 static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) 1364 { 1365 struct efx_ptp_data *ptp_data = container_of(ptp, 1366 struct efx_ptp_data, 1367 phc_clock_info); 1368 struct efx_nic *efx = ptp_data->channel->efx; 1369 MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); 1370 s64 adjustment_ns; 1371 int rc; 1372 1373 if (delta > MAX_PPB) 1374 delta = MAX_PPB; 1375 else if (delta < -MAX_PPB) 1376 delta = -MAX_PPB; 1377 1378 /* Convert ppb to fixed point ns. */ 1379 adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >> 1380 (PPB_EXTRA_BITS + MAX_PPB_BITS)); 1381 1382 MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST); 1383 MCDI_SET_DWORD(inadj, PTP_IN_PERIPH_ID, 0); 1384 MCDI_SET_QWORD(inadj, PTP_IN_ADJUST_FREQ, adjustment_ns); 1385 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0); 1386 MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0); 1387 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj), 1388 NULL, 0, NULL); 1389 if (rc != 0) 1390 return rc; 1391 1392 ptp_data->current_adjfreq = delta; 1393 return 0; 1394 } 1395 1396 static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) 1397 { 1398 struct efx_ptp_data *ptp_data = container_of(ptp, 1399 struct efx_ptp_data, 1400 phc_clock_info); 1401 struct efx_nic *efx = ptp_data->channel->efx; 1402 struct timespec delta_ts = ns_to_timespec(delta); 1403 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ADJUST_LEN); 1404 1405 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST); 1406 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 1407 MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, 0); 1408 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec); 1409 MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec); 1410 return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 1411 NULL, 0, NULL); 1412 } 1413 1414 static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts) 1415 { 1416 struct efx_ptp_data *ptp_data = container_of(ptp, 1417 struct efx_ptp_data, 1418 phc_clock_info); 1419 struct efx_nic *efx = ptp_data->channel->efx; 1420 MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_READ_NIC_TIME_LEN); 1421 MCDI_DECLARE_BUF(outbuf, MC_CMD_PTP_OUT_READ_NIC_TIME_LEN); 1422 int rc; 1423 1424 MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_READ_NIC_TIME); 1425 MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); 1426 1427 rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), 1428 outbuf, sizeof(outbuf), NULL); 1429 if (rc != 0) 1430 return rc; 1431 1432 ts->tv_sec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_SECONDS); 1433 ts->tv_nsec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_NANOSECONDS); 1434 return 0; 1435 } 1436 1437 static int efx_phc_settime(struct ptp_clock_info *ptp, 1438 const struct timespec *e_ts) 1439 { 1440 /* Get the current NIC time, efx_phc_gettime. 1441 * Subtract from the desired time to get the offset 1442 * call efx_phc_adjtime with the offset 1443 */ 1444 int rc; 1445 struct timespec time_now; 1446 struct timespec delta; 1447 1448 rc = efx_phc_gettime(ptp, &time_now); 1449 if (rc != 0) 1450 return rc; 1451 1452 delta = timespec_sub(*e_ts, time_now); 1453 1454 rc = efx_phc_adjtime(ptp, timespec_to_ns(&delta)); 1455 if (rc != 0) 1456 return rc; 1457 1458 return 0; 1459 } 1460 1461 static int efx_phc_enable(struct ptp_clock_info *ptp, 1462 struct ptp_clock_request *request, 1463 int enable) 1464 { 1465 struct efx_ptp_data *ptp_data = container_of(ptp, 1466 struct efx_ptp_data, 1467 phc_clock_info); 1468 if (request->type != PTP_CLK_REQ_PPS) 1469 return -EOPNOTSUPP; 1470 1471 ptp_data->nic_ts_enabled = !!enable; 1472 return 0; 1473 } 1474 1475 static const struct efx_channel_type efx_ptp_channel_type = { 1476 .handle_no_channel = efx_ptp_handle_no_channel, 1477 .pre_probe = efx_ptp_probe_channel, 1478 .post_remove = efx_ptp_remove_channel, 1479 .get_name = efx_ptp_get_channel_name, 1480 /* no copy operation; there is no need to reallocate this channel */ 1481 .receive_skb = efx_ptp_rx, 1482 .keep_eventq = false, 1483 }; 1484 1485 void efx_ptp_probe(struct efx_nic *efx) 1486 { 1487 /* Check whether PTP is implemented on this NIC. The DISABLE 1488 * operation will succeed if and only if it is implemented. 1489 */ 1490 if (efx_ptp_disable(efx) == 0) 1491 efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] = 1492 &efx_ptp_channel_type; 1493 } 1494